1#ifndef _MSM_VIDC_DEC_H_
2#define _MSM_VIDC_DEC_H_
3
4#include <linux/types.h>
5#include <linux/ioctl.h>
6
7/* STATUS CODES */
8/* Base value for status codes */
9#define VDEC_S_BASE	0x40000000
10/* Success */
11#define VDEC_S_SUCCESS	(VDEC_S_BASE)
12/* General failure */
13#define VDEC_S_EFAIL	(VDEC_S_BASE + 1)
14/* Fatal irrecoverable  failure. Need to  tear down session. */
15#define VDEC_S_EFATAL   (VDEC_S_BASE + 2)
16/* Error detected in the passed  parameters */
17#define VDEC_S_EBADPARAM	(VDEC_S_BASE + 3)
18/* Command called in invalid  state. */
19#define VDEC_S_EINVALSTATE	(VDEC_S_BASE + 4)
20 /* Insufficient OS  resources - thread, memory etc. */
21#define VDEC_S_ENOSWRES	(VDEC_S_BASE + 5)
22 /* Insufficient HW resources -  core capacity  maxed  out. */
23#define VDEC_S_ENOHWRES	(VDEC_S_BASE + 6)
24/* Invalid command  called */
25#define VDEC_S_EINVALCMD	(VDEC_S_BASE + 7)
26/* Command timeout. */
27#define VDEC_S_ETIMEOUT	(VDEC_S_BASE + 8)
28/* Pre-requirement is  not met for API. */
29#define VDEC_S_ENOPREREQ	(VDEC_S_BASE + 9)
30/* Command queue is full. */
31#define VDEC_S_ECMDQFULL	(VDEC_S_BASE + 10)
32/* Command is not supported  by this driver */
33#define VDEC_S_ENOTSUPP	(VDEC_S_BASE + 11)
34/* Command is not implemented by thedriver. */
35#define VDEC_S_ENOTIMPL	(VDEC_S_BASE + 12)
36/* Command is not implemented by the driver.  */
37#define VDEC_S_BUSY	(VDEC_S_BASE + 13)
38#define VDEC_S_INPUT_BITSTREAM_ERR (VDEC_S_BASE + 14)
39
40#define VDEC_INTF_VER	1
41#define VDEC_MSG_BASE	0x0000000
42/* Codes to identify asynchronous message responses and events that driver
43  wants to communicate to the app.*/
44#define VDEC_MSG_INVALID	(VDEC_MSG_BASE + 0)
45#define VDEC_MSG_RESP_INPUT_BUFFER_DONE	(VDEC_MSG_BASE + 1)
46#define VDEC_MSG_RESP_OUTPUT_BUFFER_DONE	(VDEC_MSG_BASE + 2)
47#define VDEC_MSG_RESP_INPUT_FLUSHED	(VDEC_MSG_BASE + 3)
48#define VDEC_MSG_RESP_OUTPUT_FLUSHED	(VDEC_MSG_BASE + 4)
49#define VDEC_MSG_RESP_FLUSH_INPUT_DONE	(VDEC_MSG_BASE + 5)
50#define VDEC_MSG_RESP_FLUSH_OUTPUT_DONE	(VDEC_MSG_BASE + 6)
51#define VDEC_MSG_RESP_START_DONE	(VDEC_MSG_BASE + 7)
52#define VDEC_MSG_RESP_STOP_DONE	(VDEC_MSG_BASE + 8)
53#define VDEC_MSG_RESP_PAUSE_DONE	(VDEC_MSG_BASE + 9)
54#define VDEC_MSG_RESP_RESUME_DONE	(VDEC_MSG_BASE + 10)
55#define VDEC_MSG_RESP_RESOURCE_LOADED	(VDEC_MSG_BASE + 11)
56#define VDEC_EVT_RESOURCES_LOST	(VDEC_MSG_BASE + 12)
57#define VDEC_MSG_EVT_CONFIG_CHANGED	(VDEC_MSG_BASE + 13)
58#define VDEC_MSG_EVT_HW_ERROR	(VDEC_MSG_BASE + 14)
59#define VDEC_MSG_EVT_INFO_CONFIG_CHANGED	(VDEC_MSG_BASE + 15)
60#define VDEC_MSG_EVT_INFO_FIELD_DROPPED	(VDEC_MSG_BASE + 16)
61
62/*Buffer flags bits masks.*/
63#define VDEC_BUFFERFLAG_EOS	0x00000001
64#define VDEC_BUFFERFLAG_DECODEONLY	0x00000004
65#define VDEC_BUFFERFLAG_DATACORRUPT	0x00000008
66#define VDEC_BUFFERFLAG_ENDOFFRAME	0x00000010
67#define VDEC_BUFFERFLAG_SYNCFRAME	0x00000020
68#define VDEC_BUFFERFLAG_EXTRADATA	0x00000040
69#define VDEC_BUFFERFLAG_CODECCONFIG	0x00000080
70
71/*Post processing flags bit masks*/
72#define VDEC_EXTRADATA_NONE 0x001
73#define VDEC_EXTRADATA_QP 0x004
74#define VDEC_EXTRADATA_MB_ERROR_MAP 0x008
75#define VDEC_EXTRADATA_SEI 0x010
76#define VDEC_EXTRADATA_VUI 0x020
77#define VDEC_EXTRADATA_VC1 0x040
78
79#define VDEC_CMDBASE	0x800
80#define VDEC_CMD_SET_INTF_VERSION	(VDEC_CMDBASE)
81
82#define VDEC_IOCTL_MAGIC 'v'
83
84struct vdec_ioctl_msg {
85	void __user *in;
86	void __user *out;
87};
88
89/* CMD params: InputParam:enum vdec_codec
90   OutputParam: struct vdec_profile_level*/
91#define VDEC_IOCTL_GET_PROFILE_LEVEL_SUPPORTED \
92	_IOWR(VDEC_IOCTL_MAGIC, 0, struct vdec_ioctl_msg)
93
94/*CMD params:InputParam: NULL
95  OutputParam: uint32_t(bitmask)*/
96#define VDEC_IOCTL_GET_INTERLACE_FORMAT \
97	_IOR(VDEC_IOCTL_MAGIC, 1, struct vdec_ioctl_msg)
98
99/* CMD params: InputParam:  enum vdec_codec
100   OutputParam: struct vdec_profile_level*/
101#define VDEC_IOCTL_GET_CURRENT_PROFILE_LEVEL \
102	_IOWR(VDEC_IOCTL_MAGIC, 2, struct vdec_ioctl_msg)
103
104/*CMD params: SET: InputParam: enum vdec_output_fromat  OutputParam: NULL
105  GET:  InputParam: NULL OutputParam: enum vdec_output_fromat*/
106#define VDEC_IOCTL_SET_OUTPUT_FORMAT \
107	_IOWR(VDEC_IOCTL_MAGIC, 3, struct vdec_ioctl_msg)
108#define VDEC_IOCTL_GET_OUTPUT_FORMAT \
109	_IOWR(VDEC_IOCTL_MAGIC, 4, struct vdec_ioctl_msg)
110
111/*CMD params: SET: InputParam: enum vdec_codec OutputParam: NULL
112  GET: InputParam: NULL OutputParam: enum vdec_codec*/
113#define VDEC_IOCTL_SET_CODEC \
114	_IOW(VDEC_IOCTL_MAGIC, 5, struct vdec_ioctl_msg)
115#define VDEC_IOCTL_GET_CODEC \
116	_IOR(VDEC_IOCTL_MAGIC, 6, struct vdec_ioctl_msg)
117
118/*CMD params: SET: InputParam: struct vdec_picsize outputparam: NULL
119 GET: InputParam: NULL outputparam: struct vdec_picsize*/
120#define VDEC_IOCTL_SET_PICRES \
121	_IOW(VDEC_IOCTL_MAGIC, 7, struct vdec_ioctl_msg)
122#define VDEC_IOCTL_GET_PICRES \
123	_IOR(VDEC_IOCTL_MAGIC, 8, struct vdec_ioctl_msg)
124
125#define VDEC_IOCTL_SET_EXTRADATA \
126	_IOW(VDEC_IOCTL_MAGIC, 9, struct vdec_ioctl_msg)
127#define VDEC_IOCTL_GET_EXTRADATA \
128	_IOR(VDEC_IOCTL_MAGIC, 10, struct vdec_ioctl_msg)
129
130#define VDEC_IOCTL_SET_SEQUENCE_HEADER \
131	_IOW(VDEC_IOCTL_MAGIC, 11, struct vdec_ioctl_msg)
132
133/* CMD params: SET: InputParam - vdec_allocatorproperty, OutputParam - NULL
134   GET: InputParam - NULL, OutputParam - vdec_allocatorproperty*/
135#define VDEC_IOCTL_SET_BUFFER_REQ \
136	_IOW(VDEC_IOCTL_MAGIC, 12, struct vdec_ioctl_msg)
137#define VDEC_IOCTL_GET_BUFFER_REQ \
138	_IOR(VDEC_IOCTL_MAGIC, 13, struct vdec_ioctl_msg)
139/* CMD params: InputParam - vdec_buffer, OutputParam - uint8_t** */
140#define VDEC_IOCTL_ALLOCATE_BUFFER \
141	_IOWR(VDEC_IOCTL_MAGIC, 14, struct vdec_ioctl_msg)
142/* CMD params: InputParam - uint8_t *, OutputParam - NULL.*/
143#define VDEC_IOCTL_FREE_BUFFER \
144	_IOW(VDEC_IOCTL_MAGIC, 15, struct vdec_ioctl_msg)
145
146/*CMD params: CMD: InputParam - struct vdec_setbuffer_cmd, OutputParam - NULL*/
147#define VDEC_IOCTL_SET_BUFFER \
148	_IOW(VDEC_IOCTL_MAGIC, 16, struct vdec_ioctl_msg)
149
150/* CMD params: InputParam - struct vdec_fillbuffer_cmd, OutputParam - NULL*/
151#define VDEC_IOCTL_FILL_OUTPUT_BUFFER \
152	_IOW(VDEC_IOCTL_MAGIC, 17, struct vdec_ioctl_msg)
153
154/*CMD params: InputParam - struct vdec_frameinfo , OutputParam - NULL*/
155#define VDEC_IOCTL_DECODE_FRAME \
156	_IOW(VDEC_IOCTL_MAGIC, 18, struct vdec_ioctl_msg)
157
158#define VDEC_IOCTL_LOAD_RESOURCES _IO(VDEC_IOCTL_MAGIC, 19)
159#define VDEC_IOCTL_CMD_START _IO(VDEC_IOCTL_MAGIC, 20)
160#define VDEC_IOCTL_CMD_STOP _IO(VDEC_IOCTL_MAGIC, 21)
161#define VDEC_IOCTL_CMD_PAUSE _IO(VDEC_IOCTL_MAGIC, 22)
162#define VDEC_IOCTL_CMD_RESUME _IO(VDEC_IOCTL_MAGIC, 23)
163
164/*CMD params: InputParam - enum vdec_bufferflush , OutputParam - NULL */
165#define VDEC_IOCTL_CMD_FLUSH _IOW(VDEC_IOCTL_MAGIC, 24, struct vdec_ioctl_msg)
166
167/* ========================================================
168 * IOCTL for getting asynchronous notification from driver
169 * ========================================================*/
170
171/*IOCTL params: InputParam - NULL, OutputParam - struct vdec_msginfo*/
172#define VDEC_IOCTL_GET_NEXT_MSG \
173	_IOR(VDEC_IOCTL_MAGIC, 25, struct vdec_ioctl_msg)
174
175#define VDEC_IOCTL_STOP_NEXT_MSG _IO(VDEC_IOCTL_MAGIC, 26)
176
177#define VDEC_IOCTL_GET_NUMBER_INSTANCES \
178	_IOR(VDEC_IOCTL_MAGIC, 27, struct vdec_ioctl_msg)
179
180#define VDEC_IOCTL_SET_PICTURE_ORDER \
181	_IOW(VDEC_IOCTL_MAGIC, 28, struct vdec_ioctl_msg)
182
183#define VDEC_IOCTL_SET_FRAME_RATE \
184	_IOW(VDEC_IOCTL_MAGIC, 29, struct vdec_ioctl_msg)
185
186#define VDEC_IOCTL_SET_H264_MV_BUFFER \
187	_IOW(VDEC_IOCTL_MAGIC, 30, struct vdec_ioctl_msg)
188
189#define VDEC_IOCTL_FREE_H264_MV_BUFFER \
190	_IOW(VDEC_IOCTL_MAGIC, 31, struct vdec_ioctl_msg)
191
192#define VDEC_IOCTL_GET_MV_BUFFER_SIZE  \
193	_IOR(VDEC_IOCTL_MAGIC, 32, struct vdec_ioctl_msg)
194
195#define VDEC_IOCTL_SET_IDR_ONLY_DECODING \
196	_IO(VDEC_IOCTL_MAGIC, 33)
197
198#define VDEC_IOCTL_SET_CONT_ON_RECONFIG  \
199	_IO(VDEC_IOCTL_MAGIC, 34)
200
201#define VDEC_IOCTL_SET_DISABLE_DMX \
202	_IOW(VDEC_IOCTL_MAGIC, 35, struct vdec_ioctl_msg)
203
204#define VDEC_IOCTL_GET_DISABLE_DMX \
205	_IOR(VDEC_IOCTL_MAGIC, 36, struct vdec_ioctl_msg)
206
207#define VDEC_IOCTL_GET_DISABLE_DMX_SUPPORT \
208	_IOR(VDEC_IOCTL_MAGIC, 37, struct vdec_ioctl_msg)
209
210enum vdec_picture {
211	PICTURE_TYPE_I,
212	PICTURE_TYPE_P,
213	PICTURE_TYPE_B,
214	PICTURE_TYPE_BI,
215	PICTURE_TYPE_SKIP,
216	PICTURE_TYPE_IDR,
217	PICTURE_TYPE_UNKNOWN
218};
219
220enum vdec_buffer {
221	VDEC_BUFFER_TYPE_INPUT,
222	VDEC_BUFFER_TYPE_OUTPUT
223};
224
225struct vdec_allocatorproperty {
226	enum vdec_buffer buffer_type;
227	uint32_t mincount;
228	uint32_t maxcount;
229	uint32_t actualcount;
230	size_t buffer_size;
231	uint32_t alignment;
232	uint32_t buf_poolid;
233};
234
235struct vdec_bufferpayload {
236	void __user *bufferaddr;
237	size_t buffer_len;
238	int pmem_fd;
239	size_t offset;
240	size_t mmaped_size;
241};
242
243struct vdec_setbuffer_cmd {
244	enum vdec_buffer buffer_type;
245	struct vdec_bufferpayload buffer;
246};
247
248struct vdec_fillbuffer_cmd {
249	struct vdec_bufferpayload buffer;
250	void *client_data;
251};
252
253enum vdec_bufferflush {
254	VDEC_FLUSH_TYPE_INPUT,
255	VDEC_FLUSH_TYPE_OUTPUT,
256	VDEC_FLUSH_TYPE_ALL
257};
258
259enum vdec_codec {
260	VDEC_CODECTYPE_H264 = 0x1,
261	VDEC_CODECTYPE_H263 = 0x2,
262	VDEC_CODECTYPE_MPEG4 = 0x3,
263	VDEC_CODECTYPE_DIVX_3 = 0x4,
264	VDEC_CODECTYPE_DIVX_4 = 0x5,
265	VDEC_CODECTYPE_DIVX_5 = 0x6,
266	VDEC_CODECTYPE_DIVX_6 = 0x7,
267	VDEC_CODECTYPE_XVID = 0x8,
268	VDEC_CODECTYPE_MPEG1 = 0x9,
269	VDEC_CODECTYPE_MPEG2 = 0xa,
270	VDEC_CODECTYPE_VC1 = 0xb,
271	VDEC_CODECTYPE_VC1_RCV = 0xc
272};
273
274enum vdec_mpeg2_profile {
275	VDEC_MPEG2ProfileSimple = 0x1,
276	VDEC_MPEG2ProfileMain = 0x2,
277	VDEC_MPEG2Profile422 = 0x4,
278	VDEC_MPEG2ProfileSNR = 0x8,
279	VDEC_MPEG2ProfileSpatial = 0x10,
280	VDEC_MPEG2ProfileHigh = 0x20,
281	VDEC_MPEG2ProfileKhronosExtensions = 0x6F000000,
282	VDEC_MPEG2ProfileVendorStartUnused = 0x7F000000,
283	VDEC_MPEG2ProfileMax = 0x7FFFFFFF
284};
285
286enum vdec_mpeg2_level {
287
288	VDEC_MPEG2LevelLL = 0x1,
289	VDEC_MPEG2LevelML = 0x2,
290	VDEC_MPEG2LevelH14 = 0x4,
291	VDEC_MPEG2LevelHL = 0x8,
292	VDEC_MPEG2LevelKhronosExtensions = 0x6F000000,
293	VDEC_MPEG2LevelVendorStartUnused = 0x7F000000,
294	VDEC_MPEG2LevelMax = 0x7FFFFFFF
295};
296
297enum vdec_mpeg4_profile {
298	VDEC_MPEG4ProfileSimple = 0x01,
299	VDEC_MPEG4ProfileSimpleScalable = 0x02,
300	VDEC_MPEG4ProfileCore = 0x04,
301	VDEC_MPEG4ProfileMain = 0x08,
302	VDEC_MPEG4ProfileNbit = 0x10,
303	VDEC_MPEG4ProfileScalableTexture = 0x20,
304	VDEC_MPEG4ProfileSimpleFace = 0x40,
305	VDEC_MPEG4ProfileSimpleFBA = 0x80,
306	VDEC_MPEG4ProfileBasicAnimated = 0x100,
307	VDEC_MPEG4ProfileHybrid = 0x200,
308	VDEC_MPEG4ProfileAdvancedRealTime = 0x400,
309	VDEC_MPEG4ProfileCoreScalable = 0x800,
310	VDEC_MPEG4ProfileAdvancedCoding = 0x1000,
311	VDEC_MPEG4ProfileAdvancedCore = 0x2000,
312	VDEC_MPEG4ProfileAdvancedScalable = 0x4000,
313	VDEC_MPEG4ProfileAdvancedSimple = 0x8000,
314	VDEC_MPEG4ProfileKhronosExtensions = 0x6F000000,
315	VDEC_MPEG4ProfileVendorStartUnused = 0x7F000000,
316	VDEC_MPEG4ProfileMax = 0x7FFFFFFF
317};
318
319enum vdec_mpeg4_level {
320	VDEC_MPEG4Level0 = 0x01,
321	VDEC_MPEG4Level0b = 0x02,
322	VDEC_MPEG4Level1 = 0x04,
323	VDEC_MPEG4Level2 = 0x08,
324	VDEC_MPEG4Level3 = 0x10,
325	VDEC_MPEG4Level4 = 0x20,
326	VDEC_MPEG4Level4a = 0x40,
327	VDEC_MPEG4Level5 = 0x80,
328	VDEC_MPEG4LevelKhronosExtensions = 0x6F000000,
329	VDEC_MPEG4LevelVendorStartUnused = 0x7F000000,
330	VDEC_MPEG4LevelMax = 0x7FFFFFFF
331};
332
333enum vdec_avc_profile {
334	VDEC_AVCProfileBaseline = 0x01,
335	VDEC_AVCProfileMain = 0x02,
336	VDEC_AVCProfileExtended = 0x04,
337	VDEC_AVCProfileHigh = 0x08,
338	VDEC_AVCProfileHigh10 = 0x10,
339	VDEC_AVCProfileHigh422 = 0x20,
340	VDEC_AVCProfileHigh444 = 0x40,
341	VDEC_AVCProfileKhronosExtensions = 0x6F000000,
342	VDEC_AVCProfileVendorStartUnused = 0x7F000000,
343	VDEC_AVCProfileMax = 0x7FFFFFFF
344};
345
346enum vdec_avc_level {
347	VDEC_AVCLevel1 = 0x01,
348	VDEC_AVCLevel1b = 0x02,
349	VDEC_AVCLevel11 = 0x04,
350	VDEC_AVCLevel12 = 0x08,
351	VDEC_AVCLevel13 = 0x10,
352	VDEC_AVCLevel2 = 0x20,
353	VDEC_AVCLevel21 = 0x40,
354	VDEC_AVCLevel22 = 0x80,
355	VDEC_AVCLevel3 = 0x100,
356	VDEC_AVCLevel31 = 0x200,
357	VDEC_AVCLevel32 = 0x400,
358	VDEC_AVCLevel4 = 0x800,
359	VDEC_AVCLevel41 = 0x1000,
360	VDEC_AVCLevel42 = 0x2000,
361	VDEC_AVCLevel5 = 0x4000,
362	VDEC_AVCLevel51 = 0x8000,
363	VDEC_AVCLevelKhronosExtensions = 0x6F000000,
364	VDEC_AVCLevelVendorStartUnused = 0x7F000000,
365	VDEC_AVCLevelMax = 0x7FFFFFFF
366};
367
368enum vdec_divx_profile {
369	VDEC_DIVXProfile_qMobile = 0x01,
370	VDEC_DIVXProfile_Mobile = 0x02,
371	VDEC_DIVXProfile_HD = 0x04,
372	VDEC_DIVXProfile_Handheld = 0x08,
373	VDEC_DIVXProfile_Portable = 0x10,
374	VDEC_DIVXProfile_HomeTheater = 0x20
375};
376
377enum vdec_xvid_profile {
378	VDEC_XVIDProfile_Simple = 0x1,
379	VDEC_XVIDProfile_Advanced_Realtime_Simple = 0x2,
380	VDEC_XVIDProfile_Advanced_Simple = 0x4
381};
382
383enum vdec_xvid_level {
384	VDEC_XVID_LEVEL_S_L0 = 0x1,
385	VDEC_XVID_LEVEL_S_L1 = 0x2,
386	VDEC_XVID_LEVEL_S_L2 = 0x4,
387	VDEC_XVID_LEVEL_S_L3 = 0x8,
388	VDEC_XVID_LEVEL_ARTS_L1 = 0x10,
389	VDEC_XVID_LEVEL_ARTS_L2 = 0x20,
390	VDEC_XVID_LEVEL_ARTS_L3 = 0x40,
391	VDEC_XVID_LEVEL_ARTS_L4 = 0x80,
392	VDEC_XVID_LEVEL_AS_L0 = 0x100,
393	VDEC_XVID_LEVEL_AS_L1 = 0x200,
394	VDEC_XVID_LEVEL_AS_L2 = 0x400,
395	VDEC_XVID_LEVEL_AS_L3 = 0x800,
396	VDEC_XVID_LEVEL_AS_L4 = 0x1000
397};
398
399enum vdec_h263profile {
400	VDEC_H263ProfileBaseline = 0x01,
401	VDEC_H263ProfileH320Coding = 0x02,
402	VDEC_H263ProfileBackwardCompatible = 0x04,
403	VDEC_H263ProfileISWV2 = 0x08,
404	VDEC_H263ProfileISWV3 = 0x10,
405	VDEC_H263ProfileHighCompression = 0x20,
406	VDEC_H263ProfileInternet = 0x40,
407	VDEC_H263ProfileInterlace = 0x80,
408	VDEC_H263ProfileHighLatency = 0x100,
409	VDEC_H263ProfileKhronosExtensions = 0x6F000000,
410	VDEC_H263ProfileVendorStartUnused = 0x7F000000,
411	VDEC_H263ProfileMax = 0x7FFFFFFF
412};
413
414enum vdec_h263level {
415	VDEC_H263Level10 = 0x01,
416	VDEC_H263Level20 = 0x02,
417	VDEC_H263Level30 = 0x04,
418	VDEC_H263Level40 = 0x08,
419	VDEC_H263Level45 = 0x10,
420	VDEC_H263Level50 = 0x20,
421	VDEC_H263Level60 = 0x40,
422	VDEC_H263Level70 = 0x80,
423	VDEC_H263LevelKhronosExtensions = 0x6F000000,
424	VDEC_H263LevelVendorStartUnused = 0x7F000000,
425	VDEC_H263LevelMax = 0x7FFFFFFF
426};
427
428enum vdec_wmv_format {
429	VDEC_WMVFormatUnused = 0x01,
430	VDEC_WMVFormat7 = 0x02,
431	VDEC_WMVFormat8 = 0x04,
432	VDEC_WMVFormat9 = 0x08,
433	VDEC_WMFFormatKhronosExtensions = 0x6F000000,
434	VDEC_WMFFormatVendorStartUnused = 0x7F000000,
435	VDEC_WMVFormatMax = 0x7FFFFFFF
436};
437
438enum vdec_vc1_profile {
439	VDEC_VC1ProfileSimple = 0x1,
440	VDEC_VC1ProfileMain = 0x2,
441	VDEC_VC1ProfileAdvanced = 0x4
442};
443
444enum vdec_vc1_level {
445	VDEC_VC1_LEVEL_S_Low = 0x1,
446	VDEC_VC1_LEVEL_S_Medium = 0x2,
447	VDEC_VC1_LEVEL_M_Low = 0x4,
448	VDEC_VC1_LEVEL_M_Medium = 0x8,
449	VDEC_VC1_LEVEL_M_High = 0x10,
450	VDEC_VC1_LEVEL_A_L0 = 0x20,
451	VDEC_VC1_LEVEL_A_L1 = 0x40,
452	VDEC_VC1_LEVEL_A_L2 = 0x80,
453	VDEC_VC1_LEVEL_A_L3 = 0x100,
454	VDEC_VC1_LEVEL_A_L4 = 0x200
455};
456
457struct vdec_profile_level {
458	uint32_t profiles;
459	uint32_t levels;
460};
461
462enum vdec_interlaced_format {
463	VDEC_InterlaceFrameProgressive = 0x1,
464	VDEC_InterlaceInterleaveFrameTopFieldFirst = 0x2,
465	VDEC_InterlaceInterleaveFrameBottomFieldFirst = 0x4
466};
467
468enum vdec_output_fromat {
469	VDEC_YUV_FORMAT_NV12 = 0x1,
470	VDEC_YUV_FORMAT_TILE_4x2 = 0x2
471};
472
473enum vdec_output_order {
474	VDEC_ORDER_DISPLAY = 0x1,
475	VDEC_ORDER_DECODE = 0x2
476};
477
478struct vdec_picsize {
479	uint32_t frame_width;
480	uint32_t frame_height;
481	uint32_t stride;
482	uint32_t scan_lines;
483};
484
485struct vdec_seqheader {
486	void __user *ptr_seqheader;
487	size_t seq_header_len;
488	int pmem_fd;
489	size_t pmem_offset;
490};
491
492struct vdec_mberror {
493	void __user *ptr_errormap;
494	size_t err_mapsize;
495};
496
497struct vdec_input_frameinfo {
498	void __user *bufferaddr;
499	size_t offset;
500	size_t datalen;
501	uint32_t flags;
502	int64_t timestamp;
503	void *client_data;
504	int pmem_fd;
505	size_t pmem_offset;
506	void __user *desc_addr;
507	uint32_t desc_size;
508};
509
510struct vdec_framesize {
511	uint32_t   left;
512	uint32_t   top;
513	uint32_t   right;
514	uint32_t   bottom;
515};
516
517struct vdec_aspectratioinfo {
518	uint32_t aspect_ratio;
519	uint32_t par_width;
520	uint32_t par_height;
521};
522
523struct vdec_output_frameinfo {
524	void __user *bufferaddr;
525	size_t offset;
526	size_t len;
527	uint32_t flags;
528	int64_t time_stamp;
529	enum vdec_picture pic_type;
530	void *client_data;
531	void *input_frame_clientdata;
532	struct vdec_framesize framesize;
533	enum vdec_interlaced_format interlaced_format;
534	struct vdec_aspectratioinfo aspect_ratio_info;
535};
536
537union vdec_msgdata {
538	struct vdec_output_frameinfo output_frame;
539	void *input_frame_clientdata;
540};
541
542struct vdec_msginfo {
543	uint32_t status_code;
544	uint32_t msgcode;
545	union vdec_msgdata msgdata;
546	size_t msgdatasize;
547};
548
549struct vdec_framerate {
550	unsigned long fps_denominator;
551	unsigned long fps_numerator;
552};
553
554struct vdec_h264_mv{
555	size_t size;
556	int count;
557	int pmem_fd;
558	int offset;
559};
560
561struct vdec_mv_buff_size{
562	int width;
563	int height;
564	int size;
565	int alignment;
566};
567
568#endif /* end of macro _VDECDECODER_H_ */
569