SelectionDAG.cpp revision 01b3d73c20f5afb8265ae943a8ba23c2238c5eea
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "llvm/Constants.h" 16#include "llvm/GlobalValue.h" 17#include "llvm/Assembly/Writer.h" 18#include "llvm/CodeGen/MachineBasicBlock.h" 19#include "llvm/Support/MathExtras.h" 20#include "llvm/Target/MRegisterInfo.h" 21#include "llvm/Target/TargetLowering.h" 22#include "llvm/Target/TargetInstrInfo.h" 23#include "llvm/Target/TargetMachine.h" 24#include <iostream> 25#include <set> 26#include <cmath> 27#include <algorithm> 28using namespace llvm; 29 30// Temporary boolean for testing the dag combiner 31namespace llvm { 32 extern bool CombinerEnabled; 33} 34 35static bool isCommutativeBinOp(unsigned Opcode) { 36 switch (Opcode) { 37 case ISD::ADD: 38 case ISD::MUL: 39 case ISD::FADD: 40 case ISD::FMUL: 41 case ISD::AND: 42 case ISD::OR: 43 case ISD::XOR: return true; 44 default: return false; // FIXME: Need commutative info for user ops! 45 } 46} 47 48static bool isAssociativeBinOp(unsigned Opcode) { 49 switch (Opcode) { 50 case ISD::ADD: 51 case ISD::MUL: 52 case ISD::AND: 53 case ISD::OR: 54 case ISD::XOR: return true; 55 default: return false; // FIXME: Need associative info for user ops! 56 } 57} 58 59// isInvertibleForFree - Return true if there is no cost to emitting the logical 60// inverse of this node. 61static bool isInvertibleForFree(SDOperand N) { 62 if (isa<ConstantSDNode>(N.Val)) return true; 63 if (N.Val->getOpcode() == ISD::SETCC && N.Val->hasOneUse()) 64 return true; 65 return false; 66} 67 68//===----------------------------------------------------------------------===// 69// ConstantFPSDNode Class 70//===----------------------------------------------------------------------===// 71 72/// isExactlyValue - We don't rely on operator== working on double values, as 73/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 74/// As such, this method can be used to do an exact bit-for-bit comparison of 75/// two floating point values. 76bool ConstantFPSDNode::isExactlyValue(double V) const { 77 return DoubleToBits(V) == DoubleToBits(Value); 78} 79 80//===----------------------------------------------------------------------===// 81// ISD Class 82//===----------------------------------------------------------------------===// 83 84/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 85/// when given the operation for (X op Y). 86ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 87 // To perform this operation, we just need to swap the L and G bits of the 88 // operation. 89 unsigned OldL = (Operation >> 2) & 1; 90 unsigned OldG = (Operation >> 1) & 1; 91 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 92 (OldL << 1) | // New G bit 93 (OldG << 2)); // New L bit. 94} 95 96/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 97/// 'op' is a valid SetCC operation. 98ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 99 unsigned Operation = Op; 100 if (isInteger) 101 Operation ^= 7; // Flip L, G, E bits, but not U. 102 else 103 Operation ^= 15; // Flip all of the condition bits. 104 if (Operation > ISD::SETTRUE2) 105 Operation &= ~8; // Don't let N and U bits get set. 106 return ISD::CondCode(Operation); 107} 108 109 110/// isSignedOp - For an integer comparison, return 1 if the comparison is a 111/// signed operation and 2 if the result is an unsigned comparison. Return zero 112/// if the operation does not depend on the sign of the input (setne and seteq). 113static int isSignedOp(ISD::CondCode Opcode) { 114 switch (Opcode) { 115 default: assert(0 && "Illegal integer setcc operation!"); 116 case ISD::SETEQ: 117 case ISD::SETNE: return 0; 118 case ISD::SETLT: 119 case ISD::SETLE: 120 case ISD::SETGT: 121 case ISD::SETGE: return 1; 122 case ISD::SETULT: 123 case ISD::SETULE: 124 case ISD::SETUGT: 125 case ISD::SETUGE: return 2; 126 } 127} 128 129/// getSetCCOrOperation - Return the result of a logical OR between different 130/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 131/// returns SETCC_INVALID if it is not possible to represent the resultant 132/// comparison. 133ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 134 bool isInteger) { 135 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 136 // Cannot fold a signed integer setcc with an unsigned integer setcc. 137 return ISD::SETCC_INVALID; 138 139 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 140 141 // If the N and U bits get set then the resultant comparison DOES suddenly 142 // care about orderedness, and is true when ordered. 143 if (Op > ISD::SETTRUE2) 144 Op &= ~16; // Clear the N bit. 145 return ISD::CondCode(Op); 146} 147 148/// getSetCCAndOperation - Return the result of a logical AND between different 149/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 150/// function returns zero if it is not possible to represent the resultant 151/// comparison. 152ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 153 bool isInteger) { 154 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 155 // Cannot fold a signed setcc with an unsigned setcc. 156 return ISD::SETCC_INVALID; 157 158 // Combine all of the condition bits. 159 return ISD::CondCode(Op1 & Op2); 160} 161 162const TargetMachine &SelectionDAG::getTarget() const { 163 return TLI.getTargetMachine(); 164} 165 166//===----------------------------------------------------------------------===// 167// SelectionDAG Class 168//===----------------------------------------------------------------------===// 169 170/// RemoveDeadNodes - This method deletes all unreachable nodes in the 171/// SelectionDAG, including nodes (like loads) that have uses of their token 172/// chain but no other uses and no side effect. If a node is passed in as an 173/// argument, it is used as the seed for node deletion. 174void SelectionDAG::RemoveDeadNodes(SDNode *N) { 175 std::set<SDNode*> AllNodeSet(AllNodes.begin(), AllNodes.end()); 176 177 // Create a dummy node (which is not added to allnodes), that adds a reference 178 // to the root node, preventing it from being deleted. 179 SDNode *DummyNode = new SDNode(ISD::EntryToken, getRoot()); 180 181 // If we have a hint to start from, use it. 182 if (N) DeleteNodeIfDead(N, &AllNodeSet); 183 184 Restart: 185 unsigned NumNodes = AllNodeSet.size(); 186 for (std::set<SDNode*>::iterator I = AllNodeSet.begin(), E = AllNodeSet.end(); 187 I != E; ++I) { 188 // Try to delete this node. 189 DeleteNodeIfDead(*I, &AllNodeSet); 190 191 // If we actually deleted any nodes, do not use invalid iterators in 192 // AllNodeSet. 193 if (AllNodeSet.size() != NumNodes) 194 goto Restart; 195 } 196 197 // Restore AllNodes. 198 if (AllNodes.size() != NumNodes) 199 AllNodes.assign(AllNodeSet.begin(), AllNodeSet.end()); 200 201 // If the root changed (e.g. it was a dead load, update the root). 202 setRoot(DummyNode->getOperand(0)); 203 204 // Now that we are done with the dummy node, delete it. 205 DummyNode->getOperand(0).Val->removeUser(DummyNode); 206 delete DummyNode; 207} 208 209 210void SelectionDAG::DeleteNodeIfDead(SDNode *N, void *NodeSet) { 211 if (!N->use_empty()) 212 return; 213 214 // Okay, we really are going to delete this node. First take this out of the 215 // appropriate CSE map. 216 RemoveNodeFromCSEMaps(N); 217 218 // Next, brutally remove the operand list. This is safe to do, as there are 219 // no cycles in the graph. 220 while (!N->Operands.empty()) { 221 SDNode *O = N->Operands.back().Val; 222 N->Operands.pop_back(); 223 O->removeUser(N); 224 225 // Now that we removed this operand, see if there are no uses of it left. 226 DeleteNodeIfDead(O, NodeSet); 227 } 228 229 // Remove the node from the nodes set and delete it. 230 std::set<SDNode*> &AllNodeSet = *(std::set<SDNode*>*)NodeSet; 231 AllNodeSet.erase(N); 232 233 // Now that the node is gone, check to see if any of the operands of this node 234 // are dead now. 235 delete N; 236} 237 238void SelectionDAG::DeleteNode(SDNode *N) { 239 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 240 241 // First take this out of the appropriate CSE map. 242 RemoveNodeFromCSEMaps(N); 243 244 // Finally, remove uses due to operands of this node, remove from the 245 // AllNodes list, and delete the node. 246 DeleteNodeNotInCSEMaps(N); 247} 248 249void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 250 251 // Remove it from the AllNodes list. 252 for (std::vector<SDNode*>::iterator I = AllNodes.begin(); ; ++I) { 253 assert(I != AllNodes.end() && "Node not in AllNodes list??"); 254 if (*I == N) { 255 // Erase from the vector, which is not ordered. 256 std::swap(*I, AllNodes.back()); 257 AllNodes.pop_back(); 258 break; 259 } 260 } 261 262 // Drop all of the operands and decrement used nodes use counts. 263 while (!N->Operands.empty()) { 264 SDNode *O = N->Operands.back().Val; 265 N->Operands.pop_back(); 266 O->removeUser(N); 267 } 268 269 delete N; 270} 271 272/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 273/// correspond to it. This is useful when we're about to delete or repurpose 274/// the node. We don't want future request for structurally identical nodes 275/// to return N anymore. 276void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 277 bool Erased = false; 278 switch (N->getOpcode()) { 279 case ISD::Constant: 280 Erased = Constants.erase(std::make_pair(cast<ConstantSDNode>(N)->getValue(), 281 N->getValueType(0))); 282 break; 283 case ISD::TargetConstant: 284 Erased = TargetConstants.erase(std::make_pair( 285 cast<ConstantSDNode>(N)->getValue(), 286 N->getValueType(0))); 287 break; 288 case ISD::ConstantFP: { 289 uint64_t V = DoubleToBits(cast<ConstantFPSDNode>(N)->getValue()); 290 Erased = ConstantFPs.erase(std::make_pair(V, N->getValueType(0))); 291 break; 292 } 293 case ISD::CONDCODE: 294 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 295 "Cond code doesn't exist!"); 296 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 297 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 298 break; 299 case ISD::GlobalAddress: 300 Erased = GlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal()); 301 break; 302 case ISD::TargetGlobalAddress: 303 Erased =TargetGlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal()); 304 break; 305 case ISD::FrameIndex: 306 Erased = FrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex()); 307 break; 308 case ISD::TargetFrameIndex: 309 Erased = TargetFrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex()); 310 break; 311 case ISD::ConstantPool: 312 Erased = ConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->get()); 313 break; 314 case ISD::TargetConstantPool: 315 Erased =TargetConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->get()); 316 break; 317 case ISD::BasicBlock: 318 Erased = BBNodes.erase(cast<BasicBlockSDNode>(N)->getBasicBlock()); 319 break; 320 case ISD::ExternalSymbol: 321 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 322 break; 323 case ISD::VALUETYPE: 324 Erased = ValueTypeNodes[cast<VTSDNode>(N)->getVT()] != 0; 325 ValueTypeNodes[cast<VTSDNode>(N)->getVT()] = 0; 326 break; 327 case ISD::Register: 328 Erased = RegNodes.erase(std::make_pair(cast<RegisterSDNode>(N)->getReg(), 329 N->getValueType(0))); 330 break; 331 case ISD::SRCVALUE: { 332 SrcValueSDNode *SVN = cast<SrcValueSDNode>(N); 333 Erased =ValueNodes.erase(std::make_pair(SVN->getValue(), SVN->getOffset())); 334 break; 335 } 336 case ISD::LOAD: 337 Erased = Loads.erase(std::make_pair(N->getOperand(1), 338 std::make_pair(N->getOperand(0), 339 N->getValueType(0)))); 340 break; 341 default: 342 if (N->getNumValues() == 1) { 343 if (N->getNumOperands() == 0) { 344 Erased = NullaryOps.erase(std::make_pair(N->getOpcode(), 345 N->getValueType(0))); 346 } else if (N->getNumOperands() == 1) { 347 Erased = 348 UnaryOps.erase(std::make_pair(N->getOpcode(), 349 std::make_pair(N->getOperand(0), 350 N->getValueType(0)))); 351 } else if (N->getNumOperands() == 2) { 352 Erased = 353 BinaryOps.erase(std::make_pair(N->getOpcode(), 354 std::make_pair(N->getOperand(0), 355 N->getOperand(1)))); 356 } else { 357 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 358 Erased = 359 OneResultNodes.erase(std::make_pair(N->getOpcode(), 360 std::make_pair(N->getValueType(0), 361 Ops))); 362 } 363 } else { 364 // Remove the node from the ArbitraryNodes map. 365 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end()); 366 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 367 Erased = 368 ArbitraryNodes.erase(std::make_pair(N->getOpcode(), 369 std::make_pair(RV, Ops))); 370 } 371 break; 372 } 373#ifndef NDEBUG 374 // Verify that the node was actually in one of the CSE maps, unless it has a 375 // flag result (which cannot be CSE'd) or is one of the special cases that are 376 // not subject to CSE. 377 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 378 N->getOpcode() != ISD::CALL && N->getOpcode() != ISD::CALLSEQ_START && 379 N->getOpcode() != ISD::CALLSEQ_END && !N->isTargetOpcode()) { 380 381 N->dump(); 382 assert(0 && "Node is not in map!"); 383 } 384#endif 385} 386 387/// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It 388/// has been taken out and modified in some way. If the specified node already 389/// exists in the CSE maps, do not modify the maps, but return the existing node 390/// instead. If it doesn't exist, add it and return null. 391/// 392SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) { 393 assert(N->getNumOperands() && "This is a leaf node!"); 394 if (N->getOpcode() == ISD::LOAD) { 395 SDNode *&L = Loads[std::make_pair(N->getOperand(1), 396 std::make_pair(N->getOperand(0), 397 N->getValueType(0)))]; 398 if (L) return L; 399 L = N; 400 } else if (N->getNumOperands() == 1) { 401 SDNode *&U = UnaryOps[std::make_pair(N->getOpcode(), 402 std::make_pair(N->getOperand(0), 403 N->getValueType(0)))]; 404 if (U) return U; 405 U = N; 406 } else if (N->getNumOperands() == 2) { 407 SDNode *&B = BinaryOps[std::make_pair(N->getOpcode(), 408 std::make_pair(N->getOperand(0), 409 N->getOperand(1)))]; 410 if (B) return B; 411 B = N; 412 } else if (N->getNumValues() == 1) { 413 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 414 SDNode *&ORN = OneResultNodes[std::make_pair(N->getOpcode(), 415 std::make_pair(N->getValueType(0), Ops))]; 416 if (ORN) return ORN; 417 ORN = N; 418 } else { 419 // Remove the node from the ArbitraryNodes map. 420 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end()); 421 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 422 SDNode *&AN = ArbitraryNodes[std::make_pair(N->getOpcode(), 423 std::make_pair(RV, Ops))]; 424 if (AN) return AN; 425 AN = N; 426 } 427 return 0; 428 429} 430 431 432 433SelectionDAG::~SelectionDAG() { 434 for (unsigned i = 0, e = AllNodes.size(); i != e; ++i) 435 delete AllNodes[i]; 436} 437 438SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) { 439 if (Op.getValueType() == VT) return Op; 440 int64_t Imm = ~0ULL >> (64-MVT::getSizeInBits(VT)); 441 return getNode(ISD::AND, Op.getValueType(), Op, 442 getConstant(Imm, Op.getValueType())); 443} 444 445SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT) { 446 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!"); 447 // Mask out any bits that are not valid for this constant. 448 if (VT != MVT::i64) 449 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1; 450 451 SDNode *&N = Constants[std::make_pair(Val, VT)]; 452 if (N) return SDOperand(N, 0); 453 N = new ConstantSDNode(false, Val, VT); 454 AllNodes.push_back(N); 455 return SDOperand(N, 0); 456} 457 458SDOperand SelectionDAG::getTargetConstant(uint64_t Val, MVT::ValueType VT) { 459 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!"); 460 // Mask out any bits that are not valid for this constant. 461 if (VT != MVT::i64) 462 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1; 463 464 SDNode *&N = TargetConstants[std::make_pair(Val, VT)]; 465 if (N) return SDOperand(N, 0); 466 N = new ConstantSDNode(true, Val, VT); 467 AllNodes.push_back(N); 468 return SDOperand(N, 0); 469} 470 471SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT) { 472 assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!"); 473 if (VT == MVT::f32) 474 Val = (float)Val; // Mask out extra precision. 475 476 // Do the map lookup using the actual bit pattern for the floating point 477 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 478 // we don't have issues with SNANs. 479 SDNode *&N = ConstantFPs[std::make_pair(DoubleToBits(Val), VT)]; 480 if (N) return SDOperand(N, 0); 481 N = new ConstantFPSDNode(Val, VT); 482 AllNodes.push_back(N); 483 return SDOperand(N, 0); 484} 485 486 487 488SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV, 489 MVT::ValueType VT) { 490 SDNode *&N = GlobalValues[GV]; 491 if (N) return SDOperand(N, 0); 492 N = new GlobalAddressSDNode(false, GV, VT); 493 AllNodes.push_back(N); 494 return SDOperand(N, 0); 495} 496 497SDOperand SelectionDAG::getTargetGlobalAddress(const GlobalValue *GV, 498 MVT::ValueType VT) { 499 SDNode *&N = TargetGlobalValues[GV]; 500 if (N) return SDOperand(N, 0); 501 N = new GlobalAddressSDNode(true, GV, VT); 502 AllNodes.push_back(N); 503 return SDOperand(N, 0); 504} 505 506SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT) { 507 SDNode *&N = FrameIndices[FI]; 508 if (N) return SDOperand(N, 0); 509 N = new FrameIndexSDNode(FI, VT, false); 510 AllNodes.push_back(N); 511 return SDOperand(N, 0); 512} 513 514SDOperand SelectionDAG::getTargetFrameIndex(int FI, MVT::ValueType VT) { 515 SDNode *&N = TargetFrameIndices[FI]; 516 if (N) return SDOperand(N, 0); 517 N = new FrameIndexSDNode(FI, VT, true); 518 AllNodes.push_back(N); 519 return SDOperand(N, 0); 520} 521 522SDOperand SelectionDAG::getConstantPool(Constant *C, MVT::ValueType VT) { 523 SDNode *&N = ConstantPoolIndices[C]; 524 if (N) return SDOperand(N, 0); 525 N = new ConstantPoolSDNode(C, VT, false); 526 AllNodes.push_back(N); 527 return SDOperand(N, 0); 528} 529 530SDOperand SelectionDAG::getTargetConstantPool(Constant *C, MVT::ValueType VT) { 531 SDNode *&N = TargetConstantPoolIndices[C]; 532 if (N) return SDOperand(N, 0); 533 N = new ConstantPoolSDNode(C, VT, true); 534 AllNodes.push_back(N); 535 return SDOperand(N, 0); 536} 537 538SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 539 SDNode *&N = BBNodes[MBB]; 540 if (N) return SDOperand(N, 0); 541 N = new BasicBlockSDNode(MBB); 542 AllNodes.push_back(N); 543 return SDOperand(N, 0); 544} 545 546SDOperand SelectionDAG::getValueType(MVT::ValueType VT) { 547 if ((unsigned)VT >= ValueTypeNodes.size()) 548 ValueTypeNodes.resize(VT+1); 549 if (ValueTypeNodes[VT] == 0) { 550 ValueTypeNodes[VT] = new VTSDNode(VT); 551 AllNodes.push_back(ValueTypeNodes[VT]); 552 } 553 554 return SDOperand(ValueTypeNodes[VT], 0); 555} 556 557SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) { 558 SDNode *&N = ExternalSymbols[Sym]; 559 if (N) return SDOperand(N, 0); 560 N = new ExternalSymbolSDNode(Sym, VT); 561 AllNodes.push_back(N); 562 return SDOperand(N, 0); 563} 564 565SDOperand SelectionDAG::getCondCode(ISD::CondCode Cond) { 566 if ((unsigned)Cond >= CondCodeNodes.size()) 567 CondCodeNodes.resize(Cond+1); 568 569 if (CondCodeNodes[Cond] == 0) { 570 CondCodeNodes[Cond] = new CondCodeSDNode(Cond); 571 AllNodes.push_back(CondCodeNodes[Cond]); 572 } 573 return SDOperand(CondCodeNodes[Cond], 0); 574} 575 576SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT::ValueType VT) { 577 RegisterSDNode *&Reg = RegNodes[std::make_pair(RegNo, VT)]; 578 if (!Reg) { 579 Reg = new RegisterSDNode(RegNo, VT); 580 AllNodes.push_back(Reg); 581 } 582 return SDOperand(Reg, 0); 583} 584 585/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 586/// this predicate to simplify operations downstream. V and Mask are known to 587/// be the same type. 588static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask, 589 const TargetLowering &TLI) { 590 unsigned SrcBits; 591 if (Mask == 0) return true; 592 593 // If we know the result of a setcc has the top bits zero, use this info. 594 switch (Op.getOpcode()) { 595 case ISD::Constant: 596 return (cast<ConstantSDNode>(Op)->getValue() & Mask) == 0; 597 598 case ISD::SETCC: 599 return ((Mask & 1) == 0) && 600 TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult; 601 602 case ISD::ZEXTLOAD: 603 SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(3))->getVT()); 604 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits. 605 case ISD::ZERO_EXTEND: 606 SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType()); 607 return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI); 608 case ISD::AssertZext: 609 SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT()); 610 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits. 611 case ISD::AND: 612 // (X & C1) & C2 == 0 iff C1 & C2 == 0. 613 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 614 return MaskedValueIsZero(Op.getOperand(0),AndRHS->getValue() & Mask, TLI); 615 616 // FALL THROUGH 617 case ISD::OR: 618 case ISD::XOR: 619 return MaskedValueIsZero(Op.getOperand(0), Mask, TLI) && 620 MaskedValueIsZero(Op.getOperand(1), Mask, TLI); 621 case ISD::SELECT: 622 return MaskedValueIsZero(Op.getOperand(1), Mask, TLI) && 623 MaskedValueIsZero(Op.getOperand(2), Mask, TLI); 624 case ISD::SELECT_CC: 625 return MaskedValueIsZero(Op.getOperand(2), Mask, TLI) && 626 MaskedValueIsZero(Op.getOperand(3), Mask, TLI); 627 case ISD::SRL: 628 // (ushr X, C1) & C2 == 0 iff X & (C2 << C1) == 0 629 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 630 uint64_t NewVal = Mask << ShAmt->getValue(); 631 SrcBits = MVT::getSizeInBits(Op.getValueType()); 632 if (SrcBits != 64) NewVal &= (1ULL << SrcBits)-1; 633 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI); 634 } 635 return false; 636 case ISD::SHL: 637 // (ushl X, C1) & C2 == 0 iff X & (C2 >> C1) == 0 638 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 639 uint64_t NewVal = Mask >> ShAmt->getValue(); 640 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI); 641 } 642 return false; 643 case ISD::CTTZ: 644 case ISD::CTLZ: 645 case ISD::CTPOP: 646 // Bit counting instructions can not set the high bits of the result 647 // register. The max number of bits sets depends on the input. 648 return (Mask & (MVT::getSizeInBits(Op.getValueType())*2-1)) == 0; 649 650 // TODO we could handle some SRA cases here. 651 default: break; 652 } 653 654 return false; 655} 656 657 658 659SDOperand SelectionDAG::SimplifySetCC(MVT::ValueType VT, SDOperand N1, 660 SDOperand N2, ISD::CondCode Cond) { 661 // These setcc operations always fold. 662 switch (Cond) { 663 default: break; 664 case ISD::SETFALSE: 665 case ISD::SETFALSE2: return getConstant(0, VT); 666 case ISD::SETTRUE: 667 case ISD::SETTRUE2: return getConstant(1, VT); 668 } 669 670 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) { 671 uint64_t C2 = N2C->getValue(); 672 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 673 uint64_t C1 = N1C->getValue(); 674 675 // Sign extend the operands if required 676 if (ISD::isSignedIntSetCC(Cond)) { 677 C1 = N1C->getSignExtended(); 678 C2 = N2C->getSignExtended(); 679 } 680 681 switch (Cond) { 682 default: assert(0 && "Unknown integer setcc!"); 683 case ISD::SETEQ: return getConstant(C1 == C2, VT); 684 case ISD::SETNE: return getConstant(C1 != C2, VT); 685 case ISD::SETULT: return getConstant(C1 < C2, VT); 686 case ISD::SETUGT: return getConstant(C1 > C2, VT); 687 case ISD::SETULE: return getConstant(C1 <= C2, VT); 688 case ISD::SETUGE: return getConstant(C1 >= C2, VT); 689 case ISD::SETLT: return getConstant((int64_t)C1 < (int64_t)C2, VT); 690 case ISD::SETGT: return getConstant((int64_t)C1 > (int64_t)C2, VT); 691 case ISD::SETLE: return getConstant((int64_t)C1 <= (int64_t)C2, VT); 692 case ISD::SETGE: return getConstant((int64_t)C1 >= (int64_t)C2, VT); 693 } 694 } else { 695 // If the LHS is a ZERO_EXTEND, perform the comparison on the input. 696 if (N1.getOpcode() == ISD::ZERO_EXTEND) { 697 unsigned InSize = MVT::getSizeInBits(N1.getOperand(0).getValueType()); 698 699 // If the comparison constant has bits in the upper part, the 700 // zero-extended value could never match. 701 if (C2 & (~0ULL << InSize)) { 702 unsigned VSize = MVT::getSizeInBits(N1.getValueType()); 703 switch (Cond) { 704 case ISD::SETUGT: 705 case ISD::SETUGE: 706 case ISD::SETEQ: return getConstant(0, VT); 707 case ISD::SETULT: 708 case ISD::SETULE: 709 case ISD::SETNE: return getConstant(1, VT); 710 case ISD::SETGT: 711 case ISD::SETGE: 712 // True if the sign bit of C2 is set. 713 return getConstant((C2 & (1ULL << VSize)) != 0, VT); 714 case ISD::SETLT: 715 case ISD::SETLE: 716 // True if the sign bit of C2 isn't set. 717 return getConstant((C2 & (1ULL << VSize)) == 0, VT); 718 default: 719 break; 720 } 721 } 722 723 // Otherwise, we can perform the comparison with the low bits. 724 switch (Cond) { 725 case ISD::SETEQ: 726 case ISD::SETNE: 727 case ISD::SETUGT: 728 case ISD::SETUGE: 729 case ISD::SETULT: 730 case ISD::SETULE: 731 return getSetCC(VT, N1.getOperand(0), 732 getConstant(C2, N1.getOperand(0).getValueType()), 733 Cond); 734 default: 735 break; // todo, be more careful with signed comparisons 736 } 737 } else if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG && 738 (Cond == ISD::SETEQ || Cond == ISD::SETNE)) { 739 MVT::ValueType ExtSrcTy = cast<VTSDNode>(N1.getOperand(1))->getVT(); 740 unsigned ExtSrcTyBits = MVT::getSizeInBits(ExtSrcTy); 741 MVT::ValueType ExtDstTy = N1.getValueType(); 742 unsigned ExtDstTyBits = MVT::getSizeInBits(ExtDstTy); 743 744 // If the extended part has any inconsistent bits, it cannot ever 745 // compare equal. In other words, they have to be all ones or all 746 // zeros. 747 uint64_t ExtBits = 748 (~0ULL >> (64-ExtSrcTyBits)) & (~0ULL << (ExtDstTyBits-1)); 749 if ((C2 & ExtBits) != 0 && (C2 & ExtBits) != ExtBits) 750 return getConstant(Cond == ISD::SETNE, VT); 751 752 // Otherwise, make this a use of a zext. 753 return getSetCC(VT, getZeroExtendInReg(N1.getOperand(0), ExtSrcTy), 754 getConstant(C2 & (~0ULL>>(64-ExtSrcTyBits)), ExtDstTy), 755 Cond); 756 } 757 758 uint64_t MinVal, MaxVal; 759 unsigned OperandBitSize = MVT::getSizeInBits(N2C->getValueType(0)); 760 if (ISD::isSignedIntSetCC(Cond)) { 761 MinVal = 1ULL << (OperandBitSize-1); 762 if (OperandBitSize != 1) // Avoid X >> 64, which is undefined. 763 MaxVal = ~0ULL >> (65-OperandBitSize); 764 else 765 MaxVal = 0; 766 } else { 767 MinVal = 0; 768 MaxVal = ~0ULL >> (64-OperandBitSize); 769 } 770 771 // Canonicalize GE/LE comparisons to use GT/LT comparisons. 772 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) { 773 if (C2 == MinVal) return getConstant(1, VT); // X >= MIN --> true 774 --C2; // X >= C1 --> X > (C1-1) 775 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()), 776 (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT); 777 } 778 779 if (Cond == ISD::SETLE || Cond == ISD::SETULE) { 780 if (C2 == MaxVal) return getConstant(1, VT); // X <= MAX --> true 781 ++C2; // X <= C1 --> X < (C1+1) 782 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()), 783 (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT); 784 } 785 786 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal) 787 return getConstant(0, VT); // X < MIN --> false 788 789 // Canonicalize setgt X, Min --> setne X, Min 790 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MinVal) 791 return getSetCC(VT, N1, N2, ISD::SETNE); 792 793 // If we have setult X, 1, turn it into seteq X, 0 794 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal+1) 795 return getSetCC(VT, N1, getConstant(MinVal, N1.getValueType()), 796 ISD::SETEQ); 797 // If we have setugt X, Max-1, turn it into seteq X, Max 798 else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MaxVal-1) 799 return getSetCC(VT, N1, getConstant(MaxVal, N1.getValueType()), 800 ISD::SETEQ); 801 802 // If we have "setcc X, C1", check to see if we can shrink the immediate 803 // by changing cc. 804 805 // SETUGT X, SINTMAX -> SETLT X, 0 806 if (Cond == ISD::SETUGT && OperandBitSize != 1 && 807 C2 == (~0ULL >> (65-OperandBitSize))) 808 return getSetCC(VT, N1, getConstant(0, N2.getValueType()), ISD::SETLT); 809 810 // FIXME: Implement the rest of these. 811 812 813 // Fold bit comparisons when we can. 814 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && 815 VT == N1.getValueType() && N1.getOpcode() == ISD::AND) 816 if (ConstantSDNode *AndRHS = 817 dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 818 if (Cond == ISD::SETNE && C2 == 0) {// (X & 8) != 0 --> (X & 8) >> 3 819 // Perform the xform if the AND RHS is a single bit. 820 if ((AndRHS->getValue() & (AndRHS->getValue()-1)) == 0) { 821 return getNode(ISD::SRL, VT, N1, 822 getConstant(Log2_64(AndRHS->getValue()), 823 TLI.getShiftAmountTy())); 824 } 825 } else if (Cond == ISD::SETEQ && C2 == AndRHS->getValue()) { 826 // (X & 8) == 8 --> (X & 8) >> 3 827 // Perform the xform if C2 is a single bit. 828 if ((C2 & (C2-1)) == 0) { 829 return getNode(ISD::SRL, VT, N1, 830 getConstant(Log2_64(C2),TLI.getShiftAmountTy())); 831 } 832 } 833 } 834 } 835 } else if (isa<ConstantSDNode>(N1.Val)) { 836 // Ensure that the constant occurs on the RHS. 837 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 838 } 839 840 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) 841 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) { 842 double C1 = N1C->getValue(), C2 = N2C->getValue(); 843 844 switch (Cond) { 845 default: break; // FIXME: Implement the rest of these! 846 case ISD::SETEQ: return getConstant(C1 == C2, VT); 847 case ISD::SETNE: return getConstant(C1 != C2, VT); 848 case ISD::SETLT: return getConstant(C1 < C2, VT); 849 case ISD::SETGT: return getConstant(C1 > C2, VT); 850 case ISD::SETLE: return getConstant(C1 <= C2, VT); 851 case ISD::SETGE: return getConstant(C1 >= C2, VT); 852 } 853 } else { 854 // Ensure that the constant occurs on the RHS. 855 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 856 } 857 858 if (N1 == N2) { 859 // We can always fold X == Y for integer setcc's. 860 if (MVT::isInteger(N1.getValueType())) 861 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 862 unsigned UOF = ISD::getUnorderedFlavor(Cond); 863 if (UOF == 2) // FP operators that are undefined on NaNs. 864 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 865 if (UOF == unsigned(ISD::isTrueWhenEqual(Cond))) 866 return getConstant(UOF, VT); 867 // Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO 868 // if it is not already. 869 ISD::CondCode NewCond = UOF == 0 ? ISD::SETUO : ISD::SETO; 870 if (NewCond != Cond) 871 return getSetCC(VT, N1, N2, NewCond); 872 } 873 874 if (Cond == ISD::SETEQ || Cond == ISD::SETNE) { 875 if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB || 876 N1.getOpcode() == ISD::XOR) { 877 // Simplify (X+Y) == (X+Z) --> Y == Z 878 if (N1.getOpcode() == N2.getOpcode()) { 879 if (N1.getOperand(0) == N2.getOperand(0)) 880 return getSetCC(VT, N1.getOperand(1), N2.getOperand(1), Cond); 881 if (N1.getOperand(1) == N2.getOperand(1)) 882 return getSetCC(VT, N1.getOperand(0), N2.getOperand(0), Cond); 883 if (isCommutativeBinOp(N1.getOpcode())) { 884 // If X op Y == Y op X, try other combinations. 885 if (N1.getOperand(0) == N2.getOperand(1)) 886 return getSetCC(VT, N1.getOperand(1), N2.getOperand(0), Cond); 887 if (N1.getOperand(1) == N2.getOperand(0)) 888 return getSetCC(VT, N1.getOperand(1), N2.getOperand(1), Cond); 889 } 890 } 891 892 // FIXME: move this stuff to the DAG Combiner when it exists! 893 894 // Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0. Common for condcodes. 895 if (N1.getOpcode() == ISD::XOR) 896 if (ConstantSDNode *XORC = dyn_cast<ConstantSDNode>(N1.getOperand(1))) 897 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(N2)) { 898 // If we know that all of the inverted bits are zero, don't bother 899 // performing the inversion. 900 if (MaskedValueIsZero(N1.getOperand(0), ~XORC->getValue(), TLI)) 901 return getSetCC(VT, N1.getOperand(0), 902 getConstant(XORC->getValue()^RHSC->getValue(), 903 N1.getValueType()), Cond); 904 } 905 906 // Simplify (X+Z) == X --> Z == 0 907 if (N1.getOperand(0) == N2) 908 return getSetCC(VT, N1.getOperand(1), 909 getConstant(0, N1.getValueType()), Cond); 910 if (N1.getOperand(1) == N2) { 911 if (isCommutativeBinOp(N1.getOpcode())) 912 return getSetCC(VT, N1.getOperand(0), 913 getConstant(0, N1.getValueType()), Cond); 914 else { 915 assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!"); 916 // (Z-X) == X --> Z == X<<1 917 return getSetCC(VT, N1.getOperand(0), 918 getNode(ISD::SHL, N2.getValueType(), 919 N2, getConstant(1, TLI.getShiftAmountTy())), 920 Cond); 921 } 922 } 923 } 924 925 if (N2.getOpcode() == ISD::ADD || N2.getOpcode() == ISD::SUB || 926 N2.getOpcode() == ISD::XOR) { 927 // Simplify X == (X+Z) --> Z == 0 928 if (N2.getOperand(0) == N1) { 929 return getSetCC(VT, N2.getOperand(1), 930 getConstant(0, N2.getValueType()), Cond); 931 } else if (N2.getOperand(1) == N1) { 932 if (isCommutativeBinOp(N2.getOpcode())) { 933 return getSetCC(VT, N2.getOperand(0), 934 getConstant(0, N2.getValueType()), Cond); 935 } else { 936 assert(N2.getOpcode() == ISD::SUB && "Unexpected operation!"); 937 // X == (Z-X) --> X<<1 == Z 938 return getSetCC(VT, getNode(ISD::SHL, N2.getValueType(), N1, 939 getConstant(1, TLI.getShiftAmountTy())), 940 N2.getOperand(0), Cond); 941 } 942 } 943 } 944 } 945 946 // Fold away ALL boolean setcc's. 947 if (N1.getValueType() == MVT::i1) { 948 switch (Cond) { 949 default: assert(0 && "Unknown integer setcc!"); 950 case ISD::SETEQ: // X == Y -> (X^Y)^1 951 N1 = getNode(ISD::XOR, MVT::i1, 952 getNode(ISD::XOR, MVT::i1, N1, N2), 953 getConstant(1, MVT::i1)); 954 break; 955 case ISD::SETNE: // X != Y --> (X^Y) 956 N1 = getNode(ISD::XOR, MVT::i1, N1, N2); 957 break; 958 case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> X^1 & Y 959 case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> X^1 & Y 960 N1 = getNode(ISD::AND, MVT::i1, N2, 961 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1))); 962 break; 963 case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> Y^1 & X 964 case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> Y^1 & X 965 N1 = getNode(ISD::AND, MVT::i1, N1, 966 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1))); 967 break; 968 case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> X^1 | Y 969 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> X^1 | Y 970 N1 = getNode(ISD::OR, MVT::i1, N2, 971 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1))); 972 break; 973 case ISD::SETUGE: // X >=u Y --> X == 1 | Y == 0 --> Y^1 | X 974 case ISD::SETLE: // X <=s Y --> X == 1 | Y == 0 --> Y^1 | X 975 N1 = getNode(ISD::OR, MVT::i1, N1, 976 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1))); 977 break; 978 } 979 if (VT != MVT::i1) 980 N1 = getNode(ISD::ZERO_EXTEND, VT, N1); 981 return N1; 982 } 983 984 // Could not fold it. 985 return SDOperand(); 986} 987 988SDOperand SelectionDAG::SimplifySelectCC(SDOperand N1, SDOperand N2, 989 SDOperand N3, SDOperand N4, 990 ISD::CondCode CC) { 991 MVT::ValueType VT = N3.getValueType(); 992 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 993 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 994 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val); 995 ConstantSDNode *N4C = dyn_cast<ConstantSDNode>(N4.Val); 996 997 // Check to see if we can simplify the select into an fabs node 998 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) { 999 // Allow either -0.0 or 0.0 1000 if (CFP->getValue() == 0.0) { 1001 // select (setg[te] X, +/-0.0), X, fneg(X) -> fabs 1002 if ((CC == ISD::SETGE || CC == ISD::SETGT) && 1003 N1 == N3 && N4.getOpcode() == ISD::FNEG && 1004 N1 == N4.getOperand(0)) 1005 return getNode(ISD::FABS, VT, N1); 1006 1007 // select (setl[te] X, +/-0.0), fneg(X), X -> fabs 1008 if ((CC == ISD::SETLT || CC == ISD::SETLE) && 1009 N1 == N4 && N3.getOpcode() == ISD::FNEG && 1010 N3.getOperand(0) == N4) 1011 return getNode(ISD::FABS, VT, N4); 1012 } 1013 } 1014 1015 // check to see if we're select_cc'ing a select_cc. 1016 // this allows us to turn: 1017 // select_cc set[eq,ne] (select_cc cc, lhs, rhs, 1, 0), 0, true, false -> 1018 // select_cc cc, lhs, rhs, true, false 1019 if ((N1C && N1C->isNullValue() && N2.getOpcode() == ISD::SELECT_CC) || 1020 (N2C && N2C->isNullValue() && N1.getOpcode() == ISD::SELECT_CC) && 1021 (CC == ISD::SETEQ || CC == ISD::SETNE)) { 1022 SDOperand SCC = N1C ? N2 : N1; 1023 ConstantSDNode *SCCT = dyn_cast<ConstantSDNode>(SCC.getOperand(2)); 1024 ConstantSDNode *SCCF = dyn_cast<ConstantSDNode>(SCC.getOperand(3)); 1025 if (SCCT && SCCF && SCCF->isNullValue() && SCCT->getValue() == 1ULL) { 1026 if (CC == ISD::SETEQ) std::swap(N3, N4); 1027 return getNode(ISD::SELECT_CC, N3.getValueType(), SCC.getOperand(0), 1028 SCC.getOperand(1), N3, N4, SCC.getOperand(4)); 1029 } 1030 } 1031 1032 // Check to see if we can perform the "gzip trick", transforming 1033 // select_cc setlt X, 0, A, 0 -> and (sra X, size(X)-1), A 1034 if (N2C && N2C->isNullValue() && N4C && N4C->isNullValue() && 1035 MVT::isInteger(N1.getValueType()) && 1036 MVT::isInteger(N3.getValueType()) && CC == ISD::SETLT) { 1037 MVT::ValueType XType = N1.getValueType(); 1038 MVT::ValueType AType = N3.getValueType(); 1039 if (XType >= AType) { 1040 // and (sra X, size(X)-1, A) -> "and (srl X, C2), A" iff A is a 1041 // single-bit constant. FIXME: remove once the dag combiner 1042 // exists. 1043 if (N3C && ((N3C->getValue() & (N3C->getValue()-1)) == 0)) { 1044 unsigned ShCtV = Log2_64(N3C->getValue()); 1045 ShCtV = MVT::getSizeInBits(XType)-ShCtV-1; 1046 SDOperand ShCt = getConstant(ShCtV, TLI.getShiftAmountTy()); 1047 SDOperand Shift = getNode(ISD::SRL, XType, N1, ShCt); 1048 if (XType > AType) 1049 Shift = getNode(ISD::TRUNCATE, AType, Shift); 1050 return getNode(ISD::AND, AType, Shift, N3); 1051 } 1052 SDOperand Shift = getNode(ISD::SRA, XType, N1, 1053 getConstant(MVT::getSizeInBits(XType)-1, 1054 TLI.getShiftAmountTy())); 1055 if (XType > AType) 1056 Shift = getNode(ISD::TRUNCATE, AType, Shift); 1057 return getNode(ISD::AND, AType, Shift, N3); 1058 } 1059 } 1060 1061 // Check to see if this is the equivalent of setcc 1062 if (N4C && N4C->isNullValue() && N3C && (N3C->getValue() == 1ULL)) { 1063 MVT::ValueType XType = N1.getValueType(); 1064 if (TLI.isOperationLegal(ISD::SETCC, TLI.getSetCCResultTy())) { 1065 SDOperand Res = getSetCC(TLI.getSetCCResultTy(), N1, N2, CC); 1066 if (Res.getValueType() != VT) 1067 Res = getNode(ISD::ZERO_EXTEND, VT, Res); 1068 return Res; 1069 } 1070 1071 // seteq X, 0 -> srl (ctlz X, log2(size(X))) 1072 if (N2C && N2C->isNullValue() && CC == ISD::SETEQ && 1073 TLI.isOperationLegal(ISD::CTLZ, XType)) { 1074 SDOperand Ctlz = getNode(ISD::CTLZ, XType, N1); 1075 return getNode(ISD::SRL, XType, Ctlz, 1076 getConstant(Log2_32(MVT::getSizeInBits(XType)), 1077 TLI.getShiftAmountTy())); 1078 } 1079 // setgt X, 0 -> srl (and (-X, ~X), size(X)-1) 1080 if (N2C && N2C->isNullValue() && CC == ISD::SETGT) { 1081 SDOperand NegN1 = getNode(ISD::SUB, XType, getConstant(0, XType), N1); 1082 SDOperand NotN1 = getNode(ISD::XOR, XType, N1, getConstant(~0ULL, XType)); 1083 return getNode(ISD::SRL, XType, getNode(ISD::AND, XType, NegN1, NotN1), 1084 getConstant(MVT::getSizeInBits(XType)-1, 1085 TLI.getShiftAmountTy())); 1086 } 1087 // setgt X, -1 -> xor (srl (X, size(X)-1), 1) 1088 if (N2C && N2C->isAllOnesValue() && CC == ISD::SETGT) { 1089 SDOperand Sign = getNode(ISD::SRL, XType, N1, 1090 getConstant(MVT::getSizeInBits(XType)-1, 1091 TLI.getShiftAmountTy())); 1092 return getNode(ISD::XOR, XType, Sign, getConstant(1, XType)); 1093 } 1094 } 1095 1096 // Check to see if this is an integer abs. select_cc setl[te] X, 0, -X, X -> 1097 // Y = sra (X, size(X)-1); xor (add (X, Y), Y) 1098 if (N2C && N2C->isNullValue() && (CC == ISD::SETLT || CC == ISD::SETLE) && 1099 N1 == N4 && N3.getOpcode() == ISD::SUB && N1 == N3.getOperand(1)) { 1100 if (ConstantSDNode *SubC = dyn_cast<ConstantSDNode>(N3.getOperand(0))) { 1101 MVT::ValueType XType = N1.getValueType(); 1102 if (SubC->isNullValue() && MVT::isInteger(XType)) { 1103 SDOperand Shift = getNode(ISD::SRA, XType, N1, 1104 getConstant(MVT::getSizeInBits(XType)-1, 1105 TLI.getShiftAmountTy())); 1106 return getNode(ISD::XOR, XType, getNode(ISD::ADD, XType, N1, Shift), 1107 Shift); 1108 } 1109 } 1110 } 1111 1112 // Could not fold it. 1113 return SDOperand(); 1114} 1115 1116/// getNode - Gets or creates the specified node. 1117/// 1118SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) { 1119 SDNode *&N = NullaryOps[std::make_pair(Opcode, VT)]; 1120 if (!N) { 1121 N = new SDNode(Opcode, VT); 1122 AllNodes.push_back(N); 1123 } 1124 return SDOperand(N, 0); 1125} 1126 1127SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1128 SDOperand Operand) { 1129 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) { 1130 uint64_t Val = C->getValue(); 1131 switch (Opcode) { 1132 default: break; 1133 case ISD::SIGN_EXTEND: return getConstant(C->getSignExtended(), VT); 1134 case ISD::ANY_EXTEND: 1135 case ISD::ZERO_EXTEND: return getConstant(Val, VT); 1136 case ISD::TRUNCATE: return getConstant(Val, VT); 1137 case ISD::SINT_TO_FP: return getConstantFP(C->getSignExtended(), VT); 1138 case ISD::UINT_TO_FP: return getConstantFP(C->getValue(), VT); 1139 } 1140 } 1141 1142 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val)) 1143 switch (Opcode) { 1144 case ISD::FNEG: 1145 return getConstantFP(-C->getValue(), VT); 1146 case ISD::FP_ROUND: 1147 case ISD::FP_EXTEND: 1148 return getConstantFP(C->getValue(), VT); 1149 case ISD::FP_TO_SINT: 1150 return getConstant((int64_t)C->getValue(), VT); 1151 case ISD::FP_TO_UINT: 1152 return getConstant((uint64_t)C->getValue(), VT); 1153 } 1154 1155 unsigned OpOpcode = Operand.Val->getOpcode(); 1156 switch (Opcode) { 1157 case ISD::TokenFactor: 1158 return Operand; // Factor of one node? No factor. 1159 case ISD::SIGN_EXTEND: 1160 if (Operand.getValueType() == VT) return Operand; // noop extension 1161 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 1162 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 1163 break; 1164 case ISD::ZERO_EXTEND: 1165 if (Operand.getValueType() == VT) return Operand; // noop extension 1166 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 1167 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0)); 1168 break; 1169 case ISD::ANY_EXTEND: 1170 if (Operand.getValueType() == VT) return Operand; // noop extension 1171 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 1172 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 1173 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 1174 break; 1175 case ISD::TRUNCATE: 1176 if (Operand.getValueType() == VT) return Operand; // noop truncate 1177 if (OpOpcode == ISD::TRUNCATE) 1178 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 1179 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 1180 OpOpcode == ISD::ANY_EXTEND) { 1181 // If the source is smaller than the dest, we still need an extend. 1182 if (Operand.Val->getOperand(0).getValueType() < VT) 1183 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 1184 else if (Operand.Val->getOperand(0).getValueType() > VT) 1185 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 1186 else 1187 return Operand.Val->getOperand(0); 1188 } 1189 break; 1190 case ISD::FNEG: 1191 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X) 1192 return getNode(ISD::FSUB, VT, Operand.Val->getOperand(1), 1193 Operand.Val->getOperand(0)); 1194 if (OpOpcode == ISD::FNEG) // --X -> X 1195 return Operand.Val->getOperand(0); 1196 break; 1197 case ISD::FABS: 1198 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 1199 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0)); 1200 break; 1201 } 1202 1203 SDNode *N; 1204 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 1205 SDNode *&E = UnaryOps[std::make_pair(Opcode, std::make_pair(Operand, VT))]; 1206 if (E) return SDOperand(E, 0); 1207 E = N = new SDNode(Opcode, Operand); 1208 } else { 1209 N = new SDNode(Opcode, Operand); 1210 } 1211 N->setValueTypes(VT); 1212 AllNodes.push_back(N); 1213 return SDOperand(N, 0); 1214} 1215 1216 1217 1218SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1219 SDOperand N1, SDOperand N2) { 1220#ifndef NDEBUG 1221 switch (Opcode) { 1222 case ISD::TokenFactor: 1223 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 1224 N2.getValueType() == MVT::Other && "Invalid token factor!"); 1225 break; 1226 case ISD::AND: 1227 case ISD::OR: 1228 case ISD::XOR: 1229 case ISD::UDIV: 1230 case ISD::UREM: 1231 case ISD::MULHU: 1232 case ISD::MULHS: 1233 assert(MVT::isInteger(VT) && "This operator does not apply to FP types!"); 1234 // fall through 1235 case ISD::ADD: 1236 case ISD::SUB: 1237 case ISD::MUL: 1238 case ISD::SDIV: 1239 case ISD::SREM: 1240 assert(MVT::isInteger(N1.getValueType()) && "Should use F* for FP ops"); 1241 // fall through. 1242 case ISD::FADD: 1243 case ISD::FSUB: 1244 case ISD::FMUL: 1245 case ISD::FDIV: 1246 case ISD::FREM: 1247 assert(N1.getValueType() == N2.getValueType() && 1248 N1.getValueType() == VT && "Binary operator types must match!"); 1249 break; 1250 1251 case ISD::SHL: 1252 case ISD::SRA: 1253 case ISD::SRL: 1254 assert(VT == N1.getValueType() && 1255 "Shift operators return type must be the same as their first arg"); 1256 assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) && 1257 VT != MVT::i1 && "Shifts only work on integers"); 1258 break; 1259 case ISD::FP_ROUND_INREG: { 1260 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT(); 1261 assert(VT == N1.getValueType() && "Not an inreg round!"); 1262 assert(MVT::isFloatingPoint(VT) && MVT::isFloatingPoint(EVT) && 1263 "Cannot FP_ROUND_INREG integer types"); 1264 assert(EVT <= VT && "Not rounding down!"); 1265 break; 1266 } 1267 case ISD::AssertSext: 1268 case ISD::AssertZext: 1269 case ISD::SIGN_EXTEND_INREG: { 1270 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT(); 1271 assert(VT == N1.getValueType() && "Not an inreg extend!"); 1272 assert(MVT::isInteger(VT) && MVT::isInteger(EVT) && 1273 "Cannot *_EXTEND_INREG FP types"); 1274 assert(EVT <= VT && "Not extending!"); 1275 } 1276 1277 default: break; 1278 } 1279#endif 1280 1281 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 1282 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 1283 if (N1C) { 1284 if (N2C) { 1285 uint64_t C1 = N1C->getValue(), C2 = N2C->getValue(); 1286 switch (Opcode) { 1287 case ISD::ADD: return getConstant(C1 + C2, VT); 1288 case ISD::SUB: return getConstant(C1 - C2, VT); 1289 case ISD::MUL: return getConstant(C1 * C2, VT); 1290 case ISD::UDIV: 1291 if (C2) return getConstant(C1 / C2, VT); 1292 break; 1293 case ISD::UREM : 1294 if (C2) return getConstant(C1 % C2, VT); 1295 break; 1296 case ISD::SDIV : 1297 if (C2) return getConstant(N1C->getSignExtended() / 1298 N2C->getSignExtended(), VT); 1299 break; 1300 case ISD::SREM : 1301 if (C2) return getConstant(N1C->getSignExtended() % 1302 N2C->getSignExtended(), VT); 1303 break; 1304 case ISD::AND : return getConstant(C1 & C2, VT); 1305 case ISD::OR : return getConstant(C1 | C2, VT); 1306 case ISD::XOR : return getConstant(C1 ^ C2, VT); 1307 case ISD::SHL : return getConstant(C1 << C2, VT); 1308 case ISD::SRL : return getConstant(C1 >> C2, VT); 1309 case ISD::SRA : return getConstant(N1C->getSignExtended() >>(int)C2, VT); 1310 default: break; 1311 } 1312 } else { // Cannonicalize constant to RHS if commutative 1313 if (isCommutativeBinOp(Opcode)) { 1314 std::swap(N1C, N2C); 1315 std::swap(N1, N2); 1316 } 1317 } 1318 1319 if (!CombinerEnabled) { 1320 switch (Opcode) { 1321 default: break; 1322 case ISD::SHL: // shl 0, X -> 0 1323 if (N1C->isNullValue()) return N1; 1324 break; 1325 case ISD::SRL: // srl 0, X -> 0 1326 if (N1C->isNullValue()) return N1; 1327 break; 1328 case ISD::SRA: // sra -1, X -> -1 1329 if (N1C->isAllOnesValue()) return N1; 1330 break; 1331 case ISD::SIGN_EXTEND_INREG: // SIGN_EXTEND_INREG N1C, EVT 1332 // Extending a constant? Just return the extended constant. 1333 SDOperand Tmp = getNode(ISD::TRUNCATE, cast<VTSDNode>(N2)->getVT(), N1); 1334 return getNode(ISD::SIGN_EXTEND, VT, Tmp); 1335 } 1336 } 1337 } 1338 1339 if (!CombinerEnabled) { 1340 if (N2C) { 1341 uint64_t C2 = N2C->getValue(); 1342 1343 switch (Opcode) { 1344 case ISD::ADD: 1345 if (!C2) return N1; // add X, 0 -> X 1346 break; 1347 case ISD::SUB: 1348 if (!C2) return N1; // sub X, 0 -> X 1349 return getNode(ISD::ADD, VT, N1, getConstant(-C2, VT)); 1350 case ISD::MUL: 1351 if (!C2) return N2; // mul X, 0 -> 0 1352 if (N2C->isAllOnesValue()) // mul X, -1 -> 0-X 1353 return getNode(ISD::SUB, VT, getConstant(0, VT), N1); 1354 1355 // FIXME: Move this to the DAG combiner when it exists. 1356 if ((C2 & C2-1) == 0) { 1357 SDOperand ShAmt = getConstant(Log2_64(C2), TLI.getShiftAmountTy()); 1358 return getNode(ISD::SHL, VT, N1, ShAmt); 1359 } 1360 break; 1361 1362 case ISD::MULHU: 1363 case ISD::MULHS: 1364 if (!C2) return N2; // mul X, 0 -> 0 1365 1366 if (C2 == 1) // 0X*01 -> 0X hi(0X) == 0 1367 return getConstant(0, VT); 1368 1369 // Many others could be handled here, including -1, powers of 2, etc. 1370 break; 1371 1372 case ISD::UDIV: 1373 // FIXME: Move this to the DAG combiner when it exists. 1374 if ((C2 & C2-1) == 0 && C2) { 1375 SDOperand ShAmt = getConstant(Log2_64(C2), TLI.getShiftAmountTy()); 1376 return getNode(ISD::SRL, VT, N1, ShAmt); 1377 } 1378 break; 1379 1380 case ISD::SHL: 1381 case ISD::SRL: 1382 case ISD::SRA: 1383 // If the shift amount is bigger than the size of the data, then all the 1384 // bits are shifted out. Simplify to undef. 1385 if (C2 >= MVT::getSizeInBits(N1.getValueType())) { 1386 return getNode(ISD::UNDEF, N1.getValueType()); 1387 } 1388 if (C2 == 0) return N1; 1389 1390 if (Opcode == ISD::SRA) { 1391 // If the sign bit is known to be zero, switch this to a SRL. 1392 if (MaskedValueIsZero(N1, 1393 1ULL << (MVT::getSizeInBits(N1.getValueType())-1), 1394 TLI)) 1395 return getNode(ISD::SRL, N1.getValueType(), N1, N2); 1396 } else { 1397 // If the part left over is known to be zero, the whole thing is zero. 1398 uint64_t TypeMask = ~0ULL >> (64-MVT::getSizeInBits(N1.getValueType())); 1399 if (Opcode == ISD::SRL) { 1400 if (MaskedValueIsZero(N1, TypeMask << C2, TLI)) 1401 return getConstant(0, N1.getValueType()); 1402 } else if (Opcode == ISD::SHL) { 1403 if (MaskedValueIsZero(N1, TypeMask >> C2, TLI)) 1404 return getConstant(0, N1.getValueType()); 1405 } 1406 } 1407 1408 if (Opcode == ISD::SHL && N1.getNumOperands() == 2) 1409 if (ConstantSDNode *OpSA = dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 1410 unsigned OpSAC = OpSA->getValue(); 1411 if (N1.getOpcode() == ISD::SHL) { 1412 if (C2+OpSAC >= MVT::getSizeInBits(N1.getValueType())) 1413 return getConstant(0, N1.getValueType()); 1414 return getNode(ISD::SHL, N1.getValueType(), N1.getOperand(0), 1415 getConstant(C2+OpSAC, N2.getValueType())); 1416 } else if (N1.getOpcode() == ISD::SRL) { 1417 // (X >> C1) << C2: if C2 > C1, ((X & ~0<<C1) << C2-C1) 1418 SDOperand Mask = getNode(ISD::AND, VT, N1.getOperand(0), 1419 getConstant(~0ULL << OpSAC, VT)); 1420 if (C2 > OpSAC) { 1421 return getNode(ISD::SHL, VT, Mask, 1422 getConstant(C2-OpSAC, N2.getValueType())); 1423 } else { 1424 // (X >> C1) << C2: if C2 <= C1, ((X & ~0<<C1) >> C1-C2) 1425 return getNode(ISD::SRL, VT, Mask, 1426 getConstant(OpSAC-C2, N2.getValueType())); 1427 } 1428 } else if (N1.getOpcode() == ISD::SRA) { 1429 // if C1 == C2, just mask out low bits. 1430 if (C2 == OpSAC) 1431 return getNode(ISD::AND, VT, N1.getOperand(0), 1432 getConstant(~0ULL << C2, VT)); 1433 } 1434 } 1435 break; 1436 1437 case ISD::AND: 1438 if (!C2) return N2; // X and 0 -> 0 1439 if (N2C->isAllOnesValue()) 1440 return N1; // X and -1 -> X 1441 1442 if (MaskedValueIsZero(N1, C2, TLI)) // X and 0 -> 0 1443 return getConstant(0, VT); 1444 1445 { 1446 uint64_t NotC2 = ~C2; 1447 if (VT != MVT::i64) 1448 NotC2 &= (1ULL << MVT::getSizeInBits(VT))-1; 1449 1450 if (MaskedValueIsZero(N1, NotC2, TLI)) 1451 return N1; // if (X & ~C2) -> 0, the and is redundant 1452 } 1453 1454 // FIXME: Should add a corresponding version of this for 1455 // ZERO_EXTEND/SIGN_EXTEND by converting them to an ANY_EXTEND node which 1456 // we don't have yet. 1457 // FIXME: NOW WE DO, add this. 1458 1459 // and (sign_extend_inreg x:16:32), 1 -> and x, 1 1460 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) { 1461 // If we are masking out the part of our input that was extended, just 1462 // mask the input to the extension directly. 1463 unsigned ExtendBits = 1464 MVT::getSizeInBits(cast<VTSDNode>(N1.getOperand(1))->getVT()); 1465 if ((C2 & (~0ULL << ExtendBits)) == 0) 1466 return getNode(ISD::AND, VT, N1.getOperand(0), N2); 1467 } else if (N1.getOpcode() == ISD::OR) { 1468 if (ConstantSDNode *ORI = dyn_cast<ConstantSDNode>(N1.getOperand(1))) 1469 if ((ORI->getValue() & C2) == C2) { 1470 // If the 'or' is setting all of the bits that we are masking for, 1471 // we know the result of the AND will be the AND mask itself. 1472 return N2; 1473 } 1474 } 1475 break; 1476 case ISD::OR: 1477 if (!C2)return N1; // X or 0 -> X 1478 if (N2C->isAllOnesValue()) 1479 return N2; // X or -1 -> -1 1480 break; 1481 case ISD::XOR: 1482 if (!C2) return N1; // X xor 0 -> X 1483 if (N2C->getValue() == 1 && N1.Val->getOpcode() == ISD::SETCC) { 1484 SDNode *SetCC = N1.Val; 1485 // !(X op Y) -> (X !op Y) 1486 bool isInteger = MVT::isInteger(SetCC->getOperand(0).getValueType()); 1487 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC->getOperand(2))->get(); 1488 return getSetCC(SetCC->getValueType(0), 1489 SetCC->getOperand(0), SetCC->getOperand(1), 1490 ISD::getSetCCInverse(CC, isInteger)); 1491 } else if (N2C->isAllOnesValue()) { 1492 if (N1.getOpcode() == ISD::AND || N1.getOpcode() == ISD::OR) { 1493 SDNode *Op = N1.Val; 1494 // !(X or Y) -> (!X and !Y) iff X or Y are freely invertible 1495 // !(X and Y) -> (!X or !Y) iff X or Y are freely invertible 1496 SDOperand LHS = Op->getOperand(0), RHS = Op->getOperand(1); 1497 if (isInvertibleForFree(RHS) || isInvertibleForFree(LHS)) { 1498 LHS = getNode(ISD::XOR, VT, LHS, N2); // RHS = ~LHS 1499 RHS = getNode(ISD::XOR, VT, RHS, N2); // RHS = ~RHS 1500 if (Op->getOpcode() == ISD::AND) 1501 return getNode(ISD::OR, VT, LHS, RHS); 1502 return getNode(ISD::AND, VT, LHS, RHS); 1503 } 1504 } 1505 // X xor -1 -> not(x) ? 1506 } 1507 break; 1508 } 1509 1510 // Reassociate ((X op C1) op C2) if possible. 1511 if (N1.getOpcode() == Opcode && isAssociativeBinOp(Opcode)) 1512 if (ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N1.Val->getOperand(1))) 1513 return getNode(Opcode, VT, N1.Val->getOperand(0), 1514 getNode(Opcode, VT, N2, N1.Val->getOperand(1))); 1515 } 1516 } 1517 1518 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val); 1519 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val); 1520 if (N1CFP) { 1521 if (N2CFP) { 1522 double C1 = N1CFP->getValue(), C2 = N2CFP->getValue(); 1523 switch (Opcode) { 1524 case ISD::FADD: return getConstantFP(C1 + C2, VT); 1525 case ISD::FSUB: return getConstantFP(C1 - C2, VT); 1526 case ISD::FMUL: return getConstantFP(C1 * C2, VT); 1527 case ISD::FDIV: 1528 if (C2) return getConstantFP(C1 / C2, VT); 1529 break; 1530 case ISD::FREM : 1531 if (C2) return getConstantFP(fmod(C1, C2), VT); 1532 break; 1533 default: break; 1534 } 1535 } else { // Cannonicalize constant to RHS if commutative 1536 if (isCommutativeBinOp(Opcode)) { 1537 std::swap(N1CFP, N2CFP); 1538 std::swap(N1, N2); 1539 } 1540 } 1541 1542 if (!CombinerEnabled) { 1543 if (Opcode == ISD::FP_ROUND_INREG) 1544 return getNode(ISD::FP_EXTEND, VT, 1545 getNode(ISD::FP_ROUND, cast<VTSDNode>(N2)->getVT(), N1)); 1546 } 1547 } 1548 1549 // Finally, fold operations that do not require constants. 1550 switch (Opcode) { 1551 case ISD::TokenFactor: 1552 if (!CombinerEnabled) { 1553 if (N1.getOpcode() == ISD::EntryToken) 1554 return N2; 1555 if (N2.getOpcode() == ISD::EntryToken) 1556 return N1; 1557 } 1558 break; 1559 1560 case ISD::AND: 1561 case ISD::OR: 1562 if (!CombinerEnabled) { 1563 if (N1.Val->getOpcode() == ISD::SETCC && N2.Val->getOpcode() == ISD::SETCC){ 1564 SDNode *LHS = N1.Val, *RHS = N2.Val; 1565 SDOperand LL = LHS->getOperand(0), RL = RHS->getOperand(0); 1566 SDOperand LR = LHS->getOperand(1), RR = RHS->getOperand(1); 1567 ISD::CondCode Op1 = cast<CondCodeSDNode>(LHS->getOperand(2))->get(); 1568 ISD::CondCode Op2 = cast<CondCodeSDNode>(RHS->getOperand(2))->get(); 1569 1570 if (LR == RR && isa<ConstantSDNode>(LR) && 1571 Op2 == Op1 && MVT::isInteger(LL.getValueType())) { 1572 // (X != 0) | (Y != 0) -> (X|Y != 0) 1573 // (X == 0) & (Y == 0) -> (X|Y == 0) 1574 // (X < 0) | (Y < 0) -> (X|Y < 0) 1575 if (cast<ConstantSDNode>(LR)->getValue() == 0 && 1576 ((Op2 == ISD::SETEQ && Opcode == ISD::AND) || 1577 (Op2 == ISD::SETNE && Opcode == ISD::OR) || 1578 (Op2 == ISD::SETLT && Opcode == ISD::OR))) 1579 return getSetCC(VT, getNode(ISD::OR, LR.getValueType(), LL, RL), LR, 1580 Op2); 1581 1582 if (cast<ConstantSDNode>(LR)->isAllOnesValue()) { 1583 // (X == -1) & (Y == -1) -> (X&Y == -1) 1584 // (X != -1) | (Y != -1) -> (X&Y != -1) 1585 // (X > -1) | (Y > -1) -> (X&Y > -1) 1586 if ((Opcode == ISD::AND && Op2 == ISD::SETEQ) || 1587 (Opcode == ISD::OR && Op2 == ISD::SETNE) || 1588 (Opcode == ISD::OR && Op2 == ISD::SETGT)) 1589 return getSetCC(VT, getNode(ISD::AND, LR.getValueType(), LL, RL), 1590 LR, Op2); 1591 // (X > -1) & (Y > -1) -> (X|Y > -1) 1592 if (Opcode == ISD::AND && Op2 == ISD::SETGT) 1593 return getSetCC(VT, getNode(ISD::OR, LR.getValueType(), LL, RL), 1594 LR, Op2); 1595 } 1596 } 1597 1598 // (X op1 Y) | (Y op2 X) -> (X op1 Y) | (X swapop2 Y) 1599 if (LL == RR && LR == RL) { 1600 Op2 = ISD::getSetCCSwappedOperands(Op2); 1601 goto MatchedBackwards; 1602 } 1603 1604 if (LL == RL && LR == RR) { 1605 MatchedBackwards: 1606 ISD::CondCode Result; 1607 bool isInteger = MVT::isInteger(LL.getValueType()); 1608 if (Opcode == ISD::OR) 1609 Result = ISD::getSetCCOrOperation(Op1, Op2, isInteger); 1610 else 1611 Result = ISD::getSetCCAndOperation(Op1, Op2, isInteger); 1612 1613 if (Result != ISD::SETCC_INVALID) 1614 return getSetCC(LHS->getValueType(0), LL, LR, Result); 1615 } 1616 } 1617 1618 // and/or zext(a), zext(b) -> zext(and/or a, b) 1619 if (N1.getOpcode() == ISD::ZERO_EXTEND && 1620 N2.getOpcode() == ISD::ZERO_EXTEND && 1621 N1.getOperand(0).getValueType() == N2.getOperand(0).getValueType()) 1622 return getNode(ISD::ZERO_EXTEND, VT, 1623 getNode(Opcode, N1.getOperand(0).getValueType(), 1624 N1.getOperand(0), N2.getOperand(0))); 1625 } 1626 break; 1627 case ISD::XOR: 1628 if (!CombinerEnabled) { 1629 if (N1 == N2) return getConstant(0, VT); // xor X, Y -> 0 1630 } 1631 break; 1632 case ISD::ADD: 1633 if (!CombinerEnabled) { 1634 if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) && 1635 cast<ConstantSDNode>(N1.getOperand(0))->getValue() == 0) 1636 return getNode(ISD::SUB, VT, N2, N1.getOperand(1)); // (0-A)+B -> B-A 1637 if (N2.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N2.getOperand(0)) && 1638 cast<ConstantSDNode>(N2.getOperand(0))->getValue() == 0) 1639 return getNode(ISD::SUB, VT, N1, N2.getOperand(1)); // A+(0-B) -> A-B 1640 if (N2.getOpcode() == ISD::SUB && N1 == N2.Val->getOperand(1)) 1641 return N2.Val->getOperand(0); // A+(B-A) -> B 1642 } 1643 break; 1644 case ISD::FADD: 1645 if (!CombinerEnabled) { 1646 if (N2.getOpcode() == ISD::FNEG) // (A+ (-B) -> A-B 1647 return getNode(ISD::FSUB, VT, N1, N2.getOperand(0)); 1648 if (N1.getOpcode() == ISD::FNEG) // ((-A)+B) -> B-A 1649 return getNode(ISD::FSUB, VT, N2, N1.getOperand(0)); 1650 } 1651 break; 1652 1653 case ISD::SUB: 1654 if (!CombinerEnabled) { 1655 if (N1.getOpcode() == ISD::ADD) { 1656 if (N1.Val->getOperand(0) == N2) 1657 return N1.Val->getOperand(1); // (A+B)-A == B 1658 if (N1.Val->getOperand(1) == N2) 1659 return N1.Val->getOperand(0); // (A+B)-B == A 1660 } 1661 } 1662 break; 1663 case ISD::FSUB: 1664 if (!CombinerEnabled) { 1665 if (N2.getOpcode() == ISD::FNEG) // (A- (-B) -> A+B 1666 return getNode(ISD::FADD, VT, N1, N2.getOperand(0)); 1667 } 1668 break; 1669 case ISD::FP_ROUND_INREG: 1670 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 1671 break; 1672 case ISD::SIGN_EXTEND_INREG: { 1673 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT(); 1674 if (EVT == VT) return N1; // Not actually extending 1675 if (!CombinerEnabled) { 1676 // If we are sign extending an extension, use the original source. 1677 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG || 1678 N1.getOpcode() == ISD::AssertSext) 1679 if (cast<VTSDNode>(N1.getOperand(1))->getVT() <= EVT) 1680 return N1; 1681 1682 // If we are sign extending a sextload, return just the load. 1683 if (N1.getOpcode() == ISD::SEXTLOAD) 1684 if (cast<VTSDNode>(N1.getOperand(3))->getVT() <= EVT) 1685 return N1; 1686 1687 // If we are extending the result of a setcc, and we already know the 1688 // contents of the top bits, eliminate the extension. 1689 if (N1.getOpcode() == ISD::SETCC && 1690 TLI.getSetCCResultContents() == 1691 TargetLowering::ZeroOrNegativeOneSetCCResult) 1692 return N1; 1693 1694 // If we are sign extending the result of an (and X, C) operation, and we 1695 // know the extended bits are zeros already, don't do the extend. 1696 if (N1.getOpcode() == ISD::AND) 1697 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 1698 uint64_t Mask = N1C->getValue(); 1699 unsigned NumBits = MVT::getSizeInBits(EVT); 1700 if ((Mask & (~0ULL << (NumBits-1))) == 0) 1701 return N1; 1702 } 1703 } 1704 break; 1705 } 1706 1707 // FIXME: figure out how to safely handle things like 1708 // int foo(int x) { return 1 << (x & 255); } 1709 // int bar() { return foo(256); } 1710#if 0 1711 case ISD::SHL: 1712 case ISD::SRL: 1713 case ISD::SRA: 1714 if (N2.getOpcode() == ISD::SIGN_EXTEND_INREG && 1715 cast<VTSDNode>(N2.getOperand(1))->getVT() != MVT::i1) 1716 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1717 else if (N2.getOpcode() == ISD::AND) 1718 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N2.getOperand(1))) { 1719 // If the and is only masking out bits that cannot effect the shift, 1720 // eliminate the and. 1721 unsigned NumBits = MVT::getSizeInBits(VT); 1722 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 1723 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1724 } 1725 break; 1726#endif 1727 } 1728 1729 // Memoize this node if possible. 1730 SDNode *N; 1731 if (Opcode != ISD::CALLSEQ_START && Opcode != ISD::CALLSEQ_END && 1732 VT != MVT::Flag) { 1733 SDNode *&BON = BinaryOps[std::make_pair(Opcode, std::make_pair(N1, N2))]; 1734 if (BON) return SDOperand(BON, 0); 1735 1736 BON = N = new SDNode(Opcode, N1, N2); 1737 } else { 1738 N = new SDNode(Opcode, N1, N2); 1739 } 1740 1741 N->setValueTypes(VT); 1742 AllNodes.push_back(N); 1743 return SDOperand(N, 0); 1744} 1745 1746// setAdjCallChain - This method changes the token chain of an 1747// CALLSEQ_START/END node to be the specified operand. 1748void SDNode::setAdjCallChain(SDOperand N) { 1749 assert(N.getValueType() == MVT::Other); 1750 assert((getOpcode() == ISD::CALLSEQ_START || 1751 getOpcode() == ISD::CALLSEQ_END) && "Cannot adjust this node!"); 1752 1753 Operands[0].Val->removeUser(this); 1754 Operands[0] = N; 1755 N.Val->Uses.push_back(this); 1756} 1757 1758 1759 1760SDOperand SelectionDAG::getLoad(MVT::ValueType VT, 1761 SDOperand Chain, SDOperand Ptr, 1762 SDOperand SV) { 1763 SDNode *&N = Loads[std::make_pair(Ptr, std::make_pair(Chain, VT))]; 1764 if (N) return SDOperand(N, 0); 1765 N = new SDNode(ISD::LOAD, Chain, Ptr, SV); 1766 1767 // Loads have a token chain. 1768 N->setValueTypes(VT, MVT::Other); 1769 AllNodes.push_back(N); 1770 return SDOperand(N, 0); 1771} 1772 1773 1774SDOperand SelectionDAG::getExtLoad(unsigned Opcode, MVT::ValueType VT, 1775 SDOperand Chain, SDOperand Ptr, SDOperand SV, 1776 MVT::ValueType EVT) { 1777 std::vector<SDOperand> Ops; 1778 Ops.reserve(4); 1779 Ops.push_back(Chain); 1780 Ops.push_back(Ptr); 1781 Ops.push_back(SV); 1782 Ops.push_back(getValueType(EVT)); 1783 std::vector<MVT::ValueType> VTs; 1784 VTs.reserve(2); 1785 VTs.push_back(VT); VTs.push_back(MVT::Other); // Add token chain. 1786 return getNode(Opcode, VTs, Ops); 1787} 1788 1789SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1790 SDOperand N1, SDOperand N2, SDOperand N3) { 1791 // Perform various simplifications. 1792 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 1793 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 1794 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val); 1795 switch (Opcode) { 1796 case ISD::SETCC: { 1797 // Use SimplifySetCC to simplify SETCC's. 1798 SDOperand Simp = SimplifySetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 1799 if (Simp.Val) return Simp; 1800 break; 1801 } 1802 case ISD::SELECT: 1803 if (N1C) 1804 if (N1C->getValue()) 1805 return N2; // select true, X, Y -> X 1806 else 1807 return N3; // select false, X, Y -> Y 1808 1809 if (N2 == N3) return N2; // select C, X, X -> X 1810 1811 if (VT == MVT::i1) { // Boolean SELECT 1812 if (N2C) { 1813 if (N2C->getValue()) // select C, 1, X -> C | X 1814 return getNode(ISD::OR, VT, N1, N3); 1815 else // select C, 0, X -> ~C & X 1816 return getNode(ISD::AND, VT, 1817 getNode(ISD::XOR, N1.getValueType(), N1, 1818 getConstant(1, N1.getValueType())), N3); 1819 } else if (N3C) { 1820 if (N3C->getValue()) // select C, X, 1 -> ~C | X 1821 return getNode(ISD::OR, VT, 1822 getNode(ISD::XOR, N1.getValueType(), N1, 1823 getConstant(1, N1.getValueType())), N2); 1824 else // select C, X, 0 -> C & X 1825 return getNode(ISD::AND, VT, N1, N2); 1826 } 1827 1828 if (N1 == N2) // X ? X : Y --> X ? 1 : Y --> X | Y 1829 return getNode(ISD::OR, VT, N1, N3); 1830 if (N1 == N3) // X ? Y : X --> X ? Y : 0 --> X & Y 1831 return getNode(ISD::AND, VT, N1, N2); 1832 } 1833 if (N1.getOpcode() == ISD::SETCC) { 1834 SDOperand Simp = SimplifySelectCC(N1.getOperand(0), N1.getOperand(1), N2, 1835 N3, cast<CondCodeSDNode>(N1.getOperand(2))->get()); 1836 if (Simp.Val) return Simp; 1837 } 1838 break; 1839 case ISD::BRCOND: 1840 if (N2C) 1841 if (N2C->getValue()) // Unconditional branch 1842 return getNode(ISD::BR, MVT::Other, N1, N3); 1843 else 1844 return N1; // Never-taken branch 1845 break; 1846 } 1847 1848 std::vector<SDOperand> Ops; 1849 Ops.reserve(3); 1850 Ops.push_back(N1); 1851 Ops.push_back(N2); 1852 Ops.push_back(N3); 1853 1854 // Memoize node if it doesn't produce a flag. 1855 SDNode *N; 1856 if (VT != MVT::Flag) { 1857 SDNode *&E = OneResultNodes[std::make_pair(Opcode,std::make_pair(VT, Ops))]; 1858 if (E) return SDOperand(E, 0); 1859 E = N = new SDNode(Opcode, N1, N2, N3); 1860 } else { 1861 N = new SDNode(Opcode, N1, N2, N3); 1862 } 1863 N->setValueTypes(VT); 1864 AllNodes.push_back(N); 1865 return SDOperand(N, 0); 1866} 1867 1868SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1869 SDOperand N1, SDOperand N2, SDOperand N3, 1870 SDOperand N4) { 1871 std::vector<SDOperand> Ops; 1872 Ops.reserve(4); 1873 Ops.push_back(N1); 1874 Ops.push_back(N2); 1875 Ops.push_back(N3); 1876 Ops.push_back(N4); 1877 return getNode(Opcode, VT, Ops); 1878} 1879 1880SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1881 SDOperand N1, SDOperand N2, SDOperand N3, 1882 SDOperand N4, SDOperand N5) { 1883 std::vector<SDOperand> Ops; 1884 Ops.reserve(5); 1885 Ops.push_back(N1); 1886 Ops.push_back(N2); 1887 Ops.push_back(N3); 1888 Ops.push_back(N4); 1889 Ops.push_back(N5); 1890 return getNode(Opcode, VT, Ops); 1891} 1892 1893 1894SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) { 1895 assert((!V || isa<PointerType>(V->getType())) && 1896 "SrcValue is not a pointer?"); 1897 SDNode *&N = ValueNodes[std::make_pair(V, Offset)]; 1898 if (N) return SDOperand(N, 0); 1899 1900 N = new SrcValueSDNode(V, Offset); 1901 AllNodes.push_back(N); 1902 return SDOperand(N, 0); 1903} 1904 1905SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1906 std::vector<SDOperand> &Ops) { 1907 switch (Ops.size()) { 1908 case 0: return getNode(Opcode, VT); 1909 case 1: return getNode(Opcode, VT, Ops[0]); 1910 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 1911 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 1912 default: break; 1913 } 1914 1915 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(Ops[1].Val); 1916 switch (Opcode) { 1917 default: break; 1918 case ISD::BRCONDTWOWAY: 1919 if (N1C) 1920 if (N1C->getValue()) // Unconditional branch to true dest. 1921 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[2]); 1922 else // Unconditional branch to false dest. 1923 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[3]); 1924 break; 1925 case ISD::BRTWOWAY_CC: 1926 assert(Ops.size() == 6 && "BRTWOWAY_CC takes 6 operands!"); 1927 assert(Ops[2].getValueType() == Ops[3].getValueType() && 1928 "LHS and RHS of comparison must have same type!"); 1929 break; 1930 case ISD::TRUNCSTORE: { 1931 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!"); 1932 MVT::ValueType EVT = cast<VTSDNode>(Ops[4])->getVT(); 1933#if 0 // FIXME: If the target supports EVT natively, convert to a truncate/store 1934 // If this is a truncating store of a constant, convert to the desired type 1935 // and store it instead. 1936 if (isa<Constant>(Ops[0])) { 1937 SDOperand Op = getNode(ISD::TRUNCATE, EVT, N1); 1938 if (isa<Constant>(Op)) 1939 N1 = Op; 1940 } 1941 // Also for ConstantFP? 1942#endif 1943 if (Ops[0].getValueType() == EVT) // Normal store? 1944 return getNode(ISD::STORE, VT, Ops[0], Ops[1], Ops[2], Ops[3]); 1945 assert(Ops[1].getValueType() > EVT && "Not a truncation?"); 1946 assert(MVT::isInteger(Ops[1].getValueType()) == MVT::isInteger(EVT) && 1947 "Can't do FP-INT conversion!"); 1948 break; 1949 } 1950 case ISD::SELECT_CC: { 1951 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!"); 1952 assert(Ops[0].getValueType() == Ops[1].getValueType() && 1953 "LHS and RHS of condition must have same type!"); 1954 assert(Ops[2].getValueType() == Ops[3].getValueType() && 1955 "True and False arms of SelectCC must have same type!"); 1956 assert(Ops[2].getValueType() == VT && 1957 "select_cc node must be of same type as true and false value!"); 1958 SDOperand Simp = SimplifySelectCC(Ops[0], Ops[1], Ops[2], Ops[3], 1959 cast<CondCodeSDNode>(Ops[4])->get()); 1960 if (Simp.Val) return Simp; 1961 break; 1962 } 1963 case ISD::BR_CC: { 1964 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!"); 1965 assert(Ops[2].getValueType() == Ops[3].getValueType() && 1966 "LHS/RHS of comparison should match types!"); 1967 // Use SimplifySetCC to simplify SETCC's. 1968 SDOperand Simp = SimplifySetCC(MVT::i1, Ops[2], Ops[3], 1969 cast<CondCodeSDNode>(Ops[1])->get()); 1970 if (Simp.Val) { 1971 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Simp)) { 1972 if (C->getValue() & 1) // Unconditional branch 1973 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[4]); 1974 else 1975 return Ops[0]; // Unconditional Fall through 1976 } else if (Simp.Val->getOpcode() == ISD::SETCC) { 1977 Ops[2] = Simp.getOperand(0); 1978 Ops[3] = Simp.getOperand(1); 1979 Ops[1] = Simp.getOperand(2); 1980 } 1981 } 1982 break; 1983 } 1984 } 1985 1986 // Memoize nodes. 1987 SDNode *N; 1988 if (VT != MVT::Flag) { 1989 SDNode *&E = 1990 OneResultNodes[std::make_pair(Opcode, std::make_pair(VT, Ops))]; 1991 if (E) return SDOperand(E, 0); 1992 E = N = new SDNode(Opcode, Ops); 1993 } else { 1994 N = new SDNode(Opcode, Ops); 1995 } 1996 N->setValueTypes(VT); 1997 AllNodes.push_back(N); 1998 return SDOperand(N, 0); 1999} 2000 2001SDOperand SelectionDAG::getNode(unsigned Opcode, 2002 std::vector<MVT::ValueType> &ResultTys, 2003 std::vector<SDOperand> &Ops) { 2004 if (ResultTys.size() == 1) 2005 return getNode(Opcode, ResultTys[0], Ops); 2006 2007 switch (Opcode) { 2008 case ISD::EXTLOAD: 2009 case ISD::SEXTLOAD: 2010 case ISD::ZEXTLOAD: { 2011 MVT::ValueType EVT = cast<VTSDNode>(Ops[3])->getVT(); 2012 assert(Ops.size() == 4 && ResultTys.size() == 2 && "Bad *EXTLOAD!"); 2013 // If they are asking for an extending load from/to the same thing, return a 2014 // normal load. 2015 if (ResultTys[0] == EVT) 2016 return getLoad(ResultTys[0], Ops[0], Ops[1], Ops[2]); 2017 assert(EVT < ResultTys[0] && 2018 "Should only be an extending load, not truncating!"); 2019 assert((Opcode == ISD::EXTLOAD || MVT::isInteger(ResultTys[0])) && 2020 "Cannot sign/zero extend a FP load!"); 2021 assert(MVT::isInteger(ResultTys[0]) == MVT::isInteger(EVT) && 2022 "Cannot convert from FP to Int or Int -> FP!"); 2023 break; 2024 } 2025 2026 // FIXME: figure out how to safely handle things like 2027 // int foo(int x) { return 1 << (x & 255); } 2028 // int bar() { return foo(256); } 2029#if 0 2030 case ISD::SRA_PARTS: 2031 case ISD::SRL_PARTS: 2032 case ISD::SHL_PARTS: 2033 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 2034 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 2035 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 2036 else if (N3.getOpcode() == ISD::AND) 2037 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 2038 // If the and is only masking out bits that cannot effect the shift, 2039 // eliminate the and. 2040 unsigned NumBits = MVT::getSizeInBits(VT)*2; 2041 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 2042 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 2043 } 2044 break; 2045#endif 2046 } 2047 2048 // Memoize the node unless it returns a flag. 2049 SDNode *N; 2050 if (ResultTys.back() != MVT::Flag) { 2051 SDNode *&E = 2052 ArbitraryNodes[std::make_pair(Opcode, std::make_pair(ResultTys, Ops))]; 2053 if (E) return SDOperand(E, 0); 2054 E = N = new SDNode(Opcode, Ops); 2055 } else { 2056 N = new SDNode(Opcode, Ops); 2057 } 2058 N->setValueTypes(ResultTys); 2059 AllNodes.push_back(N); 2060 return SDOperand(N, 0); 2061} 2062 2063 2064/// SelectNodeTo - These are used for target selectors to *mutate* the 2065/// specified node to have the specified return type, Target opcode, and 2066/// operands. Note that target opcodes are stored as 2067/// ISD::BUILTIN_OP_END+TargetOpcode in the node opcode field. 2068void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2069 MVT::ValueType VT) { 2070 RemoveNodeFromCSEMaps(N); 2071 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2072 N->setValueTypes(VT); 2073} 2074void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2075 MVT::ValueType VT, SDOperand Op1) { 2076 RemoveNodeFromCSEMaps(N); 2077 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2078 N->setValueTypes(VT); 2079 N->setOperands(Op1); 2080} 2081void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2082 MVT::ValueType VT, SDOperand Op1, 2083 SDOperand Op2) { 2084 RemoveNodeFromCSEMaps(N); 2085 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2086 N->setValueTypes(VT); 2087 N->setOperands(Op1, Op2); 2088} 2089void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2090 MVT::ValueType VT1, MVT::ValueType VT2, 2091 SDOperand Op1, SDOperand Op2) { 2092 RemoveNodeFromCSEMaps(N); 2093 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2094 N->setValueTypes(VT1, VT2); 2095 N->setOperands(Op1, Op2); 2096} 2097void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2098 MVT::ValueType VT, SDOperand Op1, 2099 SDOperand Op2, SDOperand Op3) { 2100 RemoveNodeFromCSEMaps(N); 2101 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2102 N->setValueTypes(VT); 2103 N->setOperands(Op1, Op2, Op3); 2104} 2105void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2106 MVT::ValueType VT1, MVT::ValueType VT2, 2107 SDOperand Op1, SDOperand Op2, SDOperand Op3) { 2108 RemoveNodeFromCSEMaps(N); 2109 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2110 N->setValueTypes(VT1, VT2); 2111 N->setOperands(Op1, Op2, Op3); 2112} 2113 2114void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2115 MVT::ValueType VT, SDOperand Op1, 2116 SDOperand Op2, SDOperand Op3, SDOperand Op4) { 2117 RemoveNodeFromCSEMaps(N); 2118 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2119 N->setValueTypes(VT); 2120 N->setOperands(Op1, Op2, Op3, Op4); 2121} 2122void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2123 MVT::ValueType VT, SDOperand Op1, 2124 SDOperand Op2, SDOperand Op3, SDOperand Op4, 2125 SDOperand Op5) { 2126 RemoveNodeFromCSEMaps(N); 2127 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2128 N->setValueTypes(VT); 2129 N->setOperands(Op1, Op2, Op3, Op4, Op5); 2130} 2131 2132/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 2133/// This can cause recursive merging of nodes in the DAG. 2134/// 2135/// This version assumes From/To have a single result value. 2136/// 2137void SelectionDAG::ReplaceAllUsesWith(SDOperand FromN, SDOperand ToN, 2138 std::vector<SDNode*> *Deleted) { 2139 SDNode *From = FromN.Val, *To = ToN.Val; 2140 assert(From->getNumValues() == 1 && To->getNumValues() == 1 && 2141 "Cannot replace with this method!"); 2142 assert(From != To && "Cannot replace uses of with self"); 2143 2144 while (!From->use_empty()) { 2145 // Process users until they are all gone. 2146 SDNode *U = *From->use_begin(); 2147 2148 // This node is about to morph, remove its old self from the CSE maps. 2149 RemoveNodeFromCSEMaps(U); 2150 2151 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i) 2152 if (U->getOperand(i).Val == From) { 2153 From->removeUser(U); 2154 U->Operands[i].Val = To; 2155 To->addUser(U); 2156 } 2157 2158 // Now that we have modified U, add it back to the CSE maps. If it already 2159 // exists there, recursively merge the results together. 2160 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 2161 ReplaceAllUsesWith(U, Existing, Deleted); 2162 // U is now dead. 2163 if (Deleted) Deleted->push_back(U); 2164 DeleteNodeNotInCSEMaps(U); 2165 } 2166 } 2167} 2168 2169/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 2170/// This can cause recursive merging of nodes in the DAG. 2171/// 2172/// This version assumes From/To have matching types and numbers of result 2173/// values. 2174/// 2175void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 2176 std::vector<SDNode*> *Deleted) { 2177 assert(From != To && "Cannot replace uses of with self"); 2178 assert(From->getNumValues() == To->getNumValues() && 2179 "Cannot use this version of ReplaceAllUsesWith!"); 2180 if (From->getNumValues() == 1) { // If possible, use the faster version. 2181 ReplaceAllUsesWith(SDOperand(From, 0), SDOperand(To, 0), Deleted); 2182 return; 2183 } 2184 2185 while (!From->use_empty()) { 2186 // Process users until they are all gone. 2187 SDNode *U = *From->use_begin(); 2188 2189 // This node is about to morph, remove its old self from the CSE maps. 2190 RemoveNodeFromCSEMaps(U); 2191 2192 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i) 2193 if (U->getOperand(i).Val == From) { 2194 From->removeUser(U); 2195 U->Operands[i].Val = To; 2196 To->addUser(U); 2197 } 2198 2199 // Now that we have modified U, add it back to the CSE maps. If it already 2200 // exists there, recursively merge the results together. 2201 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 2202 ReplaceAllUsesWith(U, Existing, Deleted); 2203 // U is now dead. 2204 if (Deleted) Deleted->push_back(U); 2205 DeleteNodeNotInCSEMaps(U); 2206 } 2207 } 2208} 2209 2210/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 2211/// This can cause recursive merging of nodes in the DAG. 2212/// 2213/// This version can replace From with any result values. To must match the 2214/// number and types of values returned by From. 2215void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 2216 const std::vector<SDOperand> &To, 2217 std::vector<SDNode*> *Deleted) { 2218 assert(From->getNumValues() == To.size() && 2219 "Incorrect number of values to replace with!"); 2220 if (To.size() == 1 && To[0].Val->getNumValues() == 1) { 2221 // Degenerate case handled above. 2222 ReplaceAllUsesWith(SDOperand(From, 0), To[0], Deleted); 2223 return; 2224 } 2225 2226 while (!From->use_empty()) { 2227 // Process users until they are all gone. 2228 SDNode *U = *From->use_begin(); 2229 2230 // This node is about to morph, remove its old self from the CSE maps. 2231 RemoveNodeFromCSEMaps(U); 2232 2233 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i) 2234 if (U->getOperand(i).Val == From) { 2235 const SDOperand &ToOp = To[U->getOperand(i).ResNo]; 2236 From->removeUser(U); 2237 U->Operands[i] = ToOp; 2238 ToOp.Val->addUser(U); 2239 } 2240 2241 // Now that we have modified U, add it back to the CSE maps. If it already 2242 // exists there, recursively merge the results together. 2243 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 2244 ReplaceAllUsesWith(U, Existing, Deleted); 2245 // U is now dead. 2246 if (Deleted) Deleted->push_back(U); 2247 DeleteNodeNotInCSEMaps(U); 2248 } 2249 } 2250} 2251 2252 2253//===----------------------------------------------------------------------===// 2254// SDNode Class 2255//===----------------------------------------------------------------------===// 2256 2257/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 2258/// indicated value. This method ignores uses of other values defined by this 2259/// operation. 2260bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) { 2261 assert(Value < getNumValues() && "Bad value!"); 2262 2263 // If there is only one value, this is easy. 2264 if (getNumValues() == 1) 2265 return use_size() == NUses; 2266 if (Uses.size() < NUses) return false; 2267 2268 SDOperand TheValue(this, Value); 2269 2270 std::set<SDNode*> UsersHandled; 2271 2272 for (std::vector<SDNode*>::iterator UI = Uses.begin(), E = Uses.end(); 2273 UI != E; ++UI) { 2274 SDNode *User = *UI; 2275 if (User->getNumOperands() == 1 || 2276 UsersHandled.insert(User).second) // First time we've seen this? 2277 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) 2278 if (User->getOperand(i) == TheValue) { 2279 if (NUses == 0) 2280 return false; // too many uses 2281 --NUses; 2282 } 2283 } 2284 2285 // Found exactly the right number of uses? 2286 return NUses == 0; 2287} 2288 2289 2290const char *SDNode::getOperationName(const SelectionDAG *G) const { 2291 switch (getOpcode()) { 2292 default: 2293 if (getOpcode() < ISD::BUILTIN_OP_END) 2294 return "<<Unknown DAG Node>>"; 2295 else { 2296 if (G) 2297 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 2298 if (getOpcode()-ISD::BUILTIN_OP_END < TII->getNumOpcodes()) 2299 return TII->getName(getOpcode()-ISD::BUILTIN_OP_END); 2300 return "<<Unknown Target Node>>"; 2301 } 2302 2303 case ISD::PCMARKER: return "PCMarker"; 2304 case ISD::SRCVALUE: return "SrcValue"; 2305 case ISD::VALUETYPE: return "ValueType"; 2306 case ISD::EntryToken: return "EntryToken"; 2307 case ISD::TokenFactor: return "TokenFactor"; 2308 case ISD::AssertSext: return "AssertSext"; 2309 case ISD::AssertZext: return "AssertZext"; 2310 case ISD::Constant: return "Constant"; 2311 case ISD::TargetConstant: return "TargetConstant"; 2312 case ISD::ConstantFP: return "ConstantFP"; 2313 case ISD::GlobalAddress: return "GlobalAddress"; 2314 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 2315 case ISD::FrameIndex: return "FrameIndex"; 2316 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 2317 case ISD::BasicBlock: return "BasicBlock"; 2318 case ISD::Register: return "Register"; 2319 case ISD::ExternalSymbol: return "ExternalSymbol"; 2320 case ISD::ConstantPool: return "ConstantPool"; 2321 case ISD::TargetConstantPool: return "TargetConstantPool"; 2322 case ISD::CopyToReg: return "CopyToReg"; 2323 case ISD::CopyFromReg: return "CopyFromReg"; 2324 case ISD::ImplicitDef: return "ImplicitDef"; 2325 case ISD::UNDEF: return "undef"; 2326 2327 // Unary operators 2328 case ISD::FABS: return "fabs"; 2329 case ISD::FNEG: return "fneg"; 2330 case ISD::FSQRT: return "fsqrt"; 2331 case ISD::FSIN: return "fsin"; 2332 case ISD::FCOS: return "fcos"; 2333 2334 // Binary operators 2335 case ISD::ADD: return "add"; 2336 case ISD::SUB: return "sub"; 2337 case ISD::MUL: return "mul"; 2338 case ISD::MULHU: return "mulhu"; 2339 case ISD::MULHS: return "mulhs"; 2340 case ISD::SDIV: return "sdiv"; 2341 case ISD::UDIV: return "udiv"; 2342 case ISD::SREM: return "srem"; 2343 case ISD::UREM: return "urem"; 2344 case ISD::AND: return "and"; 2345 case ISD::OR: return "or"; 2346 case ISD::XOR: return "xor"; 2347 case ISD::SHL: return "shl"; 2348 case ISD::SRA: return "sra"; 2349 case ISD::SRL: return "srl"; 2350 case ISD::FADD: return "fadd"; 2351 case ISD::FSUB: return "fsub"; 2352 case ISD::FMUL: return "fmul"; 2353 case ISD::FDIV: return "fdiv"; 2354 case ISD::FREM: return "frem"; 2355 2356 case ISD::SETCC: return "setcc"; 2357 case ISD::SELECT: return "select"; 2358 case ISD::SELECT_CC: return "select_cc"; 2359 case ISD::ADD_PARTS: return "add_parts"; 2360 case ISD::SUB_PARTS: return "sub_parts"; 2361 case ISD::SHL_PARTS: return "shl_parts"; 2362 case ISD::SRA_PARTS: return "sra_parts"; 2363 case ISD::SRL_PARTS: return "srl_parts"; 2364 2365 // Conversion operators. 2366 case ISD::SIGN_EXTEND: return "sign_extend"; 2367 case ISD::ZERO_EXTEND: return "zero_extend"; 2368 case ISD::ANY_EXTEND: return "any_extend"; 2369 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 2370 case ISD::TRUNCATE: return "truncate"; 2371 case ISD::FP_ROUND: return "fp_round"; 2372 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 2373 case ISD::FP_EXTEND: return "fp_extend"; 2374 2375 case ISD::SINT_TO_FP: return "sint_to_fp"; 2376 case ISD::UINT_TO_FP: return "uint_to_fp"; 2377 case ISD::FP_TO_SINT: return "fp_to_sint"; 2378 case ISD::FP_TO_UINT: return "fp_to_uint"; 2379 2380 // Control flow instructions 2381 case ISD::BR: return "br"; 2382 case ISD::BRCOND: return "brcond"; 2383 case ISD::BRCONDTWOWAY: return "brcondtwoway"; 2384 case ISD::BR_CC: return "br_cc"; 2385 case ISD::BRTWOWAY_CC: return "brtwoway_cc"; 2386 case ISD::RET: return "ret"; 2387 case ISD::CALL: return "call"; 2388 case ISD::TAILCALL:return "tailcall"; 2389 case ISD::CALLSEQ_START: return "callseq_start"; 2390 case ISD::CALLSEQ_END: return "callseq_end"; 2391 2392 // Other operators 2393 case ISD::LOAD: return "load"; 2394 case ISD::STORE: return "store"; 2395 case ISD::EXTLOAD: return "extload"; 2396 case ISD::SEXTLOAD: return "sextload"; 2397 case ISD::ZEXTLOAD: return "zextload"; 2398 case ISD::TRUNCSTORE: return "truncstore"; 2399 2400 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 2401 case ISD::EXTRACT_ELEMENT: return "extract_element"; 2402 case ISD::BUILD_PAIR: return "build_pair"; 2403 case ISD::MEMSET: return "memset"; 2404 case ISD::MEMCPY: return "memcpy"; 2405 case ISD::MEMMOVE: return "memmove"; 2406 2407 // Bit counting 2408 case ISD::CTPOP: return "ctpop"; 2409 case ISD::CTTZ: return "cttz"; 2410 case ISD::CTLZ: return "ctlz"; 2411 2412 // IO Intrinsics 2413 case ISD::READPORT: return "readport"; 2414 case ISD::WRITEPORT: return "writeport"; 2415 case ISD::READIO: return "readio"; 2416 case ISD::WRITEIO: return "writeio"; 2417 2418 case ISD::CONDCODE: 2419 switch (cast<CondCodeSDNode>(this)->get()) { 2420 default: assert(0 && "Unknown setcc condition!"); 2421 case ISD::SETOEQ: return "setoeq"; 2422 case ISD::SETOGT: return "setogt"; 2423 case ISD::SETOGE: return "setoge"; 2424 case ISD::SETOLT: return "setolt"; 2425 case ISD::SETOLE: return "setole"; 2426 case ISD::SETONE: return "setone"; 2427 2428 case ISD::SETO: return "seto"; 2429 case ISD::SETUO: return "setuo"; 2430 case ISD::SETUEQ: return "setue"; 2431 case ISD::SETUGT: return "setugt"; 2432 case ISD::SETUGE: return "setuge"; 2433 case ISD::SETULT: return "setult"; 2434 case ISD::SETULE: return "setule"; 2435 case ISD::SETUNE: return "setune"; 2436 2437 case ISD::SETEQ: return "seteq"; 2438 case ISD::SETGT: return "setgt"; 2439 case ISD::SETGE: return "setge"; 2440 case ISD::SETLT: return "setlt"; 2441 case ISD::SETLE: return "setle"; 2442 case ISD::SETNE: return "setne"; 2443 } 2444 } 2445} 2446 2447void SDNode::dump() const { dump(0); } 2448void SDNode::dump(const SelectionDAG *G) const { 2449 std::cerr << (void*)this << ": "; 2450 2451 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 2452 if (i) std::cerr << ","; 2453 if (getValueType(i) == MVT::Other) 2454 std::cerr << "ch"; 2455 else 2456 std::cerr << MVT::getValueTypeString(getValueType(i)); 2457 } 2458 std::cerr << " = " << getOperationName(G); 2459 2460 std::cerr << " "; 2461 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 2462 if (i) std::cerr << ", "; 2463 std::cerr << (void*)getOperand(i).Val; 2464 if (unsigned RN = getOperand(i).ResNo) 2465 std::cerr << ":" << RN; 2466 } 2467 2468 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 2469 std::cerr << "<" << CSDN->getValue() << ">"; 2470 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 2471 std::cerr << "<" << CSDN->getValue() << ">"; 2472 } else if (const GlobalAddressSDNode *GADN = 2473 dyn_cast<GlobalAddressSDNode>(this)) { 2474 std::cerr << "<"; 2475 WriteAsOperand(std::cerr, GADN->getGlobal()) << ">"; 2476 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 2477 std::cerr << "<" << FIDN->getIndex() << ">"; 2478 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 2479 std::cerr << "<" << *CP->get() << ">"; 2480 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 2481 std::cerr << "<"; 2482 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 2483 if (LBB) 2484 std::cerr << LBB->getName() << " "; 2485 std::cerr << (const void*)BBDN->getBasicBlock() << ">"; 2486 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 2487 if (G && MRegisterInfo::isPhysicalRegister(R->getReg())) { 2488 std::cerr << " " <<G->getTarget().getRegisterInfo()->getName(R->getReg()); 2489 } else { 2490 std::cerr << " #" << R->getReg(); 2491 } 2492 } else if (const ExternalSymbolSDNode *ES = 2493 dyn_cast<ExternalSymbolSDNode>(this)) { 2494 std::cerr << "'" << ES->getSymbol() << "'"; 2495 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 2496 if (M->getValue()) 2497 std::cerr << "<" << M->getValue() << ":" << M->getOffset() << ">"; 2498 else 2499 std::cerr << "<null:" << M->getOffset() << ">"; 2500 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 2501 std::cerr << ":" << getValueTypeString(N->getVT()); 2502 } 2503} 2504 2505static void DumpNodes(SDNode *N, unsigned indent, const SelectionDAG *G) { 2506 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 2507 if (N->getOperand(i).Val->hasOneUse()) 2508 DumpNodes(N->getOperand(i).Val, indent+2, G); 2509 else 2510 std::cerr << "\n" << std::string(indent+2, ' ') 2511 << (void*)N->getOperand(i).Val << ": <multiple use>"; 2512 2513 2514 std::cerr << "\n" << std::string(indent, ' '); 2515 N->dump(G); 2516} 2517 2518void SelectionDAG::dump() const { 2519 std::cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 2520 std::vector<SDNode*> Nodes(AllNodes); 2521 std::sort(Nodes.begin(), Nodes.end()); 2522 2523 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) { 2524 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val) 2525 DumpNodes(Nodes[i], 2, this); 2526 } 2527 2528 DumpNodes(getRoot().Val, 2, this); 2529 2530 std::cerr << "\n\n"; 2531} 2532 2533