SelectionDAG.cpp revision 041cde26eaf4ef6171ff1a44aeedd08d7a1cba6c
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13#include "llvm/CodeGen/SelectionDAG.h" 14#include "llvm/Constants.h" 15#include "llvm/GlobalAlias.h" 16#include "llvm/GlobalVariable.h" 17#include "llvm/Intrinsics.h" 18#include "llvm/DerivedTypes.h" 19#include "llvm/Assembly/Writer.h" 20#include "llvm/CallingConv.h" 21#include "llvm/CodeGen/MachineBasicBlock.h" 22#include "llvm/CodeGen/MachineConstantPool.h" 23#include "llvm/CodeGen/MachineFrameInfo.h" 24#include "llvm/CodeGen/MachineModuleInfo.h" 25#include "llvm/CodeGen/PseudoSourceValue.h" 26#include "llvm/Support/MathExtras.h" 27#include "llvm/Target/TargetRegisterInfo.h" 28#include "llvm/Target/TargetData.h" 29#include "llvm/Target/TargetLowering.h" 30#include "llvm/Target/TargetInstrInfo.h" 31#include "llvm/Target/TargetMachine.h" 32#include "llvm/ADT/SetVector.h" 33#include "llvm/ADT/SmallPtrSet.h" 34#include "llvm/ADT/SmallSet.h" 35#include "llvm/ADT/SmallVector.h" 36#include "llvm/ADT/StringExtras.h" 37#include <algorithm> 38#include <cmath> 39using namespace llvm; 40 41/// makeVTList - Return an instance of the SDVTList struct initialized with the 42/// specified members. 43static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) { 44 SDVTList Res = {VTs, NumVTs}; 45 return Res; 46} 47 48static const fltSemantics *MVTToAPFloatSemantics(MVT VT) { 49 switch (VT.getSimpleVT()) { 50 default: assert(0 && "Unknown FP format"); 51 case MVT::f32: return &APFloat::IEEEsingle; 52 case MVT::f64: return &APFloat::IEEEdouble; 53 case MVT::f80: return &APFloat::x87DoubleExtended; 54 case MVT::f128: return &APFloat::IEEEquad; 55 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 56 } 57} 58 59SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 60 61//===----------------------------------------------------------------------===// 62// ConstantFPSDNode Class 63//===----------------------------------------------------------------------===// 64 65/// isExactlyValue - We don't rely on operator== working on double values, as 66/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 67/// As such, this method can be used to do an exact bit-for-bit comparison of 68/// two floating point values. 69bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 70 return Value.bitwiseIsEqual(V); 71} 72 73bool ConstantFPSDNode::isValueValidForType(MVT VT, 74 const APFloat& Val) { 75 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 76 77 // PPC long double cannot be converted to any other type. 78 if (VT == MVT::ppcf128 || 79 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 80 return false; 81 82 // convert modifies in place, so make a copy. 83 APFloat Val2 = APFloat(Val); 84 return Val2.convert(*MVTToAPFloatSemantics(VT), 85 APFloat::rmNearestTiesToEven) == APFloat::opOK; 86} 87 88//===----------------------------------------------------------------------===// 89// ISD Namespace 90//===----------------------------------------------------------------------===// 91 92/// isBuildVectorAllOnes - Return true if the specified node is a 93/// BUILD_VECTOR where all of the elements are ~0 or undef. 94bool ISD::isBuildVectorAllOnes(const SDNode *N) { 95 // Look through a bit convert. 96 if (N->getOpcode() == ISD::BIT_CONVERT) 97 N = N->getOperand(0).Val; 98 99 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 100 101 unsigned i = 0, e = N->getNumOperands(); 102 103 // Skip over all of the undef values. 104 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 105 ++i; 106 107 // Do not accept an all-undef vector. 108 if (i == e) return false; 109 110 // Do not accept build_vectors that aren't all constants or which have non-~0 111 // elements. 112 SDOperand NotZero = N->getOperand(i); 113 if (isa<ConstantSDNode>(NotZero)) { 114 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 115 return false; 116 } else if (isa<ConstantFPSDNode>(NotZero)) { 117 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 118 convertToAPInt().isAllOnesValue()) 119 return false; 120 } else 121 return false; 122 123 // Okay, we have at least one ~0 value, check to see if the rest match or are 124 // undefs. 125 for (++i; i != e; ++i) 126 if (N->getOperand(i) != NotZero && 127 N->getOperand(i).getOpcode() != ISD::UNDEF) 128 return false; 129 return true; 130} 131 132 133/// isBuildVectorAllZeros - Return true if the specified node is a 134/// BUILD_VECTOR where all of the elements are 0 or undef. 135bool ISD::isBuildVectorAllZeros(const SDNode *N) { 136 // Look through a bit convert. 137 if (N->getOpcode() == ISD::BIT_CONVERT) 138 N = N->getOperand(0).Val; 139 140 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 141 142 unsigned i = 0, e = N->getNumOperands(); 143 144 // Skip over all of the undef values. 145 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 146 ++i; 147 148 // Do not accept an all-undef vector. 149 if (i == e) return false; 150 151 // Do not accept build_vectors that aren't all constants or which have non-~0 152 // elements. 153 SDOperand Zero = N->getOperand(i); 154 if (isa<ConstantSDNode>(Zero)) { 155 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 156 return false; 157 } else if (isa<ConstantFPSDNode>(Zero)) { 158 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 159 return false; 160 } else 161 return false; 162 163 // Okay, we have at least one ~0 value, check to see if the rest match or are 164 // undefs. 165 for (++i; i != e; ++i) 166 if (N->getOperand(i) != Zero && 167 N->getOperand(i).getOpcode() != ISD::UNDEF) 168 return false; 169 return true; 170} 171 172/// isScalarToVector - Return true if the specified node is a 173/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 174/// element is not an undef. 175bool ISD::isScalarToVector(const SDNode *N) { 176 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 177 return true; 178 179 if (N->getOpcode() != ISD::BUILD_VECTOR) 180 return false; 181 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 182 return false; 183 unsigned NumElems = N->getNumOperands(); 184 for (unsigned i = 1; i < NumElems; ++i) { 185 SDOperand V = N->getOperand(i); 186 if (V.getOpcode() != ISD::UNDEF) 187 return false; 188 } 189 return true; 190} 191 192 193/// isDebugLabel - Return true if the specified node represents a debug 194/// label (i.e. ISD::LABEL or TargetInstrInfo::LABEL node and third operand 195/// is 0). 196bool ISD::isDebugLabel(const SDNode *N) { 197 SDOperand Zero; 198 if (N->getOpcode() == ISD::LABEL) 199 Zero = N->getOperand(2); 200 else if (N->isTargetOpcode() && 201 N->getTargetOpcode() == TargetInstrInfo::LABEL) 202 // Chain moved to last operand. 203 Zero = N->getOperand(1); 204 else 205 return false; 206 return isa<ConstantSDNode>(Zero) && cast<ConstantSDNode>(Zero)->isNullValue(); 207} 208 209/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 210/// when given the operation for (X op Y). 211ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 212 // To perform this operation, we just need to swap the L and G bits of the 213 // operation. 214 unsigned OldL = (Operation >> 2) & 1; 215 unsigned OldG = (Operation >> 1) & 1; 216 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 217 (OldL << 1) | // New G bit 218 (OldG << 2)); // New L bit. 219} 220 221/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 222/// 'op' is a valid SetCC operation. 223ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 224 unsigned Operation = Op; 225 if (isInteger) 226 Operation ^= 7; // Flip L, G, E bits, but not U. 227 else 228 Operation ^= 15; // Flip all of the condition bits. 229 if (Operation > ISD::SETTRUE2) 230 Operation &= ~8; // Don't let N and U bits get set. 231 return ISD::CondCode(Operation); 232} 233 234 235/// isSignedOp - For an integer comparison, return 1 if the comparison is a 236/// signed operation and 2 if the result is an unsigned comparison. Return zero 237/// if the operation does not depend on the sign of the input (setne and seteq). 238static int isSignedOp(ISD::CondCode Opcode) { 239 switch (Opcode) { 240 default: assert(0 && "Illegal integer setcc operation!"); 241 case ISD::SETEQ: 242 case ISD::SETNE: return 0; 243 case ISD::SETLT: 244 case ISD::SETLE: 245 case ISD::SETGT: 246 case ISD::SETGE: return 1; 247 case ISD::SETULT: 248 case ISD::SETULE: 249 case ISD::SETUGT: 250 case ISD::SETUGE: return 2; 251 } 252} 253 254/// getSetCCOrOperation - Return the result of a logical OR between different 255/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 256/// returns SETCC_INVALID if it is not possible to represent the resultant 257/// comparison. 258ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 259 bool isInteger) { 260 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 261 // Cannot fold a signed integer setcc with an unsigned integer setcc. 262 return ISD::SETCC_INVALID; 263 264 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 265 266 // If the N and U bits get set then the resultant comparison DOES suddenly 267 // care about orderedness, and is true when ordered. 268 if (Op > ISD::SETTRUE2) 269 Op &= ~16; // Clear the U bit if the N bit is set. 270 271 // Canonicalize illegal integer setcc's. 272 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 273 Op = ISD::SETNE; 274 275 return ISD::CondCode(Op); 276} 277 278/// getSetCCAndOperation - Return the result of a logical AND between different 279/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 280/// function returns zero if it is not possible to represent the resultant 281/// comparison. 282ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 283 bool isInteger) { 284 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 285 // Cannot fold a signed setcc with an unsigned setcc. 286 return ISD::SETCC_INVALID; 287 288 // Combine all of the condition bits. 289 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 290 291 // Canonicalize illegal integer setcc's. 292 if (isInteger) { 293 switch (Result) { 294 default: break; 295 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 296 case ISD::SETOEQ: // SETEQ & SETU[LG]E 297 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 298 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 299 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 300 } 301 } 302 303 return Result; 304} 305 306const TargetMachine &SelectionDAG::getTarget() const { 307 return TLI.getTargetMachine(); 308} 309 310//===----------------------------------------------------------------------===// 311// SDNode Profile Support 312//===----------------------------------------------------------------------===// 313 314/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 315/// 316static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 317 ID.AddInteger(OpC); 318} 319 320/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 321/// solely with their pointer. 322static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 323 ID.AddPointer(VTList.VTs); 324} 325 326/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 327/// 328static void AddNodeIDOperands(FoldingSetNodeID &ID, 329 SDOperandPtr Ops, unsigned NumOps) { 330 for (; NumOps; --NumOps, ++Ops) { 331 ID.AddPointer(Ops->Val); 332 ID.AddInteger(Ops->ResNo); 333 } 334} 335 336static void AddNodeIDNode(FoldingSetNodeID &ID, 337 unsigned short OpC, SDVTList VTList, 338 SDOperandPtr OpList, unsigned N) { 339 AddNodeIDOpcode(ID, OpC); 340 AddNodeIDValueTypes(ID, VTList); 341 AddNodeIDOperands(ID, OpList, N); 342} 343 344 345/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 346/// data. 347static void AddNodeIDNode(FoldingSetNodeID &ID, SDNode *N) { 348 AddNodeIDOpcode(ID, N->getOpcode()); 349 // Add the return value info. 350 AddNodeIDValueTypes(ID, N->getVTList()); 351 // Add the operand info. 352 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 353 354 // Handle SDNode leafs with special info. 355 switch (N->getOpcode()) { 356 default: break; // Normal nodes don't need extra info. 357 case ISD::ARG_FLAGS: 358 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits()); 359 break; 360 case ISD::TargetConstant: 361 case ISD::Constant: 362 ID.Add(cast<ConstantSDNode>(N)->getAPIntValue()); 363 break; 364 case ISD::TargetConstantFP: 365 case ISD::ConstantFP: { 366 ID.Add(cast<ConstantFPSDNode>(N)->getValueAPF()); 367 break; 368 } 369 case ISD::TargetGlobalAddress: 370 case ISD::GlobalAddress: 371 case ISD::TargetGlobalTLSAddress: 372 case ISD::GlobalTLSAddress: { 373 GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 374 ID.AddPointer(GA->getGlobal()); 375 ID.AddInteger(GA->getOffset()); 376 break; 377 } 378 case ISD::BasicBlock: 379 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 380 break; 381 case ISD::Register: 382 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 383 break; 384 case ISD::SRCVALUE: 385 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 386 break; 387 case ISD::MEMOPERAND: { 388 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO; 389 ID.AddPointer(MO.getValue()); 390 ID.AddInteger(MO.getFlags()); 391 ID.AddInteger(MO.getOffset()); 392 ID.AddInteger(MO.getSize()); 393 ID.AddInteger(MO.getAlignment()); 394 break; 395 } 396 case ISD::FrameIndex: 397 case ISD::TargetFrameIndex: 398 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 399 break; 400 case ISD::JumpTable: 401 case ISD::TargetJumpTable: 402 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 403 break; 404 case ISD::ConstantPool: 405 case ISD::TargetConstantPool: { 406 ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 407 ID.AddInteger(CP->getAlignment()); 408 ID.AddInteger(CP->getOffset()); 409 if (CP->isMachineConstantPoolEntry()) 410 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 411 else 412 ID.AddPointer(CP->getConstVal()); 413 break; 414 } 415 case ISD::LOAD: { 416 LoadSDNode *LD = cast<LoadSDNode>(N); 417 ID.AddInteger(LD->getAddressingMode()); 418 ID.AddInteger(LD->getExtensionType()); 419 ID.AddInteger(LD->getMemoryVT().getRawBits()); 420 ID.AddInteger(LD->getAlignment()); 421 ID.AddInteger(LD->isVolatile()); 422 break; 423 } 424 case ISD::STORE: { 425 StoreSDNode *ST = cast<StoreSDNode>(N); 426 ID.AddInteger(ST->getAddressingMode()); 427 ID.AddInteger(ST->isTruncatingStore()); 428 ID.AddInteger(ST->getMemoryVT().getRawBits()); 429 ID.AddInteger(ST->getAlignment()); 430 ID.AddInteger(ST->isVolatile()); 431 break; 432 } 433 case ISD::ATOMIC_CMP_SWAP: 434 case ISD::ATOMIC_LOAD_ADD: 435 case ISD::ATOMIC_SWAP: 436 case ISD::ATOMIC_LOAD_SUB: 437 case ISD::ATOMIC_LOAD_AND: 438 case ISD::ATOMIC_LOAD_OR: 439 case ISD::ATOMIC_LOAD_XOR: 440 case ISD::ATOMIC_LOAD_NAND: 441 case ISD::ATOMIC_LOAD_MIN: 442 case ISD::ATOMIC_LOAD_MAX: 443 case ISD::ATOMIC_LOAD_UMIN: 444 case ISD::ATOMIC_LOAD_UMAX: { 445 AtomicSDNode *AT = cast<AtomicSDNode>(N); 446 ID.AddInteger(AT->getAlignment()); 447 ID.AddInteger(AT->isVolatile()); 448 break; 449 } 450 } // end switch (N->getOpcode()) 451} 452 453//===----------------------------------------------------------------------===// 454// SelectionDAG Class 455//===----------------------------------------------------------------------===// 456 457/// RemoveDeadNodes - This method deletes all unreachable nodes in the 458/// SelectionDAG. 459void SelectionDAG::RemoveDeadNodes() { 460 // Create a dummy node (which is not added to allnodes), that adds a reference 461 // to the root node, preventing it from being deleted. 462 HandleSDNode Dummy(getRoot()); 463 464 SmallVector<SDNode*, 128> DeadNodes; 465 466 // Add all obviously-dead nodes to the DeadNodes worklist. 467 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 468 if (I->use_empty()) 469 DeadNodes.push_back(I); 470 471 // Process the worklist, deleting the nodes and adding their uses to the 472 // worklist. 473 while (!DeadNodes.empty()) { 474 SDNode *N = DeadNodes.back(); 475 DeadNodes.pop_back(); 476 477 // Take the node out of the appropriate CSE map. 478 RemoveNodeFromCSEMaps(N); 479 480 // Next, brutally remove the operand list. This is safe to do, as there are 481 // no cycles in the graph. 482 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 483 SDNode *Operand = I->getVal(); 484 Operand->removeUser(std::distance(N->op_begin(), I), N); 485 486 // Now that we removed this operand, see if there are no uses of it left. 487 if (Operand->use_empty()) 488 DeadNodes.push_back(Operand); 489 } 490 if (N->OperandsNeedDelete) { 491 delete[] N->OperandList; 492 } 493 N->OperandList = 0; 494 N->NumOperands = 0; 495 496 // Finally, remove N itself. 497 AllNodes.erase(N); 498 } 499 500 // If the root changed (e.g. it was a dead load, update the root). 501 setRoot(Dummy.getValue()); 502} 503 504void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 505 SmallVector<SDNode*, 16> DeadNodes; 506 DeadNodes.push_back(N); 507 508 // Process the worklist, deleting the nodes and adding their uses to the 509 // worklist. 510 while (!DeadNodes.empty()) { 511 SDNode *N = DeadNodes.back(); 512 DeadNodes.pop_back(); 513 514 if (UpdateListener) 515 UpdateListener->NodeDeleted(N, 0); 516 517 // Take the node out of the appropriate CSE map. 518 RemoveNodeFromCSEMaps(N); 519 520 // Next, brutally remove the operand list. This is safe to do, as there are 521 // no cycles in the graph. 522 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 523 SDNode *Operand = I->getVal(); 524 Operand->removeUser(std::distance(N->op_begin(), I), N); 525 526 // Now that we removed this operand, see if there are no uses of it left. 527 if (Operand->use_empty()) 528 DeadNodes.push_back(Operand); 529 } 530 if (N->OperandsNeedDelete) { 531 delete[] N->OperandList; 532 } 533 N->OperandList = 0; 534 N->NumOperands = 0; 535 536 // Finally, remove N itself. 537 AllNodes.erase(N); 538 } 539} 540 541void SelectionDAG::DeleteNode(SDNode *N) { 542 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 543 544 // First take this out of the appropriate CSE map. 545 RemoveNodeFromCSEMaps(N); 546 547 // Finally, remove uses due to operands of this node, remove from the 548 // AllNodes list, and delete the node. 549 DeleteNodeNotInCSEMaps(N); 550} 551 552void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 553 554 // Remove it from the AllNodes list. 555 AllNodes.remove(N); 556 557 // Drop all of the operands and decrement used nodes use counts. 558 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 559 I->getVal()->removeUser(std::distance(N->op_begin(), I), N); 560 if (N->OperandsNeedDelete) { 561 delete[] N->OperandList; 562 } 563 N->OperandList = 0; 564 N->NumOperands = 0; 565 566 delete N; 567} 568 569/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 570/// correspond to it. This is useful when we're about to delete or repurpose 571/// the node. We don't want future request for structurally identical nodes 572/// to return N anymore. 573void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 574 bool Erased = false; 575 switch (N->getOpcode()) { 576 case ISD::HANDLENODE: return; // noop. 577 case ISD::STRING: 578 Erased = StringNodes.erase(cast<StringSDNode>(N)->getValue()); 579 break; 580 case ISD::CONDCODE: 581 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 582 "Cond code doesn't exist!"); 583 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 584 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 585 break; 586 case ISD::ExternalSymbol: 587 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 588 break; 589 case ISD::TargetExternalSymbol: 590 Erased = 591 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 592 break; 593 case ISD::VALUETYPE: { 594 MVT VT = cast<VTSDNode>(N)->getVT(); 595 if (VT.isExtended()) { 596 Erased = ExtendedValueTypeNodes.erase(VT); 597 } else { 598 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0; 599 ValueTypeNodes[VT.getSimpleVT()] = 0; 600 } 601 break; 602 } 603 default: 604 // Remove it from the CSE Map. 605 Erased = CSEMap.RemoveNode(N); 606 break; 607 } 608#ifndef NDEBUG 609 // Verify that the node was actually in one of the CSE maps, unless it has a 610 // flag result (which cannot be CSE'd) or is one of the special cases that are 611 // not subject to CSE. 612 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 613 !N->isTargetOpcode()) { 614 N->dump(this); 615 cerr << "\n"; 616 assert(0 && "Node is not in map!"); 617 } 618#endif 619} 620 621/// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It 622/// has been taken out and modified in some way. If the specified node already 623/// exists in the CSE maps, do not modify the maps, but return the existing node 624/// instead. If it doesn't exist, add it and return null. 625/// 626SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) { 627 assert(N->getNumOperands() && "This is a leaf node!"); 628 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) 629 return 0; // Never add these nodes. 630 631 // Check that remaining values produced are not flags. 632 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 633 if (N->getValueType(i) == MVT::Flag) 634 return 0; // Never CSE anything that produces a flag. 635 636 SDNode *New = CSEMap.GetOrInsertNode(N); 637 if (New != N) return New; // Node already existed. 638 return 0; 639} 640 641/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 642/// were replaced with those specified. If this node is never memoized, 643/// return null, otherwise return a pointer to the slot it would take. If a 644/// node already exists with these operands, the slot will be non-null. 645SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDOperand Op, 646 void *&InsertPos) { 647 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) 648 return 0; // Never add these nodes. 649 650 // Check that remaining values produced are not flags. 651 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 652 if (N->getValueType(i) == MVT::Flag) 653 return 0; // Never CSE anything that produces a flag. 654 655 SDOperand Ops[] = { Op }; 656 FoldingSetNodeID ID; 657 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 658 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 659} 660 661/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 662/// were replaced with those specified. If this node is never memoized, 663/// return null, otherwise return a pointer to the slot it would take. If a 664/// node already exists with these operands, the slot will be non-null. 665SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 666 SDOperand Op1, SDOperand Op2, 667 void *&InsertPos) { 668 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) 669 return 0; // Never add these nodes. 670 671 // Check that remaining values produced are not flags. 672 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 673 if (N->getValueType(i) == MVT::Flag) 674 return 0; // Never CSE anything that produces a flag. 675 676 SDOperand Ops[] = { Op1, Op2 }; 677 FoldingSetNodeID ID; 678 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 679 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 680} 681 682 683/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 684/// were replaced with those specified. If this node is never memoized, 685/// return null, otherwise return a pointer to the slot it would take. If a 686/// node already exists with these operands, the slot will be non-null. 687SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 688 SDOperandPtr Ops,unsigned NumOps, 689 void *&InsertPos) { 690 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) 691 return 0; // Never add these nodes. 692 693 // Check that remaining values produced are not flags. 694 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 695 if (N->getValueType(i) == MVT::Flag) 696 return 0; // Never CSE anything that produces a flag. 697 698 FoldingSetNodeID ID; 699 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 700 701 if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) { 702 ID.AddInteger(LD->getAddressingMode()); 703 ID.AddInteger(LD->getExtensionType()); 704 ID.AddInteger(LD->getMemoryVT().getRawBits()); 705 ID.AddInteger(LD->getAlignment()); 706 ID.AddInteger(LD->isVolatile()); 707 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) { 708 ID.AddInteger(ST->getAddressingMode()); 709 ID.AddInteger(ST->isTruncatingStore()); 710 ID.AddInteger(ST->getMemoryVT().getRawBits()); 711 ID.AddInteger(ST->getAlignment()); 712 ID.AddInteger(ST->isVolatile()); 713 } 714 715 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 716} 717 718 719SelectionDAG::~SelectionDAG() { 720 while (!AllNodes.empty()) { 721 SDNode *N = AllNodes.begin(); 722 N->SetNextInBucket(0); 723 if (N->OperandsNeedDelete) { 724 delete [] N->OperandList; 725 } 726 N->OperandList = 0; 727 N->NumOperands = 0; 728 AllNodes.pop_front(); 729 } 730} 731 732SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT VT) { 733 if (Op.getValueType() == VT) return Op; 734 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 735 VT.getSizeInBits()); 736 return getNode(ISD::AND, Op.getValueType(), Op, 737 getConstant(Imm, Op.getValueType())); 738} 739 740SDOperand SelectionDAG::getString(const std::string &Val) { 741 StringSDNode *&N = StringNodes[Val]; 742 if (!N) { 743 N = new StringSDNode(Val); 744 AllNodes.push_back(N); 745 } 746 return SDOperand(N, 0); 747} 748 749SDOperand SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) { 750 MVT EltVT = 751 VT.isVector() ? VT.getVectorElementType() : VT; 752 753 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 754} 755 756SDOperand SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) { 757 assert(VT.isInteger() && "Cannot create FP integer constant!"); 758 759 MVT EltVT = 760 VT.isVector() ? VT.getVectorElementType() : VT; 761 762 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 763 "APInt size does not match type size!"); 764 765 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 766 FoldingSetNodeID ID; 767 AddNodeIDNode(ID, Opc, getVTList(EltVT), (SDOperand*)0, 0); 768 ID.Add(Val); 769 void *IP = 0; 770 SDNode *N = NULL; 771 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 772 if (!VT.isVector()) 773 return SDOperand(N, 0); 774 if (!N) { 775 N = new ConstantSDNode(isT, Val, EltVT); 776 CSEMap.InsertNode(N, IP); 777 AllNodes.push_back(N); 778 } 779 780 SDOperand Result(N, 0); 781 if (VT.isVector()) { 782 SmallVector<SDOperand, 8> Ops; 783 Ops.assign(VT.getVectorNumElements(), Result); 784 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 785 } 786 return Result; 787} 788 789SDOperand SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 790 return getConstant(Val, TLI.getPointerTy(), isTarget); 791} 792 793 794SDOperand SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) { 795 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 796 797 MVT EltVT = 798 VT.isVector() ? VT.getVectorElementType() : VT; 799 800 // Do the map lookup using the actual bit pattern for the floating point 801 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 802 // we don't have issues with SNANs. 803 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 804 FoldingSetNodeID ID; 805 AddNodeIDNode(ID, Opc, getVTList(EltVT), (SDOperand*)0, 0); 806 ID.Add(V); 807 void *IP = 0; 808 SDNode *N = NULL; 809 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 810 if (!VT.isVector()) 811 return SDOperand(N, 0); 812 if (!N) { 813 N = new ConstantFPSDNode(isTarget, V, EltVT); 814 CSEMap.InsertNode(N, IP); 815 AllNodes.push_back(N); 816 } 817 818 SDOperand Result(N, 0); 819 if (VT.isVector()) { 820 SmallVector<SDOperand, 8> Ops; 821 Ops.assign(VT.getVectorNumElements(), Result); 822 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 823 } 824 return Result; 825} 826 827SDOperand SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) { 828 MVT EltVT = 829 VT.isVector() ? VT.getVectorElementType() : VT; 830 if (EltVT==MVT::f32) 831 return getConstantFP(APFloat((float)Val), VT, isTarget); 832 else 833 return getConstantFP(APFloat(Val), VT, isTarget); 834} 835 836SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV, 837 MVT VT, int Offset, 838 bool isTargetGA) { 839 unsigned Opc; 840 841 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 842 if (!GVar) { 843 // If GV is an alias then use the aliasee for determining thread-localness. 844 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 845 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal()); 846 } 847 848 if (GVar && GVar->isThreadLocal()) 849 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 850 else 851 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 852 853 FoldingSetNodeID ID; 854 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0); 855 ID.AddPointer(GV); 856 ID.AddInteger(Offset); 857 void *IP = 0; 858 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 859 return SDOperand(E, 0); 860 SDNode *N = new GlobalAddressSDNode(isTargetGA, GV, VT, Offset); 861 CSEMap.InsertNode(N, IP); 862 AllNodes.push_back(N); 863 return SDOperand(N, 0); 864} 865 866SDOperand SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) { 867 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 868 FoldingSetNodeID ID; 869 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0); 870 ID.AddInteger(FI); 871 void *IP = 0; 872 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 873 return SDOperand(E, 0); 874 SDNode *N = new FrameIndexSDNode(FI, VT, isTarget); 875 CSEMap.InsertNode(N, IP); 876 AllNodes.push_back(N); 877 return SDOperand(N, 0); 878} 879 880SDOperand SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){ 881 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 882 FoldingSetNodeID ID; 883 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0); 884 ID.AddInteger(JTI); 885 void *IP = 0; 886 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 887 return SDOperand(E, 0); 888 SDNode *N = new JumpTableSDNode(JTI, VT, isTarget); 889 CSEMap.InsertNode(N, IP); 890 AllNodes.push_back(N); 891 return SDOperand(N, 0); 892} 893 894SDOperand SelectionDAG::getConstantPool(Constant *C, MVT VT, 895 unsigned Alignment, int Offset, 896 bool isTarget) { 897 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 898 FoldingSetNodeID ID; 899 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0); 900 ID.AddInteger(Alignment); 901 ID.AddInteger(Offset); 902 ID.AddPointer(C); 903 void *IP = 0; 904 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 905 return SDOperand(E, 0); 906 SDNode *N = new ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 907 CSEMap.InsertNode(N, IP); 908 AllNodes.push_back(N); 909 return SDOperand(N, 0); 910} 911 912 913SDOperand SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT, 914 unsigned Alignment, int Offset, 915 bool isTarget) { 916 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 917 FoldingSetNodeID ID; 918 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0); 919 ID.AddInteger(Alignment); 920 ID.AddInteger(Offset); 921 C->AddSelectionDAGCSEId(ID); 922 void *IP = 0; 923 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 924 return SDOperand(E, 0); 925 SDNode *N = new ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 926 CSEMap.InsertNode(N, IP); 927 AllNodes.push_back(N); 928 return SDOperand(N, 0); 929} 930 931 932SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 933 FoldingSetNodeID ID; 934 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), (SDOperand*)0, 0); 935 ID.AddPointer(MBB); 936 void *IP = 0; 937 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 938 return SDOperand(E, 0); 939 SDNode *N = new BasicBlockSDNode(MBB); 940 CSEMap.InsertNode(N, IP); 941 AllNodes.push_back(N); 942 return SDOperand(N, 0); 943} 944 945SDOperand SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) { 946 FoldingSetNodeID ID; 947 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), (SDOperand*)0, 0); 948 ID.AddInteger(Flags.getRawBits()); 949 void *IP = 0; 950 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 951 return SDOperand(E, 0); 952 SDNode *N = new ARG_FLAGSSDNode(Flags); 953 CSEMap.InsertNode(N, IP); 954 AllNodes.push_back(N); 955 return SDOperand(N, 0); 956} 957 958SDOperand SelectionDAG::getValueType(MVT VT) { 959 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size()) 960 ValueTypeNodes.resize(VT.getSimpleVT()+1); 961 962 SDNode *&N = VT.isExtended() ? 963 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()]; 964 965 if (N) return SDOperand(N, 0); 966 N = new VTSDNode(VT); 967 AllNodes.push_back(N); 968 return SDOperand(N, 0); 969} 970 971SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) { 972 SDNode *&N = ExternalSymbols[Sym]; 973 if (N) return SDOperand(N, 0); 974 N = new ExternalSymbolSDNode(false, Sym, VT); 975 AllNodes.push_back(N); 976 return SDOperand(N, 0); 977} 978 979SDOperand SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) { 980 SDNode *&N = TargetExternalSymbols[Sym]; 981 if (N) return SDOperand(N, 0); 982 N = new ExternalSymbolSDNode(true, Sym, VT); 983 AllNodes.push_back(N); 984 return SDOperand(N, 0); 985} 986 987SDOperand SelectionDAG::getCondCode(ISD::CondCode Cond) { 988 if ((unsigned)Cond >= CondCodeNodes.size()) 989 CondCodeNodes.resize(Cond+1); 990 991 if (CondCodeNodes[Cond] == 0) { 992 CondCodeNodes[Cond] = new CondCodeSDNode(Cond); 993 AllNodes.push_back(CondCodeNodes[Cond]); 994 } 995 return SDOperand(CondCodeNodes[Cond], 0); 996} 997 998SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT VT) { 999 FoldingSetNodeID ID; 1000 AddNodeIDNode(ID, ISD::Register, getVTList(VT), (SDOperand*)0, 0); 1001 ID.AddInteger(RegNo); 1002 void *IP = 0; 1003 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1004 return SDOperand(E, 0); 1005 SDNode *N = new RegisterSDNode(RegNo, VT); 1006 CSEMap.InsertNode(N, IP); 1007 AllNodes.push_back(N); 1008 return SDOperand(N, 0); 1009} 1010 1011SDOperand SelectionDAG::getSrcValue(const Value *V) { 1012 assert((!V || isa<PointerType>(V->getType())) && 1013 "SrcValue is not a pointer?"); 1014 1015 FoldingSetNodeID ID; 1016 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), (SDOperand*)0, 0); 1017 ID.AddPointer(V); 1018 1019 void *IP = 0; 1020 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1021 return SDOperand(E, 0); 1022 1023 SDNode *N = new SrcValueSDNode(V); 1024 CSEMap.InsertNode(N, IP); 1025 AllNodes.push_back(N); 1026 return SDOperand(N, 0); 1027} 1028 1029SDOperand SelectionDAG::getMemOperand(const MachineMemOperand &MO) { 1030 const Value *v = MO.getValue(); 1031 assert((!v || isa<PointerType>(v->getType())) && 1032 "SrcValue is not a pointer?"); 1033 1034 FoldingSetNodeID ID; 1035 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), (SDOperand*)0, 0); 1036 ID.AddPointer(v); 1037 ID.AddInteger(MO.getFlags()); 1038 ID.AddInteger(MO.getOffset()); 1039 ID.AddInteger(MO.getSize()); 1040 ID.AddInteger(MO.getAlignment()); 1041 1042 void *IP = 0; 1043 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1044 return SDOperand(E, 0); 1045 1046 SDNode *N = new MemOperandSDNode(MO); 1047 CSEMap.InsertNode(N, IP); 1048 AllNodes.push_back(N); 1049 return SDOperand(N, 0); 1050} 1051 1052/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1053/// specified value type. 1054SDOperand SelectionDAG::CreateStackTemporary(MVT VT) { 1055 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1056 unsigned ByteSize = VT.getSizeInBits()/8; 1057 const Type *Ty = VT.getTypeForMVT(); 1058 unsigned StackAlign = (unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty); 1059 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign); 1060 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1061} 1062 1063 1064SDOperand SelectionDAG::FoldSetCC(MVT VT, SDOperand N1, 1065 SDOperand N2, ISD::CondCode Cond) { 1066 // These setcc operations always fold. 1067 switch (Cond) { 1068 default: break; 1069 case ISD::SETFALSE: 1070 case ISD::SETFALSE2: return getConstant(0, VT); 1071 case ISD::SETTRUE: 1072 case ISD::SETTRUE2: return getConstant(1, VT); 1073 1074 case ISD::SETOEQ: 1075 case ISD::SETOGT: 1076 case ISD::SETOGE: 1077 case ISD::SETOLT: 1078 case ISD::SETOLE: 1079 case ISD::SETONE: 1080 case ISD::SETO: 1081 case ISD::SETUO: 1082 case ISD::SETUEQ: 1083 case ISD::SETUNE: 1084 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1085 break; 1086 } 1087 1088 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) { 1089 const APInt &C2 = N2C->getAPIntValue(); 1090 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 1091 const APInt &C1 = N1C->getAPIntValue(); 1092 1093 switch (Cond) { 1094 default: assert(0 && "Unknown integer setcc!"); 1095 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1096 case ISD::SETNE: return getConstant(C1 != C2, VT); 1097 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1098 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1099 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1100 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1101 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1102 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1103 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1104 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1105 } 1106 } 1107 } 1108 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) { 1109 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) { 1110 // No compile time operations on this type yet. 1111 if (N1C->getValueType(0) == MVT::ppcf128) 1112 return SDOperand(); 1113 1114 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1115 switch (Cond) { 1116 default: break; 1117 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1118 return getNode(ISD::UNDEF, VT); 1119 // fall through 1120 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1121 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1122 return getNode(ISD::UNDEF, VT); 1123 // fall through 1124 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1125 R==APFloat::cmpLessThan, VT); 1126 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1127 return getNode(ISD::UNDEF, VT); 1128 // fall through 1129 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1130 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1131 return getNode(ISD::UNDEF, VT); 1132 // fall through 1133 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1134 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1135 return getNode(ISD::UNDEF, VT); 1136 // fall through 1137 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1138 R==APFloat::cmpEqual, VT); 1139 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1140 return getNode(ISD::UNDEF, VT); 1141 // fall through 1142 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1143 R==APFloat::cmpEqual, VT); 1144 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1145 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1146 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1147 R==APFloat::cmpEqual, VT); 1148 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1149 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1150 R==APFloat::cmpLessThan, VT); 1151 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1152 R==APFloat::cmpUnordered, VT); 1153 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1154 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1155 } 1156 } else { 1157 // Ensure that the constant occurs on the RHS. 1158 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1159 } 1160 } 1161 1162 // Could not fold it. 1163 return SDOperand(); 1164} 1165 1166/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1167/// use this predicate to simplify operations downstream. 1168bool SelectionDAG::SignBitIsZero(SDOperand Op, unsigned Depth) const { 1169 unsigned BitWidth = Op.getValueSizeInBits(); 1170 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1171} 1172 1173/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1174/// this predicate to simplify operations downstream. Mask is known to be zero 1175/// for bits that V cannot have. 1176bool SelectionDAG::MaskedValueIsZero(SDOperand Op, const APInt &Mask, 1177 unsigned Depth) const { 1178 APInt KnownZero, KnownOne; 1179 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1180 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1181 return (KnownZero & Mask) == Mask; 1182} 1183 1184/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1185/// known to be either zero or one and return them in the KnownZero/KnownOne 1186/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1187/// processing. 1188void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask, 1189 APInt &KnownZero, APInt &KnownOne, 1190 unsigned Depth) const { 1191 unsigned BitWidth = Mask.getBitWidth(); 1192 assert(BitWidth == Op.getValueType().getSizeInBits() && 1193 "Mask size mismatches value type size!"); 1194 1195 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1196 if (Depth == 6 || Mask == 0) 1197 return; // Limit search depth. 1198 1199 APInt KnownZero2, KnownOne2; 1200 1201 switch (Op.getOpcode()) { 1202 case ISD::Constant: 1203 // We know all of the bits for a constant! 1204 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1205 KnownZero = ~KnownOne & Mask; 1206 return; 1207 case ISD::AND: 1208 // If either the LHS or the RHS are Zero, the result is zero. 1209 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1210 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1211 KnownZero2, KnownOne2, Depth+1); 1212 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1213 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1214 1215 // Output known-1 bits are only known if set in both the LHS & RHS. 1216 KnownOne &= KnownOne2; 1217 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1218 KnownZero |= KnownZero2; 1219 return; 1220 case ISD::OR: 1221 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1222 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1223 KnownZero2, KnownOne2, Depth+1); 1224 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1225 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1226 1227 // Output known-0 bits are only known if clear in both the LHS & RHS. 1228 KnownZero &= KnownZero2; 1229 // Output known-1 are known to be set if set in either the LHS | RHS. 1230 KnownOne |= KnownOne2; 1231 return; 1232 case ISD::XOR: { 1233 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1234 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1235 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1236 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1237 1238 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1239 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1240 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1241 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1242 KnownZero = KnownZeroOut; 1243 return; 1244 } 1245 case ISD::MUL: { 1246 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1247 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1248 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1249 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1250 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1251 1252 // If low bits are zero in either operand, output low known-0 bits. 1253 // Also compute a conserative estimate for high known-0 bits. 1254 // More trickiness is possible, but this is sufficient for the 1255 // interesting case of alignment computation. 1256 KnownOne.clear(); 1257 unsigned TrailZ = KnownZero.countTrailingOnes() + 1258 KnownZero2.countTrailingOnes(); 1259 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1260 KnownZero2.countLeadingOnes(), 1261 BitWidth) - BitWidth; 1262 1263 TrailZ = std::min(TrailZ, BitWidth); 1264 LeadZ = std::min(LeadZ, BitWidth); 1265 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1266 APInt::getHighBitsSet(BitWidth, LeadZ); 1267 KnownZero &= Mask; 1268 return; 1269 } 1270 case ISD::UDIV: { 1271 // For the purposes of computing leading zeros we can conservatively 1272 // treat a udiv as a logical right shift by the power of 2 known to 1273 // be less than the denominator. 1274 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1275 ComputeMaskedBits(Op.getOperand(0), 1276 AllOnes, KnownZero2, KnownOne2, Depth+1); 1277 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1278 1279 KnownOne2.clear(); 1280 KnownZero2.clear(); 1281 ComputeMaskedBits(Op.getOperand(1), 1282 AllOnes, KnownZero2, KnownOne2, Depth+1); 1283 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1284 if (RHSUnknownLeadingOnes != BitWidth) 1285 LeadZ = std::min(BitWidth, 1286 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1287 1288 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1289 return; 1290 } 1291 case ISD::SELECT: 1292 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1293 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1294 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1295 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1296 1297 // Only known if known in both the LHS and RHS. 1298 KnownOne &= KnownOne2; 1299 KnownZero &= KnownZero2; 1300 return; 1301 case ISD::SELECT_CC: 1302 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1303 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1304 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1305 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1306 1307 // Only known if known in both the LHS and RHS. 1308 KnownOne &= KnownOne2; 1309 KnownZero &= KnownZero2; 1310 return; 1311 case ISD::SETCC: 1312 // If we know the result of a setcc has the top bits zero, use this info. 1313 if (TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult && 1314 BitWidth > 1) 1315 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1316 return; 1317 case ISD::SHL: 1318 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1319 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1320 unsigned ShAmt = SA->getValue(); 1321 1322 // If the shift count is an invalid immediate, don't do anything. 1323 if (ShAmt >= BitWidth) 1324 return; 1325 1326 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1327 KnownZero, KnownOne, Depth+1); 1328 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1329 KnownZero <<= ShAmt; 1330 KnownOne <<= ShAmt; 1331 // low bits known zero. 1332 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1333 } 1334 return; 1335 case ISD::SRL: 1336 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1337 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1338 unsigned ShAmt = SA->getValue(); 1339 1340 // If the shift count is an invalid immediate, don't do anything. 1341 if (ShAmt >= BitWidth) 1342 return; 1343 1344 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1345 KnownZero, KnownOne, Depth+1); 1346 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1347 KnownZero = KnownZero.lshr(ShAmt); 1348 KnownOne = KnownOne.lshr(ShAmt); 1349 1350 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1351 KnownZero |= HighBits; // High bits known zero. 1352 } 1353 return; 1354 case ISD::SRA: 1355 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1356 unsigned ShAmt = SA->getValue(); 1357 1358 // If the shift count is an invalid immediate, don't do anything. 1359 if (ShAmt >= BitWidth) 1360 return; 1361 1362 APInt InDemandedMask = (Mask << ShAmt); 1363 // If any of the demanded bits are produced by the sign extension, we also 1364 // demand the input sign bit. 1365 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1366 if (HighBits.getBoolValue()) 1367 InDemandedMask |= APInt::getSignBit(BitWidth); 1368 1369 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1370 Depth+1); 1371 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1372 KnownZero = KnownZero.lshr(ShAmt); 1373 KnownOne = KnownOne.lshr(ShAmt); 1374 1375 // Handle the sign bits. 1376 APInt SignBit = APInt::getSignBit(BitWidth); 1377 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1378 1379 if (KnownZero.intersects(SignBit)) { 1380 KnownZero |= HighBits; // New bits are known zero. 1381 } else if (KnownOne.intersects(SignBit)) { 1382 KnownOne |= HighBits; // New bits are known one. 1383 } 1384 } 1385 return; 1386 case ISD::SIGN_EXTEND_INREG: { 1387 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1388 unsigned EBits = EVT.getSizeInBits(); 1389 1390 // Sign extension. Compute the demanded bits in the result that are not 1391 // present in the input. 1392 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1393 1394 APInt InSignBit = APInt::getSignBit(EBits); 1395 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1396 1397 // If the sign extended bits are demanded, we know that the sign 1398 // bit is demanded. 1399 InSignBit.zext(BitWidth); 1400 if (NewBits.getBoolValue()) 1401 InputDemandedBits |= InSignBit; 1402 1403 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1404 KnownZero, KnownOne, Depth+1); 1405 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1406 1407 // If the sign bit of the input is known set or clear, then we know the 1408 // top bits of the result. 1409 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1410 KnownZero |= NewBits; 1411 KnownOne &= ~NewBits; 1412 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1413 KnownOne |= NewBits; 1414 KnownZero &= ~NewBits; 1415 } else { // Input sign bit unknown 1416 KnownZero &= ~NewBits; 1417 KnownOne &= ~NewBits; 1418 } 1419 return; 1420 } 1421 case ISD::CTTZ: 1422 case ISD::CTLZ: 1423 case ISD::CTPOP: { 1424 unsigned LowBits = Log2_32(BitWidth)+1; 1425 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1426 KnownOne.clear(); 1427 return; 1428 } 1429 case ISD::LOAD: { 1430 if (ISD::isZEXTLoad(Op.Val)) { 1431 LoadSDNode *LD = cast<LoadSDNode>(Op); 1432 MVT VT = LD->getMemoryVT(); 1433 unsigned MemBits = VT.getSizeInBits(); 1434 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1435 } 1436 return; 1437 } 1438 case ISD::ZERO_EXTEND: { 1439 MVT InVT = Op.getOperand(0).getValueType(); 1440 unsigned InBits = InVT.getSizeInBits(); 1441 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1442 APInt InMask = Mask; 1443 InMask.trunc(InBits); 1444 KnownZero.trunc(InBits); 1445 KnownOne.trunc(InBits); 1446 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1447 KnownZero.zext(BitWidth); 1448 KnownOne.zext(BitWidth); 1449 KnownZero |= NewBits; 1450 return; 1451 } 1452 case ISD::SIGN_EXTEND: { 1453 MVT InVT = Op.getOperand(0).getValueType(); 1454 unsigned InBits = InVT.getSizeInBits(); 1455 APInt InSignBit = APInt::getSignBit(InBits); 1456 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1457 APInt InMask = Mask; 1458 InMask.trunc(InBits); 1459 1460 // If any of the sign extended bits are demanded, we know that the sign 1461 // bit is demanded. Temporarily set this bit in the mask for our callee. 1462 if (NewBits.getBoolValue()) 1463 InMask |= InSignBit; 1464 1465 KnownZero.trunc(InBits); 1466 KnownOne.trunc(InBits); 1467 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1468 1469 // Note if the sign bit is known to be zero or one. 1470 bool SignBitKnownZero = KnownZero.isNegative(); 1471 bool SignBitKnownOne = KnownOne.isNegative(); 1472 assert(!(SignBitKnownZero && SignBitKnownOne) && 1473 "Sign bit can't be known to be both zero and one!"); 1474 1475 // If the sign bit wasn't actually demanded by our caller, we don't 1476 // want it set in the KnownZero and KnownOne result values. Reset the 1477 // mask and reapply it to the result values. 1478 InMask = Mask; 1479 InMask.trunc(InBits); 1480 KnownZero &= InMask; 1481 KnownOne &= InMask; 1482 1483 KnownZero.zext(BitWidth); 1484 KnownOne.zext(BitWidth); 1485 1486 // If the sign bit is known zero or one, the top bits match. 1487 if (SignBitKnownZero) 1488 KnownZero |= NewBits; 1489 else if (SignBitKnownOne) 1490 KnownOne |= NewBits; 1491 return; 1492 } 1493 case ISD::ANY_EXTEND: { 1494 MVT InVT = Op.getOperand(0).getValueType(); 1495 unsigned InBits = InVT.getSizeInBits(); 1496 APInt InMask = Mask; 1497 InMask.trunc(InBits); 1498 KnownZero.trunc(InBits); 1499 KnownOne.trunc(InBits); 1500 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1501 KnownZero.zext(BitWidth); 1502 KnownOne.zext(BitWidth); 1503 return; 1504 } 1505 case ISD::TRUNCATE: { 1506 MVT InVT = Op.getOperand(0).getValueType(); 1507 unsigned InBits = InVT.getSizeInBits(); 1508 APInt InMask = Mask; 1509 InMask.zext(InBits); 1510 KnownZero.zext(InBits); 1511 KnownOne.zext(InBits); 1512 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1513 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1514 KnownZero.trunc(BitWidth); 1515 KnownOne.trunc(BitWidth); 1516 break; 1517 } 1518 case ISD::AssertZext: { 1519 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1520 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1521 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1522 KnownOne, Depth+1); 1523 KnownZero |= (~InMask) & Mask; 1524 return; 1525 } 1526 case ISD::FGETSIGN: 1527 // All bits are zero except the low bit. 1528 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1529 return; 1530 1531 case ISD::SUB: { 1532 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1533 // We know that the top bits of C-X are clear if X contains less bits 1534 // than C (i.e. no wrap-around can happen). For example, 20-X is 1535 // positive if we can prove that X is >= 0 and < 16. 1536 if (CLHS->getAPIntValue().isNonNegative()) { 1537 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1538 // NLZ can't be BitWidth with no sign bit 1539 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1540 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1541 Depth+1); 1542 1543 // If all of the MaskV bits are known to be zero, then we know the 1544 // output top bits are zero, because we now know that the output is 1545 // from [0-C]. 1546 if ((KnownZero2 & MaskV) == MaskV) { 1547 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1548 // Top bits known zero. 1549 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1550 } 1551 } 1552 } 1553 } 1554 // fall through 1555 case ISD::ADD: { 1556 // Output known-0 bits are known if clear or set in both the low clear bits 1557 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1558 // low 3 bits clear. 1559 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1560 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1561 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1562 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1563 1564 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1565 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1566 KnownZeroOut = std::min(KnownZeroOut, 1567 KnownZero2.countTrailingOnes()); 1568 1569 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1570 return; 1571 } 1572 case ISD::SREM: 1573 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1574 APInt RA = Rem->getAPIntValue(); 1575 if (RA.isPowerOf2() || (-RA).isPowerOf2()) { 1576 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA; 1577 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1578 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1579 1580 // The sign of a remainder is equal to the sign of the first 1581 // operand (zero being positive). 1582 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1583 KnownZero2 |= ~LowBits; 1584 else if (KnownOne2[BitWidth-1]) 1585 KnownOne2 |= ~LowBits; 1586 1587 KnownZero |= KnownZero2 & Mask; 1588 KnownOne |= KnownOne2 & Mask; 1589 1590 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1591 } 1592 } 1593 return; 1594 case ISD::UREM: { 1595 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1596 APInt RA = Rem->getAPIntValue(); 1597 if (RA.isPowerOf2()) { 1598 APInt LowBits = (RA - 1); 1599 APInt Mask2 = LowBits & Mask; 1600 KnownZero |= ~LowBits & Mask; 1601 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1602 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1603 break; 1604 } 1605 } 1606 1607 // Since the result is less than or equal to either operand, any leading 1608 // zero bits in either operand must also exist in the result. 1609 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1610 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1611 Depth+1); 1612 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1613 Depth+1); 1614 1615 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1616 KnownZero2.countLeadingOnes()); 1617 KnownOne.clear(); 1618 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1619 return; 1620 } 1621 default: 1622 // Allow the target to implement this method for its nodes. 1623 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1624 case ISD::INTRINSIC_WO_CHAIN: 1625 case ISD::INTRINSIC_W_CHAIN: 1626 case ISD::INTRINSIC_VOID: 1627 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this); 1628 } 1629 return; 1630 } 1631} 1632 1633/// ComputeNumSignBits - Return the number of times the sign bit of the 1634/// register is replicated into the other bits. We know that at least 1 bit 1635/// is always equal to the sign bit (itself), but other cases can give us 1636/// information. For example, immediately after an "SRA X, 2", we know that 1637/// the top 3 bits are all equal to each other, so we return 3. 1638unsigned SelectionDAG::ComputeNumSignBits(SDOperand Op, unsigned Depth) const{ 1639 MVT VT = Op.getValueType(); 1640 assert(VT.isInteger() && "Invalid VT!"); 1641 unsigned VTBits = VT.getSizeInBits(); 1642 unsigned Tmp, Tmp2; 1643 unsigned FirstAnswer = 1; 1644 1645 if (Depth == 6) 1646 return 1; // Limit search depth. 1647 1648 switch (Op.getOpcode()) { 1649 default: break; 1650 case ISD::AssertSext: 1651 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1652 return VTBits-Tmp+1; 1653 case ISD::AssertZext: 1654 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1655 return VTBits-Tmp; 1656 1657 case ISD::Constant: { 1658 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 1659 // If negative, return # leading ones. 1660 if (Val.isNegative()) 1661 return Val.countLeadingOnes(); 1662 1663 // Return # leading zeros. 1664 return Val.countLeadingZeros(); 1665 } 1666 1667 case ISD::SIGN_EXTEND: 1668 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits(); 1669 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 1670 1671 case ISD::SIGN_EXTEND_INREG: 1672 // Max of the input and what this extends. 1673 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1674 Tmp = VTBits-Tmp+1; 1675 1676 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1677 return std::max(Tmp, Tmp2); 1678 1679 case ISD::SRA: 1680 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1681 // SRA X, C -> adds C sign bits. 1682 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1683 Tmp += C->getValue(); 1684 if (Tmp > VTBits) Tmp = VTBits; 1685 } 1686 return Tmp; 1687 case ISD::SHL: 1688 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1689 // shl destroys sign bits. 1690 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1691 if (C->getValue() >= VTBits || // Bad shift. 1692 C->getValue() >= Tmp) break; // Shifted all sign bits out. 1693 return Tmp - C->getValue(); 1694 } 1695 break; 1696 case ISD::AND: 1697 case ISD::OR: 1698 case ISD::XOR: // NOT is handled here. 1699 // Logical binary ops preserve the number of sign bits at the worst. 1700 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1701 if (Tmp != 1) { 1702 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1703 FirstAnswer = std::min(Tmp, Tmp2); 1704 // We computed what we know about the sign bits as our first 1705 // answer. Now proceed to the generic code that uses 1706 // ComputeMaskedBits, and pick whichever answer is better. 1707 } 1708 break; 1709 1710 case ISD::SELECT: 1711 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1712 if (Tmp == 1) return 1; // Early out. 1713 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 1714 return std::min(Tmp, Tmp2); 1715 1716 case ISD::SETCC: 1717 // If setcc returns 0/-1, all bits are sign bits. 1718 if (TLI.getSetCCResultContents() == 1719 TargetLowering::ZeroOrNegativeOneSetCCResult) 1720 return VTBits; 1721 break; 1722 case ISD::ROTL: 1723 case ISD::ROTR: 1724 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1725 unsigned RotAmt = C->getValue() & (VTBits-1); 1726 1727 // Handle rotate right by N like a rotate left by 32-N. 1728 if (Op.getOpcode() == ISD::ROTR) 1729 RotAmt = (VTBits-RotAmt) & (VTBits-1); 1730 1731 // If we aren't rotating out all of the known-in sign bits, return the 1732 // number that are left. This handles rotl(sext(x), 1) for example. 1733 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1734 if (Tmp > RotAmt+1) return Tmp-RotAmt; 1735 } 1736 break; 1737 case ISD::ADD: 1738 // Add can have at most one carry bit. Thus we know that the output 1739 // is, at worst, one more bit than the inputs. 1740 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1741 if (Tmp == 1) return 1; // Early out. 1742 1743 // Special case decrementing a value (ADD X, -1): 1744 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1745 if (CRHS->isAllOnesValue()) { 1746 APInt KnownZero, KnownOne; 1747 APInt Mask = APInt::getAllOnesValue(VTBits); 1748 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 1749 1750 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1751 // sign bits set. 1752 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1753 return VTBits; 1754 1755 // If we are subtracting one from a positive number, there is no carry 1756 // out of the result. 1757 if (KnownZero.isNegative()) 1758 return Tmp; 1759 } 1760 1761 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1762 if (Tmp2 == 1) return 1; 1763 return std::min(Tmp, Tmp2)-1; 1764 break; 1765 1766 case ISD::SUB: 1767 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1768 if (Tmp2 == 1) return 1; 1769 1770 // Handle NEG. 1771 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1772 if (CLHS->isNullValue()) { 1773 APInt KnownZero, KnownOne; 1774 APInt Mask = APInt::getAllOnesValue(VTBits); 1775 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1776 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1777 // sign bits set. 1778 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1779 return VTBits; 1780 1781 // If the input is known to be positive (the sign bit is known clear), 1782 // the output of the NEG has the same number of sign bits as the input. 1783 if (KnownZero.isNegative()) 1784 return Tmp2; 1785 1786 // Otherwise, we treat this like a SUB. 1787 } 1788 1789 // Sub can have at most one carry bit. Thus we know that the output 1790 // is, at worst, one more bit than the inputs. 1791 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1792 if (Tmp == 1) return 1; // Early out. 1793 return std::min(Tmp, Tmp2)-1; 1794 break; 1795 case ISD::TRUNCATE: 1796 // FIXME: it's tricky to do anything useful for this, but it is an important 1797 // case for targets like X86. 1798 break; 1799 } 1800 1801 // Handle LOADX separately here. EXTLOAD case will fallthrough. 1802 if (Op.getOpcode() == ISD::LOAD) { 1803 LoadSDNode *LD = cast<LoadSDNode>(Op); 1804 unsigned ExtType = LD->getExtensionType(); 1805 switch (ExtType) { 1806 default: break; 1807 case ISD::SEXTLOAD: // '17' bits known 1808 Tmp = LD->getMemoryVT().getSizeInBits(); 1809 return VTBits-Tmp+1; 1810 case ISD::ZEXTLOAD: // '16' bits known 1811 Tmp = LD->getMemoryVT().getSizeInBits(); 1812 return VTBits-Tmp; 1813 } 1814 } 1815 1816 // Allow the target to implement this method for its nodes. 1817 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 1818 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 1819 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 1820 Op.getOpcode() == ISD::INTRINSIC_VOID) { 1821 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 1822 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 1823 } 1824 1825 // Finally, if we can prove that the top bits of the result are 0's or 1's, 1826 // use this information. 1827 APInt KnownZero, KnownOne; 1828 APInt Mask = APInt::getAllOnesValue(VTBits); 1829 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1830 1831 if (KnownZero.isNegative()) { // sign bit is 0 1832 Mask = KnownZero; 1833 } else if (KnownOne.isNegative()) { // sign bit is 1; 1834 Mask = KnownOne; 1835 } else { 1836 // Nothing known. 1837 return FirstAnswer; 1838 } 1839 1840 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 1841 // the number of identical bits in the top of the input value. 1842 Mask = ~Mask; 1843 Mask <<= Mask.getBitWidth()-VTBits; 1844 // Return # leading zeros. We use 'min' here in case Val was zero before 1845 // shifting. We don't want to return '64' as for an i32 "0". 1846 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 1847} 1848 1849 1850bool SelectionDAG::isVerifiedDebugInfoDesc(SDOperand Op) const { 1851 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 1852 if (!GA) return false; 1853 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 1854 if (!GV) return false; 1855 MachineModuleInfo *MMI = getMachineModuleInfo(); 1856 return MMI && MMI->hasDebugInfo() && MMI->isVerified(GV); 1857} 1858 1859 1860/// getShuffleScalarElt - Returns the scalar element that will make up the ith 1861/// element of the result of the vector shuffle. 1862SDOperand SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned Idx) { 1863 MVT VT = N->getValueType(0); 1864 SDOperand PermMask = N->getOperand(2); 1865 unsigned NumElems = PermMask.getNumOperands(); 1866 SDOperand V = (Idx < NumElems) ? N->getOperand(0) : N->getOperand(1); 1867 Idx %= NumElems; 1868 1869 if (V.getOpcode() == ISD::BIT_CONVERT) { 1870 V = V.getOperand(0); 1871 if (V.getValueType().getVectorNumElements() != NumElems) 1872 return SDOperand(); 1873 } 1874 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 1875 return (Idx == 0) ? V.getOperand(0) 1876 : getNode(ISD::UNDEF, VT.getVectorElementType()); 1877 if (V.getOpcode() == ISD::BUILD_VECTOR) 1878 return V.getOperand(Idx); 1879 if (V.getOpcode() == ISD::VECTOR_SHUFFLE) { 1880 SDOperand Elt = PermMask.getOperand(Idx); 1881 if (Elt.getOpcode() == ISD::UNDEF) 1882 return getNode(ISD::UNDEF, VT.getVectorElementType()); 1883 return getShuffleScalarElt(V.Val,cast<ConstantSDNode>(Elt)->getValue()); 1884 } 1885 return SDOperand(); 1886} 1887 1888 1889/// getNode - Gets or creates the specified node. 1890/// 1891SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT) { 1892 FoldingSetNodeID ID; 1893 AddNodeIDNode(ID, Opcode, getVTList(VT), (SDOperand*)0, 0); 1894 void *IP = 0; 1895 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1896 return SDOperand(E, 0); 1897 SDNode *N = new SDNode(Opcode, SDNode::getSDVTList(VT)); 1898 CSEMap.InsertNode(N, IP); 1899 1900 AllNodes.push_back(N); 1901 return SDOperand(N, 0); 1902} 1903 1904SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, SDOperand Operand) { 1905 // Constant fold unary operations with an integer constant operand. 1906 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) { 1907 const APInt &Val = C->getAPIntValue(); 1908 unsigned BitWidth = VT.getSizeInBits(); 1909 switch (Opcode) { 1910 default: break; 1911 case ISD::SIGN_EXTEND: 1912 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 1913 case ISD::ANY_EXTEND: 1914 case ISD::ZERO_EXTEND: 1915 case ISD::TRUNCATE: 1916 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 1917 case ISD::UINT_TO_FP: 1918 case ISD::SINT_TO_FP: { 1919 const uint64_t zero[] = {0, 0}; 1920 // No compile time operations on this type. 1921 if (VT==MVT::ppcf128) 1922 break; 1923 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 1924 (void)apf.convertFromAPInt(Val, 1925 Opcode==ISD::SINT_TO_FP, 1926 APFloat::rmNearestTiesToEven); 1927 return getConstantFP(apf, VT); 1928 } 1929 case ISD::BIT_CONVERT: 1930 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 1931 return getConstantFP(Val.bitsToFloat(), VT); 1932 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 1933 return getConstantFP(Val.bitsToDouble(), VT); 1934 break; 1935 case ISD::BSWAP: 1936 return getConstant(Val.byteSwap(), VT); 1937 case ISD::CTPOP: 1938 return getConstant(Val.countPopulation(), VT); 1939 case ISD::CTLZ: 1940 return getConstant(Val.countLeadingZeros(), VT); 1941 case ISD::CTTZ: 1942 return getConstant(Val.countTrailingZeros(), VT); 1943 } 1944 } 1945 1946 // Constant fold unary operations with a floating point constant operand. 1947 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val)) { 1948 APFloat V = C->getValueAPF(); // make copy 1949 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 1950 switch (Opcode) { 1951 case ISD::FNEG: 1952 V.changeSign(); 1953 return getConstantFP(V, VT); 1954 case ISD::FABS: 1955 V.clearSign(); 1956 return getConstantFP(V, VT); 1957 case ISD::FP_ROUND: 1958 case ISD::FP_EXTEND: 1959 // This can return overflow, underflow, or inexact; we don't care. 1960 // FIXME need to be more flexible about rounding mode. 1961 (void)V.convert(*MVTToAPFloatSemantics(VT), 1962 APFloat::rmNearestTiesToEven); 1963 return getConstantFP(V, VT); 1964 case ISD::FP_TO_SINT: 1965 case ISD::FP_TO_UINT: { 1966 integerPart x; 1967 assert(integerPartWidth >= 64); 1968 // FIXME need to be more flexible about rounding mode. 1969 APFloat::opStatus s = V.convertToInteger(&x, 64U, 1970 Opcode==ISD::FP_TO_SINT, 1971 APFloat::rmTowardZero); 1972 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 1973 break; 1974 return getConstant(x, VT); 1975 } 1976 case ISD::BIT_CONVERT: 1977 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 1978 return getConstant((uint32_t)V.convertToAPInt().getZExtValue(), VT); 1979 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 1980 return getConstant(V.convertToAPInt().getZExtValue(), VT); 1981 break; 1982 } 1983 } 1984 } 1985 1986 unsigned OpOpcode = Operand.Val->getOpcode(); 1987 switch (Opcode) { 1988 case ISD::TokenFactor: 1989 case ISD::MERGE_VALUES: 1990 return Operand; // Factor or merge of one node? No need. 1991 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node"); 1992 case ISD::FP_EXTEND: 1993 assert(VT.isFloatingPoint() && 1994 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 1995 if (Operand.getValueType() == VT) return Operand; // noop conversion. 1996 if (Operand.getOpcode() == ISD::UNDEF) 1997 return getNode(ISD::UNDEF, VT); 1998 break; 1999 case ISD::SIGN_EXTEND: 2000 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2001 "Invalid SIGN_EXTEND!"); 2002 if (Operand.getValueType() == VT) return Operand; // noop extension 2003 assert(Operand.getValueType().bitsLT(VT) 2004 && "Invalid sext node, dst < src!"); 2005 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2006 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 2007 break; 2008 case ISD::ZERO_EXTEND: 2009 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2010 "Invalid ZERO_EXTEND!"); 2011 if (Operand.getValueType() == VT) return Operand; // noop extension 2012 assert(Operand.getValueType().bitsLT(VT) 2013 && "Invalid zext node, dst < src!"); 2014 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2015 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0)); 2016 break; 2017 case ISD::ANY_EXTEND: 2018 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2019 "Invalid ANY_EXTEND!"); 2020 if (Operand.getValueType() == VT) return Operand; // noop extension 2021 assert(Operand.getValueType().bitsLT(VT) 2022 && "Invalid anyext node, dst < src!"); 2023 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2024 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2025 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 2026 break; 2027 case ISD::TRUNCATE: 2028 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2029 "Invalid TRUNCATE!"); 2030 if (Operand.getValueType() == VT) return Operand; // noop truncate 2031 assert(Operand.getValueType().bitsGT(VT) 2032 && "Invalid truncate node, src < dst!"); 2033 if (OpOpcode == ISD::TRUNCATE) 2034 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 2035 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2036 OpOpcode == ISD::ANY_EXTEND) { 2037 // If the source is smaller than the dest, we still need an extend. 2038 if (Operand.Val->getOperand(0).getValueType().bitsLT(VT)) 2039 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 2040 else if (Operand.Val->getOperand(0).getValueType().bitsGT(VT)) 2041 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 2042 else 2043 return Operand.Val->getOperand(0); 2044 } 2045 break; 2046 case ISD::BIT_CONVERT: 2047 // Basic sanity checking. 2048 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2049 && "Cannot BIT_CONVERT between types of different sizes!"); 2050 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2051 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2052 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0)); 2053 if (OpOpcode == ISD::UNDEF) 2054 return getNode(ISD::UNDEF, VT); 2055 break; 2056 case ISD::SCALAR_TO_VECTOR: 2057 assert(VT.isVector() && !Operand.getValueType().isVector() && 2058 VT.getVectorElementType() == Operand.getValueType() && 2059 "Illegal SCALAR_TO_VECTOR node!"); 2060 if (OpOpcode == ISD::UNDEF) 2061 return getNode(ISD::UNDEF, VT); 2062 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2063 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2064 isa<ConstantSDNode>(Operand.getOperand(1)) && 2065 Operand.getConstantOperandVal(1) == 0 && 2066 Operand.getOperand(0).getValueType() == VT) 2067 return Operand.getOperand(0); 2068 break; 2069 case ISD::FNEG: 2070 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X) 2071 return getNode(ISD::FSUB, VT, Operand.Val->getOperand(1), 2072 Operand.Val->getOperand(0)); 2073 if (OpOpcode == ISD::FNEG) // --X -> X 2074 return Operand.Val->getOperand(0); 2075 break; 2076 case ISD::FABS: 2077 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2078 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0)); 2079 break; 2080 } 2081 2082 SDNode *N; 2083 SDVTList VTs = getVTList(VT); 2084 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2085 FoldingSetNodeID ID; 2086 SDOperand Ops[1] = { Operand }; 2087 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2088 void *IP = 0; 2089 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2090 return SDOperand(E, 0); 2091 N = new UnarySDNode(Opcode, VTs, Operand); 2092 CSEMap.InsertNode(N, IP); 2093 } else { 2094 N = new UnarySDNode(Opcode, VTs, Operand); 2095 } 2096 AllNodes.push_back(N); 2097 return SDOperand(N, 0); 2098} 2099 2100 2101 2102SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, 2103 SDOperand N1, SDOperand N2) { 2104 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 2105 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 2106 switch (Opcode) { 2107 default: break; 2108 case ISD::TokenFactor: 2109 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2110 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2111 // Fold trivial token factors. 2112 if (N1.getOpcode() == ISD::EntryToken) return N2; 2113 if (N2.getOpcode() == ISD::EntryToken) return N1; 2114 break; 2115 case ISD::AND: 2116 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2117 N1.getValueType() == VT && "Binary operator types must match!"); 2118 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2119 // worth handling here. 2120 if (N2C && N2C->isNullValue()) 2121 return N2; 2122 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2123 return N1; 2124 break; 2125 case ISD::OR: 2126 case ISD::XOR: 2127 case ISD::ADD: 2128 case ISD::SUB: 2129 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2130 N1.getValueType() == VT && "Binary operator types must match!"); 2131 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2132 // it's worth handling here. 2133 if (N2C && N2C->isNullValue()) 2134 return N1; 2135 break; 2136 case ISD::UDIV: 2137 case ISD::UREM: 2138 case ISD::MULHU: 2139 case ISD::MULHS: 2140 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2141 // fall through 2142 case ISD::MUL: 2143 case ISD::SDIV: 2144 case ISD::SREM: 2145 case ISD::FADD: 2146 case ISD::FSUB: 2147 case ISD::FMUL: 2148 case ISD::FDIV: 2149 case ISD::FREM: 2150 assert(N1.getValueType() == N2.getValueType() && 2151 N1.getValueType() == VT && "Binary operator types must match!"); 2152 break; 2153 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2154 assert(N1.getValueType() == VT && 2155 N1.getValueType().isFloatingPoint() && 2156 N2.getValueType().isFloatingPoint() && 2157 "Invalid FCOPYSIGN!"); 2158 break; 2159 case ISD::SHL: 2160 case ISD::SRA: 2161 case ISD::SRL: 2162 case ISD::ROTL: 2163 case ISD::ROTR: 2164 assert(VT == N1.getValueType() && 2165 "Shift operators return type must be the same as their first arg"); 2166 assert(VT.isInteger() && N2.getValueType().isInteger() && 2167 VT != MVT::i1 && "Shifts only work on integers"); 2168 break; 2169 case ISD::FP_ROUND_INREG: { 2170 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2171 assert(VT == N1.getValueType() && "Not an inreg round!"); 2172 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2173 "Cannot FP_ROUND_INREG integer types"); 2174 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2175 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2176 break; 2177 } 2178 case ISD::FP_ROUND: 2179 assert(VT.isFloatingPoint() && 2180 N1.getValueType().isFloatingPoint() && 2181 VT.bitsLE(N1.getValueType()) && 2182 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2183 if (N1.getValueType() == VT) return N1; // noop conversion. 2184 break; 2185 case ISD::AssertSext: 2186 case ISD::AssertZext: { 2187 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2188 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2189 assert(VT.isInteger() && EVT.isInteger() && 2190 "Cannot *_EXTEND_INREG FP types"); 2191 assert(EVT.bitsLE(VT) && "Not extending!"); 2192 if (VT == EVT) return N1; // noop assertion. 2193 break; 2194 } 2195 case ISD::SIGN_EXTEND_INREG: { 2196 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2197 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2198 assert(VT.isInteger() && EVT.isInteger() && 2199 "Cannot *_EXTEND_INREG FP types"); 2200 assert(EVT.bitsLE(VT) && "Not extending!"); 2201 if (EVT == VT) return N1; // Not actually extending 2202 2203 if (N1C) { 2204 APInt Val = N1C->getAPIntValue(); 2205 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits(); 2206 Val <<= Val.getBitWidth()-FromBits; 2207 Val = Val.ashr(Val.getBitWidth()-FromBits); 2208 return getConstant(Val, VT); 2209 } 2210 break; 2211 } 2212 case ISD::EXTRACT_VECTOR_ELT: 2213 assert(N2C && "Bad EXTRACT_VECTOR_ELT!"); 2214 2215 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2216 if (N1.getOpcode() == ISD::UNDEF) 2217 return getNode(ISD::UNDEF, VT); 2218 2219 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2220 // expanding copies of large vectors from registers. 2221 if (N1.getOpcode() == ISD::CONCAT_VECTORS && 2222 N1.getNumOperands() > 0) { 2223 unsigned Factor = 2224 N1.getOperand(0).getValueType().getVectorNumElements(); 2225 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, 2226 N1.getOperand(N2C->getValue() / Factor), 2227 getConstant(N2C->getValue() % Factor, N2.getValueType())); 2228 } 2229 2230 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2231 // expanding large vector constants. 2232 if (N1.getOpcode() == ISD::BUILD_VECTOR) 2233 return N1.getOperand(N2C->getValue()); 2234 2235 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2236 // operations are lowered to scalars. 2237 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) 2238 if (ConstantSDNode *IEC = dyn_cast<ConstantSDNode>(N1.getOperand(2))) { 2239 if (IEC == N2C) 2240 return N1.getOperand(1); 2241 else 2242 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2); 2243 } 2244 break; 2245 case ISD::EXTRACT_ELEMENT: 2246 assert(N2C && (unsigned)N2C->getValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2247 assert(!N1.getValueType().isVector() && !VT.isVector() && 2248 (N1.getValueType().isInteger() == VT.isInteger()) && 2249 "Wrong types for EXTRACT_ELEMENT!"); 2250 2251 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2252 // 64-bit integers into 32-bit parts. Instead of building the extract of 2253 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2254 if (N1.getOpcode() == ISD::BUILD_PAIR) 2255 return N1.getOperand(N2C->getValue()); 2256 2257 // EXTRACT_ELEMENT of a constant int is also very common. 2258 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2259 unsigned ElementSize = VT.getSizeInBits(); 2260 unsigned Shift = ElementSize * N2C->getValue(); 2261 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2262 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2263 } 2264 break; 2265 case ISD::EXTRACT_SUBVECTOR: 2266 if (N1.getValueType() == VT) // Trivial extraction. 2267 return N1; 2268 break; 2269 } 2270 2271 if (N1C) { 2272 if (N2C) { 2273 APInt C1 = N1C->getAPIntValue(), C2 = N2C->getAPIntValue(); 2274 switch (Opcode) { 2275 case ISD::ADD: return getConstant(C1 + C2, VT); 2276 case ISD::SUB: return getConstant(C1 - C2, VT); 2277 case ISD::MUL: return getConstant(C1 * C2, VT); 2278 case ISD::UDIV: 2279 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2280 break; 2281 case ISD::UREM : 2282 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2283 break; 2284 case ISD::SDIV : 2285 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2286 break; 2287 case ISD::SREM : 2288 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2289 break; 2290 case ISD::AND : return getConstant(C1 & C2, VT); 2291 case ISD::OR : return getConstant(C1 | C2, VT); 2292 case ISD::XOR : return getConstant(C1 ^ C2, VT); 2293 case ISD::SHL : return getConstant(C1 << C2, VT); 2294 case ISD::SRL : return getConstant(C1.lshr(C2), VT); 2295 case ISD::SRA : return getConstant(C1.ashr(C2), VT); 2296 case ISD::ROTL : return getConstant(C1.rotl(C2), VT); 2297 case ISD::ROTR : return getConstant(C1.rotr(C2), VT); 2298 default: break; 2299 } 2300 } else { // Cannonicalize constant to RHS if commutative 2301 if (isCommutativeBinOp(Opcode)) { 2302 std::swap(N1C, N2C); 2303 std::swap(N1, N2); 2304 } 2305 } 2306 } 2307 2308 // Constant fold FP operations. 2309 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val); 2310 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val); 2311 if (N1CFP) { 2312 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2313 // Cannonicalize constant to RHS if commutative 2314 std::swap(N1CFP, N2CFP); 2315 std::swap(N1, N2); 2316 } else if (N2CFP && VT != MVT::ppcf128) { 2317 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2318 APFloat::opStatus s; 2319 switch (Opcode) { 2320 case ISD::FADD: 2321 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2322 if (s != APFloat::opInvalidOp) 2323 return getConstantFP(V1, VT); 2324 break; 2325 case ISD::FSUB: 2326 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2327 if (s!=APFloat::opInvalidOp) 2328 return getConstantFP(V1, VT); 2329 break; 2330 case ISD::FMUL: 2331 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2332 if (s!=APFloat::opInvalidOp) 2333 return getConstantFP(V1, VT); 2334 break; 2335 case ISD::FDIV: 2336 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2337 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2338 return getConstantFP(V1, VT); 2339 break; 2340 case ISD::FREM : 2341 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2342 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2343 return getConstantFP(V1, VT); 2344 break; 2345 case ISD::FCOPYSIGN: 2346 V1.copySign(V2); 2347 return getConstantFP(V1, VT); 2348 default: break; 2349 } 2350 } 2351 } 2352 2353 // Canonicalize an UNDEF to the RHS, even over a constant. 2354 if (N1.getOpcode() == ISD::UNDEF) { 2355 if (isCommutativeBinOp(Opcode)) { 2356 std::swap(N1, N2); 2357 } else { 2358 switch (Opcode) { 2359 case ISD::FP_ROUND_INREG: 2360 case ISD::SIGN_EXTEND_INREG: 2361 case ISD::SUB: 2362 case ISD::FSUB: 2363 case ISD::FDIV: 2364 case ISD::FREM: 2365 case ISD::SRA: 2366 return N1; // fold op(undef, arg2) -> undef 2367 case ISD::UDIV: 2368 case ISD::SDIV: 2369 case ISD::UREM: 2370 case ISD::SREM: 2371 case ISD::SRL: 2372 case ISD::SHL: 2373 if (!VT.isVector()) 2374 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2375 // For vectors, we can't easily build an all zero vector, just return 2376 // the LHS. 2377 return N2; 2378 } 2379 } 2380 } 2381 2382 // Fold a bunch of operators when the RHS is undef. 2383 if (N2.getOpcode() == ISD::UNDEF) { 2384 switch (Opcode) { 2385 case ISD::XOR: 2386 if (N1.getOpcode() == ISD::UNDEF) 2387 // Handle undef ^ undef -> 0 special case. This is a common 2388 // idiom (misuse). 2389 return getConstant(0, VT); 2390 // fallthrough 2391 case ISD::ADD: 2392 case ISD::ADDC: 2393 case ISD::ADDE: 2394 case ISD::SUB: 2395 case ISD::FADD: 2396 case ISD::FSUB: 2397 case ISD::FMUL: 2398 case ISD::FDIV: 2399 case ISD::FREM: 2400 case ISD::UDIV: 2401 case ISD::SDIV: 2402 case ISD::UREM: 2403 case ISD::SREM: 2404 return N2; // fold op(arg1, undef) -> undef 2405 case ISD::MUL: 2406 case ISD::AND: 2407 case ISD::SRL: 2408 case ISD::SHL: 2409 if (!VT.isVector()) 2410 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2411 // For vectors, we can't easily build an all zero vector, just return 2412 // the LHS. 2413 return N1; 2414 case ISD::OR: 2415 if (!VT.isVector()) 2416 return getConstant(VT.getIntegerVTBitMask(), VT); 2417 // For vectors, we can't easily build an all one vector, just return 2418 // the LHS. 2419 return N1; 2420 case ISD::SRA: 2421 return N1; 2422 } 2423 } 2424 2425 // Memoize this node if possible. 2426 SDNode *N; 2427 SDVTList VTs = getVTList(VT); 2428 if (VT != MVT::Flag) { 2429 SDOperand Ops[] = { N1, N2 }; 2430 FoldingSetNodeID ID; 2431 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2432 void *IP = 0; 2433 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2434 return SDOperand(E, 0); 2435 N = new BinarySDNode(Opcode, VTs, N1, N2); 2436 CSEMap.InsertNode(N, IP); 2437 } else { 2438 N = new BinarySDNode(Opcode, VTs, N1, N2); 2439 } 2440 2441 AllNodes.push_back(N); 2442 return SDOperand(N, 0); 2443} 2444 2445SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, 2446 SDOperand N1, SDOperand N2, SDOperand N3) { 2447 // Perform various simplifications. 2448 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 2449 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 2450 switch (Opcode) { 2451 case ISD::SETCC: { 2452 // Use FoldSetCC to simplify SETCC's. 2453 SDOperand Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 2454 if (Simp.Val) return Simp; 2455 break; 2456 } 2457 case ISD::SELECT: 2458 if (N1C) { 2459 if (N1C->getValue()) 2460 return N2; // select true, X, Y -> X 2461 else 2462 return N3; // select false, X, Y -> Y 2463 } 2464 2465 if (N2 == N3) return N2; // select C, X, X -> X 2466 break; 2467 case ISD::BRCOND: 2468 if (N2C) { 2469 if (N2C->getValue()) // Unconditional branch 2470 return getNode(ISD::BR, MVT::Other, N1, N3); 2471 else 2472 return N1; // Never-taken branch 2473 } 2474 break; 2475 case ISD::VECTOR_SHUFFLE: 2476 assert(VT == N1.getValueType() && VT == N2.getValueType() && 2477 VT.isVector() && N3.getValueType().isVector() && 2478 N3.getOpcode() == ISD::BUILD_VECTOR && 2479 VT.getVectorNumElements() == N3.getNumOperands() && 2480 "Illegal VECTOR_SHUFFLE node!"); 2481 break; 2482 case ISD::BIT_CONVERT: 2483 // Fold bit_convert nodes from a type to themselves. 2484 if (N1.getValueType() == VT) 2485 return N1; 2486 break; 2487 } 2488 2489 // Memoize node if it doesn't produce a flag. 2490 SDNode *N; 2491 SDVTList VTs = getVTList(VT); 2492 if (VT != MVT::Flag) { 2493 SDOperand Ops[] = { N1, N2, N3 }; 2494 FoldingSetNodeID ID; 2495 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 2496 void *IP = 0; 2497 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2498 return SDOperand(E, 0); 2499 N = new TernarySDNode(Opcode, VTs, N1, N2, N3); 2500 CSEMap.InsertNode(N, IP); 2501 } else { 2502 N = new TernarySDNode(Opcode, VTs, N1, N2, N3); 2503 } 2504 AllNodes.push_back(N); 2505 return SDOperand(N, 0); 2506} 2507 2508SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, 2509 SDOperand N1, SDOperand N2, SDOperand N3, 2510 SDOperand N4) { 2511 SDOperand Ops[] = { N1, N2, N3, N4 }; 2512 return getNode(Opcode, VT, Ops, 4); 2513} 2514 2515SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, 2516 SDOperand N1, SDOperand N2, SDOperand N3, 2517 SDOperand N4, SDOperand N5) { 2518 SDOperand Ops[] = { N1, N2, N3, N4, N5 }; 2519 return getNode(Opcode, VT, Ops, 5); 2520} 2521 2522/// getMemsetValue - Vectorized representation of the memset value 2523/// operand. 2524static SDOperand getMemsetValue(SDOperand Value, MVT VT, SelectionDAG &DAG) { 2525 unsigned NumBits = VT.isVector() ? 2526 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 2527 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 2528 APInt Val = APInt(NumBits, C->getValue() & 255); 2529 unsigned Shift = 8; 2530 for (unsigned i = NumBits; i > 8; i >>= 1) { 2531 Val = (Val << Shift) | Val; 2532 Shift <<= 1; 2533 } 2534 if (VT.isInteger()) 2535 return DAG.getConstant(Val, VT); 2536 return DAG.getConstantFP(APFloat(Val), VT); 2537 } 2538 2539 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value); 2540 unsigned Shift = 8; 2541 for (unsigned i = NumBits; i > 8; i >>= 1) { 2542 Value = DAG.getNode(ISD::OR, VT, 2543 DAG.getNode(ISD::SHL, VT, Value, 2544 DAG.getConstant(Shift, MVT::i8)), Value); 2545 Shift <<= 1; 2546 } 2547 2548 return Value; 2549} 2550 2551/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 2552/// used when a memcpy is turned into a memset when the source is a constant 2553/// string ptr. 2554static SDOperand getMemsetStringVal(MVT VT, SelectionDAG &DAG, 2555 const TargetLowering &TLI, 2556 std::string &Str, unsigned Offset) { 2557 assert(!VT.isVector() && "Can't handle vector type here!"); 2558 unsigned NumBits = VT.getSizeInBits(); 2559 unsigned MSB = NumBits / 8; 2560 uint64_t Val = 0; 2561 if (TLI.isLittleEndian()) 2562 Offset = Offset + MSB - 1; 2563 for (unsigned i = 0; i != MSB; ++i) { 2564 Val = (Val << 8) | (unsigned char)Str[Offset]; 2565 Offset += TLI.isLittleEndian() ? -1 : 1; 2566 } 2567 return DAG.getConstant(Val, VT); 2568} 2569 2570/// getMemBasePlusOffset - Returns base and offset node for the 2571/// 2572static SDOperand getMemBasePlusOffset(SDOperand Base, unsigned Offset, 2573 SelectionDAG &DAG) { 2574 MVT VT = Base.getValueType(); 2575 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT)); 2576} 2577 2578/// isMemSrcFromString - Returns true if memcpy source is a string constant. 2579/// 2580static bool isMemSrcFromString(SDOperand Src, std::string &Str, 2581 uint64_t &SrcOff) { 2582 unsigned SrcDelta = 0; 2583 GlobalAddressSDNode *G = NULL; 2584 if (Src.getOpcode() == ISD::GlobalAddress) 2585 G = cast<GlobalAddressSDNode>(Src); 2586 else if (Src.getOpcode() == ISD::ADD && 2587 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 2588 Src.getOperand(1).getOpcode() == ISD::Constant) { 2589 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 2590 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getValue(); 2591 } 2592 if (!G) 2593 return false; 2594 2595 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 2596 if (GV && GV->isConstant()) { 2597 Str = GV->getStringValue(false); 2598 if (!Str.empty()) { 2599 SrcOff += SrcDelta; 2600 return true; 2601 } 2602 } 2603 2604 return false; 2605} 2606 2607/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 2608/// to replace the memset / memcpy is below the threshold. It also returns the 2609/// types of the sequence of memory ops to perform memset / memcpy. 2610static 2611bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps, 2612 SDOperand Dst, SDOperand Src, 2613 unsigned Limit, uint64_t Size, unsigned &Align, 2614 SelectionDAG &DAG, 2615 const TargetLowering &TLI) { 2616 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(); 2617 2618 std::string Str; 2619 uint64_t SrcOff = 0; 2620 bool isSrcStr = isMemSrcFromString(Src, Str, SrcOff); 2621 bool isSrcConst = isa<ConstantSDNode>(Src); 2622 MVT VT= TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr); 2623 if (VT != MVT::iAny) { 2624 unsigned NewAlign = (unsigned) 2625 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT()); 2626 // If source is a string constant, this will require an unaligned load. 2627 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 2628 if (Dst.getOpcode() != ISD::FrameIndex) { 2629 // Can't change destination alignment. It requires a unaligned store. 2630 if (AllowUnalign) 2631 VT = MVT::iAny; 2632 } else { 2633 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 2634 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 2635 if (MFI->isFixedObjectIndex(FI)) { 2636 // Can't change destination alignment. It requires a unaligned store. 2637 if (AllowUnalign) 2638 VT = MVT::iAny; 2639 } else { 2640 // Give the stack frame object a larger alignment if needed. 2641 if (MFI->getObjectAlignment(FI) < NewAlign) 2642 MFI->setObjectAlignment(FI, NewAlign); 2643 Align = NewAlign; 2644 } 2645 } 2646 } 2647 } 2648 2649 if (VT == MVT::iAny) { 2650 if (AllowUnalign) { 2651 VT = MVT::i64; 2652 } else { 2653 switch (Align & 7) { 2654 case 0: VT = MVT::i64; break; 2655 case 4: VT = MVT::i32; break; 2656 case 2: VT = MVT::i16; break; 2657 default: VT = MVT::i8; break; 2658 } 2659 } 2660 2661 MVT LVT = MVT::i64; 2662 while (!TLI.isTypeLegal(LVT)) 2663 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1); 2664 assert(LVT.isInteger()); 2665 2666 if (VT.bitsGT(LVT)) 2667 VT = LVT; 2668 } 2669 2670 unsigned NumMemOps = 0; 2671 while (Size != 0) { 2672 unsigned VTSize = VT.getSizeInBits() / 8; 2673 while (VTSize > Size) { 2674 // For now, only use non-vector load / store's for the left-over pieces. 2675 if (VT.isVector()) { 2676 VT = MVT::i64; 2677 while (!TLI.isTypeLegal(VT)) 2678 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2679 VTSize = VT.getSizeInBits() / 8; 2680 } else { 2681 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2682 VTSize >>= 1; 2683 } 2684 } 2685 2686 if (++NumMemOps > Limit) 2687 return false; 2688 MemOps.push_back(VT); 2689 Size -= VTSize; 2690 } 2691 2692 return true; 2693} 2694 2695static SDOperand getMemcpyLoadsAndStores(SelectionDAG &DAG, 2696 SDOperand Chain, SDOperand Dst, 2697 SDOperand Src, uint64_t Size, 2698 unsigned Align, bool AlwaysInline, 2699 const Value *DstSV, uint64_t DstSVOff, 2700 const Value *SrcSV, uint64_t SrcSVOff){ 2701 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2702 2703 // Expand memcpy to a series of load and store ops if the size operand falls 2704 // below a certain threshold. 2705 std::vector<MVT> MemOps; 2706 uint64_t Limit = -1; 2707 if (!AlwaysInline) 2708 Limit = TLI.getMaxStoresPerMemcpy(); 2709 unsigned DstAlign = Align; // Destination alignment can change. 2710 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 2711 DAG, TLI)) 2712 return SDOperand(); 2713 2714 std::string Str; 2715 uint64_t SrcOff = 0, DstOff = 0; 2716 bool CopyFromStr = isMemSrcFromString(Src, Str, SrcOff); 2717 2718 SmallVector<SDOperand, 8> OutChains; 2719 unsigned NumMemOps = MemOps.size(); 2720 for (unsigned i = 0; i < NumMemOps; i++) { 2721 MVT VT = MemOps[i]; 2722 unsigned VTSize = VT.getSizeInBits() / 8; 2723 SDOperand Value, Store; 2724 2725 if (CopyFromStr && !VT.isVector()) { 2726 // It's unlikely a store of a vector immediate can be done in a single 2727 // instruction. It would require a load from a constantpool first. 2728 // FIXME: Handle cases where store of vector immediate is done in a 2729 // single instruction. 2730 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff); 2731 Store = DAG.getStore(Chain, Value, 2732 getMemBasePlusOffset(Dst, DstOff, DAG), 2733 DstSV, DstSVOff + DstOff); 2734 } else { 2735 Value = DAG.getLoad(VT, Chain, 2736 getMemBasePlusOffset(Src, SrcOff, DAG), 2737 SrcSV, SrcSVOff + SrcOff, false, Align); 2738 Store = DAG.getStore(Chain, Value, 2739 getMemBasePlusOffset(Dst, DstOff, DAG), 2740 DstSV, DstSVOff + DstOff, false, DstAlign); 2741 } 2742 OutChains.push_back(Store); 2743 SrcOff += VTSize; 2744 DstOff += VTSize; 2745 } 2746 2747 return DAG.getNode(ISD::TokenFactor, MVT::Other, 2748 &OutChains[0], OutChains.size()); 2749} 2750 2751static SDOperand getMemmoveLoadsAndStores(SelectionDAG &DAG, 2752 SDOperand Chain, SDOperand Dst, 2753 SDOperand Src, uint64_t Size, 2754 unsigned Align, bool AlwaysInline, 2755 const Value *DstSV, uint64_t DstSVOff, 2756 const Value *SrcSV, uint64_t SrcSVOff){ 2757 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2758 2759 // Expand memmove to a series of load and store ops if the size operand falls 2760 // below a certain threshold. 2761 std::vector<MVT> MemOps; 2762 uint64_t Limit = -1; 2763 if (!AlwaysInline) 2764 Limit = TLI.getMaxStoresPerMemmove(); 2765 unsigned DstAlign = Align; // Destination alignment can change. 2766 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 2767 DAG, TLI)) 2768 return SDOperand(); 2769 2770 uint64_t SrcOff = 0, DstOff = 0; 2771 2772 SmallVector<SDOperand, 8> LoadValues; 2773 SmallVector<SDOperand, 8> LoadChains; 2774 SmallVector<SDOperand, 8> OutChains; 2775 unsigned NumMemOps = MemOps.size(); 2776 for (unsigned i = 0; i < NumMemOps; i++) { 2777 MVT VT = MemOps[i]; 2778 unsigned VTSize = VT.getSizeInBits() / 8; 2779 SDOperand Value, Store; 2780 2781 Value = DAG.getLoad(VT, Chain, 2782 getMemBasePlusOffset(Src, SrcOff, DAG), 2783 SrcSV, SrcSVOff + SrcOff, false, Align); 2784 LoadValues.push_back(Value); 2785 LoadChains.push_back(Value.getValue(1)); 2786 SrcOff += VTSize; 2787 } 2788 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, 2789 &LoadChains[0], LoadChains.size()); 2790 OutChains.clear(); 2791 for (unsigned i = 0; i < NumMemOps; i++) { 2792 MVT VT = MemOps[i]; 2793 unsigned VTSize = VT.getSizeInBits() / 8; 2794 SDOperand Value, Store; 2795 2796 Store = DAG.getStore(Chain, LoadValues[i], 2797 getMemBasePlusOffset(Dst, DstOff, DAG), 2798 DstSV, DstSVOff + DstOff, false, DstAlign); 2799 OutChains.push_back(Store); 2800 DstOff += VTSize; 2801 } 2802 2803 return DAG.getNode(ISD::TokenFactor, MVT::Other, 2804 &OutChains[0], OutChains.size()); 2805} 2806 2807static SDOperand getMemsetStores(SelectionDAG &DAG, 2808 SDOperand Chain, SDOperand Dst, 2809 SDOperand Src, uint64_t Size, 2810 unsigned Align, 2811 const Value *DstSV, uint64_t DstSVOff) { 2812 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2813 2814 // Expand memset to a series of load/store ops if the size operand 2815 // falls below a certain threshold. 2816 std::vector<MVT> MemOps; 2817 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 2818 Size, Align, DAG, TLI)) 2819 return SDOperand(); 2820 2821 SmallVector<SDOperand, 8> OutChains; 2822 uint64_t DstOff = 0; 2823 2824 unsigned NumMemOps = MemOps.size(); 2825 for (unsigned i = 0; i < NumMemOps; i++) { 2826 MVT VT = MemOps[i]; 2827 unsigned VTSize = VT.getSizeInBits() / 8; 2828 SDOperand Value = getMemsetValue(Src, VT, DAG); 2829 SDOperand Store = DAG.getStore(Chain, Value, 2830 getMemBasePlusOffset(Dst, DstOff, DAG), 2831 DstSV, DstSVOff + DstOff); 2832 OutChains.push_back(Store); 2833 DstOff += VTSize; 2834 } 2835 2836 return DAG.getNode(ISD::TokenFactor, MVT::Other, 2837 &OutChains[0], OutChains.size()); 2838} 2839 2840SDOperand SelectionDAG::getMemcpy(SDOperand Chain, SDOperand Dst, 2841 SDOperand Src, SDOperand Size, 2842 unsigned Align, bool AlwaysInline, 2843 const Value *DstSV, uint64_t DstSVOff, 2844 const Value *SrcSV, uint64_t SrcSVOff) { 2845 2846 // Check to see if we should lower the memcpy to loads and stores first. 2847 // For cases within the target-specified limits, this is the best choice. 2848 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 2849 if (ConstantSize) { 2850 // Memcpy with size zero? Just return the original chain. 2851 if (ConstantSize->isNullValue()) 2852 return Chain; 2853 2854 SDOperand Result = 2855 getMemcpyLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(), 2856 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 2857 if (Result.Val) 2858 return Result; 2859 } 2860 2861 // Then check to see if we should lower the memcpy with target-specific 2862 // code. If the target chooses to do this, this is the next best. 2863 SDOperand Result = 2864 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align, 2865 AlwaysInline, 2866 DstSV, DstSVOff, SrcSV, SrcSVOff); 2867 if (Result.Val) 2868 return Result; 2869 2870 // If we really need inline code and the target declined to provide it, 2871 // use a (potentially long) sequence of loads and stores. 2872 if (AlwaysInline) { 2873 assert(ConstantSize && "AlwaysInline requires a constant size!"); 2874 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 2875 ConstantSize->getValue(), Align, true, 2876 DstSV, DstSVOff, SrcSV, SrcSVOff); 2877 } 2878 2879 // Emit a library call. 2880 TargetLowering::ArgListTy Args; 2881 TargetLowering::ArgListEntry Entry; 2882 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 2883 Entry.Node = Dst; Args.push_back(Entry); 2884 Entry.Node = Src; Args.push_back(Entry); 2885 Entry.Node = Size; Args.push_back(Entry); 2886 std::pair<SDOperand,SDOperand> CallResult = 2887 TLI.LowerCallTo(Chain, Type::VoidTy, 2888 false, false, false, CallingConv::C, false, 2889 getExternalSymbol("memcpy", TLI.getPointerTy()), 2890 Args, *this); 2891 return CallResult.second; 2892} 2893 2894SDOperand SelectionDAG::getMemmove(SDOperand Chain, SDOperand Dst, 2895 SDOperand Src, SDOperand Size, 2896 unsigned Align, 2897 const Value *DstSV, uint64_t DstSVOff, 2898 const Value *SrcSV, uint64_t SrcSVOff) { 2899 2900 // Check to see if we should lower the memmove to loads and stores first. 2901 // For cases within the target-specified limits, this is the best choice. 2902 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 2903 if (ConstantSize) { 2904 // Memmove with size zero? Just return the original chain. 2905 if (ConstantSize->isNullValue()) 2906 return Chain; 2907 2908 SDOperand Result = 2909 getMemmoveLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(), 2910 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 2911 if (Result.Val) 2912 return Result; 2913 } 2914 2915 // Then check to see if we should lower the memmove with target-specific 2916 // code. If the target chooses to do this, this is the next best. 2917 SDOperand Result = 2918 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align, 2919 DstSV, DstSVOff, SrcSV, SrcSVOff); 2920 if (Result.Val) 2921 return Result; 2922 2923 // Emit a library call. 2924 TargetLowering::ArgListTy Args; 2925 TargetLowering::ArgListEntry Entry; 2926 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 2927 Entry.Node = Dst; Args.push_back(Entry); 2928 Entry.Node = Src; Args.push_back(Entry); 2929 Entry.Node = Size; Args.push_back(Entry); 2930 std::pair<SDOperand,SDOperand> CallResult = 2931 TLI.LowerCallTo(Chain, Type::VoidTy, 2932 false, false, false, CallingConv::C, false, 2933 getExternalSymbol("memmove", TLI.getPointerTy()), 2934 Args, *this); 2935 return CallResult.second; 2936} 2937 2938SDOperand SelectionDAG::getMemset(SDOperand Chain, SDOperand Dst, 2939 SDOperand Src, SDOperand Size, 2940 unsigned Align, 2941 const Value *DstSV, uint64_t DstSVOff) { 2942 2943 // Check to see if we should lower the memset to stores first. 2944 // For cases within the target-specified limits, this is the best choice. 2945 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 2946 if (ConstantSize) { 2947 // Memset with size zero? Just return the original chain. 2948 if (ConstantSize->isNullValue()) 2949 return Chain; 2950 2951 SDOperand Result = 2952 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getValue(), Align, 2953 DstSV, DstSVOff); 2954 if (Result.Val) 2955 return Result; 2956 } 2957 2958 // Then check to see if we should lower the memset with target-specific 2959 // code. If the target chooses to do this, this is the next best. 2960 SDOperand Result = 2961 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align, 2962 DstSV, DstSVOff); 2963 if (Result.Val) 2964 return Result; 2965 2966 // Emit a library call. 2967 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(); 2968 TargetLowering::ArgListTy Args; 2969 TargetLowering::ArgListEntry Entry; 2970 Entry.Node = Dst; Entry.Ty = IntPtrTy; 2971 Args.push_back(Entry); 2972 // Extend or truncate the argument to be an i32 value for the call. 2973 if (Src.getValueType().bitsGT(MVT::i32)) 2974 Src = getNode(ISD::TRUNCATE, MVT::i32, Src); 2975 else 2976 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src); 2977 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true; 2978 Args.push_back(Entry); 2979 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false; 2980 Args.push_back(Entry); 2981 std::pair<SDOperand,SDOperand> CallResult = 2982 TLI.LowerCallTo(Chain, Type::VoidTy, 2983 false, false, false, CallingConv::C, false, 2984 getExternalSymbol("memset", TLI.getPointerTy()), 2985 Args, *this); 2986 return CallResult.second; 2987} 2988 2989SDOperand SelectionDAG::getAtomic(unsigned Opcode, SDOperand Chain, 2990 SDOperand Ptr, SDOperand Cmp, 2991 SDOperand Swp, const Value* PtrVal, 2992 unsigned Alignment) { 2993 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 2994 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 2995 SDVTList VTs = getVTList(Cmp.getValueType(), MVT::Other); 2996 FoldingSetNodeID ID; 2997 SDOperand Ops[] = {Chain, Ptr, Cmp, Swp}; 2998 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 2999 void* IP = 0; 3000 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3001 return SDOperand(E, 0); 3002 SDNode* N = new AtomicSDNode(Opcode, VTs, Chain, Ptr, Cmp, Swp, 3003 PtrVal, Alignment); 3004 CSEMap.InsertNode(N, IP); 3005 AllNodes.push_back(N); 3006 return SDOperand(N, 0); 3007} 3008 3009SDOperand SelectionDAG::getAtomic(unsigned Opcode, SDOperand Chain, 3010 SDOperand Ptr, SDOperand Val, 3011 const Value* PtrVal, 3012 unsigned Alignment) { 3013 assert(( Opcode == ISD::ATOMIC_LOAD_ADD || Opcode == ISD::ATOMIC_LOAD_SUB 3014 || Opcode == ISD::ATOMIC_SWAP || Opcode == ISD::ATOMIC_LOAD_AND 3015 || Opcode == ISD::ATOMIC_LOAD_OR || Opcode == ISD::ATOMIC_LOAD_XOR 3016 || Opcode == ISD::ATOMIC_LOAD_NAND 3017 || Opcode == ISD::ATOMIC_LOAD_MIN || Opcode == ISD::ATOMIC_LOAD_MAX 3018 || Opcode == ISD::ATOMIC_LOAD_UMIN || Opcode == ISD::ATOMIC_LOAD_UMAX) 3019 && "Invalid Atomic Op"); 3020 SDVTList VTs = getVTList(Val.getValueType(), MVT::Other); 3021 FoldingSetNodeID ID; 3022 SDOperand Ops[] = {Chain, Ptr, Val}; 3023 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3024 void* IP = 0; 3025 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3026 return SDOperand(E, 0); 3027 SDNode* N = new AtomicSDNode(Opcode, VTs, Chain, Ptr, Val, 3028 PtrVal, Alignment); 3029 CSEMap.InsertNode(N, IP); 3030 AllNodes.push_back(N); 3031 return SDOperand(N, 0); 3032} 3033 3034SDOperand 3035SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3036 MVT VT, SDOperand Chain, 3037 SDOperand Ptr, SDOperand Offset, 3038 const Value *SV, int SVOffset, MVT EVT, 3039 bool isVolatile, unsigned Alignment) { 3040 if (Alignment == 0) { // Ensure that codegen never sees alignment 0 3041 const Type *Ty = 0; 3042 if (VT != MVT::iPTR) { 3043 Ty = VT.getTypeForMVT(); 3044 } else if (SV) { 3045 const PointerType *PT = dyn_cast<PointerType>(SV->getType()); 3046 assert(PT && "Value for load must be a pointer"); 3047 Ty = PT->getElementType(); 3048 } 3049 assert(Ty && "Could not get type information for load"); 3050 Alignment = TLI.getTargetData()->getABITypeAlignment(Ty); 3051 } 3052 3053 if (VT == EVT) { 3054 ExtType = ISD::NON_EXTLOAD; 3055 } else if (ExtType == ISD::NON_EXTLOAD) { 3056 assert(VT == EVT && "Non-extending load from different memory type!"); 3057 } else { 3058 // Extending load. 3059 if (VT.isVector()) 3060 assert(EVT == VT.getVectorElementType() && "Invalid vector extload!"); 3061 else 3062 assert(EVT.bitsLT(VT) && 3063 "Should only be an extending load, not truncating!"); 3064 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3065 "Cannot sign/zero extend a FP/Vector load!"); 3066 assert(VT.isInteger() == EVT.isInteger() && 3067 "Cannot convert from FP to Int or Int -> FP!"); 3068 } 3069 3070 bool Indexed = AM != ISD::UNINDEXED; 3071 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3072 "Unindexed load with an offset!"); 3073 3074 SDVTList VTs = Indexed ? 3075 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3076 SDOperand Ops[] = { Chain, Ptr, Offset }; 3077 FoldingSetNodeID ID; 3078 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3079 ID.AddInteger(AM); 3080 ID.AddInteger(ExtType); 3081 ID.AddInteger(EVT.getRawBits()); 3082 ID.AddInteger(Alignment); 3083 ID.AddInteger(isVolatile); 3084 void *IP = 0; 3085 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3086 return SDOperand(E, 0); 3087 SDNode *N = new LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset, 3088 Alignment, isVolatile); 3089 CSEMap.InsertNode(N, IP); 3090 AllNodes.push_back(N); 3091 return SDOperand(N, 0); 3092} 3093 3094SDOperand SelectionDAG::getLoad(MVT VT, 3095 SDOperand Chain, SDOperand Ptr, 3096 const Value *SV, int SVOffset, 3097 bool isVolatile, unsigned Alignment) { 3098 SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3099 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3100 SV, SVOffset, VT, isVolatile, Alignment); 3101} 3102 3103SDOperand SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT, 3104 SDOperand Chain, SDOperand Ptr, 3105 const Value *SV, 3106 int SVOffset, MVT EVT, 3107 bool isVolatile, unsigned Alignment) { 3108 SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3109 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef, 3110 SV, SVOffset, EVT, isVolatile, Alignment); 3111} 3112 3113SDOperand 3114SelectionDAG::getIndexedLoad(SDOperand OrigLoad, SDOperand Base, 3115 SDOperand Offset, ISD::MemIndexedMode AM) { 3116 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3117 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3118 "Load is already a indexed load!"); 3119 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), 3120 LD->getChain(), Base, Offset, LD->getSrcValue(), 3121 LD->getSrcValueOffset(), LD->getMemoryVT(), 3122 LD->isVolatile(), LD->getAlignment()); 3123} 3124 3125SDOperand SelectionDAG::getStore(SDOperand Chain, SDOperand Val, 3126 SDOperand Ptr, const Value *SV, int SVOffset, 3127 bool isVolatile, unsigned Alignment) { 3128 MVT VT = Val.getValueType(); 3129 3130 if (Alignment == 0) { // Ensure that codegen never sees alignment 0 3131 const Type *Ty = 0; 3132 if (VT != MVT::iPTR) { 3133 Ty = VT.getTypeForMVT(); 3134 } else if (SV) { 3135 const PointerType *PT = dyn_cast<PointerType>(SV->getType()); 3136 assert(PT && "Value for store must be a pointer"); 3137 Ty = PT->getElementType(); 3138 } 3139 assert(Ty && "Could not get type information for store"); 3140 Alignment = TLI.getTargetData()->getABITypeAlignment(Ty); 3141 } 3142 SDVTList VTs = getVTList(MVT::Other); 3143 SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3144 SDOperand Ops[] = { Chain, Val, Ptr, Undef }; 3145 FoldingSetNodeID ID; 3146 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3147 ID.AddInteger(ISD::UNINDEXED); 3148 ID.AddInteger(false); 3149 ID.AddInteger(VT.getRawBits()); 3150 ID.AddInteger(Alignment); 3151 ID.AddInteger(isVolatile); 3152 void *IP = 0; 3153 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3154 return SDOperand(E, 0); 3155 SDNode *N = new StoreSDNode(Ops, VTs, ISD::UNINDEXED, false, 3156 VT, SV, SVOffset, Alignment, isVolatile); 3157 CSEMap.InsertNode(N, IP); 3158 AllNodes.push_back(N); 3159 return SDOperand(N, 0); 3160} 3161 3162SDOperand SelectionDAG::getTruncStore(SDOperand Chain, SDOperand Val, 3163 SDOperand Ptr, const Value *SV, 3164 int SVOffset, MVT SVT, 3165 bool isVolatile, unsigned Alignment) { 3166 MVT VT = Val.getValueType(); 3167 3168 if (VT == SVT) 3169 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3170 3171 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3172 assert(VT.isInteger() == SVT.isInteger() && 3173 "Can't do FP-INT conversion!"); 3174 3175 if (Alignment == 0) { // Ensure that codegen never sees alignment 0 3176 const Type *Ty = 0; 3177 if (VT != MVT::iPTR) { 3178 Ty = VT.getTypeForMVT(); 3179 } else if (SV) { 3180 const PointerType *PT = dyn_cast<PointerType>(SV->getType()); 3181 assert(PT && "Value for store must be a pointer"); 3182 Ty = PT->getElementType(); 3183 } 3184 assert(Ty && "Could not get type information for store"); 3185 Alignment = TLI.getTargetData()->getABITypeAlignment(Ty); 3186 } 3187 SDVTList VTs = getVTList(MVT::Other); 3188 SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3189 SDOperand Ops[] = { Chain, Val, Ptr, Undef }; 3190 FoldingSetNodeID ID; 3191 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3192 ID.AddInteger(ISD::UNINDEXED); 3193 ID.AddInteger(1); 3194 ID.AddInteger(SVT.getRawBits()); 3195 ID.AddInteger(Alignment); 3196 ID.AddInteger(isVolatile); 3197 void *IP = 0; 3198 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3199 return SDOperand(E, 0); 3200 SDNode *N = new StoreSDNode(Ops, VTs, ISD::UNINDEXED, true, 3201 SVT, SV, SVOffset, Alignment, isVolatile); 3202 CSEMap.InsertNode(N, IP); 3203 AllNodes.push_back(N); 3204 return SDOperand(N, 0); 3205} 3206 3207SDOperand 3208SelectionDAG::getIndexedStore(SDOperand OrigStore, SDOperand Base, 3209 SDOperand Offset, ISD::MemIndexedMode AM) { 3210 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3211 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3212 "Store is already a indexed store!"); 3213 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 3214 SDOperand Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3215 FoldingSetNodeID ID; 3216 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3217 ID.AddInteger(AM); 3218 ID.AddInteger(ST->isTruncatingStore()); 3219 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3220 ID.AddInteger(ST->getAlignment()); 3221 ID.AddInteger(ST->isVolatile()); 3222 void *IP = 0; 3223 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3224 return SDOperand(E, 0); 3225 SDNode *N = new StoreSDNode(Ops, VTs, AM, 3226 ST->isTruncatingStore(), ST->getMemoryVT(), 3227 ST->getSrcValue(), ST->getSrcValueOffset(), 3228 ST->getAlignment(), ST->isVolatile()); 3229 CSEMap.InsertNode(N, IP); 3230 AllNodes.push_back(N); 3231 return SDOperand(N, 0); 3232} 3233 3234SDOperand SelectionDAG::getVAArg(MVT VT, 3235 SDOperand Chain, SDOperand Ptr, 3236 SDOperand SV) { 3237 SDOperand Ops[] = { Chain, Ptr, SV }; 3238 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3); 3239} 3240 3241SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, 3242 SDOperandPtr Ops, unsigned NumOps) { 3243 switch (NumOps) { 3244 case 0: return getNode(Opcode, VT); 3245 case 1: return getNode(Opcode, VT, Ops[0]); 3246 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 3247 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 3248 default: break; 3249 } 3250 3251 switch (Opcode) { 3252 default: break; 3253 case ISD::SELECT_CC: { 3254 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 3255 assert(Ops[0].getValueType() == Ops[1].getValueType() && 3256 "LHS and RHS of condition must have same type!"); 3257 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3258 "True and False arms of SelectCC must have same type!"); 3259 assert(Ops[2].getValueType() == VT && 3260 "select_cc node must be of same type as true and false value!"); 3261 break; 3262 } 3263 case ISD::BR_CC: { 3264 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 3265 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3266 "LHS/RHS of comparison should match types!"); 3267 break; 3268 } 3269 } 3270 3271 // Memoize nodes. 3272 SDNode *N; 3273 SDVTList VTs = getVTList(VT); 3274 if (VT != MVT::Flag) { 3275 FoldingSetNodeID ID; 3276 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 3277 void *IP = 0; 3278 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3279 return SDOperand(E, 0); 3280 N = new SDNode(Opcode, VTs, Ops, NumOps); 3281 CSEMap.InsertNode(N, IP); 3282 } else { 3283 N = new SDNode(Opcode, VTs, Ops, NumOps); 3284 } 3285 AllNodes.push_back(N); 3286 return SDOperand(N, 0); 3287} 3288 3289SDOperand SelectionDAG::getNode(unsigned Opcode, 3290 std::vector<MVT> &ResultTys, 3291 SDOperandPtr Ops, unsigned NumOps) { 3292 return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(), 3293 Ops, NumOps); 3294} 3295 3296SDOperand SelectionDAG::getNode(unsigned Opcode, 3297 const MVT *VTs, unsigned NumVTs, 3298 SDOperandPtr Ops, unsigned NumOps) { 3299 if (NumVTs == 1) 3300 return getNode(Opcode, VTs[0], Ops, NumOps); 3301 return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps); 3302} 3303 3304SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3305 SDOperandPtr Ops, unsigned NumOps) { 3306 if (VTList.NumVTs == 1) 3307 return getNode(Opcode, VTList.VTs[0], Ops, NumOps); 3308 3309 switch (Opcode) { 3310 // FIXME: figure out how to safely handle things like 3311 // int foo(int x) { return 1 << (x & 255); } 3312 // int bar() { return foo(256); } 3313#if 0 3314 case ISD::SRA_PARTS: 3315 case ISD::SRL_PARTS: 3316 case ISD::SHL_PARTS: 3317 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 3318 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 3319 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3320 else if (N3.getOpcode() == ISD::AND) 3321 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 3322 // If the and is only masking out bits that cannot effect the shift, 3323 // eliminate the and. 3324 unsigned NumBits = VT.getSizeInBits()*2; 3325 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 3326 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3327 } 3328 break; 3329#endif 3330 } 3331 3332 // Memoize the node unless it returns a flag. 3333 SDNode *N; 3334 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3335 FoldingSetNodeID ID; 3336 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3337 void *IP = 0; 3338 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3339 return SDOperand(E, 0); 3340 if (NumOps == 1) 3341 N = new UnarySDNode(Opcode, VTList, Ops[0]); 3342 else if (NumOps == 2) 3343 N = new BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3344 else if (NumOps == 3) 3345 N = new TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3346 else 3347 N = new SDNode(Opcode, VTList, Ops, NumOps); 3348 CSEMap.InsertNode(N, IP); 3349 } else { 3350 if (NumOps == 1) 3351 N = new UnarySDNode(Opcode, VTList, Ops[0]); 3352 else if (NumOps == 2) 3353 N = new BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3354 else if (NumOps == 3) 3355 N = new TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3356 else 3357 N = new SDNode(Opcode, VTList, Ops, NumOps); 3358 } 3359 AllNodes.push_back(N); 3360 return SDOperand(N, 0); 3361} 3362 3363SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) { 3364 return getNode(Opcode, VTList, (SDOperand*)0, 0); 3365} 3366 3367SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3368 SDOperand N1) { 3369 SDOperand Ops[] = { N1 }; 3370 return getNode(Opcode, VTList, Ops, 1); 3371} 3372 3373SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3374 SDOperand N1, SDOperand N2) { 3375 SDOperand Ops[] = { N1, N2 }; 3376 return getNode(Opcode, VTList, Ops, 2); 3377} 3378 3379SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3380 SDOperand N1, SDOperand N2, SDOperand N3) { 3381 SDOperand Ops[] = { N1, N2, N3 }; 3382 return getNode(Opcode, VTList, Ops, 3); 3383} 3384 3385SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3386 SDOperand N1, SDOperand N2, SDOperand N3, 3387 SDOperand N4) { 3388 SDOperand Ops[] = { N1, N2, N3, N4 }; 3389 return getNode(Opcode, VTList, Ops, 4); 3390} 3391 3392SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3393 SDOperand N1, SDOperand N2, SDOperand N3, 3394 SDOperand N4, SDOperand N5) { 3395 SDOperand Ops[] = { N1, N2, N3, N4, N5 }; 3396 return getNode(Opcode, VTList, Ops, 5); 3397} 3398 3399SDVTList SelectionDAG::getVTList(MVT VT) { 3400 return makeVTList(SDNode::getValueTypeList(VT), 1); 3401} 3402 3403SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) { 3404 for (std::list<std::vector<MVT> >::iterator I = VTList.begin(), 3405 E = VTList.end(); I != E; ++I) { 3406 if (I->size() == 2 && (*I)[0] == VT1 && (*I)[1] == VT2) 3407 return makeVTList(&(*I)[0], 2); 3408 } 3409 std::vector<MVT> V; 3410 V.push_back(VT1); 3411 V.push_back(VT2); 3412 VTList.push_front(V); 3413 return makeVTList(&(*VTList.begin())[0], 2); 3414} 3415SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, 3416 MVT VT3) { 3417 for (std::list<std::vector<MVT> >::iterator I = VTList.begin(), 3418 E = VTList.end(); I != E; ++I) { 3419 if (I->size() == 3 && (*I)[0] == VT1 && (*I)[1] == VT2 && 3420 (*I)[2] == VT3) 3421 return makeVTList(&(*I)[0], 3); 3422 } 3423 std::vector<MVT> V; 3424 V.push_back(VT1); 3425 V.push_back(VT2); 3426 V.push_back(VT3); 3427 VTList.push_front(V); 3428 return makeVTList(&(*VTList.begin())[0], 3); 3429} 3430 3431SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) { 3432 switch (NumVTs) { 3433 case 0: assert(0 && "Cannot have nodes without results!"); 3434 case 1: return getVTList(VTs[0]); 3435 case 2: return getVTList(VTs[0], VTs[1]); 3436 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 3437 default: break; 3438 } 3439 3440 for (std::list<std::vector<MVT> >::iterator I = VTList.begin(), 3441 E = VTList.end(); I != E; ++I) { 3442 if (I->size() != NumVTs || VTs[0] != (*I)[0] || VTs[1] != (*I)[1]) continue; 3443 3444 bool NoMatch = false; 3445 for (unsigned i = 2; i != NumVTs; ++i) 3446 if (VTs[i] != (*I)[i]) { 3447 NoMatch = true; 3448 break; 3449 } 3450 if (!NoMatch) 3451 return makeVTList(&*I->begin(), NumVTs); 3452 } 3453 3454 VTList.push_front(std::vector<MVT>(VTs, VTs+NumVTs)); 3455 return makeVTList(&*VTList.begin()->begin(), NumVTs); 3456} 3457 3458 3459/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 3460/// specified operands. If the resultant node already exists in the DAG, 3461/// this does not modify the specified node, instead it returns the node that 3462/// already exists. If the resultant node does not exist in the DAG, the 3463/// input node is returned. As a degenerate case, if you specify the same 3464/// input operands as the node already has, the input node is returned. 3465SDOperand SelectionDAG:: 3466UpdateNodeOperands(SDOperand InN, SDOperand Op) { 3467 SDNode *N = InN.Val; 3468 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 3469 3470 // Check to see if there is no change. 3471 if (Op == N->getOperand(0)) return InN; 3472 3473 // See if the modified node already exists. 3474 void *InsertPos = 0; 3475 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 3476 return SDOperand(Existing, InN.ResNo); 3477 3478 // Nope it doesn't. Remove the node from it's current place in the maps. 3479 if (InsertPos) 3480 RemoveNodeFromCSEMaps(N); 3481 3482 // Now we update the operands. 3483 N->OperandList[0].getVal()->removeUser(0, N); 3484 N->OperandList[0] = Op; 3485 N->OperandList[0].setUser(N); 3486 Op.Val->addUser(0, N); 3487 3488 // If this gets put into a CSE map, add it. 3489 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3490 return InN; 3491} 3492 3493SDOperand SelectionDAG:: 3494UpdateNodeOperands(SDOperand InN, SDOperand Op1, SDOperand Op2) { 3495 SDNode *N = InN.Val; 3496 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 3497 3498 // Check to see if there is no change. 3499 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 3500 return InN; // No operands changed, just return the input node. 3501 3502 // See if the modified node already exists. 3503 void *InsertPos = 0; 3504 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 3505 return SDOperand(Existing, InN.ResNo); 3506 3507 // Nope it doesn't. Remove the node from it's current place in the maps. 3508 if (InsertPos) 3509 RemoveNodeFromCSEMaps(N); 3510 3511 // Now we update the operands. 3512 if (N->OperandList[0] != Op1) { 3513 N->OperandList[0].getVal()->removeUser(0, N); 3514 N->OperandList[0] = Op1; 3515 N->OperandList[0].setUser(N); 3516 Op1.Val->addUser(0, N); 3517 } 3518 if (N->OperandList[1] != Op2) { 3519 N->OperandList[1].getVal()->removeUser(1, N); 3520 N->OperandList[1] = Op2; 3521 N->OperandList[1].setUser(N); 3522 Op2.Val->addUser(1, N); 3523 } 3524 3525 // If this gets put into a CSE map, add it. 3526 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3527 return InN; 3528} 3529 3530SDOperand SelectionDAG:: 3531UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2, SDOperand Op3) { 3532 SDOperand Ops[] = { Op1, Op2, Op3 }; 3533 return UpdateNodeOperands(N, Ops, 3); 3534} 3535 3536SDOperand SelectionDAG:: 3537UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2, 3538 SDOperand Op3, SDOperand Op4) { 3539 SDOperand Ops[] = { Op1, Op2, Op3, Op4 }; 3540 return UpdateNodeOperands(N, Ops, 4); 3541} 3542 3543SDOperand SelectionDAG:: 3544UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2, 3545 SDOperand Op3, SDOperand Op4, SDOperand Op5) { 3546 SDOperand Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 3547 return UpdateNodeOperands(N, Ops, 5); 3548} 3549 3550SDOperand SelectionDAG:: 3551UpdateNodeOperands(SDOperand InN, SDOperandPtr Ops, unsigned NumOps) { 3552 SDNode *N = InN.Val; 3553 assert(N->getNumOperands() == NumOps && 3554 "Update with wrong number of operands"); 3555 3556 // Check to see if there is no change. 3557 bool AnyChange = false; 3558 for (unsigned i = 0; i != NumOps; ++i) { 3559 if (Ops[i] != N->getOperand(i)) { 3560 AnyChange = true; 3561 break; 3562 } 3563 } 3564 3565 // No operands changed, just return the input node. 3566 if (!AnyChange) return InN; 3567 3568 // See if the modified node already exists. 3569 void *InsertPos = 0; 3570 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 3571 return SDOperand(Existing, InN.ResNo); 3572 3573 // Nope it doesn't. Remove the node from its current place in the maps. 3574 if (InsertPos) 3575 RemoveNodeFromCSEMaps(N); 3576 3577 // Now we update the operands. 3578 for (unsigned i = 0; i != NumOps; ++i) { 3579 if (N->OperandList[i] != Ops[i]) { 3580 N->OperandList[i].getVal()->removeUser(i, N); 3581 N->OperandList[i] = Ops[i]; 3582 N->OperandList[i].setUser(N); 3583 Ops[i].Val->addUser(i, N); 3584 } 3585 } 3586 3587 // If this gets put into a CSE map, add it. 3588 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3589 return InN; 3590} 3591 3592/// MorphNodeTo - This frees the operands of the current node, resets the 3593/// opcode, types, and operands to the specified value. This should only be 3594/// used by the SelectionDAG class. 3595void SDNode::MorphNodeTo(unsigned Opc, SDVTList L, 3596 SDOperandPtr Ops, unsigned NumOps) { 3597 NodeType = Opc; 3598 ValueList = L.VTs; 3599 NumValues = L.NumVTs; 3600 3601 // Clear the operands list, updating used nodes to remove this from their 3602 // use list. 3603 for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) 3604 I->getVal()->removeUser(std::distance(op_begin(), I), this); 3605 3606 // If NumOps is larger than the # of operands we currently have, reallocate 3607 // the operand list. 3608 if (NumOps > NumOperands) { 3609 if (OperandsNeedDelete) { 3610 delete [] OperandList; 3611 } 3612 OperandList = new SDUse[NumOps]; 3613 OperandsNeedDelete = true; 3614 } 3615 3616 // Assign the new operands. 3617 NumOperands = NumOps; 3618 3619 for (unsigned i = 0, e = NumOps; i != e; ++i) { 3620 OperandList[i] = Ops[i]; 3621 OperandList[i].setUser(this); 3622 SDNode *N = OperandList[i].getVal(); 3623 N->addUser(i, this); 3624 ++N->UsesSize; 3625 } 3626} 3627 3628/// SelectNodeTo - These are used for target selectors to *mutate* the 3629/// specified node to have the specified return type, Target opcode, and 3630/// operands. Note that target opcodes are stored as 3631/// ISD::BUILTIN_OP_END+TargetOpcode in the node opcode field. 3632/// 3633/// Note that SelectNodeTo returns the resultant node. If there is already a 3634/// node of the specified opcode and operands, it returns that node instead of 3635/// the current one. 3636SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3637 MVT VT) { 3638 SDVTList VTs = getVTList(VT); 3639 FoldingSetNodeID ID; 3640 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, (SDOperand*)0, 0); 3641 void *IP = 0; 3642 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3643 return ON; 3644 3645 RemoveNodeFromCSEMaps(N); 3646 3647 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, SDOperandPtr(), 0); 3648 3649 CSEMap.InsertNode(N, IP); 3650 return N; 3651} 3652 3653SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3654 MVT VT, SDOperand Op1) { 3655 // If an identical node already exists, use it. 3656 SDVTList VTs = getVTList(VT); 3657 SDOperand Ops[] = { Op1 }; 3658 3659 FoldingSetNodeID ID; 3660 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 1); 3661 void *IP = 0; 3662 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3663 return ON; 3664 3665 RemoveNodeFromCSEMaps(N); 3666 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 1); 3667 CSEMap.InsertNode(N, IP); 3668 return N; 3669} 3670 3671SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3672 MVT VT, SDOperand Op1, 3673 SDOperand Op2) { 3674 // If an identical node already exists, use it. 3675 SDVTList VTs = getVTList(VT); 3676 SDOperand Ops[] = { Op1, Op2 }; 3677 3678 FoldingSetNodeID ID; 3679 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2); 3680 void *IP = 0; 3681 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3682 return ON; 3683 3684 RemoveNodeFromCSEMaps(N); 3685 3686 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2); 3687 3688 CSEMap.InsertNode(N, IP); // Memoize the new node. 3689 return N; 3690} 3691 3692SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3693 MVT VT, SDOperand Op1, 3694 SDOperand Op2, SDOperand Op3) { 3695 // If an identical node already exists, use it. 3696 SDVTList VTs = getVTList(VT); 3697 SDOperand Ops[] = { Op1, Op2, Op3 }; 3698 FoldingSetNodeID ID; 3699 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3); 3700 void *IP = 0; 3701 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3702 return ON; 3703 3704 RemoveNodeFromCSEMaps(N); 3705 3706 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3); 3707 3708 CSEMap.InsertNode(N, IP); // Memoize the new node. 3709 return N; 3710} 3711 3712SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3713 MVT VT, SDOperandPtr Ops, 3714 unsigned NumOps) { 3715 // If an identical node already exists, use it. 3716 SDVTList VTs = getVTList(VT); 3717 FoldingSetNodeID ID; 3718 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, NumOps); 3719 void *IP = 0; 3720 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3721 return ON; 3722 3723 RemoveNodeFromCSEMaps(N); 3724 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, NumOps); 3725 3726 CSEMap.InsertNode(N, IP); // Memoize the new node. 3727 return N; 3728} 3729 3730SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3731 MVT VT1, MVT VT2, 3732 SDOperand Op1, SDOperand Op2) { 3733 SDVTList VTs = getVTList(VT1, VT2); 3734 FoldingSetNodeID ID; 3735 SDOperand Ops[] = { Op1, Op2 }; 3736 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2); 3737 void *IP = 0; 3738 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3739 return ON; 3740 3741 RemoveNodeFromCSEMaps(N); 3742 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2); 3743 CSEMap.InsertNode(N, IP); // Memoize the new node. 3744 return N; 3745} 3746 3747SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3748 MVT VT1, MVT VT2, 3749 SDOperand Op1, SDOperand Op2, 3750 SDOperand Op3) { 3751 // If an identical node already exists, use it. 3752 SDVTList VTs = getVTList(VT1, VT2); 3753 SDOperand Ops[] = { Op1, Op2, Op3 }; 3754 FoldingSetNodeID ID; 3755 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3); 3756 void *IP = 0; 3757 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3758 return ON; 3759 3760 RemoveNodeFromCSEMaps(N); 3761 3762 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3); 3763 CSEMap.InsertNode(N, IP); // Memoize the new node. 3764 return N; 3765} 3766 3767 3768/// getTargetNode - These are used for target selectors to create a new node 3769/// with specified return type(s), target opcode, and operands. 3770/// 3771/// Note that getTargetNode returns the resultant node. If there is already a 3772/// node of the specified opcode and operands, it returns that node instead of 3773/// the current one. 3774SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) { 3775 return getNode(ISD::BUILTIN_OP_END+Opcode, VT).Val; 3776} 3777SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDOperand Op1) { 3778 return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1).Val; 3779} 3780SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 3781 SDOperand Op1, SDOperand Op2) { 3782 return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2).Val; 3783} 3784SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 3785 SDOperand Op1, SDOperand Op2, 3786 SDOperand Op3) { 3787 return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2, Op3).Val; 3788} 3789SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 3790 SDOperandPtr Ops, unsigned NumOps) { 3791 return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Ops, NumOps).Val; 3792} 3793SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) { 3794 const MVT *VTs = getNodeValueTypes(VT1, VT2); 3795 SDOperand Op; 3796 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, &Op, 0).Val; 3797} 3798SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 3799 MVT VT2, SDOperand Op1) { 3800 const MVT *VTs = getNodeValueTypes(VT1, VT2); 3801 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, &Op1, 1).Val; 3802} 3803SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 3804 MVT VT2, SDOperand Op1, 3805 SDOperand Op2) { 3806 const MVT *VTs = getNodeValueTypes(VT1, VT2); 3807 SDOperand Ops[] = { Op1, Op2 }; 3808 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, 2).Val; 3809} 3810SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 3811 MVT VT2, SDOperand Op1, 3812 SDOperand Op2, SDOperand Op3) { 3813 const MVT *VTs = getNodeValueTypes(VT1, VT2); 3814 SDOperand Ops[] = { Op1, Op2, Op3 }; 3815 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, 3).Val; 3816} 3817SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, 3818 SDOperandPtr Ops, unsigned NumOps) { 3819 const MVT *VTs = getNodeValueTypes(VT1, VT2); 3820 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, NumOps).Val; 3821} 3822SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 3823 SDOperand Op1, SDOperand Op2) { 3824 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 3825 SDOperand Ops[] = { Op1, Op2 }; 3826 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, 2).Val; 3827} 3828SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 3829 SDOperand Op1, SDOperand Op2, 3830 SDOperand Op3) { 3831 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 3832 SDOperand Ops[] = { Op1, Op2, Op3 }; 3833 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, 3).Val; 3834} 3835SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 3836 SDOperandPtr Ops, unsigned NumOps) { 3837 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 3838 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, NumOps).Val; 3839} 3840SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 3841 MVT VT2, MVT VT3, MVT VT4, 3842 SDOperandPtr Ops, unsigned NumOps) { 3843 std::vector<MVT> VTList; 3844 VTList.push_back(VT1); 3845 VTList.push_back(VT2); 3846 VTList.push_back(VT3); 3847 VTList.push_back(VT4); 3848 const MVT *VTs = getNodeValueTypes(VTList); 3849 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 4, Ops, NumOps).Val; 3850} 3851SDNode *SelectionDAG::getTargetNode(unsigned Opcode, 3852 std::vector<MVT> &ResultTys, 3853 SDOperandPtr Ops, unsigned NumOps) { 3854 const MVT *VTs = getNodeValueTypes(ResultTys); 3855 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, ResultTys.size(), 3856 Ops, NumOps).Val; 3857} 3858 3859/// getNodeIfExists - Get the specified node if it's already available, or 3860/// else return NULL. 3861SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 3862 SDOperandPtr Ops, unsigned NumOps) { 3863 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3864 FoldingSetNodeID ID; 3865 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3866 void *IP = 0; 3867 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3868 return E; 3869 } 3870 return NULL; 3871} 3872 3873 3874/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 3875/// This can cause recursive merging of nodes in the DAG. 3876/// 3877/// This version assumes From has a single result value. 3878/// 3879void SelectionDAG::ReplaceAllUsesWith(SDOperand FromN, SDOperand To, 3880 DAGUpdateListener *UpdateListener) { 3881 SDNode *From = FromN.Val; 3882 assert(From->getNumValues() == 1 && FromN.ResNo == 0 && 3883 "Cannot replace with this method!"); 3884 assert(From != To.Val && "Cannot replace uses of with self"); 3885 3886 while (!From->use_empty()) { 3887 SDNode::use_iterator UI = From->use_begin(); 3888 SDNode *U = UI->getUser(); 3889 3890 // This node is about to morph, remove its old self from the CSE maps. 3891 RemoveNodeFromCSEMaps(U); 3892 int operandNum = 0; 3893 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 3894 I != E; ++I, ++operandNum) 3895 if (I->getVal() == From) { 3896 From->removeUser(operandNum, U); 3897 *I = To; 3898 I->setUser(U); 3899 To.Val->addUser(operandNum, U); 3900 } 3901 3902 // Now that we have modified U, add it back to the CSE maps. If it already 3903 // exists there, recursively merge the results together. 3904 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 3905 ReplaceAllUsesWith(U, Existing, UpdateListener); 3906 // U is now dead. Inform the listener if it exists and delete it. 3907 if (UpdateListener) 3908 UpdateListener->NodeDeleted(U, Existing); 3909 DeleteNodeNotInCSEMaps(U); 3910 } else { 3911 // If the node doesn't already exist, we updated it. Inform a listener if 3912 // it exists. 3913 if (UpdateListener) 3914 UpdateListener->NodeUpdated(U); 3915 } 3916 } 3917} 3918 3919/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 3920/// This can cause recursive merging of nodes in the DAG. 3921/// 3922/// This version assumes From/To have matching types and numbers of result 3923/// values. 3924/// 3925void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 3926 DAGUpdateListener *UpdateListener) { 3927 assert(From != To && "Cannot replace uses of with self"); 3928 assert(From->getNumValues() == To->getNumValues() && 3929 "Cannot use this version of ReplaceAllUsesWith!"); 3930 if (From->getNumValues() == 1) // If possible, use the faster version. 3931 return ReplaceAllUsesWith(SDOperand(From, 0), SDOperand(To, 0), 3932 UpdateListener); 3933 3934 while (!From->use_empty()) { 3935 SDNode::use_iterator UI = From->use_begin(); 3936 SDNode *U = UI->getUser(); 3937 3938 // This node is about to morph, remove its old self from the CSE maps. 3939 RemoveNodeFromCSEMaps(U); 3940 int operandNum = 0; 3941 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 3942 I != E; ++I, ++operandNum) 3943 if (I->getVal() == From) { 3944 From->removeUser(operandNum, U); 3945 I->getVal() = To; 3946 To->addUser(operandNum, U); 3947 } 3948 3949 // Now that we have modified U, add it back to the CSE maps. If it already 3950 // exists there, recursively merge the results together. 3951 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 3952 ReplaceAllUsesWith(U, Existing, UpdateListener); 3953 // U is now dead. Inform the listener if it exists and delete it. 3954 if (UpdateListener) 3955 UpdateListener->NodeDeleted(U, Existing); 3956 DeleteNodeNotInCSEMaps(U); 3957 } else { 3958 // If the node doesn't already exist, we updated it. Inform a listener if 3959 // it exists. 3960 if (UpdateListener) 3961 UpdateListener->NodeUpdated(U); 3962 } 3963 } 3964} 3965 3966/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 3967/// This can cause recursive merging of nodes in the DAG. 3968/// 3969/// This version can replace From with any result values. To must match the 3970/// number and types of values returned by From. 3971void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 3972 SDOperandPtr To, 3973 DAGUpdateListener *UpdateListener) { 3974 if (From->getNumValues() == 1) // Handle the simple case efficiently. 3975 return ReplaceAllUsesWith(SDOperand(From, 0), To[0], UpdateListener); 3976 3977 while (!From->use_empty()) { 3978 SDNode::use_iterator UI = From->use_begin(); 3979 SDNode *U = UI->getUser(); 3980 3981 // This node is about to morph, remove its old self from the CSE maps. 3982 RemoveNodeFromCSEMaps(U); 3983 int operandNum = 0; 3984 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 3985 I != E; ++I, ++operandNum) 3986 if (I->getVal() == From) { 3987 const SDOperand &ToOp = To[I->getSDOperand().ResNo]; 3988 From->removeUser(operandNum, U); 3989 *I = ToOp; 3990 I->setUser(U); 3991 ToOp.Val->addUser(operandNum, U); 3992 } 3993 3994 // Now that we have modified U, add it back to the CSE maps. If it already 3995 // exists there, recursively merge the results together. 3996 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 3997 ReplaceAllUsesWith(U, Existing, UpdateListener); 3998 // U is now dead. Inform the listener if it exists and delete it. 3999 if (UpdateListener) 4000 UpdateListener->NodeDeleted(U, Existing); 4001 DeleteNodeNotInCSEMaps(U); 4002 } else { 4003 // If the node doesn't already exist, we updated it. Inform a listener if 4004 // it exists. 4005 if (UpdateListener) 4006 UpdateListener->NodeUpdated(U); 4007 } 4008 } 4009} 4010 4011namespace { 4012 /// ChainedSetUpdaterListener - This class is a DAGUpdateListener that removes 4013 /// any deleted nodes from the set passed into its constructor and recursively 4014 /// notifies another update listener if specified. 4015 class ChainedSetUpdaterListener : 4016 public SelectionDAG::DAGUpdateListener { 4017 SmallSetVector<SDNode*, 16> &Set; 4018 SelectionDAG::DAGUpdateListener *Chain; 4019 public: 4020 ChainedSetUpdaterListener(SmallSetVector<SDNode*, 16> &set, 4021 SelectionDAG::DAGUpdateListener *chain) 4022 : Set(set), Chain(chain) {} 4023 4024 virtual void NodeDeleted(SDNode *N, SDNode *E) { 4025 Set.remove(N); 4026 if (Chain) Chain->NodeDeleted(N, E); 4027 } 4028 virtual void NodeUpdated(SDNode *N) { 4029 if (Chain) Chain->NodeUpdated(N); 4030 } 4031 }; 4032} 4033 4034/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 4035/// uses of other values produced by From.Val alone. The Deleted vector is 4036/// handled the same way as for ReplaceAllUsesWith. 4037void SelectionDAG::ReplaceAllUsesOfValueWith(SDOperand From, SDOperand To, 4038 DAGUpdateListener *UpdateListener){ 4039 assert(From != To && "Cannot replace a value with itself"); 4040 4041 // Handle the simple, trivial, case efficiently. 4042 if (From.Val->getNumValues() == 1) { 4043 ReplaceAllUsesWith(From, To, UpdateListener); 4044 return; 4045 } 4046 4047 if (From.use_empty()) return; 4048 4049 // Get all of the users of From.Val. We want these in a nice, 4050 // deterministically ordered and uniqued set, so we use a SmallSetVector. 4051 SmallSetVector<SDNode*, 16> Users; 4052 for (SDNode::use_iterator UI = From.Val->use_begin(), 4053 E = From.Val->use_end(); UI != E; ++UI) { 4054 SDNode *User = UI->getUser(); 4055 if (!Users.count(User)) 4056 Users.insert(User); 4057 } 4058 4059 // When one of the recursive merges deletes nodes from the graph, we need to 4060 // make sure that UpdateListener is notified *and* that the node is removed 4061 // from Users if present. CSUL does this. 4062 ChainedSetUpdaterListener CSUL(Users, UpdateListener); 4063 4064 while (!Users.empty()) { 4065 // We know that this user uses some value of From. If it is the right 4066 // value, update it. 4067 SDNode *User = Users.back(); 4068 Users.pop_back(); 4069 4070 // Scan for an operand that matches From. 4071 SDNode::op_iterator Op = User->op_begin(), E = User->op_end(); 4072 for (; Op != E; ++Op) 4073 if (*Op == From) break; 4074 4075 // If there are no matches, the user must use some other result of From. 4076 if (Op == E) continue; 4077 4078 // Okay, we know this user needs to be updated. Remove its old self 4079 // from the CSE maps. 4080 RemoveNodeFromCSEMaps(User); 4081 4082 // Update all operands that match "From" in case there are multiple uses. 4083 for (; Op != E; ++Op) { 4084 if (*Op == From) { 4085 From.Val->removeUser(Op-User->op_begin(), User); 4086 *Op = To; 4087 Op->setUser(User); 4088 To.Val->addUser(Op-User->op_begin(), User); 4089 } 4090 } 4091 4092 // Now that we have modified User, add it back to the CSE maps. If it 4093 // already exists there, recursively merge the results together. 4094 SDNode *Existing = AddNonLeafNodeToCSEMaps(User); 4095 if (!Existing) { 4096 if (UpdateListener) UpdateListener->NodeUpdated(User); 4097 continue; // Continue on to next user. 4098 } 4099 4100 // If there was already an existing matching node, use ReplaceAllUsesWith 4101 // to replace the dead one with the existing one. This can cause 4102 // recursive merging of other unrelated nodes down the line. The merging 4103 // can cause deletion of nodes that used the old value. To handle this, we 4104 // use CSUL to remove them from the Users set. 4105 ReplaceAllUsesWith(User, Existing, &CSUL); 4106 4107 // User is now dead. Notify a listener if present. 4108 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing); 4109 DeleteNodeNotInCSEMaps(User); 4110 } 4111} 4112 4113/// AssignNodeIds - Assign a unique node id for each node in the DAG based on 4114/// their allnodes order. It returns the maximum id. 4115unsigned SelectionDAG::AssignNodeIds() { 4116 unsigned Id = 0; 4117 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I){ 4118 SDNode *N = I; 4119 N->setNodeId(Id++); 4120 } 4121 return Id; 4122} 4123 4124/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 4125/// based on their topological order. It returns the maximum id and a vector 4126/// of the SDNodes* in assigned order by reference. 4127unsigned SelectionDAG::AssignTopologicalOrder(std::vector<SDNode*> &TopOrder) { 4128 unsigned DAGSize = AllNodes.size(); 4129 std::vector<unsigned> InDegree(DAGSize); 4130 std::vector<SDNode*> Sources; 4131 4132 // Use a two pass approach to avoid using a std::map which is slow. 4133 unsigned Id = 0; 4134 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I){ 4135 SDNode *N = I; 4136 N->setNodeId(Id++); 4137 unsigned Degree = N->use_size(); 4138 InDegree[N->getNodeId()] = Degree; 4139 if (Degree == 0) 4140 Sources.push_back(N); 4141 } 4142 4143 TopOrder.clear(); 4144 while (!Sources.empty()) { 4145 SDNode *N = Sources.back(); 4146 Sources.pop_back(); 4147 TopOrder.push_back(N); 4148 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 4149 SDNode *P = I->getVal(); 4150 unsigned Degree = --InDegree[P->getNodeId()]; 4151 if (Degree == 0) 4152 Sources.push_back(P); 4153 } 4154 } 4155 4156 // Second pass, assign the actual topological order as node ids. 4157 Id = 0; 4158 for (std::vector<SDNode*>::iterator TI = TopOrder.begin(),TE = TopOrder.end(); 4159 TI != TE; ++TI) 4160 (*TI)->setNodeId(Id++); 4161 4162 return Id; 4163} 4164 4165 4166 4167//===----------------------------------------------------------------------===// 4168// SDNode Class 4169//===----------------------------------------------------------------------===// 4170 4171// Out-of-line virtual method to give class a home. 4172void SDNode::ANCHOR() {} 4173void UnarySDNode::ANCHOR() {} 4174void BinarySDNode::ANCHOR() {} 4175void TernarySDNode::ANCHOR() {} 4176void HandleSDNode::ANCHOR() {} 4177void StringSDNode::ANCHOR() {} 4178void ConstantSDNode::ANCHOR() {} 4179void ConstantFPSDNode::ANCHOR() {} 4180void GlobalAddressSDNode::ANCHOR() {} 4181void FrameIndexSDNode::ANCHOR() {} 4182void JumpTableSDNode::ANCHOR() {} 4183void ConstantPoolSDNode::ANCHOR() {} 4184void BasicBlockSDNode::ANCHOR() {} 4185void SrcValueSDNode::ANCHOR() {} 4186void MemOperandSDNode::ANCHOR() {} 4187void RegisterSDNode::ANCHOR() {} 4188void ExternalSymbolSDNode::ANCHOR() {} 4189void CondCodeSDNode::ANCHOR() {} 4190void ARG_FLAGSSDNode::ANCHOR() {} 4191void VTSDNode::ANCHOR() {} 4192void MemSDNode::ANCHOR() {} 4193void LoadSDNode::ANCHOR() {} 4194void StoreSDNode::ANCHOR() {} 4195void AtomicSDNode::ANCHOR() {} 4196 4197HandleSDNode::~HandleSDNode() { 4198 SDVTList VTs = { 0, 0 }; 4199 MorphNodeTo(ISD::HANDLENODE, VTs, SDOperandPtr(), 0); // Drops operand uses. 4200} 4201 4202GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA, 4203 MVT VT, int o) 4204 : SDNode(isa<GlobalVariable>(GA) && 4205 cast<GlobalVariable>(GA)->isThreadLocal() ? 4206 // Thread Local 4207 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) : 4208 // Non Thread Local 4209 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress), 4210 getSDVTList(VT)), Offset(o) { 4211 TheGlobal = const_cast<GlobalValue*>(GA); 4212} 4213 4214/// getMemOperand - Return a MachineMemOperand object describing the memory 4215/// reference performed by this atomic. 4216MachineMemOperand AtomicSDNode::getMemOperand() const { 4217 int Size = (getValueType(0).getSizeInBits() + 7) >> 3; 4218 int Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 4219 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 4220 4221 // Check if the atomic references a frame index 4222 const FrameIndexSDNode *FI = 4223 dyn_cast<const FrameIndexSDNode>(getBasePtr().Val); 4224 if (!getSrcValue() && FI) 4225 return MachineMemOperand(PseudoSourceValue::getFixedStack(), Flags, 4226 FI->getIndex(), Size, getAlignment()); 4227 else 4228 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(), 4229 Size, getAlignment()); 4230} 4231 4232/// getMemOperand - Return a MachineMemOperand object describing the memory 4233/// reference performed by this load or store. 4234MachineMemOperand LSBaseSDNode::getMemOperand() const { 4235 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3; 4236 int Flags = 4237 getOpcode() == ISD::LOAD ? MachineMemOperand::MOLoad : 4238 MachineMemOperand::MOStore; 4239 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 4240 4241 // Check if the load references a frame index, and does not have 4242 // an SV attached. 4243 const FrameIndexSDNode *FI = 4244 dyn_cast<const FrameIndexSDNode>(getBasePtr().Val); 4245 if (!getSrcValue() && FI) 4246 return MachineMemOperand(PseudoSourceValue::getFixedStack(), Flags, 4247 FI->getIndex(), Size, getAlignment()); 4248 else 4249 return MachineMemOperand(getSrcValue(), Flags, 4250 getSrcValueOffset(), Size, getAlignment()); 4251} 4252 4253/// Profile - Gather unique data for the node. 4254/// 4255void SDNode::Profile(FoldingSetNodeID &ID) { 4256 AddNodeIDNode(ID, this); 4257} 4258 4259/// getValueTypeList - Return a pointer to the specified value type. 4260/// 4261const MVT *SDNode::getValueTypeList(MVT VT) { 4262 if (VT.isExtended()) { 4263 static std::set<MVT, MVT::compareRawBits> EVTs; 4264 return &(*EVTs.insert(VT).first); 4265 } else { 4266 static MVT VTs[MVT::LAST_VALUETYPE]; 4267 VTs[VT.getSimpleVT()] = VT; 4268 return &VTs[VT.getSimpleVT()]; 4269 } 4270} 4271 4272/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 4273/// indicated value. This method ignores uses of other values defined by this 4274/// operation. 4275bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 4276 assert(Value < getNumValues() && "Bad value!"); 4277 4278 // If there is only one value, this is easy. 4279 if (getNumValues() == 1) 4280 return use_size() == NUses; 4281 if (use_size() < NUses) return false; 4282 4283 SDOperand TheValue(const_cast<SDNode *>(this), Value); 4284 4285 SmallPtrSet<SDNode*, 32> UsersHandled; 4286 4287 // TODO: Only iterate over uses of a given value of the node 4288 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 4289 if (*UI == TheValue) { 4290 if (NUses == 0) 4291 return false; 4292 --NUses; 4293 } 4294 } 4295 4296 // Found exactly the right number of uses? 4297 return NUses == 0; 4298} 4299 4300 4301/// hasAnyUseOfValue - Return true if there are any use of the indicated 4302/// value. This method ignores uses of other values defined by this operation. 4303bool SDNode::hasAnyUseOfValue(unsigned Value) const { 4304 assert(Value < getNumValues() && "Bad value!"); 4305 4306 if (use_empty()) return false; 4307 4308 SDOperand TheValue(const_cast<SDNode *>(this), Value); 4309 4310 SmallPtrSet<SDNode*, 32> UsersHandled; 4311 4312 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 4313 SDNode *User = UI->getUser(); 4314 if (User->getNumOperands() == 1 || 4315 UsersHandled.insert(User)) // First time we've seen this? 4316 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) 4317 if (User->getOperand(i) == TheValue) { 4318 return true; 4319 } 4320 } 4321 4322 return false; 4323} 4324 4325 4326/// isOnlyUseOf - Return true if this node is the only use of N. 4327/// 4328bool SDNode::isOnlyUseOf(SDNode *N) const { 4329 bool Seen = false; 4330 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 4331 SDNode *User = I->getUser(); 4332 if (User == this) 4333 Seen = true; 4334 else 4335 return false; 4336 } 4337 4338 return Seen; 4339} 4340 4341/// isOperand - Return true if this node is an operand of N. 4342/// 4343bool SDOperand::isOperandOf(SDNode *N) const { 4344 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 4345 if (*this == N->getOperand(i)) 4346 return true; 4347 return false; 4348} 4349 4350bool SDNode::isOperandOf(SDNode *N) const { 4351 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 4352 if (this == N->OperandList[i].getVal()) 4353 return true; 4354 return false; 4355} 4356 4357/// reachesChainWithoutSideEffects - Return true if this operand (which must 4358/// be a chain) reaches the specified operand without crossing any 4359/// side-effecting instructions. In practice, this looks through token 4360/// factors and non-volatile loads. In order to remain efficient, this only 4361/// looks a couple of nodes in, it does not do an exhaustive search. 4362bool SDOperand::reachesChainWithoutSideEffects(SDOperand Dest, 4363 unsigned Depth) const { 4364 if (*this == Dest) return true; 4365 4366 // Don't search too deeply, we just want to be able to see through 4367 // TokenFactor's etc. 4368 if (Depth == 0) return false; 4369 4370 // If this is a token factor, all inputs to the TF happen in parallel. If any 4371 // of the operands of the TF reach dest, then we can do the xform. 4372 if (getOpcode() == ISD::TokenFactor) { 4373 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 4374 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 4375 return true; 4376 return false; 4377 } 4378 4379 // Loads don't have side effects, look through them. 4380 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 4381 if (!Ld->isVolatile()) 4382 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 4383 } 4384 return false; 4385} 4386 4387 4388static void findPredecessor(SDNode *N, const SDNode *P, bool &found, 4389 SmallPtrSet<SDNode *, 32> &Visited) { 4390 if (found || !Visited.insert(N)) 4391 return; 4392 4393 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) { 4394 SDNode *Op = N->getOperand(i).Val; 4395 if (Op == P) { 4396 found = true; 4397 return; 4398 } 4399 findPredecessor(Op, P, found, Visited); 4400 } 4401} 4402 4403/// isPredecessorOf - Return true if this node is a predecessor of N. This node 4404/// is either an operand of N or it can be reached by recursively traversing 4405/// up the operands. 4406/// NOTE: this is an expensive method. Use it carefully. 4407bool SDNode::isPredecessorOf(SDNode *N) const { 4408 SmallPtrSet<SDNode *, 32> Visited; 4409 bool found = false; 4410 findPredecessor(N, this, found, Visited); 4411 return found; 4412} 4413 4414uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 4415 assert(Num < NumOperands && "Invalid child # of SDNode!"); 4416 return cast<ConstantSDNode>(OperandList[Num])->getValue(); 4417} 4418 4419std::string SDNode::getOperationName(const SelectionDAG *G) const { 4420 switch (getOpcode()) { 4421 default: 4422 if (getOpcode() < ISD::BUILTIN_OP_END) 4423 return "<<Unknown DAG Node>>"; 4424 else { 4425 if (G) { 4426 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 4427 if (getOpcode()-ISD::BUILTIN_OP_END < TII->getNumOpcodes()) 4428 return TII->get(getOpcode()-ISD::BUILTIN_OP_END).getName(); 4429 4430 TargetLowering &TLI = G->getTargetLoweringInfo(); 4431 const char *Name = 4432 TLI.getTargetNodeName(getOpcode()); 4433 if (Name) return Name; 4434 } 4435 4436 return "<<Unknown Target Node>>"; 4437 } 4438 4439 case ISD::PREFETCH: return "Prefetch"; 4440 case ISD::MEMBARRIER: return "MemBarrier"; 4441 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 4442 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 4443 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 4444 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 4445 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 4446 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 4447 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 4448 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 4449 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 4450 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 4451 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 4452 case ISD::ATOMIC_SWAP: return "AtomicSWAP"; 4453 case ISD::PCMARKER: return "PCMarker"; 4454 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 4455 case ISD::SRCVALUE: return "SrcValue"; 4456 case ISD::MEMOPERAND: return "MemOperand"; 4457 case ISD::EntryToken: return "EntryToken"; 4458 case ISD::TokenFactor: return "TokenFactor"; 4459 case ISD::AssertSext: return "AssertSext"; 4460 case ISD::AssertZext: return "AssertZext"; 4461 4462 case ISD::STRING: return "String"; 4463 case ISD::BasicBlock: return "BasicBlock"; 4464 case ISD::ARG_FLAGS: return "ArgFlags"; 4465 case ISD::VALUETYPE: return "ValueType"; 4466 case ISD::Register: return "Register"; 4467 4468 case ISD::Constant: return "Constant"; 4469 case ISD::ConstantFP: return "ConstantFP"; 4470 case ISD::GlobalAddress: return "GlobalAddress"; 4471 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 4472 case ISD::FrameIndex: return "FrameIndex"; 4473 case ISD::JumpTable: return "JumpTable"; 4474 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 4475 case ISD::RETURNADDR: return "RETURNADDR"; 4476 case ISD::FRAMEADDR: return "FRAMEADDR"; 4477 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 4478 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 4479 case ISD::EHSELECTION: return "EHSELECTION"; 4480 case ISD::EH_RETURN: return "EH_RETURN"; 4481 case ISD::ConstantPool: return "ConstantPool"; 4482 case ISD::ExternalSymbol: return "ExternalSymbol"; 4483 case ISD::INTRINSIC_WO_CHAIN: { 4484 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getValue(); 4485 return Intrinsic::getName((Intrinsic::ID)IID); 4486 } 4487 case ISD::INTRINSIC_VOID: 4488 case ISD::INTRINSIC_W_CHAIN: { 4489 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getValue(); 4490 return Intrinsic::getName((Intrinsic::ID)IID); 4491 } 4492 4493 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 4494 case ISD::TargetConstant: return "TargetConstant"; 4495 case ISD::TargetConstantFP:return "TargetConstantFP"; 4496 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 4497 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 4498 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 4499 case ISD::TargetJumpTable: return "TargetJumpTable"; 4500 case ISD::TargetConstantPool: return "TargetConstantPool"; 4501 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 4502 4503 case ISD::CopyToReg: return "CopyToReg"; 4504 case ISD::CopyFromReg: return "CopyFromReg"; 4505 case ISD::UNDEF: return "undef"; 4506 case ISD::MERGE_VALUES: return "merge_values"; 4507 case ISD::INLINEASM: return "inlineasm"; 4508 case ISD::LABEL: return "label"; 4509 case ISD::DECLARE: return "declare"; 4510 case ISD::HANDLENODE: return "handlenode"; 4511 case ISD::FORMAL_ARGUMENTS: return "formal_arguments"; 4512 case ISD::CALL: return "call"; 4513 4514 // Unary operators 4515 case ISD::FABS: return "fabs"; 4516 case ISD::FNEG: return "fneg"; 4517 case ISD::FSQRT: return "fsqrt"; 4518 case ISD::FSIN: return "fsin"; 4519 case ISD::FCOS: return "fcos"; 4520 case ISD::FPOWI: return "fpowi"; 4521 case ISD::FPOW: return "fpow"; 4522 4523 // Binary operators 4524 case ISD::ADD: return "add"; 4525 case ISD::SUB: return "sub"; 4526 case ISD::MUL: return "mul"; 4527 case ISD::MULHU: return "mulhu"; 4528 case ISD::MULHS: return "mulhs"; 4529 case ISD::SDIV: return "sdiv"; 4530 case ISD::UDIV: return "udiv"; 4531 case ISD::SREM: return "srem"; 4532 case ISD::UREM: return "urem"; 4533 case ISD::SMUL_LOHI: return "smul_lohi"; 4534 case ISD::UMUL_LOHI: return "umul_lohi"; 4535 case ISD::SDIVREM: return "sdivrem"; 4536 case ISD::UDIVREM: return "divrem"; 4537 case ISD::AND: return "and"; 4538 case ISD::OR: return "or"; 4539 case ISD::XOR: return "xor"; 4540 case ISD::SHL: return "shl"; 4541 case ISD::SRA: return "sra"; 4542 case ISD::SRL: return "srl"; 4543 case ISD::ROTL: return "rotl"; 4544 case ISD::ROTR: return "rotr"; 4545 case ISD::FADD: return "fadd"; 4546 case ISD::FSUB: return "fsub"; 4547 case ISD::FMUL: return "fmul"; 4548 case ISD::FDIV: return "fdiv"; 4549 case ISD::FREM: return "frem"; 4550 case ISD::FCOPYSIGN: return "fcopysign"; 4551 case ISD::FGETSIGN: return "fgetsign"; 4552 4553 case ISD::SETCC: return "setcc"; 4554 case ISD::VSETCC: return "vsetcc"; 4555 case ISD::SELECT: return "select"; 4556 case ISD::SELECT_CC: return "select_cc"; 4557 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 4558 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 4559 case ISD::CONCAT_VECTORS: return "concat_vectors"; 4560 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 4561 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 4562 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 4563 case ISD::CARRY_FALSE: return "carry_false"; 4564 case ISD::ADDC: return "addc"; 4565 case ISD::ADDE: return "adde"; 4566 case ISD::SUBC: return "subc"; 4567 case ISD::SUBE: return "sube"; 4568 case ISD::SHL_PARTS: return "shl_parts"; 4569 case ISD::SRA_PARTS: return "sra_parts"; 4570 case ISD::SRL_PARTS: return "srl_parts"; 4571 4572 case ISD::EXTRACT_SUBREG: return "extract_subreg"; 4573 case ISD::INSERT_SUBREG: return "insert_subreg"; 4574 4575 // Conversion operators. 4576 case ISD::SIGN_EXTEND: return "sign_extend"; 4577 case ISD::ZERO_EXTEND: return "zero_extend"; 4578 case ISD::ANY_EXTEND: return "any_extend"; 4579 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 4580 case ISD::TRUNCATE: return "truncate"; 4581 case ISD::FP_ROUND: return "fp_round"; 4582 case ISD::FLT_ROUNDS_: return "flt_rounds"; 4583 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 4584 case ISD::FP_EXTEND: return "fp_extend"; 4585 4586 case ISD::SINT_TO_FP: return "sint_to_fp"; 4587 case ISD::UINT_TO_FP: return "uint_to_fp"; 4588 case ISD::FP_TO_SINT: return "fp_to_sint"; 4589 case ISD::FP_TO_UINT: return "fp_to_uint"; 4590 case ISD::BIT_CONVERT: return "bit_convert"; 4591 4592 // Control flow instructions 4593 case ISD::BR: return "br"; 4594 case ISD::BRIND: return "brind"; 4595 case ISD::BR_JT: return "br_jt"; 4596 case ISD::BRCOND: return "brcond"; 4597 case ISD::BR_CC: return "br_cc"; 4598 case ISD::RET: return "ret"; 4599 case ISD::CALLSEQ_START: return "callseq_start"; 4600 case ISD::CALLSEQ_END: return "callseq_end"; 4601 4602 // Other operators 4603 case ISD::LOAD: return "load"; 4604 case ISD::STORE: return "store"; 4605 case ISD::VAARG: return "vaarg"; 4606 case ISD::VACOPY: return "vacopy"; 4607 case ISD::VAEND: return "vaend"; 4608 case ISD::VASTART: return "vastart"; 4609 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 4610 case ISD::EXTRACT_ELEMENT: return "extract_element"; 4611 case ISD::BUILD_PAIR: return "build_pair"; 4612 case ISD::STACKSAVE: return "stacksave"; 4613 case ISD::STACKRESTORE: return "stackrestore"; 4614 case ISD::TRAP: return "trap"; 4615 4616 // Bit manipulation 4617 case ISD::BSWAP: return "bswap"; 4618 case ISD::CTPOP: return "ctpop"; 4619 case ISD::CTTZ: return "cttz"; 4620 case ISD::CTLZ: return "ctlz"; 4621 4622 // Debug info 4623 case ISD::LOCATION: return "location"; 4624 case ISD::DEBUG_LOC: return "debug_loc"; 4625 4626 // Trampolines 4627 case ISD::TRAMPOLINE: return "trampoline"; 4628 4629 case ISD::CONDCODE: 4630 switch (cast<CondCodeSDNode>(this)->get()) { 4631 default: assert(0 && "Unknown setcc condition!"); 4632 case ISD::SETOEQ: return "setoeq"; 4633 case ISD::SETOGT: return "setogt"; 4634 case ISD::SETOGE: return "setoge"; 4635 case ISD::SETOLT: return "setolt"; 4636 case ISD::SETOLE: return "setole"; 4637 case ISD::SETONE: return "setone"; 4638 4639 case ISD::SETO: return "seto"; 4640 case ISD::SETUO: return "setuo"; 4641 case ISD::SETUEQ: return "setue"; 4642 case ISD::SETUGT: return "setugt"; 4643 case ISD::SETUGE: return "setuge"; 4644 case ISD::SETULT: return "setult"; 4645 case ISD::SETULE: return "setule"; 4646 case ISD::SETUNE: return "setune"; 4647 4648 case ISD::SETEQ: return "seteq"; 4649 case ISD::SETGT: return "setgt"; 4650 case ISD::SETGE: return "setge"; 4651 case ISD::SETLT: return "setlt"; 4652 case ISD::SETLE: return "setle"; 4653 case ISD::SETNE: return "setne"; 4654 } 4655 } 4656} 4657 4658const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 4659 switch (AM) { 4660 default: 4661 return ""; 4662 case ISD::PRE_INC: 4663 return "<pre-inc>"; 4664 case ISD::PRE_DEC: 4665 return "<pre-dec>"; 4666 case ISD::POST_INC: 4667 return "<post-inc>"; 4668 case ISD::POST_DEC: 4669 return "<post-dec>"; 4670 } 4671} 4672 4673std::string ISD::ArgFlagsTy::getArgFlagsString() { 4674 std::string S = "< "; 4675 4676 if (isZExt()) 4677 S += "zext "; 4678 if (isSExt()) 4679 S += "sext "; 4680 if (isInReg()) 4681 S += "inreg "; 4682 if (isSRet()) 4683 S += "sret "; 4684 if (isByVal()) 4685 S += "byval "; 4686 if (isNest()) 4687 S += "nest "; 4688 if (getByValAlign()) 4689 S += "byval-align:" + utostr(getByValAlign()) + " "; 4690 if (getOrigAlign()) 4691 S += "orig-align:" + utostr(getOrigAlign()) + " "; 4692 if (getByValSize()) 4693 S += "byval-size:" + utostr(getByValSize()) + " "; 4694 return S + ">"; 4695} 4696 4697void SDNode::dump() const { dump(0); } 4698void SDNode::dump(const SelectionDAG *G) const { 4699 cerr << (void*)this << ": "; 4700 4701 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 4702 if (i) cerr << ","; 4703 if (getValueType(i) == MVT::Other) 4704 cerr << "ch"; 4705 else 4706 cerr << getValueType(i).getMVTString(); 4707 } 4708 cerr << " = " << getOperationName(G); 4709 4710 cerr << " "; 4711 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 4712 if (i) cerr << ", "; 4713 cerr << (void*)getOperand(i).Val; 4714 if (unsigned RN = getOperand(i).ResNo) 4715 cerr << ":" << RN; 4716 } 4717 4718 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) { 4719 SDNode *Mask = getOperand(2).Val; 4720 cerr << "<"; 4721 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) { 4722 if (i) cerr << ","; 4723 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF) 4724 cerr << "u"; 4725 else 4726 cerr << cast<ConstantSDNode>(Mask->getOperand(i))->getValue(); 4727 } 4728 cerr << ">"; 4729 } 4730 4731 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 4732 cerr << "<" << CSDN->getValue() << ">"; 4733 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 4734 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 4735 cerr << "<" << CSDN->getValueAPF().convertToFloat() << ">"; 4736 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 4737 cerr << "<" << CSDN->getValueAPF().convertToDouble() << ">"; 4738 else { 4739 cerr << "<APFloat("; 4740 CSDN->getValueAPF().convertToAPInt().dump(); 4741 cerr << ")>"; 4742 } 4743 } else if (const GlobalAddressSDNode *GADN = 4744 dyn_cast<GlobalAddressSDNode>(this)) { 4745 int offset = GADN->getOffset(); 4746 cerr << "<"; 4747 WriteAsOperand(*cerr.stream(), GADN->getGlobal()) << ">"; 4748 if (offset > 0) 4749 cerr << " + " << offset; 4750 else 4751 cerr << " " << offset; 4752 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 4753 cerr << "<" << FIDN->getIndex() << ">"; 4754 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 4755 cerr << "<" << JTDN->getIndex() << ">"; 4756 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 4757 int offset = CP->getOffset(); 4758 if (CP->isMachineConstantPoolEntry()) 4759 cerr << "<" << *CP->getMachineCPVal() << ">"; 4760 else 4761 cerr << "<" << *CP->getConstVal() << ">"; 4762 if (offset > 0) 4763 cerr << " + " << offset; 4764 else 4765 cerr << " " << offset; 4766 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 4767 cerr << "<"; 4768 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 4769 if (LBB) 4770 cerr << LBB->getName() << " "; 4771 cerr << (const void*)BBDN->getBasicBlock() << ">"; 4772 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 4773 if (G && R->getReg() && 4774 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 4775 cerr << " " << G->getTarget().getRegisterInfo()->getName(R->getReg()); 4776 } else { 4777 cerr << " #" << R->getReg(); 4778 } 4779 } else if (const ExternalSymbolSDNode *ES = 4780 dyn_cast<ExternalSymbolSDNode>(this)) { 4781 cerr << "'" << ES->getSymbol() << "'"; 4782 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 4783 if (M->getValue()) 4784 cerr << "<" << M->getValue() << ">"; 4785 else 4786 cerr << "<null>"; 4787 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) { 4788 if (M->MO.getValue()) 4789 cerr << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">"; 4790 else 4791 cerr << "<null:" << M->MO.getOffset() << ">"; 4792 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) { 4793 cerr << N->getArgFlags().getArgFlagsString(); 4794 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 4795 cerr << ":" << N->getVT().getMVTString(); 4796 } 4797 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 4798 const Value *SrcValue = LD->getSrcValue(); 4799 int SrcOffset = LD->getSrcValueOffset(); 4800 cerr << " <"; 4801 if (SrcValue) 4802 cerr << SrcValue; 4803 else 4804 cerr << "null"; 4805 cerr << ":" << SrcOffset << ">"; 4806 4807 bool doExt = true; 4808 switch (LD->getExtensionType()) { 4809 default: doExt = false; break; 4810 case ISD::EXTLOAD: 4811 cerr << " <anyext "; 4812 break; 4813 case ISD::SEXTLOAD: 4814 cerr << " <sext "; 4815 break; 4816 case ISD::ZEXTLOAD: 4817 cerr << " <zext "; 4818 break; 4819 } 4820 if (doExt) 4821 cerr << LD->getMemoryVT().getMVTString() << ">"; 4822 4823 const char *AM = getIndexedModeName(LD->getAddressingMode()); 4824 if (*AM) 4825 cerr << " " << AM; 4826 if (LD->isVolatile()) 4827 cerr << " <volatile>"; 4828 cerr << " alignment=" << LD->getAlignment(); 4829 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 4830 const Value *SrcValue = ST->getSrcValue(); 4831 int SrcOffset = ST->getSrcValueOffset(); 4832 cerr << " <"; 4833 if (SrcValue) 4834 cerr << SrcValue; 4835 else 4836 cerr << "null"; 4837 cerr << ":" << SrcOffset << ">"; 4838 4839 if (ST->isTruncatingStore()) 4840 cerr << " <trunc " 4841 << ST->getMemoryVT().getMVTString() << ">"; 4842 4843 const char *AM = getIndexedModeName(ST->getAddressingMode()); 4844 if (*AM) 4845 cerr << " " << AM; 4846 if (ST->isVolatile()) 4847 cerr << " <volatile>"; 4848 cerr << " alignment=" << ST->getAlignment(); 4849 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) { 4850 const Value *SrcValue = AT->getSrcValue(); 4851 int SrcOffset = AT->getSrcValueOffset(); 4852 cerr << " <"; 4853 if (SrcValue) 4854 cerr << SrcValue; 4855 else 4856 cerr << "null"; 4857 cerr << ":" << SrcOffset << ">"; 4858 if (AT->isVolatile()) 4859 cerr << " <volatile>"; 4860 cerr << " alignment=" << AT->getAlignment(); 4861 } 4862} 4863 4864static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 4865 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 4866 if (N->getOperand(i).Val->hasOneUse()) 4867 DumpNodes(N->getOperand(i).Val, indent+2, G); 4868 else 4869 cerr << "\n" << std::string(indent+2, ' ') 4870 << (void*)N->getOperand(i).Val << ": <multiple use>"; 4871 4872 4873 cerr << "\n" << std::string(indent, ' '); 4874 N->dump(G); 4875} 4876 4877void SelectionDAG::dump() const { 4878 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 4879 std::vector<const SDNode*> Nodes; 4880 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 4881 I != E; ++I) 4882 Nodes.push_back(I); 4883 4884 std::sort(Nodes.begin(), Nodes.end()); 4885 4886 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) { 4887 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val) 4888 DumpNodes(Nodes[i], 2, this); 4889 } 4890 4891 if (getRoot().Val) DumpNodes(getRoot().Val, 2, this); 4892 4893 cerr << "\n\n"; 4894} 4895 4896const Type *ConstantPoolSDNode::getType() const { 4897 if (isMachineConstantPoolEntry()) 4898 return Val.MachineCPVal->getType(); 4899 return Val.ConstVal->getType(); 4900} 4901