SelectionDAG.cpp revision 3e27b1f5c4bbbc5729a154b9b76b4231bb0ad9b9
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "llvm/Constants.h" 16#include "llvm/GlobalValue.h" 17#include "llvm/Assembly/Writer.h" 18#include "llvm/CodeGen/MachineBasicBlock.h" 19#include "llvm/Support/MathExtras.h" 20#include "llvm/Target/TargetLowering.h" 21#include <iostream> 22#include <set> 23#include <cmath> 24#include <algorithm> 25using namespace llvm; 26 27static bool isCommutativeBinOp(unsigned Opcode) { 28 switch (Opcode) { 29 case ISD::ADD: 30 case ISD::MUL: 31 case ISD::AND: 32 case ISD::OR: 33 case ISD::XOR: return true; 34 default: return false; // FIXME: Need commutative info for user ops! 35 } 36} 37 38static bool isAssociativeBinOp(unsigned Opcode) { 39 switch (Opcode) { 40 case ISD::ADD: 41 case ISD::MUL: 42 case ISD::AND: 43 case ISD::OR: 44 case ISD::XOR: return true; 45 default: return false; // FIXME: Need associative info for user ops! 46 } 47} 48 49// isInvertibleForFree - Return true if there is no cost to emitting the logical 50// inverse of this node. 51static bool isInvertibleForFree(SDOperand N) { 52 if (isa<ConstantSDNode>(N.Val)) return true; 53 if (N.Val->getOpcode() == ISD::SETCC && N.Val->hasOneUse()) 54 return true; 55 return false; 56} 57 58 59/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 60/// when given the operation for (X op Y). 61ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 62 // To perform this operation, we just need to swap the L and G bits of the 63 // operation. 64 unsigned OldL = (Operation >> 2) & 1; 65 unsigned OldG = (Operation >> 1) & 1; 66 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 67 (OldL << 1) | // New G bit 68 (OldG << 2)); // New L bit. 69} 70 71/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 72/// 'op' is a valid SetCC operation. 73ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 74 unsigned Operation = Op; 75 if (isInteger) 76 Operation ^= 7; // Flip L, G, E bits, but not U. 77 else 78 Operation ^= 15; // Flip all of the condition bits. 79 if (Operation > ISD::SETTRUE2) 80 Operation &= ~8; // Don't let N and U bits get set. 81 return ISD::CondCode(Operation); 82} 83 84 85/// isSignedOp - For an integer comparison, return 1 if the comparison is a 86/// signed operation and 2 if the result is an unsigned comparison. Return zero 87/// if the operation does not depend on the sign of the input (setne and seteq). 88static int isSignedOp(ISD::CondCode Opcode) { 89 switch (Opcode) { 90 default: assert(0 && "Illegal integer setcc operation!"); 91 case ISD::SETEQ: 92 case ISD::SETNE: return 0; 93 case ISD::SETLT: 94 case ISD::SETLE: 95 case ISD::SETGT: 96 case ISD::SETGE: return 1; 97 case ISD::SETULT: 98 case ISD::SETULE: 99 case ISD::SETUGT: 100 case ISD::SETUGE: return 2; 101 } 102} 103 104/// getSetCCOrOperation - Return the result of a logical OR between different 105/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 106/// returns SETCC_INVALID if it is not possible to represent the resultant 107/// comparison. 108ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 109 bool isInteger) { 110 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 111 // Cannot fold a signed integer setcc with an unsigned integer setcc. 112 return ISD::SETCC_INVALID; 113 114 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 115 116 // If the N and U bits get set then the resultant comparison DOES suddenly 117 // care about orderedness, and is true when ordered. 118 if (Op > ISD::SETTRUE2) 119 Op &= ~16; // Clear the N bit. 120 return ISD::CondCode(Op); 121} 122 123/// getSetCCAndOperation - Return the result of a logical AND between different 124/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 125/// function returns zero if it is not possible to represent the resultant 126/// comparison. 127ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 128 bool isInteger) { 129 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 130 // Cannot fold a signed setcc with an unsigned setcc. 131 return ISD::SETCC_INVALID; 132 133 // Combine all of the condition bits. 134 return ISD::CondCode(Op1 & Op2); 135} 136 137const TargetMachine &SelectionDAG::getTarget() const { 138 return TLI.getTargetMachine(); 139} 140 141 142/// RemoveDeadNodes - This method deletes all unreachable nodes in the 143/// SelectionDAG, including nodes (like loads) that have uses of their token 144/// chain but no other uses and no side effect. If a node is passed in as an 145/// argument, it is used as the seed for node deletion. 146void SelectionDAG::RemoveDeadNodes(SDNode *N) { 147 std::set<SDNode*> AllNodeSet(AllNodes.begin(), AllNodes.end()); 148 149 // Create a dummy node (which is not added to allnodes), that adds a reference 150 // to the root node, preventing it from being deleted. 151 SDNode *DummyNode = new SDNode(ISD::EntryToken, getRoot()); 152 153 DeleteNodeIfDead(N, &AllNodeSet); 154 155 Restart: 156 unsigned NumNodes = AllNodeSet.size(); 157 for (std::set<SDNode*>::iterator I = AllNodeSet.begin(), E = AllNodeSet.end(); 158 I != E; ++I) { 159 // Try to delete this node. 160 DeleteNodeIfDead(*I, &AllNodeSet); 161 162 // If we actually deleted any nodes, do not use invalid iterators in 163 // AllNodeSet. 164 if (AllNodeSet.size() != NumNodes) 165 goto Restart; 166 } 167 168 // Restore AllNodes. 169 if (AllNodes.size() != NumNodes) 170 AllNodes.assign(AllNodeSet.begin(), AllNodeSet.end()); 171 172 // If the root changed (e.g. it was a dead load, update the root). 173 setRoot(DummyNode->getOperand(0)); 174 175 // Now that we are done with the dummy node, delete it. 176 DummyNode->getOperand(0).Val->removeUser(DummyNode); 177 delete DummyNode; 178} 179 180void SelectionDAG::DeleteNodeIfDead(SDNode *N, void *NodeSet) { 181 if (!N->use_empty()) 182 return; 183 184 // Okay, we really are going to delete this node. First take this out of the 185 // appropriate CSE map. 186 switch (N->getOpcode()) { 187 case ISD::Constant: 188 Constants.erase(std::make_pair(cast<ConstantSDNode>(N)->getValue(), 189 N->getValueType(0))); 190 break; 191 case ISD::ConstantFP: { 192 union { 193 double DV; 194 uint64_t IV; 195 }; 196 DV = cast<ConstantFPSDNode>(N)->getValue(); 197 ConstantFPs.erase(std::make_pair(IV, N->getValueType(0))); 198 break; 199 } 200 case ISD::CONDCODE: 201 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 202 "Cond code doesn't exist!"); 203 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 204 break; 205 case ISD::GlobalAddress: 206 GlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal()); 207 break; 208 case ISD::FrameIndex: 209 FrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex()); 210 break; 211 case ISD::ConstantPool: 212 ConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->getIndex()); 213 break; 214 case ISD::BasicBlock: 215 BBNodes.erase(cast<BasicBlockSDNode>(N)->getBasicBlock()); 216 break; 217 case ISD::ExternalSymbol: 218 ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 219 break; 220 case ISD::VALUETYPE: 221 ValueTypeNodes[cast<VTSDNode>(N)->getVT()] = 0; 222 break; 223 case ISD::SRCVALUE: { 224 SrcValueSDNode *SVN = cast<SrcValueSDNode>(N); 225 ValueNodes.erase(std::make_pair(SVN->getValue(), SVN->getOffset())); 226 break; 227 } 228 case ISD::LOAD: 229 Loads.erase(std::make_pair(N->getOperand(1), 230 std::make_pair(N->getOperand(0), 231 N->getValueType(0)))); 232 break; 233 default: 234 if (N->getNumOperands() == 1) 235 UnaryOps.erase(std::make_pair(N->getOpcode(), 236 std::make_pair(N->getOperand(0), 237 N->getValueType(0)))); 238 else if (N->getNumOperands() == 2) 239 BinaryOps.erase(std::make_pair(N->getOpcode(), 240 std::make_pair(N->getOperand(0), 241 N->getOperand(1)))); 242 else if (N->getNumValues() == 1) { 243 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 244 OneResultNodes.erase(std::make_pair(N->getOpcode(), 245 std::make_pair(N->getValueType(0), 246 Ops))); 247 } else { 248 // Remove the node from the ArbitraryNodes map. 249 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end()); 250 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 251 ArbitraryNodes.erase(std::make_pair(N->getOpcode(), 252 std::make_pair(RV, Ops))); 253 } 254 break; 255 } 256 257 // Next, brutally remove the operand list. 258 while (!N->Operands.empty()) { 259 SDNode *O = N->Operands.back().Val; 260 N->Operands.pop_back(); 261 O->removeUser(N); 262 263 // Now that we removed this operand, see if there are no uses of it left. 264 DeleteNodeIfDead(O, NodeSet); 265 } 266 267 // Remove the node from the nodes set and delete it. 268 std::set<SDNode*> &AllNodeSet = *(std::set<SDNode*>*)NodeSet; 269 AllNodeSet.erase(N); 270 271 // Now that the node is gone, check to see if any of the operands of this node 272 // are dead now. 273 delete N; 274} 275 276 277SelectionDAG::~SelectionDAG() { 278 for (unsigned i = 0, e = AllNodes.size(); i != e; ++i) 279 delete AllNodes[i]; 280} 281 282SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) { 283 if (Op.getValueType() == VT) return Op; 284 int64_t Imm = ~0ULL >> (64-MVT::getSizeInBits(VT)); 285 return getNode(ISD::AND, Op.getValueType(), Op, 286 getConstant(Imm, Op.getValueType())); 287} 288 289SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT) { 290 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!"); 291 // Mask out any bits that are not valid for this constant. 292 if (VT != MVT::i64) 293 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1; 294 295 SDNode *&N = Constants[std::make_pair(Val, VT)]; 296 if (N) return SDOperand(N, 0); 297 N = new ConstantSDNode(Val, VT); 298 AllNodes.push_back(N); 299 return SDOperand(N, 0); 300} 301 302SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT) { 303 assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!"); 304 if (VT == MVT::f32) 305 Val = (float)Val; // Mask out extra precision. 306 307 // Do the map lookup using the actual bit pattern for the floating point 308 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 309 // we don't have issues with SNANs. 310 union { 311 double DV; 312 uint64_t IV; 313 }; 314 315 DV = Val; 316 317 SDNode *&N = ConstantFPs[std::make_pair(IV, VT)]; 318 if (N) return SDOperand(N, 0); 319 N = new ConstantFPSDNode(Val, VT); 320 AllNodes.push_back(N); 321 return SDOperand(N, 0); 322} 323 324 325 326SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV, 327 MVT::ValueType VT) { 328 SDNode *&N = GlobalValues[GV]; 329 if (N) return SDOperand(N, 0); 330 N = new GlobalAddressSDNode(GV,VT); 331 AllNodes.push_back(N); 332 return SDOperand(N, 0); 333} 334 335SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT) { 336 SDNode *&N = FrameIndices[FI]; 337 if (N) return SDOperand(N, 0); 338 N = new FrameIndexSDNode(FI, VT); 339 AllNodes.push_back(N); 340 return SDOperand(N, 0); 341} 342 343SDOperand SelectionDAG::getConstantPool(unsigned CPIdx, MVT::ValueType VT) { 344 SDNode *N = ConstantPoolIndices[CPIdx]; 345 if (N) return SDOperand(N, 0); 346 N = new ConstantPoolSDNode(CPIdx, VT); 347 AllNodes.push_back(N); 348 return SDOperand(N, 0); 349} 350 351SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 352 SDNode *&N = BBNodes[MBB]; 353 if (N) return SDOperand(N, 0); 354 N = new BasicBlockSDNode(MBB); 355 AllNodes.push_back(N); 356 return SDOperand(N, 0); 357} 358 359SDOperand SelectionDAG::getValueType(MVT::ValueType VT) { 360 if ((unsigned)VT >= ValueTypeNodes.size()) 361 ValueTypeNodes.resize(VT+1); 362 if (ValueTypeNodes[VT] == 0) { 363 ValueTypeNodes[VT] = new VTSDNode(VT); 364 AllNodes.push_back(ValueTypeNodes[VT]); 365 } 366 367 return SDOperand(ValueTypeNodes[VT], 0); 368} 369 370SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) { 371 SDNode *&N = ExternalSymbols[Sym]; 372 if (N) return SDOperand(N, 0); 373 N = new ExternalSymbolSDNode(Sym, VT); 374 AllNodes.push_back(N); 375 return SDOperand(N, 0); 376} 377 378SDOperand SelectionDAG::getCondCode(ISD::CondCode Cond) { 379 if ((unsigned)Cond >= CondCodeNodes.size()) 380 CondCodeNodes.resize(Cond+1); 381 382 if (CondCodeNodes[Cond] == 0) { 383 CondCodeNodes[Cond] = new CondCodeSDNode(Cond); 384 AllNodes.push_back(CondCodeNodes[Cond]); 385 } 386 return SDOperand(CondCodeNodes[Cond], 0); 387} 388 389SDOperand SelectionDAG::SimplifySetCC(MVT::ValueType VT, SDOperand N1, 390 SDOperand N2, ISD::CondCode Cond) { 391 // These setcc operations always fold. 392 switch (Cond) { 393 default: break; 394 case ISD::SETFALSE: 395 case ISD::SETFALSE2: return getConstant(0, VT); 396 case ISD::SETTRUE: 397 case ISD::SETTRUE2: return getConstant(1, VT); 398 } 399 400 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) { 401 uint64_t C2 = N2C->getValue(); 402 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 403 uint64_t C1 = N1C->getValue(); 404 405 // Sign extend the operands if required 406 if (ISD::isSignedIntSetCC(Cond)) { 407 C1 = N1C->getSignExtended(); 408 C2 = N2C->getSignExtended(); 409 } 410 411 switch (Cond) { 412 default: assert(0 && "Unknown integer setcc!"); 413 case ISD::SETEQ: return getConstant(C1 == C2, VT); 414 case ISD::SETNE: return getConstant(C1 != C2, VT); 415 case ISD::SETULT: return getConstant(C1 < C2, VT); 416 case ISD::SETUGT: return getConstant(C1 > C2, VT); 417 case ISD::SETULE: return getConstant(C1 <= C2, VT); 418 case ISD::SETUGE: return getConstant(C1 >= C2, VT); 419 case ISD::SETLT: return getConstant((int64_t)C1 < (int64_t)C2, VT); 420 case ISD::SETGT: return getConstant((int64_t)C1 > (int64_t)C2, VT); 421 case ISD::SETLE: return getConstant((int64_t)C1 <= (int64_t)C2, VT); 422 case ISD::SETGE: return getConstant((int64_t)C1 >= (int64_t)C2, VT); 423 } 424 } else { 425 // If the LHS is a ZERO_EXTEND and if this is an ==/!= comparison, perform 426 // the comparison on the input. 427 if (N1.getOpcode() == ISD::ZERO_EXTEND) { 428 unsigned InSize = MVT::getSizeInBits(N1.getOperand(0).getValueType()); 429 430 // If the comparison constant has bits in the upper part, the 431 // zero-extended value could never match. 432 if (C2 & (~0ULL << InSize)) { 433 unsigned VSize = MVT::getSizeInBits(N1.getValueType()); 434 switch (Cond) { 435 case ISD::SETUGT: 436 case ISD::SETUGE: 437 case ISD::SETEQ: return getConstant(0, VT); 438 case ISD::SETULT: 439 case ISD::SETULE: 440 case ISD::SETNE: return getConstant(1, VT); 441 case ISD::SETGT: 442 case ISD::SETGE: 443 // True if the sign bit of C2 is set. 444 return getConstant((C2 & (1ULL << VSize)) != 0, VT); 445 case ISD::SETLT: 446 case ISD::SETLE: 447 // True if the sign bit of C2 isn't set. 448 return getConstant((C2 & (1ULL << VSize)) == 0, VT); 449 default: 450 break; 451 } 452 } 453 454 // Otherwise, we can perform the comparison with the low bits. 455 switch (Cond) { 456 case ISD::SETEQ: 457 case ISD::SETNE: 458 case ISD::SETUGT: 459 case ISD::SETUGE: 460 case ISD::SETULT: 461 case ISD::SETULE: 462 return getSetCC(VT, N1.getOperand(0), 463 getConstant(C2, N1.getOperand(0).getValueType()), 464 Cond); 465 default: 466 break; // todo, be more careful with signed comparisons 467 } 468 } 469 470 uint64_t MinVal, MaxVal; 471 unsigned OperandBitSize = MVT::getSizeInBits(N2C->getValueType(0)); 472 if (ISD::isSignedIntSetCC(Cond)) { 473 MinVal = 1ULL << (OperandBitSize-1); 474 if (OperandBitSize != 1) // Avoid X >> 64, which is undefined. 475 MaxVal = ~0ULL >> (65-OperandBitSize); 476 else 477 MaxVal = 0; 478 } else { 479 MinVal = 0; 480 MaxVal = ~0ULL >> (64-OperandBitSize); 481 } 482 483 // Canonicalize GE/LE comparisons to use GT/LT comparisons. 484 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) { 485 if (C2 == MinVal) return getConstant(1, VT); // X >= MIN --> true 486 --C2; // X >= C1 --> X > (C1-1) 487 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()), 488 (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT); 489 } 490 491 if (Cond == ISD::SETLE || Cond == ISD::SETULE) { 492 if (C2 == MaxVal) return getConstant(1, VT); // X <= MAX --> true 493 ++C2; // X <= C1 --> X < (C1+1) 494 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()), 495 (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT); 496 } 497 498 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal) 499 return getConstant(0, VT); // X < MIN --> false 500 501 // Canonicalize setgt X, Min --> setne X, Min 502 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MinVal) 503 return getSetCC(VT, N1, N2, ISD::SETNE); 504 505 // If we have setult X, 1, turn it into seteq X, 0 506 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal+1) 507 return getSetCC(VT, N1, getConstant(MinVal, N1.getValueType()), 508 ISD::SETEQ); 509 // If we have setugt X, Max-1, turn it into seteq X, Max 510 else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MaxVal-1) 511 return getSetCC(VT, N1, getConstant(MaxVal, N1.getValueType()), 512 ISD::SETEQ); 513 514 // If we have "setcc X, C1", check to see if we can shrink the immediate 515 // by changing cc. 516 517 // SETUGT X, SINTMAX -> SETLT X, 0 518 if (Cond == ISD::SETUGT && OperandBitSize != 1 && 519 C2 == (~0ULL >> (65-OperandBitSize))) 520 return getSetCC(VT, N1, getConstant(0, N2.getValueType()), ISD::SETLT); 521 522 // FIXME: Implement the rest of these. 523 524 525 // Fold bit comparisons when we can. 526 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && 527 VT == N1.getValueType() && N1.getOpcode() == ISD::AND) 528 if (ConstantSDNode *AndRHS = 529 dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 530 if (Cond == ISD::SETNE && C2 == 0) {// (X & 8) != 0 --> (X & 8) >> 3 531 // Perform the xform if the AND RHS is a single bit. 532 if ((AndRHS->getValue() & (AndRHS->getValue()-1)) == 0) { 533 return getNode(ISD::SRL, VT, N1, 534 getConstant(Log2_64(AndRHS->getValue()), 535 TLI.getShiftAmountTy())); 536 } 537 } else if (Cond == ISD::SETEQ && C2 == AndRHS->getValue()) { 538 // (X & 8) == 8 --> (X & 8) >> 3 539 // Perform the xform if C2 is a single bit. 540 if ((C2 & (C2-1)) == 0) { 541 return getNode(ISD::SRL, VT, N1, 542 getConstant(Log2_64(C2),TLI.getShiftAmountTy())); 543 } 544 } 545 } 546 } 547 } else if (isa<ConstantSDNode>(N1.Val)) { 548 // Ensure that the constant occurs on the RHS. 549 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 550 } 551 552 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) 553 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) { 554 double C1 = N1C->getValue(), C2 = N2C->getValue(); 555 556 switch (Cond) { 557 default: break; // FIXME: Implement the rest of these! 558 case ISD::SETEQ: return getConstant(C1 == C2, VT); 559 case ISD::SETNE: return getConstant(C1 != C2, VT); 560 case ISD::SETLT: return getConstant(C1 < C2, VT); 561 case ISD::SETGT: return getConstant(C1 > C2, VT); 562 case ISD::SETLE: return getConstant(C1 <= C2, VT); 563 case ISD::SETGE: return getConstant(C1 >= C2, VT); 564 } 565 } else { 566 // Ensure that the constant occurs on the RHS. 567 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 568 } 569 570 if (N1 == N2) { 571 // We can always fold X == Y for integer setcc's. 572 if (MVT::isInteger(N1.getValueType())) 573 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 574 unsigned UOF = ISD::getUnorderedFlavor(Cond); 575 if (UOF == 2) // FP operators that are undefined on NaNs. 576 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 577 if (UOF == unsigned(ISD::isTrueWhenEqual(Cond))) 578 return getConstant(UOF, VT); 579 // Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO 580 // if it is not already. 581 ISD::CondCode NewCond = UOF == 0 ? ISD::SETUO : ISD::SETO; 582 if (NewCond != Cond) 583 return getSetCC(VT, N1, N2, NewCond); 584 } 585 586 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && 587 MVT::isInteger(N1.getValueType())) { 588 if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB || 589 N1.getOpcode() == ISD::XOR) { 590 // Simplify (X+Y) == (X+Z) --> Y == Z 591 if (N1.getOpcode() == N2.getOpcode()) { 592 if (N1.getOperand(0) == N2.getOperand(0)) 593 return getSetCC(VT, N1.getOperand(1), N2.getOperand(1), Cond); 594 if (N1.getOperand(1) == N2.getOperand(1)) 595 return getSetCC(VT, N1.getOperand(0), N2.getOperand(0), Cond); 596 if (isCommutativeBinOp(N1.getOpcode())) { 597 // If X op Y == Y op X, try other combinations. 598 if (N1.getOperand(0) == N2.getOperand(1)) 599 return getSetCC(VT, N1.getOperand(1), N2.getOperand(0), Cond); 600 if (N1.getOperand(1) == N2.getOperand(0)) 601 return getSetCC(VT, N1.getOperand(1), N2.getOperand(1), Cond); 602 } 603 } 604 605 // FIXME: move this stuff to the DAG Combiner when it exists! 606 607 // Simplify (X+Z) == X --> Z == 0 608 if (N1.getOperand(0) == N2) 609 return getSetCC(VT, N1.getOperand(1), 610 getConstant(0, N1.getValueType()), Cond); 611 if (N1.getOperand(1) == N2) { 612 if (isCommutativeBinOp(N1.getOpcode())) 613 return getSetCC(VT, N1.getOperand(0), 614 getConstant(0, N1.getValueType()), Cond); 615 else { 616 assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!"); 617 // (Z-X) == X --> Z == X<<1 618 return getSetCC(VT, N1.getOperand(0), 619 getNode(ISD::SHL, N2.getValueType(), 620 N2, getConstant(1, TLI.getShiftAmountTy())), 621 Cond); 622 } 623 } 624 } 625 626 if (N2.getOpcode() == ISD::ADD || N2.getOpcode() == ISD::SUB || 627 N2.getOpcode() == ISD::XOR) { 628 // Simplify X == (X+Z) --> Z == 0 629 if (N2.getOperand(0) == N1) { 630 return getSetCC(VT, N2.getOperand(1), 631 getConstant(0, N2.getValueType()), Cond); 632 } else if (N2.getOperand(1) == N1) { 633 if (isCommutativeBinOp(N2.getOpcode())) { 634 return getSetCC(VT, N2.getOperand(0), 635 getConstant(0, N2.getValueType()), Cond); 636 } else { 637 assert(N2.getOpcode() == ISD::SUB && "Unexpected operation!"); 638 // X == (Z-X) --> X<<1 == Z 639 return getSetCC(VT, getNode(ISD::SHL, N2.getValueType(), N1, 640 getConstant(1, TLI.getShiftAmountTy())), 641 N2.getOperand(0), Cond); 642 } 643 } 644 } 645 } 646 647 // Fold away ALL boolean setcc's. 648 if (N1.getValueType() == MVT::i1) { 649 switch (Cond) { 650 default: assert(0 && "Unknown integer setcc!"); 651 case ISD::SETEQ: // X == Y -> (X^Y)^1 652 N1 = getNode(ISD::XOR, MVT::i1, 653 getNode(ISD::XOR, MVT::i1, N1, N2), 654 getConstant(1, MVT::i1)); 655 break; 656 case ISD::SETNE: // X != Y --> (X^Y) 657 N1 = getNode(ISD::XOR, MVT::i1, N1, N2); 658 break; 659 case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> X^1 & Y 660 case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> X^1 & Y 661 N1 = getNode(ISD::AND, MVT::i1, N2, 662 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1))); 663 break; 664 case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> Y^1 & X 665 case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> Y^1 & X 666 N1 = getNode(ISD::AND, MVT::i1, N1, 667 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1))); 668 break; 669 case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> X^1 | Y 670 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> X^1 | Y 671 N1 = getNode(ISD::OR, MVT::i1, N2, 672 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1))); 673 break; 674 case ISD::SETUGE: // X >=u Y --> X == 1 | Y == 0 --> Y^1 | X 675 case ISD::SETLE: // X <=s Y --> X == 1 | Y == 0 --> Y^1 | X 676 N1 = getNode(ISD::OR, MVT::i1, N1, 677 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1))); 678 break; 679 } 680 if (VT != MVT::i1) 681 N1 = getNode(ISD::ZERO_EXTEND, VT, N1); 682 return N1; 683 } 684 685 // Could not fold it. 686 return SDOperand(); 687} 688 689/// getNode - Gets or creates the specified node. 690/// 691SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) { 692 SDNode *N = new SDNode(Opcode, VT); 693 AllNodes.push_back(N); 694 return SDOperand(N, 0); 695} 696 697SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 698 SDOperand Operand) { 699 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) { 700 uint64_t Val = C->getValue(); 701 switch (Opcode) { 702 default: break; 703 case ISD::SIGN_EXTEND: return getConstant(C->getSignExtended(), VT); 704 case ISD::ZERO_EXTEND: return getConstant(Val, VT); 705 case ISD::TRUNCATE: return getConstant(Val, VT); 706 case ISD::SINT_TO_FP: return getConstantFP(C->getSignExtended(), VT); 707 case ISD::UINT_TO_FP: return getConstantFP(C->getValue(), VT); 708 } 709 } 710 711 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val)) 712 switch (Opcode) { 713 case ISD::FNEG: 714 return getConstantFP(-C->getValue(), VT); 715 case ISD::FP_ROUND: 716 case ISD::FP_EXTEND: 717 return getConstantFP(C->getValue(), VT); 718 case ISD::FP_TO_SINT: 719 return getConstant((int64_t)C->getValue(), VT); 720 case ISD::FP_TO_UINT: 721 return getConstant((uint64_t)C->getValue(), VT); 722 } 723 724 unsigned OpOpcode = Operand.Val->getOpcode(); 725 switch (Opcode) { 726 case ISD::TokenFactor: 727 return Operand; // Factor of one node? No factor. 728 case ISD::SIGN_EXTEND: 729 if (Operand.getValueType() == VT) return Operand; // noop extension 730 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 731 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 732 break; 733 case ISD::ZERO_EXTEND: 734 if (Operand.getValueType() == VT) return Operand; // noop extension 735 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 736 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0)); 737 break; 738 case ISD::TRUNCATE: 739 if (Operand.getValueType() == VT) return Operand; // noop truncate 740 if (OpOpcode == ISD::TRUNCATE) 741 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 742 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) { 743 // If the source is smaller than the dest, we still need an extend. 744 if (Operand.Val->getOperand(0).getValueType() < VT) 745 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 746 else if (Operand.Val->getOperand(0).getValueType() > VT) 747 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 748 else 749 return Operand.Val->getOperand(0); 750 } 751 break; 752 case ISD::FNEG: 753 if (OpOpcode == ISD::SUB) // -(X-Y) -> (Y-X) 754 return getNode(ISD::SUB, VT, Operand.Val->getOperand(1), 755 Operand.Val->getOperand(0)); 756 if (OpOpcode == ISD::FNEG) // --X -> X 757 return Operand.Val->getOperand(0); 758 break; 759 case ISD::FABS: 760 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 761 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0)); 762 break; 763 } 764 765 SDNode *&N = UnaryOps[std::make_pair(Opcode, std::make_pair(Operand, VT))]; 766 if (N) return SDOperand(N, 0); 767 N = new SDNode(Opcode, Operand); 768 N->setValueTypes(VT); 769 AllNodes.push_back(N); 770 return SDOperand(N, 0); 771} 772 773/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 774/// this predicate to simplify operations downstream. V and Mask are known to 775/// be the same type. 776static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask, 777 const TargetLowering &TLI) { 778 unsigned SrcBits; 779 if (Mask == 0) return true; 780 781 // If we know the result of a setcc has the top bits zero, use this info. 782 switch (Op.getOpcode()) { 783 case ISD::Constant: 784 return (cast<ConstantSDNode>(Op)->getValue() & Mask) == 0; 785 786 case ISD::SETCC: 787 return ((Mask & 1) == 0) && 788 TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult; 789 790 case ISD::ZEXTLOAD: 791 SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(3))->getVT()); 792 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits. 793 case ISD::ZERO_EXTEND: 794 SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType()); 795 return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI); 796 797 case ISD::AND: 798 // (X & C1) & C2 == 0 iff C1 & C2 == 0. 799 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 800 return MaskedValueIsZero(Op.getOperand(0),AndRHS->getValue() & Mask, TLI); 801 802 // FALL THROUGH 803 case ISD::OR: 804 case ISD::XOR: 805 return MaskedValueIsZero(Op.getOperand(0), Mask, TLI) && 806 MaskedValueIsZero(Op.getOperand(1), Mask, TLI); 807 case ISD::SELECT: 808 return MaskedValueIsZero(Op.getOperand(1), Mask, TLI) && 809 MaskedValueIsZero(Op.getOperand(2), Mask, TLI); 810 811 case ISD::SRL: 812 // (ushr X, C1) & C2 == 0 iff X & (C2 << C1) == 0 813 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 814 uint64_t NewVal = Mask << ShAmt->getValue(); 815 SrcBits = MVT::getSizeInBits(Op.getValueType()); 816 if (SrcBits != 64) NewVal &= (1ULL << SrcBits)-1; 817 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI); 818 } 819 return false; 820 case ISD::SHL: 821 // (ushl X, C1) & C2 == 0 iff X & (C2 >> C1) == 0 822 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 823 uint64_t NewVal = Mask >> ShAmt->getValue(); 824 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI); 825 } 826 return false; 827 // TODO we could handle some SRA cases here. 828 default: break; 829 } 830 831 return false; 832} 833 834 835 836SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 837 SDOperand N1, SDOperand N2) { 838#ifndef NDEBUG 839 switch (Opcode) { 840 case ISD::TokenFactor: 841 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 842 N2.getValueType() == MVT::Other && "Invalid token factor!"); 843 break; 844 case ISD::AND: 845 case ISD::OR: 846 case ISD::XOR: 847 case ISD::UDIV: 848 case ISD::UREM: 849 case ISD::MULHU: 850 case ISD::MULHS: 851 assert(MVT::isInteger(VT) && "This operator does not apply to FP types!"); 852 // fall through 853 case ISD::ADD: 854 case ISD::SUB: 855 case ISD::MUL: 856 case ISD::SDIV: 857 case ISD::SREM: 858 assert(N1.getValueType() == N2.getValueType() && 859 N1.getValueType() == VT && "Binary operator types must match!"); 860 break; 861 862 case ISD::SHL: 863 case ISD::SRA: 864 case ISD::SRL: 865 assert(VT == N1.getValueType() && 866 "Shift operators return type must be the same as their first arg"); 867 assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) && 868 VT != MVT::i1 && "Shifts only work on integers"); 869 break; 870 case ISD::FP_ROUND_INREG: { 871 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT(); 872 assert(VT == N1.getValueType() && "Not an inreg round!"); 873 assert(MVT::isFloatingPoint(VT) && MVT::isFloatingPoint(EVT) && 874 "Cannot FP_ROUND_INREG integer types"); 875 assert(EVT <= VT && "Not rounding down!"); 876 break; 877 } 878 case ISD::SIGN_EXTEND_INREG: { 879 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT(); 880 assert(VT == N1.getValueType() && "Not an inreg extend!"); 881 assert(MVT::isInteger(VT) && MVT::isInteger(EVT) && 882 "Cannot *_EXTEND_INREG FP types"); 883 assert(EVT <= VT && "Not extending!"); 884 } 885 886 default: break; 887 } 888#endif 889 890 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 891 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 892 if (N1C) { 893 if (N2C) { 894 uint64_t C1 = N1C->getValue(), C2 = N2C->getValue(); 895 switch (Opcode) { 896 case ISD::ADD: return getConstant(C1 + C2, VT); 897 case ISD::SUB: return getConstant(C1 - C2, VT); 898 case ISD::MUL: return getConstant(C1 * C2, VT); 899 case ISD::UDIV: 900 if (C2) return getConstant(C1 / C2, VT); 901 break; 902 case ISD::UREM : 903 if (C2) return getConstant(C1 % C2, VT); 904 break; 905 case ISD::SDIV : 906 if (C2) return getConstant(N1C->getSignExtended() / 907 N2C->getSignExtended(), VT); 908 break; 909 case ISD::SREM : 910 if (C2) return getConstant(N1C->getSignExtended() % 911 N2C->getSignExtended(), VT); 912 break; 913 case ISD::AND : return getConstant(C1 & C2, VT); 914 case ISD::OR : return getConstant(C1 | C2, VT); 915 case ISD::XOR : return getConstant(C1 ^ C2, VT); 916 case ISD::SHL : return getConstant(C1 << (int)C2, VT); 917 case ISD::SRL : return getConstant(C1 >> (unsigned)C2, VT); 918 case ISD::SRA : return getConstant(N1C->getSignExtended() >>(int)C2, VT); 919 default: break; 920 } 921 922 } else { // Cannonicalize constant to RHS if commutative 923 if (isCommutativeBinOp(Opcode)) { 924 std::swap(N1C, N2C); 925 std::swap(N1, N2); 926 } 927 } 928 929 switch (Opcode) { 930 default: break; 931 case ISD::SHL: // shl 0, X -> 0 932 if (N1C->isNullValue()) return N1; 933 break; 934 case ISD::SRL: // srl 0, X -> 0 935 if (N1C->isNullValue()) return N1; 936 break; 937 case ISD::SRA: // sra -1, X -> -1 938 if (N1C->isAllOnesValue()) return N1; 939 break; 940 case ISD::SIGN_EXTEND_INREG: // SIGN_EXTEND_INREG N1C, EVT 941 // Extending a constant? Just return the extended constant. 942 SDOperand Tmp = getNode(ISD::TRUNCATE, cast<VTSDNode>(N2)->getVT(), N1); 943 return getNode(ISD::SIGN_EXTEND, VT, Tmp); 944 } 945 } 946 947 if (N2C) { 948 uint64_t C2 = N2C->getValue(); 949 950 switch (Opcode) { 951 case ISD::ADD: 952 if (!C2) return N1; // add X, 0 -> X 953 break; 954 case ISD::SUB: 955 if (!C2) return N1; // sub X, 0 -> X 956 return getNode(ISD::ADD, VT, N1, getConstant(-C2, VT)); 957 case ISD::MUL: 958 if (!C2) return N2; // mul X, 0 -> 0 959 if (N2C->isAllOnesValue()) // mul X, -1 -> 0-X 960 return getNode(ISD::SUB, VT, getConstant(0, VT), N1); 961 962 // FIXME: Move this to the DAG combiner when it exists. 963 if ((C2 & C2-1) == 0) { 964 SDOperand ShAmt = getConstant(Log2_64(C2), TLI.getShiftAmountTy()); 965 return getNode(ISD::SHL, VT, N1, ShAmt); 966 } 967 break; 968 969 case ISD::MULHU: 970 case ISD::MULHS: 971 if (!C2) return N2; // mul X, 0 -> 0 972 973 if (C2 == 1) // 0X*01 -> 0X hi(0X) == 0 974 return getConstant(0, VT); 975 976 // Many others could be handled here, including -1, powers of 2, etc. 977 break; 978 979 case ISD::UDIV: 980 // FIXME: Move this to the DAG combiner when it exists. 981 if ((C2 & C2-1) == 0 && C2) { 982 SDOperand ShAmt = getConstant(Log2_64(C2), TLI.getShiftAmountTy()); 983 return getNode(ISD::SRL, VT, N1, ShAmt); 984 } 985 break; 986 987 case ISD::SHL: 988 case ISD::SRL: 989 case ISD::SRA: 990 // If the shift amount is bigger than the size of the data, then all the 991 // bits are shifted out. Simplify to undef. 992 if (C2 >= MVT::getSizeInBits(N1.getValueType())) { 993 return getNode(ISD::UNDEF, N1.getValueType()); 994 } 995 if (C2 == 0) return N1; 996 997 if (Opcode == ISD::SRA) { 998 // If the sign bit is known to be zero, switch this to a SRL. 999 if (MaskedValueIsZero(N1, 1000 1ULL << MVT::getSizeInBits(N1.getValueType())-1, 1001 TLI)) 1002 return getNode(ISD::SRL, N1.getValueType(), N1, N2); 1003 } else { 1004 // If the part left over is known to be zero, the whole thing is zero. 1005 uint64_t TypeMask = ~0ULL >> (64-MVT::getSizeInBits(N1.getValueType())); 1006 if (Opcode == ISD::SRL) { 1007 if (MaskedValueIsZero(N1, TypeMask << C2, TLI)) 1008 return getConstant(0, N1.getValueType()); 1009 } else if (Opcode == ISD::SHL) { 1010 if (MaskedValueIsZero(N1, TypeMask >> C2, TLI)) 1011 return getConstant(0, N1.getValueType()); 1012 } 1013 } 1014 1015 if (Opcode == ISD::SHL && N1.getNumOperands() == 2) 1016 if (ConstantSDNode *OpSA = dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 1017 unsigned OpSAC = OpSA->getValue(); 1018 if (N1.getOpcode() == ISD::SHL) { 1019 if (C2+OpSAC >= MVT::getSizeInBits(N1.getValueType())) 1020 return getConstant(0, N1.getValueType()); 1021 return getNode(ISD::SHL, N1.getValueType(), N1.getOperand(0), 1022 getConstant(C2+OpSAC, N2.getValueType())); 1023 } else if (N1.getOpcode() == ISD::SRL) { 1024 // (X >> C1) << C2: if C2 > C1, ((X & ~0<<C1) << C2-C1) 1025 SDOperand Mask = getNode(ISD::AND, VT, N1.getOperand(0), 1026 getConstant(~0ULL << OpSAC, VT)); 1027 if (C2 > OpSAC) { 1028 return getNode(ISD::SHL, VT, Mask, 1029 getConstant(C2-OpSAC, N2.getValueType())); 1030 } else { 1031 // (X >> C1) << C2: if C2 <= C1, ((X & ~0<<C1) >> C1-C2) 1032 return getNode(ISD::SRL, VT, Mask, 1033 getConstant(OpSAC-C2, N2.getValueType())); 1034 } 1035 } else if (N1.getOpcode() == ISD::SRA) { 1036 // if C1 == C2, just mask out low bits. 1037 if (C2 == OpSAC) 1038 return getNode(ISD::AND, VT, N1.getOperand(0), 1039 getConstant(~0ULL << C2, VT)); 1040 } 1041 } 1042 break; 1043 1044 case ISD::AND: 1045 if (!C2) return N2; // X and 0 -> 0 1046 if (N2C->isAllOnesValue()) 1047 return N1; // X and -1 -> X 1048 1049 if (MaskedValueIsZero(N1, C2, TLI)) // X and 0 -> 0 1050 return getConstant(0, VT); 1051 1052 { 1053 uint64_t NotC2 = ~C2; 1054 if (VT != MVT::i64) 1055 NotC2 &= (1ULL << MVT::getSizeInBits(VT))-1; 1056 1057 if (MaskedValueIsZero(N1, NotC2, TLI)) 1058 return N1; // if (X & ~C2) -> 0, the and is redundant 1059 } 1060 1061 // FIXME: Should add a corresponding version of this for 1062 // ZERO_EXTEND/SIGN_EXTEND by converting them to an ANY_EXTEND node which 1063 // we don't have yet. 1064 1065 // and (sign_extend_inreg x:16:32), 1 -> and x, 1 1066 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) { 1067 // If we are masking out the part of our input that was extended, just 1068 // mask the input to the extension directly. 1069 unsigned ExtendBits = 1070 MVT::getSizeInBits(cast<VTSDNode>(N1.getOperand(1))->getVT()); 1071 if ((C2 & (~0ULL << ExtendBits)) == 0) 1072 return getNode(ISD::AND, VT, N1.getOperand(0), N2); 1073 } else if (N1.getOpcode() == ISD::OR) { 1074 if (ConstantSDNode *ORI = dyn_cast<ConstantSDNode>(N1.getOperand(1))) 1075 if ((ORI->getValue() & C2) == C2) { 1076 // If the 'or' is setting all of the bits that we are masking for, 1077 // we know the result of the AND will be the AND mask itself. 1078 return N2; 1079 } 1080 } 1081 break; 1082 case ISD::OR: 1083 if (!C2)return N1; // X or 0 -> X 1084 if (N2C->isAllOnesValue()) 1085 return N2; // X or -1 -> -1 1086 break; 1087 case ISD::XOR: 1088 if (!C2) return N1; // X xor 0 -> X 1089 if (N2C->isAllOnesValue()) { 1090 if (N1.Val->getOpcode() == ISD::SETCC){ 1091 SDNode *SetCC = N1.Val; 1092 // !(X op Y) -> (X !op Y) 1093 bool isInteger = MVT::isInteger(SetCC->getOperand(0).getValueType()); 1094 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC->getOperand(2))->get(); 1095 return getSetCC(SetCC->getValueType(0), 1096 SetCC->getOperand(0), SetCC->getOperand(1), 1097 ISD::getSetCCInverse(CC, isInteger)); 1098 } else if (N1.getOpcode() == ISD::AND || N1.getOpcode() == ISD::OR) { 1099 SDNode *Op = N1.Val; 1100 // !(X or Y) -> (!X and !Y) iff X or Y are freely invertible 1101 // !(X and Y) -> (!X or !Y) iff X or Y are freely invertible 1102 SDOperand LHS = Op->getOperand(0), RHS = Op->getOperand(1); 1103 if (isInvertibleForFree(RHS) || isInvertibleForFree(LHS)) { 1104 LHS = getNode(ISD::XOR, VT, LHS, N2); // RHS = ~LHS 1105 RHS = getNode(ISD::XOR, VT, RHS, N2); // RHS = ~RHS 1106 if (Op->getOpcode() == ISD::AND) 1107 return getNode(ISD::OR, VT, LHS, RHS); 1108 return getNode(ISD::AND, VT, LHS, RHS); 1109 } 1110 } 1111 // X xor -1 -> not(x) ? 1112 } 1113 break; 1114 } 1115 1116 // Reassociate ((X op C1) op C2) if possible. 1117 if (N1.getOpcode() == Opcode && isAssociativeBinOp(Opcode)) 1118 if (ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N1.Val->getOperand(1))) 1119 return getNode(Opcode, VT, N1.Val->getOperand(0), 1120 getNode(Opcode, VT, N2, N1.Val->getOperand(1))); 1121 } 1122 1123 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val); 1124 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val); 1125 if (N1CFP) { 1126 if (N2CFP) { 1127 double C1 = N1CFP->getValue(), C2 = N2CFP->getValue(); 1128 switch (Opcode) { 1129 case ISD::ADD: return getConstantFP(C1 + C2, VT); 1130 case ISD::SUB: return getConstantFP(C1 - C2, VT); 1131 case ISD::MUL: return getConstantFP(C1 * C2, VT); 1132 case ISD::SDIV: 1133 if (C2) return getConstantFP(C1 / C2, VT); 1134 break; 1135 case ISD::SREM : 1136 if (C2) return getConstantFP(fmod(C1, C2), VT); 1137 break; 1138 default: break; 1139 } 1140 1141 } else { // Cannonicalize constant to RHS if commutative 1142 if (isCommutativeBinOp(Opcode)) { 1143 std::swap(N1CFP, N2CFP); 1144 std::swap(N1, N2); 1145 } 1146 } 1147 1148 if (Opcode == ISD::FP_ROUND_INREG) 1149 return getNode(ISD::FP_EXTEND, VT, 1150 getNode(ISD::FP_ROUND, cast<VTSDNode>(N2)->getVT(), N1)); 1151 } 1152 1153 // Finally, fold operations that do not require constants. 1154 switch (Opcode) { 1155 case ISD::TokenFactor: 1156 if (N1.getOpcode() == ISD::EntryToken) 1157 return N2; 1158 if (N2.getOpcode() == ISD::EntryToken) 1159 return N1; 1160 break; 1161 1162 case ISD::AND: 1163 case ISD::OR: 1164 if (N1.Val->getOpcode() == ISD::SETCC && N2.Val->getOpcode() == ISD::SETCC){ 1165 SDNode *LHS = N1.Val, *RHS = N2.Val; 1166 SDOperand LL = LHS->getOperand(0), RL = RHS->getOperand(0); 1167 SDOperand LR = LHS->getOperand(1), RR = RHS->getOperand(1); 1168 ISD::CondCode Op1 = cast<CondCodeSDNode>(LHS->getOperand(2))->get(); 1169 ISD::CondCode Op2 = cast<CondCodeSDNode>(RHS->getOperand(2))->get(); 1170 1171 if (LR == RR && isa<ConstantSDNode>(LR) && 1172 Op2 == Op1 && MVT::isInteger(LL.getValueType())) { 1173 // (X != 0) | (Y != 0) -> (X|Y != 0) 1174 // (X == 0) & (Y == 0) -> (X|Y == 0) 1175 // (X < 0) | (Y < 0) -> (X|Y < 0) 1176 if (cast<ConstantSDNode>(LR)->getValue() == 0 && 1177 ((Op2 == ISD::SETEQ && Opcode == ISD::AND) || 1178 (Op2 == ISD::SETNE && Opcode == ISD::OR) || 1179 (Op2 == ISD::SETLT && Opcode == ISD::OR))) 1180 return getSetCC(VT, getNode(ISD::OR, LR.getValueType(), LL, RL), LR, 1181 Op2); 1182 1183 if (cast<ConstantSDNode>(LR)->isAllOnesValue()) { 1184 // (X == -1) & (Y == -1) -> (X&Y == -1) 1185 // (X != -1) | (Y != -1) -> (X&Y != -1) 1186 // (X > -1) | (Y > -1) -> (X&Y > -1) 1187 if ((Opcode == ISD::AND && Op2 == ISD::SETEQ) || 1188 (Opcode == ISD::OR && Op2 == ISD::SETNE) || 1189 (Opcode == ISD::OR && Op2 == ISD::SETGT)) 1190 return getSetCC(VT, getNode(ISD::AND, LR.getValueType(), LL, RL), 1191 LR, Op2); 1192 // (X > -1) & (Y > -1) -> (X|Y > -1) 1193 if (Opcode == ISD::AND && Op2 == ISD::SETGT) 1194 return getSetCC(VT, getNode(ISD::OR, LR.getValueType(), LL, RL), 1195 LR, Op2); 1196 } 1197 } 1198 1199 // (X op1 Y) | (Y op2 X) -> (X op1 Y) | (X swapop2 Y) 1200 if (LL == RR && LR == RL) { 1201 Op2 = ISD::getSetCCSwappedOperands(Op2); 1202 goto MatchedBackwards; 1203 } 1204 1205 if (LL == RL && LR == RR) { 1206 MatchedBackwards: 1207 ISD::CondCode Result; 1208 bool isInteger = MVT::isInteger(LL.getValueType()); 1209 if (Opcode == ISD::OR) 1210 Result = ISD::getSetCCOrOperation(Op1, Op2, isInteger); 1211 else 1212 Result = ISD::getSetCCAndOperation(Op1, Op2, isInteger); 1213 1214 if (Result != ISD::SETCC_INVALID) 1215 return getSetCC(LHS->getValueType(0), LL, LR, Result); 1216 } 1217 } 1218 1219 // and/or zext(a), zext(b) -> zext(and/or a, b) 1220 if (N1.getOpcode() == ISD::ZERO_EXTEND && 1221 N2.getOpcode() == ISD::ZERO_EXTEND && 1222 N1.getOperand(0).getValueType() == N2.getOperand(0).getValueType()) 1223 return getNode(ISD::ZERO_EXTEND, VT, 1224 getNode(Opcode, N1.getOperand(0).getValueType(), 1225 N1.getOperand(0), N2.getOperand(0))); 1226 break; 1227 case ISD::XOR: 1228 if (N1 == N2) return getConstant(0, VT); // xor X, Y -> 0 1229 break; 1230 case ISD::ADD: 1231 if (N2.getOpcode() == ISD::FNEG) // (A+ (-B) -> A-B 1232 return getNode(ISD::SUB, VT, N1, N2.getOperand(0)); 1233 if (N1.getOpcode() == ISD::FNEG) // ((-A)+B) -> B-A 1234 return getNode(ISD::SUB, VT, N2, N1.getOperand(0)); 1235 if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) && 1236 cast<ConstantSDNode>(N1.getOperand(0))->getValue() == 0) 1237 return getNode(ISD::SUB, VT, N2, N1.getOperand(1)); // (0-A)+B -> B-A 1238 if (N2.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N2.getOperand(0)) && 1239 cast<ConstantSDNode>(N2.getOperand(0))->getValue() == 0) 1240 return getNode(ISD::SUB, VT, N1, N2.getOperand(1)); // A+(0-B) -> A-B 1241 if (N2.getOpcode() == ISD::SUB && N1 == N2.Val->getOperand(1) && 1242 !MVT::isFloatingPoint(N2.getValueType())) 1243 return N2.Val->getOperand(0); // A+(B-A) -> B 1244 break; 1245 case ISD::SUB: 1246 if (N1.getOpcode() == ISD::ADD) { 1247 if (N1.Val->getOperand(0) == N2 && 1248 !MVT::isFloatingPoint(N2.getValueType())) 1249 return N1.Val->getOperand(1); // (A+B)-A == B 1250 if (N1.Val->getOperand(1) == N2 && 1251 !MVT::isFloatingPoint(N2.getValueType())) 1252 return N1.Val->getOperand(0); // (A+B)-B == A 1253 } 1254 if (N2.getOpcode() == ISD::FNEG) // (A- (-B) -> A+B 1255 return getNode(ISD::ADD, VT, N1, N2.getOperand(0)); 1256 break; 1257 case ISD::FP_ROUND_INREG: 1258 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 1259 break; 1260 case ISD::SIGN_EXTEND_INREG: { 1261 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT(); 1262 if (EVT == VT) return N1; // Not actually extending 1263 1264 // If we are sign extending an extension, use the original source. 1265 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) 1266 if (cast<VTSDNode>(N1.getOperand(1))->getVT() <= EVT) 1267 return N1; 1268 1269 // If we are sign extending a sextload, return just the load. 1270 if (N1.getOpcode() == ISD::SEXTLOAD) 1271 if (cast<VTSDNode>(N1.getOperand(3))->getVT() <= EVT) 1272 return N1; 1273 1274 // If we are extending the result of a setcc, and we already know the 1275 // contents of the top bits, eliminate the extension. 1276 if (N1.getOpcode() == ISD::SETCC && 1277 TLI.getSetCCResultContents() == 1278 TargetLowering::ZeroOrNegativeOneSetCCResult) 1279 return N1; 1280 1281 // If we are sign extending the result of an (and X, C) operation, and we 1282 // know the extended bits are zeros already, don't do the extend. 1283 if (N1.getOpcode() == ISD::AND) 1284 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 1285 uint64_t Mask = N1C->getValue(); 1286 unsigned NumBits = MVT::getSizeInBits(EVT); 1287 if ((Mask & (~0ULL << (NumBits-1))) == 0) 1288 return N1; 1289 } 1290 break; 1291 } 1292 1293 // FIXME: figure out how to safely handle things like 1294 // int foo(int x) { return 1 << (x & 255); } 1295 // int bar() { return foo(256); } 1296#if 0 1297 case ISD::SHL: 1298 case ISD::SRL: 1299 case ISD::SRA: 1300 if (N2.getOpcode() == ISD::SIGN_EXTEND_INREG && 1301 cast<VTSDNode>(N2.getOperand(1))->getVT() != MVT::i1) 1302 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1303 else if (N2.getOpcode() == ISD::AND) 1304 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N2.getOperand(1))) { 1305 // If the and is only masking out bits that cannot effect the shift, 1306 // eliminate the and. 1307 unsigned NumBits = MVT::getSizeInBits(VT); 1308 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 1309 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1310 } 1311 break; 1312#endif 1313 } 1314 1315 // Memoize this node if possible. 1316 SDNode *N; 1317 if (Opcode != ISD::CALLSEQ_START && Opcode != ISD::CALLSEQ_END) { 1318 SDNode *&BON = BinaryOps[std::make_pair(Opcode, std::make_pair(N1, N2))]; 1319 if (BON) return SDOperand(BON, 0); 1320 1321 BON = N = new SDNode(Opcode, N1, N2); 1322 } else { 1323 N = new SDNode(Opcode, N1, N2); 1324 } 1325 1326 N->setValueTypes(VT); 1327 AllNodes.push_back(N); 1328 return SDOperand(N, 0); 1329} 1330 1331// setAdjCallChain - This method changes the token chain of an 1332// CALLSEQ_START/END node to be the specified operand. 1333void SDNode::setAdjCallChain(SDOperand N) { 1334 assert(N.getValueType() == MVT::Other); 1335 assert((getOpcode() == ISD::CALLSEQ_START || 1336 getOpcode() == ISD::CALLSEQ_END) && "Cannot adjust this node!"); 1337 1338 Operands[0].Val->removeUser(this); 1339 Operands[0] = N; 1340 N.Val->Uses.push_back(this); 1341} 1342 1343 1344 1345SDOperand SelectionDAG::getLoad(MVT::ValueType VT, 1346 SDOperand Chain, SDOperand Ptr, 1347 SDOperand SV) { 1348 SDNode *&N = Loads[std::make_pair(Ptr, std::make_pair(Chain, VT))]; 1349 if (N) return SDOperand(N, 0); 1350 N = new SDNode(ISD::LOAD, Chain, Ptr, SV); 1351 1352 // Loads have a token chain. 1353 N->setValueTypes(VT, MVT::Other); 1354 AllNodes.push_back(N); 1355 return SDOperand(N, 0); 1356} 1357 1358 1359SDOperand SelectionDAG::getExtLoad(unsigned Opcode, MVT::ValueType VT, 1360 SDOperand Chain, SDOperand Ptr, SDOperand SV, 1361 MVT::ValueType EVT) { 1362 std::vector<SDOperand> Ops; 1363 Ops.reserve(4); 1364 Ops.push_back(Chain); 1365 Ops.push_back(Ptr); 1366 Ops.push_back(SV); 1367 Ops.push_back(getValueType(EVT)); 1368 std::vector<MVT::ValueType> VTs; 1369 VTs.reserve(2); 1370 VTs.push_back(VT); VTs.push_back(MVT::Other); // Add token chain. 1371 return getNode(Opcode, VTs, Ops); 1372} 1373 1374SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1375 SDOperand N1, SDOperand N2, SDOperand N3) { 1376 // Perform various simplifications. 1377 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 1378 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 1379 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val); 1380 switch (Opcode) { 1381 case ISD::SETCC: { 1382 // Use SimplifySetCC to simplify SETCC's. 1383 SDOperand Simp = SimplifySetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 1384 if (Simp.Val) return Simp; 1385 break; 1386 } 1387 case ISD::SELECT: 1388 if (N1C) 1389 if (N1C->getValue()) 1390 return N2; // select true, X, Y -> X 1391 else 1392 return N3; // select false, X, Y -> Y 1393 1394 if (N2 == N3) return N2; // select C, X, X -> X 1395 1396 if (VT == MVT::i1) { // Boolean SELECT 1397 if (N2C) { 1398 if (N2C->getValue()) // select C, 1, X -> C | X 1399 return getNode(ISD::OR, VT, N1, N3); 1400 else // select C, 0, X -> ~C & X 1401 return getNode(ISD::AND, VT, 1402 getNode(ISD::XOR, N1.getValueType(), N1, 1403 getConstant(1, N1.getValueType())), N3); 1404 } else if (N3C) { 1405 if (N3C->getValue()) // select C, X, 1 -> ~C | X 1406 return getNode(ISD::OR, VT, 1407 getNode(ISD::XOR, N1.getValueType(), N1, 1408 getConstant(1, N1.getValueType())), N2); 1409 else // select C, X, 0 -> C & X 1410 return getNode(ISD::AND, VT, N1, N2); 1411 } 1412 1413 if (N1 == N2) // X ? X : Y --> X ? 1 : Y --> X | Y 1414 return getNode(ISD::OR, VT, N1, N3); 1415 if (N1 == N3) // X ? Y : X --> X ? Y : 0 --> X & Y 1416 return getNode(ISD::AND, VT, N1, N2); 1417 } 1418 break; 1419 case ISD::BRCOND: 1420 if (N2C) 1421 if (N2C->getValue()) // Unconditional branch 1422 return getNode(ISD::BR, MVT::Other, N1, N3); 1423 else 1424 return N1; // Never-taken branch 1425 break; 1426 } 1427 1428 std::vector<SDOperand> Ops; 1429 Ops.reserve(3); 1430 Ops.push_back(N1); 1431 Ops.push_back(N2); 1432 Ops.push_back(N3); 1433 1434 // Memoize nodes. 1435 SDNode *&N = OneResultNodes[std::make_pair(Opcode, std::make_pair(VT, Ops))]; 1436 if (N) return SDOperand(N, 0); 1437 1438 N = new SDNode(Opcode, N1, N2, N3); 1439 N->setValueTypes(VT); 1440 AllNodes.push_back(N); 1441 return SDOperand(N, 0); 1442} 1443 1444SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1445 SDOperand N1, SDOperand N2, SDOperand N3, 1446 SDOperand N4) { 1447 std::vector<SDOperand> Ops; 1448 Ops.reserve(4); 1449 Ops.push_back(N1); 1450 Ops.push_back(N2); 1451 Ops.push_back(N3); 1452 Ops.push_back(N4); 1453 return getNode(Opcode, VT, Ops); 1454} 1455 1456SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1457 SDOperand N1, SDOperand N2, SDOperand N3, 1458 SDOperand N4, SDOperand N5) { 1459 if (ISD::SELECT_CC == Opcode) { 1460 assert(N1.getValueType() == N2.getValueType() && 1461 "LHS and RHS of condition must have same type!"); 1462 assert(N3.getValueType() == N4.getValueType() && 1463 "True and False arms of SelectCC must have same type!"); 1464 1465 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 1466 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val); 1467 ConstantSDNode *N4C = dyn_cast<ConstantSDNode>(N4.Val); 1468 ISD::CondCode CC = cast<CondCodeSDNode>(N5)->get(); 1469 1470 // Check to see if we can simplify the select into an fabs node 1471 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) { 1472 // Allow either -0.0 or 0.0 1473 if (CFP->getValue() == 0.0) { 1474 // select (setg[te] X, +/-0.0), X, fneg(X) -> fabs 1475 if ((CC == ISD::SETGE || CC == ISD::SETGT) && 1476 N1 == N3 && N4.getOpcode() == ISD::FNEG && 1477 N1 == N4.getOperand(0)) 1478 return getNode(ISD::FABS, VT, N1); 1479 1480 // select (setl[te] X, +/-0.0), fneg(X), X -> fabs 1481 if ((CC == ISD::SETLT || CC == ISD::SETLE) && 1482 N1 == N4 && N3.getOpcode() == ISD::FNEG && 1483 N3.getOperand(0) == N4) 1484 return getNode(ISD::FABS, VT, N4); 1485 } 1486 } 1487 1488 // Check to see if we can perform the "gzip trick", transforming 1489 // select_cc setlt X, 0, A, 0 -> and (sra X, size(X)-1), A 1490 if (N2C && N2C->isNullValue() && N4C && N4C->isNullValue() && 1491 MVT::isInteger(N1.getValueType()) && 1492 MVT::isInteger(N3.getValueType()) && CC == ISD::SETLT) { 1493 MVT::ValueType XType = N1.getValueType(); 1494 MVT::ValueType AType = N3.getValueType(); 1495 if (XType >= AType) { 1496 // and (sra X, size(X)-1, A) -> "and (srl X, C2), A" iff A is a 1497 // single-bit constant. FIXME: remove once the dag combiner 1498 // exists. 1499 if (N3C && ((N3C->getValue() & (N3C->getValue()-1)) == 0)) { 1500 unsigned ShCtV = Log2_64(N3C->getValue()); 1501 ShCtV = MVT::getSizeInBits(XType)-ShCtV-1; 1502 SDOperand ShCt = getConstant(ShCtV, TLI.getShiftAmountTy()); 1503 SDOperand Shift = getNode(ISD::SRL, XType, N1, ShCt); 1504 if (XType > AType) 1505 Shift = getNode(ISD::TRUNCATE, AType, Shift); 1506 return getNode(ISD::AND, AType, Shift, N3); 1507 } 1508 SDOperand Shift = getNode(ISD::SRA, XType, N1, 1509 getConstant(MVT::getSizeInBits(XType)-1, 1510 TLI.getShiftAmountTy())); 1511 if (XType > AType) 1512 Shift = getNode(ISD::TRUNCATE, AType, Shift); 1513 return getNode(ISD::AND, AType, Shift, N3); 1514 } 1515 } 1516 1517 // Check to see if this is an integer abs. select_cc setl[te] X, 0, -X, X -> 1518 // Y = sra (X, size(X)-1); xor (add (X, Y), Y) 1519 if (N2C && N2C->isNullValue() && (CC == ISD::SETLT || CC == ISD::SETLE) && 1520 N1 == N4 && N3.getOpcode() == ISD::SUB && N1 == N3.getOperand(1)) { 1521 if (ConstantSDNode *SubC = dyn_cast<ConstantSDNode>(N3.getOperand(0))) { 1522 MVT::ValueType XType = N1.getValueType(); 1523 if (SubC->isNullValue() && MVT::isInteger(XType)) { 1524 SDOperand Shift = getNode(ISD::SRA, XType, N1, 1525 getConstant(MVT::getSizeInBits(XType)-1, 1526 TLI.getShiftAmountTy())); 1527 return getNode(ISD::XOR, XType, getNode(ISD::ADD, XType, N1, Shift), 1528 Shift); 1529 } 1530 } 1531 } 1532 } 1533 1534 std::vector<SDOperand> Ops; 1535 Ops.reserve(5); 1536 Ops.push_back(N1); 1537 Ops.push_back(N2); 1538 Ops.push_back(N3); 1539 Ops.push_back(N4); 1540 Ops.push_back(N5); 1541 return getNode(Opcode, VT, Ops); 1542} 1543 1544 1545SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) { 1546 assert((!V || isa<PointerType>(V->getType())) && 1547 "SrcValue is not a pointer?"); 1548 SDNode *&N = ValueNodes[std::make_pair(V, Offset)]; 1549 if (N) return SDOperand(N, 0); 1550 1551 N = new SrcValueSDNode(V, Offset); 1552 AllNodes.push_back(N); 1553 return SDOperand(N, 0); 1554} 1555 1556SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1557 std::vector<SDOperand> &Ops) { 1558 switch (Ops.size()) { 1559 case 0: return getNode(Opcode, VT); 1560 case 1: return getNode(Opcode, VT, Ops[0]); 1561 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 1562 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 1563 default: break; 1564 } 1565 1566 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(Ops[1].Val); 1567 switch (Opcode) { 1568 default: break; 1569 case ISD::BRCONDTWOWAY: 1570 if (N1C) 1571 if (N1C->getValue()) // Unconditional branch to true dest. 1572 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[2]); 1573 else // Unconditional branch to false dest. 1574 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[3]); 1575 break; 1576 1577 case ISD::TRUNCSTORE: { 1578 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!"); 1579 MVT::ValueType EVT = cast<VTSDNode>(Ops[4])->getVT(); 1580#if 0 // FIXME: If the target supports EVT natively, convert to a truncate/store 1581 // If this is a truncating store of a constant, convert to the desired type 1582 // and store it instead. 1583 if (isa<Constant>(Ops[0])) { 1584 SDOperand Op = getNode(ISD::TRUNCATE, EVT, N1); 1585 if (isa<Constant>(Op)) 1586 N1 = Op; 1587 } 1588 // Also for ConstantFP? 1589#endif 1590 if (Ops[0].getValueType() == EVT) // Normal store? 1591 return getNode(ISD::STORE, VT, Ops[0], Ops[1], Ops[2], Ops[3]); 1592 assert(Ops[1].getValueType() > EVT && "Not a truncation?"); 1593 assert(MVT::isInteger(Ops[1].getValueType()) == MVT::isInteger(EVT) && 1594 "Can't do FP-INT conversion!"); 1595 break; 1596 } 1597 } 1598 1599 // Memoize nodes. 1600 SDNode *&N = OneResultNodes[std::make_pair(Opcode, std::make_pair(VT, Ops))]; 1601 if (N) return SDOperand(N, 0); 1602 N = new SDNode(Opcode, Ops); 1603 N->setValueTypes(VT); 1604 AllNodes.push_back(N); 1605 return SDOperand(N, 0); 1606} 1607 1608SDOperand SelectionDAG::getNode(unsigned Opcode, 1609 std::vector<MVT::ValueType> &ResultTys, 1610 std::vector<SDOperand> &Ops) { 1611 if (ResultTys.size() == 1) 1612 return getNode(Opcode, ResultTys[0], Ops); 1613 1614 switch (Opcode) { 1615 case ISD::EXTLOAD: 1616 case ISD::SEXTLOAD: 1617 case ISD::ZEXTLOAD: { 1618 MVT::ValueType EVT = cast<VTSDNode>(Ops[3])->getVT(); 1619 assert(Ops.size() == 4 && ResultTys.size() == 2 && "Bad *EXTLOAD!"); 1620 // If they are asking for an extending load from/to the same thing, return a 1621 // normal load. 1622 if (ResultTys[0] == EVT) 1623 return getLoad(ResultTys[0], Ops[0], Ops[1], Ops[2]); 1624 assert(EVT < ResultTys[0] && 1625 "Should only be an extending load, not truncating!"); 1626 assert((Opcode == ISD::EXTLOAD || MVT::isInteger(ResultTys[0])) && 1627 "Cannot sign/zero extend a FP load!"); 1628 assert(MVT::isInteger(ResultTys[0]) == MVT::isInteger(EVT) && 1629 "Cannot convert from FP to Int or Int -> FP!"); 1630 break; 1631 } 1632 1633 // FIXME: figure out how to safely handle things like 1634 // int foo(int x) { return 1 << (x & 255); } 1635 // int bar() { return foo(256); } 1636#if 0 1637 case ISD::SRA_PARTS: 1638 case ISD::SRL_PARTS: 1639 case ISD::SHL_PARTS: 1640 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 1641 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 1642 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 1643 else if (N3.getOpcode() == ISD::AND) 1644 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 1645 // If the and is only masking out bits that cannot effect the shift, 1646 // eliminate the and. 1647 unsigned NumBits = MVT::getSizeInBits(VT)*2; 1648 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 1649 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 1650 } 1651 break; 1652#endif 1653 } 1654 1655 // Memoize the node. 1656 SDNode *&N = ArbitraryNodes[std::make_pair(Opcode, std::make_pair(ResultTys, 1657 Ops))]; 1658 if (N) return SDOperand(N, 0); 1659 N = new SDNode(Opcode, Ops); 1660 N->setValueTypes(ResultTys); 1661 AllNodes.push_back(N); 1662 return SDOperand(N, 0); 1663} 1664 1665/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 1666/// indicated value. This method ignores uses of other values defined by this 1667/// operation. 1668bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) { 1669 assert(Value < getNumValues() && "Bad value!"); 1670 1671 // If there is only one value, this is easy. 1672 if (getNumValues() == 1) 1673 return use_size() == NUses; 1674 if (Uses.size() < NUses) return false; 1675 1676 SDOperand TheValue(this, Value); 1677 1678 std::set<SDNode*> UsersHandled; 1679 1680 for (std::vector<SDNode*>::iterator UI = Uses.begin(), E = Uses.end(); 1681 UI != E; ++UI) { 1682 SDNode *User = *UI; 1683 if (User->getNumOperands() == 1 || 1684 UsersHandled.insert(User).second) // First time we've seen this? 1685 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) 1686 if (User->getOperand(i) == TheValue) { 1687 if (NUses == 0) 1688 return false; // too many uses 1689 --NUses; 1690 } 1691 } 1692 1693 // Found exactly the right number of uses? 1694 return NUses == 0; 1695} 1696 1697 1698const char *SDNode::getOperationName() const { 1699 switch (getOpcode()) { 1700 default: return "<<Unknown>>"; 1701 case ISD::PCMARKER: return "PCMarker"; 1702 case ISD::SRCVALUE: return "SrcValue"; 1703 case ISD::EntryToken: return "EntryToken"; 1704 case ISD::TokenFactor: return "TokenFactor"; 1705 case ISD::Constant: return "Constant"; 1706 case ISD::ConstantFP: return "ConstantFP"; 1707 case ISD::GlobalAddress: return "GlobalAddress"; 1708 case ISD::FrameIndex: return "FrameIndex"; 1709 case ISD::BasicBlock: return "BasicBlock"; 1710 case ISD::ExternalSymbol: return "ExternalSymbol"; 1711 case ISD::ConstantPool: return "ConstantPoolIndex"; 1712 case ISD::CopyToReg: return "CopyToReg"; 1713 case ISD::CopyFromReg: return "CopyFromReg"; 1714 case ISD::ImplicitDef: return "ImplicitDef"; 1715 case ISD::UNDEF: return "undef"; 1716 1717 // Unary operators 1718 case ISD::FABS: return "fabs"; 1719 case ISD::FNEG: return "fneg"; 1720 case ISD::FSQRT: return "fsqrt"; 1721 case ISD::FSIN: return "fsin"; 1722 case ISD::FCOS: return "fcos"; 1723 1724 // Binary operators 1725 case ISD::ADD: return "add"; 1726 case ISD::SUB: return "sub"; 1727 case ISD::MUL: return "mul"; 1728 case ISD::MULHU: return "mulhu"; 1729 case ISD::MULHS: return "mulhs"; 1730 case ISD::SDIV: return "sdiv"; 1731 case ISD::UDIV: return "udiv"; 1732 case ISD::SREM: return "srem"; 1733 case ISD::UREM: return "urem"; 1734 case ISD::AND: return "and"; 1735 case ISD::OR: return "or"; 1736 case ISD::XOR: return "xor"; 1737 case ISD::SHL: return "shl"; 1738 case ISD::SRA: return "sra"; 1739 case ISD::SRL: return "srl"; 1740 1741 case ISD::SETCC: return "setcc"; 1742 case ISD::SELECT: return "select"; 1743 case ISD::SELECT_CC: return "select_cc"; 1744 case ISD::ADD_PARTS: return "add_parts"; 1745 case ISD::SUB_PARTS: return "sub_parts"; 1746 case ISD::SHL_PARTS: return "shl_parts"; 1747 case ISD::SRA_PARTS: return "sra_parts"; 1748 case ISD::SRL_PARTS: return "srl_parts"; 1749 1750 // Conversion operators. 1751 case ISD::SIGN_EXTEND: return "sign_extend"; 1752 case ISD::ZERO_EXTEND: return "zero_extend"; 1753 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 1754 case ISD::TRUNCATE: return "truncate"; 1755 case ISD::FP_ROUND: return "fp_round"; 1756 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 1757 case ISD::FP_EXTEND: return "fp_extend"; 1758 1759 case ISD::SINT_TO_FP: return "sint_to_fp"; 1760 case ISD::UINT_TO_FP: return "uint_to_fp"; 1761 case ISD::FP_TO_SINT: return "fp_to_sint"; 1762 case ISD::FP_TO_UINT: return "fp_to_uint"; 1763 1764 // Control flow instructions 1765 case ISD::BR: return "br"; 1766 case ISD::BRCOND: return "brcond"; 1767 case ISD::BRCONDTWOWAY: return "brcondtwoway"; 1768 case ISD::RET: return "ret"; 1769 case ISD::CALL: return "call"; 1770 case ISD::TAILCALL:return "tailcall"; 1771 case ISD::CALLSEQ_START: return "callseq_start"; 1772 case ISD::CALLSEQ_END: return "callseq_end"; 1773 1774 // Other operators 1775 case ISD::LOAD: return "load"; 1776 case ISD::STORE: return "store"; 1777 case ISD::EXTLOAD: return "extload"; 1778 case ISD::SEXTLOAD: return "sextload"; 1779 case ISD::ZEXTLOAD: return "zextload"; 1780 case ISD::TRUNCSTORE: return "truncstore"; 1781 1782 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 1783 case ISD::EXTRACT_ELEMENT: return "extract_element"; 1784 case ISD::BUILD_PAIR: return "build_pair"; 1785 case ISD::MEMSET: return "memset"; 1786 case ISD::MEMCPY: return "memcpy"; 1787 case ISD::MEMMOVE: return "memmove"; 1788 1789 // Bit counting 1790 case ISD::CTPOP: return "ctpop"; 1791 case ISD::CTTZ: return "cttz"; 1792 case ISD::CTLZ: return "ctlz"; 1793 1794 // IO Intrinsics 1795 case ISD::READPORT: return "readport"; 1796 case ISD::WRITEPORT: return "writeport"; 1797 case ISD::READIO: return "readio"; 1798 case ISD::WRITEIO: return "writeio"; 1799 1800 case ISD::CONDCODE: 1801 switch (cast<CondCodeSDNode>(this)->get()) { 1802 default: assert(0 && "Unknown setcc condition!"); 1803 case ISD::SETOEQ: return "setoeq"; 1804 case ISD::SETOGT: return "setogt"; 1805 case ISD::SETOGE: return "setoge"; 1806 case ISD::SETOLT: return "setolt"; 1807 case ISD::SETOLE: return "setole"; 1808 case ISD::SETONE: return "setone"; 1809 1810 case ISD::SETO: return "seto"; 1811 case ISD::SETUO: return "setuo"; 1812 case ISD::SETUEQ: return "setue"; 1813 case ISD::SETUGT: return "setugt"; 1814 case ISD::SETUGE: return "setuge"; 1815 case ISD::SETULT: return "setult"; 1816 case ISD::SETULE: return "setule"; 1817 case ISD::SETUNE: return "setune"; 1818 1819 case ISD::SETEQ: return "seteq"; 1820 case ISD::SETGT: return "setgt"; 1821 case ISD::SETGE: return "setge"; 1822 case ISD::SETLT: return "setlt"; 1823 case ISD::SETLE: return "setle"; 1824 case ISD::SETNE: return "setne"; 1825 } 1826 } 1827} 1828 1829void SDNode::dump() const { 1830 std::cerr << (void*)this << ": "; 1831 1832 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 1833 if (i) std::cerr << ","; 1834 if (getValueType(i) == MVT::Other) 1835 std::cerr << "ch"; 1836 else 1837 std::cerr << MVT::getValueTypeString(getValueType(i)); 1838 } 1839 std::cerr << " = " << getOperationName(); 1840 1841 std::cerr << " "; 1842 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1843 if (i) std::cerr << ", "; 1844 std::cerr << (void*)getOperand(i).Val; 1845 if (unsigned RN = getOperand(i).ResNo) 1846 std::cerr << ":" << RN; 1847 } 1848 1849 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 1850 std::cerr << "<" << CSDN->getValue() << ">"; 1851 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 1852 std::cerr << "<" << CSDN->getValue() << ">"; 1853 } else if (const GlobalAddressSDNode *GADN = 1854 dyn_cast<GlobalAddressSDNode>(this)) { 1855 std::cerr << "<"; 1856 WriteAsOperand(std::cerr, GADN->getGlobal()) << ">"; 1857 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 1858 std::cerr << "<" << FIDN->getIndex() << ">"; 1859 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 1860 std::cerr << "<" << CP->getIndex() << ">"; 1861 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 1862 std::cerr << "<"; 1863 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 1864 if (LBB) 1865 std::cerr << LBB->getName() << " "; 1866 std::cerr << (const void*)BBDN->getBasicBlock() << ">"; 1867 } else if (const RegSDNode *C2V = dyn_cast<RegSDNode>(this)) { 1868 std::cerr << "<reg #" << C2V->getReg() << ">"; 1869 } else if (const ExternalSymbolSDNode *ES = 1870 dyn_cast<ExternalSymbolSDNode>(this)) { 1871 std::cerr << "'" << ES->getSymbol() << "'"; 1872 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 1873 if (M->getValue()) 1874 std::cerr << "<" << M->getValue() << ":" << M->getOffset() << ">"; 1875 else 1876 std::cerr << "<null:" << M->getOffset() << ">"; 1877 } 1878} 1879 1880static void DumpNodes(SDNode *N, unsigned indent) { 1881 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 1882 if (N->getOperand(i).Val->hasOneUse()) 1883 DumpNodes(N->getOperand(i).Val, indent+2); 1884 else 1885 std::cerr << "\n" << std::string(indent+2, ' ') 1886 << (void*)N->getOperand(i).Val << ": <multiple use>"; 1887 1888 1889 std::cerr << "\n" << std::string(indent, ' '); 1890 N->dump(); 1891} 1892 1893void SelectionDAG::dump() const { 1894 std::cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 1895 std::vector<SDNode*> Nodes(AllNodes); 1896 std::sort(Nodes.begin(), Nodes.end()); 1897 1898 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) { 1899 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val) 1900 DumpNodes(Nodes[i], 2); 1901 } 1902 1903 DumpNodes(getRoot().Val, 2); 1904 1905 std::cerr << "\n\n"; 1906} 1907 1908