SelectionDAG.cpp revision 4a44c8df1984ebcb253dda283bd2c117cbbb1929
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "llvm/Constants.h" 16#include "llvm/GlobalValue.h" 17#include "llvm/Assembly/Writer.h" 18#include "llvm/CodeGen/MachineBasicBlock.h" 19#include "llvm/Target/TargetLowering.h" 20#include <iostream> 21#include <set> 22#include <cmath> 23#include <algorithm> 24using namespace llvm; 25 26static bool isCommutativeBinOp(unsigned Opcode) { 27 switch (Opcode) { 28 case ISD::ADD: 29 case ISD::MUL: 30 case ISD::AND: 31 case ISD::OR: 32 case ISD::XOR: return true; 33 default: return false; // FIXME: Need commutative info for user ops! 34 } 35} 36 37static bool isAssociativeBinOp(unsigned Opcode) { 38 switch (Opcode) { 39 case ISD::ADD: 40 case ISD::MUL: 41 case ISD::AND: 42 case ISD::OR: 43 case ISD::XOR: return true; 44 default: return false; // FIXME: Need associative info for user ops! 45 } 46} 47 48static unsigned ExactLog2(uint64_t Val) { 49 unsigned Count = 0; 50 while (Val != 1) { 51 Val >>= 1; 52 ++Count; 53 } 54 return Count; 55} 56 57// isInvertibleForFree - Return true if there is no cost to emitting the logical 58// inverse of this node. 59static bool isInvertibleForFree(SDOperand N) { 60 if (isa<ConstantSDNode>(N.Val)) return true; 61 if (isa<SetCCSDNode>(N.Val) && N.Val->hasOneUse()) 62 return true; 63 return false; 64} 65 66 67/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 68/// when given the operation for (X op Y). 69ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 70 // To perform this operation, we just need to swap the L and G bits of the 71 // operation. 72 unsigned OldL = (Operation >> 2) & 1; 73 unsigned OldG = (Operation >> 1) & 1; 74 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 75 (OldL << 1) | // New G bit 76 (OldG << 2)); // New L bit. 77} 78 79/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 80/// 'op' is a valid SetCC operation. 81ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 82 unsigned Operation = Op; 83 if (isInteger) 84 Operation ^= 7; // Flip L, G, E bits, but not U. 85 else 86 Operation ^= 15; // Flip all of the condition bits. 87 if (Operation > ISD::SETTRUE2) 88 Operation &= ~8; // Don't let N and U bits get set. 89 return ISD::CondCode(Operation); 90} 91 92 93/// isSignedOp - For an integer comparison, return 1 if the comparison is a 94/// signed operation and 2 if the result is an unsigned comparison. Return zero 95/// if the operation does not depend on the sign of the input (setne and seteq). 96static int isSignedOp(ISD::CondCode Opcode) { 97 switch (Opcode) { 98 default: assert(0 && "Illegal integer setcc operation!"); 99 case ISD::SETEQ: 100 case ISD::SETNE: return 0; 101 case ISD::SETLT: 102 case ISD::SETLE: 103 case ISD::SETGT: 104 case ISD::SETGE: return 1; 105 case ISD::SETULT: 106 case ISD::SETULE: 107 case ISD::SETUGT: 108 case ISD::SETUGE: return 2; 109 } 110} 111 112/// getSetCCOrOperation - Return the result of a logical OR between different 113/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 114/// returns SETCC_INVALID if it is not possible to represent the resultant 115/// comparison. 116ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 117 bool isInteger) { 118 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 119 // Cannot fold a signed integer setcc with an unsigned integer setcc. 120 return ISD::SETCC_INVALID; 121 122 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 123 124 // If the N and U bits get set then the resultant comparison DOES suddenly 125 // care about orderedness, and is true when ordered. 126 if (Op > ISD::SETTRUE2) 127 Op &= ~16; // Clear the N bit. 128 return ISD::CondCode(Op); 129} 130 131/// getSetCCAndOperation - Return the result of a logical AND between different 132/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 133/// function returns zero if it is not possible to represent the resultant 134/// comparison. 135ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 136 bool isInteger) { 137 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 138 // Cannot fold a signed setcc with an unsigned setcc. 139 return ISD::SETCC_INVALID; 140 141 // Combine all of the condition bits. 142 return ISD::CondCode(Op1 & Op2); 143} 144 145const TargetMachine &SelectionDAG::getTarget() const { 146 return TLI.getTargetMachine(); 147} 148 149 150/// RemoveDeadNodes - This method deletes all unreachable nodes in the 151/// SelectionDAG, including nodes (like loads) that have uses of their token 152/// chain but no other uses and no side effect. If a node is passed in as an 153/// argument, it is used as the seed for node deletion. 154void SelectionDAG::RemoveDeadNodes(SDNode *N) { 155 std::set<SDNode*> AllNodeSet(AllNodes.begin(), AllNodes.end()); 156 157 // Create a dummy node (which is not added to allnodes), that adds a reference 158 // to the root node, preventing it from being deleted. 159 SDNode *DummyNode = new SDNode(ISD::EntryToken, getRoot()); 160 161 DeleteNodeIfDead(N, &AllNodeSet); 162 163 Restart: 164 unsigned NumNodes = AllNodeSet.size(); 165 for (std::set<SDNode*>::iterator I = AllNodeSet.begin(), E = AllNodeSet.end(); 166 I != E; ++I) { 167 // Try to delete this node. 168 DeleteNodeIfDead(*I, &AllNodeSet); 169 170 // If we actually deleted any nodes, do not use invalid iterators in 171 // AllNodeSet. 172 if (AllNodeSet.size() != NumNodes) 173 goto Restart; 174 } 175 176 // Restore AllNodes. 177 if (AllNodes.size() != NumNodes) 178 AllNodes.assign(AllNodeSet.begin(), AllNodeSet.end()); 179 180 // If the root changed (e.g. it was a dead load, update the root). 181 setRoot(DummyNode->getOperand(0)); 182 183 // Now that we are done with the dummy node, delete it. 184 DummyNode->getOperand(0).Val->removeUser(DummyNode); 185 delete DummyNode; 186} 187 188void SelectionDAG::DeleteNodeIfDead(SDNode *N, void *NodeSet) { 189 if (!N->use_empty()) 190 return; 191 192 // Okay, we really are going to delete this node. First take this out of the 193 // appropriate CSE map. 194 switch (N->getOpcode()) { 195 case ISD::Constant: 196 Constants.erase(std::make_pair(cast<ConstantSDNode>(N)->getValue(), 197 N->getValueType(0))); 198 break; 199 case ISD::ConstantFP: { 200 union { 201 double DV; 202 uint64_t IV; 203 }; 204 DV = cast<ConstantFPSDNode>(N)->getValue(); 205 ConstantFPs.erase(std::make_pair(IV, N->getValueType(0))); 206 break; 207 } 208 case ISD::GlobalAddress: 209 GlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal()); 210 break; 211 case ISD::FrameIndex: 212 FrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex()); 213 break; 214 case ISD::ConstantPool: 215 ConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->getIndex()); 216 break; 217 case ISD::BasicBlock: 218 BBNodes.erase(cast<BasicBlockSDNode>(N)->getBasicBlock()); 219 break; 220 case ISD::ExternalSymbol: 221 ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 222 break; 223 224 case ISD::LOAD: 225 Loads.erase(std::make_pair(N->getOperand(1), 226 std::make_pair(N->getOperand(0), 227 N->getValueType(0)))); 228 break; 229 case ISD::SETCC: 230 SetCCs.erase(std::make_pair(std::make_pair(N->getOperand(0), 231 N->getOperand(1)), 232 std::make_pair( 233 cast<SetCCSDNode>(N)->getCondition(), 234 N->getValueType(0)))); 235 break; 236 case ISD::TRUNCSTORE: 237 case ISD::SIGN_EXTEND_INREG: 238 case ISD::FP_ROUND_INREG: 239 case ISD::EXTLOAD: 240 case ISD::SEXTLOAD: 241 case ISD::ZEXTLOAD: { 242 EVTStruct NN; 243 NN.Opcode = N->getOpcode(); 244 NN.VT = N->getValueType(0); 245 NN.EVT = cast<MVTSDNode>(N)->getExtraValueType(); 246 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 247 NN.Ops.push_back(N->getOperand(i)); 248 MVTSDNodes.erase(NN); 249 break; 250 } 251 default: 252 if (N->getNumOperands() == 1) 253 UnaryOps.erase(std::make_pair(N->getOpcode(), 254 std::make_pair(N->getOperand(0), 255 N->getValueType(0)))); 256 else if (N->getNumOperands() == 2) 257 BinaryOps.erase(std::make_pair(N->getOpcode(), 258 std::make_pair(N->getOperand(0), 259 N->getOperand(1)))); 260 break; 261 } 262 263 // Next, brutally remove the operand list. 264 while (!N->Operands.empty()) { 265 SDNode *O = N->Operands.back().Val; 266 N->Operands.pop_back(); 267 O->removeUser(N); 268 269 // Now that we removed this operand, see if there are no uses of it left. 270 DeleteNodeIfDead(O, NodeSet); 271 } 272 273 // Remove the node from the nodes set and delete it. 274 std::set<SDNode*> &AllNodeSet = *(std::set<SDNode*>*)NodeSet; 275 AllNodeSet.erase(N); 276 277 // Now that the node is gone, check to see if any of the operands of this node 278 // are dead now. 279 delete N; 280} 281 282 283SelectionDAG::~SelectionDAG() { 284 for (unsigned i = 0, e = AllNodes.size(); i != e; ++i) 285 delete AllNodes[i]; 286} 287 288SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) { 289 if (Op.getValueType() == VT) return Op; 290 int64_t Imm = ~0ULL >> 64-MVT::getSizeInBits(VT); 291 return getNode(ISD::AND, Op.getValueType(), Op, 292 getConstant(Imm, Op.getValueType())); 293} 294 295SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT) { 296 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!"); 297 // Mask out any bits that are not valid for this constant. 298 if (VT != MVT::i64) 299 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1; 300 301 SDNode *&N = Constants[std::make_pair(Val, VT)]; 302 if (N) return SDOperand(N, 0); 303 N = new ConstantSDNode(Val, VT); 304 AllNodes.push_back(N); 305 return SDOperand(N, 0); 306} 307 308SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT) { 309 assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!"); 310 if (VT == MVT::f32) 311 Val = (float)Val; // Mask out extra precision. 312 313 // Do the map lookup using the actual bit pattern for the floating point 314 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 315 // we don't have issues with SNANs. 316 union { 317 double DV; 318 uint64_t IV; 319 }; 320 321 DV = Val; 322 323 SDNode *&N = ConstantFPs[std::make_pair(IV, VT)]; 324 if (N) return SDOperand(N, 0); 325 N = new ConstantFPSDNode(Val, VT); 326 AllNodes.push_back(N); 327 return SDOperand(N, 0); 328} 329 330 331 332SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV, 333 MVT::ValueType VT) { 334 SDNode *&N = GlobalValues[GV]; 335 if (N) return SDOperand(N, 0); 336 N = new GlobalAddressSDNode(GV,VT); 337 AllNodes.push_back(N); 338 return SDOperand(N, 0); 339} 340 341SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT) { 342 SDNode *&N = FrameIndices[FI]; 343 if (N) return SDOperand(N, 0); 344 N = new FrameIndexSDNode(FI, VT); 345 AllNodes.push_back(N); 346 return SDOperand(N, 0); 347} 348 349SDOperand SelectionDAG::getConstantPool(unsigned CPIdx, MVT::ValueType VT) { 350 SDNode *N = ConstantPoolIndices[CPIdx]; 351 if (N) return SDOperand(N, 0); 352 N = new ConstantPoolSDNode(CPIdx, VT); 353 AllNodes.push_back(N); 354 return SDOperand(N, 0); 355} 356 357SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 358 SDNode *&N = BBNodes[MBB]; 359 if (N) return SDOperand(N, 0); 360 N = new BasicBlockSDNode(MBB); 361 AllNodes.push_back(N); 362 return SDOperand(N, 0); 363} 364 365SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) { 366 SDNode *&N = ExternalSymbols[Sym]; 367 if (N) return SDOperand(N, 0); 368 N = new ExternalSymbolSDNode(Sym, VT); 369 AllNodes.push_back(N); 370 return SDOperand(N, 0); 371} 372 373SDOperand SelectionDAG::getSetCC(ISD::CondCode Cond, MVT::ValueType VT, 374 SDOperand N1, SDOperand N2) { 375 // These setcc operations always fold. 376 switch (Cond) { 377 default: break; 378 case ISD::SETFALSE: 379 case ISD::SETFALSE2: return getConstant(0, VT); 380 case ISD::SETTRUE: 381 case ISD::SETTRUE2: return getConstant(1, VT); 382 } 383 384 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) { 385 uint64_t C2 = N2C->getValue(); 386 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 387 uint64_t C1 = N1C->getValue(); 388 389 // Sign extend the operands if required 390 if (ISD::isSignedIntSetCC(Cond)) { 391 C1 = N1C->getSignExtended(); 392 C2 = N2C->getSignExtended(); 393 } 394 395 switch (Cond) { 396 default: assert(0 && "Unknown integer setcc!"); 397 case ISD::SETEQ: return getConstant(C1 == C2, VT); 398 case ISD::SETNE: return getConstant(C1 != C2, VT); 399 case ISD::SETULT: return getConstant(C1 < C2, VT); 400 case ISD::SETUGT: return getConstant(C1 > C2, VT); 401 case ISD::SETULE: return getConstant(C1 <= C2, VT); 402 case ISD::SETUGE: return getConstant(C1 >= C2, VT); 403 case ISD::SETLT: return getConstant((int64_t)C1 < (int64_t)C2, VT); 404 case ISD::SETGT: return getConstant((int64_t)C1 > (int64_t)C2, VT); 405 case ISD::SETLE: return getConstant((int64_t)C1 <= (int64_t)C2, VT); 406 case ISD::SETGE: return getConstant((int64_t)C1 >= (int64_t)C2, VT); 407 } 408 } else { 409 // If the LHS is a ZERO_EXTEND and if this is an ==/!= comparison, perform 410 // the comparison on the input. 411 if (N1.getOpcode() == ISD::ZERO_EXTEND) { 412 unsigned InSize = MVT::getSizeInBits(N1.getOperand(0).getValueType()); 413 414 // If the comparison constant has bits in the upper part, the 415 // zero-extended value could never match. 416 if (C2 & (~0ULL << InSize)) { 417 unsigned VSize = MVT::getSizeInBits(N1.getValueType()); 418 switch (Cond) { 419 case ISD::SETUGT: 420 case ISD::SETUGE: 421 case ISD::SETEQ: return getConstant(0, VT); 422 case ISD::SETULT: 423 case ISD::SETULE: 424 case ISD::SETNE: return getConstant(1, VT); 425 case ISD::SETGT: 426 case ISD::SETGE: 427 // True if the sign bit of C2 is set. 428 return getConstant((C2 & (1ULL << VSize)) != 0, VT); 429 case ISD::SETLT: 430 case ISD::SETLE: 431 // True if the sign bit of C2 isn't set. 432 return getConstant((C2 & (1ULL << VSize)) == 0, VT); 433 default: 434 break; 435 } 436 } 437 438 // Otherwise, we can perform the comparison with the low bits. 439 switch (Cond) { 440 case ISD::SETEQ: 441 case ISD::SETNE: 442 case ISD::SETUGT: 443 case ISD::SETUGE: 444 case ISD::SETULT: 445 case ISD::SETULE: 446 return getSetCC(Cond, VT, N1.getOperand(0), 447 getConstant(C2, N1.getOperand(0).getValueType())); 448 default: 449 break; // todo, be more careful with signed comparisons 450 } 451 } 452 453 454 uint64_t MinVal, MaxVal; 455 unsigned OperandBitSize = MVT::getSizeInBits(N2C->getValueType(0)); 456 if (ISD::isSignedIntSetCC(Cond)) { 457 MinVal = 1ULL << (OperandBitSize-1); 458 if (OperandBitSize != 1) // Avoid X >> 64, which is undefined. 459 MaxVal = ~0ULL >> (65-OperandBitSize); 460 else 461 MaxVal = 0; 462 } else { 463 MinVal = 0; 464 MaxVal = ~0ULL >> (64-OperandBitSize); 465 } 466 467 // Canonicalize GE/LE comparisons to use GT/LT comparisons. 468 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) { 469 if (C2 == MinVal) return getConstant(1, VT); // X >= MIN --> true 470 --C2; // X >= C1 --> X > (C1-1) 471 Cond = (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT; 472 N2 = getConstant(C2, N2.getValueType()); 473 N2C = cast<ConstantSDNode>(N2.Val); 474 } 475 476 if (Cond == ISD::SETLE || Cond == ISD::SETULE) { 477 if (C2 == MaxVal) return getConstant(1, VT); // X <= MAX --> true 478 ++C2; // X <= C1 --> X < (C1+1) 479 Cond = (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT; 480 N2 = getConstant(C2, N2.getValueType()); 481 N2C = cast<ConstantSDNode>(N2.Val); 482 } 483 484 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal) 485 return getConstant(0, VT); // X < MIN --> false 486 487 // Canonicalize setgt X, Min --> setne X, Min 488 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MinVal) 489 return getSetCC(ISD::SETNE, VT, N1, N2); 490 491 // If we have setult X, 1, turn it into seteq X, 0 492 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal+1) 493 return getSetCC(ISD::SETEQ, VT, N1, 494 getConstant(MinVal, N1.getValueType())); 495 // If we have setugt X, Max-1, turn it into seteq X, Max 496 else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MaxVal-1) 497 return getSetCC(ISD::SETEQ, VT, N1, 498 getConstant(MaxVal, N1.getValueType())); 499 500 // If we have "setcc X, C1", check to see if we can shrink the immediate 501 // by changing cc. 502 503 // SETUGT X, SINTMAX -> SETLT X, 0 504 if (Cond == ISD::SETUGT && OperandBitSize != 1 && 505 C2 == (~0ULL >> (65-OperandBitSize))) 506 return getSetCC(ISD::SETLT, VT, N1, getConstant(0, N2.getValueType())); 507 508 // FIXME: Implement the rest of these. 509 510 } 511 } else if (isa<ConstantSDNode>(N1.Val)) { 512 // Ensure that the constant occurs on the RHS. 513 return getSetCC(ISD::getSetCCSwappedOperands(Cond), VT, N2, N1); 514 } 515 516 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) 517 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) { 518 double C1 = N1C->getValue(), C2 = N2C->getValue(); 519 520 switch (Cond) { 521 default: break; // FIXME: Implement the rest of these! 522 case ISD::SETEQ: return getConstant(C1 == C2, VT); 523 case ISD::SETNE: return getConstant(C1 != C2, VT); 524 case ISD::SETLT: return getConstant(C1 < C2, VT); 525 case ISD::SETGT: return getConstant(C1 > C2, VT); 526 case ISD::SETLE: return getConstant(C1 <= C2, VT); 527 case ISD::SETGE: return getConstant(C1 >= C2, VT); 528 } 529 } else { 530 // Ensure that the constant occurs on the RHS. 531 Cond = ISD::getSetCCSwappedOperands(Cond); 532 std::swap(N1, N2); 533 } 534 535 if (N1 == N2) { 536 // We can always fold X == Y for integer setcc's. 537 if (MVT::isInteger(N1.getValueType())) 538 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 539 unsigned UOF = ISD::getUnorderedFlavor(Cond); 540 if (UOF == 2) // FP operators that are undefined on NaNs. 541 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 542 if (UOF == ISD::isTrueWhenEqual(Cond)) 543 return getConstant(UOF, VT); 544 // Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO 545 // if it is not already. 546 Cond = UOF == 0 ? ISD::SETUO : ISD::SETO; 547 } 548 549 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && 550 MVT::isInteger(N1.getValueType())) { 551 if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB || 552 N1.getOpcode() == ISD::XOR) { 553 // Simplify (X+Y) == (X+Z) --> Y == Z 554 if (N1.getOpcode() == N2.getOpcode()) { 555 if (N1.getOperand(0) == N2.getOperand(0)) 556 return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(1)); 557 if (N1.getOperand(1) == N2.getOperand(1)) 558 return getSetCC(Cond, VT, N1.getOperand(0), N2.getOperand(0)); 559 if (isCommutativeBinOp(N1.getOpcode())) { 560 // If X op Y == Y op X, try other combinations. 561 if (N1.getOperand(0) == N2.getOperand(1)) 562 return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(0)); 563 if (N1.getOperand(1) == N2.getOperand(0)) 564 return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(1)); 565 } 566 } 567 568 // FIXME: move this stuff to the DAG Combiner when it exists! 569 570 // Simplify (X+Z) == X --> Z == 0 571 if (N1.getOperand(0) == N2) 572 return getSetCC(Cond, VT, N1.getOperand(1), 573 getConstant(0, N1.getValueType())); 574 if (N1.getOperand(1) == N2) { 575 if (isCommutativeBinOp(N1.getOpcode())) 576 return getSetCC(Cond, VT, N1.getOperand(0), 577 getConstant(0, N1.getValueType())); 578 else { 579 assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!"); 580 // (Z-X) == X --> Z == X<<1 581 return getSetCC(Cond, VT, N1.getOperand(0), 582 getNode(ISD::SHL, N2.getValueType(), 583 N2, getConstant(1, TLI.getShiftAmountTy()))); 584 } 585 } 586 } 587 588 if (N2.getOpcode() == ISD::ADD || N2.getOpcode() == ISD::SUB || 589 N2.getOpcode() == ISD::XOR) { 590 // Simplify X == (X+Z) --> Z == 0 591 if (N2.getOperand(0) == N1) 592 return getSetCC(Cond, VT, N2.getOperand(1), 593 getConstant(0, N2.getValueType())); 594 else if (N2.getOperand(1) == N1) 595 return getSetCC(Cond, VT, N2.getOperand(0), 596 getConstant(0, N2.getValueType())); 597 } 598 } 599 600 SetCCSDNode *&N = SetCCs[std::make_pair(std::make_pair(N1, N2), 601 std::make_pair(Cond, VT))]; 602 if (N) return SDOperand(N, 0); 603 N = new SetCCSDNode(Cond, N1, N2); 604 N->setValueTypes(VT); 605 AllNodes.push_back(N); 606 return SDOperand(N, 0); 607} 608 609 610 611/// getNode - Gets or creates the specified node. 612/// 613SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) { 614 SDNode *N = new SDNode(Opcode, VT); 615 AllNodes.push_back(N); 616 return SDOperand(N, 0); 617} 618 619SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 620 SDOperand Operand) { 621 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) { 622 uint64_t Val = C->getValue(); 623 switch (Opcode) { 624 default: break; 625 case ISD::SIGN_EXTEND: return getConstant(C->getSignExtended(), VT); 626 case ISD::ZERO_EXTEND: return getConstant(Val, VT); 627 case ISD::TRUNCATE: return getConstant(Val, VT); 628 case ISD::SINT_TO_FP: return getConstantFP(C->getSignExtended(), VT); 629 case ISD::UINT_TO_FP: return getConstantFP(C->getValue(), VT); 630 } 631 } 632 633 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val)) 634 switch (Opcode) { 635 case ISD::FNEG: 636 return getConstantFP(-C->getValue(), VT); 637 case ISD::FP_ROUND: 638 case ISD::FP_EXTEND: 639 return getConstantFP(C->getValue(), VT); 640 case ISD::FP_TO_SINT: 641 return getConstant((int64_t)C->getValue(), VT); 642 case ISD::FP_TO_UINT: 643 return getConstant((uint64_t)C->getValue(), VT); 644 } 645 646 unsigned OpOpcode = Operand.Val->getOpcode(); 647 switch (Opcode) { 648 case ISD::TokenFactor: 649 return Operand; // Factor of one node? No factor. 650 case ISD::SIGN_EXTEND: 651 if (Operand.getValueType() == VT) return Operand; // noop extension 652 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 653 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 654 break; 655 case ISD::ZERO_EXTEND: 656 if (Operand.getValueType() == VT) return Operand; // noop extension 657 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 658 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0)); 659 break; 660 case ISD::TRUNCATE: 661 if (Operand.getValueType() == VT) return Operand; // noop truncate 662 if (OpOpcode == ISD::TRUNCATE) 663 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 664 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) { 665 // If the source is smaller than the dest, we still need an extend. 666 if (Operand.Val->getOperand(0).getValueType() < VT) 667 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 668 else if (Operand.Val->getOperand(0).getValueType() > VT) 669 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 670 else 671 return Operand.Val->getOperand(0); 672 } 673 break; 674 case ISD::FNEG: 675 if (OpOpcode == ISD::SUB) // -(X-Y) -> (Y-X) 676 return getNode(ISD::SUB, VT, Operand.Val->getOperand(1), 677 Operand.Val->getOperand(0)); 678 if (OpOpcode == ISD::FNEG) // --X -> X 679 return Operand.Val->getOperand(0); 680 break; 681 case ISD::FABS: 682 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 683 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0)); 684 break; 685 } 686 687 SDNode *&N = UnaryOps[std::make_pair(Opcode, std::make_pair(Operand, VT))]; 688 if (N) return SDOperand(N, 0); 689 N = new SDNode(Opcode, Operand); 690 N->setValueTypes(VT); 691 AllNodes.push_back(N); 692 return SDOperand(N, 0); 693} 694 695/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 696/// this predicate to simplify operations downstream. V and Mask are known to 697/// be the same type. 698static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask, 699 const TargetLowering &TLI) { 700 unsigned SrcBits; 701 if (Mask == 0) return true; 702 703 // If we know the result of a setcc has the top bits zero, use this info. 704 switch (Op.getOpcode()) { 705 case ISD::UNDEF: 706 return true; 707 case ISD::Constant: 708 return (cast<ConstantSDNode>(Op)->getValue() & Mask) == 0; 709 710 case ISD::SETCC: 711 return ((Mask & 1) == 0) && 712 TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult; 713 714 case ISD::ZEXTLOAD: 715 SrcBits = MVT::getSizeInBits(cast<MVTSDNode>(Op)->getExtraValueType()); 716 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits. 717 case ISD::ZERO_EXTEND: 718 SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType()); 719 return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI); 720 721 case ISD::AND: 722 // (X & C1) & C2 == 0 iff C1 & C2 == 0. 723 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 724 return MaskedValueIsZero(Op.getOperand(0),AndRHS->getValue() & Mask, TLI); 725 726 // FALL THROUGH 727 case ISD::OR: 728 case ISD::XOR: 729 return MaskedValueIsZero(Op.getOperand(0), Mask, TLI) && 730 MaskedValueIsZero(Op.getOperand(1), Mask, TLI); 731 case ISD::SELECT: 732 return MaskedValueIsZero(Op.getOperand(1), Mask, TLI) && 733 MaskedValueIsZero(Op.getOperand(2), Mask, TLI); 734 735 // TODO: (shl X, C1) & C2 == 0 iff (-1 << C1) & C2 == 0 736 // TODO: (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 737 default: break; 738 } 739 740 return false; 741} 742 743 744 745SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 746 SDOperand N1, SDOperand N2) { 747#ifndef NDEBUG 748 switch (Opcode) { 749 case ISD::TokenFactor: 750 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 751 N2.getValueType() == MVT::Other && "Invalid token factor!"); 752 break; 753 case ISD::AND: 754 case ISD::OR: 755 case ISD::XOR: 756 case ISD::UDIV: 757 case ISD::UREM: 758 assert(MVT::isInteger(VT) && "This operator does not apply to FP types!"); 759 // fall through 760 case ISD::ADD: 761 case ISD::SUB: 762 case ISD::MUL: 763 case ISD::SDIV: 764 case ISD::SREM: 765 assert(N1.getValueType() == N2.getValueType() && 766 N1.getValueType() == VT && "Binary operator types must match!"); 767 break; 768 769 case ISD::SHL: 770 case ISD::SRA: 771 case ISD::SRL: 772 assert(VT == N1.getValueType() && 773 "Shift operators return type must be the same as their first arg"); 774 assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) && 775 VT != MVT::i1 && "Shifts only work on integers"); 776 break; 777 default: break; 778 } 779#endif 780 781 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 782 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 783 if (N1C) { 784 if (N2C) { 785 uint64_t C1 = N1C->getValue(), C2 = N2C->getValue(); 786 switch (Opcode) { 787 case ISD::ADD: return getConstant(C1 + C2, VT); 788 case ISD::SUB: return getConstant(C1 - C2, VT); 789 case ISD::MUL: return getConstant(C1 * C2, VT); 790 case ISD::UDIV: 791 if (C2) return getConstant(C1 / C2, VT); 792 break; 793 case ISD::UREM : 794 if (C2) return getConstant(C1 % C2, VT); 795 break; 796 case ISD::SDIV : 797 if (C2) return getConstant(N1C->getSignExtended() / 798 N2C->getSignExtended(), VT); 799 break; 800 case ISD::SREM : 801 if (C2) return getConstant(N1C->getSignExtended() % 802 N2C->getSignExtended(), VT); 803 break; 804 case ISD::AND : return getConstant(C1 & C2, VT); 805 case ISD::OR : return getConstant(C1 | C2, VT); 806 case ISD::XOR : return getConstant(C1 ^ C2, VT); 807 case ISD::SHL : return getConstant(C1 << (int)C2, VT); 808 case ISD::SRL : return getConstant(C1 >> (unsigned)C2, VT); 809 case ISD::SRA : return getConstant(N1C->getSignExtended() >>(int)C2, VT); 810 default: break; 811 } 812 813 } else { // Cannonicalize constant to RHS if commutative 814 if (isCommutativeBinOp(Opcode)) { 815 std::swap(N1C, N2C); 816 std::swap(N1, N2); 817 } 818 } 819 820 switch (Opcode) { 821 default: break; 822 case ISD::SHL: // shl 0, X -> 0 823 if (N1C->isNullValue()) return N1; 824 break; 825 case ISD::SRL: // srl 0, X -> 0 826 if (N1C->isNullValue()) return N1; 827 break; 828 case ISD::SRA: // sra -1, X -> -1 829 if (N1C->isAllOnesValue()) return N1; 830 break; 831 } 832 } 833 834 if (N2C) { 835 uint64_t C2 = N2C->getValue(); 836 837 switch (Opcode) { 838 case ISD::ADD: 839 if (!C2) return N1; // add X, 0 -> X 840 break; 841 case ISD::SUB: 842 if (!C2) return N1; // sub X, 0 -> X 843 break; 844 case ISD::MUL: 845 if (!C2) return N2; // mul X, 0 -> 0 846 if (N2C->isAllOnesValue()) // mul X, -1 -> 0-X 847 return getNode(ISD::SUB, VT, getConstant(0, VT), N1); 848 849 // FIXME: Move this to the DAG combiner when it exists. 850 if ((C2 & C2-1) == 0) { 851 SDOperand ShAmt = getConstant(ExactLog2(C2), TLI.getShiftAmountTy()); 852 return getNode(ISD::SHL, VT, N1, ShAmt); 853 } 854 break; 855 856 case ISD::UDIV: 857 // FIXME: Move this to the DAG combiner when it exists. 858 if ((C2 & C2-1) == 0 && C2) { 859 SDOperand ShAmt = getConstant(ExactLog2(C2), TLI.getShiftAmountTy()); 860 return getNode(ISD::SRL, VT, N1, ShAmt); 861 } 862 break; 863 864 case ISD::SHL: 865 case ISD::SRL: 866 case ISD::SRA: 867 // If the shift amount is bigger than the size of the data, then all the 868 // bits are shifted out. Simplify to undef. 869 if (C2 >= MVT::getSizeInBits(N1.getValueType())) { 870 return getNode(ISD::UNDEF, N1.getValueType()); 871 } 872 if (C2 == 0) return N1; 873 break; 874 875 case ISD::AND: 876 if (!C2) return N2; // X and 0 -> 0 877 if (N2C->isAllOnesValue()) 878 return N1; // X and -1 -> X 879 880 if (MaskedValueIsZero(N1, C2, TLI)) // X and 0 -> 0 881 return getConstant(0, VT); 882 883 if (MaskedValueIsZero(N1, ~C2, TLI)) 884 return N1; // if (X & ~C2) -> 0, the and is redundant 885 886 // FIXME: Should add a corresponding version of this for 887 // ZERO_EXTEND/SIGN_EXTEND by converting them to an ANY_EXTEND node which 888 // we don't have yet. 889 890 // and (sign_extend_inreg x:16:32), 1 -> and x, 1 891 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) { 892 // If we are masking out the part of our input that was extended, just 893 // mask the input to the extension directly. 894 unsigned ExtendBits = 895 MVT::getSizeInBits(cast<MVTSDNode>(N1)->getExtraValueType()); 896 if ((C2 & (~0ULL << ExtendBits)) == 0) 897 return getNode(ISD::AND, VT, N1.getOperand(0), N2); 898 } 899 break; 900 case ISD::OR: 901 if (!C2)return N1; // X or 0 -> X 902 if (N2C->isAllOnesValue()) 903 return N2; // X or -1 -> -1 904 break; 905 case ISD::XOR: 906 if (!C2) return N1; // X xor 0 -> X 907 if (N2C->isAllOnesValue()) { 908 if (SetCCSDNode *SetCC = dyn_cast<SetCCSDNode>(N1.Val)){ 909 // !(X op Y) -> (X !op Y) 910 bool isInteger = MVT::isInteger(SetCC->getOperand(0).getValueType()); 911 return getSetCC(ISD::getSetCCInverse(SetCC->getCondition(),isInteger), 912 SetCC->getValueType(0), 913 SetCC->getOperand(0), SetCC->getOperand(1)); 914 } else if (N1.getOpcode() == ISD::AND || N1.getOpcode() == ISD::OR) { 915 SDNode *Op = N1.Val; 916 // !(X or Y) -> (!X and !Y) iff X or Y are freely invertible 917 // !(X and Y) -> (!X or !Y) iff X or Y are freely invertible 918 SDOperand LHS = Op->getOperand(0), RHS = Op->getOperand(1); 919 if (isInvertibleForFree(RHS) || isInvertibleForFree(LHS)) { 920 LHS = getNode(ISD::XOR, VT, LHS, N2); // RHS = ~LHS 921 RHS = getNode(ISD::XOR, VT, RHS, N2); // RHS = ~RHS 922 if (Op->getOpcode() == ISD::AND) 923 return getNode(ISD::OR, VT, LHS, RHS); 924 return getNode(ISD::AND, VT, LHS, RHS); 925 } 926 } 927 // X xor -1 -> not(x) ? 928 } 929 break; 930 } 931 932 // Reassociate ((X op C1) op C2) if possible. 933 if (N1.getOpcode() == Opcode && isAssociativeBinOp(Opcode)) 934 if (ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N1.Val->getOperand(1))) 935 return getNode(Opcode, VT, N1.Val->getOperand(0), 936 getNode(Opcode, VT, N2, N1.Val->getOperand(1))); 937 } 938 939 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val); 940 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val); 941 if (N1CFP) 942 if (N2CFP) { 943 double C1 = N1CFP->getValue(), C2 = N2CFP->getValue(); 944 switch (Opcode) { 945 case ISD::ADD: return getConstantFP(C1 + C2, VT); 946 case ISD::SUB: return getConstantFP(C1 - C2, VT); 947 case ISD::MUL: return getConstantFP(C1 * C2, VT); 948 case ISD::SDIV: 949 if (C2) return getConstantFP(C1 / C2, VT); 950 break; 951 case ISD::SREM : 952 if (C2) return getConstantFP(fmod(C1, C2), VT); 953 break; 954 default: break; 955 } 956 957 } else { // Cannonicalize constant to RHS if commutative 958 if (isCommutativeBinOp(Opcode)) { 959 std::swap(N1CFP, N2CFP); 960 std::swap(N1, N2); 961 } 962 } 963 964 // Finally, fold operations that do not require constants. 965 switch (Opcode) { 966 case ISD::TokenFactor: 967 if (N1.getOpcode() == ISD::EntryToken) 968 return N2; 969 if (N2.getOpcode() == ISD::EntryToken) 970 return N1; 971 break; 972 973 case ISD::AND: 974 case ISD::OR: 975 if (SetCCSDNode *LHS = dyn_cast<SetCCSDNode>(N1.Val)) 976 if (SetCCSDNode *RHS = dyn_cast<SetCCSDNode>(N2.Val)) { 977 SDOperand LL = LHS->getOperand(0), RL = RHS->getOperand(0); 978 SDOperand LR = LHS->getOperand(1), RR = RHS->getOperand(1); 979 ISD::CondCode Op2 = RHS->getCondition(); 980 981 // (X != 0) | (Y != 0) -> (X|Y != 0) 982 // (X == 0) & (Y == 0) -> (X|Y == 0) 983 if (LR == RR && isa<ConstantSDNode>(LR) && 984 cast<ConstantSDNode>(LR)->getValue() == 0 && 985 Op2 == LHS->getCondition() && MVT::isInteger(LL.getValueType())) { 986 if ((Op2 == ISD::SETEQ && Opcode == ISD::AND) || 987 (Op2 == ISD::SETNE && Opcode == ISD::OR)) 988 return getSetCC(Op2, VT, 989 getNode(ISD::OR, LR.getValueType(), LL, RL), LR); 990 } 991 992 // (X op1 Y) | (Y op2 X) -> (X op1 Y) | (X swapop2 Y) 993 if (LL == RR && LR == RL) { 994 Op2 = ISD::getSetCCSwappedOperands(Op2); 995 goto MatchedBackwards; 996 } 997 998 if (LL == RL && LR == RR) { 999 MatchedBackwards: 1000 ISD::CondCode Result; 1001 bool isInteger = MVT::isInteger(LL.getValueType()); 1002 if (Opcode == ISD::OR) 1003 Result = ISD::getSetCCOrOperation(LHS->getCondition(), Op2, 1004 isInteger); 1005 else 1006 Result = ISD::getSetCCAndOperation(LHS->getCondition(), Op2, 1007 isInteger); 1008 if (Result != ISD::SETCC_INVALID) 1009 return getSetCC(Result, LHS->getValueType(0), LL, LR); 1010 } 1011 } 1012 1013 // and/or zext(a), zext(b) -> zext(and/or a, b) 1014 if (N1.getOpcode() == ISD::ZERO_EXTEND && 1015 N2.getOpcode() == ISD::ZERO_EXTEND && 1016 N1.getOperand(0).getValueType() == N2.getOperand(0).getValueType()) 1017 return getNode(ISD::ZERO_EXTEND, VT, 1018 getNode(Opcode, N1.getOperand(0).getValueType(), 1019 N1.getOperand(0), N2.getOperand(0))); 1020 break; 1021 case ISD::XOR: 1022 if (N1 == N2) return getConstant(0, VT); // xor X, Y -> 0 1023 break; 1024 case ISD::ADD: 1025 if (N2.getOpcode() == ISD::FNEG) // (A+ (-B) -> A-B 1026 return getNode(ISD::SUB, VT, N1, N2.getOperand(0)); 1027 if (N1.getOpcode() == ISD::FNEG) // ((-A)+B) -> B-A 1028 return getNode(ISD::SUB, VT, N2, N1.getOperand(0)); 1029 if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) && 1030 cast<ConstantSDNode>(N1.getOperand(0))->getValue() == 0) 1031 return getNode(ISD::SUB, VT, N2, N1.getOperand(1)); // (0-A)+B -> B-A 1032 if (N2.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N2.getOperand(0)) && 1033 cast<ConstantSDNode>(N2.getOperand(0))->getValue() == 0) 1034 return getNode(ISD::SUB, VT, N1, N2.getOperand(1)); // A+(0-B) -> A-B 1035 break; 1036 case ISD::SUB: 1037 if (N1.getOpcode() == ISD::ADD) { 1038 if (N1.Val->getOperand(0) == N2) 1039 return N1.Val->getOperand(1); // (A+B)-A == B 1040 if (N1.Val->getOperand(1) == N2) 1041 return N1.Val->getOperand(0); // (A+B)-B == A 1042 } 1043 if (N2.getOpcode() == ISD::FNEG) // (A- (-B) -> A+B 1044 return getNode(ISD::ADD, VT, N1, N2.getOperand(0)); 1045 break; 1046 // FIXME: figure out how to safely handle things like 1047 // int foo(int x) { return 1 << (x & 255); } 1048 // int bar() { return foo(256); } 1049#if 0 1050 case ISD::SHL: 1051 case ISD::SRL: 1052 case ISD::SRA: 1053 if (N2.getOpcode() == ISD::SIGN_EXTEND_INREG && 1054 cast<MVTSDNode>(N2)->getExtraValueType() != MVT::i1) 1055 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1056 else if (N2.getOpcode() == ISD::AND) 1057 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N2.getOperand(1))) { 1058 // If the and is only masking out bits that cannot effect the shift, 1059 // eliminate the and. 1060 unsigned NumBits = MVT::getSizeInBits(VT); 1061 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 1062 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1063 } 1064 break; 1065#endif 1066 } 1067 1068 SDNode *&N = BinaryOps[std::make_pair(Opcode, std::make_pair(N1, N2))]; 1069 if (N) return SDOperand(N, 0); 1070 N = new SDNode(Opcode, N1, N2); 1071 N->setValueTypes(VT); 1072 1073 AllNodes.push_back(N); 1074 return SDOperand(N, 0); 1075} 1076 1077SDOperand SelectionDAG::getLoad(MVT::ValueType VT, 1078 SDOperand Chain, SDOperand Ptr) { 1079 SDNode *&N = Loads[std::make_pair(Ptr, std::make_pair(Chain, VT))]; 1080 if (N) return SDOperand(N, 0); 1081 N = new SDNode(ISD::LOAD, Chain, Ptr); 1082 1083 // Loads have a token chain. 1084 N->setValueTypes(VT, MVT::Other); 1085 AllNodes.push_back(N); 1086 return SDOperand(N, 0); 1087} 1088 1089 1090SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1091 SDOperand N1, SDOperand N2, SDOperand N3) { 1092 // Perform various simplifications. 1093 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 1094 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 1095 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val); 1096 switch (Opcode) { 1097 case ISD::SELECT: 1098 if (N1C) 1099 if (N1C->getValue()) 1100 return N2; // select true, X, Y -> X 1101 else 1102 return N3; // select false, X, Y -> Y 1103 1104 if (N2 == N3) return N2; // select C, X, X -> X 1105 1106 if (VT == MVT::i1) { // Boolean SELECT 1107 if (N2C) { 1108 if (N2C->getValue()) // select C, 1, X -> C | X 1109 return getNode(ISD::OR, VT, N1, N3); 1110 else // select C, 0, X -> ~C & X 1111 return getNode(ISD::AND, VT, 1112 getNode(ISD::XOR, N1.getValueType(), N1, 1113 getConstant(1, N1.getValueType())), N3); 1114 } else if (N3C) { 1115 if (N3C->getValue()) // select C, X, 1 -> ~C | X 1116 return getNode(ISD::OR, VT, 1117 getNode(ISD::XOR, N1.getValueType(), N1, 1118 getConstant(1, N1.getValueType())), N2); 1119 else // select C, X, 0 -> C & X 1120 return getNode(ISD::AND, VT, N1, N2); 1121 } 1122 1123 if (N1 == N2) // X ? X : Y --> X ? 1 : Y --> X | Y 1124 return getNode(ISD::OR, VT, N1, N3); 1125 if (N1 == N3) // X ? Y : X --> X ? Y : 0 --> X & Y 1126 return getNode(ISD::AND, VT, N1, N2); 1127 } 1128 1129 // If this is a selectcc, check to see if we can simplify the result. 1130 if (SetCCSDNode *SetCC = dyn_cast<SetCCSDNode>(N1)) { 1131 if (ConstantFPSDNode *CFP = 1132 dyn_cast<ConstantFPSDNode>(SetCC->getOperand(1))) 1133 if (CFP->getValue() == 0.0) { // Allow either -0.0 or 0.0 1134 // select (setg[te] X, +/-0.0), X, fneg(X) -> fabs 1135 if ((SetCC->getCondition() == ISD::SETGE || 1136 SetCC->getCondition() == ISD::SETGT) && 1137 N2 == SetCC->getOperand(0) && N3.getOpcode() == ISD::FNEG && 1138 N3.getOperand(0) == N2) 1139 return getNode(ISD::FABS, VT, N2); 1140 1141 // select (setl[te] X, +/-0.0), fneg(X), X -> fabs 1142 if ((SetCC->getCondition() == ISD::SETLT || 1143 SetCC->getCondition() == ISD::SETLE) && 1144 N3 == SetCC->getOperand(0) && N2.getOpcode() == ISD::FNEG && 1145 N2.getOperand(0) == N3) 1146 return getNode(ISD::FABS, VT, N3); 1147 } 1148 // select (setlt X, 0), A, 0 -> and (sra X, size(X)-1, A) 1149 if (ConstantSDNode *CN = 1150 dyn_cast<ConstantSDNode>(SetCC->getOperand(1))) 1151 if (CN->getValue() == 0 && N3C && N3C->getValue() == 0) 1152 if (SetCC->getCondition() == ISD::SETLT) { 1153 MVT::ValueType XType = SetCC->getOperand(0).getValueType(); 1154 MVT::ValueType AType = N2.getValueType(); 1155 if (XType >= AType) { 1156 SDOperand Shift = getNode(ISD::SRA, XType, SetCC->getOperand(0), 1157 getConstant(MVT::getSizeInBits(XType)-1, 1158 TLI.getShiftAmountTy())); 1159 if (XType > AType) 1160 Shift = getNode(ISD::TRUNCATE, AType, Shift); 1161 return getNode(ISD::AND, AType, Shift, N2); 1162 } 1163 } 1164 } 1165 break; 1166 case ISD::BRCOND: 1167 if (N2C) 1168 if (N2C->getValue()) // Unconditional branch 1169 return getNode(ISD::BR, MVT::Other, N1, N3); 1170 else 1171 return N1; // Never-taken branch 1172 break; 1173 // FIXME: figure out how to safely handle things like 1174 // int foo(int x) { return 1 << (x & 255); } 1175 // int bar() { return foo(256); } 1176#if 0 1177 case ISD::SRA_PARTS: 1178 case ISD::SRL_PARTS: 1179 case ISD::SHL_PARTS: 1180 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 1181 cast<MVTSDNode>(N3)->getExtraValueType() != MVT::i1) 1182 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 1183 else if (N3.getOpcode() == ISD::AND) 1184 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 1185 // If the and is only masking out bits that cannot effect the shift, 1186 // eliminate the and. 1187 unsigned NumBits = MVT::getSizeInBits(VT)*2; 1188 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 1189 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 1190 } 1191 break; 1192#endif 1193 } 1194 1195 SDNode *N = new SDNode(Opcode, N1, N2, N3); 1196 switch (Opcode) { 1197 default: 1198 N->setValueTypes(VT); 1199 break; 1200 case ISD::DYNAMIC_STACKALLOC: // DYNAMIC_STACKALLOC produces pointer and chain 1201 N->setValueTypes(VT, MVT::Other); 1202 break; 1203 1204 case ISD::SRA_PARTS: 1205 case ISD::SRL_PARTS: 1206 case ISD::SHL_PARTS: { 1207 std::vector<MVT::ValueType> V(N->getNumOperands()-1, VT); 1208 N->setValueTypes(V); 1209 break; 1210 } 1211 } 1212 1213 // FIXME: memoize NODES 1214 AllNodes.push_back(N); 1215 return SDOperand(N, 0); 1216} 1217 1218SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1219 std::vector<SDOperand> &Children) { 1220 switch (Children.size()) { 1221 case 0: return getNode(Opcode, VT); 1222 case 1: return getNode(Opcode, VT, Children[0]); 1223 case 2: return getNode(Opcode, VT, Children[0], Children[1]); 1224 case 3: return getNode(Opcode, VT, Children[0], Children[1], Children[2]); 1225 default: break; 1226 } 1227 1228 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(Children[1].Val); 1229 switch (Opcode) { 1230 default: break; 1231 case ISD::BRCONDTWOWAY: 1232 if (N1C) 1233 if (N1C->getValue()) // Unconditional branch to true dest. 1234 return getNode(ISD::BR, MVT::Other, Children[0], Children[2]); 1235 else // Unconditional branch to false dest. 1236 return getNode(ISD::BR, MVT::Other, Children[0], Children[3]); 1237 break; 1238 } 1239 1240 // FIXME: MEMOIZE!! 1241 SDNode *N = new SDNode(Opcode, Children); 1242 if (Opcode != ISD::ADD_PARTS && Opcode != ISD::SUB_PARTS) { 1243 N->setValueTypes(VT); 1244 } else { 1245 std::vector<MVT::ValueType> V(N->getNumOperands()/2, VT); 1246 N->setValueTypes(V); 1247 } 1248 AllNodes.push_back(N); 1249 return SDOperand(N, 0); 1250} 1251 1252SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1, 1253 MVT::ValueType EVT) { 1254 1255 switch (Opcode) { 1256 default: assert(0 && "Bad opcode for this accessor!"); 1257 case ISD::FP_ROUND_INREG: 1258 assert(VT == N1.getValueType() && "Not an inreg round!"); 1259 assert(MVT::isFloatingPoint(VT) && MVT::isFloatingPoint(EVT) && 1260 "Cannot FP_ROUND_INREG integer types"); 1261 if (EVT == VT) return N1; // Not actually rounding 1262 assert(EVT < VT && "Not rounding down!"); 1263 1264 if (isa<ConstantFPSDNode>(N1)) 1265 return getNode(ISD::FP_EXTEND, VT, getNode(ISD::FP_ROUND, EVT, N1)); 1266 break; 1267 case ISD::SIGN_EXTEND_INREG: 1268 assert(VT == N1.getValueType() && "Not an inreg extend!"); 1269 assert(MVT::isInteger(VT) && MVT::isInteger(EVT) && 1270 "Cannot *_EXTEND_INREG FP types"); 1271 if (EVT == VT) return N1; // Not actually extending 1272 assert(EVT < VT && "Not extending!"); 1273 1274 // Extending a constant? Just return the extended constant. 1275 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 1276 SDOperand Tmp = getNode(ISD::TRUNCATE, EVT, N1); 1277 return getNode(ISD::SIGN_EXTEND, VT, Tmp); 1278 } 1279 1280 // If we are sign extending an extension, use the original source. 1281 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) 1282 if (cast<MVTSDNode>(N1)->getExtraValueType() <= EVT) 1283 return N1; 1284 1285 // If we are sign extending a sextload, return just the load. 1286 if (N1.getOpcode() == ISD::SEXTLOAD && Opcode == ISD::SIGN_EXTEND_INREG) 1287 if (cast<MVTSDNode>(N1)->getExtraValueType() <= EVT) 1288 return N1; 1289 1290 // If we are extending the result of a setcc, and we already know the 1291 // contents of the top bits, eliminate the extension. 1292 if (N1.getOpcode() == ISD::SETCC && 1293 TLI.getSetCCResultContents() == 1294 TargetLowering::ZeroOrNegativeOneSetCCResult) 1295 return N1; 1296 1297 // If we are sign extending the result of an (and X, C) operation, and we 1298 // know the extended bits are zeros already, don't do the extend. 1299 if (N1.getOpcode() == ISD::AND) 1300 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 1301 uint64_t Mask = N1C->getValue(); 1302 unsigned NumBits = MVT::getSizeInBits(EVT); 1303 if ((Mask & (~0ULL << (NumBits-1))) == 0) 1304 return N1; 1305 } 1306 break; 1307 } 1308 1309 EVTStruct NN; 1310 NN.Opcode = Opcode; 1311 NN.VT = VT; 1312 NN.EVT = EVT; 1313 NN.Ops.push_back(N1); 1314 1315 SDNode *&N = MVTSDNodes[NN]; 1316 if (N) return SDOperand(N, 0); 1317 N = new MVTSDNode(Opcode, VT, N1, EVT); 1318 AllNodes.push_back(N); 1319 return SDOperand(N, 0); 1320} 1321 1322SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1, 1323 SDOperand N2, MVT::ValueType EVT) { 1324 switch (Opcode) { 1325 default: assert(0 && "Bad opcode for this accessor!"); 1326 case ISD::EXTLOAD: 1327 case ISD::SEXTLOAD: 1328 case ISD::ZEXTLOAD: 1329 // If they are asking for an extending load from/to the same thing, return a 1330 // normal load. 1331 if (VT == EVT) 1332 return getNode(ISD::LOAD, VT, N1, N2); 1333 assert(EVT < VT && "Should only be an extending load, not truncating!"); 1334 assert((Opcode == ISD::EXTLOAD || MVT::isInteger(VT)) && 1335 "Cannot sign/zero extend a FP load!"); 1336 assert(MVT::isInteger(VT) == MVT::isInteger(EVT) && 1337 "Cannot convert from FP to Int or Int -> FP!"); 1338 break; 1339 } 1340 1341 EVTStruct NN; 1342 NN.Opcode = Opcode; 1343 NN.VT = VT; 1344 NN.EVT = EVT; 1345 NN.Ops.push_back(N1); 1346 NN.Ops.push_back(N2); 1347 1348 SDNode *&N = MVTSDNodes[NN]; 1349 if (N) return SDOperand(N, 0); 1350 N = new MVTSDNode(Opcode, VT, MVT::Other, N1, N2, EVT); 1351 AllNodes.push_back(N); 1352 return SDOperand(N, 0); 1353} 1354 1355SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1, 1356 SDOperand N2, SDOperand N3, MVT::ValueType EVT) { 1357 switch (Opcode) { 1358 default: assert(0 && "Bad opcode for this accessor!"); 1359 case ISD::TRUNCSTORE: 1360#if 0 // FIXME: If the target supports EVT natively, convert to a truncate/store 1361 // If this is a truncating store of a constant, convert to the desired type 1362 // and store it instead. 1363 if (isa<Constant>(N1)) { 1364 SDOperand Op = getNode(ISD::TRUNCATE, EVT, N1); 1365 if (isa<Constant>(Op)) 1366 N1 = Op; 1367 } 1368 // Also for ConstantFP? 1369#endif 1370 if (N1.getValueType() == EVT) // Normal store? 1371 return getNode(ISD::STORE, VT, N1, N2, N3); 1372 assert(N2.getValueType() > EVT && "Not a truncation?"); 1373 assert(MVT::isInteger(N2.getValueType()) == MVT::isInteger(EVT) && 1374 "Can't do FP-INT conversion!"); 1375 break; 1376 } 1377 1378 EVTStruct NN; 1379 NN.Opcode = Opcode; 1380 NN.VT = VT; 1381 NN.EVT = EVT; 1382 NN.Ops.push_back(N1); 1383 NN.Ops.push_back(N2); 1384 NN.Ops.push_back(N3); 1385 1386 SDNode *&N = MVTSDNodes[NN]; 1387 if (N) return SDOperand(N, 0); 1388 N = new MVTSDNode(Opcode, VT, N1, N2, N3, EVT); 1389 AllNodes.push_back(N); 1390 return SDOperand(N, 0); 1391} 1392 1393 1394/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 1395/// indicated value. This method ignores uses of other values defined by this 1396/// operation. 1397bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) { 1398 assert(Value < getNumValues() && "Bad value!"); 1399 1400 // If there is only one value, this is easy. 1401 if (getNumValues() == 1) 1402 return use_size() == NUses; 1403 if (Uses.size() < NUses) return false; 1404 1405 SDOperand TheValue(this, Value); 1406 1407 std::set<SDNode*> UsersHandled; 1408 1409 for (std::vector<SDNode*>::iterator UI = Uses.begin(), E = Uses.end(); 1410 UI != E; ++UI) { 1411 SDNode *User = *UI; 1412 if (User->getNumOperands() == 1 || 1413 UsersHandled.insert(User).second) // First time we've seen this? 1414 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) 1415 if (User->getOperand(i) == TheValue) { 1416 if (NUses == 0) 1417 return false; // too many uses 1418 --NUses; 1419 } 1420 } 1421 1422 // Found exactly the right number of uses? 1423 return NUses == 0; 1424} 1425 1426 1427const char *SDNode::getOperationName() const { 1428 switch (getOpcode()) { 1429 default: return "<<Unknown>>"; 1430 case ISD::PCMARKER: return "PCMarker"; 1431 case ISD::EntryToken: return "EntryToken"; 1432 case ISD::TokenFactor: return "TokenFactor"; 1433 case ISD::Constant: return "Constant"; 1434 case ISD::ConstantFP: return "ConstantFP"; 1435 case ISD::GlobalAddress: return "GlobalAddress"; 1436 case ISD::FrameIndex: return "FrameIndex"; 1437 case ISD::BasicBlock: return "BasicBlock"; 1438 case ISD::ExternalSymbol: return "ExternalSymbol"; 1439 case ISD::ConstantPool: return "ConstantPoolIndex"; 1440 case ISD::CopyToReg: return "CopyToReg"; 1441 case ISD::CopyFromReg: return "CopyFromReg"; 1442 case ISD::ImplicitDef: return "ImplicitDef"; 1443 case ISD::UNDEF: return "undef"; 1444 1445 // Unary operators 1446 case ISD::FABS: return "fabs"; 1447 case ISD::FNEG: return "fneg"; 1448 1449 // Binary operators 1450 case ISD::ADD: return "add"; 1451 case ISD::SUB: return "sub"; 1452 case ISD::MUL: return "mul"; 1453 case ISD::MULHU: return "mulhu"; 1454 case ISD::MULHS: return "mulhs"; 1455 case ISD::SDIV: return "sdiv"; 1456 case ISD::UDIV: return "udiv"; 1457 case ISD::SREM: return "srem"; 1458 case ISD::UREM: return "urem"; 1459 case ISD::AND: return "and"; 1460 case ISD::OR: return "or"; 1461 case ISD::XOR: return "xor"; 1462 case ISD::SHL: return "shl"; 1463 case ISD::SRA: return "sra"; 1464 case ISD::SRL: return "srl"; 1465 1466 case ISD::SELECT: return "select"; 1467 case ISD::ADD_PARTS: return "add_parts"; 1468 case ISD::SUB_PARTS: return "sub_parts"; 1469 case ISD::SHL_PARTS: return "shl_parts"; 1470 case ISD::SRA_PARTS: return "sra_parts"; 1471 case ISD::SRL_PARTS: return "srl_parts"; 1472 1473 // Conversion operators. 1474 case ISD::SIGN_EXTEND: return "sign_extend"; 1475 case ISD::ZERO_EXTEND: return "zero_extend"; 1476 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 1477 case ISD::TRUNCATE: return "truncate"; 1478 case ISD::FP_ROUND: return "fp_round"; 1479 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 1480 case ISD::FP_EXTEND: return "fp_extend"; 1481 1482 case ISD::SINT_TO_FP: return "sint_to_fp"; 1483 case ISD::UINT_TO_FP: return "uint_to_fp"; 1484 case ISD::FP_TO_SINT: return "fp_to_sint"; 1485 case ISD::FP_TO_UINT: return "fp_to_uint"; 1486 1487 // Control flow instructions 1488 case ISD::BR: return "br"; 1489 case ISD::BRCOND: return "brcond"; 1490 case ISD::BRCONDTWOWAY: return "brcondtwoway"; 1491 case ISD::RET: return "ret"; 1492 case ISD::CALL: return "call"; 1493 case ISD::ADJCALLSTACKDOWN: return "adjcallstackdown"; 1494 case ISD::ADJCALLSTACKUP: return "adjcallstackup"; 1495 1496 // Other operators 1497 case ISD::LOAD: return "load"; 1498 case ISD::STORE: return "store"; 1499 case ISD::EXTLOAD: return "extload"; 1500 case ISD::SEXTLOAD: return "sextload"; 1501 case ISD::ZEXTLOAD: return "zextload"; 1502 case ISD::TRUNCSTORE: return "truncstore"; 1503 1504 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 1505 case ISD::EXTRACT_ELEMENT: return "extract_element"; 1506 case ISD::BUILD_PAIR: return "build_pair"; 1507 case ISD::MEMSET: return "memset"; 1508 case ISD::MEMCPY: return "memcpy"; 1509 case ISD::MEMMOVE: return "memmove"; 1510 1511 case ISD::SETCC: 1512 const SetCCSDNode *SetCC = cast<SetCCSDNode>(this); 1513 switch (SetCC->getCondition()) { 1514 default: assert(0 && "Unknown setcc condition!"); 1515 case ISD::SETOEQ: return "setcc:setoeq"; 1516 case ISD::SETOGT: return "setcc:setogt"; 1517 case ISD::SETOGE: return "setcc:setoge"; 1518 case ISD::SETOLT: return "setcc:setolt"; 1519 case ISD::SETOLE: return "setcc:setole"; 1520 case ISD::SETONE: return "setcc:setone"; 1521 1522 case ISD::SETO: return "setcc:seto"; 1523 case ISD::SETUO: return "setcc:setuo"; 1524 case ISD::SETUEQ: return "setcc:setue"; 1525 case ISD::SETUGT: return "setcc:setugt"; 1526 case ISD::SETUGE: return "setcc:setuge"; 1527 case ISD::SETULT: return "setcc:setult"; 1528 case ISD::SETULE: return "setcc:setule"; 1529 case ISD::SETUNE: return "setcc:setune"; 1530 1531 case ISD::SETEQ: return "setcc:seteq"; 1532 case ISD::SETGT: return "setcc:setgt"; 1533 case ISD::SETGE: return "setcc:setge"; 1534 case ISD::SETLT: return "setcc:setlt"; 1535 case ISD::SETLE: return "setcc:setle"; 1536 case ISD::SETNE: return "setcc:setne"; 1537 } 1538 } 1539} 1540 1541void SDNode::dump() const { 1542 std::cerr << (void*)this << ": "; 1543 1544 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 1545 if (i) std::cerr << ","; 1546 if (getValueType(i) == MVT::Other) 1547 std::cerr << "ch"; 1548 else 1549 std::cerr << MVT::getValueTypeString(getValueType(i)); 1550 } 1551 std::cerr << " = " << getOperationName(); 1552 1553 std::cerr << " "; 1554 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1555 if (i) std::cerr << ", "; 1556 std::cerr << (void*)getOperand(i).Val; 1557 if (unsigned RN = getOperand(i).ResNo) 1558 std::cerr << ":" << RN; 1559 } 1560 1561 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 1562 std::cerr << "<" << CSDN->getValue() << ">"; 1563 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 1564 std::cerr << "<" << CSDN->getValue() << ">"; 1565 } else if (const GlobalAddressSDNode *GADN = 1566 dyn_cast<GlobalAddressSDNode>(this)) { 1567 std::cerr << "<"; 1568 WriteAsOperand(std::cerr, GADN->getGlobal()) << ">"; 1569 } else if (const FrameIndexSDNode *FIDN = 1570 dyn_cast<FrameIndexSDNode>(this)) { 1571 std::cerr << "<" << FIDN->getIndex() << ">"; 1572 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 1573 std::cerr << "<" << CP->getIndex() << ">"; 1574 } else if (const BasicBlockSDNode *BBDN = 1575 dyn_cast<BasicBlockSDNode>(this)) { 1576 std::cerr << "<"; 1577 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 1578 if (LBB) 1579 std::cerr << LBB->getName() << " "; 1580 std::cerr << (const void*)BBDN->getBasicBlock() << ">"; 1581 } else if (const RegSDNode *C2V = dyn_cast<RegSDNode>(this)) { 1582 std::cerr << "<reg #" << C2V->getReg() << ">"; 1583 } else if (const ExternalSymbolSDNode *ES = 1584 dyn_cast<ExternalSymbolSDNode>(this)) { 1585 std::cerr << "'" << ES->getSymbol() << "'"; 1586 } else if (const MVTSDNode *M = dyn_cast<MVTSDNode>(this)) { 1587 std::cerr << " - Ty = " << MVT::getValueTypeString(M->getExtraValueType()); 1588 } 1589} 1590 1591static void DumpNodes(SDNode *N, unsigned indent) { 1592 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 1593 if (N->getOperand(i).Val->hasOneUse()) 1594 DumpNodes(N->getOperand(i).Val, indent+2); 1595 else 1596 std::cerr << "\n" << std::string(indent+2, ' ') 1597 << (void*)N->getOperand(i).Val << ": <multiple use>"; 1598 1599 1600 std::cerr << "\n" << std::string(indent, ' '); 1601 N->dump(); 1602} 1603 1604void SelectionDAG::dump() const { 1605 std::cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 1606 std::vector<SDNode*> Nodes(AllNodes); 1607 std::sort(Nodes.begin(), Nodes.end()); 1608 1609 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) { 1610 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val) 1611 DumpNodes(Nodes[i], 2); 1612 } 1613 1614 DumpNodes(getRoot().Val, 2); 1615 1616 std::cerr << "\n\n"; 1617} 1618 1619