SelectionDAG.cpp revision 54c94525f420cab274af60e98a77f081f96e59c2
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13#include "llvm/CodeGen/SelectionDAG.h" 14#include "llvm/Constants.h" 15#include "llvm/Analysis/ValueTracking.h" 16#include "llvm/GlobalAlias.h" 17#include "llvm/GlobalVariable.h" 18#include "llvm/Intrinsics.h" 19#include "llvm/DerivedTypes.h" 20#include "llvm/Assembly/Writer.h" 21#include "llvm/CallingConv.h" 22#include "llvm/CodeGen/MachineBasicBlock.h" 23#include "llvm/CodeGen/MachineConstantPool.h" 24#include "llvm/CodeGen/MachineFrameInfo.h" 25#include "llvm/CodeGen/MachineModuleInfo.h" 26#include "llvm/CodeGen/PseudoSourceValue.h" 27#include "llvm/Target/TargetRegisterInfo.h" 28#include "llvm/Target/TargetData.h" 29#include "llvm/Target/TargetLowering.h" 30#include "llvm/Target/TargetOptions.h" 31#include "llvm/Target/TargetInstrInfo.h" 32#include "llvm/Target/TargetMachine.h" 33#include "llvm/Support/CommandLine.h" 34#include "llvm/Support/MathExtras.h" 35#include "llvm/Support/raw_ostream.h" 36#include "llvm/ADT/SetVector.h" 37#include "llvm/ADT/SmallPtrSet.h" 38#include "llvm/ADT/SmallSet.h" 39#include "llvm/ADT/SmallVector.h" 40#include "llvm/ADT/StringExtras.h" 41#include <algorithm> 42#include <cmath> 43using namespace llvm; 44 45/// makeVTList - Return an instance of the SDVTList struct initialized with the 46/// specified members. 47static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) { 48 SDVTList Res = {VTs, NumVTs}; 49 return Res; 50} 51 52static const fltSemantics *MVTToAPFloatSemantics(MVT VT) { 53 switch (VT.getSimpleVT()) { 54 default: assert(0 && "Unknown FP format"); 55 case MVT::f32: return &APFloat::IEEEsingle; 56 case MVT::f64: return &APFloat::IEEEdouble; 57 case MVT::f80: return &APFloat::x87DoubleExtended; 58 case MVT::f128: return &APFloat::IEEEquad; 59 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 60 } 61} 62 63SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 64 65//===----------------------------------------------------------------------===// 66// ConstantFPSDNode Class 67//===----------------------------------------------------------------------===// 68 69/// isExactlyValue - We don't rely on operator== working on double values, as 70/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 71/// As such, this method can be used to do an exact bit-for-bit comparison of 72/// two floating point values. 73bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 74 return getValueAPF().bitwiseIsEqual(V); 75} 76 77bool ConstantFPSDNode::isValueValidForType(MVT VT, 78 const APFloat& Val) { 79 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 80 81 // PPC long double cannot be converted to any other type. 82 if (VT == MVT::ppcf128 || 83 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 84 return false; 85 86 // convert modifies in place, so make a copy. 87 APFloat Val2 = APFloat(Val); 88 bool losesInfo; 89 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 90 &losesInfo); 91 return !losesInfo; 92} 93 94//===----------------------------------------------------------------------===// 95// ISD Namespace 96//===----------------------------------------------------------------------===// 97 98/// isBuildVectorAllOnes - Return true if the specified node is a 99/// BUILD_VECTOR where all of the elements are ~0 or undef. 100bool ISD::isBuildVectorAllOnes(const SDNode *N) { 101 // Look through a bit convert. 102 if (N->getOpcode() == ISD::BIT_CONVERT) 103 N = N->getOperand(0).getNode(); 104 105 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 106 107 unsigned i = 0, e = N->getNumOperands(); 108 109 // Skip over all of the undef values. 110 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 111 ++i; 112 113 // Do not accept an all-undef vector. 114 if (i == e) return false; 115 116 // Do not accept build_vectors that aren't all constants or which have non-~0 117 // elements. 118 SDValue NotZero = N->getOperand(i); 119 if (isa<ConstantSDNode>(NotZero)) { 120 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 121 return false; 122 } else if (isa<ConstantFPSDNode>(NotZero)) { 123 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 124 bitcastToAPInt().isAllOnesValue()) 125 return false; 126 } else 127 return false; 128 129 // Okay, we have at least one ~0 value, check to see if the rest match or are 130 // undefs. 131 for (++i; i != e; ++i) 132 if (N->getOperand(i) != NotZero && 133 N->getOperand(i).getOpcode() != ISD::UNDEF) 134 return false; 135 return true; 136} 137 138 139/// isBuildVectorAllZeros - Return true if the specified node is a 140/// BUILD_VECTOR where all of the elements are 0 or undef. 141bool ISD::isBuildVectorAllZeros(const SDNode *N) { 142 // Look through a bit convert. 143 if (N->getOpcode() == ISD::BIT_CONVERT) 144 N = N->getOperand(0).getNode(); 145 146 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 147 148 unsigned i = 0, e = N->getNumOperands(); 149 150 // Skip over all of the undef values. 151 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 152 ++i; 153 154 // Do not accept an all-undef vector. 155 if (i == e) return false; 156 157 // Do not accept build_vectors that aren't all constants or which have non-~0 158 // elements. 159 SDValue Zero = N->getOperand(i); 160 if (isa<ConstantSDNode>(Zero)) { 161 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 162 return false; 163 } else if (isa<ConstantFPSDNode>(Zero)) { 164 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 165 return false; 166 } else 167 return false; 168 169 // Okay, we have at least one ~0 value, check to see if the rest match or are 170 // undefs. 171 for (++i; i != e; ++i) 172 if (N->getOperand(i) != Zero && 173 N->getOperand(i).getOpcode() != ISD::UNDEF) 174 return false; 175 return true; 176} 177 178/// isScalarToVector - Return true if the specified node is a 179/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 180/// element is not an undef. 181bool ISD::isScalarToVector(const SDNode *N) { 182 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 183 return true; 184 185 if (N->getOpcode() != ISD::BUILD_VECTOR) 186 return false; 187 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 188 return false; 189 unsigned NumElems = N->getNumOperands(); 190 for (unsigned i = 1; i < NumElems; ++i) { 191 SDValue V = N->getOperand(i); 192 if (V.getOpcode() != ISD::UNDEF) 193 return false; 194 } 195 return true; 196} 197 198 199/// isDebugLabel - Return true if the specified node represents a debug 200/// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node). 201bool ISD::isDebugLabel(const SDNode *N) { 202 SDValue Zero; 203 if (N->getOpcode() == ISD::DBG_LABEL) 204 return true; 205 if (N->isMachineOpcode() && 206 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL) 207 return true; 208 return false; 209} 210 211/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 212/// when given the operation for (X op Y). 213ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 214 // To perform this operation, we just need to swap the L and G bits of the 215 // operation. 216 unsigned OldL = (Operation >> 2) & 1; 217 unsigned OldG = (Operation >> 1) & 1; 218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 219 (OldL << 1) | // New G bit 220 (OldG << 2)); // New L bit. 221} 222 223/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 224/// 'op' is a valid SetCC operation. 225ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 226 unsigned Operation = Op; 227 if (isInteger) 228 Operation ^= 7; // Flip L, G, E bits, but not U. 229 else 230 Operation ^= 15; // Flip all of the condition bits. 231 232 if (Operation > ISD::SETTRUE2) 233 Operation &= ~8; // Don't let N and U bits get set. 234 235 return ISD::CondCode(Operation); 236} 237 238 239/// isSignedOp - For an integer comparison, return 1 if the comparison is a 240/// signed operation and 2 if the result is an unsigned comparison. Return zero 241/// if the operation does not depend on the sign of the input (setne and seteq). 242static int isSignedOp(ISD::CondCode Opcode) { 243 switch (Opcode) { 244 default: assert(0 && "Illegal integer setcc operation!"); 245 case ISD::SETEQ: 246 case ISD::SETNE: return 0; 247 case ISD::SETLT: 248 case ISD::SETLE: 249 case ISD::SETGT: 250 case ISD::SETGE: return 1; 251 case ISD::SETULT: 252 case ISD::SETULE: 253 case ISD::SETUGT: 254 case ISD::SETUGE: return 2; 255 } 256} 257 258/// getSetCCOrOperation - Return the result of a logical OR between different 259/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 260/// returns SETCC_INVALID if it is not possible to represent the resultant 261/// comparison. 262ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 263 bool isInteger) { 264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 265 // Cannot fold a signed integer setcc with an unsigned integer setcc. 266 return ISD::SETCC_INVALID; 267 268 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 269 270 // If the N and U bits get set then the resultant comparison DOES suddenly 271 // care about orderedness, and is true when ordered. 272 if (Op > ISD::SETTRUE2) 273 Op &= ~16; // Clear the U bit if the N bit is set. 274 275 // Canonicalize illegal integer setcc's. 276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 277 Op = ISD::SETNE; 278 279 return ISD::CondCode(Op); 280} 281 282/// getSetCCAndOperation - Return the result of a logical AND between different 283/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 284/// function returns zero if it is not possible to represent the resultant 285/// comparison. 286ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 287 bool isInteger) { 288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 289 // Cannot fold a signed setcc with an unsigned setcc. 290 return ISD::SETCC_INVALID; 291 292 // Combine all of the condition bits. 293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 294 295 // Canonicalize illegal integer setcc's. 296 if (isInteger) { 297 switch (Result) { 298 default: break; 299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 300 case ISD::SETOEQ: // SETEQ & SETU[LG]E 301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 304 } 305 } 306 307 return Result; 308} 309 310const TargetMachine &SelectionDAG::getTarget() const { 311 return MF->getTarget(); 312} 313 314//===----------------------------------------------------------------------===// 315// SDNode Profile Support 316//===----------------------------------------------------------------------===// 317 318/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 319/// 320static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 321 ID.AddInteger(OpC); 322} 323 324/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 325/// solely with their pointer. 326static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 327 ID.AddPointer(VTList.VTs); 328} 329 330/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 331/// 332static void AddNodeIDOperands(FoldingSetNodeID &ID, 333 const SDValue *Ops, unsigned NumOps) { 334 for (; NumOps; --NumOps, ++Ops) { 335 ID.AddPointer(Ops->getNode()); 336 ID.AddInteger(Ops->getResNo()); 337 } 338} 339 340/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 341/// 342static void AddNodeIDOperands(FoldingSetNodeID &ID, 343 const SDUse *Ops, unsigned NumOps) { 344 for (; NumOps; --NumOps, ++Ops) { 345 ID.AddPointer(Ops->getNode()); 346 ID.AddInteger(Ops->getResNo()); 347 } 348} 349 350static void AddNodeIDNode(FoldingSetNodeID &ID, 351 unsigned short OpC, SDVTList VTList, 352 const SDValue *OpList, unsigned N) { 353 AddNodeIDOpcode(ID, OpC); 354 AddNodeIDValueTypes(ID, VTList); 355 AddNodeIDOperands(ID, OpList, N); 356} 357 358/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 359/// the NodeID data. 360static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 361 switch (N->getOpcode()) { 362 default: break; // Normal nodes don't need extra info. 363 case ISD::ARG_FLAGS: 364 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits()); 365 break; 366 case ISD::TargetConstant: 367 case ISD::Constant: 368 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 369 break; 370 case ISD::TargetConstantFP: 371 case ISD::ConstantFP: { 372 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 373 break; 374 } 375 case ISD::TargetGlobalAddress: 376 case ISD::GlobalAddress: 377 case ISD::TargetGlobalTLSAddress: 378 case ISD::GlobalTLSAddress: { 379 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 380 ID.AddPointer(GA->getGlobal()); 381 ID.AddInteger(GA->getOffset()); 382 break; 383 } 384 case ISD::BasicBlock: 385 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 386 break; 387 case ISD::Register: 388 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 389 break; 390 case ISD::DBG_STOPPOINT: { 391 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N); 392 ID.AddInteger(DSP->getLine()); 393 ID.AddInteger(DSP->getColumn()); 394 ID.AddPointer(DSP->getCompileUnit()); 395 break; 396 } 397 case ISD::SRCVALUE: 398 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 399 break; 400 case ISD::MEMOPERAND: { 401 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO; 402 MO.Profile(ID); 403 break; 404 } 405 case ISD::FrameIndex: 406 case ISD::TargetFrameIndex: 407 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 408 break; 409 case ISD::JumpTable: 410 case ISD::TargetJumpTable: 411 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 412 break; 413 case ISD::ConstantPool: 414 case ISD::TargetConstantPool: { 415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 416 ID.AddInteger(CP->getAlignment()); 417 ID.AddInteger(CP->getOffset()); 418 if (CP->isMachineConstantPoolEntry()) 419 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 420 else 421 ID.AddPointer(CP->getConstVal()); 422 break; 423 } 424 case ISD::CALL: { 425 const CallSDNode *Call = cast<CallSDNode>(N); 426 ID.AddInteger(Call->getCallingConv()); 427 ID.AddInteger(Call->isVarArg()); 428 break; 429 } 430 case ISD::LOAD: { 431 const LoadSDNode *LD = cast<LoadSDNode>(N); 432 ID.AddInteger(LD->getAddressingMode()); 433 ID.AddInteger(LD->getExtensionType()); 434 ID.AddInteger(LD->getMemoryVT().getRawBits()); 435 ID.AddInteger(LD->getRawFlags()); 436 break; 437 } 438 case ISD::STORE: { 439 const StoreSDNode *ST = cast<StoreSDNode>(N); 440 ID.AddInteger(ST->getAddressingMode()); 441 ID.AddInteger(ST->isTruncatingStore()); 442 ID.AddInteger(ST->getMemoryVT().getRawBits()); 443 ID.AddInteger(ST->getRawFlags()); 444 break; 445 } 446 case ISD::ATOMIC_CMP_SWAP: 447 case ISD::ATOMIC_SWAP: 448 case ISD::ATOMIC_LOAD_ADD: 449 case ISD::ATOMIC_LOAD_SUB: 450 case ISD::ATOMIC_LOAD_AND: 451 case ISD::ATOMIC_LOAD_OR: 452 case ISD::ATOMIC_LOAD_XOR: 453 case ISD::ATOMIC_LOAD_NAND: 454 case ISD::ATOMIC_LOAD_MIN: 455 case ISD::ATOMIC_LOAD_MAX: 456 case ISD::ATOMIC_LOAD_UMIN: 457 case ISD::ATOMIC_LOAD_UMAX: { 458 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 459 ID.AddInteger(AT->getRawFlags()); 460 break; 461 } 462 } // end switch (N->getOpcode()) 463} 464 465/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 466/// data. 467static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 468 AddNodeIDOpcode(ID, N->getOpcode()); 469 // Add the return value info. 470 AddNodeIDValueTypes(ID, N->getVTList()); 471 // Add the operand info. 472 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 473 474 // Handle SDNode leafs with special info. 475 AddNodeIDCustom(ID, N); 476} 477 478/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 479/// the CSE map that carries both alignment and volatility information. 480/// 481static inline unsigned 482encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) { 483 return isVolatile | ((Log2_32(Alignment) + 1) << 1); 484} 485 486//===----------------------------------------------------------------------===// 487// SelectionDAG Class 488//===----------------------------------------------------------------------===// 489 490/// doNotCSE - Return true if CSE should not be performed for this node. 491static bool doNotCSE(SDNode *N) { 492 if (N->getValueType(0) == MVT::Flag) 493 return true; // Never CSE anything that produces a flag. 494 495 switch (N->getOpcode()) { 496 default: break; 497 case ISD::HANDLENODE: 498 case ISD::DBG_LABEL: 499 case ISD::DBG_STOPPOINT: 500 case ISD::EH_LABEL: 501 case ISD::DECLARE: 502 return true; // Never CSE these nodes. 503 } 504 505 // Check that remaining values produced are not flags. 506 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 507 if (N->getValueType(i) == MVT::Flag) 508 return true; // Never CSE anything that produces a flag. 509 510 return false; 511} 512 513/// RemoveDeadNodes - This method deletes all unreachable nodes in the 514/// SelectionDAG. 515void SelectionDAG::RemoveDeadNodes() { 516 // Create a dummy node (which is not added to allnodes), that adds a reference 517 // to the root node, preventing it from being deleted. 518 HandleSDNode Dummy(getRoot()); 519 520 SmallVector<SDNode*, 128> DeadNodes; 521 522 // Add all obviously-dead nodes to the DeadNodes worklist. 523 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 524 if (I->use_empty()) 525 DeadNodes.push_back(I); 526 527 RemoveDeadNodes(DeadNodes); 528 529 // If the root changed (e.g. it was a dead load, update the root). 530 setRoot(Dummy.getValue()); 531} 532 533/// RemoveDeadNodes - This method deletes the unreachable nodes in the 534/// given list, and any nodes that become unreachable as a result. 535void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 536 DAGUpdateListener *UpdateListener) { 537 538 // Process the worklist, deleting the nodes and adding their uses to the 539 // worklist. 540 while (!DeadNodes.empty()) { 541 SDNode *N = DeadNodes.pop_back_val(); 542 543 if (UpdateListener) 544 UpdateListener->NodeDeleted(N, 0); 545 546 // Take the node out of the appropriate CSE map. 547 RemoveNodeFromCSEMaps(N); 548 549 // Next, brutally remove the operand list. This is safe to do, as there are 550 // no cycles in the graph. 551 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 552 SDUse &Use = *I++; 553 SDNode *Operand = Use.getNode(); 554 Use.set(SDValue()); 555 556 // Now that we removed this operand, see if there are no uses of it left. 557 if (Operand->use_empty()) 558 DeadNodes.push_back(Operand); 559 } 560 561 DeallocateNode(N); 562 } 563} 564 565void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 566 SmallVector<SDNode*, 16> DeadNodes(1, N); 567 RemoveDeadNodes(DeadNodes, UpdateListener); 568} 569 570void SelectionDAG::DeleteNode(SDNode *N) { 571 // First take this out of the appropriate CSE map. 572 RemoveNodeFromCSEMaps(N); 573 574 // Finally, remove uses due to operands of this node, remove from the 575 // AllNodes list, and delete the node. 576 DeleteNodeNotInCSEMaps(N); 577} 578 579void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 580 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 581 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 582 583 // Drop all of the operands and decrement used node's use counts. 584 N->DropOperands(); 585 586 DeallocateNode(N); 587} 588 589void SelectionDAG::DeallocateNode(SDNode *N) { 590 if (N->OperandsNeedDelete) 591 delete[] N->OperandList; 592 593 // Set the opcode to DELETED_NODE to help catch bugs when node 594 // memory is reallocated. 595 N->NodeType = ISD::DELETED_NODE; 596 597 NodeAllocator.Deallocate(AllNodes.remove(N)); 598} 599 600/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 601/// correspond to it. This is useful when we're about to delete or repurpose 602/// the node. We don't want future request for structurally identical nodes 603/// to return N anymore. 604bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 605 bool Erased = false; 606 switch (N->getOpcode()) { 607 case ISD::EntryToken: 608 assert(0 && "EntryToken should not be in CSEMaps!"); 609 return false; 610 case ISD::HANDLENODE: return false; // noop. 611 case ISD::CONDCODE: 612 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 613 "Cond code doesn't exist!"); 614 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 615 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 616 break; 617 case ISD::ExternalSymbol: 618 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 619 break; 620 case ISD::TargetExternalSymbol: 621 Erased = 622 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 623 break; 624 case ISD::VALUETYPE: { 625 MVT VT = cast<VTSDNode>(N)->getVT(); 626 if (VT.isExtended()) { 627 Erased = ExtendedValueTypeNodes.erase(VT); 628 } else { 629 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0; 630 ValueTypeNodes[VT.getSimpleVT()] = 0; 631 } 632 break; 633 } 634 default: 635 // Remove it from the CSE Map. 636 Erased = CSEMap.RemoveNode(N); 637 break; 638 } 639#ifndef NDEBUG 640 // Verify that the node was actually in one of the CSE maps, unless it has a 641 // flag result (which cannot be CSE'd) or is one of the special cases that are 642 // not subject to CSE. 643 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 644 !N->isMachineOpcode() && !doNotCSE(N)) { 645 N->dump(this); 646 cerr << "\n"; 647 assert(0 && "Node is not in map!"); 648 } 649#endif 650 return Erased; 651} 652 653/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 654/// maps and modified in place. Add it back to the CSE maps, unless an identical 655/// node already exists, in which case transfer all its users to the existing 656/// node. This transfer can potentially trigger recursive merging. 657/// 658void 659SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 660 DAGUpdateListener *UpdateListener) { 661 // For node types that aren't CSE'd, just act as if no identical node 662 // already exists. 663 if (!doNotCSE(N)) { 664 SDNode *Existing = CSEMap.GetOrInsertNode(N); 665 if (Existing != N) { 666 // If there was already an existing matching node, use ReplaceAllUsesWith 667 // to replace the dead one with the existing one. This can cause 668 // recursive merging of other unrelated nodes down the line. 669 ReplaceAllUsesWith(N, Existing, UpdateListener); 670 671 // N is now dead. Inform the listener if it exists and delete it. 672 if (UpdateListener) 673 UpdateListener->NodeDeleted(N, Existing); 674 DeleteNodeNotInCSEMaps(N); 675 return; 676 } 677 } 678 679 // If the node doesn't already exist, we updated it. Inform a listener if 680 // it exists. 681 if (UpdateListener) 682 UpdateListener->NodeUpdated(N); 683} 684 685/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 686/// were replaced with those specified. If this node is never memoized, 687/// return null, otherwise return a pointer to the slot it would take. If a 688/// node already exists with these operands, the slot will be non-null. 689SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 690 void *&InsertPos) { 691 if (doNotCSE(N)) 692 return 0; 693 694 SDValue Ops[] = { Op }; 695 FoldingSetNodeID ID; 696 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 697 AddNodeIDCustom(ID, N); 698 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 699} 700 701/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 702/// were replaced with those specified. If this node is never memoized, 703/// return null, otherwise return a pointer to the slot it would take. If a 704/// node already exists with these operands, the slot will be non-null. 705SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 706 SDValue Op1, SDValue Op2, 707 void *&InsertPos) { 708 if (doNotCSE(N)) 709 return 0; 710 711 SDValue Ops[] = { Op1, Op2 }; 712 FoldingSetNodeID ID; 713 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 714 AddNodeIDCustom(ID, N); 715 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 716} 717 718 719/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 720/// were replaced with those specified. If this node is never memoized, 721/// return null, otherwise return a pointer to the slot it would take. If a 722/// node already exists with these operands, the slot will be non-null. 723SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 724 const SDValue *Ops,unsigned NumOps, 725 void *&InsertPos) { 726 if (doNotCSE(N)) 727 return 0; 728 729 FoldingSetNodeID ID; 730 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 731 AddNodeIDCustom(ID, N); 732 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 733} 734 735/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 736void SelectionDAG::VerifyNode(SDNode *N) { 737 switch (N->getOpcode()) { 738 default: 739 break; 740 case ISD::BUILD_PAIR: { 741 MVT VT = N->getValueType(0); 742 assert(N->getNumValues() == 1 && "Too many results!"); 743 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 744 "Wrong return type!"); 745 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 746 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 747 "Mismatched operand types!"); 748 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 749 "Wrong operand type!"); 750 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 751 "Wrong return type size"); 752 break; 753 } 754 case ISD::BUILD_VECTOR: { 755 assert(N->getNumValues() == 1 && "Too many results!"); 756 assert(N->getValueType(0).isVector() && "Wrong return type!"); 757 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 758 "Wrong number of operands!"); 759 // FIXME: Change vector_shuffle to a variadic node with mask elements being 760 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an 761 // operand, and it is not always possible to legalize it. Turning off the 762 // following checks at least makes it possible to legalize most of the time. 763// MVT EltVT = N->getValueType(0).getVectorElementType(); 764// for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 765// assert(I->getValueType() == EltVT && 766// "Wrong operand type!"); 767 break; 768 } 769 } 770} 771 772/// getMVTAlignment - Compute the default alignment value for the 773/// given type. 774/// 775unsigned SelectionDAG::getMVTAlignment(MVT VT) const { 776 const Type *Ty = VT == MVT::iPTR ? 777 PointerType::get(Type::Int8Ty, 0) : 778 VT.getTypeForMVT(); 779 780 return TLI.getTargetData()->getABITypeAlignment(Ty); 781} 782 783SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 784 : TLI(tli), FLI(fli), 785 EntryNode(ISD::EntryToken, getVTList(MVT::Other)), 786 Root(getEntryNode()) { 787 AllNodes.push_back(&EntryNode); 788} 789 790void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi, 791 DwarfWriter *dw) { 792 MF = &mf; 793 MMI = mmi; 794 DW = dw; 795} 796 797SelectionDAG::~SelectionDAG() { 798 allnodes_clear(); 799} 800 801void SelectionDAG::allnodes_clear() { 802 assert(&*AllNodes.begin() == &EntryNode); 803 AllNodes.remove(AllNodes.begin()); 804 while (!AllNodes.empty()) 805 DeallocateNode(AllNodes.begin()); 806} 807 808void SelectionDAG::clear() { 809 allnodes_clear(); 810 OperandAllocator.Reset(); 811 CSEMap.clear(); 812 813 ExtendedValueTypeNodes.clear(); 814 ExternalSymbols.clear(); 815 TargetExternalSymbols.clear(); 816 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 817 static_cast<CondCodeSDNode*>(0)); 818 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 819 static_cast<SDNode*>(0)); 820 821 EntryNode.UseList = 0; 822 AllNodes.push_back(&EntryNode); 823 Root = getEntryNode(); 824} 825 826SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) { 827 if (Op.getValueType() == VT) return Op; 828 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 829 VT.getSizeInBits()); 830 return getNode(ISD::AND, Op.getValueType(), Op, 831 getConstant(Imm, Op.getValueType())); 832} 833 834SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, MVT VT) { 835 if (Op.getValueType() == VT) return Op; 836 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 837 VT.getSizeInBits()); 838 return getNode(ISD::AND, DL, Op.getValueType(), Op, 839 getConstant(Imm, Op.getValueType())); 840} 841 842/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 843/// 844SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, MVT VT) { 845 SDValue NegOne; 846 if (VT.isVector()) { 847 MVT EltVT = VT.getVectorElementType(); 848 SDValue NegOneElt = 849 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), EltVT); 850 std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOneElt); 851 NegOne = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), VT, 852 &NegOnes[0], NegOnes.size()); 853 } else { 854 NegOne = getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 855 } 856 857 return getNode(ISD::XOR, DL, VT, Val, NegOne); 858} 859 860SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) { 861 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 862 assert((EltVT.getSizeInBits() >= 64 || 863 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 864 "getConstant with a uint64_t value that doesn't fit in the type!"); 865 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 866} 867 868SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) { 869 return getConstant(*ConstantInt::get(Val), VT, isT); 870} 871 872SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) { 873 assert(VT.isInteger() && "Cannot create FP integer constant!"); 874 875 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 876 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 877 "APInt size does not match type size!"); 878 879 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 880 FoldingSetNodeID ID; 881 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 882 ID.AddPointer(&Val); 883 void *IP = 0; 884 SDNode *N = NULL; 885 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 886 if (!VT.isVector()) 887 return SDValue(N, 0); 888 if (!N) { 889 N = NodeAllocator.Allocate<ConstantSDNode>(); 890 new (N) ConstantSDNode(isT, &Val, EltVT); 891 CSEMap.InsertNode(N, IP); 892 AllNodes.push_back(N); 893 } 894 895 SDValue Result(N, 0); 896 if (VT.isVector()) { 897 SmallVector<SDValue, 8> Ops; 898 Ops.assign(VT.getVectorNumElements(), Result); 899 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 900 } 901 return Result; 902} 903 904SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 905 return getConstant(Val, TLI.getPointerTy(), isTarget); 906} 907 908 909SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) { 910 return getConstantFP(*ConstantFP::get(V), VT, isTarget); 911} 912 913SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){ 914 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 915 916 MVT EltVT = 917 VT.isVector() ? VT.getVectorElementType() : VT; 918 919 // Do the map lookup using the actual bit pattern for the floating point 920 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 921 // we don't have issues with SNANs. 922 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 923 FoldingSetNodeID ID; 924 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 925 ID.AddPointer(&V); 926 void *IP = 0; 927 SDNode *N = NULL; 928 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 929 if (!VT.isVector()) 930 return SDValue(N, 0); 931 if (!N) { 932 N = NodeAllocator.Allocate<ConstantFPSDNode>(); 933 new (N) ConstantFPSDNode(isTarget, &V, EltVT); 934 CSEMap.InsertNode(N, IP); 935 AllNodes.push_back(N); 936 } 937 938 SDValue Result(N, 0); 939 if (VT.isVector()) { 940 SmallVector<SDValue, 8> Ops; 941 Ops.assign(VT.getVectorNumElements(), Result); 942 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 943 } 944 return Result; 945} 946 947SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) { 948 MVT EltVT = 949 VT.isVector() ? VT.getVectorElementType() : VT; 950 if (EltVT==MVT::f32) 951 return getConstantFP(APFloat((float)Val), VT, isTarget); 952 else 953 return getConstantFP(APFloat(Val), VT, isTarget); 954} 955 956SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 957 MVT VT, int64_t Offset, 958 bool isTargetGA) { 959 unsigned Opc; 960 961 // Truncate (with sign-extension) the offset value to the pointer size. 962 unsigned BitWidth = TLI.getPointerTy().getSizeInBits(); 963 if (BitWidth < 64) 964 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 965 966 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 967 if (!GVar) { 968 // If GV is an alias then use the aliasee for determining thread-localness. 969 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 970 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 971 } 972 973 if (GVar && GVar->isThreadLocal()) 974 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 975 else 976 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 977 978 FoldingSetNodeID ID; 979 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 980 ID.AddPointer(GV); 981 ID.AddInteger(Offset); 982 void *IP = 0; 983 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 984 return SDValue(E, 0); 985 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>(); 986 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset); 987 CSEMap.InsertNode(N, IP); 988 AllNodes.push_back(N); 989 return SDValue(N, 0); 990} 991 992SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) { 993 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 994 FoldingSetNodeID ID; 995 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 996 ID.AddInteger(FI); 997 void *IP = 0; 998 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 999 return SDValue(E, 0); 1000 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>(); 1001 new (N) FrameIndexSDNode(FI, VT, isTarget); 1002 CSEMap.InsertNode(N, IP); 1003 AllNodes.push_back(N); 1004 return SDValue(N, 0); 1005} 1006 1007SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){ 1008 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1009 FoldingSetNodeID ID; 1010 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1011 ID.AddInteger(JTI); 1012 void *IP = 0; 1013 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1014 return SDValue(E, 0); 1015 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>(); 1016 new (N) JumpTableSDNode(JTI, VT, isTarget); 1017 CSEMap.InsertNode(N, IP); 1018 AllNodes.push_back(N); 1019 return SDValue(N, 0); 1020} 1021 1022SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT, 1023 unsigned Alignment, int Offset, 1024 bool isTarget) { 1025 if (Alignment == 0) 1026 Alignment = 1027 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType()); 1028 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1029 FoldingSetNodeID ID; 1030 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1031 ID.AddInteger(Alignment); 1032 ID.AddInteger(Offset); 1033 ID.AddPointer(C); 1034 void *IP = 0; 1035 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1036 return SDValue(E, 0); 1037 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1038 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 1039 CSEMap.InsertNode(N, IP); 1040 AllNodes.push_back(N); 1041 return SDValue(N, 0); 1042} 1043 1044 1045SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT, 1046 unsigned Alignment, int Offset, 1047 bool isTarget) { 1048 if (Alignment == 0) 1049 Alignment = 1050 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType()); 1051 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1052 FoldingSetNodeID ID; 1053 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1054 ID.AddInteger(Alignment); 1055 ID.AddInteger(Offset); 1056 C->AddSelectionDAGCSEId(ID); 1057 void *IP = 0; 1058 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1059 return SDValue(E, 0); 1060 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1061 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 1062 CSEMap.InsertNode(N, IP); 1063 AllNodes.push_back(N); 1064 return SDValue(N, 0); 1065} 1066 1067 1068SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1069 FoldingSetNodeID ID; 1070 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1071 ID.AddPointer(MBB); 1072 void *IP = 0; 1073 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1074 return SDValue(E, 0); 1075 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1076 new (N) BasicBlockSDNode(MBB); 1077 CSEMap.InsertNode(N, IP); 1078 AllNodes.push_back(N); 1079 return SDValue(N, 0); 1080} 1081 1082SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB, DebugLoc dl) { 1083 FoldingSetNodeID ID; 1084 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1085 ID.AddPointer(MBB); 1086 void *IP = 0; 1087 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1088 return SDValue(E, 0); 1089 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1090 new (N) BasicBlockSDNode(MBB, dl); 1091 CSEMap.InsertNode(N, IP); 1092 AllNodes.push_back(N); 1093 return SDValue(N, 0); 1094} 1095 1096SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) { 1097 FoldingSetNodeID ID; 1098 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0); 1099 ID.AddInteger(Flags.getRawBits()); 1100 void *IP = 0; 1101 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1102 return SDValue(E, 0); 1103 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>(); 1104 new (N) ARG_FLAGSSDNode(Flags); 1105 CSEMap.InsertNode(N, IP); 1106 AllNodes.push_back(N); 1107 return SDValue(N, 0); 1108} 1109 1110SDValue SelectionDAG::getValueType(MVT VT) { 1111 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size()) 1112 ValueTypeNodes.resize(VT.getSimpleVT()+1); 1113 1114 SDNode *&N = VT.isExtended() ? 1115 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()]; 1116 1117 if (N) return SDValue(N, 0); 1118 N = NodeAllocator.Allocate<VTSDNode>(); 1119 new (N) VTSDNode(VT); 1120 AllNodes.push_back(N); 1121 return SDValue(N, 0); 1122} 1123 1124SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) { 1125 SDNode *&N = ExternalSymbols[Sym]; 1126 if (N) return SDValue(N, 0); 1127 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1128 new (N) ExternalSymbolSDNode(false, Sym, VT); 1129 AllNodes.push_back(N); 1130 return SDValue(N, 0); 1131} 1132 1133SDValue SelectionDAG::getExternalSymbol(const char *Sym, DebugLoc dl, MVT VT) { 1134 SDNode *&N = ExternalSymbols[Sym]; 1135 if (N) return SDValue(N, 0); 1136 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1137 new (N) ExternalSymbolSDNode(false, dl, Sym, VT); 1138 AllNodes.push_back(N); 1139 return SDValue(N, 0); 1140} 1141 1142SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) { 1143 SDNode *&N = TargetExternalSymbols[Sym]; 1144 if (N) return SDValue(N, 0); 1145 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1146 new (N) ExternalSymbolSDNode(true, Sym, VT); 1147 AllNodes.push_back(N); 1148 return SDValue(N, 0); 1149} 1150 1151SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, DebugLoc dl, 1152 MVT VT) { 1153 SDNode *&N = TargetExternalSymbols[Sym]; 1154 if (N) return SDValue(N, 0); 1155 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1156 new (N) ExternalSymbolSDNode(true, dl, Sym, VT); 1157 AllNodes.push_back(N); 1158 return SDValue(N, 0); 1159} 1160 1161SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1162 if ((unsigned)Cond >= CondCodeNodes.size()) 1163 CondCodeNodes.resize(Cond+1); 1164 1165 if (CondCodeNodes[Cond] == 0) { 1166 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>(); 1167 new (N) CondCodeSDNode(Cond); 1168 CondCodeNodes[Cond] = N; 1169 AllNodes.push_back(N); 1170 } 1171 return SDValue(CondCodeNodes[Cond], 0); 1172} 1173 1174SDValue SelectionDAG::getConvertRndSat(MVT VT, SDValue Val, SDValue DTy, 1175 SDValue STy, SDValue Rnd, SDValue Sat, 1176 ISD::CvtCode Code) { 1177 // If the src and dest types are the same, no conversion is necessary. 1178 if (DTy == STy) 1179 return Val; 1180 1181 FoldingSetNodeID ID; 1182 void* IP = 0; 1183 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1184 return SDValue(E, 0); 1185 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>(); 1186 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1187 new (N) CvtRndSatSDNode(VT, Ops, 5, Code); 1188 CSEMap.InsertNode(N, IP); 1189 AllNodes.push_back(N); 1190 return SDValue(N, 0); 1191} 1192 1193SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) { 1194 FoldingSetNodeID ID; 1195 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1196 ID.AddInteger(RegNo); 1197 void *IP = 0; 1198 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1199 return SDValue(E, 0); 1200 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>(); 1201 new (N) RegisterSDNode(RegNo, VT); 1202 CSEMap.InsertNode(N, IP); 1203 AllNodes.push_back(N); 1204 return SDValue(N, 0); 1205} 1206 1207SDValue SelectionDAG::getDbgStopPoint(SDValue Root, 1208 unsigned Line, unsigned Col, 1209 Value *CU) { 1210 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>(); 1211 new (N) DbgStopPointSDNode(Root, Line, Col, CU); 1212 AllNodes.push_back(N); 1213 return SDValue(N, 0); 1214} 1215 1216SDValue SelectionDAG::getLabel(unsigned Opcode, 1217 SDValue Root, 1218 unsigned LabelID) { 1219 FoldingSetNodeID ID; 1220 SDValue Ops[] = { Root }; 1221 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1222 ID.AddInteger(LabelID); 1223 void *IP = 0; 1224 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1225 return SDValue(E, 0); 1226 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1227 new (N) LabelSDNode(Opcode, Root, LabelID); 1228 CSEMap.InsertNode(N, IP); 1229 AllNodes.push_back(N); 1230 return SDValue(N, 0); 1231} 1232 1233SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl, 1234 SDValue Root, 1235 unsigned LabelID) { 1236 FoldingSetNodeID ID; 1237 SDValue Ops[] = { Root }; 1238 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1239 ID.AddInteger(LabelID); 1240 void *IP = 0; 1241 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1242 return SDValue(E, 0); 1243 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1244 new (N) LabelSDNode(Opcode, dl, Root, LabelID); 1245 CSEMap.InsertNode(N, IP); 1246 AllNodes.push_back(N); 1247 return SDValue(N, 0); 1248} 1249 1250SDValue SelectionDAG::getSrcValue(const Value *V) { 1251 assert((!V || isa<PointerType>(V->getType())) && 1252 "SrcValue is not a pointer?"); 1253 1254 FoldingSetNodeID ID; 1255 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1256 ID.AddPointer(V); 1257 1258 void *IP = 0; 1259 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1260 return SDValue(E, 0); 1261 1262 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>(); 1263 new (N) SrcValueSDNode(V); 1264 CSEMap.InsertNode(N, IP); 1265 AllNodes.push_back(N); 1266 return SDValue(N, 0); 1267} 1268 1269SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) { 1270#ifndef NDEBUG 1271 const Value *v = MO.getValue(); 1272 assert((!v || isa<PointerType>(v->getType())) && 1273 "SrcValue is not a pointer?"); 1274#endif 1275 1276 FoldingSetNodeID ID; 1277 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0); 1278 MO.Profile(ID); 1279 1280 void *IP = 0; 1281 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1282 return SDValue(E, 0); 1283 1284 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>(); 1285 new (N) MemOperandSDNode(MO); 1286 CSEMap.InsertNode(N, IP); 1287 AllNodes.push_back(N); 1288 return SDValue(N, 0); 1289} 1290 1291/// getShiftAmountOperand - Return the specified value casted to 1292/// the target's desired shift amount type. 1293SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1294 MVT OpTy = Op.getValueType(); 1295 MVT ShTy = TLI.getShiftAmountTy(); 1296 if (OpTy == ShTy || OpTy.isVector()) return Op; 1297 1298 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1299 return getNode(Opcode, ShTy, Op); 1300} 1301 1302/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1303/// specified value type. 1304SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) { 1305 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1306 unsigned ByteSize = VT.getStoreSizeInBits()/8; 1307 const Type *Ty = VT.getTypeForMVT(); 1308 unsigned StackAlign = 1309 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1310 1311 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign); 1312 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1313} 1314 1315/// CreateStackTemporary - Create a stack temporary suitable for holding 1316/// either of the specified value types. 1317SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) { 1318 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1319 VT2.getStoreSizeInBits())/8; 1320 const Type *Ty1 = VT1.getTypeForMVT(); 1321 const Type *Ty2 = VT2.getTypeForMVT(); 1322 const TargetData *TD = TLI.getTargetData(); 1323 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1324 TD->getPrefTypeAlignment(Ty2)); 1325 1326 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1327 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align); 1328 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1329} 1330 1331SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1, 1332 SDValue N2, ISD::CondCode Cond) { 1333 // These setcc operations always fold. 1334 switch (Cond) { 1335 default: break; 1336 case ISD::SETFALSE: 1337 case ISD::SETFALSE2: return getConstant(0, VT); 1338 case ISD::SETTRUE: 1339 case ISD::SETTRUE2: return getConstant(1, VT); 1340 1341 case ISD::SETOEQ: 1342 case ISD::SETOGT: 1343 case ISD::SETOGE: 1344 case ISD::SETOLT: 1345 case ISD::SETOLE: 1346 case ISD::SETONE: 1347 case ISD::SETO: 1348 case ISD::SETUO: 1349 case ISD::SETUEQ: 1350 case ISD::SETUNE: 1351 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1352 break; 1353 } 1354 1355 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1356 const APInt &C2 = N2C->getAPIntValue(); 1357 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1358 const APInt &C1 = N1C->getAPIntValue(); 1359 1360 switch (Cond) { 1361 default: assert(0 && "Unknown integer setcc!"); 1362 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1363 case ISD::SETNE: return getConstant(C1 != C2, VT); 1364 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1365 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1366 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1367 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1368 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1369 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1370 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1371 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1372 } 1373 } 1374 } 1375 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1376 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1377 // No compile time operations on this type yet. 1378 if (N1C->getValueType(0) == MVT::ppcf128) 1379 return SDValue(); 1380 1381 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1382 switch (Cond) { 1383 default: break; 1384 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1385 return getNode(ISD::UNDEF, VT); 1386 // fall through 1387 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1388 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1389 return getNode(ISD::UNDEF, VT); 1390 // fall through 1391 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1392 R==APFloat::cmpLessThan, VT); 1393 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1394 return getNode(ISD::UNDEF, VT); 1395 // fall through 1396 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1397 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1398 return getNode(ISD::UNDEF, VT); 1399 // fall through 1400 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1401 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1402 return getNode(ISD::UNDEF, VT); 1403 // fall through 1404 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1405 R==APFloat::cmpEqual, VT); 1406 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1407 return getNode(ISD::UNDEF, VT); 1408 // fall through 1409 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1410 R==APFloat::cmpEqual, VT); 1411 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1412 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1413 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1414 R==APFloat::cmpEqual, VT); 1415 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1416 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1417 R==APFloat::cmpLessThan, VT); 1418 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1419 R==APFloat::cmpUnordered, VT); 1420 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1421 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1422 } 1423 } else { 1424 // Ensure that the constant occurs on the RHS. 1425 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1426 } 1427 } 1428 1429 // Could not fold it. 1430 return SDValue(); 1431} 1432 1433/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1434/// use this predicate to simplify operations downstream. 1435bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1436 unsigned BitWidth = Op.getValueSizeInBits(); 1437 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1438} 1439 1440/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1441/// this predicate to simplify operations downstream. Mask is known to be zero 1442/// for bits that V cannot have. 1443bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1444 unsigned Depth) const { 1445 APInt KnownZero, KnownOne; 1446 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1447 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1448 return (KnownZero & Mask) == Mask; 1449} 1450 1451/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1452/// known to be either zero or one and return them in the KnownZero/KnownOne 1453/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1454/// processing. 1455void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1456 APInt &KnownZero, APInt &KnownOne, 1457 unsigned Depth) const { 1458 unsigned BitWidth = Mask.getBitWidth(); 1459 assert(BitWidth == Op.getValueType().getSizeInBits() && 1460 "Mask size mismatches value type size!"); 1461 1462 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1463 if (Depth == 6 || Mask == 0) 1464 return; // Limit search depth. 1465 1466 APInt KnownZero2, KnownOne2; 1467 1468 switch (Op.getOpcode()) { 1469 case ISD::Constant: 1470 // We know all of the bits for a constant! 1471 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1472 KnownZero = ~KnownOne & Mask; 1473 return; 1474 case ISD::AND: 1475 // If either the LHS or the RHS are Zero, the result is zero. 1476 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1477 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1478 KnownZero2, KnownOne2, Depth+1); 1479 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1480 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1481 1482 // Output known-1 bits are only known if set in both the LHS & RHS. 1483 KnownOne &= KnownOne2; 1484 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1485 KnownZero |= KnownZero2; 1486 return; 1487 case ISD::OR: 1488 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1489 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1490 KnownZero2, KnownOne2, Depth+1); 1491 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1492 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1493 1494 // Output known-0 bits are only known if clear in both the LHS & RHS. 1495 KnownZero &= KnownZero2; 1496 // Output known-1 are known to be set if set in either the LHS | RHS. 1497 KnownOne |= KnownOne2; 1498 return; 1499 case ISD::XOR: { 1500 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1501 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1502 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1503 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1504 1505 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1506 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1507 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1508 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1509 KnownZero = KnownZeroOut; 1510 return; 1511 } 1512 case ISD::MUL: { 1513 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1514 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1515 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1516 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1517 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1518 1519 // If low bits are zero in either operand, output low known-0 bits. 1520 // Also compute a conserative estimate for high known-0 bits. 1521 // More trickiness is possible, but this is sufficient for the 1522 // interesting case of alignment computation. 1523 KnownOne.clear(); 1524 unsigned TrailZ = KnownZero.countTrailingOnes() + 1525 KnownZero2.countTrailingOnes(); 1526 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1527 KnownZero2.countLeadingOnes(), 1528 BitWidth) - BitWidth; 1529 1530 TrailZ = std::min(TrailZ, BitWidth); 1531 LeadZ = std::min(LeadZ, BitWidth); 1532 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1533 APInt::getHighBitsSet(BitWidth, LeadZ); 1534 KnownZero &= Mask; 1535 return; 1536 } 1537 case ISD::UDIV: { 1538 // For the purposes of computing leading zeros we can conservatively 1539 // treat a udiv as a logical right shift by the power of 2 known to 1540 // be less than the denominator. 1541 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1542 ComputeMaskedBits(Op.getOperand(0), 1543 AllOnes, KnownZero2, KnownOne2, Depth+1); 1544 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1545 1546 KnownOne2.clear(); 1547 KnownZero2.clear(); 1548 ComputeMaskedBits(Op.getOperand(1), 1549 AllOnes, KnownZero2, KnownOne2, Depth+1); 1550 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1551 if (RHSUnknownLeadingOnes != BitWidth) 1552 LeadZ = std::min(BitWidth, 1553 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1554 1555 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1556 return; 1557 } 1558 case ISD::SELECT: 1559 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1560 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1561 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1562 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1563 1564 // Only known if known in both the LHS and RHS. 1565 KnownOne &= KnownOne2; 1566 KnownZero &= KnownZero2; 1567 return; 1568 case ISD::SELECT_CC: 1569 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1570 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1571 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1572 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1573 1574 // Only known if known in both the LHS and RHS. 1575 KnownOne &= KnownOne2; 1576 KnownZero &= KnownZero2; 1577 return; 1578 case ISD::SADDO: 1579 case ISD::UADDO: 1580 case ISD::SSUBO: 1581 case ISD::USUBO: 1582 case ISD::SMULO: 1583 case ISD::UMULO: 1584 if (Op.getResNo() != 1) 1585 return; 1586 // The boolean result conforms to getBooleanContents. Fall through. 1587 case ISD::SETCC: 1588 // If we know the result of a setcc has the top bits zero, use this info. 1589 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1590 BitWidth > 1) 1591 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1592 return; 1593 case ISD::SHL: 1594 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1595 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1596 unsigned ShAmt = SA->getZExtValue(); 1597 1598 // If the shift count is an invalid immediate, don't do anything. 1599 if (ShAmt >= BitWidth) 1600 return; 1601 1602 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1603 KnownZero, KnownOne, Depth+1); 1604 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1605 KnownZero <<= ShAmt; 1606 KnownOne <<= ShAmt; 1607 // low bits known zero. 1608 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1609 } 1610 return; 1611 case ISD::SRL: 1612 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1613 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1614 unsigned ShAmt = SA->getZExtValue(); 1615 1616 // If the shift count is an invalid immediate, don't do anything. 1617 if (ShAmt >= BitWidth) 1618 return; 1619 1620 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1621 KnownZero, KnownOne, Depth+1); 1622 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1623 KnownZero = KnownZero.lshr(ShAmt); 1624 KnownOne = KnownOne.lshr(ShAmt); 1625 1626 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1627 KnownZero |= HighBits; // High bits known zero. 1628 } 1629 return; 1630 case ISD::SRA: 1631 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1632 unsigned ShAmt = SA->getZExtValue(); 1633 1634 // If the shift count is an invalid immediate, don't do anything. 1635 if (ShAmt >= BitWidth) 1636 return; 1637 1638 APInt InDemandedMask = (Mask << ShAmt); 1639 // If any of the demanded bits are produced by the sign extension, we also 1640 // demand the input sign bit. 1641 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1642 if (HighBits.getBoolValue()) 1643 InDemandedMask |= APInt::getSignBit(BitWidth); 1644 1645 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1646 Depth+1); 1647 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1648 KnownZero = KnownZero.lshr(ShAmt); 1649 KnownOne = KnownOne.lshr(ShAmt); 1650 1651 // Handle the sign bits. 1652 APInt SignBit = APInt::getSignBit(BitWidth); 1653 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1654 1655 if (KnownZero.intersects(SignBit)) { 1656 KnownZero |= HighBits; // New bits are known zero. 1657 } else if (KnownOne.intersects(SignBit)) { 1658 KnownOne |= HighBits; // New bits are known one. 1659 } 1660 } 1661 return; 1662 case ISD::SIGN_EXTEND_INREG: { 1663 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1664 unsigned EBits = EVT.getSizeInBits(); 1665 1666 // Sign extension. Compute the demanded bits in the result that are not 1667 // present in the input. 1668 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1669 1670 APInt InSignBit = APInt::getSignBit(EBits); 1671 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1672 1673 // If the sign extended bits are demanded, we know that the sign 1674 // bit is demanded. 1675 InSignBit.zext(BitWidth); 1676 if (NewBits.getBoolValue()) 1677 InputDemandedBits |= InSignBit; 1678 1679 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1680 KnownZero, KnownOne, Depth+1); 1681 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1682 1683 // If the sign bit of the input is known set or clear, then we know the 1684 // top bits of the result. 1685 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1686 KnownZero |= NewBits; 1687 KnownOne &= ~NewBits; 1688 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1689 KnownOne |= NewBits; 1690 KnownZero &= ~NewBits; 1691 } else { // Input sign bit unknown 1692 KnownZero &= ~NewBits; 1693 KnownOne &= ~NewBits; 1694 } 1695 return; 1696 } 1697 case ISD::CTTZ: 1698 case ISD::CTLZ: 1699 case ISD::CTPOP: { 1700 unsigned LowBits = Log2_32(BitWidth)+1; 1701 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1702 KnownOne.clear(); 1703 return; 1704 } 1705 case ISD::LOAD: { 1706 if (ISD::isZEXTLoad(Op.getNode())) { 1707 LoadSDNode *LD = cast<LoadSDNode>(Op); 1708 MVT VT = LD->getMemoryVT(); 1709 unsigned MemBits = VT.getSizeInBits(); 1710 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1711 } 1712 return; 1713 } 1714 case ISD::ZERO_EXTEND: { 1715 MVT InVT = Op.getOperand(0).getValueType(); 1716 unsigned InBits = InVT.getSizeInBits(); 1717 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1718 APInt InMask = Mask; 1719 InMask.trunc(InBits); 1720 KnownZero.trunc(InBits); 1721 KnownOne.trunc(InBits); 1722 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1723 KnownZero.zext(BitWidth); 1724 KnownOne.zext(BitWidth); 1725 KnownZero |= NewBits; 1726 return; 1727 } 1728 case ISD::SIGN_EXTEND: { 1729 MVT InVT = Op.getOperand(0).getValueType(); 1730 unsigned InBits = InVT.getSizeInBits(); 1731 APInt InSignBit = APInt::getSignBit(InBits); 1732 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1733 APInt InMask = Mask; 1734 InMask.trunc(InBits); 1735 1736 // If any of the sign extended bits are demanded, we know that the sign 1737 // bit is demanded. Temporarily set this bit in the mask for our callee. 1738 if (NewBits.getBoolValue()) 1739 InMask |= InSignBit; 1740 1741 KnownZero.trunc(InBits); 1742 KnownOne.trunc(InBits); 1743 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1744 1745 // Note if the sign bit is known to be zero or one. 1746 bool SignBitKnownZero = KnownZero.isNegative(); 1747 bool SignBitKnownOne = KnownOne.isNegative(); 1748 assert(!(SignBitKnownZero && SignBitKnownOne) && 1749 "Sign bit can't be known to be both zero and one!"); 1750 1751 // If the sign bit wasn't actually demanded by our caller, we don't 1752 // want it set in the KnownZero and KnownOne result values. Reset the 1753 // mask and reapply it to the result values. 1754 InMask = Mask; 1755 InMask.trunc(InBits); 1756 KnownZero &= InMask; 1757 KnownOne &= InMask; 1758 1759 KnownZero.zext(BitWidth); 1760 KnownOne.zext(BitWidth); 1761 1762 // If the sign bit is known zero or one, the top bits match. 1763 if (SignBitKnownZero) 1764 KnownZero |= NewBits; 1765 else if (SignBitKnownOne) 1766 KnownOne |= NewBits; 1767 return; 1768 } 1769 case ISD::ANY_EXTEND: { 1770 MVT InVT = Op.getOperand(0).getValueType(); 1771 unsigned InBits = InVT.getSizeInBits(); 1772 APInt InMask = Mask; 1773 InMask.trunc(InBits); 1774 KnownZero.trunc(InBits); 1775 KnownOne.trunc(InBits); 1776 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1777 KnownZero.zext(BitWidth); 1778 KnownOne.zext(BitWidth); 1779 return; 1780 } 1781 case ISD::TRUNCATE: { 1782 MVT InVT = Op.getOperand(0).getValueType(); 1783 unsigned InBits = InVT.getSizeInBits(); 1784 APInt InMask = Mask; 1785 InMask.zext(InBits); 1786 KnownZero.zext(InBits); 1787 KnownOne.zext(InBits); 1788 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1789 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1790 KnownZero.trunc(BitWidth); 1791 KnownOne.trunc(BitWidth); 1792 break; 1793 } 1794 case ISD::AssertZext: { 1795 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1796 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1797 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1798 KnownOne, Depth+1); 1799 KnownZero |= (~InMask) & Mask; 1800 return; 1801 } 1802 case ISD::FGETSIGN: 1803 // All bits are zero except the low bit. 1804 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1805 return; 1806 1807 case ISD::SUB: { 1808 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1809 // We know that the top bits of C-X are clear if X contains less bits 1810 // than C (i.e. no wrap-around can happen). For example, 20-X is 1811 // positive if we can prove that X is >= 0 and < 16. 1812 if (CLHS->getAPIntValue().isNonNegative()) { 1813 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1814 // NLZ can't be BitWidth with no sign bit 1815 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1816 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1817 Depth+1); 1818 1819 // If all of the MaskV bits are known to be zero, then we know the 1820 // output top bits are zero, because we now know that the output is 1821 // from [0-C]. 1822 if ((KnownZero2 & MaskV) == MaskV) { 1823 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1824 // Top bits known zero. 1825 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1826 } 1827 } 1828 } 1829 } 1830 // fall through 1831 case ISD::ADD: { 1832 // Output known-0 bits are known if clear or set in both the low clear bits 1833 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1834 // low 3 bits clear. 1835 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1836 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1837 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1838 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1839 1840 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1841 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1842 KnownZeroOut = std::min(KnownZeroOut, 1843 KnownZero2.countTrailingOnes()); 1844 1845 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1846 return; 1847 } 1848 case ISD::SREM: 1849 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1850 const APInt &RA = Rem->getAPIntValue(); 1851 if (RA.isPowerOf2() || (-RA).isPowerOf2()) { 1852 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA; 1853 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1854 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1855 1856 // If the sign bit of the first operand is zero, the sign bit of 1857 // the result is zero. If the first operand has no one bits below 1858 // the second operand's single 1 bit, its sign will be zero. 1859 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1860 KnownZero2 |= ~LowBits; 1861 1862 KnownZero |= KnownZero2 & Mask; 1863 1864 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1865 } 1866 } 1867 return; 1868 case ISD::UREM: { 1869 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1870 const APInt &RA = Rem->getAPIntValue(); 1871 if (RA.isPowerOf2()) { 1872 APInt LowBits = (RA - 1); 1873 APInt Mask2 = LowBits & Mask; 1874 KnownZero |= ~LowBits & Mask; 1875 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1876 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1877 break; 1878 } 1879 } 1880 1881 // Since the result is less than or equal to either operand, any leading 1882 // zero bits in either operand must also exist in the result. 1883 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1884 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1885 Depth+1); 1886 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1887 Depth+1); 1888 1889 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1890 KnownZero2.countLeadingOnes()); 1891 KnownOne.clear(); 1892 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1893 return; 1894 } 1895 default: 1896 // Allow the target to implement this method for its nodes. 1897 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1898 case ISD::INTRINSIC_WO_CHAIN: 1899 case ISD::INTRINSIC_W_CHAIN: 1900 case ISD::INTRINSIC_VOID: 1901 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this); 1902 } 1903 return; 1904 } 1905} 1906 1907/// ComputeNumSignBits - Return the number of times the sign bit of the 1908/// register is replicated into the other bits. We know that at least 1 bit 1909/// is always equal to the sign bit (itself), but other cases can give us 1910/// information. For example, immediately after an "SRA X, 2", we know that 1911/// the top 3 bits are all equal to each other, so we return 3. 1912unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 1913 MVT VT = Op.getValueType(); 1914 assert(VT.isInteger() && "Invalid VT!"); 1915 unsigned VTBits = VT.getSizeInBits(); 1916 unsigned Tmp, Tmp2; 1917 unsigned FirstAnswer = 1; 1918 1919 if (Depth == 6) 1920 return 1; // Limit search depth. 1921 1922 switch (Op.getOpcode()) { 1923 default: break; 1924 case ISD::AssertSext: 1925 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1926 return VTBits-Tmp+1; 1927 case ISD::AssertZext: 1928 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1929 return VTBits-Tmp; 1930 1931 case ISD::Constant: { 1932 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 1933 // If negative, return # leading ones. 1934 if (Val.isNegative()) 1935 return Val.countLeadingOnes(); 1936 1937 // Return # leading zeros. 1938 return Val.countLeadingZeros(); 1939 } 1940 1941 case ISD::SIGN_EXTEND: 1942 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits(); 1943 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 1944 1945 case ISD::SIGN_EXTEND_INREG: 1946 // Max of the input and what this extends. 1947 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1948 Tmp = VTBits-Tmp+1; 1949 1950 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1951 return std::max(Tmp, Tmp2); 1952 1953 case ISD::SRA: 1954 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1955 // SRA X, C -> adds C sign bits. 1956 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1957 Tmp += C->getZExtValue(); 1958 if (Tmp > VTBits) Tmp = VTBits; 1959 } 1960 return Tmp; 1961 case ISD::SHL: 1962 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1963 // shl destroys sign bits. 1964 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1965 if (C->getZExtValue() >= VTBits || // Bad shift. 1966 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 1967 return Tmp - C->getZExtValue(); 1968 } 1969 break; 1970 case ISD::AND: 1971 case ISD::OR: 1972 case ISD::XOR: // NOT is handled here. 1973 // Logical binary ops preserve the number of sign bits at the worst. 1974 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1975 if (Tmp != 1) { 1976 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1977 FirstAnswer = std::min(Tmp, Tmp2); 1978 // We computed what we know about the sign bits as our first 1979 // answer. Now proceed to the generic code that uses 1980 // ComputeMaskedBits, and pick whichever answer is better. 1981 } 1982 break; 1983 1984 case ISD::SELECT: 1985 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1986 if (Tmp == 1) return 1; // Early out. 1987 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 1988 return std::min(Tmp, Tmp2); 1989 1990 case ISD::SADDO: 1991 case ISD::UADDO: 1992 case ISD::SSUBO: 1993 case ISD::USUBO: 1994 case ISD::SMULO: 1995 case ISD::UMULO: 1996 if (Op.getResNo() != 1) 1997 break; 1998 // The boolean result conforms to getBooleanContents. Fall through. 1999 case ISD::SETCC: 2000 // If setcc returns 0/-1, all bits are sign bits. 2001 if (TLI.getBooleanContents() == 2002 TargetLowering::ZeroOrNegativeOneBooleanContent) 2003 return VTBits; 2004 break; 2005 case ISD::ROTL: 2006 case ISD::ROTR: 2007 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2008 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2009 2010 // Handle rotate right by N like a rotate left by 32-N. 2011 if (Op.getOpcode() == ISD::ROTR) 2012 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2013 2014 // If we aren't rotating out all of the known-in sign bits, return the 2015 // number that are left. This handles rotl(sext(x), 1) for example. 2016 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2017 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2018 } 2019 break; 2020 case ISD::ADD: 2021 // Add can have at most one carry bit. Thus we know that the output 2022 // is, at worst, one more bit than the inputs. 2023 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2024 if (Tmp == 1) return 1; // Early out. 2025 2026 // Special case decrementing a value (ADD X, -1): 2027 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2028 if (CRHS->isAllOnesValue()) { 2029 APInt KnownZero, KnownOne; 2030 APInt Mask = APInt::getAllOnesValue(VTBits); 2031 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2032 2033 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2034 // sign bits set. 2035 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2036 return VTBits; 2037 2038 // If we are subtracting one from a positive number, there is no carry 2039 // out of the result. 2040 if (KnownZero.isNegative()) 2041 return Tmp; 2042 } 2043 2044 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2045 if (Tmp2 == 1) return 1; 2046 return std::min(Tmp, Tmp2)-1; 2047 break; 2048 2049 case ISD::SUB: 2050 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2051 if (Tmp2 == 1) return 1; 2052 2053 // Handle NEG. 2054 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2055 if (CLHS->isNullValue()) { 2056 APInt KnownZero, KnownOne; 2057 APInt Mask = APInt::getAllOnesValue(VTBits); 2058 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2059 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2060 // sign bits set. 2061 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2062 return VTBits; 2063 2064 // If the input is known to be positive (the sign bit is known clear), 2065 // the output of the NEG has the same number of sign bits as the input. 2066 if (KnownZero.isNegative()) 2067 return Tmp2; 2068 2069 // Otherwise, we treat this like a SUB. 2070 } 2071 2072 // Sub can have at most one carry bit. Thus we know that the output 2073 // is, at worst, one more bit than the inputs. 2074 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2075 if (Tmp == 1) return 1; // Early out. 2076 return std::min(Tmp, Tmp2)-1; 2077 break; 2078 case ISD::TRUNCATE: 2079 // FIXME: it's tricky to do anything useful for this, but it is an important 2080 // case for targets like X86. 2081 break; 2082 } 2083 2084 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2085 if (Op.getOpcode() == ISD::LOAD) { 2086 LoadSDNode *LD = cast<LoadSDNode>(Op); 2087 unsigned ExtType = LD->getExtensionType(); 2088 switch (ExtType) { 2089 default: break; 2090 case ISD::SEXTLOAD: // '17' bits known 2091 Tmp = LD->getMemoryVT().getSizeInBits(); 2092 return VTBits-Tmp+1; 2093 case ISD::ZEXTLOAD: // '16' bits known 2094 Tmp = LD->getMemoryVT().getSizeInBits(); 2095 return VTBits-Tmp; 2096 } 2097 } 2098 2099 // Allow the target to implement this method for its nodes. 2100 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2101 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2102 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2103 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2104 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2105 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2106 } 2107 2108 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2109 // use this information. 2110 APInt KnownZero, KnownOne; 2111 APInt Mask = APInt::getAllOnesValue(VTBits); 2112 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2113 2114 if (KnownZero.isNegative()) { // sign bit is 0 2115 Mask = KnownZero; 2116 } else if (KnownOne.isNegative()) { // sign bit is 1; 2117 Mask = KnownOne; 2118 } else { 2119 // Nothing known. 2120 return FirstAnswer; 2121 } 2122 2123 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2124 // the number of identical bits in the top of the input value. 2125 Mask = ~Mask; 2126 Mask <<= Mask.getBitWidth()-VTBits; 2127 // Return # leading zeros. We use 'min' here in case Val was zero before 2128 // shifting. We don't want to return '64' as for an i32 "0". 2129 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2130} 2131 2132 2133bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2134 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2135 if (!GA) return false; 2136 if (GA->getOffset() != 0) return false; 2137 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2138 if (!GV) return false; 2139 MachineModuleInfo *MMI = getMachineModuleInfo(); 2140 return MMI && MMI->hasDebugInfo(); 2141} 2142 2143 2144/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2145/// element of the result of the vector shuffle. 2146SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) { 2147 MVT VT = N->getValueType(0); 2148 SDValue PermMask = N->getOperand(2); 2149 SDValue Idx = PermMask.getOperand(i); 2150 if (Idx.getOpcode() == ISD::UNDEF) 2151 return getNode(ISD::UNDEF, VT.getVectorElementType()); 2152 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue(); 2153 unsigned NumElems = PermMask.getNumOperands(); 2154 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2155 Index %= NumElems; 2156 2157 if (V.getOpcode() == ISD::BIT_CONVERT) { 2158 V = V.getOperand(0); 2159 MVT VVT = V.getValueType(); 2160 if (!VVT.isVector() || VVT.getVectorNumElements() != NumElems) 2161 return SDValue(); 2162 } 2163 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2164 return (Index == 0) ? V.getOperand(0) 2165 : getNode(ISD::UNDEF, VT.getVectorElementType()); 2166 if (V.getOpcode() == ISD::BUILD_VECTOR) 2167 return V.getOperand(Index); 2168 if (V.getOpcode() == ISD::VECTOR_SHUFFLE) 2169 return getShuffleScalarElt(V.getNode(), Index); 2170 return SDValue(); 2171} 2172 2173 2174/// getNode - Gets or creates the specified node. 2175/// 2176SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) { 2177 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT); 2178} 2179 2180SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT) { 2181 FoldingSetNodeID ID; 2182 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2183 void *IP = 0; 2184 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2185 return SDValue(E, 0); 2186 SDNode *N = NodeAllocator.Allocate<SDNode>(); 2187 new (N) SDNode(Opcode, DL, SDNode::getSDVTList(VT)); 2188 CSEMap.InsertNode(N, IP); 2189 2190 AllNodes.push_back(N); 2191#ifndef NDEBUG 2192 VerifyNode(N); 2193#endif 2194 return SDValue(N, 0); 2195} 2196 2197SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { 2198 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Operand); 2199} 2200 2201SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2202 MVT VT, SDValue Operand) { 2203 // Constant fold unary operations with an integer constant operand. 2204 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2205 const APInt &Val = C->getAPIntValue(); 2206 unsigned BitWidth = VT.getSizeInBits(); 2207 switch (Opcode) { 2208 default: break; 2209 case ISD::SIGN_EXTEND: 2210 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 2211 case ISD::ANY_EXTEND: 2212 case ISD::ZERO_EXTEND: 2213 case ISD::TRUNCATE: 2214 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 2215 case ISD::UINT_TO_FP: 2216 case ISD::SINT_TO_FP: { 2217 const uint64_t zero[] = {0, 0}; 2218 // No compile time operations on this type. 2219 if (VT==MVT::ppcf128) 2220 break; 2221 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 2222 (void)apf.convertFromAPInt(Val, 2223 Opcode==ISD::SINT_TO_FP, 2224 APFloat::rmNearestTiesToEven); 2225 return getConstantFP(apf, VT); 2226 } 2227 case ISD::BIT_CONVERT: 2228 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2229 return getConstantFP(Val.bitsToFloat(), VT); 2230 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2231 return getConstantFP(Val.bitsToDouble(), VT); 2232 break; 2233 case ISD::BSWAP: 2234 return getConstant(Val.byteSwap(), VT); 2235 case ISD::CTPOP: 2236 return getConstant(Val.countPopulation(), VT); 2237 case ISD::CTLZ: 2238 return getConstant(Val.countLeadingZeros(), VT); 2239 case ISD::CTTZ: 2240 return getConstant(Val.countTrailingZeros(), VT); 2241 } 2242 } 2243 2244 // Constant fold unary operations with a floating point constant operand. 2245 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2246 APFloat V = C->getValueAPF(); // make copy 2247 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2248 switch (Opcode) { 2249 case ISD::FNEG: 2250 V.changeSign(); 2251 return getConstantFP(V, VT); 2252 case ISD::FABS: 2253 V.clearSign(); 2254 return getConstantFP(V, VT); 2255 case ISD::FP_ROUND: 2256 case ISD::FP_EXTEND: { 2257 bool ignored; 2258 // This can return overflow, underflow, or inexact; we don't care. 2259 // FIXME need to be more flexible about rounding mode. 2260 (void)V.convert(*MVTToAPFloatSemantics(VT), 2261 APFloat::rmNearestTiesToEven, &ignored); 2262 return getConstantFP(V, VT); 2263 } 2264 case ISD::FP_TO_SINT: 2265 case ISD::FP_TO_UINT: { 2266 integerPart x; 2267 bool ignored; 2268 assert(integerPartWidth >= 64); 2269 // FIXME need to be more flexible about rounding mode. 2270 APFloat::opStatus s = V.convertToInteger(&x, 64U, 2271 Opcode==ISD::FP_TO_SINT, 2272 APFloat::rmTowardZero, &ignored); 2273 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2274 break; 2275 return getConstant(x, VT); 2276 } 2277 case ISD::BIT_CONVERT: 2278 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2279 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2280 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2281 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2282 break; 2283 } 2284 } 2285 } 2286 2287 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2288 switch (Opcode) { 2289 case ISD::TokenFactor: 2290 case ISD::MERGE_VALUES: 2291 case ISD::CONCAT_VECTORS: 2292 return Operand; // Factor, merge or concat of one node? No need. 2293 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node"); 2294 case ISD::FP_EXTEND: 2295 assert(VT.isFloatingPoint() && 2296 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2297 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2298 if (Operand.getOpcode() == ISD::UNDEF) 2299 return getNode(ISD::UNDEF, VT); 2300 break; 2301 case ISD::SIGN_EXTEND: 2302 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2303 "Invalid SIGN_EXTEND!"); 2304 if (Operand.getValueType() == VT) return Operand; // noop extension 2305 assert(Operand.getValueType().bitsLT(VT) 2306 && "Invalid sext node, dst < src!"); 2307 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2308 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2309 break; 2310 case ISD::ZERO_EXTEND: 2311 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2312 "Invalid ZERO_EXTEND!"); 2313 if (Operand.getValueType() == VT) return Operand; // noop extension 2314 assert(Operand.getValueType().bitsLT(VT) 2315 && "Invalid zext node, dst < src!"); 2316 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2317 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0)); 2318 break; 2319 case ISD::ANY_EXTEND: 2320 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2321 "Invalid ANY_EXTEND!"); 2322 if (Operand.getValueType() == VT) return Operand; // noop extension 2323 assert(Operand.getValueType().bitsLT(VT) 2324 && "Invalid anyext node, dst < src!"); 2325 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2326 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2327 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2328 break; 2329 case ISD::TRUNCATE: 2330 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2331 "Invalid TRUNCATE!"); 2332 if (Operand.getValueType() == VT) return Operand; // noop truncate 2333 assert(Operand.getValueType().bitsGT(VT) 2334 && "Invalid truncate node, src < dst!"); 2335 if (OpOpcode == ISD::TRUNCATE) 2336 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); 2337 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2338 OpOpcode == ISD::ANY_EXTEND) { 2339 // If the source is smaller than the dest, we still need an extend. 2340 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT)) 2341 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2342 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2343 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); 2344 else 2345 return Operand.getNode()->getOperand(0); 2346 } 2347 break; 2348 case ISD::BIT_CONVERT: 2349 // Basic sanity checking. 2350 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2351 && "Cannot BIT_CONVERT between types of different sizes!"); 2352 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2353 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2354 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0)); 2355 if (OpOpcode == ISD::UNDEF) 2356 return getNode(ISD::UNDEF, VT); 2357 break; 2358 case ISD::SCALAR_TO_VECTOR: 2359 assert(VT.isVector() && !Operand.getValueType().isVector() && 2360 VT.getVectorElementType() == Operand.getValueType() && 2361 "Illegal SCALAR_TO_VECTOR node!"); 2362 if (OpOpcode == ISD::UNDEF) 2363 return getNode(ISD::UNDEF, VT); 2364 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2365 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2366 isa<ConstantSDNode>(Operand.getOperand(1)) && 2367 Operand.getConstantOperandVal(1) == 0 && 2368 Operand.getOperand(0).getValueType() == VT) 2369 return Operand.getOperand(0); 2370 break; 2371 case ISD::FNEG: 2372 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2373 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2374 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1), 2375 Operand.getNode()->getOperand(0)); 2376 if (OpOpcode == ISD::FNEG) // --X -> X 2377 return Operand.getNode()->getOperand(0); 2378 break; 2379 case ISD::FABS: 2380 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2381 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0)); 2382 break; 2383 } 2384 2385 SDNode *N; 2386 SDVTList VTs = getVTList(VT); 2387 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2388 FoldingSetNodeID ID; 2389 SDValue Ops[1] = { Operand }; 2390 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2391 void *IP = 0; 2392 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2393 return SDValue(E, 0); 2394 N = NodeAllocator.Allocate<UnarySDNode>(); 2395 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2396 CSEMap.InsertNode(N, IP); 2397 } else { 2398 N = NodeAllocator.Allocate<UnarySDNode>(); 2399 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2400 } 2401 2402 AllNodes.push_back(N); 2403#ifndef NDEBUG 2404 VerifyNode(N); 2405#endif 2406 return SDValue(N, 0); 2407} 2408 2409SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2410 MVT VT, 2411 ConstantSDNode *Cst1, 2412 ConstantSDNode *Cst2) { 2413 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2414 2415 switch (Opcode) { 2416 case ISD::ADD: return getConstant(C1 + C2, VT); 2417 case ISD::SUB: return getConstant(C1 - C2, VT); 2418 case ISD::MUL: return getConstant(C1 * C2, VT); 2419 case ISD::UDIV: 2420 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2421 break; 2422 case ISD::UREM: 2423 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2424 break; 2425 case ISD::SDIV: 2426 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2427 break; 2428 case ISD::SREM: 2429 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2430 break; 2431 case ISD::AND: return getConstant(C1 & C2, VT); 2432 case ISD::OR: return getConstant(C1 | C2, VT); 2433 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2434 case ISD::SHL: return getConstant(C1 << C2, VT); 2435 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2436 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2437 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2438 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2439 default: break; 2440 } 2441 2442 return SDValue(); 2443} 2444 2445SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2446 SDValue N1, SDValue N2) { 2447 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2); 2448} 2449 2450SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 2451 SDValue N1, SDValue N2) { 2452 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2453 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2454 switch (Opcode) { 2455 default: break; 2456 case ISD::TokenFactor: 2457 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2458 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2459 // Fold trivial token factors. 2460 if (N1.getOpcode() == ISD::EntryToken) return N2; 2461 if (N2.getOpcode() == ISD::EntryToken) return N1; 2462 if (N1 == N2) return N1; 2463 break; 2464 case ISD::CONCAT_VECTORS: 2465 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2466 // one big BUILD_VECTOR. 2467 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2468 N2.getOpcode() == ISD::BUILD_VECTOR) { 2469 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2470 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2471 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2472 } 2473 break; 2474 case ISD::AND: 2475 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2476 N1.getValueType() == VT && "Binary operator types must match!"); 2477 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2478 // worth handling here. 2479 if (N2C && N2C->isNullValue()) 2480 return N2; 2481 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2482 return N1; 2483 break; 2484 case ISD::OR: 2485 case ISD::XOR: 2486 case ISD::ADD: 2487 case ISD::SUB: 2488 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2489 N1.getValueType() == VT && "Binary operator types must match!"); 2490 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2491 // it's worth handling here. 2492 if (N2C && N2C->isNullValue()) 2493 return N1; 2494 break; 2495 case ISD::UDIV: 2496 case ISD::UREM: 2497 case ISD::MULHU: 2498 case ISD::MULHS: 2499 case ISD::MUL: 2500 case ISD::SDIV: 2501 case ISD::SREM: 2502 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2503 // fall through 2504 case ISD::FADD: 2505 case ISD::FSUB: 2506 case ISD::FMUL: 2507 case ISD::FDIV: 2508 case ISD::FREM: 2509 if (UnsafeFPMath) { 2510 if (Opcode == ISD::FADD) { 2511 // 0+x --> x 2512 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2513 if (CFP->getValueAPF().isZero()) 2514 return N2; 2515 // x+0 --> x 2516 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2517 if (CFP->getValueAPF().isZero()) 2518 return N1; 2519 } else if (Opcode == ISD::FSUB) { 2520 // x-0 --> x 2521 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2522 if (CFP->getValueAPF().isZero()) 2523 return N1; 2524 } 2525 } 2526 assert(N1.getValueType() == N2.getValueType() && 2527 N1.getValueType() == VT && "Binary operator types must match!"); 2528 break; 2529 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2530 assert(N1.getValueType() == VT && 2531 N1.getValueType().isFloatingPoint() && 2532 N2.getValueType().isFloatingPoint() && 2533 "Invalid FCOPYSIGN!"); 2534 break; 2535 case ISD::SHL: 2536 case ISD::SRA: 2537 case ISD::SRL: 2538 case ISD::ROTL: 2539 case ISD::ROTR: 2540 assert(VT == N1.getValueType() && 2541 "Shift operators return type must be the same as their first arg"); 2542 assert(VT.isInteger() && N2.getValueType().isInteger() && 2543 "Shifts only work on integers"); 2544 2545 // Always fold shifts of i1 values so the code generator doesn't need to 2546 // handle them. Since we know the size of the shift has to be less than the 2547 // size of the value, the shift/rotate count is guaranteed to be zero. 2548 if (VT == MVT::i1) 2549 return N1; 2550 break; 2551 case ISD::FP_ROUND_INREG: { 2552 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2553 assert(VT == N1.getValueType() && "Not an inreg round!"); 2554 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2555 "Cannot FP_ROUND_INREG integer types"); 2556 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2557 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2558 break; 2559 } 2560 case ISD::FP_ROUND: 2561 assert(VT.isFloatingPoint() && 2562 N1.getValueType().isFloatingPoint() && 2563 VT.bitsLE(N1.getValueType()) && 2564 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2565 if (N1.getValueType() == VT) return N1; // noop conversion. 2566 break; 2567 case ISD::AssertSext: 2568 case ISD::AssertZext: { 2569 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2570 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2571 assert(VT.isInteger() && EVT.isInteger() && 2572 "Cannot *_EXTEND_INREG FP types"); 2573 assert(EVT.bitsLE(VT) && "Not extending!"); 2574 if (VT == EVT) return N1; // noop assertion. 2575 break; 2576 } 2577 case ISD::SIGN_EXTEND_INREG: { 2578 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2579 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2580 assert(VT.isInteger() && EVT.isInteger() && 2581 "Cannot *_EXTEND_INREG FP types"); 2582 assert(EVT.bitsLE(VT) && "Not extending!"); 2583 if (EVT == VT) return N1; // Not actually extending 2584 2585 if (N1C) { 2586 APInt Val = N1C->getAPIntValue(); 2587 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits(); 2588 Val <<= Val.getBitWidth()-FromBits; 2589 Val = Val.ashr(Val.getBitWidth()-FromBits); 2590 return getConstant(Val, VT); 2591 } 2592 break; 2593 } 2594 case ISD::EXTRACT_VECTOR_ELT: 2595 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2596 if (N1.getOpcode() == ISD::UNDEF) 2597 return getNode(ISD::UNDEF, VT); 2598 2599 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2600 // expanding copies of large vectors from registers. 2601 if (N2C && 2602 N1.getOpcode() == ISD::CONCAT_VECTORS && 2603 N1.getNumOperands() > 0) { 2604 unsigned Factor = 2605 N1.getOperand(0).getValueType().getVectorNumElements(); 2606 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, 2607 N1.getOperand(N2C->getZExtValue() / Factor), 2608 getConstant(N2C->getZExtValue() % Factor, 2609 N2.getValueType())); 2610 } 2611 2612 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2613 // expanding large vector constants. 2614 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) 2615 return N1.getOperand(N2C->getZExtValue()); 2616 2617 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2618 // operations are lowered to scalars. 2619 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2620 // If the indices are the same, return the inserted element. 2621 if (N1.getOperand(2) == N2) 2622 return N1.getOperand(1); 2623 // If the indices are known different, extract the element from 2624 // the original vector. 2625 else if (isa<ConstantSDNode>(N1.getOperand(2)) && 2626 isa<ConstantSDNode>(N2)) 2627 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2); 2628 } 2629 break; 2630 case ISD::EXTRACT_ELEMENT: 2631 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2632 assert(!N1.getValueType().isVector() && !VT.isVector() && 2633 (N1.getValueType().isInteger() == VT.isInteger()) && 2634 "Wrong types for EXTRACT_ELEMENT!"); 2635 2636 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2637 // 64-bit integers into 32-bit parts. Instead of building the extract of 2638 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2639 if (N1.getOpcode() == ISD::BUILD_PAIR) 2640 return N1.getOperand(N2C->getZExtValue()); 2641 2642 // EXTRACT_ELEMENT of a constant int is also very common. 2643 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2644 unsigned ElementSize = VT.getSizeInBits(); 2645 unsigned Shift = ElementSize * N2C->getZExtValue(); 2646 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2647 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2648 } 2649 break; 2650 case ISD::EXTRACT_SUBVECTOR: 2651 if (N1.getValueType() == VT) // Trivial extraction. 2652 return N1; 2653 break; 2654 } 2655 2656 if (N1C) { 2657 if (N2C) { 2658 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2659 if (SV.getNode()) return SV; 2660 } else { // Cannonicalize constant to RHS if commutative 2661 if (isCommutativeBinOp(Opcode)) { 2662 std::swap(N1C, N2C); 2663 std::swap(N1, N2); 2664 } 2665 } 2666 } 2667 2668 // Constant fold FP operations. 2669 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2670 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2671 if (N1CFP) { 2672 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2673 // Cannonicalize constant to RHS if commutative 2674 std::swap(N1CFP, N2CFP); 2675 std::swap(N1, N2); 2676 } else if (N2CFP && VT != MVT::ppcf128) { 2677 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2678 APFloat::opStatus s; 2679 switch (Opcode) { 2680 case ISD::FADD: 2681 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2682 if (s != APFloat::opInvalidOp) 2683 return getConstantFP(V1, VT); 2684 break; 2685 case ISD::FSUB: 2686 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2687 if (s!=APFloat::opInvalidOp) 2688 return getConstantFP(V1, VT); 2689 break; 2690 case ISD::FMUL: 2691 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2692 if (s!=APFloat::opInvalidOp) 2693 return getConstantFP(V1, VT); 2694 break; 2695 case ISD::FDIV: 2696 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2697 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2698 return getConstantFP(V1, VT); 2699 break; 2700 case ISD::FREM : 2701 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2702 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2703 return getConstantFP(V1, VT); 2704 break; 2705 case ISD::FCOPYSIGN: 2706 V1.copySign(V2); 2707 return getConstantFP(V1, VT); 2708 default: break; 2709 } 2710 } 2711 } 2712 2713 // Canonicalize an UNDEF to the RHS, even over a constant. 2714 if (N1.getOpcode() == ISD::UNDEF) { 2715 if (isCommutativeBinOp(Opcode)) { 2716 std::swap(N1, N2); 2717 } else { 2718 switch (Opcode) { 2719 case ISD::FP_ROUND_INREG: 2720 case ISD::SIGN_EXTEND_INREG: 2721 case ISD::SUB: 2722 case ISD::FSUB: 2723 case ISD::FDIV: 2724 case ISD::FREM: 2725 case ISD::SRA: 2726 return N1; // fold op(undef, arg2) -> undef 2727 case ISD::UDIV: 2728 case ISD::SDIV: 2729 case ISD::UREM: 2730 case ISD::SREM: 2731 case ISD::SRL: 2732 case ISD::SHL: 2733 if (!VT.isVector()) 2734 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2735 // For vectors, we can't easily build an all zero vector, just return 2736 // the LHS. 2737 return N2; 2738 } 2739 } 2740 } 2741 2742 // Fold a bunch of operators when the RHS is undef. 2743 if (N2.getOpcode() == ISD::UNDEF) { 2744 switch (Opcode) { 2745 case ISD::XOR: 2746 if (N1.getOpcode() == ISD::UNDEF) 2747 // Handle undef ^ undef -> 0 special case. This is a common 2748 // idiom (misuse). 2749 return getConstant(0, VT); 2750 // fallthrough 2751 case ISD::ADD: 2752 case ISD::ADDC: 2753 case ISD::ADDE: 2754 case ISD::SUB: 2755 case ISD::FADD: 2756 case ISD::FSUB: 2757 case ISD::FMUL: 2758 case ISD::FDIV: 2759 case ISD::FREM: 2760 case ISD::UDIV: 2761 case ISD::SDIV: 2762 case ISD::UREM: 2763 case ISD::SREM: 2764 return N2; // fold op(arg1, undef) -> undef 2765 case ISD::MUL: 2766 case ISD::AND: 2767 case ISD::SRL: 2768 case ISD::SHL: 2769 if (!VT.isVector()) 2770 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2771 // For vectors, we can't easily build an all zero vector, just return 2772 // the LHS. 2773 return N1; 2774 case ISD::OR: 2775 if (!VT.isVector()) 2776 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2777 // For vectors, we can't easily build an all one vector, just return 2778 // the LHS. 2779 return N1; 2780 case ISD::SRA: 2781 return N1; 2782 } 2783 } 2784 2785 // Memoize this node if possible. 2786 SDNode *N; 2787 SDVTList VTs = getVTList(VT); 2788 if (VT != MVT::Flag) { 2789 SDValue Ops[] = { N1, N2 }; 2790 FoldingSetNodeID ID; 2791 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2792 void *IP = 0; 2793 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2794 return SDValue(E, 0); 2795 N = NodeAllocator.Allocate<BinarySDNode>(); 2796 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2797 CSEMap.InsertNode(N, IP); 2798 } else { 2799 N = NodeAllocator.Allocate<BinarySDNode>(); 2800 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2801 } 2802 2803 AllNodes.push_back(N); 2804#ifndef NDEBUG 2805 VerifyNode(N); 2806#endif 2807 return SDValue(N, 0); 2808} 2809 2810SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2811 SDValue N1, SDValue N2, SDValue N3) { 2812 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3); 2813} 2814 2815SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 2816 SDValue N1, SDValue N2, SDValue N3) { 2817 // Perform various simplifications. 2818 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2819 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2820 switch (Opcode) { 2821 case ISD::CONCAT_VECTORS: 2822 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2823 // one big BUILD_VECTOR. 2824 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2825 N2.getOpcode() == ISD::BUILD_VECTOR && 2826 N3.getOpcode() == ISD::BUILD_VECTOR) { 2827 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2828 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2829 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2830 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2831 } 2832 break; 2833 case ISD::SETCC: { 2834 // Use FoldSetCC to simplify SETCC's. 2835 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 2836 if (Simp.getNode()) return Simp; 2837 break; 2838 } 2839 case ISD::SELECT: 2840 if (N1C) { 2841 if (N1C->getZExtValue()) 2842 return N2; // select true, X, Y -> X 2843 else 2844 return N3; // select false, X, Y -> Y 2845 } 2846 2847 if (N2 == N3) return N2; // select C, X, X -> X 2848 break; 2849 case ISD::BRCOND: 2850 if (N2C) { 2851 if (N2C->getZExtValue()) // Unconditional branch 2852 return getNode(ISD::BR, MVT::Other, N1, N3); 2853 else 2854 return N1; // Never-taken branch 2855 } 2856 break; 2857 case ISD::VECTOR_SHUFFLE: 2858 assert(N1.getValueType() == N2.getValueType() && 2859 N1.getValueType().isVector() && 2860 VT.isVector() && N3.getValueType().isVector() && 2861 N3.getOpcode() == ISD::BUILD_VECTOR && 2862 VT.getVectorNumElements() == N3.getNumOperands() && 2863 "Illegal VECTOR_SHUFFLE node!"); 2864 break; 2865 case ISD::BIT_CONVERT: 2866 // Fold bit_convert nodes from a type to themselves. 2867 if (N1.getValueType() == VT) 2868 return N1; 2869 break; 2870 } 2871 2872 // Memoize node if it doesn't produce a flag. 2873 SDNode *N; 2874 SDVTList VTs = getVTList(VT); 2875 if (VT != MVT::Flag) { 2876 SDValue Ops[] = { N1, N2, N3 }; 2877 FoldingSetNodeID ID; 2878 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 2879 void *IP = 0; 2880 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2881 return SDValue(E, 0); 2882 N = NodeAllocator.Allocate<TernarySDNode>(); 2883 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 2884 CSEMap.InsertNode(N, IP); 2885 } else { 2886 N = NodeAllocator.Allocate<TernarySDNode>(); 2887 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 2888 } 2889 AllNodes.push_back(N); 2890#ifndef NDEBUG 2891 VerifyNode(N); 2892#endif 2893 return SDValue(N, 0); 2894} 2895 2896SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2897 SDValue N1, SDValue N2, SDValue N3, 2898 SDValue N4) { 2899 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4); 2900} 2901 2902SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 2903 SDValue N1, SDValue N2, SDValue N3, 2904 SDValue N4) { 2905 SDValue Ops[] = { N1, N2, N3, N4 }; 2906 return getNode(Opcode, DL, VT, Ops, 4); 2907} 2908 2909SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2910 SDValue N1, SDValue N2, SDValue N3, 2911 SDValue N4, SDValue N5) { 2912 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4, N5); 2913} 2914 2915SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 2916 SDValue N1, SDValue N2, SDValue N3, 2917 SDValue N4, SDValue N5) { 2918 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 2919 return getNode(Opcode, DL, VT, Ops, 5); 2920} 2921 2922/// getMemsetValue - Vectorized representation of the memset value 2923/// operand. 2924static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) { 2925 unsigned NumBits = VT.isVector() ? 2926 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 2927 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 2928 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 2929 unsigned Shift = 8; 2930 for (unsigned i = NumBits; i > 8; i >>= 1) { 2931 Val = (Val << Shift) | Val; 2932 Shift <<= 1; 2933 } 2934 if (VT.isInteger()) 2935 return DAG.getConstant(Val, VT); 2936 return DAG.getConstantFP(APFloat(Val), VT); 2937 } 2938 2939 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2940 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value); 2941 unsigned Shift = 8; 2942 for (unsigned i = NumBits; i > 8; i >>= 1) { 2943 Value = DAG.getNode(ISD::OR, VT, 2944 DAG.getNode(ISD::SHL, VT, Value, 2945 DAG.getConstant(Shift, 2946 TLI.getShiftAmountTy())), 2947 Value); 2948 Shift <<= 1; 2949 } 2950 2951 return Value; 2952} 2953 2954/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 2955/// used when a memcpy is turned into a memset when the source is a constant 2956/// string ptr. 2957static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG, 2958 const TargetLowering &TLI, 2959 std::string &Str, unsigned Offset) { 2960 // Handle vector with all elements zero. 2961 if (Str.empty()) { 2962 if (VT.isInteger()) 2963 return DAG.getConstant(0, VT); 2964 unsigned NumElts = VT.getVectorNumElements(); 2965 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 2966 return DAG.getNode(ISD::BIT_CONVERT, VT, 2967 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts))); 2968 } 2969 2970 assert(!VT.isVector() && "Can't handle vector type here!"); 2971 unsigned NumBits = VT.getSizeInBits(); 2972 unsigned MSB = NumBits / 8; 2973 uint64_t Val = 0; 2974 if (TLI.isLittleEndian()) 2975 Offset = Offset + MSB - 1; 2976 for (unsigned i = 0; i != MSB; ++i) { 2977 Val = (Val << 8) | (unsigned char)Str[Offset]; 2978 Offset += TLI.isLittleEndian() ? -1 : 1; 2979 } 2980 return DAG.getConstant(Val, VT); 2981} 2982 2983/// getMemBasePlusOffset - Returns base and offset node for the 2984/// 2985static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 2986 SelectionDAG &DAG) { 2987 MVT VT = Base.getValueType(); 2988 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT)); 2989} 2990 2991/// isMemSrcFromString - Returns true if memcpy source is a string constant. 2992/// 2993static bool isMemSrcFromString(SDValue Src, std::string &Str) { 2994 unsigned SrcDelta = 0; 2995 GlobalAddressSDNode *G = NULL; 2996 if (Src.getOpcode() == ISD::GlobalAddress) 2997 G = cast<GlobalAddressSDNode>(Src); 2998 else if (Src.getOpcode() == ISD::ADD && 2999 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3000 Src.getOperand(1).getOpcode() == ISD::Constant) { 3001 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3002 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3003 } 3004 if (!G) 3005 return false; 3006 3007 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3008 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3009 return true; 3010 3011 return false; 3012} 3013 3014/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 3015/// to replace the memset / memcpy is below the threshold. It also returns the 3016/// types of the sequence of memory ops to perform memset / memcpy. 3017static 3018bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps, 3019 SDValue Dst, SDValue Src, 3020 unsigned Limit, uint64_t Size, unsigned &Align, 3021 std::string &Str, bool &isSrcStr, 3022 SelectionDAG &DAG, 3023 const TargetLowering &TLI) { 3024 isSrcStr = isMemSrcFromString(Src, Str); 3025 bool isSrcConst = isa<ConstantSDNode>(Src); 3026 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(); 3027 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr); 3028 if (VT != MVT::iAny) { 3029 unsigned NewAlign = (unsigned) 3030 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT()); 3031 // If source is a string constant, this will require an unaligned load. 3032 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 3033 if (Dst.getOpcode() != ISD::FrameIndex) { 3034 // Can't change destination alignment. It requires a unaligned store. 3035 if (AllowUnalign) 3036 VT = MVT::iAny; 3037 } else { 3038 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 3039 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3040 if (MFI->isFixedObjectIndex(FI)) { 3041 // Can't change destination alignment. It requires a unaligned store. 3042 if (AllowUnalign) 3043 VT = MVT::iAny; 3044 } else { 3045 // Give the stack frame object a larger alignment if needed. 3046 if (MFI->getObjectAlignment(FI) < NewAlign) 3047 MFI->setObjectAlignment(FI, NewAlign); 3048 Align = NewAlign; 3049 } 3050 } 3051 } 3052 } 3053 3054 if (VT == MVT::iAny) { 3055 if (AllowUnalign) { 3056 VT = MVT::i64; 3057 } else { 3058 switch (Align & 7) { 3059 case 0: VT = MVT::i64; break; 3060 case 4: VT = MVT::i32; break; 3061 case 2: VT = MVT::i16; break; 3062 default: VT = MVT::i8; break; 3063 } 3064 } 3065 3066 MVT LVT = MVT::i64; 3067 while (!TLI.isTypeLegal(LVT)) 3068 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1); 3069 assert(LVT.isInteger()); 3070 3071 if (VT.bitsGT(LVT)) 3072 VT = LVT; 3073 } 3074 3075 unsigned NumMemOps = 0; 3076 while (Size != 0) { 3077 unsigned VTSize = VT.getSizeInBits() / 8; 3078 while (VTSize > Size) { 3079 // For now, only use non-vector load / store's for the left-over pieces. 3080 if (VT.isVector()) { 3081 VT = MVT::i64; 3082 while (!TLI.isTypeLegal(VT)) 3083 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 3084 VTSize = VT.getSizeInBits() / 8; 3085 } else { 3086 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 3087 VTSize >>= 1; 3088 } 3089 } 3090 3091 if (++NumMemOps > Limit) 3092 return false; 3093 MemOps.push_back(VT); 3094 Size -= VTSize; 3095 } 3096 3097 return true; 3098} 3099 3100static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, 3101 SDValue Chain, SDValue Dst, 3102 SDValue Src, uint64_t Size, 3103 unsigned Align, bool AlwaysInline, 3104 const Value *DstSV, uint64_t DstSVOff, 3105 const Value *SrcSV, uint64_t SrcSVOff){ 3106 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3107 3108 // Expand memcpy to a series of load and store ops if the size operand falls 3109 // below a certain threshold. 3110 std::vector<MVT> MemOps; 3111 uint64_t Limit = -1ULL; 3112 if (!AlwaysInline) 3113 Limit = TLI.getMaxStoresPerMemcpy(); 3114 unsigned DstAlign = Align; // Destination alignment can change. 3115 std::string Str; 3116 bool CopyFromStr; 3117 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3118 Str, CopyFromStr, DAG, TLI)) 3119 return SDValue(); 3120 3121 3122 bool isZeroStr = CopyFromStr && Str.empty(); 3123 SmallVector<SDValue, 8> OutChains; 3124 unsigned NumMemOps = MemOps.size(); 3125 uint64_t SrcOff = 0, DstOff = 0; 3126 for (unsigned i = 0; i < NumMemOps; i++) { 3127 MVT VT = MemOps[i]; 3128 unsigned VTSize = VT.getSizeInBits() / 8; 3129 SDValue Value, Store; 3130 3131 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 3132 // It's unlikely a store of a vector immediate can be done in a single 3133 // instruction. It would require a load from a constantpool first. 3134 // We also handle store a vector with all zero's. 3135 // FIXME: Handle other cases where store of vector immediate is done in 3136 // a single instruction. 3137 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff); 3138 Store = DAG.getStore(Chain, Value, 3139 getMemBasePlusOffset(Dst, DstOff, DAG), 3140 DstSV, DstSVOff + DstOff, false, DstAlign); 3141 } else { 3142 Value = DAG.getLoad(VT, Chain, 3143 getMemBasePlusOffset(Src, SrcOff, DAG), 3144 SrcSV, SrcSVOff + SrcOff, false, Align); 3145 Store = DAG.getStore(Chain, Value, 3146 getMemBasePlusOffset(Dst, DstOff, DAG), 3147 DstSV, DstSVOff + DstOff, false, DstAlign); 3148 } 3149 OutChains.push_back(Store); 3150 SrcOff += VTSize; 3151 DstOff += VTSize; 3152 } 3153 3154 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3155 &OutChains[0], OutChains.size()); 3156} 3157 3158static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, 3159 SDValue Chain, SDValue Dst, 3160 SDValue Src, uint64_t Size, 3161 unsigned Align, bool AlwaysInline, 3162 const Value *DstSV, uint64_t DstSVOff, 3163 const Value *SrcSV, uint64_t SrcSVOff){ 3164 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3165 3166 // Expand memmove to a series of load and store ops if the size operand falls 3167 // below a certain threshold. 3168 std::vector<MVT> MemOps; 3169 uint64_t Limit = -1ULL; 3170 if (!AlwaysInline) 3171 Limit = TLI.getMaxStoresPerMemmove(); 3172 unsigned DstAlign = Align; // Destination alignment can change. 3173 std::string Str; 3174 bool CopyFromStr; 3175 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3176 Str, CopyFromStr, DAG, TLI)) 3177 return SDValue(); 3178 3179 uint64_t SrcOff = 0, DstOff = 0; 3180 3181 SmallVector<SDValue, 8> LoadValues; 3182 SmallVector<SDValue, 8> LoadChains; 3183 SmallVector<SDValue, 8> OutChains; 3184 unsigned NumMemOps = MemOps.size(); 3185 for (unsigned i = 0; i < NumMemOps; i++) { 3186 MVT VT = MemOps[i]; 3187 unsigned VTSize = VT.getSizeInBits() / 8; 3188 SDValue Value, Store; 3189 3190 Value = DAG.getLoad(VT, Chain, 3191 getMemBasePlusOffset(Src, SrcOff, DAG), 3192 SrcSV, SrcSVOff + SrcOff, false, Align); 3193 LoadValues.push_back(Value); 3194 LoadChains.push_back(Value.getValue(1)); 3195 SrcOff += VTSize; 3196 } 3197 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, 3198 &LoadChains[0], LoadChains.size()); 3199 OutChains.clear(); 3200 for (unsigned i = 0; i < NumMemOps; i++) { 3201 MVT VT = MemOps[i]; 3202 unsigned VTSize = VT.getSizeInBits() / 8; 3203 SDValue Value, Store; 3204 3205 Store = DAG.getStore(Chain, LoadValues[i], 3206 getMemBasePlusOffset(Dst, DstOff, DAG), 3207 DstSV, DstSVOff + DstOff, false, DstAlign); 3208 OutChains.push_back(Store); 3209 DstOff += VTSize; 3210 } 3211 3212 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3213 &OutChains[0], OutChains.size()); 3214} 3215 3216static SDValue getMemsetStores(SelectionDAG &DAG, 3217 SDValue Chain, SDValue Dst, 3218 SDValue Src, uint64_t Size, 3219 unsigned Align, 3220 const Value *DstSV, uint64_t DstSVOff) { 3221 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3222 3223 // Expand memset to a series of load/store ops if the size operand 3224 // falls below a certain threshold. 3225 std::vector<MVT> MemOps; 3226 std::string Str; 3227 bool CopyFromStr; 3228 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 3229 Size, Align, Str, CopyFromStr, DAG, TLI)) 3230 return SDValue(); 3231 3232 SmallVector<SDValue, 8> OutChains; 3233 uint64_t DstOff = 0; 3234 3235 unsigned NumMemOps = MemOps.size(); 3236 for (unsigned i = 0; i < NumMemOps; i++) { 3237 MVT VT = MemOps[i]; 3238 unsigned VTSize = VT.getSizeInBits() / 8; 3239 SDValue Value = getMemsetValue(Src, VT, DAG); 3240 SDValue Store = DAG.getStore(Chain, Value, 3241 getMemBasePlusOffset(Dst, DstOff, DAG), 3242 DstSV, DstSVOff + DstOff); 3243 OutChains.push_back(Store); 3244 DstOff += VTSize; 3245 } 3246 3247 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3248 &OutChains[0], OutChains.size()); 3249} 3250 3251SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst, 3252 SDValue Src, SDValue Size, 3253 unsigned Align, bool AlwaysInline, 3254 const Value *DstSV, uint64_t DstSVOff, 3255 const Value *SrcSV, uint64_t SrcSVOff) { 3256 3257 // Check to see if we should lower the memcpy to loads and stores first. 3258 // For cases within the target-specified limits, this is the best choice. 3259 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3260 if (ConstantSize) { 3261 // Memcpy with size zero? Just return the original chain. 3262 if (ConstantSize->isNullValue()) 3263 return Chain; 3264 3265 SDValue Result = 3266 getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 3267 ConstantSize->getZExtValue(), 3268 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3269 if (Result.getNode()) 3270 return Result; 3271 } 3272 3273 // Then check to see if we should lower the memcpy with target-specific 3274 // code. If the target chooses to do this, this is the next best. 3275 SDValue Result = 3276 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align, 3277 AlwaysInline, 3278 DstSV, DstSVOff, SrcSV, SrcSVOff); 3279 if (Result.getNode()) 3280 return Result; 3281 3282 // If we really need inline code and the target declined to provide it, 3283 // use a (potentially long) sequence of loads and stores. 3284 if (AlwaysInline) { 3285 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3286 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 3287 ConstantSize->getZExtValue(), Align, true, 3288 DstSV, DstSVOff, SrcSV, SrcSVOff); 3289 } 3290 3291 // Emit a library call. 3292 TargetLowering::ArgListTy Args; 3293 TargetLowering::ArgListEntry Entry; 3294 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3295 Entry.Node = Dst; Args.push_back(Entry); 3296 Entry.Node = Src; Args.push_back(Entry); 3297 Entry.Node = Size; Args.push_back(Entry); 3298 // FIXME: pass in DebugLoc 3299 std::pair<SDValue,SDValue> CallResult = 3300 TLI.LowerCallTo(Chain, Type::VoidTy, 3301 false, false, false, false, CallingConv::C, false, 3302 getExternalSymbol("memcpy", TLI.getPointerTy()), 3303 Args, *this, DebugLoc::getUnknownLoc()); 3304 return CallResult.second; 3305} 3306 3307SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst, 3308 SDValue Src, SDValue Size, 3309 unsigned Align, 3310 const Value *DstSV, uint64_t DstSVOff, 3311 const Value *SrcSV, uint64_t SrcSVOff) { 3312 3313 // Check to see if we should lower the memmove to loads and stores first. 3314 // For cases within the target-specified limits, this is the best choice. 3315 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3316 if (ConstantSize) { 3317 // Memmove with size zero? Just return the original chain. 3318 if (ConstantSize->isNullValue()) 3319 return Chain; 3320 3321 SDValue Result = 3322 getMemmoveLoadsAndStores(*this, Chain, Dst, Src, 3323 ConstantSize->getZExtValue(), 3324 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3325 if (Result.getNode()) 3326 return Result; 3327 } 3328 3329 // Then check to see if we should lower the memmove with target-specific 3330 // code. If the target chooses to do this, this is the next best. 3331 SDValue Result = 3332 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align, 3333 DstSV, DstSVOff, SrcSV, SrcSVOff); 3334 if (Result.getNode()) 3335 return Result; 3336 3337 // Emit a library call. 3338 TargetLowering::ArgListTy Args; 3339 TargetLowering::ArgListEntry Entry; 3340 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3341 Entry.Node = Dst; Args.push_back(Entry); 3342 Entry.Node = Src; Args.push_back(Entry); 3343 Entry.Node = Size; Args.push_back(Entry); 3344 // FIXME: pass in DebugLoc 3345 std::pair<SDValue,SDValue> CallResult = 3346 TLI.LowerCallTo(Chain, Type::VoidTy, 3347 false, false, false, false, CallingConv::C, false, 3348 getExternalSymbol("memmove", TLI.getPointerTy()), 3349 Args, *this, DebugLoc::getUnknownLoc()); 3350 return CallResult.second; 3351} 3352 3353SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst, 3354 SDValue Src, SDValue Size, 3355 unsigned Align, 3356 const Value *DstSV, uint64_t DstSVOff) { 3357 3358 // Check to see if we should lower the memset to stores first. 3359 // For cases within the target-specified limits, this is the best choice. 3360 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3361 if (ConstantSize) { 3362 // Memset with size zero? Just return the original chain. 3363 if (ConstantSize->isNullValue()) 3364 return Chain; 3365 3366 SDValue Result = 3367 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(), 3368 Align, DstSV, DstSVOff); 3369 if (Result.getNode()) 3370 return Result; 3371 } 3372 3373 // Then check to see if we should lower the memset with target-specific 3374 // code. If the target chooses to do this, this is the next best. 3375 SDValue Result = 3376 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align, 3377 DstSV, DstSVOff); 3378 if (Result.getNode()) 3379 return Result; 3380 3381 // Emit a library call. 3382 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(); 3383 TargetLowering::ArgListTy Args; 3384 TargetLowering::ArgListEntry Entry; 3385 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3386 Args.push_back(Entry); 3387 // Extend or truncate the argument to be an i32 value for the call. 3388 if (Src.getValueType().bitsGT(MVT::i32)) 3389 Src = getNode(ISD::TRUNCATE, MVT::i32, Src); 3390 else 3391 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src); 3392 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true; 3393 Args.push_back(Entry); 3394 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false; 3395 Args.push_back(Entry); 3396 // FIXME: pass in DebugLoc 3397 std::pair<SDValue,SDValue> CallResult = 3398 TLI.LowerCallTo(Chain, Type::VoidTy, 3399 false, false, false, false, CallingConv::C, false, 3400 getExternalSymbol("memset", TLI.getPointerTy()), 3401 Args, *this, DebugLoc::getUnknownLoc()); 3402 return CallResult.second; 3403} 3404 3405SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT, 3406 SDValue Chain, 3407 SDValue Ptr, SDValue Cmp, 3408 SDValue Swp, const Value* PtrVal, 3409 unsigned Alignment) { 3410 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3411 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3412 3413 MVT VT = Cmp.getValueType(); 3414 3415 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3416 Alignment = getMVTAlignment(MemVT); 3417 3418 SDVTList VTs = getVTList(VT, MVT::Other); 3419 FoldingSetNodeID ID; 3420 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3421 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3422 void* IP = 0; 3423 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3424 return SDValue(E, 0); 3425 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3426 new (N) AtomicSDNode(Opcode, VTs, MemVT, 3427 Chain, Ptr, Cmp, Swp, PtrVal, Alignment); 3428 CSEMap.InsertNode(N, IP); 3429 AllNodes.push_back(N); 3430 return SDValue(N, 0); 3431} 3432 3433SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT, 3434 SDValue Chain, 3435 SDValue Ptr, SDValue Cmp, 3436 SDValue Swp, const Value* PtrVal, 3437 unsigned Alignment) { 3438 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3439 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3440 3441 MVT VT = Cmp.getValueType(); 3442 3443 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3444 Alignment = getMVTAlignment(MemVT); 3445 3446 SDVTList VTs = getVTList(VT, MVT::Other); 3447 FoldingSetNodeID ID; 3448 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3449 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3450 void* IP = 0; 3451 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3452 return SDValue(E, 0); 3453 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3454 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, 3455 Chain, Ptr, Cmp, Swp, PtrVal, Alignment); 3456 CSEMap.InsertNode(N, IP); 3457 AllNodes.push_back(N); 3458 return SDValue(N, 0); 3459} 3460 3461SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT, 3462 SDValue Chain, 3463 SDValue Ptr, SDValue Val, 3464 const Value* PtrVal, 3465 unsigned Alignment) { 3466 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3467 Opcode == ISD::ATOMIC_LOAD_SUB || 3468 Opcode == ISD::ATOMIC_LOAD_AND || 3469 Opcode == ISD::ATOMIC_LOAD_OR || 3470 Opcode == ISD::ATOMIC_LOAD_XOR || 3471 Opcode == ISD::ATOMIC_LOAD_NAND || 3472 Opcode == ISD::ATOMIC_LOAD_MIN || 3473 Opcode == ISD::ATOMIC_LOAD_MAX || 3474 Opcode == ISD::ATOMIC_LOAD_UMIN || 3475 Opcode == ISD::ATOMIC_LOAD_UMAX || 3476 Opcode == ISD::ATOMIC_SWAP) && 3477 "Invalid Atomic Op"); 3478 3479 MVT VT = Val.getValueType(); 3480 3481 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3482 Alignment = getMVTAlignment(MemVT); 3483 3484 SDVTList VTs = getVTList(VT, MVT::Other); 3485 FoldingSetNodeID ID; 3486 SDValue Ops[] = {Chain, Ptr, Val}; 3487 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3488 void* IP = 0; 3489 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3490 return SDValue(E, 0); 3491 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3492 new (N) AtomicSDNode(Opcode, VTs, MemVT, 3493 Chain, Ptr, Val, PtrVal, Alignment); 3494 CSEMap.InsertNode(N, IP); 3495 AllNodes.push_back(N); 3496 return SDValue(N, 0); 3497} 3498 3499SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT, 3500 SDValue Chain, 3501 SDValue Ptr, SDValue Val, 3502 const Value* PtrVal, 3503 unsigned Alignment) { 3504 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3505 Opcode == ISD::ATOMIC_LOAD_SUB || 3506 Opcode == ISD::ATOMIC_LOAD_AND || 3507 Opcode == ISD::ATOMIC_LOAD_OR || 3508 Opcode == ISD::ATOMIC_LOAD_XOR || 3509 Opcode == ISD::ATOMIC_LOAD_NAND || 3510 Opcode == ISD::ATOMIC_LOAD_MIN || 3511 Opcode == ISD::ATOMIC_LOAD_MAX || 3512 Opcode == ISD::ATOMIC_LOAD_UMIN || 3513 Opcode == ISD::ATOMIC_LOAD_UMAX || 3514 Opcode == ISD::ATOMIC_SWAP) && 3515 "Invalid Atomic Op"); 3516 3517 MVT VT = Val.getValueType(); 3518 3519 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3520 Alignment = getMVTAlignment(MemVT); 3521 3522 SDVTList VTs = getVTList(VT, MVT::Other); 3523 FoldingSetNodeID ID; 3524 SDValue Ops[] = {Chain, Ptr, Val}; 3525 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3526 void* IP = 0; 3527 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3528 return SDValue(E, 0); 3529 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3530 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, 3531 Chain, Ptr, Val, PtrVal, Alignment); 3532 CSEMap.InsertNode(N, IP); 3533 AllNodes.push_back(N); 3534 return SDValue(N, 0); 3535} 3536 3537/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3538/// Allowed to return something different (and simpler) if Simplify is true. 3539SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps) { 3540 if (NumOps == 1) 3541 return Ops[0]; 3542 3543 SmallVector<MVT, 4> VTs; 3544 VTs.reserve(NumOps); 3545 for (unsigned i = 0; i < NumOps; ++i) 3546 VTs.push_back(Ops[i].getValueType()); 3547 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps); 3548} 3549 3550/// DebugLoc-aware version. 3551SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3552 DebugLoc dl) { 3553 if (NumOps == 1) 3554 return Ops[0]; 3555 3556 SmallVector<MVT, 4> VTs; 3557 VTs.reserve(NumOps); 3558 for (unsigned i = 0; i < NumOps; ++i) 3559 VTs.push_back(Ops[i].getValueType()); 3560 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3561 Ops, NumOps); 3562} 3563 3564SDValue 3565SelectionDAG::getMemIntrinsicNode(unsigned Opcode, 3566 const MVT *VTs, unsigned NumVTs, 3567 const SDValue *Ops, unsigned NumOps, 3568 MVT MemVT, const Value *srcValue, int SVOff, 3569 unsigned Align, bool Vol, 3570 bool ReadMem, bool WriteMem) { 3571 return getMemIntrinsicNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps, 3572 MemVT, srcValue, SVOff, Align, Vol, 3573 ReadMem, WriteMem); 3574} 3575 3576SDValue 3577SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3578 const MVT *VTs, unsigned NumVTs, 3579 const SDValue *Ops, unsigned NumOps, 3580 MVT MemVT, const Value *srcValue, int SVOff, 3581 unsigned Align, bool Vol, 3582 bool ReadMem, bool WriteMem) { 3583 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3584 MemVT, srcValue, SVOff, Align, Vol, 3585 ReadMem, WriteMem); 3586} 3587 3588SDValue 3589SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDVTList VTList, 3590 const SDValue *Ops, unsigned NumOps, 3591 MVT MemVT, const Value *srcValue, int SVOff, 3592 unsigned Align, bool Vol, 3593 bool ReadMem, bool WriteMem) { 3594 // Memoize the node unless it returns a flag. 3595 MemIntrinsicSDNode *N; 3596 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3597 FoldingSetNodeID ID; 3598 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3599 void *IP = 0; 3600 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3601 return SDValue(E, 0); 3602 3603 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3604 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT, 3605 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3606 CSEMap.InsertNode(N, IP); 3607 } else { 3608 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3609 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT, 3610 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3611 } 3612 AllNodes.push_back(N); 3613 return SDValue(N, 0); 3614} 3615 3616SDValue 3617SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3618 const SDValue *Ops, unsigned NumOps, 3619 MVT MemVT, const Value *srcValue, int SVOff, 3620 unsigned Align, bool Vol, 3621 bool ReadMem, bool WriteMem) { 3622 // Memoize the node unless it returns a flag. 3623 MemIntrinsicSDNode *N; 3624 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3625 FoldingSetNodeID ID; 3626 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3627 void *IP = 0; 3628 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3629 return SDValue(E, 0); 3630 3631 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3632 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, 3633 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3634 CSEMap.InsertNode(N, IP); 3635 } else { 3636 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3637 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, 3638 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3639 } 3640 AllNodes.push_back(N); 3641 return SDValue(N, 0); 3642} 3643 3644SDValue 3645SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall, 3646 bool IsInreg, SDVTList VTs, 3647 const SDValue *Operands, unsigned NumOperands) { 3648 // Do not include isTailCall in the folding set profile. 3649 FoldingSetNodeID ID; 3650 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands); 3651 ID.AddInteger(CallingConv); 3652 ID.AddInteger(IsVarArgs); 3653 void *IP = 0; 3654 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3655 // Instead of including isTailCall in the folding set, we just 3656 // set the flag of the existing node. 3657 if (!IsTailCall) 3658 cast<CallSDNode>(E)->setNotTailCall(); 3659 return SDValue(E, 0); 3660 } 3661 SDNode *N = NodeAllocator.Allocate<CallSDNode>(); 3662 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg, 3663 VTs, Operands, NumOperands); 3664 CSEMap.InsertNode(N, IP); 3665 AllNodes.push_back(N); 3666 return SDValue(N, 0); 3667} 3668 3669SDValue 3670SelectionDAG::getCall(unsigned CallingConv, DebugLoc dl, bool IsVarArgs, 3671 bool IsTailCall, bool IsInreg, SDVTList VTs, 3672 const SDValue *Operands, unsigned NumOperands) { 3673 // Do not include isTailCall in the folding set profile. 3674 FoldingSetNodeID ID; 3675 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands); 3676 ID.AddInteger(CallingConv); 3677 ID.AddInteger(IsVarArgs); 3678 void *IP = 0; 3679 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3680 // Instead of including isTailCall in the folding set, we just 3681 // set the flag of the existing node. 3682 if (!IsTailCall) 3683 cast<CallSDNode>(E)->setNotTailCall(); 3684 return SDValue(E, 0); 3685 } 3686 SDNode *N = NodeAllocator.Allocate<CallSDNode>(); 3687 new (N) CallSDNode(CallingConv, dl, IsVarArgs, IsTailCall, IsInreg, 3688 VTs, Operands, NumOperands); 3689 CSEMap.InsertNode(N, IP); 3690 AllNodes.push_back(N); 3691 return SDValue(N, 0); 3692} 3693 3694SDValue 3695SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3696 MVT VT, SDValue Chain, 3697 SDValue Ptr, SDValue Offset, 3698 const Value *SV, int SVOffset, MVT EVT, 3699 bool isVolatile, unsigned Alignment) { 3700 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3701 Alignment = getMVTAlignment(VT); 3702 3703 if (VT == EVT) { 3704 ExtType = ISD::NON_EXTLOAD; 3705 } else if (ExtType == ISD::NON_EXTLOAD) { 3706 assert(VT == EVT && "Non-extending load from different memory type!"); 3707 } else { 3708 // Extending load. 3709 if (VT.isVector()) 3710 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() && 3711 "Invalid vector extload!"); 3712 else 3713 assert(EVT.bitsLT(VT) && 3714 "Should only be an extending load, not truncating!"); 3715 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3716 "Cannot sign/zero extend a FP/Vector load!"); 3717 assert(VT.isInteger() == EVT.isInteger() && 3718 "Cannot convert from FP to Int or Int -> FP!"); 3719 } 3720 3721 bool Indexed = AM != ISD::UNINDEXED; 3722 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3723 "Unindexed load with an offset!"); 3724 3725 SDVTList VTs = Indexed ? 3726 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3727 SDValue Ops[] = { Chain, Ptr, Offset }; 3728 FoldingSetNodeID ID; 3729 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3730 ID.AddInteger(AM); 3731 ID.AddInteger(ExtType); 3732 ID.AddInteger(EVT.getRawBits()); 3733 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3734 void *IP = 0; 3735 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3736 return SDValue(E, 0); 3737 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3738 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset, 3739 Alignment, isVolatile); 3740 CSEMap.InsertNode(N, IP); 3741 AllNodes.push_back(N); 3742 return SDValue(N, 0); 3743} 3744 3745SDValue 3746SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3747 ISD::LoadExtType ExtType, MVT VT, SDValue Chain, 3748 SDValue Ptr, SDValue Offset, 3749 const Value *SV, int SVOffset, MVT EVT, 3750 bool isVolatile, unsigned Alignment) { 3751 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3752 Alignment = getMVTAlignment(VT); 3753 3754 if (VT == EVT) { 3755 ExtType = ISD::NON_EXTLOAD; 3756 } else if (ExtType == ISD::NON_EXTLOAD) { 3757 assert(VT == EVT && "Non-extending load from different memory type!"); 3758 } else { 3759 // Extending load. 3760 if (VT.isVector()) 3761 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() && 3762 "Invalid vector extload!"); 3763 else 3764 assert(EVT.bitsLT(VT) && 3765 "Should only be an extending load, not truncating!"); 3766 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3767 "Cannot sign/zero extend a FP/Vector load!"); 3768 assert(VT.isInteger() == EVT.isInteger() && 3769 "Cannot convert from FP to Int or Int -> FP!"); 3770 } 3771 3772 bool Indexed = AM != ISD::UNINDEXED; 3773 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3774 "Unindexed load with an offset!"); 3775 3776 SDVTList VTs = Indexed ? 3777 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3778 SDValue Ops[] = { Chain, Ptr, Offset }; 3779 FoldingSetNodeID ID; 3780 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3781 ID.AddInteger(AM); 3782 ID.AddInteger(ExtType); 3783 ID.AddInteger(EVT.getRawBits()); 3784 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3785 void *IP = 0; 3786 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3787 return SDValue(E, 0); 3788 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3789 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset, 3790 Alignment, isVolatile); 3791 CSEMap.InsertNode(N, IP); 3792 AllNodes.push_back(N); 3793 return SDValue(N, 0); 3794} 3795 3796SDValue SelectionDAG::getLoad(MVT VT, 3797 SDValue Chain, SDValue Ptr, 3798 const Value *SV, int SVOffset, 3799 bool isVolatile, unsigned Alignment) { 3800 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3801 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3802 SV, SVOffset, VT, isVolatile, Alignment); 3803} 3804 3805SDValue SelectionDAG::getLoad(MVT VT, DebugLoc dl, 3806 SDValue Chain, SDValue Ptr, 3807 const Value *SV, int SVOffset, 3808 bool isVolatile, unsigned Alignment) { 3809 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3810 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3811 SV, SVOffset, VT, isVolatile, Alignment); 3812} 3813 3814SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT, 3815 SDValue Chain, SDValue Ptr, 3816 const Value *SV, 3817 int SVOffset, MVT EVT, 3818 bool isVolatile, unsigned Alignment) { 3819 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3820 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef, 3821 SV, SVOffset, EVT, isVolatile, Alignment); 3822} 3823 3824SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, MVT VT, 3825 SDValue Chain, SDValue Ptr, 3826 const Value *SV, 3827 int SVOffset, MVT EVT, 3828 bool isVolatile, unsigned Alignment) { 3829 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3830 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3831 SV, SVOffset, EVT, isVolatile, Alignment); 3832} 3833 3834SDValue 3835SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base, 3836 SDValue Offset, ISD::MemIndexedMode AM) { 3837 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3838 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3839 "Load is already a indexed load!"); 3840 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), 3841 LD->getChain(), Base, Offset, LD->getSrcValue(), 3842 LD->getSrcValueOffset(), LD->getMemoryVT(), 3843 LD->isVolatile(), LD->getAlignment()); 3844} 3845 3846SDValue 3847SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3848 SDValue Offset, ISD::MemIndexedMode AM) { 3849 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3850 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3851 "Load is already a indexed load!"); 3852 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3853 LD->getChain(), Base, Offset, LD->getSrcValue(), 3854 LD->getSrcValueOffset(), LD->getMemoryVT(), 3855 LD->isVolatile(), LD->getAlignment()); 3856} 3857 3858SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val, 3859 SDValue Ptr, const Value *SV, int SVOffset, 3860 bool isVolatile, unsigned Alignment) { 3861 MVT VT = Val.getValueType(); 3862 3863 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3864 Alignment = getMVTAlignment(VT); 3865 3866 SDVTList VTs = getVTList(MVT::Other); 3867 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3868 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3869 FoldingSetNodeID ID; 3870 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3871 ID.AddInteger(ISD::UNINDEXED); 3872 ID.AddInteger(false); 3873 ID.AddInteger(VT.getRawBits()); 3874 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3875 void *IP = 0; 3876 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3877 return SDValue(E, 0); 3878 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3879 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false, 3880 VT, SV, SVOffset, Alignment, isVolatile); 3881 CSEMap.InsertNode(N, IP); 3882 AllNodes.push_back(N); 3883 return SDValue(N, 0); 3884} 3885 3886SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3887 SDValue Ptr, const Value *SV, int SVOffset, 3888 bool isVolatile, unsigned Alignment) { 3889 MVT VT = Val.getValueType(); 3890 3891 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3892 Alignment = getMVTAlignment(VT); 3893 3894 SDVTList VTs = getVTList(MVT::Other); 3895 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3896 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3897 FoldingSetNodeID ID; 3898 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3899 ID.AddInteger(ISD::UNINDEXED); 3900 ID.AddInteger(false); 3901 ID.AddInteger(VT.getRawBits()); 3902 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3903 void *IP = 0; 3904 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3905 return SDValue(E, 0); 3906 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3907 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false, 3908 VT, SV, SVOffset, Alignment, isVolatile); 3909 CSEMap.InsertNode(N, IP); 3910 AllNodes.push_back(N); 3911 return SDValue(N, 0); 3912} 3913 3914SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val, 3915 SDValue Ptr, const Value *SV, 3916 int SVOffset, MVT SVT, 3917 bool isVolatile, unsigned Alignment) { 3918 MVT VT = Val.getValueType(); 3919 3920 if (VT == SVT) 3921 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3922 3923 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3924 assert(VT.isInteger() == SVT.isInteger() && 3925 "Can't do FP-INT conversion!"); 3926 3927 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3928 Alignment = getMVTAlignment(VT); 3929 3930 SDVTList VTs = getVTList(MVT::Other); 3931 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3932 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3933 FoldingSetNodeID ID; 3934 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3935 ID.AddInteger(ISD::UNINDEXED); 3936 ID.AddInteger(1); 3937 ID.AddInteger(SVT.getRawBits()); 3938 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3939 void *IP = 0; 3940 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3941 return SDValue(E, 0); 3942 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3943 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true, 3944 SVT, SV, SVOffset, Alignment, isVolatile); 3945 CSEMap.InsertNode(N, IP); 3946 AllNodes.push_back(N); 3947 return SDValue(N, 0); 3948} 3949 3950SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3951 SDValue Ptr, const Value *SV, 3952 int SVOffset, MVT SVT, 3953 bool isVolatile, unsigned Alignment) { 3954 MVT VT = Val.getValueType(); 3955 3956 if (VT == SVT) 3957 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3958 3959 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3960 assert(VT.isInteger() == SVT.isInteger() && 3961 "Can't do FP-INT conversion!"); 3962 3963 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3964 Alignment = getMVTAlignment(VT); 3965 3966 SDVTList VTs = getVTList(MVT::Other); 3967 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3968 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3969 FoldingSetNodeID ID; 3970 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3971 ID.AddInteger(ISD::UNINDEXED); 3972 ID.AddInteger(1); 3973 ID.AddInteger(SVT.getRawBits()); 3974 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3975 void *IP = 0; 3976 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3977 return SDValue(E, 0); 3978 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3979 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true, 3980 SVT, SV, SVOffset, Alignment, isVolatile); 3981 CSEMap.InsertNode(N, IP); 3982 AllNodes.push_back(N); 3983 return SDValue(N, 0); 3984} 3985 3986SDValue 3987SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base, 3988 SDValue Offset, ISD::MemIndexedMode AM) { 3989 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3990 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3991 "Store is already a indexed store!"); 3992 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 3993 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3994 FoldingSetNodeID ID; 3995 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3996 ID.AddInteger(AM); 3997 ID.AddInteger(ST->isTruncatingStore()); 3998 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3999 ID.AddInteger(ST->getRawFlags()); 4000 void *IP = 0; 4001 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4002 return SDValue(E, 0); 4003 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 4004 new (N) StoreSDNode(Ops, VTs, AM, 4005 ST->isTruncatingStore(), ST->getMemoryVT(), 4006 ST->getSrcValue(), ST->getSrcValueOffset(), 4007 ST->getAlignment(), ST->isVolatile()); 4008 CSEMap.InsertNode(N, IP); 4009 AllNodes.push_back(N); 4010 return SDValue(N, 0); 4011} 4012 4013SDValue 4014SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4015 SDValue Offset, ISD::MemIndexedMode AM) { 4016 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4017 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4018 "Store is already a indexed store!"); 4019 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4020 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4021 FoldingSetNodeID ID; 4022 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4023 ID.AddInteger(AM); 4024 ID.AddInteger(ST->isTruncatingStore()); 4025 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4026 ID.AddInteger(ST->getRawFlags()); 4027 void *IP = 0; 4028 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4029 return SDValue(E, 0); 4030 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 4031 new (N) StoreSDNode(Ops, dl, VTs, AM, 4032 ST->isTruncatingStore(), ST->getMemoryVT(), 4033 ST->getSrcValue(), ST->getSrcValueOffset(), 4034 ST->getAlignment(), ST->isVolatile()); 4035 CSEMap.InsertNode(N, IP); 4036 AllNodes.push_back(N); 4037 return SDValue(N, 0); 4038} 4039 4040SDValue SelectionDAG::getVAArg(MVT VT, 4041 SDValue Chain, SDValue Ptr, 4042 SDValue SV) { 4043 SDValue Ops[] = { Chain, Ptr, SV }; 4044 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3); 4045} 4046 4047SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 4048 const SDUse *Ops, unsigned NumOps) { 4049 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps); 4050} 4051 4052SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 4053 const SDUse *Ops, unsigned NumOps) { 4054 switch (NumOps) { 4055 case 0: return getNode(Opcode, DL, VT); 4056 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4057 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4058 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4059 default: break; 4060 } 4061 4062 // Copy from an SDUse array into an SDValue array for use with 4063 // the regular getNode logic. 4064 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4065 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4066} 4067 4068SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 4069 const SDValue *Ops, unsigned NumOps) { 4070 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps); 4071} 4072 4073SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 4074 const SDValue *Ops, unsigned NumOps) { 4075 switch (NumOps) { 4076 case 0: return getNode(Opcode, DL, VT); 4077 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4078 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4079 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4080 default: break; 4081 } 4082 4083 switch (Opcode) { 4084 default: break; 4085 case ISD::SELECT_CC: { 4086 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4087 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4088 "LHS and RHS of condition must have same type!"); 4089 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4090 "True and False arms of SelectCC must have same type!"); 4091 assert(Ops[2].getValueType() == VT && 4092 "select_cc node must be of same type as true and false value!"); 4093 break; 4094 } 4095 case ISD::BR_CC: { 4096 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4097 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4098 "LHS/RHS of comparison should match types!"); 4099 break; 4100 } 4101 } 4102 4103 // Memoize nodes. 4104 SDNode *N; 4105 SDVTList VTs = getVTList(VT); 4106 4107 if (VT != MVT::Flag) { 4108 FoldingSetNodeID ID; 4109 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4110 void *IP = 0; 4111 4112 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4113 return SDValue(E, 0); 4114 4115 N = NodeAllocator.Allocate<SDNode>(); 4116 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 4117 CSEMap.InsertNode(N, IP); 4118 } else { 4119 N = NodeAllocator.Allocate<SDNode>(); 4120 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 4121 } 4122 4123 AllNodes.push_back(N); 4124#ifndef NDEBUG 4125 VerifyNode(N); 4126#endif 4127 return SDValue(N, 0); 4128} 4129 4130SDValue SelectionDAG::getNode(unsigned Opcode, 4131 const std::vector<MVT> &ResultTys, 4132 const SDValue *Ops, unsigned NumOps) { 4133 return getNode(Opcode, DebugLoc::getUnknownLoc(), ResultTys, Ops, NumOps); 4134} 4135 4136SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4137 const std::vector<MVT> &ResultTys, 4138 const SDValue *Ops, unsigned NumOps) { 4139 return getNode(Opcode, DL, getNodeValueTypes(ResultTys), ResultTys.size(), 4140 Ops, NumOps); 4141} 4142 4143SDValue SelectionDAG::getNode(unsigned Opcode, 4144 const MVT *VTs, unsigned NumVTs, 4145 const SDValue *Ops, unsigned NumOps) { 4146 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTs, NumVTs, Ops, NumOps); 4147} 4148 4149SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4150 const MVT *VTs, unsigned NumVTs, 4151 const SDValue *Ops, unsigned NumOps) { 4152 if (NumVTs == 1) 4153 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4154 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4155} 4156 4157SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4158 const SDValue *Ops, unsigned NumOps) { 4159 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, Ops, NumOps); 4160} 4161 4162SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4163 const SDValue *Ops, unsigned NumOps) { 4164 if (VTList.NumVTs == 1) 4165 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4166 4167 switch (Opcode) { 4168 // FIXME: figure out how to safely handle things like 4169 // int foo(int x) { return 1 << (x & 255); } 4170 // int bar() { return foo(256); } 4171#if 0 4172 case ISD::SRA_PARTS: 4173 case ISD::SRL_PARTS: 4174 case ISD::SHL_PARTS: 4175 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4176 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4177 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4178 else if (N3.getOpcode() == ISD::AND) 4179 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4180 // If the and is only masking out bits that cannot effect the shift, 4181 // eliminate the and. 4182 unsigned NumBits = VT.getSizeInBits()*2; 4183 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4184 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4185 } 4186 break; 4187#endif 4188 } 4189 4190 // Memoize the node unless it returns a flag. 4191 SDNode *N; 4192 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4193 FoldingSetNodeID ID; 4194 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4195 void *IP = 0; 4196 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4197 return SDValue(E, 0); 4198 if (NumOps == 1) { 4199 N = NodeAllocator.Allocate<UnarySDNode>(); 4200 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4201 } else if (NumOps == 2) { 4202 N = NodeAllocator.Allocate<BinarySDNode>(); 4203 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4204 } else if (NumOps == 3) { 4205 N = NodeAllocator.Allocate<TernarySDNode>(); 4206 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 4207 } else { 4208 N = NodeAllocator.Allocate<SDNode>(); 4209 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 4210 } 4211 CSEMap.InsertNode(N, IP); 4212 } else { 4213 if (NumOps == 1) { 4214 N = NodeAllocator.Allocate<UnarySDNode>(); 4215 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4216 } else if (NumOps == 2) { 4217 N = NodeAllocator.Allocate<BinarySDNode>(); 4218 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4219 } else if (NumOps == 3) { 4220 N = NodeAllocator.Allocate<TernarySDNode>(); 4221 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 4222 } else { 4223 N = NodeAllocator.Allocate<SDNode>(); 4224 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 4225 } 4226 } 4227 AllNodes.push_back(N); 4228#ifndef NDEBUG 4229 VerifyNode(N); 4230#endif 4231 return SDValue(N, 0); 4232} 4233 4234SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) { 4235 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList); 4236} 4237 4238SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4239 return getNode(Opcode, DL, VTList, 0, 0); 4240} 4241 4242SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4243 SDValue N1) { 4244 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1); 4245} 4246 4247SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4248 SDValue N1) { 4249 SDValue Ops[] = { N1 }; 4250 return getNode(Opcode, DL, VTList, Ops, 1); 4251} 4252 4253SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4254 SDValue N1, SDValue N2) { 4255 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2); 4256} 4257 4258SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4259 SDValue N1, SDValue N2) { 4260 SDValue Ops[] = { N1, N2 }; 4261 return getNode(Opcode, DL, VTList, Ops, 2); 4262} 4263 4264SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4265 SDValue N1, SDValue N2, SDValue N3) { 4266 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3); 4267} 4268 4269SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4270 SDValue N1, SDValue N2, SDValue N3) { 4271 SDValue Ops[] = { N1, N2, N3 }; 4272 return getNode(Opcode, DL, VTList, Ops, 3); 4273} 4274 4275SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4276 SDValue N1, SDValue N2, SDValue N3, 4277 SDValue N4) { 4278 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3, N4); 4279} 4280 4281SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4282 SDValue N1, SDValue N2, SDValue N3, 4283 SDValue N4) { 4284 SDValue Ops[] = { N1, N2, N3, N4 }; 4285 return getNode(Opcode, DL, VTList, Ops, 4); 4286} 4287 4288SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4289 SDValue N1, SDValue N2, SDValue N3, 4290 SDValue N4, SDValue N5) { 4291 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3, N4, N5); 4292} 4293 4294SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4295 SDValue N1, SDValue N2, SDValue N3, 4296 SDValue N4, SDValue N5) { 4297 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4298 return getNode(Opcode, DL, VTList, Ops, 5); 4299} 4300 4301SDVTList SelectionDAG::getVTList(MVT VT) { 4302 return makeVTList(SDNode::getValueTypeList(VT), 1); 4303} 4304 4305SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) { 4306 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4307 E = VTList.rend(); I != E; ++I) 4308 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4309 return *I; 4310 4311 MVT *Array = Allocator.Allocate<MVT>(2); 4312 Array[0] = VT1; 4313 Array[1] = VT2; 4314 SDVTList Result = makeVTList(Array, 2); 4315 VTList.push_back(Result); 4316 return Result; 4317} 4318 4319SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) { 4320 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4321 E = VTList.rend(); I != E; ++I) 4322 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4323 I->VTs[2] == VT3) 4324 return *I; 4325 4326 MVT *Array = Allocator.Allocate<MVT>(3); 4327 Array[0] = VT1; 4328 Array[1] = VT2; 4329 Array[2] = VT3; 4330 SDVTList Result = makeVTList(Array, 3); 4331 VTList.push_back(Result); 4332 return Result; 4333} 4334 4335SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) { 4336 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4337 E = VTList.rend(); I != E; ++I) 4338 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4339 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4340 return *I; 4341 4342 MVT *Array = Allocator.Allocate<MVT>(3); 4343 Array[0] = VT1; 4344 Array[1] = VT2; 4345 Array[2] = VT3; 4346 Array[3] = VT4; 4347 SDVTList Result = makeVTList(Array, 4); 4348 VTList.push_back(Result); 4349 return Result; 4350} 4351 4352SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) { 4353 switch (NumVTs) { 4354 case 0: assert(0 && "Cannot have nodes without results!"); 4355 case 1: return getVTList(VTs[0]); 4356 case 2: return getVTList(VTs[0], VTs[1]); 4357 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4358 default: break; 4359 } 4360 4361 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4362 E = VTList.rend(); I != E; ++I) { 4363 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4364 continue; 4365 4366 bool NoMatch = false; 4367 for (unsigned i = 2; i != NumVTs; ++i) 4368 if (VTs[i] != I->VTs[i]) { 4369 NoMatch = true; 4370 break; 4371 } 4372 if (!NoMatch) 4373 return *I; 4374 } 4375 4376 MVT *Array = Allocator.Allocate<MVT>(NumVTs); 4377 std::copy(VTs, VTs+NumVTs, Array); 4378 SDVTList Result = makeVTList(Array, NumVTs); 4379 VTList.push_back(Result); 4380 return Result; 4381} 4382 4383 4384/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4385/// specified operands. If the resultant node already exists in the DAG, 4386/// this does not modify the specified node, instead it returns the node that 4387/// already exists. If the resultant node does not exist in the DAG, the 4388/// input node is returned. As a degenerate case, if you specify the same 4389/// input operands as the node already has, the input node is returned. 4390SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4391 SDNode *N = InN.getNode(); 4392 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4393 4394 // Check to see if there is no change. 4395 if (Op == N->getOperand(0)) return InN; 4396 4397 // See if the modified node already exists. 4398 void *InsertPos = 0; 4399 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4400 return SDValue(Existing, InN.getResNo()); 4401 4402 // Nope it doesn't. Remove the node from its current place in the maps. 4403 if (InsertPos) 4404 if (!RemoveNodeFromCSEMaps(N)) 4405 InsertPos = 0; 4406 4407 // Now we update the operands. 4408 N->OperandList[0].set(Op); 4409 4410 // If this gets put into a CSE map, add it. 4411 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4412 return InN; 4413} 4414 4415SDValue SelectionDAG:: 4416UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4417 SDNode *N = InN.getNode(); 4418 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4419 4420 // Check to see if there is no change. 4421 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4422 return InN; // No operands changed, just return the input node. 4423 4424 // See if the modified node already exists. 4425 void *InsertPos = 0; 4426 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4427 return SDValue(Existing, InN.getResNo()); 4428 4429 // Nope it doesn't. Remove the node from its current place in the maps. 4430 if (InsertPos) 4431 if (!RemoveNodeFromCSEMaps(N)) 4432 InsertPos = 0; 4433 4434 // Now we update the operands. 4435 if (N->OperandList[0] != Op1) 4436 N->OperandList[0].set(Op1); 4437 if (N->OperandList[1] != Op2) 4438 N->OperandList[1].set(Op2); 4439 4440 // If this gets put into a CSE map, add it. 4441 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4442 return InN; 4443} 4444 4445SDValue SelectionDAG:: 4446UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4447 SDValue Ops[] = { Op1, Op2, Op3 }; 4448 return UpdateNodeOperands(N, Ops, 3); 4449} 4450 4451SDValue SelectionDAG:: 4452UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4453 SDValue Op3, SDValue Op4) { 4454 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4455 return UpdateNodeOperands(N, Ops, 4); 4456} 4457 4458SDValue SelectionDAG:: 4459UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4460 SDValue Op3, SDValue Op4, SDValue Op5) { 4461 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4462 return UpdateNodeOperands(N, Ops, 5); 4463} 4464 4465SDValue SelectionDAG:: 4466UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4467 SDNode *N = InN.getNode(); 4468 assert(N->getNumOperands() == NumOps && 4469 "Update with wrong number of operands"); 4470 4471 // Check to see if there is no change. 4472 bool AnyChange = false; 4473 for (unsigned i = 0; i != NumOps; ++i) { 4474 if (Ops[i] != N->getOperand(i)) { 4475 AnyChange = true; 4476 break; 4477 } 4478 } 4479 4480 // No operands changed, just return the input node. 4481 if (!AnyChange) return InN; 4482 4483 // See if the modified node already exists. 4484 void *InsertPos = 0; 4485 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4486 return SDValue(Existing, InN.getResNo()); 4487 4488 // Nope it doesn't. Remove the node from its current place in the maps. 4489 if (InsertPos) 4490 if (!RemoveNodeFromCSEMaps(N)) 4491 InsertPos = 0; 4492 4493 // Now we update the operands. 4494 for (unsigned i = 0; i != NumOps; ++i) 4495 if (N->OperandList[i] != Ops[i]) 4496 N->OperandList[i].set(Ops[i]); 4497 4498 // If this gets put into a CSE map, add it. 4499 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4500 return InN; 4501} 4502 4503/// DropOperands - Release the operands and set this node to have 4504/// zero operands. 4505void SDNode::DropOperands() { 4506 // Unlike the code in MorphNodeTo that does this, we don't need to 4507 // watch for dead nodes here. 4508 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4509 SDUse &Use = *I++; 4510 Use.set(SDValue()); 4511 } 4512} 4513 4514/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4515/// machine opcode. 4516/// 4517SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4518 MVT VT) { 4519 SDVTList VTs = getVTList(VT); 4520 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4521} 4522 4523SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4524 MVT VT, SDValue Op1) { 4525 SDVTList VTs = getVTList(VT); 4526 SDValue Ops[] = { Op1 }; 4527 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4528} 4529 4530SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4531 MVT VT, SDValue Op1, 4532 SDValue Op2) { 4533 SDVTList VTs = getVTList(VT); 4534 SDValue Ops[] = { Op1, Op2 }; 4535 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4536} 4537 4538SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4539 MVT VT, SDValue Op1, 4540 SDValue Op2, SDValue Op3) { 4541 SDVTList VTs = getVTList(VT); 4542 SDValue Ops[] = { Op1, Op2, Op3 }; 4543 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4544} 4545 4546SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4547 MVT VT, const SDValue *Ops, 4548 unsigned NumOps) { 4549 SDVTList VTs = getVTList(VT); 4550 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4551} 4552 4553SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4554 MVT VT1, MVT VT2, const SDValue *Ops, 4555 unsigned NumOps) { 4556 SDVTList VTs = getVTList(VT1, VT2); 4557 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4558} 4559 4560SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4561 MVT VT1, MVT VT2) { 4562 SDVTList VTs = getVTList(VT1, VT2); 4563 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4564} 4565 4566SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4567 MVT VT1, MVT VT2, MVT VT3, 4568 const SDValue *Ops, unsigned NumOps) { 4569 SDVTList VTs = getVTList(VT1, VT2, VT3); 4570 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4571} 4572 4573SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4574 MVT VT1, MVT VT2, MVT VT3, MVT VT4, 4575 const SDValue *Ops, unsigned NumOps) { 4576 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4577 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4578} 4579 4580SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4581 MVT VT1, MVT VT2, 4582 SDValue Op1) { 4583 SDVTList VTs = getVTList(VT1, VT2); 4584 SDValue Ops[] = { Op1 }; 4585 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4586} 4587 4588SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4589 MVT VT1, MVT VT2, 4590 SDValue Op1, SDValue Op2) { 4591 SDVTList VTs = getVTList(VT1, VT2); 4592 SDValue Ops[] = { Op1, Op2 }; 4593 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4594} 4595 4596SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4597 MVT VT1, MVT VT2, 4598 SDValue Op1, SDValue Op2, 4599 SDValue Op3) { 4600 SDVTList VTs = getVTList(VT1, VT2); 4601 SDValue Ops[] = { Op1, Op2, Op3 }; 4602 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4603} 4604 4605SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4606 MVT VT1, MVT VT2, MVT VT3, 4607 SDValue Op1, SDValue Op2, 4608 SDValue Op3) { 4609 SDVTList VTs = getVTList(VT1, VT2, VT3); 4610 SDValue Ops[] = { Op1, Op2, Op3 }; 4611 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4612} 4613 4614SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4615 SDVTList VTs, const SDValue *Ops, 4616 unsigned NumOps) { 4617 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4618} 4619 4620SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4621 MVT VT) { 4622 SDVTList VTs = getVTList(VT); 4623 return MorphNodeTo(N, Opc, VTs, 0, 0); 4624} 4625 4626SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4627 MVT VT, SDValue Op1) { 4628 SDVTList VTs = getVTList(VT); 4629 SDValue Ops[] = { Op1 }; 4630 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4631} 4632 4633SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4634 MVT VT, SDValue Op1, 4635 SDValue Op2) { 4636 SDVTList VTs = getVTList(VT); 4637 SDValue Ops[] = { Op1, Op2 }; 4638 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4639} 4640 4641SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4642 MVT VT, SDValue Op1, 4643 SDValue Op2, SDValue Op3) { 4644 SDVTList VTs = getVTList(VT); 4645 SDValue Ops[] = { Op1, Op2, Op3 }; 4646 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4647} 4648 4649SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4650 MVT VT, const SDValue *Ops, 4651 unsigned NumOps) { 4652 SDVTList VTs = getVTList(VT); 4653 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4654} 4655 4656SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4657 MVT VT1, MVT VT2, const SDValue *Ops, 4658 unsigned NumOps) { 4659 SDVTList VTs = getVTList(VT1, VT2); 4660 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4661} 4662 4663SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4664 MVT VT1, MVT VT2) { 4665 SDVTList VTs = getVTList(VT1, VT2); 4666 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0); 4667} 4668 4669SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4670 MVT VT1, MVT VT2, MVT VT3, 4671 const SDValue *Ops, unsigned NumOps) { 4672 SDVTList VTs = getVTList(VT1, VT2, VT3); 4673 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4674} 4675 4676SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4677 MVT VT1, MVT VT2, 4678 SDValue Op1) { 4679 SDVTList VTs = getVTList(VT1, VT2); 4680 SDValue Ops[] = { Op1 }; 4681 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4682} 4683 4684SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4685 MVT VT1, MVT VT2, 4686 SDValue Op1, SDValue Op2) { 4687 SDVTList VTs = getVTList(VT1, VT2); 4688 SDValue Ops[] = { Op1, Op2 }; 4689 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4690} 4691 4692SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4693 MVT VT1, MVT VT2, 4694 SDValue Op1, SDValue Op2, 4695 SDValue Op3) { 4696 SDVTList VTs = getVTList(VT1, VT2); 4697 SDValue Ops[] = { Op1, Op2, Op3 }; 4698 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4699} 4700 4701/// MorphNodeTo - These *mutate* the specified node to have the specified 4702/// return type, opcode, and operands. 4703/// 4704/// Note that MorphNodeTo returns the resultant node. If there is already a 4705/// node of the specified opcode and operands, it returns that node instead of 4706/// the current one. 4707/// 4708/// Using MorphNodeTo is faster than creating a new node and swapping it in 4709/// with ReplaceAllUsesWith both because it often avoids allocating a new 4710/// node, and because it doesn't require CSE recalculation for any of 4711/// the node's users. 4712/// 4713SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4714 SDVTList VTs, const SDValue *Ops, 4715 unsigned NumOps) { 4716 // If an identical node already exists, use it. 4717 void *IP = 0; 4718 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4719 FoldingSetNodeID ID; 4720 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4721 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4722 return ON; 4723 } 4724 4725 if (!RemoveNodeFromCSEMaps(N)) 4726 IP = 0; 4727 4728 // Start the morphing. 4729 N->NodeType = Opc; 4730 N->ValueList = VTs.VTs; 4731 N->NumValues = VTs.NumVTs; 4732 4733 // Clear the operands list, updating used nodes to remove this from their 4734 // use list. Keep track of any operands that become dead as a result. 4735 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4736 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4737 SDUse &Use = *I++; 4738 SDNode *Used = Use.getNode(); 4739 Use.set(SDValue()); 4740 if (Used->use_empty()) 4741 DeadNodeSet.insert(Used); 4742 } 4743 4744 // If NumOps is larger than the # of operands we currently have, reallocate 4745 // the operand list. 4746 if (NumOps > N->NumOperands) { 4747 if (N->OperandsNeedDelete) 4748 delete[] N->OperandList; 4749 4750 if (N->isMachineOpcode()) { 4751 // We're creating a final node that will live unmorphed for the 4752 // remainder of the current SelectionDAG iteration, so we can allocate 4753 // the operands directly out of a pool with no recycling metadata. 4754 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps); 4755 N->OperandsNeedDelete = false; 4756 } else { 4757 N->OperandList = new SDUse[NumOps]; 4758 N->OperandsNeedDelete = true; 4759 } 4760 } 4761 4762 // Assign the new operands. 4763 N->NumOperands = NumOps; 4764 for (unsigned i = 0, e = NumOps; i != e; ++i) { 4765 N->OperandList[i].setUser(N); 4766 N->OperandList[i].setInitial(Ops[i]); 4767 } 4768 4769 // Delete any nodes that are still dead after adding the uses for the 4770 // new operands. 4771 SmallVector<SDNode *, 16> DeadNodes; 4772 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4773 E = DeadNodeSet.end(); I != E; ++I) 4774 if ((*I)->use_empty()) 4775 DeadNodes.push_back(*I); 4776 RemoveDeadNodes(DeadNodes); 4777 4778 if (IP) 4779 CSEMap.InsertNode(N, IP); // Memoize the new node. 4780 return N; 4781} 4782 4783 4784/// getTargetNode - These are used for target selectors to create a new node 4785/// with specified return type(s), target opcode, and operands. 4786/// 4787/// Note that getTargetNode returns the resultant node. If there is already a 4788/// node of the specified opcode and operands, it returns that node instead of 4789/// the current one. 4790SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) { 4791 return getNode(~Opcode, VT).getNode(); 4792} 4793SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT) { 4794 return getNode(~Opcode, dl, VT).getNode(); 4795} 4796 4797SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) { 4798 return getNode(~Opcode, VT, Op1).getNode(); 4799} 4800SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, 4801 SDValue Op1) { 4802 return getNode(~Opcode, dl, VT, Op1).getNode(); 4803} 4804 4805SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4806 SDValue Op1, SDValue Op2) { 4807 return getNode(~Opcode, VT, Op1, Op2).getNode(); 4808} 4809SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, 4810 SDValue Op1, SDValue Op2) { 4811 return getNode(~Opcode, dl, VT, Op1, Op2).getNode(); 4812} 4813 4814SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4815 SDValue Op1, SDValue Op2, 4816 SDValue Op3) { 4817 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode(); 4818} 4819SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, 4820 SDValue Op1, SDValue Op2, 4821 SDValue Op3) { 4822 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode(); 4823} 4824 4825SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4826 const SDValue *Ops, unsigned NumOps) { 4827 return getNode(~Opcode, VT, Ops, NumOps).getNode(); 4828} 4829SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, 4830 const SDValue *Ops, unsigned NumOps) { 4831 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode(); 4832} 4833 4834SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) { 4835 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4836 SDValue Op; 4837 return getNode(~Opcode, VTs, 2, &Op, 0).getNode(); 4838} 4839SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4840 MVT VT1, MVT VT2) { 4841 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4842 SDValue Op; 4843 return getNode(~Opcode, dl, VTs, 2, &Op, 0).getNode(); 4844} 4845 4846SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4847 MVT VT2, SDValue Op1) { 4848 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4849 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode(); 4850} 4851SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, 4852 MVT VT2, SDValue Op1) { 4853 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4854 return getNode(~Opcode, dl, VTs, 2, &Op1, 1).getNode(); 4855} 4856 4857SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4858 MVT VT2, SDValue Op1, 4859 SDValue Op2) { 4860 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4861 SDValue Ops[] = { Op1, Op2 }; 4862 return getNode(~Opcode, VTs, 2, Ops, 2).getNode(); 4863} 4864SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, 4865 MVT VT2, SDValue Op1, 4866 SDValue Op2) { 4867 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4868 SDValue Ops[] = { Op1, Op2 }; 4869 return getNode(~Opcode, dl, VTs, 2, Ops, 2).getNode(); 4870} 4871 4872SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4873 MVT VT2, SDValue Op1, 4874 SDValue Op2, SDValue Op3) { 4875 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4876 SDValue Ops[] = { Op1, Op2, Op3 }; 4877 return getNode(~Opcode, VTs, 2, Ops, 3).getNode(); 4878} 4879SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, 4880 MVT VT2, SDValue Op1, 4881 SDValue Op2, SDValue Op3) { 4882 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4883 SDValue Ops[] = { Op1, Op2, Op3 }; 4884 return getNode(~Opcode, dl, VTs, 2, Ops, 3).getNode(); 4885} 4886 4887SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, 4888 const SDValue *Ops, unsigned NumOps) { 4889 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4890 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode(); 4891} 4892SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4893 MVT VT1, MVT VT2, 4894 const SDValue *Ops, unsigned NumOps) { 4895 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4896 return getNode(~Opcode, dl, VTs, 2, Ops, NumOps).getNode(); 4897} 4898 4899SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4900 SDValue Op1, SDValue Op2) { 4901 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4902 SDValue Ops[] = { Op1, Op2 }; 4903 return getNode(~Opcode, VTs, 3, Ops, 2).getNode(); 4904} 4905SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4906 MVT VT1, MVT VT2, MVT VT3, 4907 SDValue Op1, SDValue Op2) { 4908 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4909 SDValue Ops[] = { Op1, Op2 }; 4910 return getNode(~Opcode, dl, VTs, 3, Ops, 2).getNode(); 4911} 4912 4913SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4914 SDValue Op1, SDValue Op2, 4915 SDValue Op3) { 4916 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4917 SDValue Ops[] = { Op1, Op2, Op3 }; 4918 return getNode(~Opcode, VTs, 3, Ops, 3).getNode(); 4919} 4920SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4921 MVT VT1, MVT VT2, MVT VT3, 4922 SDValue Op1, SDValue Op2, 4923 SDValue Op3) { 4924 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4925 SDValue Ops[] = { Op1, Op2, Op3 }; 4926 return getNode(~Opcode, dl, VTs, 3, Ops, 3).getNode(); 4927} 4928 4929SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4930 const SDValue *Ops, unsigned NumOps) { 4931 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4932 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode(); 4933} 4934SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4935 MVT VT1, MVT VT2, MVT VT3, 4936 const SDValue *Ops, unsigned NumOps) { 4937 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4938 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode(); 4939} 4940 4941SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4942 MVT VT2, MVT VT3, MVT VT4, 4943 const SDValue *Ops, unsigned NumOps) { 4944 std::vector<MVT> VTList; 4945 VTList.push_back(VT1); 4946 VTList.push_back(VT2); 4947 VTList.push_back(VT3); 4948 VTList.push_back(VT4); 4949 const MVT *VTs = getNodeValueTypes(VTList); 4950 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode(); 4951} 4952SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, 4953 MVT VT2, MVT VT3, MVT VT4, 4954 const SDValue *Ops, unsigned NumOps) { 4955 std::vector<MVT> VTList; 4956 VTList.push_back(VT1); 4957 VTList.push_back(VT2); 4958 VTList.push_back(VT3); 4959 VTList.push_back(VT4); 4960 const MVT *VTs = getNodeValueTypes(VTList); 4961 return getNode(~Opcode, dl, VTs, 4, Ops, NumOps).getNode(); 4962} 4963 4964SDNode *SelectionDAG::getTargetNode(unsigned Opcode, 4965 const std::vector<MVT> &ResultTys, 4966 const SDValue *Ops, unsigned NumOps) { 4967 const MVT *VTs = getNodeValueTypes(ResultTys); 4968 return getNode(~Opcode, VTs, ResultTys.size(), 4969 Ops, NumOps).getNode(); 4970} 4971SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4972 const std::vector<MVT> &ResultTys, 4973 const SDValue *Ops, unsigned NumOps) { 4974 const MVT *VTs = getNodeValueTypes(ResultTys); 4975 return getNode(~Opcode, dl, VTs, ResultTys.size(), 4976 Ops, NumOps).getNode(); 4977} 4978 4979/// getNodeIfExists - Get the specified node if it's already available, or 4980/// else return NULL. 4981SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4982 const SDValue *Ops, unsigned NumOps) { 4983 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4984 FoldingSetNodeID ID; 4985 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4986 void *IP = 0; 4987 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4988 return E; 4989 } 4990 return NULL; 4991} 4992 4993/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4994/// This can cause recursive merging of nodes in the DAG. 4995/// 4996/// This version assumes From has a single result value. 4997/// 4998void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4999 DAGUpdateListener *UpdateListener) { 5000 SDNode *From = FromN.getNode(); 5001 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5002 "Cannot replace with this method!"); 5003 assert(From != To.getNode() && "Cannot replace uses of with self"); 5004 5005 // Iterate over all the existing uses of From. New uses will be added 5006 // to the beginning of the use list, which we avoid visiting. 5007 // This specifically avoids visiting uses of From that arise while the 5008 // replacement is happening, because any such uses would be the result 5009 // of CSE: If an existing node looks like From after one of its operands 5010 // is replaced by To, we don't want to replace of all its users with To 5011 // too. See PR3018 for more info. 5012 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5013 while (UI != UE) { 5014 SDNode *User = *UI; 5015 5016 // This node is about to morph, remove its old self from the CSE maps. 5017 RemoveNodeFromCSEMaps(User); 5018 5019 // A user can appear in a use list multiple times, and when this 5020 // happens the uses are usually next to each other in the list. 5021 // To help reduce the number of CSE recomputations, process all 5022 // the uses of this user that we can find this way. 5023 do { 5024 SDUse &Use = UI.getUse(); 5025 ++UI; 5026 Use.set(To); 5027 } while (UI != UE && *UI == User); 5028 5029 // Now that we have modified User, add it back to the CSE maps. If it 5030 // already exists there, recursively merge the results together. 5031 AddModifiedNodeToCSEMaps(User, UpdateListener); 5032 } 5033} 5034 5035/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5036/// This can cause recursive merging of nodes in the DAG. 5037/// 5038/// This version assumes From/To have matching types and numbers of result 5039/// values. 5040/// 5041void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5042 DAGUpdateListener *UpdateListener) { 5043 assert(From->getVTList().VTs == To->getVTList().VTs && 5044 From->getNumValues() == To->getNumValues() && 5045 "Cannot use this version of ReplaceAllUsesWith!"); 5046 5047 // Handle the trivial case. 5048 if (From == To) 5049 return; 5050 5051 // Iterate over just the existing users of From. See the comments in 5052 // the ReplaceAllUsesWith above. 5053 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5054 while (UI != UE) { 5055 SDNode *User = *UI; 5056 5057 // This node is about to morph, remove its old self from the CSE maps. 5058 RemoveNodeFromCSEMaps(User); 5059 5060 // A user can appear in a use list multiple times, and when this 5061 // happens the uses are usually next to each other in the list. 5062 // To help reduce the number of CSE recomputations, process all 5063 // the uses of this user that we can find this way. 5064 do { 5065 SDUse &Use = UI.getUse(); 5066 ++UI; 5067 Use.setNode(To); 5068 } while (UI != UE && *UI == User); 5069 5070 // Now that we have modified User, add it back to the CSE maps. If it 5071 // already exists there, recursively merge the results together. 5072 AddModifiedNodeToCSEMaps(User, UpdateListener); 5073 } 5074} 5075 5076/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5077/// This can cause recursive merging of nodes in the DAG. 5078/// 5079/// This version can replace From with any result values. To must match the 5080/// number and types of values returned by From. 5081void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5082 const SDValue *To, 5083 DAGUpdateListener *UpdateListener) { 5084 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5085 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5086 5087 // Iterate over just the existing users of From. See the comments in 5088 // the ReplaceAllUsesWith above. 5089 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5090 while (UI != UE) { 5091 SDNode *User = *UI; 5092 5093 // This node is about to morph, remove its old self from the CSE maps. 5094 RemoveNodeFromCSEMaps(User); 5095 5096 // A user can appear in a use list multiple times, and when this 5097 // happens the uses are usually next to each other in the list. 5098 // To help reduce the number of CSE recomputations, process all 5099 // the uses of this user that we can find this way. 5100 do { 5101 SDUse &Use = UI.getUse(); 5102 const SDValue &ToOp = To[Use.getResNo()]; 5103 ++UI; 5104 Use.set(ToOp); 5105 } while (UI != UE && *UI == User); 5106 5107 // Now that we have modified User, add it back to the CSE maps. If it 5108 // already exists there, recursively merge the results together. 5109 AddModifiedNodeToCSEMaps(User, UpdateListener); 5110 } 5111} 5112 5113/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5114/// uses of other values produced by From.getNode() alone. The Deleted 5115/// vector is handled the same way as for ReplaceAllUsesWith. 5116void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5117 DAGUpdateListener *UpdateListener){ 5118 // Handle the really simple, really trivial case efficiently. 5119 if (From == To) return; 5120 5121 // Handle the simple, trivial, case efficiently. 5122 if (From.getNode()->getNumValues() == 1) { 5123 ReplaceAllUsesWith(From, To, UpdateListener); 5124 return; 5125 } 5126 5127 // Iterate over just the existing users of From. See the comments in 5128 // the ReplaceAllUsesWith above. 5129 SDNode::use_iterator UI = From.getNode()->use_begin(), 5130 UE = From.getNode()->use_end(); 5131 while (UI != UE) { 5132 SDNode *User = *UI; 5133 bool UserRemovedFromCSEMaps = false; 5134 5135 // A user can appear in a use list multiple times, and when this 5136 // happens the uses are usually next to each other in the list. 5137 // To help reduce the number of CSE recomputations, process all 5138 // the uses of this user that we can find this way. 5139 do { 5140 SDUse &Use = UI.getUse(); 5141 5142 // Skip uses of different values from the same node. 5143 if (Use.getResNo() != From.getResNo()) { 5144 ++UI; 5145 continue; 5146 } 5147 5148 // If this node hasn't been modified yet, it's still in the CSE maps, 5149 // so remove its old self from the CSE maps. 5150 if (!UserRemovedFromCSEMaps) { 5151 RemoveNodeFromCSEMaps(User); 5152 UserRemovedFromCSEMaps = true; 5153 } 5154 5155 ++UI; 5156 Use.set(To); 5157 } while (UI != UE && *UI == User); 5158 5159 // We are iterating over all uses of the From node, so if a use 5160 // doesn't use the specific value, no changes are made. 5161 if (!UserRemovedFromCSEMaps) 5162 continue; 5163 5164 // Now that we have modified User, add it back to the CSE maps. If it 5165 // already exists there, recursively merge the results together. 5166 AddModifiedNodeToCSEMaps(User, UpdateListener); 5167 } 5168} 5169 5170namespace { 5171 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5172 /// to record information about a use. 5173 struct UseMemo { 5174 SDNode *User; 5175 unsigned Index; 5176 SDUse *Use; 5177 }; 5178 5179 /// operator< - Sort Memos by User. 5180 bool operator<(const UseMemo &L, const UseMemo &R) { 5181 return (intptr_t)L.User < (intptr_t)R.User; 5182 } 5183} 5184 5185/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5186/// uses of other values produced by From.getNode() alone. The same value 5187/// may appear in both the From and To list. The Deleted vector is 5188/// handled the same way as for ReplaceAllUsesWith. 5189void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5190 const SDValue *To, 5191 unsigned Num, 5192 DAGUpdateListener *UpdateListener){ 5193 // Handle the simple, trivial case efficiently. 5194 if (Num == 1) 5195 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5196 5197 // Read up all the uses and make records of them. This helps 5198 // processing new uses that are introduced during the 5199 // replacement process. 5200 SmallVector<UseMemo, 4> Uses; 5201 for (unsigned i = 0; i != Num; ++i) { 5202 unsigned FromResNo = From[i].getResNo(); 5203 SDNode *FromNode = From[i].getNode(); 5204 for (SDNode::use_iterator UI = FromNode->use_begin(), 5205 E = FromNode->use_end(); UI != E; ++UI) { 5206 SDUse &Use = UI.getUse(); 5207 if (Use.getResNo() == FromResNo) { 5208 UseMemo Memo = { *UI, i, &Use }; 5209 Uses.push_back(Memo); 5210 } 5211 } 5212 } 5213 5214 // Sort the uses, so that all the uses from a given User are together. 5215 std::sort(Uses.begin(), Uses.end()); 5216 5217 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5218 UseIndex != UseIndexEnd; ) { 5219 // We know that this user uses some value of From. If it is the right 5220 // value, update it. 5221 SDNode *User = Uses[UseIndex].User; 5222 5223 // This node is about to morph, remove its old self from the CSE maps. 5224 RemoveNodeFromCSEMaps(User); 5225 5226 // The Uses array is sorted, so all the uses for a given User 5227 // are next to each other in the list. 5228 // To help reduce the number of CSE recomputations, process all 5229 // the uses of this user that we can find this way. 5230 do { 5231 unsigned i = Uses[UseIndex].Index; 5232 SDUse &Use = *Uses[UseIndex].Use; 5233 ++UseIndex; 5234 5235 Use.set(To[i]); 5236 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5237 5238 // Now that we have modified User, add it back to the CSE maps. If it 5239 // already exists there, recursively merge the results together. 5240 AddModifiedNodeToCSEMaps(User, UpdateListener); 5241 } 5242} 5243 5244/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5245/// based on their topological order. It returns the maximum id and a vector 5246/// of the SDNodes* in assigned order by reference. 5247unsigned SelectionDAG::AssignTopologicalOrder() { 5248 5249 unsigned DAGSize = 0; 5250 5251 // SortedPos tracks the progress of the algorithm. Nodes before it are 5252 // sorted, nodes after it are unsorted. When the algorithm completes 5253 // it is at the end of the list. 5254 allnodes_iterator SortedPos = allnodes_begin(); 5255 5256 // Visit all the nodes. Move nodes with no operands to the front of 5257 // the list immediately. Annotate nodes that do have operands with their 5258 // operand count. Before we do this, the Node Id fields of the nodes 5259 // may contain arbitrary values. After, the Node Id fields for nodes 5260 // before SortedPos will contain the topological sort index, and the 5261 // Node Id fields for nodes At SortedPos and after will contain the 5262 // count of outstanding operands. 5263 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5264 SDNode *N = I++; 5265 unsigned Degree = N->getNumOperands(); 5266 if (Degree == 0) { 5267 // A node with no uses, add it to the result array immediately. 5268 N->setNodeId(DAGSize++); 5269 allnodes_iterator Q = N; 5270 if (Q != SortedPos) 5271 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5272 ++SortedPos; 5273 } else { 5274 // Temporarily use the Node Id as scratch space for the degree count. 5275 N->setNodeId(Degree); 5276 } 5277 } 5278 5279 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5280 // such that by the time the end is reached all nodes will be sorted. 5281 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5282 SDNode *N = I; 5283 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5284 UI != UE; ++UI) { 5285 SDNode *P = *UI; 5286 unsigned Degree = P->getNodeId(); 5287 --Degree; 5288 if (Degree == 0) { 5289 // All of P's operands are sorted, so P may sorted now. 5290 P->setNodeId(DAGSize++); 5291 if (P != SortedPos) 5292 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5293 ++SortedPos; 5294 } else { 5295 // Update P's outstanding operand count. 5296 P->setNodeId(Degree); 5297 } 5298 } 5299 } 5300 5301 assert(SortedPos == AllNodes.end() && 5302 "Topological sort incomplete!"); 5303 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5304 "First node in topological sort is not the entry token!"); 5305 assert(AllNodes.front().getNodeId() == 0 && 5306 "First node in topological sort has non-zero id!"); 5307 assert(AllNodes.front().getNumOperands() == 0 && 5308 "First node in topological sort has operands!"); 5309 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5310 "Last node in topologic sort has unexpected id!"); 5311 assert(AllNodes.back().use_empty() && 5312 "Last node in topologic sort has users!"); 5313 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5314 return DAGSize; 5315} 5316 5317 5318 5319//===----------------------------------------------------------------------===// 5320// SDNode Class 5321//===----------------------------------------------------------------------===// 5322 5323HandleSDNode::~HandleSDNode() { 5324 DropOperands(); 5325} 5326 5327GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA, 5328 MVT VT, int64_t o) 5329 : SDNode(isa<GlobalVariable>(GA) && 5330 cast<GlobalVariable>(GA)->isThreadLocal() ? 5331 // Thread Local 5332 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) : 5333 // Non Thread Local 5334 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress), 5335 getSDVTList(VT)), Offset(o) { 5336 TheGlobal = const_cast<GlobalValue*>(GA); 5337} 5338 5339MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt, 5340 const Value *srcValue, int SVO, 5341 unsigned alignment, bool vol) 5342 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 5343 Flags(encodeMemSDNodeFlags(vol, alignment)) { 5344 5345 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 5346 assert(getAlignment() == alignment && "Alignment representation error!"); 5347 assert(isVolatile() == vol && "Volatile representation error!"); 5348} 5349 5350MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops, 5351 unsigned NumOps, MVT memvt, const Value *srcValue, 5352 int SVO, unsigned alignment, bool vol) 5353 : SDNode(Opc, VTs, Ops, NumOps), 5354 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 5355 Flags(vol | ((Log2_32(alignment) + 1) << 1)) { 5356 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 5357 assert(getAlignment() == alignment && "Alignment representation error!"); 5358 assert(isVolatile() == vol && "Volatile representation error!"); 5359} 5360 5361MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT memvt, 5362 const Value *srcValue, int SVO, 5363 unsigned alignment, bool vol) 5364 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 5365 Flags(encodeMemSDNodeFlags(vol, alignment)) { 5366 5367 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 5368 assert(getAlignment() == alignment && "Alignment representation error!"); 5369 assert(isVolatile() == vol && "Volatile representation error!"); 5370} 5371 5372MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5373 const SDValue *Ops, 5374 unsigned NumOps, MVT memvt, const Value *srcValue, 5375 int SVO, unsigned alignment, bool vol) 5376 : SDNode(Opc, dl, VTs, Ops, NumOps), 5377 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 5378 Flags(vol | ((Log2_32(alignment) + 1) << 1)) { 5379 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 5380 assert(getAlignment() == alignment && "Alignment representation error!"); 5381 assert(isVolatile() == vol && "Volatile representation error!"); 5382} 5383 5384/// getMemOperand - Return a MachineMemOperand object describing the memory 5385/// reference performed by this memory reference. 5386MachineMemOperand MemSDNode::getMemOperand() const { 5387 int Flags = 0; 5388 if (isa<LoadSDNode>(this)) 5389 Flags = MachineMemOperand::MOLoad; 5390 else if (isa<StoreSDNode>(this)) 5391 Flags = MachineMemOperand::MOStore; 5392 else if (isa<AtomicSDNode>(this)) { 5393 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 5394 } 5395 else { 5396 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this); 5397 assert(MemIntrinNode && "Unknown MemSDNode opcode!"); 5398 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad; 5399 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore; 5400 } 5401 5402 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3; 5403 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 5404 5405 // Check if the memory reference references a frame index 5406 const FrameIndexSDNode *FI = 5407 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode()); 5408 if (!getSrcValue() && FI) 5409 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()), 5410 Flags, 0, Size, getAlignment()); 5411 else 5412 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(), 5413 Size, getAlignment()); 5414} 5415 5416/// Profile - Gather unique data for the node. 5417/// 5418void SDNode::Profile(FoldingSetNodeID &ID) const { 5419 AddNodeIDNode(ID, this); 5420} 5421 5422/// getValueTypeList - Return a pointer to the specified value type. 5423/// 5424const MVT *SDNode::getValueTypeList(MVT VT) { 5425 if (VT.isExtended()) { 5426 static std::set<MVT, MVT::compareRawBits> EVTs; 5427 return &(*EVTs.insert(VT).first); 5428 } else { 5429 static MVT VTs[MVT::LAST_VALUETYPE]; 5430 VTs[VT.getSimpleVT()] = VT; 5431 return &VTs[VT.getSimpleVT()]; 5432 } 5433} 5434 5435/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5436/// indicated value. This method ignores uses of other values defined by this 5437/// operation. 5438bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5439 assert(Value < getNumValues() && "Bad value!"); 5440 5441 // TODO: Only iterate over uses of a given value of the node 5442 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5443 if (UI.getUse().getResNo() == Value) { 5444 if (NUses == 0) 5445 return false; 5446 --NUses; 5447 } 5448 } 5449 5450 // Found exactly the right number of uses? 5451 return NUses == 0; 5452} 5453 5454 5455/// hasAnyUseOfValue - Return true if there are any use of the indicated 5456/// value. This method ignores uses of other values defined by this operation. 5457bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5458 assert(Value < getNumValues() && "Bad value!"); 5459 5460 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5461 if (UI.getUse().getResNo() == Value) 5462 return true; 5463 5464 return false; 5465} 5466 5467 5468/// isOnlyUserOf - Return true if this node is the only use of N. 5469/// 5470bool SDNode::isOnlyUserOf(SDNode *N) const { 5471 bool Seen = false; 5472 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5473 SDNode *User = *I; 5474 if (User == this) 5475 Seen = true; 5476 else 5477 return false; 5478 } 5479 5480 return Seen; 5481} 5482 5483/// isOperand - Return true if this node is an operand of N. 5484/// 5485bool SDValue::isOperandOf(SDNode *N) const { 5486 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5487 if (*this == N->getOperand(i)) 5488 return true; 5489 return false; 5490} 5491 5492bool SDNode::isOperandOf(SDNode *N) const { 5493 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5494 if (this == N->OperandList[i].getNode()) 5495 return true; 5496 return false; 5497} 5498 5499/// reachesChainWithoutSideEffects - Return true if this operand (which must 5500/// be a chain) reaches the specified operand without crossing any 5501/// side-effecting instructions. In practice, this looks through token 5502/// factors and non-volatile loads. In order to remain efficient, this only 5503/// looks a couple of nodes in, it does not do an exhaustive search. 5504bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5505 unsigned Depth) const { 5506 if (*this == Dest) return true; 5507 5508 // Don't search too deeply, we just want to be able to see through 5509 // TokenFactor's etc. 5510 if (Depth == 0) return false; 5511 5512 // If this is a token factor, all inputs to the TF happen in parallel. If any 5513 // of the operands of the TF reach dest, then we can do the xform. 5514 if (getOpcode() == ISD::TokenFactor) { 5515 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5516 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5517 return true; 5518 return false; 5519 } 5520 5521 // Loads don't have side effects, look through them. 5522 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5523 if (!Ld->isVolatile()) 5524 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5525 } 5526 return false; 5527} 5528 5529 5530static void findPredecessor(SDNode *N, const SDNode *P, bool &found, 5531 SmallPtrSet<SDNode *, 32> &Visited) { 5532 if (found || !Visited.insert(N)) 5533 return; 5534 5535 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) { 5536 SDNode *Op = N->getOperand(i).getNode(); 5537 if (Op == P) { 5538 found = true; 5539 return; 5540 } 5541 findPredecessor(Op, P, found, Visited); 5542 } 5543} 5544 5545/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5546/// is either an operand of N or it can be reached by recursively traversing 5547/// up the operands. 5548/// NOTE: this is an expensive method. Use it carefully. 5549bool SDNode::isPredecessorOf(SDNode *N) const { 5550 SmallPtrSet<SDNode *, 32> Visited; 5551 bool found = false; 5552 findPredecessor(N, this, found, Visited); 5553 return found; 5554} 5555 5556uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5557 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5558 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5559} 5560 5561std::string SDNode::getOperationName(const SelectionDAG *G) const { 5562 switch (getOpcode()) { 5563 default: 5564 if (getOpcode() < ISD::BUILTIN_OP_END) 5565 return "<<Unknown DAG Node>>"; 5566 if (isMachineOpcode()) { 5567 if (G) 5568 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5569 if (getMachineOpcode() < TII->getNumOpcodes()) 5570 return TII->get(getMachineOpcode()).getName(); 5571 return "<<Unknown Machine Node>>"; 5572 } 5573 if (G) { 5574 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5575 const char *Name = TLI.getTargetNodeName(getOpcode()); 5576 if (Name) return Name; 5577 return "<<Unknown Target Node>>"; 5578 } 5579 return "<<Unknown Node>>"; 5580 5581#ifndef NDEBUG 5582 case ISD::DELETED_NODE: 5583 return "<<Deleted Node!>>"; 5584#endif 5585 case ISD::PREFETCH: return "Prefetch"; 5586 case ISD::MEMBARRIER: return "MemBarrier"; 5587 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5588 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5589 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5590 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5591 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5592 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5593 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5594 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5595 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5596 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5597 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5598 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5599 case ISD::PCMARKER: return "PCMarker"; 5600 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5601 case ISD::SRCVALUE: return "SrcValue"; 5602 case ISD::MEMOPERAND: return "MemOperand"; 5603 case ISD::EntryToken: return "EntryToken"; 5604 case ISD::TokenFactor: return "TokenFactor"; 5605 case ISD::AssertSext: return "AssertSext"; 5606 case ISD::AssertZext: return "AssertZext"; 5607 5608 case ISD::BasicBlock: return "BasicBlock"; 5609 case ISD::ARG_FLAGS: return "ArgFlags"; 5610 case ISD::VALUETYPE: return "ValueType"; 5611 case ISD::Register: return "Register"; 5612 5613 case ISD::Constant: return "Constant"; 5614 case ISD::ConstantFP: return "ConstantFP"; 5615 case ISD::GlobalAddress: return "GlobalAddress"; 5616 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5617 case ISD::FrameIndex: return "FrameIndex"; 5618 case ISD::JumpTable: return "JumpTable"; 5619 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5620 case ISD::RETURNADDR: return "RETURNADDR"; 5621 case ISD::FRAMEADDR: return "FRAMEADDR"; 5622 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5623 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5624 case ISD::EHSELECTION: return "EHSELECTION"; 5625 case ISD::EH_RETURN: return "EH_RETURN"; 5626 case ISD::ConstantPool: return "ConstantPool"; 5627 case ISD::ExternalSymbol: return "ExternalSymbol"; 5628 case ISD::INTRINSIC_WO_CHAIN: { 5629 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue(); 5630 return Intrinsic::getName((Intrinsic::ID)IID); 5631 } 5632 case ISD::INTRINSIC_VOID: 5633 case ISD::INTRINSIC_W_CHAIN: { 5634 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue(); 5635 return Intrinsic::getName((Intrinsic::ID)IID); 5636 } 5637 5638 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5639 case ISD::TargetConstant: return "TargetConstant"; 5640 case ISD::TargetConstantFP:return "TargetConstantFP"; 5641 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5642 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5643 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5644 case ISD::TargetJumpTable: return "TargetJumpTable"; 5645 case ISD::TargetConstantPool: return "TargetConstantPool"; 5646 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5647 5648 case ISD::CopyToReg: return "CopyToReg"; 5649 case ISD::CopyFromReg: return "CopyFromReg"; 5650 case ISD::UNDEF: return "undef"; 5651 case ISD::MERGE_VALUES: return "merge_values"; 5652 case ISD::INLINEASM: return "inlineasm"; 5653 case ISD::DBG_LABEL: return "dbg_label"; 5654 case ISD::EH_LABEL: return "eh_label"; 5655 case ISD::DECLARE: return "declare"; 5656 case ISD::HANDLENODE: return "handlenode"; 5657 case ISD::FORMAL_ARGUMENTS: return "formal_arguments"; 5658 case ISD::CALL: return "call"; 5659 5660 // Unary operators 5661 case ISD::FABS: return "fabs"; 5662 case ISD::FNEG: return "fneg"; 5663 case ISD::FSQRT: return "fsqrt"; 5664 case ISD::FSIN: return "fsin"; 5665 case ISD::FCOS: return "fcos"; 5666 case ISD::FPOWI: return "fpowi"; 5667 case ISD::FPOW: return "fpow"; 5668 case ISD::FTRUNC: return "ftrunc"; 5669 case ISD::FFLOOR: return "ffloor"; 5670 case ISD::FCEIL: return "fceil"; 5671 case ISD::FRINT: return "frint"; 5672 case ISD::FNEARBYINT: return "fnearbyint"; 5673 5674 // Binary operators 5675 case ISD::ADD: return "add"; 5676 case ISD::SUB: return "sub"; 5677 case ISD::MUL: return "mul"; 5678 case ISD::MULHU: return "mulhu"; 5679 case ISD::MULHS: return "mulhs"; 5680 case ISD::SDIV: return "sdiv"; 5681 case ISD::UDIV: return "udiv"; 5682 case ISD::SREM: return "srem"; 5683 case ISD::UREM: return "urem"; 5684 case ISD::SMUL_LOHI: return "smul_lohi"; 5685 case ISD::UMUL_LOHI: return "umul_lohi"; 5686 case ISD::SDIVREM: return "sdivrem"; 5687 case ISD::UDIVREM: return "udivrem"; 5688 case ISD::AND: return "and"; 5689 case ISD::OR: return "or"; 5690 case ISD::XOR: return "xor"; 5691 case ISD::SHL: return "shl"; 5692 case ISD::SRA: return "sra"; 5693 case ISD::SRL: return "srl"; 5694 case ISD::ROTL: return "rotl"; 5695 case ISD::ROTR: return "rotr"; 5696 case ISD::FADD: return "fadd"; 5697 case ISD::FSUB: return "fsub"; 5698 case ISD::FMUL: return "fmul"; 5699 case ISD::FDIV: return "fdiv"; 5700 case ISD::FREM: return "frem"; 5701 case ISD::FCOPYSIGN: return "fcopysign"; 5702 case ISD::FGETSIGN: return "fgetsign"; 5703 5704 case ISD::SETCC: return "setcc"; 5705 case ISD::VSETCC: return "vsetcc"; 5706 case ISD::SELECT: return "select"; 5707 case ISD::SELECT_CC: return "select_cc"; 5708 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5709 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5710 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5711 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5712 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5713 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5714 case ISD::CARRY_FALSE: return "carry_false"; 5715 case ISD::ADDC: return "addc"; 5716 case ISD::ADDE: return "adde"; 5717 case ISD::SADDO: return "saddo"; 5718 case ISD::UADDO: return "uaddo"; 5719 case ISD::SSUBO: return "ssubo"; 5720 case ISD::USUBO: return "usubo"; 5721 case ISD::SMULO: return "smulo"; 5722 case ISD::UMULO: return "umulo"; 5723 case ISD::SUBC: return "subc"; 5724 case ISD::SUBE: return "sube"; 5725 case ISD::SHL_PARTS: return "shl_parts"; 5726 case ISD::SRA_PARTS: return "sra_parts"; 5727 case ISD::SRL_PARTS: return "srl_parts"; 5728 5729 case ISD::EXTRACT_SUBREG: return "extract_subreg"; 5730 case ISD::INSERT_SUBREG: return "insert_subreg"; 5731 5732 // Conversion operators. 5733 case ISD::SIGN_EXTEND: return "sign_extend"; 5734 case ISD::ZERO_EXTEND: return "zero_extend"; 5735 case ISD::ANY_EXTEND: return "any_extend"; 5736 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5737 case ISD::TRUNCATE: return "truncate"; 5738 case ISD::FP_ROUND: return "fp_round"; 5739 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5740 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5741 case ISD::FP_EXTEND: return "fp_extend"; 5742 5743 case ISD::SINT_TO_FP: return "sint_to_fp"; 5744 case ISD::UINT_TO_FP: return "uint_to_fp"; 5745 case ISD::FP_TO_SINT: return "fp_to_sint"; 5746 case ISD::FP_TO_UINT: return "fp_to_uint"; 5747 case ISD::BIT_CONVERT: return "bit_convert"; 5748 5749 case ISD::CONVERT_RNDSAT: { 5750 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5751 default: assert(0 && "Unknown cvt code!"); 5752 case ISD::CVT_FF: return "cvt_ff"; 5753 case ISD::CVT_FS: return "cvt_fs"; 5754 case ISD::CVT_FU: return "cvt_fu"; 5755 case ISD::CVT_SF: return "cvt_sf"; 5756 case ISD::CVT_UF: return "cvt_uf"; 5757 case ISD::CVT_SS: return "cvt_ss"; 5758 case ISD::CVT_SU: return "cvt_su"; 5759 case ISD::CVT_US: return "cvt_us"; 5760 case ISD::CVT_UU: return "cvt_uu"; 5761 } 5762 } 5763 5764 // Control flow instructions 5765 case ISD::BR: return "br"; 5766 case ISD::BRIND: return "brind"; 5767 case ISD::BR_JT: return "br_jt"; 5768 case ISD::BRCOND: return "brcond"; 5769 case ISD::BR_CC: return "br_cc"; 5770 case ISD::RET: return "ret"; 5771 case ISD::CALLSEQ_START: return "callseq_start"; 5772 case ISD::CALLSEQ_END: return "callseq_end"; 5773 5774 // Other operators 5775 case ISD::LOAD: return "load"; 5776 case ISD::STORE: return "store"; 5777 case ISD::VAARG: return "vaarg"; 5778 case ISD::VACOPY: return "vacopy"; 5779 case ISD::VAEND: return "vaend"; 5780 case ISD::VASTART: return "vastart"; 5781 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5782 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5783 case ISD::BUILD_PAIR: return "build_pair"; 5784 case ISD::STACKSAVE: return "stacksave"; 5785 case ISD::STACKRESTORE: return "stackrestore"; 5786 case ISD::TRAP: return "trap"; 5787 5788 // Bit manipulation 5789 case ISD::BSWAP: return "bswap"; 5790 case ISD::CTPOP: return "ctpop"; 5791 case ISD::CTTZ: return "cttz"; 5792 case ISD::CTLZ: return "ctlz"; 5793 5794 // Debug info 5795 case ISD::DBG_STOPPOINT: return "dbg_stoppoint"; 5796 case ISD::DEBUG_LOC: return "debug_loc"; 5797 5798 // Trampolines 5799 case ISD::TRAMPOLINE: return "trampoline"; 5800 5801 case ISD::CONDCODE: 5802 switch (cast<CondCodeSDNode>(this)->get()) { 5803 default: assert(0 && "Unknown setcc condition!"); 5804 case ISD::SETOEQ: return "setoeq"; 5805 case ISD::SETOGT: return "setogt"; 5806 case ISD::SETOGE: return "setoge"; 5807 case ISD::SETOLT: return "setolt"; 5808 case ISD::SETOLE: return "setole"; 5809 case ISD::SETONE: return "setone"; 5810 5811 case ISD::SETO: return "seto"; 5812 case ISD::SETUO: return "setuo"; 5813 case ISD::SETUEQ: return "setue"; 5814 case ISD::SETUGT: return "setugt"; 5815 case ISD::SETUGE: return "setuge"; 5816 case ISD::SETULT: return "setult"; 5817 case ISD::SETULE: return "setule"; 5818 case ISD::SETUNE: return "setune"; 5819 5820 case ISD::SETEQ: return "seteq"; 5821 case ISD::SETGT: return "setgt"; 5822 case ISD::SETGE: return "setge"; 5823 case ISD::SETLT: return "setlt"; 5824 case ISD::SETLE: return "setle"; 5825 case ISD::SETNE: return "setne"; 5826 } 5827 } 5828} 5829 5830const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5831 switch (AM) { 5832 default: 5833 return ""; 5834 case ISD::PRE_INC: 5835 return "<pre-inc>"; 5836 case ISD::PRE_DEC: 5837 return "<pre-dec>"; 5838 case ISD::POST_INC: 5839 return "<post-inc>"; 5840 case ISD::POST_DEC: 5841 return "<post-dec>"; 5842 } 5843} 5844 5845std::string ISD::ArgFlagsTy::getArgFlagsString() { 5846 std::string S = "< "; 5847 5848 if (isZExt()) 5849 S += "zext "; 5850 if (isSExt()) 5851 S += "sext "; 5852 if (isInReg()) 5853 S += "inreg "; 5854 if (isSRet()) 5855 S += "sret "; 5856 if (isByVal()) 5857 S += "byval "; 5858 if (isNest()) 5859 S += "nest "; 5860 if (getByValAlign()) 5861 S += "byval-align:" + utostr(getByValAlign()) + " "; 5862 if (getOrigAlign()) 5863 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5864 if (getByValSize()) 5865 S += "byval-size:" + utostr(getByValSize()) + " "; 5866 return S + ">"; 5867} 5868 5869void SDNode::dump() const { dump(0); } 5870void SDNode::dump(const SelectionDAG *G) const { 5871 print(errs(), G); 5872 errs().flush(); 5873} 5874 5875void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5876 OS << (void*)this << ": "; 5877 5878 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5879 if (i) OS << ","; 5880 if (getValueType(i) == MVT::Other) 5881 OS << "ch"; 5882 else 5883 OS << getValueType(i).getMVTString(); 5884 } 5885 OS << " = " << getOperationName(G); 5886 5887 OS << " "; 5888 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5889 if (i) OS << ", "; 5890 OS << (void*)getOperand(i).getNode(); 5891 if (unsigned RN = getOperand(i).getResNo()) 5892 OS << ":" << RN; 5893 } 5894 5895 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) { 5896 SDNode *Mask = getOperand(2).getNode(); 5897 OS << "<"; 5898 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) { 5899 if (i) OS << ","; 5900 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF) 5901 OS << "u"; 5902 else 5903 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue(); 5904 } 5905 OS << ">"; 5906 } 5907 5908 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5909 OS << '<' << CSDN->getAPIntValue() << '>'; 5910 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5911 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5912 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5913 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5914 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5915 else { 5916 OS << "<APFloat("; 5917 CSDN->getValueAPF().bitcastToAPInt().dump(); 5918 OS << ")>"; 5919 } 5920 } else if (const GlobalAddressSDNode *GADN = 5921 dyn_cast<GlobalAddressSDNode>(this)) { 5922 int64_t offset = GADN->getOffset(); 5923 OS << '<'; 5924 WriteAsOperand(OS, GADN->getGlobal()); 5925 OS << '>'; 5926 if (offset > 0) 5927 OS << " + " << offset; 5928 else 5929 OS << " " << offset; 5930 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5931 OS << "<" << FIDN->getIndex() << ">"; 5932 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5933 OS << "<" << JTDN->getIndex() << ">"; 5934 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5935 int offset = CP->getOffset(); 5936 if (CP->isMachineConstantPoolEntry()) 5937 OS << "<" << *CP->getMachineCPVal() << ">"; 5938 else 5939 OS << "<" << *CP->getConstVal() << ">"; 5940 if (offset > 0) 5941 OS << " + " << offset; 5942 else 5943 OS << " " << offset; 5944 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5945 OS << "<"; 5946 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5947 if (LBB) 5948 OS << LBB->getName() << " "; 5949 OS << (const void*)BBDN->getBasicBlock() << ">"; 5950 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5951 if (G && R->getReg() && 5952 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5953 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5954 } else { 5955 OS << " #" << R->getReg(); 5956 } 5957 } else if (const ExternalSymbolSDNode *ES = 5958 dyn_cast<ExternalSymbolSDNode>(this)) { 5959 OS << "'" << ES->getSymbol() << "'"; 5960 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5961 if (M->getValue()) 5962 OS << "<" << M->getValue() << ">"; 5963 else 5964 OS << "<null>"; 5965 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) { 5966 if (M->MO.getValue()) 5967 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">"; 5968 else 5969 OS << "<null:" << M->MO.getOffset() << ">"; 5970 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) { 5971 OS << N->getArgFlags().getArgFlagsString(); 5972 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5973 OS << ":" << N->getVT().getMVTString(); 5974 } 5975 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5976 const Value *SrcValue = LD->getSrcValue(); 5977 int SrcOffset = LD->getSrcValueOffset(); 5978 OS << " <"; 5979 if (SrcValue) 5980 OS << SrcValue; 5981 else 5982 OS << "null"; 5983 OS << ":" << SrcOffset << ">"; 5984 5985 bool doExt = true; 5986 switch (LD->getExtensionType()) { 5987 default: doExt = false; break; 5988 case ISD::EXTLOAD: OS << " <anyext "; break; 5989 case ISD::SEXTLOAD: OS << " <sext "; break; 5990 case ISD::ZEXTLOAD: OS << " <zext "; break; 5991 } 5992 if (doExt) 5993 OS << LD->getMemoryVT().getMVTString() << ">"; 5994 5995 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5996 if (*AM) 5997 OS << " " << AM; 5998 if (LD->isVolatile()) 5999 OS << " <volatile>"; 6000 OS << " alignment=" << LD->getAlignment(); 6001 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 6002 const Value *SrcValue = ST->getSrcValue(); 6003 int SrcOffset = ST->getSrcValueOffset(); 6004 OS << " <"; 6005 if (SrcValue) 6006 OS << SrcValue; 6007 else 6008 OS << "null"; 6009 OS << ":" << SrcOffset << ">"; 6010 6011 if (ST->isTruncatingStore()) 6012 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">"; 6013 6014 const char *AM = getIndexedModeName(ST->getAddressingMode()); 6015 if (*AM) 6016 OS << " " << AM; 6017 if (ST->isVolatile()) 6018 OS << " <volatile>"; 6019 OS << " alignment=" << ST->getAlignment(); 6020 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) { 6021 const Value *SrcValue = AT->getSrcValue(); 6022 int SrcOffset = AT->getSrcValueOffset(); 6023 OS << " <"; 6024 if (SrcValue) 6025 OS << SrcValue; 6026 else 6027 OS << "null"; 6028 OS << ":" << SrcOffset << ">"; 6029 if (AT->isVolatile()) 6030 OS << " <volatile>"; 6031 OS << " alignment=" << AT->getAlignment(); 6032 } 6033} 6034 6035static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6036 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6037 if (N->getOperand(i).getNode()->hasOneUse()) 6038 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6039 else 6040 cerr << "\n" << std::string(indent+2, ' ') 6041 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6042 6043 6044 cerr << "\n" << std::string(indent, ' '); 6045 N->dump(G); 6046} 6047 6048void SelectionDAG::dump() const { 6049 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6050 6051 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6052 I != E; ++I) { 6053 const SDNode *N = I; 6054 if (!N->hasOneUse() && N != getRoot().getNode()) 6055 DumpNodes(N, 2, this); 6056 } 6057 6058 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6059 6060 cerr << "\n\n"; 6061} 6062 6063const Type *ConstantPoolSDNode::getType() const { 6064 if (isMachineConstantPoolEntry()) 6065 return Val.MachineCPVal->getType(); 6066 return Val.ConstVal->getType(); 6067} 6068