SelectionDAG.cpp revision 5857e0add8ab25825628d1ef19cec027e605dcd5
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "llvm/Constants.h" 17#include "llvm/Analysis/ValueTracking.h" 18#include "llvm/Function.h" 19#include "llvm/GlobalAlias.h" 20#include "llvm/GlobalVariable.h" 21#include "llvm/Intrinsics.h" 22#include "llvm/DerivedTypes.h" 23#include "llvm/Assembly/Writer.h" 24#include "llvm/CallingConv.h" 25#include "llvm/CodeGen/MachineBasicBlock.h" 26#include "llvm/CodeGen/MachineConstantPool.h" 27#include "llvm/CodeGen/MachineFrameInfo.h" 28#include "llvm/CodeGen/MachineModuleInfo.h" 29#include "llvm/CodeGen/PseudoSourceValue.h" 30#include "llvm/Target/TargetRegisterInfo.h" 31#include "llvm/Target/TargetData.h" 32#include "llvm/Target/TargetFrameInfo.h" 33#include "llvm/Target/TargetLowering.h" 34#include "llvm/Target/TargetOptions.h" 35#include "llvm/Target/TargetInstrInfo.h" 36#include "llvm/Target/TargetIntrinsicInfo.h" 37#include "llvm/Target/TargetMachine.h" 38#include "llvm/Support/CommandLine.h" 39#include "llvm/Support/Debug.h" 40#include "llvm/Support/ErrorHandling.h" 41#include "llvm/Support/ManagedStatic.h" 42#include "llvm/Support/MathExtras.h" 43#include "llvm/Support/raw_ostream.h" 44#include "llvm/System/Mutex.h" 45#include "llvm/ADT/SetVector.h" 46#include "llvm/ADT/SmallPtrSet.h" 47#include "llvm/ADT/SmallSet.h" 48#include "llvm/ADT/SmallVector.h" 49#include "llvm/ADT/StringExtras.h" 50#include <algorithm> 51#include <cmath> 52using namespace llvm; 53 54/// makeVTList - Return an instance of the SDVTList struct initialized with the 55/// specified members. 56static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 57 SDVTList Res = {VTs, NumVTs}; 58 return Res; 59} 60 61static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 62 switch (VT.getSimpleVT().SimpleTy) { 63 default: llvm_unreachable("Unknown FP format"); 64 case MVT::f32: return &APFloat::IEEEsingle; 65 case MVT::f64: return &APFloat::IEEEdouble; 66 case MVT::f80: return &APFloat::x87DoubleExtended; 67 case MVT::f128: return &APFloat::IEEEquad; 68 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 69 } 70} 71 72SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 73 74//===----------------------------------------------------------------------===// 75// ConstantFPSDNode Class 76//===----------------------------------------------------------------------===// 77 78/// isExactlyValue - We don't rely on operator== working on double values, as 79/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 80/// As such, this method can be used to do an exact bit-for-bit comparison of 81/// two floating point values. 82bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 83 return getValueAPF().bitwiseIsEqual(V); 84} 85 86bool ConstantFPSDNode::isValueValidForType(EVT VT, 87 const APFloat& Val) { 88 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 89 90 // PPC long double cannot be converted to any other type. 91 if (VT == MVT::ppcf128 || 92 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 93 return false; 94 95 // convert modifies in place, so make a copy. 96 APFloat Val2 = APFloat(Val); 97 bool losesInfo; 98 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 99 &losesInfo); 100 return !losesInfo; 101} 102 103//===----------------------------------------------------------------------===// 104// ISD Namespace 105//===----------------------------------------------------------------------===// 106 107/// isBuildVectorAllOnes - Return true if the specified node is a 108/// BUILD_VECTOR where all of the elements are ~0 or undef. 109bool ISD::isBuildVectorAllOnes(const SDNode *N) { 110 // Look through a bit convert. 111 if (N->getOpcode() == ISD::BIT_CONVERT) 112 N = N->getOperand(0).getNode(); 113 114 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 115 116 unsigned i = 0, e = N->getNumOperands(); 117 118 // Skip over all of the undef values. 119 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 120 ++i; 121 122 // Do not accept an all-undef vector. 123 if (i == e) return false; 124 125 // Do not accept build_vectors that aren't all constants or which have non-~0 126 // elements. 127 SDValue NotZero = N->getOperand(i); 128 if (isa<ConstantSDNode>(NotZero)) { 129 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 130 return false; 131 } else if (isa<ConstantFPSDNode>(NotZero)) { 132 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 133 bitcastToAPInt().isAllOnesValue()) 134 return false; 135 } else 136 return false; 137 138 // Okay, we have at least one ~0 value, check to see if the rest match or are 139 // undefs. 140 for (++i; i != e; ++i) 141 if (N->getOperand(i) != NotZero && 142 N->getOperand(i).getOpcode() != ISD::UNDEF) 143 return false; 144 return true; 145} 146 147 148/// isBuildVectorAllZeros - Return true if the specified node is a 149/// BUILD_VECTOR where all of the elements are 0 or undef. 150bool ISD::isBuildVectorAllZeros(const SDNode *N) { 151 // Look through a bit convert. 152 if (N->getOpcode() == ISD::BIT_CONVERT) 153 N = N->getOperand(0).getNode(); 154 155 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 156 157 unsigned i = 0, e = N->getNumOperands(); 158 159 // Skip over all of the undef values. 160 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 161 ++i; 162 163 // Do not accept an all-undef vector. 164 if (i == e) return false; 165 166 // Do not accept build_vectors that aren't all constants or which have non-0 167 // elements. 168 SDValue Zero = N->getOperand(i); 169 if (isa<ConstantSDNode>(Zero)) { 170 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 171 return false; 172 } else if (isa<ConstantFPSDNode>(Zero)) { 173 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 174 return false; 175 } else 176 return false; 177 178 // Okay, we have at least one 0 value, check to see if the rest match or are 179 // undefs. 180 for (++i; i != e; ++i) 181 if (N->getOperand(i) != Zero && 182 N->getOperand(i).getOpcode() != ISD::UNDEF) 183 return false; 184 return true; 185} 186 187/// isScalarToVector - Return true if the specified node is a 188/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 189/// element is not an undef. 190bool ISD::isScalarToVector(const SDNode *N) { 191 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 192 return true; 193 194 if (N->getOpcode() != ISD::BUILD_VECTOR) 195 return false; 196 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 197 return false; 198 unsigned NumElems = N->getNumOperands(); 199 for (unsigned i = 1; i < NumElems; ++i) { 200 SDValue V = N->getOperand(i); 201 if (V.getOpcode() != ISD::UNDEF) 202 return false; 203 } 204 return true; 205} 206 207/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 208/// when given the operation for (X op Y). 209ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 210 // To perform this operation, we just need to swap the L and G bits of the 211 // operation. 212 unsigned OldL = (Operation >> 2) & 1; 213 unsigned OldG = (Operation >> 1) & 1; 214 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 215 (OldL << 1) | // New G bit 216 (OldG << 2)); // New L bit. 217} 218 219/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 220/// 'op' is a valid SetCC operation. 221ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 222 unsigned Operation = Op; 223 if (isInteger) 224 Operation ^= 7; // Flip L, G, E bits, but not U. 225 else 226 Operation ^= 15; // Flip all of the condition bits. 227 228 if (Operation > ISD::SETTRUE2) 229 Operation &= ~8; // Don't let N and U bits get set. 230 231 return ISD::CondCode(Operation); 232} 233 234 235/// isSignedOp - For an integer comparison, return 1 if the comparison is a 236/// signed operation and 2 if the result is an unsigned comparison. Return zero 237/// if the operation does not depend on the sign of the input (setne and seteq). 238static int isSignedOp(ISD::CondCode Opcode) { 239 switch (Opcode) { 240 default: llvm_unreachable("Illegal integer setcc operation!"); 241 case ISD::SETEQ: 242 case ISD::SETNE: return 0; 243 case ISD::SETLT: 244 case ISD::SETLE: 245 case ISD::SETGT: 246 case ISD::SETGE: return 1; 247 case ISD::SETULT: 248 case ISD::SETULE: 249 case ISD::SETUGT: 250 case ISD::SETUGE: return 2; 251 } 252} 253 254/// getSetCCOrOperation - Return the result of a logical OR between different 255/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 256/// returns SETCC_INVALID if it is not possible to represent the resultant 257/// comparison. 258ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 259 bool isInteger) { 260 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 261 // Cannot fold a signed integer setcc with an unsigned integer setcc. 262 return ISD::SETCC_INVALID; 263 264 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 265 266 // If the N and U bits get set then the resultant comparison DOES suddenly 267 // care about orderedness, and is true when ordered. 268 if (Op > ISD::SETTRUE2) 269 Op &= ~16; // Clear the U bit if the N bit is set. 270 271 // Canonicalize illegal integer setcc's. 272 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 273 Op = ISD::SETNE; 274 275 return ISD::CondCode(Op); 276} 277 278/// getSetCCAndOperation - Return the result of a logical AND between different 279/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 280/// function returns zero if it is not possible to represent the resultant 281/// comparison. 282ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 283 bool isInteger) { 284 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 285 // Cannot fold a signed setcc with an unsigned setcc. 286 return ISD::SETCC_INVALID; 287 288 // Combine all of the condition bits. 289 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 290 291 // Canonicalize illegal integer setcc's. 292 if (isInteger) { 293 switch (Result) { 294 default: break; 295 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 296 case ISD::SETOEQ: // SETEQ & SETU[LG]E 297 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 298 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 299 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 300 } 301 } 302 303 return Result; 304} 305 306const TargetMachine &SelectionDAG::getTarget() const { 307 return MF->getTarget(); 308} 309 310//===----------------------------------------------------------------------===// 311// SDNode Profile Support 312//===----------------------------------------------------------------------===// 313 314/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 315/// 316static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 317 ID.AddInteger(OpC); 318} 319 320/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 321/// solely with their pointer. 322static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 323 ID.AddPointer(VTList.VTs); 324} 325 326/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 327/// 328static void AddNodeIDOperands(FoldingSetNodeID &ID, 329 const SDValue *Ops, unsigned NumOps) { 330 for (; NumOps; --NumOps, ++Ops) { 331 ID.AddPointer(Ops->getNode()); 332 ID.AddInteger(Ops->getResNo()); 333 } 334} 335 336/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 337/// 338static void AddNodeIDOperands(FoldingSetNodeID &ID, 339 const SDUse *Ops, unsigned NumOps) { 340 for (; NumOps; --NumOps, ++Ops) { 341 ID.AddPointer(Ops->getNode()); 342 ID.AddInteger(Ops->getResNo()); 343 } 344} 345 346static void AddNodeIDNode(FoldingSetNodeID &ID, 347 unsigned short OpC, SDVTList VTList, 348 const SDValue *OpList, unsigned N) { 349 AddNodeIDOpcode(ID, OpC); 350 AddNodeIDValueTypes(ID, VTList); 351 AddNodeIDOperands(ID, OpList, N); 352} 353 354/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 355/// the NodeID data. 356static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 357 switch (N->getOpcode()) { 358 case ISD::TargetExternalSymbol: 359 case ISD::ExternalSymbol: 360 llvm_unreachable("Should only be used on nodes with operands"); 361 default: break; // Normal nodes don't need extra info. 362 case ISD::TargetConstant: 363 case ISD::Constant: 364 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 365 break; 366 case ISD::TargetConstantFP: 367 case ISD::ConstantFP: { 368 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 369 break; 370 } 371 case ISD::TargetGlobalAddress: 372 case ISD::GlobalAddress: 373 case ISD::TargetGlobalTLSAddress: 374 case ISD::GlobalTLSAddress: { 375 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 376 ID.AddPointer(GA->getGlobal()); 377 ID.AddInteger(GA->getOffset()); 378 ID.AddInteger(GA->getTargetFlags()); 379 break; 380 } 381 case ISD::BasicBlock: 382 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 383 break; 384 case ISD::Register: 385 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 386 break; 387 388 case ISD::SRCVALUE: 389 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 390 break; 391 case ISD::FrameIndex: 392 case ISD::TargetFrameIndex: 393 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 394 break; 395 case ISD::JumpTable: 396 case ISD::TargetJumpTable: 397 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 398 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 399 break; 400 case ISD::ConstantPool: 401 case ISD::TargetConstantPool: { 402 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 403 ID.AddInteger(CP->getAlignment()); 404 ID.AddInteger(CP->getOffset()); 405 if (CP->isMachineConstantPoolEntry()) 406 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 407 else 408 ID.AddPointer(CP->getConstVal()); 409 ID.AddInteger(CP->getTargetFlags()); 410 break; 411 } 412 case ISD::LOAD: { 413 const LoadSDNode *LD = cast<LoadSDNode>(N); 414 ID.AddInteger(LD->getMemoryVT().getRawBits()); 415 ID.AddInteger(LD->getRawSubclassData()); 416 break; 417 } 418 case ISD::STORE: { 419 const StoreSDNode *ST = cast<StoreSDNode>(N); 420 ID.AddInteger(ST->getMemoryVT().getRawBits()); 421 ID.AddInteger(ST->getRawSubclassData()); 422 break; 423 } 424 case ISD::ATOMIC_CMP_SWAP: 425 case ISD::ATOMIC_SWAP: 426 case ISD::ATOMIC_LOAD_ADD: 427 case ISD::ATOMIC_LOAD_SUB: 428 case ISD::ATOMIC_LOAD_AND: 429 case ISD::ATOMIC_LOAD_OR: 430 case ISD::ATOMIC_LOAD_XOR: 431 case ISD::ATOMIC_LOAD_NAND: 432 case ISD::ATOMIC_LOAD_MIN: 433 case ISD::ATOMIC_LOAD_MAX: 434 case ISD::ATOMIC_LOAD_UMIN: 435 case ISD::ATOMIC_LOAD_UMAX: { 436 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 437 ID.AddInteger(AT->getMemoryVT().getRawBits()); 438 ID.AddInteger(AT->getRawSubclassData()); 439 break; 440 } 441 case ISD::VECTOR_SHUFFLE: { 442 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 443 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 444 i != e; ++i) 445 ID.AddInteger(SVN->getMaskElt(i)); 446 break; 447 } 448 case ISD::TargetBlockAddress: 449 case ISD::BlockAddress: { 450 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 451 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 452 break; 453 } 454 } // end switch (N->getOpcode()) 455} 456 457/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 458/// data. 459static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 460 AddNodeIDOpcode(ID, N->getOpcode()); 461 // Add the return value info. 462 AddNodeIDValueTypes(ID, N->getVTList()); 463 // Add the operand info. 464 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 465 466 // Handle SDNode leafs with special info. 467 AddNodeIDCustom(ID, N); 468} 469 470/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 471/// the CSE map that carries volatility, temporalness, indexing mode, and 472/// extension/truncation information. 473/// 474static inline unsigned 475encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 476 bool isNonTemporal) { 477 assert((ConvType & 3) == ConvType && 478 "ConvType may not require more than 2 bits!"); 479 assert((AM & 7) == AM && 480 "AM may not require more than 3 bits!"); 481 return ConvType | 482 (AM << 2) | 483 (isVolatile << 5) | 484 (isNonTemporal << 6); 485} 486 487//===----------------------------------------------------------------------===// 488// SelectionDAG Class 489//===----------------------------------------------------------------------===// 490 491/// doNotCSE - Return true if CSE should not be performed for this node. 492static bool doNotCSE(SDNode *N) { 493 if (N->getValueType(0) == MVT::Flag) 494 return true; // Never CSE anything that produces a flag. 495 496 switch (N->getOpcode()) { 497 default: break; 498 case ISD::HANDLENODE: 499 case ISD::EH_LABEL: 500 return true; // Never CSE these nodes. 501 } 502 503 // Check that remaining values produced are not flags. 504 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 505 if (N->getValueType(i) == MVT::Flag) 506 return true; // Never CSE anything that produces a flag. 507 508 return false; 509} 510 511/// RemoveDeadNodes - This method deletes all unreachable nodes in the 512/// SelectionDAG. 513void SelectionDAG::RemoveDeadNodes() { 514 // Create a dummy node (which is not added to allnodes), that adds a reference 515 // to the root node, preventing it from being deleted. 516 HandleSDNode Dummy(getRoot()); 517 518 SmallVector<SDNode*, 128> DeadNodes; 519 520 // Add all obviously-dead nodes to the DeadNodes worklist. 521 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 522 if (I->use_empty()) 523 DeadNodes.push_back(I); 524 525 RemoveDeadNodes(DeadNodes); 526 527 // If the root changed (e.g. it was a dead load, update the root). 528 setRoot(Dummy.getValue()); 529} 530 531/// RemoveDeadNodes - This method deletes the unreachable nodes in the 532/// given list, and any nodes that become unreachable as a result. 533void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 534 DAGUpdateListener *UpdateListener) { 535 536 // Process the worklist, deleting the nodes and adding their uses to the 537 // worklist. 538 while (!DeadNodes.empty()) { 539 SDNode *N = DeadNodes.pop_back_val(); 540 541 if (UpdateListener) 542 UpdateListener->NodeDeleted(N, 0); 543 544 // Take the node out of the appropriate CSE map. 545 RemoveNodeFromCSEMaps(N); 546 547 // Next, brutally remove the operand list. This is safe to do, as there are 548 // no cycles in the graph. 549 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 550 SDUse &Use = *I++; 551 SDNode *Operand = Use.getNode(); 552 Use.set(SDValue()); 553 554 // Now that we removed this operand, see if there are no uses of it left. 555 if (Operand->use_empty()) 556 DeadNodes.push_back(Operand); 557 } 558 559 DeallocateNode(N); 560 } 561} 562 563void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 564 SmallVector<SDNode*, 16> DeadNodes(1, N); 565 RemoveDeadNodes(DeadNodes, UpdateListener); 566} 567 568void SelectionDAG::DeleteNode(SDNode *N) { 569 // First take this out of the appropriate CSE map. 570 RemoveNodeFromCSEMaps(N); 571 572 // Finally, remove uses due to operands of this node, remove from the 573 // AllNodes list, and delete the node. 574 DeleteNodeNotInCSEMaps(N); 575} 576 577void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 578 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 579 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 580 581 // Drop all of the operands and decrement used node's use counts. 582 N->DropOperands(); 583 584 DeallocateNode(N); 585} 586 587void SelectionDAG::DeallocateNode(SDNode *N) { 588 if (N->OperandsNeedDelete) 589 delete[] N->OperandList; 590 591 // Set the opcode to DELETED_NODE to help catch bugs when node 592 // memory is reallocated. 593 N->NodeType = ISD::DELETED_NODE; 594 595 NodeAllocator.Deallocate(AllNodes.remove(N)); 596 597 // Remove the ordering of this node. 598 Ordering->remove(N); 599} 600 601/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 602/// correspond to it. This is useful when we're about to delete or repurpose 603/// the node. We don't want future request for structurally identical nodes 604/// to return N anymore. 605bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 606 bool Erased = false; 607 switch (N->getOpcode()) { 608 case ISD::EntryToken: 609 llvm_unreachable("EntryToken should not be in CSEMaps!"); 610 return false; 611 case ISD::HANDLENODE: return false; // noop. 612 case ISD::CONDCODE: 613 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 614 "Cond code doesn't exist!"); 615 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 616 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 617 break; 618 case ISD::ExternalSymbol: 619 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 620 break; 621 case ISD::TargetExternalSymbol: { 622 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 623 Erased = TargetExternalSymbols.erase( 624 std::pair<std::string,unsigned char>(ESN->getSymbol(), 625 ESN->getTargetFlags())); 626 break; 627 } 628 case ISD::VALUETYPE: { 629 EVT VT = cast<VTSDNode>(N)->getVT(); 630 if (VT.isExtended()) { 631 Erased = ExtendedValueTypeNodes.erase(VT); 632 } else { 633 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 634 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 635 } 636 break; 637 } 638 default: 639 // Remove it from the CSE Map. 640 Erased = CSEMap.RemoveNode(N); 641 break; 642 } 643#ifndef NDEBUG 644 // Verify that the node was actually in one of the CSE maps, unless it has a 645 // flag result (which cannot be CSE'd) or is one of the special cases that are 646 // not subject to CSE. 647 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 648 !N->isMachineOpcode() && !doNotCSE(N)) { 649 N->dump(this); 650 dbgs() << "\n"; 651 llvm_unreachable("Node is not in map!"); 652 } 653#endif 654 return Erased; 655} 656 657/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 658/// maps and modified in place. Add it back to the CSE maps, unless an identical 659/// node already exists, in which case transfer all its users to the existing 660/// node. This transfer can potentially trigger recursive merging. 661/// 662void 663SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 664 DAGUpdateListener *UpdateListener) { 665 // For node types that aren't CSE'd, just act as if no identical node 666 // already exists. 667 if (!doNotCSE(N)) { 668 SDNode *Existing = CSEMap.GetOrInsertNode(N); 669 if (Existing != N) { 670 // If there was already an existing matching node, use ReplaceAllUsesWith 671 // to replace the dead one with the existing one. This can cause 672 // recursive merging of other unrelated nodes down the line. 673 ReplaceAllUsesWith(N, Existing, UpdateListener); 674 675 // N is now dead. Inform the listener if it exists and delete it. 676 if (UpdateListener) 677 UpdateListener->NodeDeleted(N, Existing); 678 DeleteNodeNotInCSEMaps(N); 679 return; 680 } 681 } 682 683 // If the node doesn't already exist, we updated it. Inform a listener if 684 // it exists. 685 if (UpdateListener) 686 UpdateListener->NodeUpdated(N); 687} 688 689/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 690/// were replaced with those specified. If this node is never memoized, 691/// return null, otherwise return a pointer to the slot it would take. If a 692/// node already exists with these operands, the slot will be non-null. 693SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 694 void *&InsertPos) { 695 if (doNotCSE(N)) 696 return 0; 697 698 SDValue Ops[] = { Op }; 699 FoldingSetNodeID ID; 700 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 701 AddNodeIDCustom(ID, N); 702 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 703 return Node; 704} 705 706/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 707/// were replaced with those specified. If this node is never memoized, 708/// return null, otherwise return a pointer to the slot it would take. If a 709/// node already exists with these operands, the slot will be non-null. 710SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 711 SDValue Op1, SDValue Op2, 712 void *&InsertPos) { 713 if (doNotCSE(N)) 714 return 0; 715 716 SDValue Ops[] = { Op1, Op2 }; 717 FoldingSetNodeID ID; 718 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 719 AddNodeIDCustom(ID, N); 720 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 721 return Node; 722} 723 724 725/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 726/// were replaced with those specified. If this node is never memoized, 727/// return null, otherwise return a pointer to the slot it would take. If a 728/// node already exists with these operands, the slot will be non-null. 729SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 730 const SDValue *Ops,unsigned NumOps, 731 void *&InsertPos) { 732 if (doNotCSE(N)) 733 return 0; 734 735 FoldingSetNodeID ID; 736 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 737 AddNodeIDCustom(ID, N); 738 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 739 return Node; 740} 741 742/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 743void SelectionDAG::VerifyNode(SDNode *N) { 744 switch (N->getOpcode()) { 745 default: 746 break; 747 case ISD::BUILD_PAIR: { 748 EVT VT = N->getValueType(0); 749 assert(N->getNumValues() == 1 && "Too many results!"); 750 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 751 "Wrong return type!"); 752 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 753 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 754 "Mismatched operand types!"); 755 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 756 "Wrong operand type!"); 757 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 758 "Wrong return type size"); 759 break; 760 } 761 case ISD::BUILD_VECTOR: { 762 assert(N->getNumValues() == 1 && "Too many results!"); 763 assert(N->getValueType(0).isVector() && "Wrong return type!"); 764 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 765 "Wrong number of operands!"); 766 EVT EltVT = N->getValueType(0).getVectorElementType(); 767 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 768 assert((I->getValueType() == EltVT || 769 (EltVT.isInteger() && I->getValueType().isInteger() && 770 EltVT.bitsLE(I->getValueType()))) && 771 "Wrong operand type!"); 772 break; 773 } 774 } 775} 776 777/// getEVTAlignment - Compute the default alignment value for the 778/// given type. 779/// 780unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 781 const Type *Ty = VT == MVT::iPTR ? 782 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 783 VT.getTypeForEVT(*getContext()); 784 785 return TLI.getTargetData()->getABITypeAlignment(Ty); 786} 787 788// EntryNode could meaningfully have debug info if we can find it... 789SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 790 : TLI(tli), FLI(fli), DW(0), 791 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(), 792 getVTList(MVT::Other)), 793 Root(getEntryNode()), Ordering(0) { 794 AllNodes.push_back(&EntryNode); 795 Ordering = new SDNodeOrdering(); 796} 797 798void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi, 799 DwarfWriter *dw) { 800 MF = &mf; 801 MMI = mmi; 802 DW = dw; 803 Context = &mf.getFunction()->getContext(); 804} 805 806SelectionDAG::~SelectionDAG() { 807 allnodes_clear(); 808 delete Ordering; 809} 810 811void SelectionDAG::allnodes_clear() { 812 assert(&*AllNodes.begin() == &EntryNode); 813 AllNodes.remove(AllNodes.begin()); 814 while (!AllNodes.empty()) 815 DeallocateNode(AllNodes.begin()); 816} 817 818void SelectionDAG::clear() { 819 allnodes_clear(); 820 OperandAllocator.Reset(); 821 CSEMap.clear(); 822 823 ExtendedValueTypeNodes.clear(); 824 ExternalSymbols.clear(); 825 TargetExternalSymbols.clear(); 826 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 827 static_cast<CondCodeSDNode*>(0)); 828 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 829 static_cast<SDNode*>(0)); 830 831 EntryNode.UseList = 0; 832 AllNodes.push_back(&EntryNode); 833 Root = getEntryNode(); 834 delete Ordering; 835 Ordering = new SDNodeOrdering(); 836} 837 838SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 839 return VT.bitsGT(Op.getValueType()) ? 840 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 841 getNode(ISD::TRUNCATE, DL, VT, Op); 842} 843 844SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 845 return VT.bitsGT(Op.getValueType()) ? 846 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 847 getNode(ISD::TRUNCATE, DL, VT, Op); 848} 849 850SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 851 assert(!VT.isVector() && 852 "getZeroExtendInReg should use the vector element type instead of " 853 "the vector type!"); 854 if (Op.getValueType() == VT) return Op; 855 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 856 APInt Imm = APInt::getLowBitsSet(BitWidth, 857 VT.getSizeInBits()); 858 return getNode(ISD::AND, DL, Op.getValueType(), Op, 859 getConstant(Imm, Op.getValueType())); 860} 861 862/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 863/// 864SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 865 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 866 SDValue NegOne = 867 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 868 return getNode(ISD::XOR, DL, VT, Val, NegOne); 869} 870 871SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 872 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 873 assert((EltVT.getSizeInBits() >= 64 || 874 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 875 "getConstant with a uint64_t value that doesn't fit in the type!"); 876 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 877} 878 879SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 880 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 881} 882 883SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 884 assert(VT.isInteger() && "Cannot create FP integer constant!"); 885 886 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 887 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 888 "APInt size does not match type size!"); 889 890 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 891 FoldingSetNodeID ID; 892 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 893 ID.AddPointer(&Val); 894 void *IP = 0; 895 SDNode *N = NULL; 896 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 897 if (!VT.isVector()) 898 return SDValue(N, 0); 899 900 if (!N) { 901 N = NodeAllocator.Allocate<ConstantSDNode>(); 902 new (N) ConstantSDNode(isT, &Val, EltVT); 903 CSEMap.InsertNode(N, IP); 904 AllNodes.push_back(N); 905 } 906 907 SDValue Result(N, 0); 908 if (VT.isVector()) { 909 SmallVector<SDValue, 8> Ops; 910 Ops.assign(VT.getVectorNumElements(), Result); 911 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 912 VT, &Ops[0], Ops.size()); 913 } 914 return Result; 915} 916 917SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 918 return getConstant(Val, TLI.getPointerTy(), isTarget); 919} 920 921 922SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 923 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 924} 925 926SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 927 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 928 929 EVT EltVT = 930 VT.isVector() ? VT.getVectorElementType() : VT; 931 932 // Do the map lookup using the actual bit pattern for the floating point 933 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 934 // we don't have issues with SNANs. 935 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 936 FoldingSetNodeID ID; 937 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 938 ID.AddPointer(&V); 939 void *IP = 0; 940 SDNode *N = NULL; 941 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 942 if (!VT.isVector()) 943 return SDValue(N, 0); 944 945 if (!N) { 946 N = NodeAllocator.Allocate<ConstantFPSDNode>(); 947 new (N) ConstantFPSDNode(isTarget, &V, EltVT); 948 CSEMap.InsertNode(N, IP); 949 AllNodes.push_back(N); 950 } 951 952 SDValue Result(N, 0); 953 if (VT.isVector()) { 954 SmallVector<SDValue, 8> Ops; 955 Ops.assign(VT.getVectorNumElements(), Result); 956 // FIXME DebugLoc info might be appropriate here 957 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 958 VT, &Ops[0], Ops.size()); 959 } 960 return Result; 961} 962 963SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 964 EVT EltVT = 965 VT.isVector() ? VT.getVectorElementType() : VT; 966 if (EltVT==MVT::f32) 967 return getConstantFP(APFloat((float)Val), VT, isTarget); 968 else 969 return getConstantFP(APFloat(Val), VT, isTarget); 970} 971 972SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 973 EVT VT, int64_t Offset, 974 bool isTargetGA, 975 unsigned char TargetFlags) { 976 assert((TargetFlags == 0 || isTargetGA) && 977 "Cannot set target flags on target-independent globals"); 978 979 // Truncate (with sign-extension) the offset value to the pointer size. 980 EVT PTy = TLI.getPointerTy(); 981 unsigned BitWidth = PTy.getSizeInBits(); 982 if (BitWidth < 64) 983 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 984 985 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 986 if (!GVar) { 987 // If GV is an alias then use the aliasee for determining thread-localness. 988 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 989 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 990 } 991 992 unsigned Opc; 993 if (GVar && GVar->isThreadLocal()) 994 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 995 else 996 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 997 998 FoldingSetNodeID ID; 999 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1000 ID.AddPointer(GV); 1001 ID.AddInteger(Offset); 1002 ID.AddInteger(TargetFlags); 1003 void *IP = 0; 1004 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1005 return SDValue(E, 0); 1006 1007 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>(); 1008 new (N) GlobalAddressSDNode(Opc, GV, VT, Offset, TargetFlags); 1009 CSEMap.InsertNode(N, IP); 1010 AllNodes.push_back(N); 1011 return SDValue(N, 0); 1012} 1013 1014SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1015 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1016 FoldingSetNodeID ID; 1017 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1018 ID.AddInteger(FI); 1019 void *IP = 0; 1020 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1021 return SDValue(E, 0); 1022 1023 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>(); 1024 new (N) FrameIndexSDNode(FI, VT, isTarget); 1025 CSEMap.InsertNode(N, IP); 1026 AllNodes.push_back(N); 1027 return SDValue(N, 0); 1028} 1029 1030SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1031 unsigned char TargetFlags) { 1032 assert((TargetFlags == 0 || isTarget) && 1033 "Cannot set target flags on target-independent jump tables"); 1034 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1035 FoldingSetNodeID ID; 1036 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1037 ID.AddInteger(JTI); 1038 ID.AddInteger(TargetFlags); 1039 void *IP = 0; 1040 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1041 return SDValue(E, 0); 1042 1043 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>(); 1044 new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags); 1045 CSEMap.InsertNode(N, IP); 1046 AllNodes.push_back(N); 1047 return SDValue(N, 0); 1048} 1049 1050SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT, 1051 unsigned Alignment, int Offset, 1052 bool isTarget, 1053 unsigned char TargetFlags) { 1054 assert((TargetFlags == 0 || isTarget) && 1055 "Cannot set target flags on target-independent globals"); 1056 if (Alignment == 0) 1057 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1058 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1059 FoldingSetNodeID ID; 1060 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1061 ID.AddInteger(Alignment); 1062 ID.AddInteger(Offset); 1063 ID.AddPointer(C); 1064 ID.AddInteger(TargetFlags); 1065 void *IP = 0; 1066 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1067 return SDValue(E, 0); 1068 1069 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1070 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags); 1071 CSEMap.InsertNode(N, IP); 1072 AllNodes.push_back(N); 1073 return SDValue(N, 0); 1074} 1075 1076 1077SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1078 unsigned Alignment, int Offset, 1079 bool isTarget, 1080 unsigned char TargetFlags) { 1081 assert((TargetFlags == 0 || isTarget) && 1082 "Cannot set target flags on target-independent globals"); 1083 if (Alignment == 0) 1084 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1085 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1086 FoldingSetNodeID ID; 1087 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1088 ID.AddInteger(Alignment); 1089 ID.AddInteger(Offset); 1090 C->AddSelectionDAGCSEId(ID); 1091 ID.AddInteger(TargetFlags); 1092 void *IP = 0; 1093 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1094 return SDValue(E, 0); 1095 1096 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1097 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags); 1098 CSEMap.InsertNode(N, IP); 1099 AllNodes.push_back(N); 1100 return SDValue(N, 0); 1101} 1102 1103SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1104 FoldingSetNodeID ID; 1105 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1106 ID.AddPointer(MBB); 1107 void *IP = 0; 1108 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1109 return SDValue(E, 0); 1110 1111 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1112 new (N) BasicBlockSDNode(MBB); 1113 CSEMap.InsertNode(N, IP); 1114 AllNodes.push_back(N); 1115 return SDValue(N, 0); 1116} 1117 1118SDValue SelectionDAG::getValueType(EVT VT) { 1119 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1120 ValueTypeNodes.size()) 1121 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1122 1123 SDNode *&N = VT.isExtended() ? 1124 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1125 1126 if (N) return SDValue(N, 0); 1127 N = NodeAllocator.Allocate<VTSDNode>(); 1128 new (N) VTSDNode(VT); 1129 AllNodes.push_back(N); 1130 return SDValue(N, 0); 1131} 1132 1133SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1134 SDNode *&N = ExternalSymbols[Sym]; 1135 if (N) return SDValue(N, 0); 1136 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1137 new (N) ExternalSymbolSDNode(false, Sym, 0, VT); 1138 AllNodes.push_back(N); 1139 return SDValue(N, 0); 1140} 1141 1142SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1143 unsigned char TargetFlags) { 1144 SDNode *&N = 1145 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1146 TargetFlags)]; 1147 if (N) return SDValue(N, 0); 1148 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1149 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1150 AllNodes.push_back(N); 1151 return SDValue(N, 0); 1152} 1153 1154SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1155 if ((unsigned)Cond >= CondCodeNodes.size()) 1156 CondCodeNodes.resize(Cond+1); 1157 1158 if (CondCodeNodes[Cond] == 0) { 1159 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>(); 1160 new (N) CondCodeSDNode(Cond); 1161 CondCodeNodes[Cond] = N; 1162 AllNodes.push_back(N); 1163 } 1164 1165 return SDValue(CondCodeNodes[Cond], 0); 1166} 1167 1168// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1169// the shuffle mask M that point at N1 to point at N2, and indices that point 1170// N2 to point at N1. 1171static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1172 std::swap(N1, N2); 1173 int NElts = M.size(); 1174 for (int i = 0; i != NElts; ++i) { 1175 if (M[i] >= NElts) 1176 M[i] -= NElts; 1177 else if (M[i] >= 0) 1178 M[i] += NElts; 1179 } 1180} 1181 1182SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1183 SDValue N2, const int *Mask) { 1184 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1185 assert(VT.isVector() && N1.getValueType().isVector() && 1186 "Vector Shuffle VTs must be a vectors"); 1187 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1188 && "Vector Shuffle VTs must have same element type"); 1189 1190 // Canonicalize shuffle undef, undef -> undef 1191 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1192 return getUNDEF(VT); 1193 1194 // Validate that all indices in Mask are within the range of the elements 1195 // input to the shuffle. 1196 unsigned NElts = VT.getVectorNumElements(); 1197 SmallVector<int, 8> MaskVec; 1198 for (unsigned i = 0; i != NElts; ++i) { 1199 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1200 MaskVec.push_back(Mask[i]); 1201 } 1202 1203 // Canonicalize shuffle v, v -> v, undef 1204 if (N1 == N2) { 1205 N2 = getUNDEF(VT); 1206 for (unsigned i = 0; i != NElts; ++i) 1207 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1208 } 1209 1210 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1211 if (N1.getOpcode() == ISD::UNDEF) 1212 commuteShuffle(N1, N2, MaskVec); 1213 1214 // Canonicalize all index into lhs, -> shuffle lhs, undef 1215 // Canonicalize all index into rhs, -> shuffle rhs, undef 1216 bool AllLHS = true, AllRHS = true; 1217 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1218 for (unsigned i = 0; i != NElts; ++i) { 1219 if (MaskVec[i] >= (int)NElts) { 1220 if (N2Undef) 1221 MaskVec[i] = -1; 1222 else 1223 AllLHS = false; 1224 } else if (MaskVec[i] >= 0) { 1225 AllRHS = false; 1226 } 1227 } 1228 if (AllLHS && AllRHS) 1229 return getUNDEF(VT); 1230 if (AllLHS && !N2Undef) 1231 N2 = getUNDEF(VT); 1232 if (AllRHS) { 1233 N1 = getUNDEF(VT); 1234 commuteShuffle(N1, N2, MaskVec); 1235 } 1236 1237 // If Identity shuffle, or all shuffle in to undef, return that node. 1238 bool AllUndef = true; 1239 bool Identity = true; 1240 for (unsigned i = 0; i != NElts; ++i) { 1241 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1242 if (MaskVec[i] >= 0) AllUndef = false; 1243 } 1244 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1245 return N1; 1246 if (AllUndef) 1247 return getUNDEF(VT); 1248 1249 FoldingSetNodeID ID; 1250 SDValue Ops[2] = { N1, N2 }; 1251 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1252 for (unsigned i = 0; i != NElts; ++i) 1253 ID.AddInteger(MaskVec[i]); 1254 1255 void* IP = 0; 1256 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1257 return SDValue(E, 0); 1258 1259 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1260 // SDNode doesn't have access to it. This memory will be "leaked" when 1261 // the node is deallocated, but recovered when the NodeAllocator is released. 1262 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1263 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1264 1265 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>(); 1266 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1267 CSEMap.InsertNode(N, IP); 1268 AllNodes.push_back(N); 1269 return SDValue(N, 0); 1270} 1271 1272SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1273 SDValue Val, SDValue DTy, 1274 SDValue STy, SDValue Rnd, SDValue Sat, 1275 ISD::CvtCode Code) { 1276 // If the src and dest types are the same and the conversion is between 1277 // integer types of the same sign or two floats, no conversion is necessary. 1278 if (DTy == STy && 1279 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1280 return Val; 1281 1282 FoldingSetNodeID ID; 1283 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1284 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1285 void* IP = 0; 1286 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1287 return SDValue(E, 0); 1288 1289 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>(); 1290 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code); 1291 CSEMap.InsertNode(N, IP); 1292 AllNodes.push_back(N); 1293 return SDValue(N, 0); 1294} 1295 1296SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1297 FoldingSetNodeID ID; 1298 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1299 ID.AddInteger(RegNo); 1300 void *IP = 0; 1301 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1302 return SDValue(E, 0); 1303 1304 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>(); 1305 new (N) RegisterSDNode(RegNo, VT); 1306 CSEMap.InsertNode(N, IP); 1307 AllNodes.push_back(N); 1308 return SDValue(N, 0); 1309} 1310 1311SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl, 1312 SDValue Root, 1313 unsigned LabelID) { 1314 FoldingSetNodeID ID; 1315 SDValue Ops[] = { Root }; 1316 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1317 ID.AddInteger(LabelID); 1318 void *IP = 0; 1319 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1320 return SDValue(E, 0); 1321 1322 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1323 new (N) LabelSDNode(Opcode, dl, Root, LabelID); 1324 CSEMap.InsertNode(N, IP); 1325 AllNodes.push_back(N); 1326 return SDValue(N, 0); 1327} 1328 1329SDValue SelectionDAG::getBlockAddress(BlockAddress *BA, EVT VT, 1330 bool isTarget, 1331 unsigned char TargetFlags) { 1332 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1333 1334 FoldingSetNodeID ID; 1335 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1336 ID.AddPointer(BA); 1337 ID.AddInteger(TargetFlags); 1338 void *IP = 0; 1339 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1340 return SDValue(E, 0); 1341 1342 SDNode *N = NodeAllocator.Allocate<BlockAddressSDNode>(); 1343 new (N) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1344 CSEMap.InsertNode(N, IP); 1345 AllNodes.push_back(N); 1346 return SDValue(N, 0); 1347} 1348 1349SDValue SelectionDAG::getSrcValue(const Value *V) { 1350 assert((!V || V->getType()->isPointerTy()) && 1351 "SrcValue is not a pointer?"); 1352 1353 FoldingSetNodeID ID; 1354 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1355 ID.AddPointer(V); 1356 1357 void *IP = 0; 1358 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1359 return SDValue(E, 0); 1360 1361 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>(); 1362 new (N) SrcValueSDNode(V); 1363 CSEMap.InsertNode(N, IP); 1364 AllNodes.push_back(N); 1365 return SDValue(N, 0); 1366} 1367 1368/// getShiftAmountOperand - Return the specified value casted to 1369/// the target's desired shift amount type. 1370SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1371 EVT OpTy = Op.getValueType(); 1372 MVT ShTy = TLI.getShiftAmountTy(); 1373 if (OpTy == ShTy || OpTy.isVector()) return Op; 1374 1375 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1376 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1377} 1378 1379/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1380/// specified value type. 1381SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1382 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1383 unsigned ByteSize = VT.getStoreSize(); 1384 const Type *Ty = VT.getTypeForEVT(*getContext()); 1385 unsigned StackAlign = 1386 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1387 1388 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1389 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1390} 1391 1392/// CreateStackTemporary - Create a stack temporary suitable for holding 1393/// either of the specified value types. 1394SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1395 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1396 VT2.getStoreSizeInBits())/8; 1397 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1398 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1399 const TargetData *TD = TLI.getTargetData(); 1400 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1401 TD->getPrefTypeAlignment(Ty2)); 1402 1403 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1404 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1405 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1406} 1407 1408SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1409 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1410 // These setcc operations always fold. 1411 switch (Cond) { 1412 default: break; 1413 case ISD::SETFALSE: 1414 case ISD::SETFALSE2: return getConstant(0, VT); 1415 case ISD::SETTRUE: 1416 case ISD::SETTRUE2: return getConstant(1, VT); 1417 1418 case ISD::SETOEQ: 1419 case ISD::SETOGT: 1420 case ISD::SETOGE: 1421 case ISD::SETOLT: 1422 case ISD::SETOLE: 1423 case ISD::SETONE: 1424 case ISD::SETO: 1425 case ISD::SETUO: 1426 case ISD::SETUEQ: 1427 case ISD::SETUNE: 1428 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1429 break; 1430 } 1431 1432 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1433 const APInt &C2 = N2C->getAPIntValue(); 1434 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1435 const APInt &C1 = N1C->getAPIntValue(); 1436 1437 switch (Cond) { 1438 default: llvm_unreachable("Unknown integer setcc!"); 1439 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1440 case ISD::SETNE: return getConstant(C1 != C2, VT); 1441 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1442 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1443 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1444 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1445 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1446 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1447 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1448 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1449 } 1450 } 1451 } 1452 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1453 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1454 // No compile time operations on this type yet. 1455 if (N1C->getValueType(0) == MVT::ppcf128) 1456 return SDValue(); 1457 1458 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1459 switch (Cond) { 1460 default: break; 1461 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1462 return getUNDEF(VT); 1463 // fall through 1464 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1465 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1466 return getUNDEF(VT); 1467 // fall through 1468 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1469 R==APFloat::cmpLessThan, VT); 1470 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1471 return getUNDEF(VT); 1472 // fall through 1473 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1474 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1475 return getUNDEF(VT); 1476 // fall through 1477 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1478 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1479 return getUNDEF(VT); 1480 // fall through 1481 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1482 R==APFloat::cmpEqual, VT); 1483 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1484 return getUNDEF(VT); 1485 // fall through 1486 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1487 R==APFloat::cmpEqual, VT); 1488 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1489 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1490 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1491 R==APFloat::cmpEqual, VT); 1492 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1493 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1494 R==APFloat::cmpLessThan, VT); 1495 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1496 R==APFloat::cmpUnordered, VT); 1497 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1498 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1499 } 1500 } else { 1501 // Ensure that the constant occurs on the RHS. 1502 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1503 } 1504 } 1505 1506 // Could not fold it. 1507 return SDValue(); 1508} 1509 1510/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1511/// use this predicate to simplify operations downstream. 1512bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1513 // This predicate is not safe for vector operations. 1514 if (Op.getValueType().isVector()) 1515 return false; 1516 1517 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1518 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1519} 1520 1521/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1522/// this predicate to simplify operations downstream. Mask is known to be zero 1523/// for bits that V cannot have. 1524bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1525 unsigned Depth) const { 1526 APInt KnownZero, KnownOne; 1527 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1528 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1529 return (KnownZero & Mask) == Mask; 1530} 1531 1532/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1533/// known to be either zero or one and return them in the KnownZero/KnownOne 1534/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1535/// processing. 1536void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1537 APInt &KnownZero, APInt &KnownOne, 1538 unsigned Depth) const { 1539 unsigned BitWidth = Mask.getBitWidth(); 1540 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1541 "Mask size mismatches value type size!"); 1542 1543 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1544 if (Depth == 6 || Mask == 0) 1545 return; // Limit search depth. 1546 1547 APInt KnownZero2, KnownOne2; 1548 1549 switch (Op.getOpcode()) { 1550 case ISD::Constant: 1551 // We know all of the bits for a constant! 1552 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1553 KnownZero = ~KnownOne & Mask; 1554 return; 1555 case ISD::AND: 1556 // If either the LHS or the RHS are Zero, the result is zero. 1557 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1558 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1559 KnownZero2, KnownOne2, Depth+1); 1560 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1561 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1562 1563 // Output known-1 bits are only known if set in both the LHS & RHS. 1564 KnownOne &= KnownOne2; 1565 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1566 KnownZero |= KnownZero2; 1567 return; 1568 case ISD::OR: 1569 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1570 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1571 KnownZero2, KnownOne2, Depth+1); 1572 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1573 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1574 1575 // Output known-0 bits are only known if clear in both the LHS & RHS. 1576 KnownZero &= KnownZero2; 1577 // Output known-1 are known to be set if set in either the LHS | RHS. 1578 KnownOne |= KnownOne2; 1579 return; 1580 case ISD::XOR: { 1581 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1582 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1583 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1584 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1585 1586 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1587 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1588 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1589 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1590 KnownZero = KnownZeroOut; 1591 return; 1592 } 1593 case ISD::MUL: { 1594 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1595 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1596 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1597 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1598 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1599 1600 // If low bits are zero in either operand, output low known-0 bits. 1601 // Also compute a conserative estimate for high known-0 bits. 1602 // More trickiness is possible, but this is sufficient for the 1603 // interesting case of alignment computation. 1604 KnownOne.clear(); 1605 unsigned TrailZ = KnownZero.countTrailingOnes() + 1606 KnownZero2.countTrailingOnes(); 1607 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1608 KnownZero2.countLeadingOnes(), 1609 BitWidth) - BitWidth; 1610 1611 TrailZ = std::min(TrailZ, BitWidth); 1612 LeadZ = std::min(LeadZ, BitWidth); 1613 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1614 APInt::getHighBitsSet(BitWidth, LeadZ); 1615 KnownZero &= Mask; 1616 return; 1617 } 1618 case ISD::UDIV: { 1619 // For the purposes of computing leading zeros we can conservatively 1620 // treat a udiv as a logical right shift by the power of 2 known to 1621 // be less than the denominator. 1622 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1623 ComputeMaskedBits(Op.getOperand(0), 1624 AllOnes, KnownZero2, KnownOne2, Depth+1); 1625 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1626 1627 KnownOne2.clear(); 1628 KnownZero2.clear(); 1629 ComputeMaskedBits(Op.getOperand(1), 1630 AllOnes, KnownZero2, KnownOne2, Depth+1); 1631 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1632 if (RHSUnknownLeadingOnes != BitWidth) 1633 LeadZ = std::min(BitWidth, 1634 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1635 1636 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1637 return; 1638 } 1639 case ISD::SELECT: 1640 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1641 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1642 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1643 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1644 1645 // Only known if known in both the LHS and RHS. 1646 KnownOne &= KnownOne2; 1647 KnownZero &= KnownZero2; 1648 return; 1649 case ISD::SELECT_CC: 1650 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1651 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1652 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1653 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1654 1655 // Only known if known in both the LHS and RHS. 1656 KnownOne &= KnownOne2; 1657 KnownZero &= KnownZero2; 1658 return; 1659 case ISD::SADDO: 1660 case ISD::UADDO: 1661 case ISD::SSUBO: 1662 case ISD::USUBO: 1663 case ISD::SMULO: 1664 case ISD::UMULO: 1665 if (Op.getResNo() != 1) 1666 return; 1667 // The boolean result conforms to getBooleanContents. Fall through. 1668 case ISD::SETCC: 1669 // If we know the result of a setcc has the top bits zero, use this info. 1670 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1671 BitWidth > 1) 1672 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1673 return; 1674 case ISD::SHL: 1675 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1676 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1677 unsigned ShAmt = SA->getZExtValue(); 1678 1679 // If the shift count is an invalid immediate, don't do anything. 1680 if (ShAmt >= BitWidth) 1681 return; 1682 1683 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1684 KnownZero, KnownOne, Depth+1); 1685 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1686 KnownZero <<= ShAmt; 1687 KnownOne <<= ShAmt; 1688 // low bits known zero. 1689 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1690 } 1691 return; 1692 case ISD::SRL: 1693 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1694 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1695 unsigned ShAmt = SA->getZExtValue(); 1696 1697 // If the shift count is an invalid immediate, don't do anything. 1698 if (ShAmt >= BitWidth) 1699 return; 1700 1701 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1702 KnownZero, KnownOne, Depth+1); 1703 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1704 KnownZero = KnownZero.lshr(ShAmt); 1705 KnownOne = KnownOne.lshr(ShAmt); 1706 1707 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1708 KnownZero |= HighBits; // High bits known zero. 1709 } 1710 return; 1711 case ISD::SRA: 1712 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1713 unsigned ShAmt = SA->getZExtValue(); 1714 1715 // If the shift count is an invalid immediate, don't do anything. 1716 if (ShAmt >= BitWidth) 1717 return; 1718 1719 APInt InDemandedMask = (Mask << ShAmt); 1720 // If any of the demanded bits are produced by the sign extension, we also 1721 // demand the input sign bit. 1722 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1723 if (HighBits.getBoolValue()) 1724 InDemandedMask |= APInt::getSignBit(BitWidth); 1725 1726 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1727 Depth+1); 1728 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1729 KnownZero = KnownZero.lshr(ShAmt); 1730 KnownOne = KnownOne.lshr(ShAmt); 1731 1732 // Handle the sign bits. 1733 APInt SignBit = APInt::getSignBit(BitWidth); 1734 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1735 1736 if (KnownZero.intersects(SignBit)) { 1737 KnownZero |= HighBits; // New bits are known zero. 1738 } else if (KnownOne.intersects(SignBit)) { 1739 KnownOne |= HighBits; // New bits are known one. 1740 } 1741 } 1742 return; 1743 case ISD::SIGN_EXTEND_INREG: { 1744 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1745 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1746 1747 // Sign extension. Compute the demanded bits in the result that are not 1748 // present in the input. 1749 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1750 1751 APInt InSignBit = APInt::getSignBit(EBits); 1752 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1753 1754 // If the sign extended bits are demanded, we know that the sign 1755 // bit is demanded. 1756 InSignBit.zext(BitWidth); 1757 if (NewBits.getBoolValue()) 1758 InputDemandedBits |= InSignBit; 1759 1760 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1761 KnownZero, KnownOne, Depth+1); 1762 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1763 1764 // If the sign bit of the input is known set or clear, then we know the 1765 // top bits of the result. 1766 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1767 KnownZero |= NewBits; 1768 KnownOne &= ~NewBits; 1769 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1770 KnownOne |= NewBits; 1771 KnownZero &= ~NewBits; 1772 } else { // Input sign bit unknown 1773 KnownZero &= ~NewBits; 1774 KnownOne &= ~NewBits; 1775 } 1776 return; 1777 } 1778 case ISD::CTTZ: 1779 case ISD::CTLZ: 1780 case ISD::CTPOP: { 1781 unsigned LowBits = Log2_32(BitWidth)+1; 1782 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1783 KnownOne.clear(); 1784 return; 1785 } 1786 case ISD::LOAD: { 1787 if (ISD::isZEXTLoad(Op.getNode())) { 1788 LoadSDNode *LD = cast<LoadSDNode>(Op); 1789 EVT VT = LD->getMemoryVT(); 1790 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1791 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1792 } 1793 return; 1794 } 1795 case ISD::ZERO_EXTEND: { 1796 EVT InVT = Op.getOperand(0).getValueType(); 1797 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1798 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1799 APInt InMask = Mask; 1800 InMask.trunc(InBits); 1801 KnownZero.trunc(InBits); 1802 KnownOne.trunc(InBits); 1803 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1804 KnownZero.zext(BitWidth); 1805 KnownOne.zext(BitWidth); 1806 KnownZero |= NewBits; 1807 return; 1808 } 1809 case ISD::SIGN_EXTEND: { 1810 EVT InVT = Op.getOperand(0).getValueType(); 1811 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1812 APInt InSignBit = APInt::getSignBit(InBits); 1813 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1814 APInt InMask = Mask; 1815 InMask.trunc(InBits); 1816 1817 // If any of the sign extended bits are demanded, we know that the sign 1818 // bit is demanded. Temporarily set this bit in the mask for our callee. 1819 if (NewBits.getBoolValue()) 1820 InMask |= InSignBit; 1821 1822 KnownZero.trunc(InBits); 1823 KnownOne.trunc(InBits); 1824 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1825 1826 // Note if the sign bit is known to be zero or one. 1827 bool SignBitKnownZero = KnownZero.isNegative(); 1828 bool SignBitKnownOne = KnownOne.isNegative(); 1829 assert(!(SignBitKnownZero && SignBitKnownOne) && 1830 "Sign bit can't be known to be both zero and one!"); 1831 1832 // If the sign bit wasn't actually demanded by our caller, we don't 1833 // want it set in the KnownZero and KnownOne result values. Reset the 1834 // mask and reapply it to the result values. 1835 InMask = Mask; 1836 InMask.trunc(InBits); 1837 KnownZero &= InMask; 1838 KnownOne &= InMask; 1839 1840 KnownZero.zext(BitWidth); 1841 KnownOne.zext(BitWidth); 1842 1843 // If the sign bit is known zero or one, the top bits match. 1844 if (SignBitKnownZero) 1845 KnownZero |= NewBits; 1846 else if (SignBitKnownOne) 1847 KnownOne |= NewBits; 1848 return; 1849 } 1850 case ISD::ANY_EXTEND: { 1851 EVT InVT = Op.getOperand(0).getValueType(); 1852 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1853 APInt InMask = Mask; 1854 InMask.trunc(InBits); 1855 KnownZero.trunc(InBits); 1856 KnownOne.trunc(InBits); 1857 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1858 KnownZero.zext(BitWidth); 1859 KnownOne.zext(BitWidth); 1860 return; 1861 } 1862 case ISD::TRUNCATE: { 1863 EVT InVT = Op.getOperand(0).getValueType(); 1864 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1865 APInt InMask = Mask; 1866 InMask.zext(InBits); 1867 KnownZero.zext(InBits); 1868 KnownOne.zext(InBits); 1869 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1870 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1871 KnownZero.trunc(BitWidth); 1872 KnownOne.trunc(BitWidth); 1873 break; 1874 } 1875 case ISD::AssertZext: { 1876 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1877 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1878 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1879 KnownOne, Depth+1); 1880 KnownZero |= (~InMask) & Mask; 1881 return; 1882 } 1883 case ISD::FGETSIGN: 1884 // All bits are zero except the low bit. 1885 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1886 return; 1887 1888 case ISD::SUB: { 1889 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1890 // We know that the top bits of C-X are clear if X contains less bits 1891 // than C (i.e. no wrap-around can happen). For example, 20-X is 1892 // positive if we can prove that X is >= 0 and < 16. 1893 if (CLHS->getAPIntValue().isNonNegative()) { 1894 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1895 // NLZ can't be BitWidth with no sign bit 1896 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1897 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1898 Depth+1); 1899 1900 // If all of the MaskV bits are known to be zero, then we know the 1901 // output top bits are zero, because we now know that the output is 1902 // from [0-C]. 1903 if ((KnownZero2 & MaskV) == MaskV) { 1904 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1905 // Top bits known zero. 1906 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1907 } 1908 } 1909 } 1910 } 1911 // fall through 1912 case ISD::ADD: { 1913 // Output known-0 bits are known if clear or set in both the low clear bits 1914 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1915 // low 3 bits clear. 1916 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1917 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1918 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1919 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1920 1921 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1922 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1923 KnownZeroOut = std::min(KnownZeroOut, 1924 KnownZero2.countTrailingOnes()); 1925 1926 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1927 return; 1928 } 1929 case ISD::SREM: 1930 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1931 const APInt &RA = Rem->getAPIntValue().abs(); 1932 if (RA.isPowerOf2()) { 1933 APInt LowBits = RA - 1; 1934 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1935 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1936 1937 // The low bits of the first operand are unchanged by the srem. 1938 KnownZero = KnownZero2 & LowBits; 1939 KnownOne = KnownOne2 & LowBits; 1940 1941 // If the first operand is non-negative or has all low bits zero, then 1942 // the upper bits are all zero. 1943 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1944 KnownZero |= ~LowBits; 1945 1946 // If the first operand is negative and not all low bits are zero, then 1947 // the upper bits are all one. 1948 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 1949 KnownOne |= ~LowBits; 1950 1951 KnownZero &= Mask; 1952 KnownOne &= Mask; 1953 1954 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1955 } 1956 } 1957 return; 1958 case ISD::UREM: { 1959 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1960 const APInt &RA = Rem->getAPIntValue(); 1961 if (RA.isPowerOf2()) { 1962 APInt LowBits = (RA - 1); 1963 APInt Mask2 = LowBits & Mask; 1964 KnownZero |= ~LowBits & Mask; 1965 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1966 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1967 break; 1968 } 1969 } 1970 1971 // Since the result is less than or equal to either operand, any leading 1972 // zero bits in either operand must also exist in the result. 1973 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1974 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1975 Depth+1); 1976 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1977 Depth+1); 1978 1979 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1980 KnownZero2.countLeadingOnes()); 1981 KnownOne.clear(); 1982 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1983 return; 1984 } 1985 default: 1986 // Allow the target to implement this method for its nodes. 1987 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1988 case ISD::INTRINSIC_WO_CHAIN: 1989 case ISD::INTRINSIC_W_CHAIN: 1990 case ISD::INTRINSIC_VOID: 1991 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 1992 Depth); 1993 } 1994 return; 1995 } 1996} 1997 1998/// ComputeNumSignBits - Return the number of times the sign bit of the 1999/// register is replicated into the other bits. We know that at least 1 bit 2000/// is always equal to the sign bit (itself), but other cases can give us 2001/// information. For example, immediately after an "SRA X, 2", we know that 2002/// the top 3 bits are all equal to each other, so we return 3. 2003unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2004 EVT VT = Op.getValueType(); 2005 assert(VT.isInteger() && "Invalid VT!"); 2006 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2007 unsigned Tmp, Tmp2; 2008 unsigned FirstAnswer = 1; 2009 2010 if (Depth == 6) 2011 return 1; // Limit search depth. 2012 2013 switch (Op.getOpcode()) { 2014 default: break; 2015 case ISD::AssertSext: 2016 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2017 return VTBits-Tmp+1; 2018 case ISD::AssertZext: 2019 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2020 return VTBits-Tmp; 2021 2022 case ISD::Constant: { 2023 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2024 // If negative, return # leading ones. 2025 if (Val.isNegative()) 2026 return Val.countLeadingOnes(); 2027 2028 // Return # leading zeros. 2029 return Val.countLeadingZeros(); 2030 } 2031 2032 case ISD::SIGN_EXTEND: 2033 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2034 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2035 2036 case ISD::SIGN_EXTEND_INREG: 2037 // Max of the input and what this extends. 2038 Tmp = 2039 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2040 Tmp = VTBits-Tmp+1; 2041 2042 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2043 return std::max(Tmp, Tmp2); 2044 2045 case ISD::SRA: 2046 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2047 // SRA X, C -> adds C sign bits. 2048 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2049 Tmp += C->getZExtValue(); 2050 if (Tmp > VTBits) Tmp = VTBits; 2051 } 2052 return Tmp; 2053 case ISD::SHL: 2054 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2055 // shl destroys sign bits. 2056 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2057 if (C->getZExtValue() >= VTBits || // Bad shift. 2058 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2059 return Tmp - C->getZExtValue(); 2060 } 2061 break; 2062 case ISD::AND: 2063 case ISD::OR: 2064 case ISD::XOR: // NOT is handled here. 2065 // Logical binary ops preserve the number of sign bits at the worst. 2066 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2067 if (Tmp != 1) { 2068 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2069 FirstAnswer = std::min(Tmp, Tmp2); 2070 // We computed what we know about the sign bits as our first 2071 // answer. Now proceed to the generic code that uses 2072 // ComputeMaskedBits, and pick whichever answer is better. 2073 } 2074 break; 2075 2076 case ISD::SELECT: 2077 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2078 if (Tmp == 1) return 1; // Early out. 2079 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2080 return std::min(Tmp, Tmp2); 2081 2082 case ISD::SADDO: 2083 case ISD::UADDO: 2084 case ISD::SSUBO: 2085 case ISD::USUBO: 2086 case ISD::SMULO: 2087 case ISD::UMULO: 2088 if (Op.getResNo() != 1) 2089 break; 2090 // The boolean result conforms to getBooleanContents. Fall through. 2091 case ISD::SETCC: 2092 // If setcc returns 0/-1, all bits are sign bits. 2093 if (TLI.getBooleanContents() == 2094 TargetLowering::ZeroOrNegativeOneBooleanContent) 2095 return VTBits; 2096 break; 2097 case ISD::ROTL: 2098 case ISD::ROTR: 2099 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2100 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2101 2102 // Handle rotate right by N like a rotate left by 32-N. 2103 if (Op.getOpcode() == ISD::ROTR) 2104 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2105 2106 // If we aren't rotating out all of the known-in sign bits, return the 2107 // number that are left. This handles rotl(sext(x), 1) for example. 2108 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2109 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2110 } 2111 break; 2112 case ISD::ADD: 2113 // Add can have at most one carry bit. Thus we know that the output 2114 // is, at worst, one more bit than the inputs. 2115 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2116 if (Tmp == 1) return 1; // Early out. 2117 2118 // Special case decrementing a value (ADD X, -1): 2119 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2120 if (CRHS->isAllOnesValue()) { 2121 APInt KnownZero, KnownOne; 2122 APInt Mask = APInt::getAllOnesValue(VTBits); 2123 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2124 2125 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2126 // sign bits set. 2127 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2128 return VTBits; 2129 2130 // If we are subtracting one from a positive number, there is no carry 2131 // out of the result. 2132 if (KnownZero.isNegative()) 2133 return Tmp; 2134 } 2135 2136 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2137 if (Tmp2 == 1) return 1; 2138 return std::min(Tmp, Tmp2)-1; 2139 break; 2140 2141 case ISD::SUB: 2142 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2143 if (Tmp2 == 1) return 1; 2144 2145 // Handle NEG. 2146 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2147 if (CLHS->isNullValue()) { 2148 APInt KnownZero, KnownOne; 2149 APInt Mask = APInt::getAllOnesValue(VTBits); 2150 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2151 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2152 // sign bits set. 2153 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2154 return VTBits; 2155 2156 // If the input is known to be positive (the sign bit is known clear), 2157 // the output of the NEG has the same number of sign bits as the input. 2158 if (KnownZero.isNegative()) 2159 return Tmp2; 2160 2161 // Otherwise, we treat this like a SUB. 2162 } 2163 2164 // Sub can have at most one carry bit. Thus we know that the output 2165 // is, at worst, one more bit than the inputs. 2166 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2167 if (Tmp == 1) return 1; // Early out. 2168 return std::min(Tmp, Tmp2)-1; 2169 break; 2170 case ISD::TRUNCATE: 2171 // FIXME: it's tricky to do anything useful for this, but it is an important 2172 // case for targets like X86. 2173 break; 2174 } 2175 2176 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2177 if (Op.getOpcode() == ISD::LOAD) { 2178 LoadSDNode *LD = cast<LoadSDNode>(Op); 2179 unsigned ExtType = LD->getExtensionType(); 2180 switch (ExtType) { 2181 default: break; 2182 case ISD::SEXTLOAD: // '17' bits known 2183 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2184 return VTBits-Tmp+1; 2185 case ISD::ZEXTLOAD: // '16' bits known 2186 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2187 return VTBits-Tmp; 2188 } 2189 } 2190 2191 // Allow the target to implement this method for its nodes. 2192 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2193 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2194 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2195 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2196 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2197 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2198 } 2199 2200 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2201 // use this information. 2202 APInt KnownZero, KnownOne; 2203 APInt Mask = APInt::getAllOnesValue(VTBits); 2204 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2205 2206 if (KnownZero.isNegative()) { // sign bit is 0 2207 Mask = KnownZero; 2208 } else if (KnownOne.isNegative()) { // sign bit is 1; 2209 Mask = KnownOne; 2210 } else { 2211 // Nothing known. 2212 return FirstAnswer; 2213 } 2214 2215 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2216 // the number of identical bits in the top of the input value. 2217 Mask = ~Mask; 2218 Mask <<= Mask.getBitWidth()-VTBits; 2219 // Return # leading zeros. We use 'min' here in case Val was zero before 2220 // shifting. We don't want to return '64' as for an i32 "0". 2221 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2222} 2223 2224bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2225 // If we're told that NaNs won't happen, assume they won't. 2226 if (FiniteOnlyFPMath()) 2227 return true; 2228 2229 // If the value is a constant, we can obviously see if it is a NaN or not. 2230 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2231 return !C->getValueAPF().isNaN(); 2232 2233 // TODO: Recognize more cases here. 2234 2235 return false; 2236} 2237 2238bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2239 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2240 if (!GA) return false; 2241 if (GA->getOffset() != 0) return false; 2242 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2243 if (!GV) return false; 2244 MachineModuleInfo *MMI = getMachineModuleInfo(); 2245 return MMI && MMI->hasDebugInfo(); 2246} 2247 2248 2249/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2250/// element of the result of the vector shuffle. 2251SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2252 unsigned i) { 2253 EVT VT = N->getValueType(0); 2254 DebugLoc dl = N->getDebugLoc(); 2255 if (N->getMaskElt(i) < 0) 2256 return getUNDEF(VT.getVectorElementType()); 2257 unsigned Index = N->getMaskElt(i); 2258 unsigned NumElems = VT.getVectorNumElements(); 2259 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2260 Index %= NumElems; 2261 2262 if (V.getOpcode() == ISD::BIT_CONVERT) { 2263 V = V.getOperand(0); 2264 EVT VVT = V.getValueType(); 2265 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2266 return SDValue(); 2267 } 2268 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2269 return (Index == 0) ? V.getOperand(0) 2270 : getUNDEF(VT.getVectorElementType()); 2271 if (V.getOpcode() == ISD::BUILD_VECTOR) 2272 return V.getOperand(Index); 2273 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2274 return getShuffleScalarElt(SVN, Index); 2275 return SDValue(); 2276} 2277 2278 2279/// getNode - Gets or creates the specified node. 2280/// 2281SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2282 FoldingSetNodeID ID; 2283 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2284 void *IP = 0; 2285 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2286 return SDValue(E, 0); 2287 2288 SDNode *N = NodeAllocator.Allocate<SDNode>(); 2289 new (N) SDNode(Opcode, DL, getVTList(VT)); 2290 CSEMap.InsertNode(N, IP); 2291 2292 AllNodes.push_back(N); 2293#ifndef NDEBUG 2294 VerifyNode(N); 2295#endif 2296 return SDValue(N, 0); 2297} 2298 2299SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2300 EVT VT, SDValue Operand) { 2301 // Constant fold unary operations with an integer constant operand. 2302 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2303 const APInt &Val = C->getAPIntValue(); 2304 unsigned BitWidth = VT.getSizeInBits(); 2305 switch (Opcode) { 2306 default: break; 2307 case ISD::SIGN_EXTEND: 2308 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 2309 case ISD::ANY_EXTEND: 2310 case ISD::ZERO_EXTEND: 2311 case ISD::TRUNCATE: 2312 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 2313 case ISD::UINT_TO_FP: 2314 case ISD::SINT_TO_FP: { 2315 const uint64_t zero[] = {0, 0}; 2316 // No compile time operations on this type. 2317 if (VT==MVT::ppcf128) 2318 break; 2319 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 2320 (void)apf.convertFromAPInt(Val, 2321 Opcode==ISD::SINT_TO_FP, 2322 APFloat::rmNearestTiesToEven); 2323 return getConstantFP(apf, VT); 2324 } 2325 case ISD::BIT_CONVERT: 2326 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2327 return getConstantFP(Val.bitsToFloat(), VT); 2328 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2329 return getConstantFP(Val.bitsToDouble(), VT); 2330 break; 2331 case ISD::BSWAP: 2332 return getConstant(Val.byteSwap(), VT); 2333 case ISD::CTPOP: 2334 return getConstant(Val.countPopulation(), VT); 2335 case ISD::CTLZ: 2336 return getConstant(Val.countLeadingZeros(), VT); 2337 case ISD::CTTZ: 2338 return getConstant(Val.countTrailingZeros(), VT); 2339 } 2340 } 2341 2342 // Constant fold unary operations with a floating point constant operand. 2343 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2344 APFloat V = C->getValueAPF(); // make copy 2345 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2346 switch (Opcode) { 2347 case ISD::FNEG: 2348 V.changeSign(); 2349 return getConstantFP(V, VT); 2350 case ISD::FABS: 2351 V.clearSign(); 2352 return getConstantFP(V, VT); 2353 case ISD::FP_ROUND: 2354 case ISD::FP_EXTEND: { 2355 bool ignored; 2356 // This can return overflow, underflow, or inexact; we don't care. 2357 // FIXME need to be more flexible about rounding mode. 2358 (void)V.convert(*EVTToAPFloatSemantics(VT), 2359 APFloat::rmNearestTiesToEven, &ignored); 2360 return getConstantFP(V, VT); 2361 } 2362 case ISD::FP_TO_SINT: 2363 case ISD::FP_TO_UINT: { 2364 integerPart x[2]; 2365 bool ignored; 2366 assert(integerPartWidth >= 64); 2367 // FIXME need to be more flexible about rounding mode. 2368 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2369 Opcode==ISD::FP_TO_SINT, 2370 APFloat::rmTowardZero, &ignored); 2371 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2372 break; 2373 APInt api(VT.getSizeInBits(), 2, x); 2374 return getConstant(api, VT); 2375 } 2376 case ISD::BIT_CONVERT: 2377 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2378 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2379 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2380 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2381 break; 2382 } 2383 } 2384 } 2385 2386 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2387 switch (Opcode) { 2388 case ISD::TokenFactor: 2389 case ISD::MERGE_VALUES: 2390 case ISD::CONCAT_VECTORS: 2391 return Operand; // Factor, merge or concat of one node? No need. 2392 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2393 case ISD::FP_EXTEND: 2394 assert(VT.isFloatingPoint() && 2395 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2396 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2397 assert((!VT.isVector() || 2398 VT.getVectorNumElements() == 2399 Operand.getValueType().getVectorNumElements()) && 2400 "Vector element count mismatch!"); 2401 if (Operand.getOpcode() == ISD::UNDEF) 2402 return getUNDEF(VT); 2403 break; 2404 case ISD::SIGN_EXTEND: 2405 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2406 "Invalid SIGN_EXTEND!"); 2407 if (Operand.getValueType() == VT) return Operand; // noop extension 2408 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2409 "Invalid sext node, dst < src!"); 2410 assert((!VT.isVector() || 2411 VT.getVectorNumElements() == 2412 Operand.getValueType().getVectorNumElements()) && 2413 "Vector element count mismatch!"); 2414 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2415 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2416 break; 2417 case ISD::ZERO_EXTEND: 2418 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2419 "Invalid ZERO_EXTEND!"); 2420 if (Operand.getValueType() == VT) return Operand; // noop extension 2421 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2422 "Invalid zext node, dst < src!"); 2423 assert((!VT.isVector() || 2424 VT.getVectorNumElements() == 2425 Operand.getValueType().getVectorNumElements()) && 2426 "Vector element count mismatch!"); 2427 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2428 return getNode(ISD::ZERO_EXTEND, DL, VT, 2429 Operand.getNode()->getOperand(0)); 2430 break; 2431 case ISD::ANY_EXTEND: 2432 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2433 "Invalid ANY_EXTEND!"); 2434 if (Operand.getValueType() == VT) return Operand; // noop extension 2435 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2436 "Invalid anyext node, dst < src!"); 2437 assert((!VT.isVector() || 2438 VT.getVectorNumElements() == 2439 Operand.getValueType().getVectorNumElements()) && 2440 "Vector element count mismatch!"); 2441 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2442 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2443 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2444 break; 2445 case ISD::TRUNCATE: 2446 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2447 "Invalid TRUNCATE!"); 2448 if (Operand.getValueType() == VT) return Operand; // noop truncate 2449 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2450 "Invalid truncate node, src < dst!"); 2451 assert((!VT.isVector() || 2452 VT.getVectorNumElements() == 2453 Operand.getValueType().getVectorNumElements()) && 2454 "Vector element count mismatch!"); 2455 if (OpOpcode == ISD::TRUNCATE) 2456 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2457 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2458 OpOpcode == ISD::ANY_EXTEND) { 2459 // If the source is smaller than the dest, we still need an extend. 2460 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2461 .bitsLT(VT.getScalarType())) 2462 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2463 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2464 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2465 else 2466 return Operand.getNode()->getOperand(0); 2467 } 2468 break; 2469 case ISD::BIT_CONVERT: 2470 // Basic sanity checking. 2471 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2472 && "Cannot BIT_CONVERT between types of different sizes!"); 2473 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2474 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2475 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2476 if (OpOpcode == ISD::UNDEF) 2477 return getUNDEF(VT); 2478 break; 2479 case ISD::SCALAR_TO_VECTOR: 2480 assert(VT.isVector() && !Operand.getValueType().isVector() && 2481 (VT.getVectorElementType() == Operand.getValueType() || 2482 (VT.getVectorElementType().isInteger() && 2483 Operand.getValueType().isInteger() && 2484 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2485 "Illegal SCALAR_TO_VECTOR node!"); 2486 if (OpOpcode == ISD::UNDEF) 2487 return getUNDEF(VT); 2488 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2489 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2490 isa<ConstantSDNode>(Operand.getOperand(1)) && 2491 Operand.getConstantOperandVal(1) == 0 && 2492 Operand.getOperand(0).getValueType() == VT) 2493 return Operand.getOperand(0); 2494 break; 2495 case ISD::FNEG: 2496 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2497 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2498 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2499 Operand.getNode()->getOperand(0)); 2500 if (OpOpcode == ISD::FNEG) // --X -> X 2501 return Operand.getNode()->getOperand(0); 2502 break; 2503 case ISD::FABS: 2504 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2505 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2506 break; 2507 } 2508 2509 SDNode *N; 2510 SDVTList VTs = getVTList(VT); 2511 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2512 FoldingSetNodeID ID; 2513 SDValue Ops[1] = { Operand }; 2514 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2515 void *IP = 0; 2516 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2517 return SDValue(E, 0); 2518 2519 N = NodeAllocator.Allocate<UnarySDNode>(); 2520 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2521 CSEMap.InsertNode(N, IP); 2522 } else { 2523 N = NodeAllocator.Allocate<UnarySDNode>(); 2524 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2525 } 2526 2527 AllNodes.push_back(N); 2528#ifndef NDEBUG 2529 VerifyNode(N); 2530#endif 2531 return SDValue(N, 0); 2532} 2533 2534SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2535 EVT VT, 2536 ConstantSDNode *Cst1, 2537 ConstantSDNode *Cst2) { 2538 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2539 2540 switch (Opcode) { 2541 case ISD::ADD: return getConstant(C1 + C2, VT); 2542 case ISD::SUB: return getConstant(C1 - C2, VT); 2543 case ISD::MUL: return getConstant(C1 * C2, VT); 2544 case ISD::UDIV: 2545 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2546 break; 2547 case ISD::UREM: 2548 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2549 break; 2550 case ISD::SDIV: 2551 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2552 break; 2553 case ISD::SREM: 2554 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2555 break; 2556 case ISD::AND: return getConstant(C1 & C2, VT); 2557 case ISD::OR: return getConstant(C1 | C2, VT); 2558 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2559 case ISD::SHL: return getConstant(C1 << C2, VT); 2560 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2561 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2562 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2563 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2564 default: break; 2565 } 2566 2567 return SDValue(); 2568} 2569 2570SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2571 SDValue N1, SDValue N2) { 2572 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2573 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2574 switch (Opcode) { 2575 default: break; 2576 case ISD::TokenFactor: 2577 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2578 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2579 // Fold trivial token factors. 2580 if (N1.getOpcode() == ISD::EntryToken) return N2; 2581 if (N2.getOpcode() == ISD::EntryToken) return N1; 2582 if (N1 == N2) return N1; 2583 break; 2584 case ISD::CONCAT_VECTORS: 2585 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2586 // one big BUILD_VECTOR. 2587 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2588 N2.getOpcode() == ISD::BUILD_VECTOR) { 2589 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2590 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2591 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2592 } 2593 break; 2594 case ISD::AND: 2595 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2596 N1.getValueType() == VT && "Binary operator types must match!"); 2597 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2598 // worth handling here. 2599 if (N2C && N2C->isNullValue()) 2600 return N2; 2601 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2602 return N1; 2603 break; 2604 case ISD::OR: 2605 case ISD::XOR: 2606 case ISD::ADD: 2607 case ISD::SUB: 2608 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2609 N1.getValueType() == VT && "Binary operator types must match!"); 2610 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2611 // it's worth handling here. 2612 if (N2C && N2C->isNullValue()) 2613 return N1; 2614 break; 2615 case ISD::UDIV: 2616 case ISD::UREM: 2617 case ISD::MULHU: 2618 case ISD::MULHS: 2619 case ISD::MUL: 2620 case ISD::SDIV: 2621 case ISD::SREM: 2622 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2623 // fall through 2624 case ISD::FADD: 2625 case ISD::FSUB: 2626 case ISD::FMUL: 2627 case ISD::FDIV: 2628 case ISD::FREM: 2629 if (UnsafeFPMath) { 2630 if (Opcode == ISD::FADD) { 2631 // 0+x --> x 2632 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2633 if (CFP->getValueAPF().isZero()) 2634 return N2; 2635 // x+0 --> x 2636 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2637 if (CFP->getValueAPF().isZero()) 2638 return N1; 2639 } else if (Opcode == ISD::FSUB) { 2640 // x-0 --> x 2641 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2642 if (CFP->getValueAPF().isZero()) 2643 return N1; 2644 } 2645 } 2646 assert(N1.getValueType() == N2.getValueType() && 2647 N1.getValueType() == VT && "Binary operator types must match!"); 2648 break; 2649 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2650 assert(N1.getValueType() == VT && 2651 N1.getValueType().isFloatingPoint() && 2652 N2.getValueType().isFloatingPoint() && 2653 "Invalid FCOPYSIGN!"); 2654 break; 2655 case ISD::SHL: 2656 case ISD::SRA: 2657 case ISD::SRL: 2658 case ISD::ROTL: 2659 case ISD::ROTR: 2660 assert(VT == N1.getValueType() && 2661 "Shift operators return type must be the same as their first arg"); 2662 assert(VT.isInteger() && N2.getValueType().isInteger() && 2663 "Shifts only work on integers"); 2664 2665 // Always fold shifts of i1 values so the code generator doesn't need to 2666 // handle them. Since we know the size of the shift has to be less than the 2667 // size of the value, the shift/rotate count is guaranteed to be zero. 2668 if (VT == MVT::i1) 2669 return N1; 2670 if (N2C && N2C->isNullValue()) 2671 return N1; 2672 break; 2673 case ISD::FP_ROUND_INREG: { 2674 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2675 assert(VT == N1.getValueType() && "Not an inreg round!"); 2676 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2677 "Cannot FP_ROUND_INREG integer types"); 2678 assert(EVT.isVector() == VT.isVector() && 2679 "FP_ROUND_INREG type should be vector iff the operand " 2680 "type is vector!"); 2681 assert((!EVT.isVector() || 2682 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2683 "Vector element counts must match in FP_ROUND_INREG"); 2684 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2685 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2686 break; 2687 } 2688 case ISD::FP_ROUND: 2689 assert(VT.isFloatingPoint() && 2690 N1.getValueType().isFloatingPoint() && 2691 VT.bitsLE(N1.getValueType()) && 2692 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2693 if (N1.getValueType() == VT) return N1; // noop conversion. 2694 break; 2695 case ISD::AssertSext: 2696 case ISD::AssertZext: { 2697 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2698 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2699 assert(VT.isInteger() && EVT.isInteger() && 2700 "Cannot *_EXTEND_INREG FP types"); 2701 assert(!EVT.isVector() && 2702 "AssertSExt/AssertZExt type should be the vector element type " 2703 "rather than the vector type!"); 2704 assert(EVT.bitsLE(VT) && "Not extending!"); 2705 if (VT == EVT) return N1; // noop assertion. 2706 break; 2707 } 2708 case ISD::SIGN_EXTEND_INREG: { 2709 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2710 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2711 assert(VT.isInteger() && EVT.isInteger() && 2712 "Cannot *_EXTEND_INREG FP types"); 2713 assert(EVT.isVector() == VT.isVector() && 2714 "SIGN_EXTEND_INREG type should be vector iff the operand " 2715 "type is vector!"); 2716 assert((!EVT.isVector() || 2717 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2718 "Vector element counts must match in SIGN_EXTEND_INREG"); 2719 assert(EVT.bitsLE(VT) && "Not extending!"); 2720 if (EVT == VT) return N1; // Not actually extending 2721 2722 if (N1C) { 2723 APInt Val = N1C->getAPIntValue(); 2724 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2725 Val <<= Val.getBitWidth()-FromBits; 2726 Val = Val.ashr(Val.getBitWidth()-FromBits); 2727 return getConstant(Val, VT); 2728 } 2729 break; 2730 } 2731 case ISD::EXTRACT_VECTOR_ELT: 2732 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2733 if (N1.getOpcode() == ISD::UNDEF) 2734 return getUNDEF(VT); 2735 2736 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2737 // expanding copies of large vectors from registers. 2738 if (N2C && 2739 N1.getOpcode() == ISD::CONCAT_VECTORS && 2740 N1.getNumOperands() > 0) { 2741 unsigned Factor = 2742 N1.getOperand(0).getValueType().getVectorNumElements(); 2743 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2744 N1.getOperand(N2C->getZExtValue() / Factor), 2745 getConstant(N2C->getZExtValue() % Factor, 2746 N2.getValueType())); 2747 } 2748 2749 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2750 // expanding large vector constants. 2751 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2752 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2753 EVT VEltTy = N1.getValueType().getVectorElementType(); 2754 if (Elt.getValueType() != VEltTy) { 2755 // If the vector element type is not legal, the BUILD_VECTOR operands 2756 // are promoted and implicitly truncated. Make that explicit here. 2757 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2758 } 2759 if (VT != VEltTy) { 2760 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2761 // result is implicitly extended. 2762 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2763 } 2764 return Elt; 2765 } 2766 2767 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2768 // operations are lowered to scalars. 2769 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2770 // If the indices are the same, return the inserted element else 2771 // if the indices are known different, extract the element from 2772 // the original vector. 2773 if (N1.getOperand(2) == N2) { 2774 if (VT == N1.getOperand(1).getValueType()) 2775 return N1.getOperand(1); 2776 else 2777 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2778 } else if (isa<ConstantSDNode>(N1.getOperand(2)) && 2779 isa<ConstantSDNode>(N2)) 2780 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2781 } 2782 break; 2783 case ISD::EXTRACT_ELEMENT: 2784 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2785 assert(!N1.getValueType().isVector() && !VT.isVector() && 2786 (N1.getValueType().isInteger() == VT.isInteger()) && 2787 "Wrong types for EXTRACT_ELEMENT!"); 2788 2789 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2790 // 64-bit integers into 32-bit parts. Instead of building the extract of 2791 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2792 if (N1.getOpcode() == ISD::BUILD_PAIR) 2793 return N1.getOperand(N2C->getZExtValue()); 2794 2795 // EXTRACT_ELEMENT of a constant int is also very common. 2796 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2797 unsigned ElementSize = VT.getSizeInBits(); 2798 unsigned Shift = ElementSize * N2C->getZExtValue(); 2799 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2800 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2801 } 2802 break; 2803 case ISD::EXTRACT_SUBVECTOR: 2804 if (N1.getValueType() == VT) // Trivial extraction. 2805 return N1; 2806 break; 2807 } 2808 2809 if (N1C) { 2810 if (N2C) { 2811 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2812 if (SV.getNode()) return SV; 2813 } else { // Cannonicalize constant to RHS if commutative 2814 if (isCommutativeBinOp(Opcode)) { 2815 std::swap(N1C, N2C); 2816 std::swap(N1, N2); 2817 } 2818 } 2819 } 2820 2821 // Constant fold FP operations. 2822 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2823 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2824 if (N1CFP) { 2825 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2826 // Cannonicalize constant to RHS if commutative 2827 std::swap(N1CFP, N2CFP); 2828 std::swap(N1, N2); 2829 } else if (N2CFP && VT != MVT::ppcf128) { 2830 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2831 APFloat::opStatus s; 2832 switch (Opcode) { 2833 case ISD::FADD: 2834 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2835 if (s != APFloat::opInvalidOp) 2836 return getConstantFP(V1, VT); 2837 break; 2838 case ISD::FSUB: 2839 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2840 if (s!=APFloat::opInvalidOp) 2841 return getConstantFP(V1, VT); 2842 break; 2843 case ISD::FMUL: 2844 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2845 if (s!=APFloat::opInvalidOp) 2846 return getConstantFP(V1, VT); 2847 break; 2848 case ISD::FDIV: 2849 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2850 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2851 return getConstantFP(V1, VT); 2852 break; 2853 case ISD::FREM : 2854 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2855 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2856 return getConstantFP(V1, VT); 2857 break; 2858 case ISD::FCOPYSIGN: 2859 V1.copySign(V2); 2860 return getConstantFP(V1, VT); 2861 default: break; 2862 } 2863 } 2864 } 2865 2866 // Canonicalize an UNDEF to the RHS, even over a constant. 2867 if (N1.getOpcode() == ISD::UNDEF) { 2868 if (isCommutativeBinOp(Opcode)) { 2869 std::swap(N1, N2); 2870 } else { 2871 switch (Opcode) { 2872 case ISD::FP_ROUND_INREG: 2873 case ISD::SIGN_EXTEND_INREG: 2874 case ISD::SUB: 2875 case ISD::FSUB: 2876 case ISD::FDIV: 2877 case ISD::FREM: 2878 case ISD::SRA: 2879 return N1; // fold op(undef, arg2) -> undef 2880 case ISD::UDIV: 2881 case ISD::SDIV: 2882 case ISD::UREM: 2883 case ISD::SREM: 2884 case ISD::SRL: 2885 case ISD::SHL: 2886 if (!VT.isVector()) 2887 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2888 // For vectors, we can't easily build an all zero vector, just return 2889 // the LHS. 2890 return N2; 2891 } 2892 } 2893 } 2894 2895 // Fold a bunch of operators when the RHS is undef. 2896 if (N2.getOpcode() == ISD::UNDEF) { 2897 switch (Opcode) { 2898 case ISD::XOR: 2899 if (N1.getOpcode() == ISD::UNDEF) 2900 // Handle undef ^ undef -> 0 special case. This is a common 2901 // idiom (misuse). 2902 return getConstant(0, VT); 2903 // fallthrough 2904 case ISD::ADD: 2905 case ISD::ADDC: 2906 case ISD::ADDE: 2907 case ISD::SUB: 2908 case ISD::UDIV: 2909 case ISD::SDIV: 2910 case ISD::UREM: 2911 case ISD::SREM: 2912 return N2; // fold op(arg1, undef) -> undef 2913 case ISD::FADD: 2914 case ISD::FSUB: 2915 case ISD::FMUL: 2916 case ISD::FDIV: 2917 case ISD::FREM: 2918 if (UnsafeFPMath) 2919 return N2; 2920 break; 2921 case ISD::MUL: 2922 case ISD::AND: 2923 case ISD::SRL: 2924 case ISD::SHL: 2925 if (!VT.isVector()) 2926 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2927 // For vectors, we can't easily build an all zero vector, just return 2928 // the LHS. 2929 return N1; 2930 case ISD::OR: 2931 if (!VT.isVector()) 2932 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2933 // For vectors, we can't easily build an all one vector, just return 2934 // the LHS. 2935 return N1; 2936 case ISD::SRA: 2937 return N1; 2938 } 2939 } 2940 2941 // Memoize this node if possible. 2942 SDNode *N; 2943 SDVTList VTs = getVTList(VT); 2944 if (VT != MVT::Flag) { 2945 SDValue Ops[] = { N1, N2 }; 2946 FoldingSetNodeID ID; 2947 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2948 void *IP = 0; 2949 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2950 return SDValue(E, 0); 2951 2952 N = NodeAllocator.Allocate<BinarySDNode>(); 2953 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2954 CSEMap.InsertNode(N, IP); 2955 } else { 2956 N = NodeAllocator.Allocate<BinarySDNode>(); 2957 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2958 } 2959 2960 AllNodes.push_back(N); 2961#ifndef NDEBUG 2962 VerifyNode(N); 2963#endif 2964 return SDValue(N, 0); 2965} 2966 2967SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2968 SDValue N1, SDValue N2, SDValue N3) { 2969 // Perform various simplifications. 2970 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2971 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2972 switch (Opcode) { 2973 case ISD::CONCAT_VECTORS: 2974 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2975 // one big BUILD_VECTOR. 2976 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2977 N2.getOpcode() == ISD::BUILD_VECTOR && 2978 N3.getOpcode() == ISD::BUILD_VECTOR) { 2979 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2980 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2981 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2982 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2983 } 2984 break; 2985 case ISD::SETCC: { 2986 // Use FoldSetCC to simplify SETCC's. 2987 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 2988 if (Simp.getNode()) return Simp; 2989 break; 2990 } 2991 case ISD::SELECT: 2992 if (N1C) { 2993 if (N1C->getZExtValue()) 2994 return N2; // select true, X, Y -> X 2995 else 2996 return N3; // select false, X, Y -> Y 2997 } 2998 2999 if (N2 == N3) return N2; // select C, X, X -> X 3000 break; 3001 case ISD::BRCOND: 3002 if (N2C) { 3003 if (N2C->getZExtValue()) // Unconditional branch 3004 return getNode(ISD::BR, DL, MVT::Other, N1, N3); 3005 else 3006 return N1; // Never-taken branch 3007 } 3008 break; 3009 case ISD::VECTOR_SHUFFLE: 3010 llvm_unreachable("should use getVectorShuffle constructor!"); 3011 break; 3012 case ISD::BIT_CONVERT: 3013 // Fold bit_convert nodes from a type to themselves. 3014 if (N1.getValueType() == VT) 3015 return N1; 3016 break; 3017 } 3018 3019 // Memoize node if it doesn't produce a flag. 3020 SDNode *N; 3021 SDVTList VTs = getVTList(VT); 3022 if (VT != MVT::Flag) { 3023 SDValue Ops[] = { N1, N2, N3 }; 3024 FoldingSetNodeID ID; 3025 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3026 void *IP = 0; 3027 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3028 return SDValue(E, 0); 3029 3030 N = NodeAllocator.Allocate<TernarySDNode>(); 3031 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3032 CSEMap.InsertNode(N, IP); 3033 } else { 3034 N = NodeAllocator.Allocate<TernarySDNode>(); 3035 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3036 } 3037 3038 AllNodes.push_back(N); 3039#ifndef NDEBUG 3040 VerifyNode(N); 3041#endif 3042 return SDValue(N, 0); 3043} 3044 3045SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3046 SDValue N1, SDValue N2, SDValue N3, 3047 SDValue N4) { 3048 SDValue Ops[] = { N1, N2, N3, N4 }; 3049 return getNode(Opcode, DL, VT, Ops, 4); 3050} 3051 3052SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3053 SDValue N1, SDValue N2, SDValue N3, 3054 SDValue N4, SDValue N5) { 3055 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3056 return getNode(Opcode, DL, VT, Ops, 5); 3057} 3058 3059/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3060/// the incoming stack arguments to be loaded from the stack. 3061SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3062 SmallVector<SDValue, 8> ArgChains; 3063 3064 // Include the original chain at the beginning of the list. When this is 3065 // used by target LowerCall hooks, this helps legalize find the 3066 // CALLSEQ_BEGIN node. 3067 ArgChains.push_back(Chain); 3068 3069 // Add a chain value for each stack argument. 3070 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3071 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3072 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3073 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3074 if (FI->getIndex() < 0) 3075 ArgChains.push_back(SDValue(L, 1)); 3076 3077 // Build a tokenfactor for all the chains. 3078 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3079 &ArgChains[0], ArgChains.size()); 3080} 3081 3082/// getMemsetValue - Vectorized representation of the memset value 3083/// operand. 3084static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3085 DebugLoc dl) { 3086 unsigned NumBits = VT.isVector() ? 3087 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 3088 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3089 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3090 unsigned Shift = 8; 3091 for (unsigned i = NumBits; i > 8; i >>= 1) { 3092 Val = (Val << Shift) | Val; 3093 Shift <<= 1; 3094 } 3095 if (VT.isInteger()) 3096 return DAG.getConstant(Val, VT); 3097 return DAG.getConstantFP(APFloat(Val), VT); 3098 } 3099 3100 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3101 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3102 unsigned Shift = 8; 3103 for (unsigned i = NumBits; i > 8; i >>= 1) { 3104 Value = DAG.getNode(ISD::OR, dl, VT, 3105 DAG.getNode(ISD::SHL, dl, VT, Value, 3106 DAG.getConstant(Shift, 3107 TLI.getShiftAmountTy())), 3108 Value); 3109 Shift <<= 1; 3110 } 3111 3112 return Value; 3113} 3114 3115/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3116/// used when a memcpy is turned into a memset when the source is a constant 3117/// string ptr. 3118static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3119 const TargetLowering &TLI, 3120 std::string &Str, unsigned Offset) { 3121 // Handle vector with all elements zero. 3122 if (Str.empty()) { 3123 if (VT.isInteger()) 3124 return DAG.getConstant(0, VT); 3125 unsigned NumElts = VT.getVectorNumElements(); 3126 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3127 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3128 DAG.getConstant(0, 3129 EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts))); 3130 } 3131 3132 assert(!VT.isVector() && "Can't handle vector type here!"); 3133 unsigned NumBits = VT.getSizeInBits(); 3134 unsigned MSB = NumBits / 8; 3135 uint64_t Val = 0; 3136 if (TLI.isLittleEndian()) 3137 Offset = Offset + MSB - 1; 3138 for (unsigned i = 0; i != MSB; ++i) { 3139 Val = (Val << 8) | (unsigned char)Str[Offset]; 3140 Offset += TLI.isLittleEndian() ? -1 : 1; 3141 } 3142 return DAG.getConstant(Val, VT); 3143} 3144 3145/// getMemBasePlusOffset - Returns base and offset node for the 3146/// 3147static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3148 SelectionDAG &DAG) { 3149 EVT VT = Base.getValueType(); 3150 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3151 VT, Base, DAG.getConstant(Offset, VT)); 3152} 3153 3154/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3155/// 3156static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3157 unsigned SrcDelta = 0; 3158 GlobalAddressSDNode *G = NULL; 3159 if (Src.getOpcode() == ISD::GlobalAddress) 3160 G = cast<GlobalAddressSDNode>(Src); 3161 else if (Src.getOpcode() == ISD::ADD && 3162 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3163 Src.getOperand(1).getOpcode() == ISD::Constant) { 3164 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3165 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3166 } 3167 if (!G) 3168 return false; 3169 3170 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3171 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3172 return true; 3173 3174 return false; 3175} 3176 3177/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 3178/// to replace the memset / memcpy is below the threshold. It also returns the 3179/// types of the sequence of memory ops to perform memset / memcpy. 3180static 3181bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps, 3182 SDValue Dst, SDValue Src, 3183 unsigned Limit, uint64_t Size, unsigned &Align, 3184 std::string &Str, bool &isSrcStr, 3185 SelectionDAG &DAG, 3186 const TargetLowering &TLI) { 3187 isSrcStr = isMemSrcFromString(Src, Str); 3188 bool isSrcConst = isa<ConstantSDNode>(Src); 3189 EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG); 3190 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(VT); 3191 if (VT != MVT::iAny) { 3192 const Type *Ty = VT.getTypeForEVT(*DAG.getContext()); 3193 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3194 // If source is a string constant, this will require an unaligned load. 3195 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 3196 if (Dst.getOpcode() != ISD::FrameIndex) { 3197 // Can't change destination alignment. It requires a unaligned store. 3198 if (AllowUnalign) 3199 VT = MVT::iAny; 3200 } else { 3201 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 3202 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3203 if (MFI->isFixedObjectIndex(FI)) { 3204 // Can't change destination alignment. It requires a unaligned store. 3205 if (AllowUnalign) 3206 VT = MVT::iAny; 3207 } else { 3208 // Give the stack frame object a larger alignment if needed. 3209 if (MFI->getObjectAlignment(FI) < NewAlign) 3210 MFI->setObjectAlignment(FI, NewAlign); 3211 Align = NewAlign; 3212 } 3213 } 3214 } 3215 } 3216 3217 if (VT == MVT::iAny) { 3218 if (TLI.allowsUnalignedMemoryAccesses(MVT::i64)) { 3219 VT = MVT::i64; 3220 } else { 3221 switch (Align & 7) { 3222 case 0: VT = MVT::i64; break; 3223 case 4: VT = MVT::i32; break; 3224 case 2: VT = MVT::i16; break; 3225 default: VT = MVT::i8; break; 3226 } 3227 } 3228 3229 MVT LVT = MVT::i64; 3230 while (!TLI.isTypeLegal(LVT)) 3231 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3232 assert(LVT.isInteger()); 3233 3234 if (VT.bitsGT(LVT)) 3235 VT = LVT; 3236 } 3237 3238 unsigned NumMemOps = 0; 3239 while (Size != 0) { 3240 unsigned VTSize = VT.getSizeInBits() / 8; 3241 while (VTSize > Size) { 3242 // For now, only use non-vector load / store's for the left-over pieces. 3243 if (VT.isVector()) { 3244 VT = MVT::i64; 3245 while (!TLI.isTypeLegal(VT)) 3246 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3247 VTSize = VT.getSizeInBits() / 8; 3248 } else { 3249 // This can result in a type that is not legal on the target, e.g. 3250 // 1 or 2 bytes on PPC. 3251 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3252 VTSize >>= 1; 3253 } 3254 } 3255 3256 if (++NumMemOps > Limit) 3257 return false; 3258 MemOps.push_back(VT); 3259 Size -= VTSize; 3260 } 3261 3262 return true; 3263} 3264 3265static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3266 SDValue Chain, SDValue Dst, 3267 SDValue Src, uint64_t Size, 3268 unsigned Align, bool AlwaysInline, 3269 const Value *DstSV, uint64_t DstSVOff, 3270 const Value *SrcSV, uint64_t SrcSVOff){ 3271 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3272 3273 // Expand memcpy to a series of load and store ops if the size operand falls 3274 // below a certain threshold. 3275 std::vector<EVT> MemOps; 3276 uint64_t Limit = -1ULL; 3277 if (!AlwaysInline) 3278 Limit = TLI.getMaxStoresPerMemcpy(); 3279 unsigned DstAlign = Align; // Destination alignment can change. 3280 std::string Str; 3281 bool CopyFromStr; 3282 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3283 Str, CopyFromStr, DAG, TLI)) 3284 return SDValue(); 3285 3286 3287 bool isZeroStr = CopyFromStr && Str.empty(); 3288 SmallVector<SDValue, 8> OutChains; 3289 unsigned NumMemOps = MemOps.size(); 3290 uint64_t SrcOff = 0, DstOff = 0; 3291 for (unsigned i = 0; i != NumMemOps; ++i) { 3292 EVT VT = MemOps[i]; 3293 unsigned VTSize = VT.getSizeInBits() / 8; 3294 SDValue Value, Store; 3295 3296 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 3297 // It's unlikely a store of a vector immediate can be done in a single 3298 // instruction. It would require a load from a constantpool first. 3299 // We also handle store a vector with all zero's. 3300 // FIXME: Handle other cases where store of vector immediate is done in 3301 // a single instruction. 3302 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3303 Store = DAG.getStore(Chain, dl, Value, 3304 getMemBasePlusOffset(Dst, DstOff, DAG), 3305 DstSV, DstSVOff + DstOff, false, false, DstAlign); 3306 } else { 3307 // The type might not be legal for the target. This should only happen 3308 // if the type is smaller than a legal type, as on PPC, so the right 3309 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3310 // to Load/Store if NVT==VT. 3311 // FIXME does the case above also need this? 3312 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3313 assert(NVT.bitsGE(VT)); 3314 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3315 getMemBasePlusOffset(Src, SrcOff, DAG), 3316 SrcSV, SrcSVOff + SrcOff, VT, false, false, Align); 3317 Store = DAG.getTruncStore(Chain, dl, Value, 3318 getMemBasePlusOffset(Dst, DstOff, DAG), 3319 DstSV, DstSVOff + DstOff, VT, false, false, 3320 DstAlign); 3321 } 3322 OutChains.push_back(Store); 3323 SrcOff += VTSize; 3324 DstOff += VTSize; 3325 } 3326 3327 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3328 &OutChains[0], OutChains.size()); 3329} 3330 3331static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3332 SDValue Chain, SDValue Dst, 3333 SDValue Src, uint64_t Size, 3334 unsigned Align, bool AlwaysInline, 3335 const Value *DstSV, uint64_t DstSVOff, 3336 const Value *SrcSV, uint64_t SrcSVOff){ 3337 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3338 3339 // Expand memmove to a series of load and store ops if the size operand falls 3340 // below a certain threshold. 3341 std::vector<EVT> MemOps; 3342 uint64_t Limit = -1ULL; 3343 if (!AlwaysInline) 3344 Limit = TLI.getMaxStoresPerMemmove(); 3345 unsigned DstAlign = Align; // Destination alignment can change. 3346 std::string Str; 3347 bool CopyFromStr; 3348 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3349 Str, CopyFromStr, DAG, TLI)) 3350 return SDValue(); 3351 3352 uint64_t SrcOff = 0, DstOff = 0; 3353 3354 SmallVector<SDValue, 8> LoadValues; 3355 SmallVector<SDValue, 8> LoadChains; 3356 SmallVector<SDValue, 8> OutChains; 3357 unsigned NumMemOps = MemOps.size(); 3358 for (unsigned i = 0; i < NumMemOps; i++) { 3359 EVT VT = MemOps[i]; 3360 unsigned VTSize = VT.getSizeInBits() / 8; 3361 SDValue Value, Store; 3362 3363 Value = DAG.getLoad(VT, dl, Chain, 3364 getMemBasePlusOffset(Src, SrcOff, DAG), 3365 SrcSV, SrcSVOff + SrcOff, false, false, Align); 3366 LoadValues.push_back(Value); 3367 LoadChains.push_back(Value.getValue(1)); 3368 SrcOff += VTSize; 3369 } 3370 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3371 &LoadChains[0], LoadChains.size()); 3372 OutChains.clear(); 3373 for (unsigned i = 0; i < NumMemOps; i++) { 3374 EVT VT = MemOps[i]; 3375 unsigned VTSize = VT.getSizeInBits() / 8; 3376 SDValue Value, Store; 3377 3378 Store = DAG.getStore(Chain, dl, LoadValues[i], 3379 getMemBasePlusOffset(Dst, DstOff, DAG), 3380 DstSV, DstSVOff + DstOff, false, false, DstAlign); 3381 OutChains.push_back(Store); 3382 DstOff += VTSize; 3383 } 3384 3385 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3386 &OutChains[0], OutChains.size()); 3387} 3388 3389static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3390 SDValue Chain, SDValue Dst, 3391 SDValue Src, uint64_t Size, 3392 unsigned Align, 3393 const Value *DstSV, uint64_t DstSVOff) { 3394 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3395 3396 // Expand memset to a series of load/store ops if the size operand 3397 // falls below a certain threshold. 3398 std::vector<EVT> MemOps; 3399 std::string Str; 3400 bool CopyFromStr; 3401 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 3402 Size, Align, Str, CopyFromStr, DAG, TLI)) 3403 return SDValue(); 3404 3405 SmallVector<SDValue, 8> OutChains; 3406 uint64_t DstOff = 0; 3407 3408 unsigned NumMemOps = MemOps.size(); 3409 for (unsigned i = 0; i < NumMemOps; i++) { 3410 EVT VT = MemOps[i]; 3411 unsigned VTSize = VT.getSizeInBits() / 8; 3412 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3413 SDValue Store = DAG.getStore(Chain, dl, Value, 3414 getMemBasePlusOffset(Dst, DstOff, DAG), 3415 DstSV, DstSVOff + DstOff, false, false, 0); 3416 OutChains.push_back(Store); 3417 DstOff += VTSize; 3418 } 3419 3420 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3421 &OutChains[0], OutChains.size()); 3422} 3423 3424SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3425 SDValue Src, SDValue Size, 3426 unsigned Align, bool AlwaysInline, 3427 const Value *DstSV, uint64_t DstSVOff, 3428 const Value *SrcSV, uint64_t SrcSVOff) { 3429 3430 // Check to see if we should lower the memcpy to loads and stores first. 3431 // For cases within the target-specified limits, this is the best choice. 3432 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3433 if (ConstantSize) { 3434 // Memcpy with size zero? Just return the original chain. 3435 if (ConstantSize->isNullValue()) 3436 return Chain; 3437 3438 SDValue Result = 3439 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3440 ConstantSize->getZExtValue(), 3441 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3442 if (Result.getNode()) 3443 return Result; 3444 } 3445 3446 // Then check to see if we should lower the memcpy with target-specific 3447 // code. If the target chooses to do this, this is the next best. 3448 SDValue Result = 3449 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3450 AlwaysInline, 3451 DstSV, DstSVOff, SrcSV, SrcSVOff); 3452 if (Result.getNode()) 3453 return Result; 3454 3455 // If we really need inline code and the target declined to provide it, 3456 // use a (potentially long) sequence of loads and stores. 3457 if (AlwaysInline) { 3458 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3459 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3460 ConstantSize->getZExtValue(), Align, true, 3461 DstSV, DstSVOff, SrcSV, SrcSVOff); 3462 } 3463 3464 // Emit a library call. 3465 TargetLowering::ArgListTy Args; 3466 TargetLowering::ArgListEntry Entry; 3467 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3468 Entry.Node = Dst; Args.push_back(Entry); 3469 Entry.Node = Src; Args.push_back(Entry); 3470 Entry.Node = Size; Args.push_back(Entry); 3471 // FIXME: pass in DebugLoc 3472 std::pair<SDValue,SDValue> CallResult = 3473 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3474 false, false, false, false, 0, 3475 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3476 /*isReturnValueUsed=*/false, 3477 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3478 TLI.getPointerTy()), 3479 Args, *this, dl, GetOrdering(Chain.getNode())); 3480 return CallResult.second; 3481} 3482 3483SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3484 SDValue Src, SDValue Size, 3485 unsigned Align, 3486 const Value *DstSV, uint64_t DstSVOff, 3487 const Value *SrcSV, uint64_t SrcSVOff) { 3488 3489 // Check to see if we should lower the memmove to loads and stores first. 3490 // For cases within the target-specified limits, this is the best choice. 3491 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3492 if (ConstantSize) { 3493 // Memmove with size zero? Just return the original chain. 3494 if (ConstantSize->isNullValue()) 3495 return Chain; 3496 3497 SDValue Result = 3498 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3499 ConstantSize->getZExtValue(), 3500 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3501 if (Result.getNode()) 3502 return Result; 3503 } 3504 3505 // Then check to see if we should lower the memmove with target-specific 3506 // code. If the target chooses to do this, this is the next best. 3507 SDValue Result = 3508 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, 3509 DstSV, DstSVOff, SrcSV, SrcSVOff); 3510 if (Result.getNode()) 3511 return Result; 3512 3513 // Emit a library call. 3514 TargetLowering::ArgListTy Args; 3515 TargetLowering::ArgListEntry Entry; 3516 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3517 Entry.Node = Dst; Args.push_back(Entry); 3518 Entry.Node = Src; Args.push_back(Entry); 3519 Entry.Node = Size; Args.push_back(Entry); 3520 // FIXME: pass in DebugLoc 3521 std::pair<SDValue,SDValue> CallResult = 3522 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3523 false, false, false, false, 0, 3524 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3525 /*isReturnValueUsed=*/false, 3526 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3527 TLI.getPointerTy()), 3528 Args, *this, dl, GetOrdering(Chain.getNode())); 3529 return CallResult.second; 3530} 3531 3532SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3533 SDValue Src, SDValue Size, 3534 unsigned Align, 3535 const Value *DstSV, uint64_t DstSVOff) { 3536 3537 // Check to see if we should lower the memset to stores first. 3538 // For cases within the target-specified limits, this is the best choice. 3539 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3540 if (ConstantSize) { 3541 // Memset with size zero? Just return the original chain. 3542 if (ConstantSize->isNullValue()) 3543 return Chain; 3544 3545 SDValue Result = 3546 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3547 Align, DstSV, DstSVOff); 3548 if (Result.getNode()) 3549 return Result; 3550 } 3551 3552 // Then check to see if we should lower the memset with target-specific 3553 // code. If the target chooses to do this, this is the next best. 3554 SDValue Result = 3555 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, 3556 DstSV, DstSVOff); 3557 if (Result.getNode()) 3558 return Result; 3559 3560 // Emit a library call. 3561 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3562 TargetLowering::ArgListTy Args; 3563 TargetLowering::ArgListEntry Entry; 3564 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3565 Args.push_back(Entry); 3566 // Extend or truncate the argument to be an i32 value for the call. 3567 if (Src.getValueType().bitsGT(MVT::i32)) 3568 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3569 else 3570 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3571 Entry.Node = Src; 3572 Entry.Ty = Type::getInt32Ty(*getContext()); 3573 Entry.isSExt = true; 3574 Args.push_back(Entry); 3575 Entry.Node = Size; 3576 Entry.Ty = IntPtrTy; 3577 Entry.isSExt = false; 3578 Args.push_back(Entry); 3579 // FIXME: pass in DebugLoc 3580 std::pair<SDValue,SDValue> CallResult = 3581 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3582 false, false, false, false, 0, 3583 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3584 /*isReturnValueUsed=*/false, 3585 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3586 TLI.getPointerTy()), 3587 Args, *this, dl, GetOrdering(Chain.getNode())); 3588 return CallResult.second; 3589} 3590 3591SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3592 SDValue Chain, 3593 SDValue Ptr, SDValue Cmp, 3594 SDValue Swp, const Value* PtrVal, 3595 unsigned Alignment) { 3596 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3597 Alignment = getEVTAlignment(MemVT); 3598 3599 // Check if the memory reference references a frame index 3600 if (!PtrVal) 3601 if (const FrameIndexSDNode *FI = 3602 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3603 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3604 3605 MachineFunction &MF = getMachineFunction(); 3606 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3607 3608 // For now, atomics are considered to be volatile always. 3609 Flags |= MachineMemOperand::MOVolatile; 3610 3611 MachineMemOperand *MMO = 3612 MF.getMachineMemOperand(PtrVal, Flags, 0, 3613 MemVT.getStoreSize(), Alignment); 3614 3615 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3616} 3617 3618SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3619 SDValue Chain, 3620 SDValue Ptr, SDValue Cmp, 3621 SDValue Swp, MachineMemOperand *MMO) { 3622 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3623 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3624 3625 EVT VT = Cmp.getValueType(); 3626 3627 SDVTList VTs = getVTList(VT, MVT::Other); 3628 FoldingSetNodeID ID; 3629 ID.AddInteger(MemVT.getRawBits()); 3630 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3631 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3632 void* IP = 0; 3633 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3634 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3635 return SDValue(E, 0); 3636 } 3637 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3638 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3639 CSEMap.InsertNode(N, IP); 3640 AllNodes.push_back(N); 3641 return SDValue(N, 0); 3642} 3643 3644SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3645 SDValue Chain, 3646 SDValue Ptr, SDValue Val, 3647 const Value* PtrVal, 3648 unsigned Alignment) { 3649 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3650 Alignment = getEVTAlignment(MemVT); 3651 3652 // Check if the memory reference references a frame index 3653 if (!PtrVal) 3654 if (const FrameIndexSDNode *FI = 3655 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3656 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3657 3658 MachineFunction &MF = getMachineFunction(); 3659 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3660 3661 // For now, atomics are considered to be volatile always. 3662 Flags |= MachineMemOperand::MOVolatile; 3663 3664 MachineMemOperand *MMO = 3665 MF.getMachineMemOperand(PtrVal, Flags, 0, 3666 MemVT.getStoreSize(), Alignment); 3667 3668 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3669} 3670 3671SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3672 SDValue Chain, 3673 SDValue Ptr, SDValue Val, 3674 MachineMemOperand *MMO) { 3675 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3676 Opcode == ISD::ATOMIC_LOAD_SUB || 3677 Opcode == ISD::ATOMIC_LOAD_AND || 3678 Opcode == ISD::ATOMIC_LOAD_OR || 3679 Opcode == ISD::ATOMIC_LOAD_XOR || 3680 Opcode == ISD::ATOMIC_LOAD_NAND || 3681 Opcode == ISD::ATOMIC_LOAD_MIN || 3682 Opcode == ISD::ATOMIC_LOAD_MAX || 3683 Opcode == ISD::ATOMIC_LOAD_UMIN || 3684 Opcode == ISD::ATOMIC_LOAD_UMAX || 3685 Opcode == ISD::ATOMIC_SWAP) && 3686 "Invalid Atomic Op"); 3687 3688 EVT VT = Val.getValueType(); 3689 3690 SDVTList VTs = getVTList(VT, MVT::Other); 3691 FoldingSetNodeID ID; 3692 ID.AddInteger(MemVT.getRawBits()); 3693 SDValue Ops[] = {Chain, Ptr, Val}; 3694 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3695 void* IP = 0; 3696 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3697 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3698 return SDValue(E, 0); 3699 } 3700 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3701 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Val, MMO); 3702 CSEMap.InsertNode(N, IP); 3703 AllNodes.push_back(N); 3704 return SDValue(N, 0); 3705} 3706 3707/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3708/// Allowed to return something different (and simpler) if Simplify is true. 3709SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3710 DebugLoc dl) { 3711 if (NumOps == 1) 3712 return Ops[0]; 3713 3714 SmallVector<EVT, 4> VTs; 3715 VTs.reserve(NumOps); 3716 for (unsigned i = 0; i < NumOps; ++i) 3717 VTs.push_back(Ops[i].getValueType()); 3718 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3719 Ops, NumOps); 3720} 3721 3722SDValue 3723SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3724 const EVT *VTs, unsigned NumVTs, 3725 const SDValue *Ops, unsigned NumOps, 3726 EVT MemVT, const Value *srcValue, int SVOff, 3727 unsigned Align, bool Vol, 3728 bool ReadMem, bool WriteMem) { 3729 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3730 MemVT, srcValue, SVOff, Align, Vol, 3731 ReadMem, WriteMem); 3732} 3733 3734SDValue 3735SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3736 const SDValue *Ops, unsigned NumOps, 3737 EVT MemVT, const Value *srcValue, int SVOff, 3738 unsigned Align, bool Vol, 3739 bool ReadMem, bool WriteMem) { 3740 if (Align == 0) // Ensure that codegen never sees alignment 0 3741 Align = getEVTAlignment(MemVT); 3742 3743 MachineFunction &MF = getMachineFunction(); 3744 unsigned Flags = 0; 3745 if (WriteMem) 3746 Flags |= MachineMemOperand::MOStore; 3747 if (ReadMem) 3748 Flags |= MachineMemOperand::MOLoad; 3749 if (Vol) 3750 Flags |= MachineMemOperand::MOVolatile; 3751 MachineMemOperand *MMO = 3752 MF.getMachineMemOperand(srcValue, Flags, SVOff, 3753 MemVT.getStoreSize(), Align); 3754 3755 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3756} 3757 3758SDValue 3759SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3760 const SDValue *Ops, unsigned NumOps, 3761 EVT MemVT, MachineMemOperand *MMO) { 3762 assert((Opcode == ISD::INTRINSIC_VOID || 3763 Opcode == ISD::INTRINSIC_W_CHAIN || 3764 (Opcode <= INT_MAX && 3765 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3766 "Opcode is not a memory-accessing opcode!"); 3767 3768 // Memoize the node unless it returns a flag. 3769 MemIntrinsicSDNode *N; 3770 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3771 FoldingSetNodeID ID; 3772 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3773 void *IP = 0; 3774 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3775 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3776 return SDValue(E, 0); 3777 } 3778 3779 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3780 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3781 CSEMap.InsertNode(N, IP); 3782 } else { 3783 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3784 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3785 } 3786 AllNodes.push_back(N); 3787 return SDValue(N, 0); 3788} 3789 3790SDValue 3791SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3792 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3793 SDValue Ptr, SDValue Offset, 3794 const Value *SV, int SVOffset, EVT MemVT, 3795 bool isVolatile, bool isNonTemporal, 3796 unsigned Alignment) { 3797 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3798 Alignment = getEVTAlignment(VT); 3799 3800 // Check if the memory reference references a frame index 3801 if (!SV) 3802 if (const FrameIndexSDNode *FI = 3803 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3804 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3805 3806 MachineFunction &MF = getMachineFunction(); 3807 unsigned Flags = MachineMemOperand::MOLoad; 3808 if (isVolatile) 3809 Flags |= MachineMemOperand::MOVolatile; 3810 if (isNonTemporal) 3811 Flags |= MachineMemOperand::MONonTemporal; 3812 MachineMemOperand *MMO = 3813 MF.getMachineMemOperand(SV, Flags, SVOffset, 3814 MemVT.getStoreSize(), Alignment); 3815 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO); 3816} 3817 3818SDValue 3819SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3820 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3821 SDValue Ptr, SDValue Offset, EVT MemVT, 3822 MachineMemOperand *MMO) { 3823 if (VT == MemVT) { 3824 ExtType = ISD::NON_EXTLOAD; 3825 } else if (ExtType == ISD::NON_EXTLOAD) { 3826 assert(VT == MemVT && "Non-extending load from different memory type!"); 3827 } else { 3828 // Extending load. 3829 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 3830 "Should only be an extending load, not truncating!"); 3831 assert(VT.isInteger() == MemVT.isInteger() && 3832 "Cannot convert from FP to Int or Int -> FP!"); 3833 assert(VT.isVector() == MemVT.isVector() && 3834 "Cannot use trunc store to convert to or from a vector!"); 3835 assert((!VT.isVector() || 3836 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 3837 "Cannot use trunc store to change the number of vector elements!"); 3838 } 3839 3840 bool Indexed = AM != ISD::UNINDEXED; 3841 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3842 "Unindexed load with an offset!"); 3843 3844 SDVTList VTs = Indexed ? 3845 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3846 SDValue Ops[] = { Chain, Ptr, Offset }; 3847 FoldingSetNodeID ID; 3848 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3849 ID.AddInteger(MemVT.getRawBits()); 3850 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 3851 MMO->isNonTemporal())); 3852 void *IP = 0; 3853 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3854 cast<LoadSDNode>(E)->refineAlignment(MMO); 3855 return SDValue(E, 0); 3856 } 3857 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3858 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, MemVT, MMO); 3859 CSEMap.InsertNode(N, IP); 3860 AllNodes.push_back(N); 3861 return SDValue(N, 0); 3862} 3863 3864SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3865 SDValue Chain, SDValue Ptr, 3866 const Value *SV, int SVOffset, 3867 bool isVolatile, bool isNonTemporal, 3868 unsigned Alignment) { 3869 SDValue Undef = getUNDEF(Ptr.getValueType()); 3870 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3871 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment); 3872} 3873 3874SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3875 SDValue Chain, SDValue Ptr, 3876 const Value *SV, 3877 int SVOffset, EVT MemVT, 3878 bool isVolatile, bool isNonTemporal, 3879 unsigned Alignment) { 3880 SDValue Undef = getUNDEF(Ptr.getValueType()); 3881 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3882 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment); 3883} 3884 3885SDValue 3886SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3887 SDValue Offset, ISD::MemIndexedMode AM) { 3888 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3889 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3890 "Load is already a indexed load!"); 3891 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3892 LD->getChain(), Base, Offset, LD->getSrcValue(), 3893 LD->getSrcValueOffset(), LD->getMemoryVT(), 3894 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 3895} 3896 3897SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3898 SDValue Ptr, const Value *SV, int SVOffset, 3899 bool isVolatile, bool isNonTemporal, 3900 unsigned Alignment) { 3901 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3902 Alignment = getEVTAlignment(Val.getValueType()); 3903 3904 // Check if the memory reference references a frame index 3905 if (!SV) 3906 if (const FrameIndexSDNode *FI = 3907 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3908 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3909 3910 MachineFunction &MF = getMachineFunction(); 3911 unsigned Flags = MachineMemOperand::MOStore; 3912 if (isVolatile) 3913 Flags |= MachineMemOperand::MOVolatile; 3914 if (isNonTemporal) 3915 Flags |= MachineMemOperand::MONonTemporal; 3916 MachineMemOperand *MMO = 3917 MF.getMachineMemOperand(SV, Flags, SVOffset, 3918 Val.getValueType().getStoreSize(), Alignment); 3919 3920 return getStore(Chain, dl, Val, Ptr, MMO); 3921} 3922 3923SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3924 SDValue Ptr, MachineMemOperand *MMO) { 3925 EVT VT = Val.getValueType(); 3926 SDVTList VTs = getVTList(MVT::Other); 3927 SDValue Undef = getUNDEF(Ptr.getValueType()); 3928 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3929 FoldingSetNodeID ID; 3930 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3931 ID.AddInteger(VT.getRawBits()); 3932 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 3933 MMO->isNonTemporal())); 3934 void *IP = 0; 3935 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3936 cast<StoreSDNode>(E)->refineAlignment(MMO); 3937 return SDValue(E, 0); 3938 } 3939 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3940 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false, VT, MMO); 3941 CSEMap.InsertNode(N, IP); 3942 AllNodes.push_back(N); 3943 return SDValue(N, 0); 3944} 3945 3946SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3947 SDValue Ptr, const Value *SV, 3948 int SVOffset, EVT SVT, 3949 bool isVolatile, bool isNonTemporal, 3950 unsigned Alignment) { 3951 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3952 Alignment = getEVTAlignment(SVT); 3953 3954 // Check if the memory reference references a frame index 3955 if (!SV) 3956 if (const FrameIndexSDNode *FI = 3957 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3958 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3959 3960 MachineFunction &MF = getMachineFunction(); 3961 unsigned Flags = MachineMemOperand::MOStore; 3962 if (isVolatile) 3963 Flags |= MachineMemOperand::MOVolatile; 3964 if (isNonTemporal) 3965 Flags |= MachineMemOperand::MONonTemporal; 3966 MachineMemOperand *MMO = 3967 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment); 3968 3969 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 3970} 3971 3972SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3973 SDValue Ptr, EVT SVT, 3974 MachineMemOperand *MMO) { 3975 EVT VT = Val.getValueType(); 3976 3977 if (VT == SVT) 3978 return getStore(Chain, dl, Val, Ptr, MMO); 3979 3980 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 3981 "Should only be a truncating store, not extending!"); 3982 assert(VT.isInteger() == SVT.isInteger() && 3983 "Can't do FP-INT conversion!"); 3984 assert(VT.isVector() == SVT.isVector() && 3985 "Cannot use trunc store to convert to or from a vector!"); 3986 assert((!VT.isVector() || 3987 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 3988 "Cannot use trunc store to change the number of vector elements!"); 3989 3990 SDVTList VTs = getVTList(MVT::Other); 3991 SDValue Undef = getUNDEF(Ptr.getValueType()); 3992 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3993 FoldingSetNodeID ID; 3994 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3995 ID.AddInteger(SVT.getRawBits()); 3996 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 3997 MMO->isNonTemporal())); 3998 void *IP = 0; 3999 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4000 cast<StoreSDNode>(E)->refineAlignment(MMO); 4001 return SDValue(E, 0); 4002 } 4003 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 4004 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true, SVT, MMO); 4005 CSEMap.InsertNode(N, IP); 4006 AllNodes.push_back(N); 4007 return SDValue(N, 0); 4008} 4009 4010SDValue 4011SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4012 SDValue Offset, ISD::MemIndexedMode AM) { 4013 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4014 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4015 "Store is already a indexed store!"); 4016 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4017 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4018 FoldingSetNodeID ID; 4019 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4020 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4021 ID.AddInteger(ST->getRawSubclassData()); 4022 void *IP = 0; 4023 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4024 return SDValue(E, 0); 4025 4026 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 4027 new (N) StoreSDNode(Ops, dl, VTs, AM, 4028 ST->isTruncatingStore(), ST->getMemoryVT(), 4029 ST->getMemOperand()); 4030 CSEMap.InsertNode(N, IP); 4031 AllNodes.push_back(N); 4032 return SDValue(N, 0); 4033} 4034 4035SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4036 SDValue Chain, SDValue Ptr, 4037 SDValue SV) { 4038 SDValue Ops[] = { Chain, Ptr, SV }; 4039 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 4040} 4041 4042SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4043 const SDUse *Ops, unsigned NumOps) { 4044 switch (NumOps) { 4045 case 0: return getNode(Opcode, DL, VT); 4046 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4047 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4048 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4049 default: break; 4050 } 4051 4052 // Copy from an SDUse array into an SDValue array for use with 4053 // the regular getNode logic. 4054 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4055 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4056} 4057 4058SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4059 const SDValue *Ops, unsigned NumOps) { 4060 switch (NumOps) { 4061 case 0: return getNode(Opcode, DL, VT); 4062 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4063 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4064 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4065 default: break; 4066 } 4067 4068 switch (Opcode) { 4069 default: break; 4070 case ISD::SELECT_CC: { 4071 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4072 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4073 "LHS and RHS of condition must have same type!"); 4074 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4075 "True and False arms of SelectCC must have same type!"); 4076 assert(Ops[2].getValueType() == VT && 4077 "select_cc node must be of same type as true and false value!"); 4078 break; 4079 } 4080 case ISD::BR_CC: { 4081 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4082 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4083 "LHS/RHS of comparison should match types!"); 4084 break; 4085 } 4086 } 4087 4088 // Memoize nodes. 4089 SDNode *N; 4090 SDVTList VTs = getVTList(VT); 4091 4092 if (VT != MVT::Flag) { 4093 FoldingSetNodeID ID; 4094 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4095 void *IP = 0; 4096 4097 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4098 return SDValue(E, 0); 4099 4100 N = NodeAllocator.Allocate<SDNode>(); 4101 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 4102 CSEMap.InsertNode(N, IP); 4103 } else { 4104 N = NodeAllocator.Allocate<SDNode>(); 4105 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 4106 } 4107 4108 AllNodes.push_back(N); 4109#ifndef NDEBUG 4110 VerifyNode(N); 4111#endif 4112 return SDValue(N, 0); 4113} 4114 4115SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4116 const std::vector<EVT> &ResultTys, 4117 const SDValue *Ops, unsigned NumOps) { 4118 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4119 Ops, NumOps); 4120} 4121 4122SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4123 const EVT *VTs, unsigned NumVTs, 4124 const SDValue *Ops, unsigned NumOps) { 4125 if (NumVTs == 1) 4126 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4127 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4128} 4129 4130SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4131 const SDValue *Ops, unsigned NumOps) { 4132 if (VTList.NumVTs == 1) 4133 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4134 4135#if 0 4136 switch (Opcode) { 4137 // FIXME: figure out how to safely handle things like 4138 // int foo(int x) { return 1 << (x & 255); } 4139 // int bar() { return foo(256); } 4140 case ISD::SRA_PARTS: 4141 case ISD::SRL_PARTS: 4142 case ISD::SHL_PARTS: 4143 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4144 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4145 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4146 else if (N3.getOpcode() == ISD::AND) 4147 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4148 // If the and is only masking out bits that cannot effect the shift, 4149 // eliminate the and. 4150 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4151 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4152 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4153 } 4154 break; 4155 } 4156#endif 4157 4158 // Memoize the node unless it returns a flag. 4159 SDNode *N; 4160 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4161 FoldingSetNodeID ID; 4162 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4163 void *IP = 0; 4164 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4165 return SDValue(E, 0); 4166 4167 if (NumOps == 1) { 4168 N = NodeAllocator.Allocate<UnarySDNode>(); 4169 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4170 } else if (NumOps == 2) { 4171 N = NodeAllocator.Allocate<BinarySDNode>(); 4172 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4173 } else if (NumOps == 3) { 4174 N = NodeAllocator.Allocate<TernarySDNode>(); 4175 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 4176 } else { 4177 N = NodeAllocator.Allocate<SDNode>(); 4178 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 4179 } 4180 CSEMap.InsertNode(N, IP); 4181 } else { 4182 if (NumOps == 1) { 4183 N = NodeAllocator.Allocate<UnarySDNode>(); 4184 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4185 } else if (NumOps == 2) { 4186 N = NodeAllocator.Allocate<BinarySDNode>(); 4187 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4188 } else if (NumOps == 3) { 4189 N = NodeAllocator.Allocate<TernarySDNode>(); 4190 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 4191 } else { 4192 N = NodeAllocator.Allocate<SDNode>(); 4193 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 4194 } 4195 } 4196 AllNodes.push_back(N); 4197#ifndef NDEBUG 4198 VerifyNode(N); 4199#endif 4200 return SDValue(N, 0); 4201} 4202 4203SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4204 return getNode(Opcode, DL, VTList, 0, 0); 4205} 4206 4207SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4208 SDValue N1) { 4209 SDValue Ops[] = { N1 }; 4210 return getNode(Opcode, DL, VTList, Ops, 1); 4211} 4212 4213SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4214 SDValue N1, SDValue N2) { 4215 SDValue Ops[] = { N1, N2 }; 4216 return getNode(Opcode, DL, VTList, Ops, 2); 4217} 4218 4219SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4220 SDValue N1, SDValue N2, SDValue N3) { 4221 SDValue Ops[] = { N1, N2, N3 }; 4222 return getNode(Opcode, DL, VTList, Ops, 3); 4223} 4224 4225SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4226 SDValue N1, SDValue N2, SDValue N3, 4227 SDValue N4) { 4228 SDValue Ops[] = { N1, N2, N3, N4 }; 4229 return getNode(Opcode, DL, VTList, Ops, 4); 4230} 4231 4232SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4233 SDValue N1, SDValue N2, SDValue N3, 4234 SDValue N4, SDValue N5) { 4235 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4236 return getNode(Opcode, DL, VTList, Ops, 5); 4237} 4238 4239SDVTList SelectionDAG::getVTList(EVT VT) { 4240 return makeVTList(SDNode::getValueTypeList(VT), 1); 4241} 4242 4243SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4244 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4245 E = VTList.rend(); I != E; ++I) 4246 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4247 return *I; 4248 4249 EVT *Array = Allocator.Allocate<EVT>(2); 4250 Array[0] = VT1; 4251 Array[1] = VT2; 4252 SDVTList Result = makeVTList(Array, 2); 4253 VTList.push_back(Result); 4254 return Result; 4255} 4256 4257SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4258 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4259 E = VTList.rend(); I != E; ++I) 4260 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4261 I->VTs[2] == VT3) 4262 return *I; 4263 4264 EVT *Array = Allocator.Allocate<EVT>(3); 4265 Array[0] = VT1; 4266 Array[1] = VT2; 4267 Array[2] = VT3; 4268 SDVTList Result = makeVTList(Array, 3); 4269 VTList.push_back(Result); 4270 return Result; 4271} 4272 4273SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4274 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4275 E = VTList.rend(); I != E; ++I) 4276 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4277 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4278 return *I; 4279 4280 EVT *Array = Allocator.Allocate<EVT>(4); 4281 Array[0] = VT1; 4282 Array[1] = VT2; 4283 Array[2] = VT3; 4284 Array[3] = VT4; 4285 SDVTList Result = makeVTList(Array, 4); 4286 VTList.push_back(Result); 4287 return Result; 4288} 4289 4290SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4291 switch (NumVTs) { 4292 case 0: llvm_unreachable("Cannot have nodes without results!"); 4293 case 1: return getVTList(VTs[0]); 4294 case 2: return getVTList(VTs[0], VTs[1]); 4295 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4296 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4297 default: break; 4298 } 4299 4300 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4301 E = VTList.rend(); I != E; ++I) { 4302 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4303 continue; 4304 4305 bool NoMatch = false; 4306 for (unsigned i = 2; i != NumVTs; ++i) 4307 if (VTs[i] != I->VTs[i]) { 4308 NoMatch = true; 4309 break; 4310 } 4311 if (!NoMatch) 4312 return *I; 4313 } 4314 4315 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4316 std::copy(VTs, VTs+NumVTs, Array); 4317 SDVTList Result = makeVTList(Array, NumVTs); 4318 VTList.push_back(Result); 4319 return Result; 4320} 4321 4322 4323/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4324/// specified operands. If the resultant node already exists in the DAG, 4325/// this does not modify the specified node, instead it returns the node that 4326/// already exists. If the resultant node does not exist in the DAG, the 4327/// input node is returned. As a degenerate case, if you specify the same 4328/// input operands as the node already has, the input node is returned. 4329SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4330 SDNode *N = InN.getNode(); 4331 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4332 4333 // Check to see if there is no change. 4334 if (Op == N->getOperand(0)) return InN; 4335 4336 // See if the modified node already exists. 4337 void *InsertPos = 0; 4338 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4339 return SDValue(Existing, InN.getResNo()); 4340 4341 // Nope it doesn't. Remove the node from its current place in the maps. 4342 if (InsertPos) 4343 if (!RemoveNodeFromCSEMaps(N)) 4344 InsertPos = 0; 4345 4346 // Now we update the operands. 4347 N->OperandList[0].set(Op); 4348 4349 // If this gets put into a CSE map, add it. 4350 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4351 return InN; 4352} 4353 4354SDValue SelectionDAG:: 4355UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4356 SDNode *N = InN.getNode(); 4357 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4358 4359 // Check to see if there is no change. 4360 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4361 return InN; // No operands changed, just return the input node. 4362 4363 // See if the modified node already exists. 4364 void *InsertPos = 0; 4365 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4366 return SDValue(Existing, InN.getResNo()); 4367 4368 // Nope it doesn't. Remove the node from its current place in the maps. 4369 if (InsertPos) 4370 if (!RemoveNodeFromCSEMaps(N)) 4371 InsertPos = 0; 4372 4373 // Now we update the operands. 4374 if (N->OperandList[0] != Op1) 4375 N->OperandList[0].set(Op1); 4376 if (N->OperandList[1] != Op2) 4377 N->OperandList[1].set(Op2); 4378 4379 // If this gets put into a CSE map, add it. 4380 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4381 return InN; 4382} 4383 4384SDValue SelectionDAG:: 4385UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4386 SDValue Ops[] = { Op1, Op2, Op3 }; 4387 return UpdateNodeOperands(N, Ops, 3); 4388} 4389 4390SDValue SelectionDAG:: 4391UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4392 SDValue Op3, SDValue Op4) { 4393 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4394 return UpdateNodeOperands(N, Ops, 4); 4395} 4396 4397SDValue SelectionDAG:: 4398UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4399 SDValue Op3, SDValue Op4, SDValue Op5) { 4400 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4401 return UpdateNodeOperands(N, Ops, 5); 4402} 4403 4404SDValue SelectionDAG:: 4405UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4406 SDNode *N = InN.getNode(); 4407 assert(N->getNumOperands() == NumOps && 4408 "Update with wrong number of operands"); 4409 4410 // Check to see if there is no change. 4411 bool AnyChange = false; 4412 for (unsigned i = 0; i != NumOps; ++i) { 4413 if (Ops[i] != N->getOperand(i)) { 4414 AnyChange = true; 4415 break; 4416 } 4417 } 4418 4419 // No operands changed, just return the input node. 4420 if (!AnyChange) return InN; 4421 4422 // See if the modified node already exists. 4423 void *InsertPos = 0; 4424 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4425 return SDValue(Existing, InN.getResNo()); 4426 4427 // Nope it doesn't. Remove the node from its current place in the maps. 4428 if (InsertPos) 4429 if (!RemoveNodeFromCSEMaps(N)) 4430 InsertPos = 0; 4431 4432 // Now we update the operands. 4433 for (unsigned i = 0; i != NumOps; ++i) 4434 if (N->OperandList[i] != Ops[i]) 4435 N->OperandList[i].set(Ops[i]); 4436 4437 // If this gets put into a CSE map, add it. 4438 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4439 return InN; 4440} 4441 4442/// DropOperands - Release the operands and set this node to have 4443/// zero operands. 4444void SDNode::DropOperands() { 4445 // Unlike the code in MorphNodeTo that does this, we don't need to 4446 // watch for dead nodes here. 4447 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4448 SDUse &Use = *I++; 4449 Use.set(SDValue()); 4450 } 4451} 4452 4453/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4454/// machine opcode. 4455/// 4456SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4457 EVT VT) { 4458 SDVTList VTs = getVTList(VT); 4459 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4460} 4461 4462SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4463 EVT VT, SDValue Op1) { 4464 SDVTList VTs = getVTList(VT); 4465 SDValue Ops[] = { Op1 }; 4466 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4467} 4468 4469SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4470 EVT VT, SDValue Op1, 4471 SDValue Op2) { 4472 SDVTList VTs = getVTList(VT); 4473 SDValue Ops[] = { Op1, Op2 }; 4474 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4475} 4476 4477SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4478 EVT VT, SDValue Op1, 4479 SDValue Op2, SDValue Op3) { 4480 SDVTList VTs = getVTList(VT); 4481 SDValue Ops[] = { Op1, Op2, Op3 }; 4482 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4483} 4484 4485SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4486 EVT VT, const SDValue *Ops, 4487 unsigned NumOps) { 4488 SDVTList VTs = getVTList(VT); 4489 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4490} 4491 4492SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4493 EVT VT1, EVT VT2, const SDValue *Ops, 4494 unsigned NumOps) { 4495 SDVTList VTs = getVTList(VT1, VT2); 4496 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4497} 4498 4499SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4500 EVT VT1, EVT VT2) { 4501 SDVTList VTs = getVTList(VT1, VT2); 4502 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4503} 4504 4505SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4506 EVT VT1, EVT VT2, EVT VT3, 4507 const SDValue *Ops, unsigned NumOps) { 4508 SDVTList VTs = getVTList(VT1, VT2, VT3); 4509 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4510} 4511 4512SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4513 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4514 const SDValue *Ops, unsigned NumOps) { 4515 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4516 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4517} 4518 4519SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4520 EVT VT1, EVT VT2, 4521 SDValue Op1) { 4522 SDVTList VTs = getVTList(VT1, VT2); 4523 SDValue Ops[] = { Op1 }; 4524 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4525} 4526 4527SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4528 EVT VT1, EVT VT2, 4529 SDValue Op1, SDValue Op2) { 4530 SDVTList VTs = getVTList(VT1, VT2); 4531 SDValue Ops[] = { Op1, Op2 }; 4532 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4533} 4534 4535SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4536 EVT VT1, EVT VT2, 4537 SDValue Op1, SDValue Op2, 4538 SDValue Op3) { 4539 SDVTList VTs = getVTList(VT1, VT2); 4540 SDValue Ops[] = { Op1, Op2, Op3 }; 4541 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4542} 4543 4544SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4545 EVT VT1, EVT VT2, EVT VT3, 4546 SDValue Op1, SDValue Op2, 4547 SDValue Op3) { 4548 SDVTList VTs = getVTList(VT1, VT2, VT3); 4549 SDValue Ops[] = { Op1, Op2, Op3 }; 4550 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4551} 4552 4553SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4554 SDVTList VTs, const SDValue *Ops, 4555 unsigned NumOps) { 4556 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4557 // Reset the NodeID to -1. 4558 N->setNodeId(-1); 4559 return N; 4560} 4561 4562SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4563 EVT VT) { 4564 SDVTList VTs = getVTList(VT); 4565 return MorphNodeTo(N, Opc, VTs, 0, 0); 4566} 4567 4568SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4569 EVT VT, SDValue Op1) { 4570 SDVTList VTs = getVTList(VT); 4571 SDValue Ops[] = { Op1 }; 4572 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4573} 4574 4575SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4576 EVT VT, SDValue Op1, 4577 SDValue Op2) { 4578 SDVTList VTs = getVTList(VT); 4579 SDValue Ops[] = { Op1, Op2 }; 4580 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4581} 4582 4583SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4584 EVT VT, SDValue Op1, 4585 SDValue Op2, SDValue Op3) { 4586 SDVTList VTs = getVTList(VT); 4587 SDValue Ops[] = { Op1, Op2, Op3 }; 4588 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4589} 4590 4591SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4592 EVT VT, const SDValue *Ops, 4593 unsigned NumOps) { 4594 SDVTList VTs = getVTList(VT); 4595 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4596} 4597 4598SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4599 EVT VT1, EVT VT2, const SDValue *Ops, 4600 unsigned NumOps) { 4601 SDVTList VTs = getVTList(VT1, VT2); 4602 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4603} 4604 4605SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4606 EVT VT1, EVT VT2) { 4607 SDVTList VTs = getVTList(VT1, VT2); 4608 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0); 4609} 4610 4611SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4612 EVT VT1, EVT VT2, EVT VT3, 4613 const SDValue *Ops, unsigned NumOps) { 4614 SDVTList VTs = getVTList(VT1, VT2, VT3); 4615 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4616} 4617 4618SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4619 EVT VT1, EVT VT2, 4620 SDValue Op1) { 4621 SDVTList VTs = getVTList(VT1, VT2); 4622 SDValue Ops[] = { Op1 }; 4623 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4624} 4625 4626SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4627 EVT VT1, EVT VT2, 4628 SDValue Op1, SDValue Op2) { 4629 SDVTList VTs = getVTList(VT1, VT2); 4630 SDValue Ops[] = { Op1, Op2 }; 4631 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4632} 4633 4634SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4635 EVT VT1, EVT VT2, 4636 SDValue Op1, SDValue Op2, 4637 SDValue Op3) { 4638 SDVTList VTs = getVTList(VT1, VT2); 4639 SDValue Ops[] = { Op1, Op2, Op3 }; 4640 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4641} 4642 4643/// MorphNodeTo - These *mutate* the specified node to have the specified 4644/// return type, opcode, and operands. 4645/// 4646/// Note that MorphNodeTo returns the resultant node. If there is already a 4647/// node of the specified opcode and operands, it returns that node instead of 4648/// the current one. Note that the DebugLoc need not be the same. 4649/// 4650/// Using MorphNodeTo is faster than creating a new node and swapping it in 4651/// with ReplaceAllUsesWith both because it often avoids allocating a new 4652/// node, and because it doesn't require CSE recalculation for any of 4653/// the node's users. 4654/// 4655SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4656 SDVTList VTs, const SDValue *Ops, 4657 unsigned NumOps) { 4658 // If an identical node already exists, use it. 4659 void *IP = 0; 4660 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4661 FoldingSetNodeID ID; 4662 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4663 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4664 return ON; 4665 } 4666 4667 if (!RemoveNodeFromCSEMaps(N)) 4668 IP = 0; 4669 4670 // Start the morphing. 4671 N->NodeType = Opc; 4672 N->ValueList = VTs.VTs; 4673 N->NumValues = VTs.NumVTs; 4674 4675 // Clear the operands list, updating used nodes to remove this from their 4676 // use list. Keep track of any operands that become dead as a result. 4677 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4678 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4679 SDUse &Use = *I++; 4680 SDNode *Used = Use.getNode(); 4681 Use.set(SDValue()); 4682 if (Used->use_empty()) 4683 DeadNodeSet.insert(Used); 4684 } 4685 4686 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4687 // Initialize the memory references information. 4688 MN->setMemRefs(0, 0); 4689 // If NumOps is larger than the # of operands we can have in a 4690 // MachineSDNode, reallocate the operand list. 4691 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4692 if (MN->OperandsNeedDelete) 4693 delete[] MN->OperandList; 4694 if (NumOps > array_lengthof(MN->LocalOperands)) 4695 // We're creating a final node that will live unmorphed for the 4696 // remainder of the current SelectionDAG iteration, so we can allocate 4697 // the operands directly out of a pool with no recycling metadata. 4698 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4699 Ops, NumOps); 4700 else 4701 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4702 MN->OperandsNeedDelete = false; 4703 } else 4704 MN->InitOperands(MN->OperandList, Ops, NumOps); 4705 } else { 4706 // If NumOps is larger than the # of operands we currently have, reallocate 4707 // the operand list. 4708 if (NumOps > N->NumOperands) { 4709 if (N->OperandsNeedDelete) 4710 delete[] N->OperandList; 4711 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4712 N->OperandsNeedDelete = true; 4713 } else 4714 N->InitOperands(N->OperandList, Ops, NumOps); 4715 } 4716 4717 // Delete any nodes that are still dead after adding the uses for the 4718 // new operands. 4719 SmallVector<SDNode *, 16> DeadNodes; 4720 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4721 E = DeadNodeSet.end(); I != E; ++I) 4722 if ((*I)->use_empty()) 4723 DeadNodes.push_back(*I); 4724 RemoveDeadNodes(DeadNodes); 4725 4726 if (IP) 4727 CSEMap.InsertNode(N, IP); // Memoize the new node. 4728 return N; 4729} 4730 4731 4732/// getMachineNode - These are used for target selectors to create a new node 4733/// with specified return type(s), MachineInstr opcode, and operands. 4734/// 4735/// Note that getMachineNode returns the resultant node. If there is already a 4736/// node of the specified opcode and operands, it returns that node instead of 4737/// the current one. 4738MachineSDNode * 4739SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4740 SDVTList VTs = getVTList(VT); 4741 return getMachineNode(Opcode, dl, VTs, 0, 0); 4742} 4743 4744MachineSDNode * 4745SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4746 SDVTList VTs = getVTList(VT); 4747 SDValue Ops[] = { Op1 }; 4748 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4749} 4750 4751MachineSDNode * 4752SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4753 SDValue Op1, SDValue Op2) { 4754 SDVTList VTs = getVTList(VT); 4755 SDValue Ops[] = { Op1, Op2 }; 4756 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4757} 4758 4759MachineSDNode * 4760SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4761 SDValue Op1, SDValue Op2, SDValue Op3) { 4762 SDVTList VTs = getVTList(VT); 4763 SDValue Ops[] = { Op1, Op2, Op3 }; 4764 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4765} 4766 4767MachineSDNode * 4768SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4769 const SDValue *Ops, unsigned NumOps) { 4770 SDVTList VTs = getVTList(VT); 4771 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4772} 4773 4774MachineSDNode * 4775SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4776 SDVTList VTs = getVTList(VT1, VT2); 4777 return getMachineNode(Opcode, dl, VTs, 0, 0); 4778} 4779 4780MachineSDNode * 4781SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4782 EVT VT1, EVT VT2, SDValue Op1) { 4783 SDVTList VTs = getVTList(VT1, VT2); 4784 SDValue Ops[] = { Op1 }; 4785 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4786} 4787 4788MachineSDNode * 4789SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4790 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4791 SDVTList VTs = getVTList(VT1, VT2); 4792 SDValue Ops[] = { Op1, Op2 }; 4793 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4794} 4795 4796MachineSDNode * 4797SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4798 EVT VT1, EVT VT2, SDValue Op1, 4799 SDValue Op2, SDValue Op3) { 4800 SDVTList VTs = getVTList(VT1, VT2); 4801 SDValue Ops[] = { Op1, Op2, Op3 }; 4802 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4803} 4804 4805MachineSDNode * 4806SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4807 EVT VT1, EVT VT2, 4808 const SDValue *Ops, unsigned NumOps) { 4809 SDVTList VTs = getVTList(VT1, VT2); 4810 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4811} 4812 4813MachineSDNode * 4814SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4815 EVT VT1, EVT VT2, EVT VT3, 4816 SDValue Op1, SDValue Op2) { 4817 SDVTList VTs = getVTList(VT1, VT2, VT3); 4818 SDValue Ops[] = { Op1, Op2 }; 4819 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4820} 4821 4822MachineSDNode * 4823SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4824 EVT VT1, EVT VT2, EVT VT3, 4825 SDValue Op1, SDValue Op2, SDValue Op3) { 4826 SDVTList VTs = getVTList(VT1, VT2, VT3); 4827 SDValue Ops[] = { Op1, Op2, Op3 }; 4828 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4829} 4830 4831MachineSDNode * 4832SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4833 EVT VT1, EVT VT2, EVT VT3, 4834 const SDValue *Ops, unsigned NumOps) { 4835 SDVTList VTs = getVTList(VT1, VT2, VT3); 4836 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4837} 4838 4839MachineSDNode * 4840SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4841 EVT VT2, EVT VT3, EVT VT4, 4842 const SDValue *Ops, unsigned NumOps) { 4843 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4844 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4845} 4846 4847MachineSDNode * 4848SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4849 const std::vector<EVT> &ResultTys, 4850 const SDValue *Ops, unsigned NumOps) { 4851 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4852 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4853} 4854 4855MachineSDNode * 4856SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4857 const SDValue *Ops, unsigned NumOps) { 4858 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4859 MachineSDNode *N; 4860 void *IP; 4861 4862 if (DoCSE) { 4863 FoldingSetNodeID ID; 4864 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4865 IP = 0; 4866 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4867 return cast<MachineSDNode>(E); 4868 } 4869 4870 // Allocate a new MachineSDNode. 4871 N = NodeAllocator.Allocate<MachineSDNode>(); 4872 new (N) MachineSDNode(~Opcode, DL, VTs); 4873 4874 // Initialize the operands list. 4875 if (NumOps > array_lengthof(N->LocalOperands)) 4876 // We're creating a final node that will live unmorphed for the 4877 // remainder of the current SelectionDAG iteration, so we can allocate 4878 // the operands directly out of a pool with no recycling metadata. 4879 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4880 Ops, NumOps); 4881 else 4882 N->InitOperands(N->LocalOperands, Ops, NumOps); 4883 N->OperandsNeedDelete = false; 4884 4885 if (DoCSE) 4886 CSEMap.InsertNode(N, IP); 4887 4888 AllNodes.push_back(N); 4889#ifndef NDEBUG 4890 VerifyNode(N); 4891#endif 4892 return N; 4893} 4894 4895/// getTargetExtractSubreg - A convenience function for creating 4896/// TargetOpcode::EXTRACT_SUBREG nodes. 4897SDValue 4898SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4899 SDValue Operand) { 4900 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4901 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 4902 VT, Operand, SRIdxVal); 4903 return SDValue(Subreg, 0); 4904} 4905 4906/// getTargetInsertSubreg - A convenience function for creating 4907/// TargetOpcode::INSERT_SUBREG nodes. 4908SDValue 4909SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4910 SDValue Operand, SDValue Subreg) { 4911 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4912 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 4913 VT, Operand, Subreg, SRIdxVal); 4914 return SDValue(Result, 0); 4915} 4916 4917/// getNodeIfExists - Get the specified node if it's already available, or 4918/// else return NULL. 4919SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4920 const SDValue *Ops, unsigned NumOps) { 4921 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4922 FoldingSetNodeID ID; 4923 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4924 void *IP = 0; 4925 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4926 return E; 4927 } 4928 return NULL; 4929} 4930 4931/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4932/// This can cause recursive merging of nodes in the DAG. 4933/// 4934/// This version assumes From has a single result value. 4935/// 4936void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4937 DAGUpdateListener *UpdateListener) { 4938 SDNode *From = FromN.getNode(); 4939 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4940 "Cannot replace with this method!"); 4941 assert(From != To.getNode() && "Cannot replace uses of with self"); 4942 4943 // Iterate over all the existing uses of From. New uses will be added 4944 // to the beginning of the use list, which we avoid visiting. 4945 // This specifically avoids visiting uses of From that arise while the 4946 // replacement is happening, because any such uses would be the result 4947 // of CSE: If an existing node looks like From after one of its operands 4948 // is replaced by To, we don't want to replace of all its users with To 4949 // too. See PR3018 for more info. 4950 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4951 while (UI != UE) { 4952 SDNode *User = *UI; 4953 4954 // This node is about to morph, remove its old self from the CSE maps. 4955 RemoveNodeFromCSEMaps(User); 4956 4957 // A user can appear in a use list multiple times, and when this 4958 // happens the uses are usually next to each other in the list. 4959 // To help reduce the number of CSE recomputations, process all 4960 // the uses of this user that we can find this way. 4961 do { 4962 SDUse &Use = UI.getUse(); 4963 ++UI; 4964 Use.set(To); 4965 } while (UI != UE && *UI == User); 4966 4967 // Now that we have modified User, add it back to the CSE maps. If it 4968 // already exists there, recursively merge the results together. 4969 AddModifiedNodeToCSEMaps(User, UpdateListener); 4970 } 4971} 4972 4973/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4974/// This can cause recursive merging of nodes in the DAG. 4975/// 4976/// This version assumes that for each value of From, there is a 4977/// corresponding value in To in the same position with the same type. 4978/// 4979void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 4980 DAGUpdateListener *UpdateListener) { 4981#ifndef NDEBUG 4982 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 4983 assert((!From->hasAnyUseOfValue(i) || 4984 From->getValueType(i) == To->getValueType(i)) && 4985 "Cannot use this version of ReplaceAllUsesWith!"); 4986#endif 4987 4988 // Handle the trivial case. 4989 if (From == To) 4990 return; 4991 4992 // Iterate over just the existing users of From. See the comments in 4993 // the ReplaceAllUsesWith above. 4994 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4995 while (UI != UE) { 4996 SDNode *User = *UI; 4997 4998 // This node is about to morph, remove its old self from the CSE maps. 4999 RemoveNodeFromCSEMaps(User); 5000 5001 // A user can appear in a use list multiple times, and when this 5002 // happens the uses are usually next to each other in the list. 5003 // To help reduce the number of CSE recomputations, process all 5004 // the uses of this user that we can find this way. 5005 do { 5006 SDUse &Use = UI.getUse(); 5007 ++UI; 5008 Use.setNode(To); 5009 } while (UI != UE && *UI == User); 5010 5011 // Now that we have modified User, add it back to the CSE maps. If it 5012 // already exists there, recursively merge the results together. 5013 AddModifiedNodeToCSEMaps(User, UpdateListener); 5014 } 5015} 5016 5017/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5018/// This can cause recursive merging of nodes in the DAG. 5019/// 5020/// This version can replace From with any result values. To must match the 5021/// number and types of values returned by From. 5022void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5023 const SDValue *To, 5024 DAGUpdateListener *UpdateListener) { 5025 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5026 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5027 5028 // Iterate over just the existing users of From. See the comments in 5029 // the ReplaceAllUsesWith above. 5030 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5031 while (UI != UE) { 5032 SDNode *User = *UI; 5033 5034 // This node is about to morph, remove its old self from the CSE maps. 5035 RemoveNodeFromCSEMaps(User); 5036 5037 // A user can appear in a use list multiple times, and when this 5038 // happens the uses are usually next to each other in the list. 5039 // To help reduce the number of CSE recomputations, process all 5040 // the uses of this user that we can find this way. 5041 do { 5042 SDUse &Use = UI.getUse(); 5043 const SDValue &ToOp = To[Use.getResNo()]; 5044 ++UI; 5045 Use.set(ToOp); 5046 } while (UI != UE && *UI == User); 5047 5048 // Now that we have modified User, add it back to the CSE maps. If it 5049 // already exists there, recursively merge the results together. 5050 AddModifiedNodeToCSEMaps(User, UpdateListener); 5051 } 5052} 5053 5054/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5055/// uses of other values produced by From.getNode() alone. The Deleted 5056/// vector is handled the same way as for ReplaceAllUsesWith. 5057void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5058 DAGUpdateListener *UpdateListener){ 5059 // Handle the really simple, really trivial case efficiently. 5060 if (From == To) return; 5061 5062 // Handle the simple, trivial, case efficiently. 5063 if (From.getNode()->getNumValues() == 1) { 5064 ReplaceAllUsesWith(From, To, UpdateListener); 5065 return; 5066 } 5067 5068 // Iterate over just the existing users of From. See the comments in 5069 // the ReplaceAllUsesWith above. 5070 SDNode::use_iterator UI = From.getNode()->use_begin(), 5071 UE = From.getNode()->use_end(); 5072 while (UI != UE) { 5073 SDNode *User = *UI; 5074 bool UserRemovedFromCSEMaps = false; 5075 5076 // A user can appear in a use list multiple times, and when this 5077 // happens the uses are usually next to each other in the list. 5078 // To help reduce the number of CSE recomputations, process all 5079 // the uses of this user that we can find this way. 5080 do { 5081 SDUse &Use = UI.getUse(); 5082 5083 // Skip uses of different values from the same node. 5084 if (Use.getResNo() != From.getResNo()) { 5085 ++UI; 5086 continue; 5087 } 5088 5089 // If this node hasn't been modified yet, it's still in the CSE maps, 5090 // so remove its old self from the CSE maps. 5091 if (!UserRemovedFromCSEMaps) { 5092 RemoveNodeFromCSEMaps(User); 5093 UserRemovedFromCSEMaps = true; 5094 } 5095 5096 ++UI; 5097 Use.set(To); 5098 } while (UI != UE && *UI == User); 5099 5100 // We are iterating over all uses of the From node, so if a use 5101 // doesn't use the specific value, no changes are made. 5102 if (!UserRemovedFromCSEMaps) 5103 continue; 5104 5105 // Now that we have modified User, add it back to the CSE maps. If it 5106 // already exists there, recursively merge the results together. 5107 AddModifiedNodeToCSEMaps(User, UpdateListener); 5108 } 5109} 5110 5111namespace { 5112 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5113 /// to record information about a use. 5114 struct UseMemo { 5115 SDNode *User; 5116 unsigned Index; 5117 SDUse *Use; 5118 }; 5119 5120 /// operator< - Sort Memos by User. 5121 bool operator<(const UseMemo &L, const UseMemo &R) { 5122 return (intptr_t)L.User < (intptr_t)R.User; 5123 } 5124} 5125 5126/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5127/// uses of other values produced by From.getNode() alone. The same value 5128/// may appear in both the From and To list. The Deleted vector is 5129/// handled the same way as for ReplaceAllUsesWith. 5130void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5131 const SDValue *To, 5132 unsigned Num, 5133 DAGUpdateListener *UpdateListener){ 5134 // Handle the simple, trivial case efficiently. 5135 if (Num == 1) 5136 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5137 5138 // Read up all the uses and make records of them. This helps 5139 // processing new uses that are introduced during the 5140 // replacement process. 5141 SmallVector<UseMemo, 4> Uses; 5142 for (unsigned i = 0; i != Num; ++i) { 5143 unsigned FromResNo = From[i].getResNo(); 5144 SDNode *FromNode = From[i].getNode(); 5145 for (SDNode::use_iterator UI = FromNode->use_begin(), 5146 E = FromNode->use_end(); UI != E; ++UI) { 5147 SDUse &Use = UI.getUse(); 5148 if (Use.getResNo() == FromResNo) { 5149 UseMemo Memo = { *UI, i, &Use }; 5150 Uses.push_back(Memo); 5151 } 5152 } 5153 } 5154 5155 // Sort the uses, so that all the uses from a given User are together. 5156 std::sort(Uses.begin(), Uses.end()); 5157 5158 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5159 UseIndex != UseIndexEnd; ) { 5160 // We know that this user uses some value of From. If it is the right 5161 // value, update it. 5162 SDNode *User = Uses[UseIndex].User; 5163 5164 // This node is about to morph, remove its old self from the CSE maps. 5165 RemoveNodeFromCSEMaps(User); 5166 5167 // The Uses array is sorted, so all the uses for a given User 5168 // are next to each other in the list. 5169 // To help reduce the number of CSE recomputations, process all 5170 // the uses of this user that we can find this way. 5171 do { 5172 unsigned i = Uses[UseIndex].Index; 5173 SDUse &Use = *Uses[UseIndex].Use; 5174 ++UseIndex; 5175 5176 Use.set(To[i]); 5177 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5178 5179 // Now that we have modified User, add it back to the CSE maps. If it 5180 // already exists there, recursively merge the results together. 5181 AddModifiedNodeToCSEMaps(User, UpdateListener); 5182 } 5183} 5184 5185/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5186/// based on their topological order. It returns the maximum id and a vector 5187/// of the SDNodes* in assigned order by reference. 5188unsigned SelectionDAG::AssignTopologicalOrder() { 5189 5190 unsigned DAGSize = 0; 5191 5192 // SortedPos tracks the progress of the algorithm. Nodes before it are 5193 // sorted, nodes after it are unsorted. When the algorithm completes 5194 // it is at the end of the list. 5195 allnodes_iterator SortedPos = allnodes_begin(); 5196 5197 // Visit all the nodes. Move nodes with no operands to the front of 5198 // the list immediately. Annotate nodes that do have operands with their 5199 // operand count. Before we do this, the Node Id fields of the nodes 5200 // may contain arbitrary values. After, the Node Id fields for nodes 5201 // before SortedPos will contain the topological sort index, and the 5202 // Node Id fields for nodes At SortedPos and after will contain the 5203 // count of outstanding operands. 5204 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5205 SDNode *N = I++; 5206 checkForCycles(N); 5207 unsigned Degree = N->getNumOperands(); 5208 if (Degree == 0) { 5209 // A node with no uses, add it to the result array immediately. 5210 N->setNodeId(DAGSize++); 5211 allnodes_iterator Q = N; 5212 if (Q != SortedPos) 5213 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5214 assert(SortedPos != AllNodes.end() && "Overran node list"); 5215 ++SortedPos; 5216 } else { 5217 // Temporarily use the Node Id as scratch space for the degree count. 5218 N->setNodeId(Degree); 5219 } 5220 } 5221 5222 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5223 // such that by the time the end is reached all nodes will be sorted. 5224 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5225 SDNode *N = I; 5226 checkForCycles(N); 5227 // N is in sorted position, so all its uses have one less operand 5228 // that needs to be sorted. 5229 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5230 UI != UE; ++UI) { 5231 SDNode *P = *UI; 5232 unsigned Degree = P->getNodeId(); 5233 assert(Degree != 0 && "Invalid node degree"); 5234 --Degree; 5235 if (Degree == 0) { 5236 // All of P's operands are sorted, so P may sorted now. 5237 P->setNodeId(DAGSize++); 5238 if (P != SortedPos) 5239 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5240 assert(SortedPos != AllNodes.end() && "Overran node list"); 5241 ++SortedPos; 5242 } else { 5243 // Update P's outstanding operand count. 5244 P->setNodeId(Degree); 5245 } 5246 } 5247 if (I == SortedPos) { 5248#ifndef NDEBUG 5249 SDNode *S = ++I; 5250 dbgs() << "Overran sorted position:\n"; 5251 S->dumprFull(); 5252#endif 5253 llvm_unreachable(0); 5254 } 5255 } 5256 5257 assert(SortedPos == AllNodes.end() && 5258 "Topological sort incomplete!"); 5259 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5260 "First node in topological sort is not the entry token!"); 5261 assert(AllNodes.front().getNodeId() == 0 && 5262 "First node in topological sort has non-zero id!"); 5263 assert(AllNodes.front().getNumOperands() == 0 && 5264 "First node in topological sort has operands!"); 5265 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5266 "Last node in topologic sort has unexpected id!"); 5267 assert(AllNodes.back().use_empty() && 5268 "Last node in topologic sort has users!"); 5269 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5270 return DAGSize; 5271} 5272 5273/// AssignOrdering - Assign an order to the SDNode. 5274void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5275 assert(SD && "Trying to assign an order to a null node!"); 5276 Ordering->add(SD, Order); 5277} 5278 5279/// GetOrdering - Get the order for the SDNode. 5280unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5281 assert(SD && "Trying to get the order of a null node!"); 5282 return Ordering->getOrder(SD); 5283} 5284 5285 5286//===----------------------------------------------------------------------===// 5287// SDNode Class 5288//===----------------------------------------------------------------------===// 5289 5290HandleSDNode::~HandleSDNode() { 5291 DropOperands(); 5292} 5293 5294GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 5295 EVT VT, int64_t o, unsigned char TF) 5296 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)), 5297 Offset(o), TargetFlags(TF) { 5298 TheGlobal = const_cast<GlobalValue*>(GA); 5299} 5300 5301MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5302 MachineMemOperand *mmo) 5303 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5304 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5305 MMO->isNonTemporal()); 5306 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5307 assert(isNonTemporal() == MMO->isNonTemporal() && 5308 "Non-temporal encoding error!"); 5309 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5310} 5311 5312MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5313 const SDValue *Ops, unsigned NumOps, EVT memvt, 5314 MachineMemOperand *mmo) 5315 : SDNode(Opc, dl, VTs, Ops, NumOps), 5316 MemoryVT(memvt), MMO(mmo) { 5317 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5318 MMO->isNonTemporal()); 5319 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5320 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5321} 5322 5323/// Profile - Gather unique data for the node. 5324/// 5325void SDNode::Profile(FoldingSetNodeID &ID) const { 5326 AddNodeIDNode(ID, this); 5327} 5328 5329namespace { 5330 struct EVTArray { 5331 std::vector<EVT> VTs; 5332 5333 EVTArray() { 5334 VTs.reserve(MVT::LAST_VALUETYPE); 5335 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5336 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5337 } 5338 }; 5339} 5340 5341static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5342static ManagedStatic<EVTArray> SimpleVTArray; 5343static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5344 5345/// getValueTypeList - Return a pointer to the specified value type. 5346/// 5347const EVT *SDNode::getValueTypeList(EVT VT) { 5348 if (VT.isExtended()) { 5349 sys::SmartScopedLock<true> Lock(*VTMutex); 5350 return &(*EVTs->insert(VT).first); 5351 } else { 5352 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5353 } 5354} 5355 5356/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5357/// indicated value. This method ignores uses of other values defined by this 5358/// operation. 5359bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5360 assert(Value < getNumValues() && "Bad value!"); 5361 5362 // TODO: Only iterate over uses of a given value of the node 5363 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5364 if (UI.getUse().getResNo() == Value) { 5365 if (NUses == 0) 5366 return false; 5367 --NUses; 5368 } 5369 } 5370 5371 // Found exactly the right number of uses? 5372 return NUses == 0; 5373} 5374 5375 5376/// hasAnyUseOfValue - Return true if there are any use of the indicated 5377/// value. This method ignores uses of other values defined by this operation. 5378bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5379 assert(Value < getNumValues() && "Bad value!"); 5380 5381 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5382 if (UI.getUse().getResNo() == Value) 5383 return true; 5384 5385 return false; 5386} 5387 5388 5389/// isOnlyUserOf - Return true if this node is the only use of N. 5390/// 5391bool SDNode::isOnlyUserOf(SDNode *N) const { 5392 bool Seen = false; 5393 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5394 SDNode *User = *I; 5395 if (User == this) 5396 Seen = true; 5397 else 5398 return false; 5399 } 5400 5401 return Seen; 5402} 5403 5404/// isOperand - Return true if this node is an operand of N. 5405/// 5406bool SDValue::isOperandOf(SDNode *N) const { 5407 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5408 if (*this == N->getOperand(i)) 5409 return true; 5410 return false; 5411} 5412 5413bool SDNode::isOperandOf(SDNode *N) const { 5414 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5415 if (this == N->OperandList[i].getNode()) 5416 return true; 5417 return false; 5418} 5419 5420/// reachesChainWithoutSideEffects - Return true if this operand (which must 5421/// be a chain) reaches the specified operand without crossing any 5422/// side-effecting instructions. In practice, this looks through token 5423/// factors and non-volatile loads. In order to remain efficient, this only 5424/// looks a couple of nodes in, it does not do an exhaustive search. 5425bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5426 unsigned Depth) const { 5427 if (*this == Dest) return true; 5428 5429 // Don't search too deeply, we just want to be able to see through 5430 // TokenFactor's etc. 5431 if (Depth == 0) return false; 5432 5433 // If this is a token factor, all inputs to the TF happen in parallel. If any 5434 // of the operands of the TF reach dest, then we can do the xform. 5435 if (getOpcode() == ISD::TokenFactor) { 5436 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5437 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5438 return true; 5439 return false; 5440 } 5441 5442 // Loads don't have side effects, look through them. 5443 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5444 if (!Ld->isVolatile()) 5445 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5446 } 5447 return false; 5448} 5449 5450/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5451/// is either an operand of N or it can be reached by traversing up the operands. 5452/// NOTE: this is an expensive method. Use it carefully. 5453bool SDNode::isPredecessorOf(SDNode *N) const { 5454 SmallPtrSet<SDNode *, 32> Visited; 5455 SmallVector<SDNode *, 16> Worklist; 5456 Worklist.push_back(N); 5457 5458 do { 5459 N = Worklist.pop_back_val(); 5460 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5461 SDNode *Op = N->getOperand(i).getNode(); 5462 if (Op == this) 5463 return true; 5464 if (Visited.insert(Op)) 5465 Worklist.push_back(Op); 5466 } 5467 } while (!Worklist.empty()); 5468 5469 return false; 5470} 5471 5472uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5473 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5474 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5475} 5476 5477std::string SDNode::getOperationName(const SelectionDAG *G) const { 5478 switch (getOpcode()) { 5479 default: 5480 if (getOpcode() < ISD::BUILTIN_OP_END) 5481 return "<<Unknown DAG Node>>"; 5482 if (isMachineOpcode()) { 5483 if (G) 5484 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5485 if (getMachineOpcode() < TII->getNumOpcodes()) 5486 return TII->get(getMachineOpcode()).getName(); 5487 return "<<Unknown Machine Node>>"; 5488 } 5489 if (G) { 5490 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5491 const char *Name = TLI.getTargetNodeName(getOpcode()); 5492 if (Name) return Name; 5493 return "<<Unknown Target Node>>"; 5494 } 5495 return "<<Unknown Node>>"; 5496 5497#ifndef NDEBUG 5498 case ISD::DELETED_NODE: 5499 return "<<Deleted Node!>>"; 5500#endif 5501 case ISD::PREFETCH: return "Prefetch"; 5502 case ISD::MEMBARRIER: return "MemBarrier"; 5503 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5504 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5505 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5506 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5507 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5508 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5509 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5510 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5511 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5512 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5513 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5514 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5515 case ISD::PCMARKER: return "PCMarker"; 5516 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5517 case ISD::SRCVALUE: return "SrcValue"; 5518 case ISD::EntryToken: return "EntryToken"; 5519 case ISD::TokenFactor: return "TokenFactor"; 5520 case ISD::AssertSext: return "AssertSext"; 5521 case ISD::AssertZext: return "AssertZext"; 5522 5523 case ISD::BasicBlock: return "BasicBlock"; 5524 case ISD::VALUETYPE: return "ValueType"; 5525 case ISD::Register: return "Register"; 5526 5527 case ISD::Constant: return "Constant"; 5528 case ISD::ConstantFP: return "ConstantFP"; 5529 case ISD::GlobalAddress: return "GlobalAddress"; 5530 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5531 case ISD::FrameIndex: return "FrameIndex"; 5532 case ISD::JumpTable: return "JumpTable"; 5533 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5534 case ISD::RETURNADDR: return "RETURNADDR"; 5535 case ISD::FRAMEADDR: return "FRAMEADDR"; 5536 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5537 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5538 case ISD::LSDAADDR: return "LSDAADDR"; 5539 case ISD::EHSELECTION: return "EHSELECTION"; 5540 case ISD::EH_RETURN: return "EH_RETURN"; 5541 case ISD::ConstantPool: return "ConstantPool"; 5542 case ISD::ExternalSymbol: return "ExternalSymbol"; 5543 case ISD::BlockAddress: return "BlockAddress"; 5544 case ISD::INTRINSIC_WO_CHAIN: 5545 case ISD::INTRINSIC_VOID: 5546 case ISD::INTRINSIC_W_CHAIN: { 5547 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5548 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5549 if (IID < Intrinsic::num_intrinsics) 5550 return Intrinsic::getName((Intrinsic::ID)IID); 5551 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5552 return TII->getName(IID); 5553 llvm_unreachable("Invalid intrinsic ID"); 5554 } 5555 5556 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5557 case ISD::TargetConstant: return "TargetConstant"; 5558 case ISD::TargetConstantFP:return "TargetConstantFP"; 5559 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5560 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5561 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5562 case ISD::TargetJumpTable: return "TargetJumpTable"; 5563 case ISD::TargetConstantPool: return "TargetConstantPool"; 5564 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5565 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5566 5567 case ISD::CopyToReg: return "CopyToReg"; 5568 case ISD::CopyFromReg: return "CopyFromReg"; 5569 case ISD::UNDEF: return "undef"; 5570 case ISD::MERGE_VALUES: return "merge_values"; 5571 case ISD::INLINEASM: return "inlineasm"; 5572 case ISD::EH_LABEL: return "eh_label"; 5573 case ISD::HANDLENODE: return "handlenode"; 5574 5575 // Unary operators 5576 case ISD::FABS: return "fabs"; 5577 case ISD::FNEG: return "fneg"; 5578 case ISD::FSQRT: return "fsqrt"; 5579 case ISD::FSIN: return "fsin"; 5580 case ISD::FCOS: return "fcos"; 5581 case ISD::FPOWI: return "fpowi"; 5582 case ISD::FPOW: return "fpow"; 5583 case ISD::FTRUNC: return "ftrunc"; 5584 case ISD::FFLOOR: return "ffloor"; 5585 case ISD::FCEIL: return "fceil"; 5586 case ISD::FRINT: return "frint"; 5587 case ISD::FNEARBYINT: return "fnearbyint"; 5588 5589 // Binary operators 5590 case ISD::ADD: return "add"; 5591 case ISD::SUB: return "sub"; 5592 case ISD::MUL: return "mul"; 5593 case ISD::MULHU: return "mulhu"; 5594 case ISD::MULHS: return "mulhs"; 5595 case ISD::SDIV: return "sdiv"; 5596 case ISD::UDIV: return "udiv"; 5597 case ISD::SREM: return "srem"; 5598 case ISD::UREM: return "urem"; 5599 case ISD::SMUL_LOHI: return "smul_lohi"; 5600 case ISD::UMUL_LOHI: return "umul_lohi"; 5601 case ISD::SDIVREM: return "sdivrem"; 5602 case ISD::UDIVREM: return "udivrem"; 5603 case ISD::AND: return "and"; 5604 case ISD::OR: return "or"; 5605 case ISD::XOR: return "xor"; 5606 case ISD::SHL: return "shl"; 5607 case ISD::SRA: return "sra"; 5608 case ISD::SRL: return "srl"; 5609 case ISD::ROTL: return "rotl"; 5610 case ISD::ROTR: return "rotr"; 5611 case ISD::FADD: return "fadd"; 5612 case ISD::FSUB: return "fsub"; 5613 case ISD::FMUL: return "fmul"; 5614 case ISD::FDIV: return "fdiv"; 5615 case ISD::FREM: return "frem"; 5616 case ISD::FCOPYSIGN: return "fcopysign"; 5617 case ISD::FGETSIGN: return "fgetsign"; 5618 5619 case ISD::SETCC: return "setcc"; 5620 case ISD::VSETCC: return "vsetcc"; 5621 case ISD::SELECT: return "select"; 5622 case ISD::SELECT_CC: return "select_cc"; 5623 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5624 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5625 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5626 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5627 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5628 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5629 case ISD::CARRY_FALSE: return "carry_false"; 5630 case ISD::ADDC: return "addc"; 5631 case ISD::ADDE: return "adde"; 5632 case ISD::SADDO: return "saddo"; 5633 case ISD::UADDO: return "uaddo"; 5634 case ISD::SSUBO: return "ssubo"; 5635 case ISD::USUBO: return "usubo"; 5636 case ISD::SMULO: return "smulo"; 5637 case ISD::UMULO: return "umulo"; 5638 case ISD::SUBC: return "subc"; 5639 case ISD::SUBE: return "sube"; 5640 case ISD::SHL_PARTS: return "shl_parts"; 5641 case ISD::SRA_PARTS: return "sra_parts"; 5642 case ISD::SRL_PARTS: return "srl_parts"; 5643 5644 // Conversion operators. 5645 case ISD::SIGN_EXTEND: return "sign_extend"; 5646 case ISD::ZERO_EXTEND: return "zero_extend"; 5647 case ISD::ANY_EXTEND: return "any_extend"; 5648 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5649 case ISD::TRUNCATE: return "truncate"; 5650 case ISD::FP_ROUND: return "fp_round"; 5651 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5652 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5653 case ISD::FP_EXTEND: return "fp_extend"; 5654 5655 case ISD::SINT_TO_FP: return "sint_to_fp"; 5656 case ISD::UINT_TO_FP: return "uint_to_fp"; 5657 case ISD::FP_TO_SINT: return "fp_to_sint"; 5658 case ISD::FP_TO_UINT: return "fp_to_uint"; 5659 case ISD::BIT_CONVERT: return "bit_convert"; 5660 5661 case ISD::CONVERT_RNDSAT: { 5662 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5663 default: llvm_unreachable("Unknown cvt code!"); 5664 case ISD::CVT_FF: return "cvt_ff"; 5665 case ISD::CVT_FS: return "cvt_fs"; 5666 case ISD::CVT_FU: return "cvt_fu"; 5667 case ISD::CVT_SF: return "cvt_sf"; 5668 case ISD::CVT_UF: return "cvt_uf"; 5669 case ISD::CVT_SS: return "cvt_ss"; 5670 case ISD::CVT_SU: return "cvt_su"; 5671 case ISD::CVT_US: return "cvt_us"; 5672 case ISD::CVT_UU: return "cvt_uu"; 5673 } 5674 } 5675 5676 // Control flow instructions 5677 case ISD::BR: return "br"; 5678 case ISD::BRIND: return "brind"; 5679 case ISD::BR_JT: return "br_jt"; 5680 case ISD::BRCOND: return "brcond"; 5681 case ISD::BR_CC: return "br_cc"; 5682 case ISD::CALLSEQ_START: return "callseq_start"; 5683 case ISD::CALLSEQ_END: return "callseq_end"; 5684 5685 // Other operators 5686 case ISD::LOAD: return "load"; 5687 case ISD::STORE: return "store"; 5688 case ISD::VAARG: return "vaarg"; 5689 case ISD::VACOPY: return "vacopy"; 5690 case ISD::VAEND: return "vaend"; 5691 case ISD::VASTART: return "vastart"; 5692 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5693 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5694 case ISD::BUILD_PAIR: return "build_pair"; 5695 case ISD::STACKSAVE: return "stacksave"; 5696 case ISD::STACKRESTORE: return "stackrestore"; 5697 case ISD::TRAP: return "trap"; 5698 5699 // Bit manipulation 5700 case ISD::BSWAP: return "bswap"; 5701 case ISD::CTPOP: return "ctpop"; 5702 case ISD::CTTZ: return "cttz"; 5703 case ISD::CTLZ: return "ctlz"; 5704 5705 // Trampolines 5706 case ISD::TRAMPOLINE: return "trampoline"; 5707 5708 case ISD::CONDCODE: 5709 switch (cast<CondCodeSDNode>(this)->get()) { 5710 default: llvm_unreachable("Unknown setcc condition!"); 5711 case ISD::SETOEQ: return "setoeq"; 5712 case ISD::SETOGT: return "setogt"; 5713 case ISD::SETOGE: return "setoge"; 5714 case ISD::SETOLT: return "setolt"; 5715 case ISD::SETOLE: return "setole"; 5716 case ISD::SETONE: return "setone"; 5717 5718 case ISD::SETO: return "seto"; 5719 case ISD::SETUO: return "setuo"; 5720 case ISD::SETUEQ: return "setue"; 5721 case ISD::SETUGT: return "setugt"; 5722 case ISD::SETUGE: return "setuge"; 5723 case ISD::SETULT: return "setult"; 5724 case ISD::SETULE: return "setule"; 5725 case ISD::SETUNE: return "setune"; 5726 5727 case ISD::SETEQ: return "seteq"; 5728 case ISD::SETGT: return "setgt"; 5729 case ISD::SETGE: return "setge"; 5730 case ISD::SETLT: return "setlt"; 5731 case ISD::SETLE: return "setle"; 5732 case ISD::SETNE: return "setne"; 5733 } 5734 } 5735} 5736 5737const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5738 switch (AM) { 5739 default: 5740 return ""; 5741 case ISD::PRE_INC: 5742 return "<pre-inc>"; 5743 case ISD::PRE_DEC: 5744 return "<pre-dec>"; 5745 case ISD::POST_INC: 5746 return "<post-inc>"; 5747 case ISD::POST_DEC: 5748 return "<post-dec>"; 5749 } 5750} 5751 5752std::string ISD::ArgFlagsTy::getArgFlagsString() { 5753 std::string S = "< "; 5754 5755 if (isZExt()) 5756 S += "zext "; 5757 if (isSExt()) 5758 S += "sext "; 5759 if (isInReg()) 5760 S += "inreg "; 5761 if (isSRet()) 5762 S += "sret "; 5763 if (isByVal()) 5764 S += "byval "; 5765 if (isNest()) 5766 S += "nest "; 5767 if (getByValAlign()) 5768 S += "byval-align:" + utostr(getByValAlign()) + " "; 5769 if (getOrigAlign()) 5770 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5771 if (getByValSize()) 5772 S += "byval-size:" + utostr(getByValSize()) + " "; 5773 return S + ">"; 5774} 5775 5776void SDNode::dump() const { dump(0); } 5777void SDNode::dump(const SelectionDAG *G) const { 5778 print(dbgs(), G); 5779} 5780 5781void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5782 OS << (void*)this << ": "; 5783 5784 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5785 if (i) OS << ","; 5786 if (getValueType(i) == MVT::Other) 5787 OS << "ch"; 5788 else 5789 OS << getValueType(i).getEVTString(); 5790 } 5791 OS << " = " << getOperationName(G); 5792} 5793 5794void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5795 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5796 if (!MN->memoperands_empty()) { 5797 OS << "<"; 5798 OS << "Mem:"; 5799 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5800 e = MN->memoperands_end(); i != e; ++i) { 5801 OS << **i; 5802 if (next(i) != e) 5803 OS << " "; 5804 } 5805 OS << ">"; 5806 } 5807 } else if (const ShuffleVectorSDNode *SVN = 5808 dyn_cast<ShuffleVectorSDNode>(this)) { 5809 OS << "<"; 5810 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5811 int Idx = SVN->getMaskElt(i); 5812 if (i) OS << ","; 5813 if (Idx < 0) 5814 OS << "u"; 5815 else 5816 OS << Idx; 5817 } 5818 OS << ">"; 5819 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5820 OS << '<' << CSDN->getAPIntValue() << '>'; 5821 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5822 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5823 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5824 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5825 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5826 else { 5827 OS << "<APFloat("; 5828 CSDN->getValueAPF().bitcastToAPInt().dump(); 5829 OS << ")>"; 5830 } 5831 } else if (const GlobalAddressSDNode *GADN = 5832 dyn_cast<GlobalAddressSDNode>(this)) { 5833 int64_t offset = GADN->getOffset(); 5834 OS << '<'; 5835 WriteAsOperand(OS, GADN->getGlobal()); 5836 OS << '>'; 5837 if (offset > 0) 5838 OS << " + " << offset; 5839 else 5840 OS << " " << offset; 5841 if (unsigned int TF = GADN->getTargetFlags()) 5842 OS << " [TF=" << TF << ']'; 5843 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5844 OS << "<" << FIDN->getIndex() << ">"; 5845 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5846 OS << "<" << JTDN->getIndex() << ">"; 5847 if (unsigned int TF = JTDN->getTargetFlags()) 5848 OS << " [TF=" << TF << ']'; 5849 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5850 int offset = CP->getOffset(); 5851 if (CP->isMachineConstantPoolEntry()) 5852 OS << "<" << *CP->getMachineCPVal() << ">"; 5853 else 5854 OS << "<" << *CP->getConstVal() << ">"; 5855 if (offset > 0) 5856 OS << " + " << offset; 5857 else 5858 OS << " " << offset; 5859 if (unsigned int TF = CP->getTargetFlags()) 5860 OS << " [TF=" << TF << ']'; 5861 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5862 OS << "<"; 5863 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5864 if (LBB) 5865 OS << LBB->getName() << " "; 5866 OS << (const void*)BBDN->getBasicBlock() << ">"; 5867 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5868 if (G && R->getReg() && 5869 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5870 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5871 } else { 5872 OS << " %reg" << R->getReg(); 5873 } 5874 } else if (const ExternalSymbolSDNode *ES = 5875 dyn_cast<ExternalSymbolSDNode>(this)) { 5876 OS << "'" << ES->getSymbol() << "'"; 5877 if (unsigned int TF = ES->getTargetFlags()) 5878 OS << " [TF=" << TF << ']'; 5879 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5880 if (M->getValue()) 5881 OS << "<" << M->getValue() << ">"; 5882 else 5883 OS << "<null>"; 5884 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5885 OS << ":" << N->getVT().getEVTString(); 5886 } 5887 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5888 OS << "<" << *LD->getMemOperand(); 5889 5890 bool doExt = true; 5891 switch (LD->getExtensionType()) { 5892 default: doExt = false; break; 5893 case ISD::EXTLOAD: OS << ", anyext"; break; 5894 case ISD::SEXTLOAD: OS << ", sext"; break; 5895 case ISD::ZEXTLOAD: OS << ", zext"; break; 5896 } 5897 if (doExt) 5898 OS << " from " << LD->getMemoryVT().getEVTString(); 5899 5900 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5901 if (*AM) 5902 OS << ", " << AM; 5903 5904 OS << ">"; 5905 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5906 OS << "<" << *ST->getMemOperand(); 5907 5908 if (ST->isTruncatingStore()) 5909 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 5910 5911 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5912 if (*AM) 5913 OS << ", " << AM; 5914 5915 OS << ">"; 5916 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 5917 OS << "<" << *M->getMemOperand() << ">"; 5918 } else if (const BlockAddressSDNode *BA = 5919 dyn_cast<BlockAddressSDNode>(this)) { 5920 OS << "<"; 5921 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 5922 OS << ", "; 5923 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 5924 OS << ">"; 5925 if (unsigned int TF = BA->getTargetFlags()) 5926 OS << " [TF=" << TF << ']'; 5927 } 5928 5929 if (G) 5930 if (unsigned Order = G->GetOrdering(this)) 5931 OS << " [ORD=" << Order << ']'; 5932 5933 if (getNodeId() != -1) 5934 OS << " [ID=" << getNodeId() << ']'; 5935} 5936 5937void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5938 print_types(OS, G); 5939 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5940 if (i) OS << ", "; else OS << " "; 5941 OS << (void*)getOperand(i).getNode(); 5942 if (unsigned RN = getOperand(i).getResNo()) 5943 OS << ":" << RN; 5944 } 5945 print_details(OS, G); 5946} 5947 5948static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 5949 const SelectionDAG *G, unsigned depth, 5950 unsigned indent) 5951{ 5952 if (depth == 0) 5953 return; 5954 5955 OS.indent(indent); 5956 5957 N->print(OS, G); 5958 5959 if (depth < 1) 5960 return; 5961 5962 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5963 OS << '\n'; 5964 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 5965 } 5966} 5967 5968void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 5969 unsigned depth) const { 5970 printrWithDepthHelper(OS, this, G, depth, 0); 5971} 5972 5973void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 5974 // Don't print impossibly deep things. 5975 printrWithDepth(OS, G, 100); 5976} 5977 5978void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 5979 printrWithDepth(dbgs(), G, depth); 5980} 5981 5982void SDNode::dumprFull(const SelectionDAG *G) const { 5983 // Don't print impossibly deep things. 5984 dumprWithDepth(G, 100); 5985} 5986 5987static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 5988 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5989 if (N->getOperand(i).getNode()->hasOneUse()) 5990 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 5991 else 5992 dbgs() << "\n" << std::string(indent+2, ' ') 5993 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 5994 5995 5996 dbgs() << "\n"; 5997 dbgs().indent(indent); 5998 N->dump(G); 5999} 6000 6001SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6002 assert(N->getNumValues() == 1 && 6003 "Can't unroll a vector with multiple results!"); 6004 6005 EVT VT = N->getValueType(0); 6006 unsigned NE = VT.getVectorNumElements(); 6007 EVT EltVT = VT.getVectorElementType(); 6008 DebugLoc dl = N->getDebugLoc(); 6009 6010 SmallVector<SDValue, 8> Scalars; 6011 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6012 6013 // If ResNE is 0, fully unroll the vector op. 6014 if (ResNE == 0) 6015 ResNE = NE; 6016 else if (NE > ResNE) 6017 NE = ResNE; 6018 6019 unsigned i; 6020 for (i= 0; i != NE; ++i) { 6021 for (unsigned j = 0; j != N->getNumOperands(); ++j) { 6022 SDValue Operand = N->getOperand(j); 6023 EVT OperandVT = Operand.getValueType(); 6024 if (OperandVT.isVector()) { 6025 // A vector operand; extract a single element. 6026 EVT OperandEltVT = OperandVT.getVectorElementType(); 6027 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6028 OperandEltVT, 6029 Operand, 6030 getConstant(i, MVT::i32)); 6031 } else { 6032 // A scalar operand; just use it as is. 6033 Operands[j] = Operand; 6034 } 6035 } 6036 6037 switch (N->getOpcode()) { 6038 default: 6039 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6040 &Operands[0], Operands.size())); 6041 break; 6042 case ISD::SHL: 6043 case ISD::SRA: 6044 case ISD::SRL: 6045 case ISD::ROTL: 6046 case ISD::ROTR: 6047 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6048 getShiftAmountOperand(Operands[1]))); 6049 break; 6050 case ISD::SIGN_EXTEND_INREG: 6051 case ISD::FP_ROUND_INREG: { 6052 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6053 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6054 Operands[0], 6055 getValueType(ExtVT))); 6056 } 6057 } 6058 } 6059 6060 for (; i < ResNE; ++i) 6061 Scalars.push_back(getUNDEF(EltVT)); 6062 6063 return getNode(ISD::BUILD_VECTOR, dl, 6064 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6065 &Scalars[0], Scalars.size()); 6066} 6067 6068 6069/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6070/// location that is 'Dist' units away from the location that the 'Base' load 6071/// is loading from. 6072bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6073 unsigned Bytes, int Dist) const { 6074 if (LD->getChain() != Base->getChain()) 6075 return false; 6076 EVT VT = LD->getValueType(0); 6077 if (VT.getSizeInBits() / 8 != Bytes) 6078 return false; 6079 6080 SDValue Loc = LD->getOperand(1); 6081 SDValue BaseLoc = Base->getOperand(1); 6082 if (Loc.getOpcode() == ISD::FrameIndex) { 6083 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6084 return false; 6085 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6086 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6087 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6088 int FS = MFI->getObjectSize(FI); 6089 int BFS = MFI->getObjectSize(BFI); 6090 if (FS != BFS || FS != (int)Bytes) return false; 6091 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6092 } 6093 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6094 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6095 if (V && (V->getSExtValue() == Dist*Bytes)) 6096 return true; 6097 } 6098 6099 GlobalValue *GV1 = NULL; 6100 GlobalValue *GV2 = NULL; 6101 int64_t Offset1 = 0; 6102 int64_t Offset2 = 0; 6103 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6104 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6105 if (isGA1 && isGA2 && GV1 == GV2) 6106 return Offset1 == (Offset2 + Dist*Bytes); 6107 return false; 6108} 6109 6110 6111/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6112/// it cannot be inferred. 6113unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6114 // If this is a GlobalAddress + cst, return the alignment. 6115 GlobalValue *GV; 6116 int64_t GVOffset = 0; 6117 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) 6118 return MinAlign(GV->getAlignment(), GVOffset); 6119 6120 // If this is a direct reference to a stack slot, use information about the 6121 // stack slot's alignment. 6122 int FrameIdx = 1 << 31; 6123 int64_t FrameOffset = 0; 6124 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6125 FrameIdx = FI->getIndex(); 6126 } else if (Ptr.getOpcode() == ISD::ADD && 6127 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6128 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6129 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6130 FrameOffset = Ptr.getConstantOperandVal(1); 6131 } 6132 6133 if (FrameIdx != (1 << 31)) { 6134 // FIXME: Handle FI+CST. 6135 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6136 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6137 FrameOffset); 6138 if (MFI.isFixedObjectIndex(FrameIdx)) { 6139 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset; 6140 6141 // The alignment of the frame index can be determined from its offset from 6142 // the incoming frame position. If the frame object is at offset 32 and 6143 // the stack is guaranteed to be 16-byte aligned, then we know that the 6144 // object is 16-byte aligned. 6145 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment(); 6146 unsigned Align = MinAlign(ObjectOffset, StackAlign); 6147 6148 // Finally, the frame object itself may have a known alignment. Factor 6149 // the alignment + offset into a new alignment. For example, if we know 6150 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a 6151 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte 6152 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc. 6153 return std::max(Align, FIInfoAlign); 6154 } 6155 return FIInfoAlign; 6156 } 6157 6158 return 0; 6159} 6160 6161void SelectionDAG::dump() const { 6162 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6163 6164 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6165 I != E; ++I) { 6166 const SDNode *N = I; 6167 if (!N->hasOneUse() && N != getRoot().getNode()) 6168 DumpNodes(N, 2, this); 6169 } 6170 6171 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6172 6173 dbgs() << "\n\n"; 6174} 6175 6176void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6177 print_types(OS, G); 6178 print_details(OS, G); 6179} 6180 6181typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6182static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6183 const SelectionDAG *G, VisitedSDNodeSet &once) { 6184 if (!once.insert(N)) // If we've been here before, return now. 6185 return; 6186 6187 // Dump the current SDNode, but don't end the line yet. 6188 OS << std::string(indent, ' '); 6189 N->printr(OS, G); 6190 6191 // Having printed this SDNode, walk the children: 6192 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6193 const SDNode *child = N->getOperand(i).getNode(); 6194 6195 if (i) OS << ","; 6196 OS << " "; 6197 6198 if (child->getNumOperands() == 0) { 6199 // This child has no grandchildren; print it inline right here. 6200 child->printr(OS, G); 6201 once.insert(child); 6202 } else { // Just the address. FIXME: also print the child's opcode. 6203 OS << (void*)child; 6204 if (unsigned RN = N->getOperand(i).getResNo()) 6205 OS << ":" << RN; 6206 } 6207 } 6208 6209 OS << "\n"; 6210 6211 // Dump children that have grandchildren on their own line(s). 6212 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6213 const SDNode *child = N->getOperand(i).getNode(); 6214 DumpNodesr(OS, child, indent+2, G, once); 6215 } 6216} 6217 6218void SDNode::dumpr() const { 6219 VisitedSDNodeSet once; 6220 DumpNodesr(dbgs(), this, 0, 0, once); 6221} 6222 6223void SDNode::dumpr(const SelectionDAG *G) const { 6224 VisitedSDNodeSet once; 6225 DumpNodesr(dbgs(), this, 0, G, once); 6226} 6227 6228 6229// getAddressSpace - Return the address space this GlobalAddress belongs to. 6230unsigned GlobalAddressSDNode::getAddressSpace() const { 6231 return getGlobal()->getType()->getAddressSpace(); 6232} 6233 6234 6235const Type *ConstantPoolSDNode::getType() const { 6236 if (isMachineConstantPoolEntry()) 6237 return Val.MachineCPVal->getType(); 6238 return Val.ConstVal->getType(); 6239} 6240 6241bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6242 APInt &SplatUndef, 6243 unsigned &SplatBitSize, 6244 bool &HasAnyUndefs, 6245 unsigned MinSplatBits, 6246 bool isBigEndian) { 6247 EVT VT = getValueType(0); 6248 assert(VT.isVector() && "Expected a vector type"); 6249 unsigned sz = VT.getSizeInBits(); 6250 if (MinSplatBits > sz) 6251 return false; 6252 6253 SplatValue = APInt(sz, 0); 6254 SplatUndef = APInt(sz, 0); 6255 6256 // Get the bits. Bits with undefined values (when the corresponding element 6257 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6258 // in SplatValue. If any of the values are not constant, give up and return 6259 // false. 6260 unsigned int nOps = getNumOperands(); 6261 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6262 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6263 6264 for (unsigned j = 0; j < nOps; ++j) { 6265 unsigned i = isBigEndian ? nOps-1-j : j; 6266 SDValue OpVal = getOperand(i); 6267 unsigned BitPos = j * EltBitSize; 6268 6269 if (OpVal.getOpcode() == ISD::UNDEF) 6270 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6271 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6272 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 6273 zextOrTrunc(sz) << BitPos); 6274 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6275 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6276 else 6277 return false; 6278 } 6279 6280 // The build_vector is all constants or undefs. Find the smallest element 6281 // size that splats the vector. 6282 6283 HasAnyUndefs = (SplatUndef != 0); 6284 while (sz > 8) { 6285 6286 unsigned HalfSize = sz / 2; 6287 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 6288 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 6289 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 6290 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 6291 6292 // If the two halves do not match (ignoring undef bits), stop here. 6293 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6294 MinSplatBits > HalfSize) 6295 break; 6296 6297 SplatValue = HighValue | LowValue; 6298 SplatUndef = HighUndef & LowUndef; 6299 6300 sz = HalfSize; 6301 } 6302 6303 SplatBitSize = sz; 6304 return true; 6305} 6306 6307bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6308 // Find the first non-undef value in the shuffle mask. 6309 unsigned i, e; 6310 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6311 /* search */; 6312 6313 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6314 6315 // Make sure all remaining elements are either undef or the same as the first 6316 // non-undef value. 6317 for (int Idx = Mask[i]; i != e; ++i) 6318 if (Mask[i] >= 0 && Mask[i] != Idx) 6319 return false; 6320 return true; 6321} 6322 6323static void checkForCyclesHelper(const SDNode *N, 6324 std::set<const SDNode *> &visited, 6325 std::set<const SDNode *> &checked) { 6326 if (checked.find(N) != checked.end()) 6327 return; 6328 6329 if (visited.find(N) != visited.end()) { 6330 dbgs() << "Offending node:\n"; 6331 N->dumprFull(); 6332 assert(0 && "Detected cycle in SelectionDAG"); 6333 } 6334 6335 std::set<const SDNode*>::iterator i; 6336 bool inserted; 6337 6338 tie(i, inserted) = visited.insert(N); 6339 assert(inserted && "Missed cycle"); 6340 6341 for(unsigned i = 0; i < N->getNumOperands(); ++i) { 6342 checkForCyclesHelper(N->getOperand(i).getNode(), visited, checked); 6343 } 6344 visited.erase(i); 6345 checked.insert(N); 6346} 6347 6348void llvm::checkForCycles(const llvm::SDNode *N) { 6349#ifdef XDEBUG 6350 assert(N && "Checking nonexistant SDNode"); 6351 std::set<const SDNode *> visited; 6352 std::set<const SDNode *> checked; 6353 checkForCyclesHelper(N, visited, checked); 6354#endif 6355} 6356 6357void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6358 checkForCycles(DAG->getRoot().getNode()); 6359} 6360