SelectionDAG.cpp revision 6ce610f04bb232ce8b57e50e885f30f65d19e1a6
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13#include "llvm/CodeGen/SelectionDAG.h" 14#include "llvm/Constants.h" 15#include "llvm/Analysis/ValueTracking.h" 16#include "llvm/GlobalAlias.h" 17#include "llvm/GlobalVariable.h" 18#include "llvm/Intrinsics.h" 19#include "llvm/DerivedTypes.h" 20#include "llvm/Assembly/Writer.h" 21#include "llvm/CallingConv.h" 22#include "llvm/CodeGen/MachineBasicBlock.h" 23#include "llvm/CodeGen/MachineConstantPool.h" 24#include "llvm/CodeGen/MachineFrameInfo.h" 25#include "llvm/CodeGen/MachineModuleInfo.h" 26#include "llvm/CodeGen/PseudoSourceValue.h" 27#include "llvm/Target/TargetRegisterInfo.h" 28#include "llvm/Target/TargetData.h" 29#include "llvm/Target/TargetLowering.h" 30#include "llvm/Target/TargetOptions.h" 31#include "llvm/Target/TargetInstrInfo.h" 32#include "llvm/Target/TargetMachine.h" 33#include "llvm/Support/CommandLine.h" 34#include "llvm/Support/MathExtras.h" 35#include "llvm/Support/raw_ostream.h" 36#include "llvm/ADT/SetVector.h" 37#include "llvm/ADT/SmallPtrSet.h" 38#include "llvm/ADT/SmallSet.h" 39#include "llvm/ADT/SmallVector.h" 40#include "llvm/ADT/StringExtras.h" 41#include <algorithm> 42#include <cmath> 43using namespace llvm; 44 45/// makeVTList - Return an instance of the SDVTList struct initialized with the 46/// specified members. 47static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) { 48 SDVTList Res = {VTs, NumVTs}; 49 return Res; 50} 51 52static const fltSemantics *MVTToAPFloatSemantics(MVT VT) { 53 switch (VT.getSimpleVT()) { 54 default: assert(0 && "Unknown FP format"); 55 case MVT::f32: return &APFloat::IEEEsingle; 56 case MVT::f64: return &APFloat::IEEEdouble; 57 case MVT::f80: return &APFloat::x87DoubleExtended; 58 case MVT::f128: return &APFloat::IEEEquad; 59 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 60 } 61} 62 63SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 64 65//===----------------------------------------------------------------------===// 66// ConstantFPSDNode Class 67//===----------------------------------------------------------------------===// 68 69/// isExactlyValue - We don't rely on operator== working on double values, as 70/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 71/// As such, this method can be used to do an exact bit-for-bit comparison of 72/// two floating point values. 73bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 74 return getValueAPF().bitwiseIsEqual(V); 75} 76 77bool ConstantFPSDNode::isValueValidForType(MVT VT, 78 const APFloat& Val) { 79 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 80 81 // PPC long double cannot be converted to any other type. 82 if (VT == MVT::ppcf128 || 83 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 84 return false; 85 86 // convert modifies in place, so make a copy. 87 APFloat Val2 = APFloat(Val); 88 bool losesInfo; 89 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 90 &losesInfo); 91 return !losesInfo; 92} 93 94//===----------------------------------------------------------------------===// 95// ISD Namespace 96//===----------------------------------------------------------------------===// 97 98/// isBuildVectorAllOnes - Return true if the specified node is a 99/// BUILD_VECTOR where all of the elements are ~0 or undef. 100bool ISD::isBuildVectorAllOnes(const SDNode *N) { 101 // Look through a bit convert. 102 if (N->getOpcode() == ISD::BIT_CONVERT) 103 N = N->getOperand(0).getNode(); 104 105 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 106 107 unsigned i = 0, e = N->getNumOperands(); 108 109 // Skip over all of the undef values. 110 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 111 ++i; 112 113 // Do not accept an all-undef vector. 114 if (i == e) return false; 115 116 // Do not accept build_vectors that aren't all constants or which have non-~0 117 // elements. 118 SDValue NotZero = N->getOperand(i); 119 if (isa<ConstantSDNode>(NotZero)) { 120 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 121 return false; 122 } else if (isa<ConstantFPSDNode>(NotZero)) { 123 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 124 bitcastToAPInt().isAllOnesValue()) 125 return false; 126 } else 127 return false; 128 129 // Okay, we have at least one ~0 value, check to see if the rest match or are 130 // undefs. 131 for (++i; i != e; ++i) 132 if (N->getOperand(i) != NotZero && 133 N->getOperand(i).getOpcode() != ISD::UNDEF) 134 return false; 135 return true; 136} 137 138 139/// isBuildVectorAllZeros - Return true if the specified node is a 140/// BUILD_VECTOR where all of the elements are 0 or undef. 141bool ISD::isBuildVectorAllZeros(const SDNode *N) { 142 // Look through a bit convert. 143 if (N->getOpcode() == ISD::BIT_CONVERT) 144 N = N->getOperand(0).getNode(); 145 146 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 147 148 unsigned i = 0, e = N->getNumOperands(); 149 150 // Skip over all of the undef values. 151 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 152 ++i; 153 154 // Do not accept an all-undef vector. 155 if (i == e) return false; 156 157 // Do not accept build_vectors that aren't all constants or which have non-~0 158 // elements. 159 SDValue Zero = N->getOperand(i); 160 if (isa<ConstantSDNode>(Zero)) { 161 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 162 return false; 163 } else if (isa<ConstantFPSDNode>(Zero)) { 164 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 165 return false; 166 } else 167 return false; 168 169 // Okay, we have at least one ~0 value, check to see if the rest match or are 170 // undefs. 171 for (++i; i != e; ++i) 172 if (N->getOperand(i) != Zero && 173 N->getOperand(i).getOpcode() != ISD::UNDEF) 174 return false; 175 return true; 176} 177 178/// isScalarToVector - Return true if the specified node is a 179/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 180/// element is not an undef. 181bool ISD::isScalarToVector(const SDNode *N) { 182 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 183 return true; 184 185 if (N->getOpcode() != ISD::BUILD_VECTOR) 186 return false; 187 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 188 return false; 189 unsigned NumElems = N->getNumOperands(); 190 for (unsigned i = 1; i < NumElems; ++i) { 191 SDValue V = N->getOperand(i); 192 if (V.getOpcode() != ISD::UNDEF) 193 return false; 194 } 195 return true; 196} 197 198 199/// isDebugLabel - Return true if the specified node represents a debug 200/// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node). 201bool ISD::isDebugLabel(const SDNode *N) { 202 SDValue Zero; 203 if (N->getOpcode() == ISD::DBG_LABEL) 204 return true; 205 if (N->isMachineOpcode() && 206 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL) 207 return true; 208 return false; 209} 210 211/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 212/// when given the operation for (X op Y). 213ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 214 // To perform this operation, we just need to swap the L and G bits of the 215 // operation. 216 unsigned OldL = (Operation >> 2) & 1; 217 unsigned OldG = (Operation >> 1) & 1; 218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 219 (OldL << 1) | // New G bit 220 (OldG << 2)); // New L bit. 221} 222 223/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 224/// 'op' is a valid SetCC operation. 225ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 226 unsigned Operation = Op; 227 if (isInteger) 228 Operation ^= 7; // Flip L, G, E bits, but not U. 229 else 230 Operation ^= 15; // Flip all of the condition bits. 231 232 if (Operation > ISD::SETTRUE2) 233 Operation &= ~8; // Don't let N and U bits get set. 234 235 return ISD::CondCode(Operation); 236} 237 238 239/// isSignedOp - For an integer comparison, return 1 if the comparison is a 240/// signed operation and 2 if the result is an unsigned comparison. Return zero 241/// if the operation does not depend on the sign of the input (setne and seteq). 242static int isSignedOp(ISD::CondCode Opcode) { 243 switch (Opcode) { 244 default: assert(0 && "Illegal integer setcc operation!"); 245 case ISD::SETEQ: 246 case ISD::SETNE: return 0; 247 case ISD::SETLT: 248 case ISD::SETLE: 249 case ISD::SETGT: 250 case ISD::SETGE: return 1; 251 case ISD::SETULT: 252 case ISD::SETULE: 253 case ISD::SETUGT: 254 case ISD::SETUGE: return 2; 255 } 256} 257 258/// getSetCCOrOperation - Return the result of a logical OR between different 259/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 260/// returns SETCC_INVALID if it is not possible to represent the resultant 261/// comparison. 262ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 263 bool isInteger) { 264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 265 // Cannot fold a signed integer setcc with an unsigned integer setcc. 266 return ISD::SETCC_INVALID; 267 268 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 269 270 // If the N and U bits get set then the resultant comparison DOES suddenly 271 // care about orderedness, and is true when ordered. 272 if (Op > ISD::SETTRUE2) 273 Op &= ~16; // Clear the U bit if the N bit is set. 274 275 // Canonicalize illegal integer setcc's. 276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 277 Op = ISD::SETNE; 278 279 return ISD::CondCode(Op); 280} 281 282/// getSetCCAndOperation - Return the result of a logical AND between different 283/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 284/// function returns zero if it is not possible to represent the resultant 285/// comparison. 286ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 287 bool isInteger) { 288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 289 // Cannot fold a signed setcc with an unsigned setcc. 290 return ISD::SETCC_INVALID; 291 292 // Combine all of the condition bits. 293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 294 295 // Canonicalize illegal integer setcc's. 296 if (isInteger) { 297 switch (Result) { 298 default: break; 299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 300 case ISD::SETOEQ: // SETEQ & SETU[LG]E 301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 304 } 305 } 306 307 return Result; 308} 309 310const TargetMachine &SelectionDAG::getTarget() const { 311 return MF->getTarget(); 312} 313 314//===----------------------------------------------------------------------===// 315// SDNode Profile Support 316//===----------------------------------------------------------------------===// 317 318/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 319/// 320static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 321 ID.AddInteger(OpC); 322} 323 324/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 325/// solely with their pointer. 326static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 327 ID.AddPointer(VTList.VTs); 328} 329 330/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 331/// 332static void AddNodeIDOperands(FoldingSetNodeID &ID, 333 const SDValue *Ops, unsigned NumOps) { 334 for (; NumOps; --NumOps, ++Ops) { 335 ID.AddPointer(Ops->getNode()); 336 ID.AddInteger(Ops->getResNo()); 337 } 338} 339 340/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 341/// 342static void AddNodeIDOperands(FoldingSetNodeID &ID, 343 const SDUse *Ops, unsigned NumOps) { 344 for (; NumOps; --NumOps, ++Ops) { 345 ID.AddPointer(Ops->getNode()); 346 ID.AddInteger(Ops->getResNo()); 347 } 348} 349 350static void AddNodeIDNode(FoldingSetNodeID &ID, 351 unsigned short OpC, SDVTList VTList, 352 const SDValue *OpList, unsigned N) { 353 AddNodeIDOpcode(ID, OpC); 354 AddNodeIDValueTypes(ID, VTList); 355 AddNodeIDOperands(ID, OpList, N); 356} 357 358/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 359/// the NodeID data. 360static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 361 switch (N->getOpcode()) { 362 default: break; // Normal nodes don't need extra info. 363 case ISD::ARG_FLAGS: 364 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits()); 365 break; 366 case ISD::TargetConstant: 367 case ISD::Constant: 368 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 369 break; 370 case ISD::TargetConstantFP: 371 case ISD::ConstantFP: { 372 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 373 break; 374 } 375 case ISD::TargetGlobalAddress: 376 case ISD::GlobalAddress: 377 case ISD::TargetGlobalTLSAddress: 378 case ISD::GlobalTLSAddress: { 379 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 380 ID.AddPointer(GA->getGlobal()); 381 ID.AddInteger(GA->getOffset()); 382 break; 383 } 384 case ISD::BasicBlock: 385 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 386 break; 387 case ISD::Register: 388 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 389 break; 390 case ISD::DBG_STOPPOINT: { 391 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N); 392 ID.AddInteger(DSP->getLine()); 393 ID.AddInteger(DSP->getColumn()); 394 ID.AddPointer(DSP->getCompileUnit()); 395 break; 396 } 397 case ISD::SRCVALUE: 398 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 399 break; 400 case ISD::MEMOPERAND: { 401 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO; 402 MO.Profile(ID); 403 break; 404 } 405 case ISD::FrameIndex: 406 case ISD::TargetFrameIndex: 407 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 408 break; 409 case ISD::JumpTable: 410 case ISD::TargetJumpTable: 411 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 412 break; 413 case ISD::ConstantPool: 414 case ISD::TargetConstantPool: { 415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 416 ID.AddInteger(CP->getAlignment()); 417 ID.AddInteger(CP->getOffset()); 418 if (CP->isMachineConstantPoolEntry()) 419 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 420 else 421 ID.AddPointer(CP->getConstVal()); 422 break; 423 } 424 case ISD::CALL: { 425 const CallSDNode *Call = cast<CallSDNode>(N); 426 ID.AddInteger(Call->getCallingConv()); 427 ID.AddInteger(Call->isVarArg()); 428 break; 429 } 430 case ISD::LOAD: { 431 const LoadSDNode *LD = cast<LoadSDNode>(N); 432 ID.AddInteger(LD->getAddressingMode()); 433 ID.AddInteger(LD->getExtensionType()); 434 ID.AddInteger(LD->getMemoryVT().getRawBits()); 435 ID.AddInteger(LD->getRawFlags()); 436 break; 437 } 438 case ISD::STORE: { 439 const StoreSDNode *ST = cast<StoreSDNode>(N); 440 ID.AddInteger(ST->getAddressingMode()); 441 ID.AddInteger(ST->isTruncatingStore()); 442 ID.AddInteger(ST->getMemoryVT().getRawBits()); 443 ID.AddInteger(ST->getRawFlags()); 444 break; 445 } 446 case ISD::ATOMIC_CMP_SWAP: 447 case ISD::ATOMIC_SWAP: 448 case ISD::ATOMIC_LOAD_ADD: 449 case ISD::ATOMIC_LOAD_SUB: 450 case ISD::ATOMIC_LOAD_AND: 451 case ISD::ATOMIC_LOAD_OR: 452 case ISD::ATOMIC_LOAD_XOR: 453 case ISD::ATOMIC_LOAD_NAND: 454 case ISD::ATOMIC_LOAD_MIN: 455 case ISD::ATOMIC_LOAD_MAX: 456 case ISD::ATOMIC_LOAD_UMIN: 457 case ISD::ATOMIC_LOAD_UMAX: { 458 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 459 ID.AddInteger(AT->getRawFlags()); 460 break; 461 } 462 } // end switch (N->getOpcode()) 463} 464 465/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 466/// data. 467static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 468 AddNodeIDOpcode(ID, N->getOpcode()); 469 // Add the return value info. 470 AddNodeIDValueTypes(ID, N->getVTList()); 471 // Add the operand info. 472 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 473 474 // Handle SDNode leafs with special info. 475 AddNodeIDCustom(ID, N); 476} 477 478/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 479/// the CSE map that carries both alignment and volatility information. 480/// 481static inline unsigned 482encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) { 483 return isVolatile | ((Log2_32(Alignment) + 1) << 1); 484} 485 486//===----------------------------------------------------------------------===// 487// SelectionDAG Class 488//===----------------------------------------------------------------------===// 489 490/// doNotCSE - Return true if CSE should not be performed for this node. 491static bool doNotCSE(SDNode *N) { 492 if (N->getValueType(0) == MVT::Flag) 493 return true; // Never CSE anything that produces a flag. 494 495 switch (N->getOpcode()) { 496 default: break; 497 case ISD::HANDLENODE: 498 case ISD::DBG_LABEL: 499 case ISD::DBG_STOPPOINT: 500 case ISD::EH_LABEL: 501 case ISD::DECLARE: 502 return true; // Never CSE these nodes. 503 } 504 505 // Check that remaining values produced are not flags. 506 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 507 if (N->getValueType(i) == MVT::Flag) 508 return true; // Never CSE anything that produces a flag. 509 510 return false; 511} 512 513/// RemoveDeadNodes - This method deletes all unreachable nodes in the 514/// SelectionDAG. 515void SelectionDAG::RemoveDeadNodes() { 516 // Create a dummy node (which is not added to allnodes), that adds a reference 517 // to the root node, preventing it from being deleted. 518 HandleSDNode Dummy(getRoot()); 519 520 SmallVector<SDNode*, 128> DeadNodes; 521 522 // Add all obviously-dead nodes to the DeadNodes worklist. 523 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 524 if (I->use_empty()) 525 DeadNodes.push_back(I); 526 527 RemoveDeadNodes(DeadNodes); 528 529 // If the root changed (e.g. it was a dead load, update the root). 530 setRoot(Dummy.getValue()); 531} 532 533/// RemoveDeadNodes - This method deletes the unreachable nodes in the 534/// given list, and any nodes that become unreachable as a result. 535void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 536 DAGUpdateListener *UpdateListener) { 537 538 // Process the worklist, deleting the nodes and adding their uses to the 539 // worklist. 540 while (!DeadNodes.empty()) { 541 SDNode *N = DeadNodes.pop_back_val(); 542 543 if (UpdateListener) 544 UpdateListener->NodeDeleted(N, 0); 545 546 // Take the node out of the appropriate CSE map. 547 RemoveNodeFromCSEMaps(N); 548 549 // Next, brutally remove the operand list. This is safe to do, as there are 550 // no cycles in the graph. 551 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 552 SDUse &Use = *I++; 553 SDNode *Operand = Use.getNode(); 554 Use.set(SDValue()); 555 556 // Now that we removed this operand, see if there are no uses of it left. 557 if (Operand->use_empty()) 558 DeadNodes.push_back(Operand); 559 } 560 561 DeallocateNode(N); 562 } 563} 564 565void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 566 SmallVector<SDNode*, 16> DeadNodes(1, N); 567 RemoveDeadNodes(DeadNodes, UpdateListener); 568} 569 570void SelectionDAG::DeleteNode(SDNode *N) { 571 // First take this out of the appropriate CSE map. 572 RemoveNodeFromCSEMaps(N); 573 574 // Finally, remove uses due to operands of this node, remove from the 575 // AllNodes list, and delete the node. 576 DeleteNodeNotInCSEMaps(N); 577} 578 579void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 580 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 581 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 582 583 // Drop all of the operands and decrement used node's use counts. 584 N->DropOperands(); 585 586 DeallocateNode(N); 587} 588 589void SelectionDAG::DeallocateNode(SDNode *N) { 590 if (N->OperandsNeedDelete) 591 delete[] N->OperandList; 592 593 // Set the opcode to DELETED_NODE to help catch bugs when node 594 // memory is reallocated. 595 N->NodeType = ISD::DELETED_NODE; 596 597 NodeAllocator.Deallocate(AllNodes.remove(N)); 598} 599 600/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 601/// correspond to it. This is useful when we're about to delete or repurpose 602/// the node. We don't want future request for structurally identical nodes 603/// to return N anymore. 604bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 605 bool Erased = false; 606 switch (N->getOpcode()) { 607 case ISD::EntryToken: 608 assert(0 && "EntryToken should not be in CSEMaps!"); 609 return false; 610 case ISD::HANDLENODE: return false; // noop. 611 case ISD::CONDCODE: 612 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 613 "Cond code doesn't exist!"); 614 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 615 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 616 break; 617 case ISD::ExternalSymbol: 618 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 619 break; 620 case ISD::TargetExternalSymbol: 621 Erased = 622 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 623 break; 624 case ISD::VALUETYPE: { 625 MVT VT = cast<VTSDNode>(N)->getVT(); 626 if (VT.isExtended()) { 627 Erased = ExtendedValueTypeNodes.erase(VT); 628 } else { 629 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0; 630 ValueTypeNodes[VT.getSimpleVT()] = 0; 631 } 632 break; 633 } 634 default: 635 // Remove it from the CSE Map. 636 Erased = CSEMap.RemoveNode(N); 637 break; 638 } 639#ifndef NDEBUG 640 // Verify that the node was actually in one of the CSE maps, unless it has a 641 // flag result (which cannot be CSE'd) or is one of the special cases that are 642 // not subject to CSE. 643 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 644 !N->isMachineOpcode() && !doNotCSE(N)) { 645 N->dump(this); 646 cerr << "\n"; 647 assert(0 && "Node is not in map!"); 648 } 649#endif 650 return Erased; 651} 652 653/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 654/// maps and modified in place. Add it back to the CSE maps, unless an identical 655/// node already exists, in which case transfer all its users to the existing 656/// node. This transfer can potentially trigger recursive merging. 657/// 658void 659SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 660 DAGUpdateListener *UpdateListener) { 661 // For node types that aren't CSE'd, just act as if no identical node 662 // already exists. 663 if (!doNotCSE(N)) { 664 SDNode *Existing = CSEMap.GetOrInsertNode(N); 665 if (Existing != N) { 666 // If there was already an existing matching node, use ReplaceAllUsesWith 667 // to replace the dead one with the existing one. This can cause 668 // recursive merging of other unrelated nodes down the line. 669 ReplaceAllUsesWith(N, Existing, UpdateListener); 670 671 // N is now dead. Inform the listener if it exists and delete it. 672 if (UpdateListener) 673 UpdateListener->NodeDeleted(N, Existing); 674 DeleteNodeNotInCSEMaps(N); 675 return; 676 } 677 } 678 679 // If the node doesn't already exist, we updated it. Inform a listener if 680 // it exists. 681 if (UpdateListener) 682 UpdateListener->NodeUpdated(N); 683} 684 685/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 686/// were replaced with those specified. If this node is never memoized, 687/// return null, otherwise return a pointer to the slot it would take. If a 688/// node already exists with these operands, the slot will be non-null. 689SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 690 void *&InsertPos) { 691 if (doNotCSE(N)) 692 return 0; 693 694 SDValue Ops[] = { Op }; 695 FoldingSetNodeID ID; 696 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 697 AddNodeIDCustom(ID, N); 698 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 699} 700 701/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 702/// were replaced with those specified. If this node is never memoized, 703/// return null, otherwise return a pointer to the slot it would take. If a 704/// node already exists with these operands, the slot will be non-null. 705SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 706 SDValue Op1, SDValue Op2, 707 void *&InsertPos) { 708 if (doNotCSE(N)) 709 return 0; 710 711 SDValue Ops[] = { Op1, Op2 }; 712 FoldingSetNodeID ID; 713 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 714 AddNodeIDCustom(ID, N); 715 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 716} 717 718 719/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 720/// were replaced with those specified. If this node is never memoized, 721/// return null, otherwise return a pointer to the slot it would take. If a 722/// node already exists with these operands, the slot will be non-null. 723SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 724 const SDValue *Ops,unsigned NumOps, 725 void *&InsertPos) { 726 if (doNotCSE(N)) 727 return 0; 728 729 FoldingSetNodeID ID; 730 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 731 AddNodeIDCustom(ID, N); 732 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 733} 734 735/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 736void SelectionDAG::VerifyNode(SDNode *N) { 737 switch (N->getOpcode()) { 738 default: 739 break; 740 case ISD::BUILD_PAIR: { 741 MVT VT = N->getValueType(0); 742 assert(N->getNumValues() == 1 && "Too many results!"); 743 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 744 "Wrong return type!"); 745 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 746 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 747 "Mismatched operand types!"); 748 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 749 "Wrong operand type!"); 750 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 751 "Wrong return type size"); 752 break; 753 } 754 case ISD::BUILD_VECTOR: { 755 assert(N->getNumValues() == 1 && "Too many results!"); 756 assert(N->getValueType(0).isVector() && "Wrong return type!"); 757 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 758 "Wrong number of operands!"); 759 // FIXME: Change vector_shuffle to a variadic node with mask elements being 760 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an 761 // operand, and it is not always possible to legalize it. Turning off the 762 // following checks at least makes it possible to legalize most of the time. 763// MVT EltVT = N->getValueType(0).getVectorElementType(); 764// for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 765// assert(I->getValueType() == EltVT && 766// "Wrong operand type!"); 767 break; 768 } 769 } 770} 771 772/// getMVTAlignment - Compute the default alignment value for the 773/// given type. 774/// 775unsigned SelectionDAG::getMVTAlignment(MVT VT) const { 776 const Type *Ty = VT == MVT::iPTR ? 777 PointerType::get(Type::Int8Ty, 0) : 778 VT.getTypeForMVT(); 779 780 return TLI.getTargetData()->getABITypeAlignment(Ty); 781} 782 783SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 784 : TLI(tli), FLI(fli), 785 EntryNode(ISD::EntryToken, getVTList(MVT::Other)), 786 Root(getEntryNode()) { 787 AllNodes.push_back(&EntryNode); 788} 789 790void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi, 791 DwarfWriter *dw) { 792 MF = &mf; 793 MMI = mmi; 794 DW = dw; 795} 796 797SelectionDAG::~SelectionDAG() { 798 allnodes_clear(); 799} 800 801void SelectionDAG::allnodes_clear() { 802 assert(&*AllNodes.begin() == &EntryNode); 803 AllNodes.remove(AllNodes.begin()); 804 while (!AllNodes.empty()) 805 DeallocateNode(AllNodes.begin()); 806} 807 808void SelectionDAG::clear() { 809 allnodes_clear(); 810 OperandAllocator.Reset(); 811 CSEMap.clear(); 812 813 ExtendedValueTypeNodes.clear(); 814 ExternalSymbols.clear(); 815 TargetExternalSymbols.clear(); 816 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 817 static_cast<CondCodeSDNode*>(0)); 818 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 819 static_cast<SDNode*>(0)); 820 821 EntryNode.UseList = 0; 822 AllNodes.push_back(&EntryNode); 823 Root = getEntryNode(); 824} 825 826SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) { 827 if (Op.getValueType() == VT) return Op; 828 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 829 VT.getSizeInBits()); 830 return getNode(ISD::AND, Op.getValueType(), Op, 831 getConstant(Imm, Op.getValueType())); 832} 833 834SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, MVT VT) { 835 if (Op.getValueType() == VT) return Op; 836 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 837 VT.getSizeInBits()); 838 return getNode(ISD::AND, DL, Op.getValueType(), Op, 839 getConstant(Imm, Op.getValueType())); 840} 841 842/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 843/// 844SDValue SelectionDAG::getNOT(SDValue Val, MVT VT) { 845 SDValue NegOne; 846 if (VT.isVector()) { 847 MVT EltVT = VT.getVectorElementType(); 848 SDValue NegOneElt = getConstant(EltVT.getIntegerVTBitMask(), EltVT); 849 std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOneElt); 850 NegOne = getNode(ISD::BUILD_VECTOR, VT, &NegOnes[0], NegOnes.size()); 851 } else 852 NegOne = getConstant(VT.getIntegerVTBitMask(), VT); 853 854 return getNode(ISD::XOR, VT, Val, NegOne); 855} 856 857/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 858/// 859SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, MVT VT) { 860 SDValue NegOne; 861 if (VT.isVector()) { 862 MVT EltVT = VT.getVectorElementType(); 863 SDValue NegOneElt = getConstant(EltVT.getIntegerVTBitMask(), EltVT); 864 std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOneElt); 865 NegOne = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), VT, 866 &NegOnes[0], NegOnes.size()); 867 } else { 868 NegOne = getConstant(VT.getIntegerVTBitMask(), VT); 869 } 870 871 return getNode(ISD::XOR, DL, VT, Val, NegOne); 872} 873 874SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) { 875 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 876 assert((EltVT.getSizeInBits() >= 64 || 877 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 878 "getConstant with a uint64_t value that doesn't fit in the type!"); 879 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 880} 881 882SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) { 883 return getConstant(*ConstantInt::get(Val), VT, isT); 884} 885 886SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) { 887 assert(VT.isInteger() && "Cannot create FP integer constant!"); 888 889 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 890 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 891 "APInt size does not match type size!"); 892 893 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 894 FoldingSetNodeID ID; 895 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 896 ID.AddPointer(&Val); 897 void *IP = 0; 898 SDNode *N = NULL; 899 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 900 if (!VT.isVector()) 901 return SDValue(N, 0); 902 if (!N) { 903 N = NodeAllocator.Allocate<ConstantSDNode>(); 904 new (N) ConstantSDNode(isT, &Val, EltVT); 905 CSEMap.InsertNode(N, IP); 906 AllNodes.push_back(N); 907 } 908 909 SDValue Result(N, 0); 910 if (VT.isVector()) { 911 SmallVector<SDValue, 8> Ops; 912 Ops.assign(VT.getVectorNumElements(), Result); 913 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 914 } 915 return Result; 916} 917 918SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 919 return getConstant(Val, TLI.getPointerTy(), isTarget); 920} 921 922 923SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) { 924 return getConstantFP(*ConstantFP::get(V), VT, isTarget); 925} 926 927SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){ 928 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 929 930 MVT EltVT = 931 VT.isVector() ? VT.getVectorElementType() : VT; 932 933 // Do the map lookup using the actual bit pattern for the floating point 934 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 935 // we don't have issues with SNANs. 936 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 937 FoldingSetNodeID ID; 938 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 939 ID.AddPointer(&V); 940 void *IP = 0; 941 SDNode *N = NULL; 942 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 943 if (!VT.isVector()) 944 return SDValue(N, 0); 945 if (!N) { 946 N = NodeAllocator.Allocate<ConstantFPSDNode>(); 947 new (N) ConstantFPSDNode(isTarget, &V, EltVT); 948 CSEMap.InsertNode(N, IP); 949 AllNodes.push_back(N); 950 } 951 952 SDValue Result(N, 0); 953 if (VT.isVector()) { 954 SmallVector<SDValue, 8> Ops; 955 Ops.assign(VT.getVectorNumElements(), Result); 956 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 957 } 958 return Result; 959} 960 961SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) { 962 MVT EltVT = 963 VT.isVector() ? VT.getVectorElementType() : VT; 964 if (EltVT==MVT::f32) 965 return getConstantFP(APFloat((float)Val), VT, isTarget); 966 else 967 return getConstantFP(APFloat(Val), VT, isTarget); 968} 969 970SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 971 MVT VT, int64_t Offset, 972 bool isTargetGA) { 973 unsigned Opc; 974 975 // Truncate (with sign-extension) the offset value to the pointer size. 976 unsigned BitWidth = TLI.getPointerTy().getSizeInBits(); 977 if (BitWidth < 64) 978 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 979 980 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 981 if (!GVar) { 982 // If GV is an alias then use the aliasee for determining thread-localness. 983 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 984 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 985 } 986 987 if (GVar && GVar->isThreadLocal()) 988 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 989 else 990 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 991 992 FoldingSetNodeID ID; 993 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 994 ID.AddPointer(GV); 995 ID.AddInteger(Offset); 996 void *IP = 0; 997 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 998 return SDValue(E, 0); 999 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>(); 1000 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset); 1001 CSEMap.InsertNode(N, IP); 1002 AllNodes.push_back(N); 1003 return SDValue(N, 0); 1004} 1005 1006SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) { 1007 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1008 FoldingSetNodeID ID; 1009 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1010 ID.AddInteger(FI); 1011 void *IP = 0; 1012 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1013 return SDValue(E, 0); 1014 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>(); 1015 new (N) FrameIndexSDNode(FI, VT, isTarget); 1016 CSEMap.InsertNode(N, IP); 1017 AllNodes.push_back(N); 1018 return SDValue(N, 0); 1019} 1020 1021SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){ 1022 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1023 FoldingSetNodeID ID; 1024 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1025 ID.AddInteger(JTI); 1026 void *IP = 0; 1027 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1028 return SDValue(E, 0); 1029 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>(); 1030 new (N) JumpTableSDNode(JTI, VT, isTarget); 1031 CSEMap.InsertNode(N, IP); 1032 AllNodes.push_back(N); 1033 return SDValue(N, 0); 1034} 1035 1036SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT, 1037 unsigned Alignment, int Offset, 1038 bool isTarget) { 1039 if (Alignment == 0) 1040 Alignment = 1041 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType()); 1042 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1043 FoldingSetNodeID ID; 1044 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1045 ID.AddInteger(Alignment); 1046 ID.AddInteger(Offset); 1047 ID.AddPointer(C); 1048 void *IP = 0; 1049 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1050 return SDValue(E, 0); 1051 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1052 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 1053 CSEMap.InsertNode(N, IP); 1054 AllNodes.push_back(N); 1055 return SDValue(N, 0); 1056} 1057 1058 1059SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT, 1060 unsigned Alignment, int Offset, 1061 bool isTarget) { 1062 if (Alignment == 0) 1063 Alignment = 1064 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType()); 1065 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1066 FoldingSetNodeID ID; 1067 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1068 ID.AddInteger(Alignment); 1069 ID.AddInteger(Offset); 1070 C->AddSelectionDAGCSEId(ID); 1071 void *IP = 0; 1072 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1073 return SDValue(E, 0); 1074 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1075 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 1076 CSEMap.InsertNode(N, IP); 1077 AllNodes.push_back(N); 1078 return SDValue(N, 0); 1079} 1080 1081 1082SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1083 FoldingSetNodeID ID; 1084 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1085 ID.AddPointer(MBB); 1086 void *IP = 0; 1087 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1088 return SDValue(E, 0); 1089 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1090 new (N) BasicBlockSDNode(MBB); 1091 CSEMap.InsertNode(N, IP); 1092 AllNodes.push_back(N); 1093 return SDValue(N, 0); 1094} 1095 1096SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB, DebugLoc dl) { 1097 FoldingSetNodeID ID; 1098 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1099 ID.AddPointer(MBB); 1100 void *IP = 0; 1101 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1102 return SDValue(E, 0); 1103 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1104 new (N) BasicBlockSDNode(MBB, dl); 1105 CSEMap.InsertNode(N, IP); 1106 AllNodes.push_back(N); 1107 return SDValue(N, 0); 1108} 1109 1110SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) { 1111 FoldingSetNodeID ID; 1112 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0); 1113 ID.AddInteger(Flags.getRawBits()); 1114 void *IP = 0; 1115 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1116 return SDValue(E, 0); 1117 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>(); 1118 new (N) ARG_FLAGSSDNode(Flags); 1119 CSEMap.InsertNode(N, IP); 1120 AllNodes.push_back(N); 1121 return SDValue(N, 0); 1122} 1123 1124SDValue SelectionDAG::getValueType(MVT VT) { 1125 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size()) 1126 ValueTypeNodes.resize(VT.getSimpleVT()+1); 1127 1128 SDNode *&N = VT.isExtended() ? 1129 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()]; 1130 1131 if (N) return SDValue(N, 0); 1132 N = NodeAllocator.Allocate<VTSDNode>(); 1133 new (N) VTSDNode(VT); 1134 AllNodes.push_back(N); 1135 return SDValue(N, 0); 1136} 1137 1138SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) { 1139 SDNode *&N = ExternalSymbols[Sym]; 1140 if (N) return SDValue(N, 0); 1141 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1142 new (N) ExternalSymbolSDNode(false, Sym, VT); 1143 AllNodes.push_back(N); 1144 return SDValue(N, 0); 1145} 1146 1147SDValue SelectionDAG::getExternalSymbol(const char *Sym, DebugLoc dl, MVT VT) { 1148 SDNode *&N = ExternalSymbols[Sym]; 1149 if (N) return SDValue(N, 0); 1150 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1151 new (N) ExternalSymbolSDNode(false, dl, Sym, VT); 1152 AllNodes.push_back(N); 1153 return SDValue(N, 0); 1154} 1155 1156SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) { 1157 SDNode *&N = TargetExternalSymbols[Sym]; 1158 if (N) return SDValue(N, 0); 1159 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1160 new (N) ExternalSymbolSDNode(true, Sym, VT); 1161 AllNodes.push_back(N); 1162 return SDValue(N, 0); 1163} 1164 1165SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, DebugLoc dl, 1166 MVT VT) { 1167 SDNode *&N = TargetExternalSymbols[Sym]; 1168 if (N) return SDValue(N, 0); 1169 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1170 new (N) ExternalSymbolSDNode(true, dl, Sym, VT); 1171 AllNodes.push_back(N); 1172 return SDValue(N, 0); 1173} 1174 1175SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1176 if ((unsigned)Cond >= CondCodeNodes.size()) 1177 CondCodeNodes.resize(Cond+1); 1178 1179 if (CondCodeNodes[Cond] == 0) { 1180 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>(); 1181 new (N) CondCodeSDNode(Cond); 1182 CondCodeNodes[Cond] = N; 1183 AllNodes.push_back(N); 1184 } 1185 return SDValue(CondCodeNodes[Cond], 0); 1186} 1187 1188SDValue SelectionDAG::getConvertRndSat(MVT VT, SDValue Val, SDValue DTy, 1189 SDValue STy, SDValue Rnd, SDValue Sat, 1190 ISD::CvtCode Code) { 1191 // If the src and dest types are the same, no conversion is necessary. 1192 if (DTy == STy) 1193 return Val; 1194 1195 FoldingSetNodeID ID; 1196 void* IP = 0; 1197 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1198 return SDValue(E, 0); 1199 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>(); 1200 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1201 new (N) CvtRndSatSDNode(VT, Ops, 5, Code); 1202 CSEMap.InsertNode(N, IP); 1203 AllNodes.push_back(N); 1204 return SDValue(N, 0); 1205} 1206 1207SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) { 1208 FoldingSetNodeID ID; 1209 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1210 ID.AddInteger(RegNo); 1211 void *IP = 0; 1212 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1213 return SDValue(E, 0); 1214 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>(); 1215 new (N) RegisterSDNode(RegNo, VT); 1216 CSEMap.InsertNode(N, IP); 1217 AllNodes.push_back(N); 1218 return SDValue(N, 0); 1219} 1220 1221SDValue SelectionDAG::getDbgStopPoint(SDValue Root, 1222 unsigned Line, unsigned Col, 1223 Value *CU) { 1224 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>(); 1225 new (N) DbgStopPointSDNode(Root, Line, Col, CU); 1226 AllNodes.push_back(N); 1227 return SDValue(N, 0); 1228} 1229 1230SDValue SelectionDAG::getLabel(unsigned Opcode, 1231 SDValue Root, 1232 unsigned LabelID) { 1233 FoldingSetNodeID ID; 1234 SDValue Ops[] = { Root }; 1235 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1236 ID.AddInteger(LabelID); 1237 void *IP = 0; 1238 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1239 return SDValue(E, 0); 1240 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1241 new (N) LabelSDNode(Opcode, Root, LabelID); 1242 CSEMap.InsertNode(N, IP); 1243 AllNodes.push_back(N); 1244 return SDValue(N, 0); 1245} 1246 1247SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl, 1248 SDValue Root, 1249 unsigned LabelID) { 1250 FoldingSetNodeID ID; 1251 SDValue Ops[] = { Root }; 1252 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1253 ID.AddInteger(LabelID); 1254 void *IP = 0; 1255 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1256 return SDValue(E, 0); 1257 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1258 new (N) LabelSDNode(Opcode, dl, Root, LabelID); 1259 CSEMap.InsertNode(N, IP); 1260 AllNodes.push_back(N); 1261 return SDValue(N, 0); 1262} 1263 1264SDValue SelectionDAG::getSrcValue(const Value *V) { 1265 assert((!V || isa<PointerType>(V->getType())) && 1266 "SrcValue is not a pointer?"); 1267 1268 FoldingSetNodeID ID; 1269 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1270 ID.AddPointer(V); 1271 1272 void *IP = 0; 1273 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1274 return SDValue(E, 0); 1275 1276 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>(); 1277 new (N) SrcValueSDNode(V); 1278 CSEMap.InsertNode(N, IP); 1279 AllNodes.push_back(N); 1280 return SDValue(N, 0); 1281} 1282 1283SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) { 1284#ifndef NDEBUG 1285 const Value *v = MO.getValue(); 1286 assert((!v || isa<PointerType>(v->getType())) && 1287 "SrcValue is not a pointer?"); 1288#endif 1289 1290 FoldingSetNodeID ID; 1291 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0); 1292 MO.Profile(ID); 1293 1294 void *IP = 0; 1295 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1296 return SDValue(E, 0); 1297 1298 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>(); 1299 new (N) MemOperandSDNode(MO); 1300 CSEMap.InsertNode(N, IP); 1301 AllNodes.push_back(N); 1302 return SDValue(N, 0); 1303} 1304 1305/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1306/// specified value type. 1307SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) { 1308 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1309 unsigned ByteSize = VT.getStoreSizeInBits()/8; 1310 const Type *Ty = VT.getTypeForMVT(); 1311 unsigned StackAlign = 1312 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1313 1314 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign); 1315 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1316} 1317 1318/// CreateStackTemporary - Create a stack temporary suitable for holding 1319/// either of the specified value types. 1320SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) { 1321 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1322 VT2.getStoreSizeInBits())/8; 1323 const Type *Ty1 = VT1.getTypeForMVT(); 1324 const Type *Ty2 = VT2.getTypeForMVT(); 1325 const TargetData *TD = TLI.getTargetData(); 1326 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1327 TD->getPrefTypeAlignment(Ty2)); 1328 1329 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1330 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align); 1331 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1332} 1333 1334SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1, 1335 SDValue N2, ISD::CondCode Cond) { 1336 // These setcc operations always fold. 1337 switch (Cond) { 1338 default: break; 1339 case ISD::SETFALSE: 1340 case ISD::SETFALSE2: return getConstant(0, VT); 1341 case ISD::SETTRUE: 1342 case ISD::SETTRUE2: return getConstant(1, VT); 1343 1344 case ISD::SETOEQ: 1345 case ISD::SETOGT: 1346 case ISD::SETOGE: 1347 case ISD::SETOLT: 1348 case ISD::SETOLE: 1349 case ISD::SETONE: 1350 case ISD::SETO: 1351 case ISD::SETUO: 1352 case ISD::SETUEQ: 1353 case ISD::SETUNE: 1354 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1355 break; 1356 } 1357 1358 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1359 const APInt &C2 = N2C->getAPIntValue(); 1360 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1361 const APInt &C1 = N1C->getAPIntValue(); 1362 1363 switch (Cond) { 1364 default: assert(0 && "Unknown integer setcc!"); 1365 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1366 case ISD::SETNE: return getConstant(C1 != C2, VT); 1367 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1368 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1369 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1370 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1371 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1372 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1373 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1374 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1375 } 1376 } 1377 } 1378 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1379 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1380 // No compile time operations on this type yet. 1381 if (N1C->getValueType(0) == MVT::ppcf128) 1382 return SDValue(); 1383 1384 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1385 switch (Cond) { 1386 default: break; 1387 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1388 return getNode(ISD::UNDEF, VT); 1389 // fall through 1390 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1391 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1392 return getNode(ISD::UNDEF, VT); 1393 // fall through 1394 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1395 R==APFloat::cmpLessThan, VT); 1396 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1397 return getNode(ISD::UNDEF, VT); 1398 // fall through 1399 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1400 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1401 return getNode(ISD::UNDEF, VT); 1402 // fall through 1403 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1404 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1405 return getNode(ISD::UNDEF, VT); 1406 // fall through 1407 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1408 R==APFloat::cmpEqual, VT); 1409 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1410 return getNode(ISD::UNDEF, VT); 1411 // fall through 1412 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1413 R==APFloat::cmpEqual, VT); 1414 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1415 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1416 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1417 R==APFloat::cmpEqual, VT); 1418 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1419 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1420 R==APFloat::cmpLessThan, VT); 1421 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1422 R==APFloat::cmpUnordered, VT); 1423 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1424 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1425 } 1426 } else { 1427 // Ensure that the constant occurs on the RHS. 1428 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1429 } 1430 } 1431 1432 // Could not fold it. 1433 return SDValue(); 1434} 1435 1436/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1437/// use this predicate to simplify operations downstream. 1438bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1439 unsigned BitWidth = Op.getValueSizeInBits(); 1440 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1441} 1442 1443/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1444/// this predicate to simplify operations downstream. Mask is known to be zero 1445/// for bits that V cannot have. 1446bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1447 unsigned Depth) const { 1448 APInt KnownZero, KnownOne; 1449 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1450 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1451 return (KnownZero & Mask) == Mask; 1452} 1453 1454/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1455/// known to be either zero or one and return them in the KnownZero/KnownOne 1456/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1457/// processing. 1458void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1459 APInt &KnownZero, APInt &KnownOne, 1460 unsigned Depth) const { 1461 unsigned BitWidth = Mask.getBitWidth(); 1462 assert(BitWidth == Op.getValueType().getSizeInBits() && 1463 "Mask size mismatches value type size!"); 1464 1465 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1466 if (Depth == 6 || Mask == 0) 1467 return; // Limit search depth. 1468 1469 APInt KnownZero2, KnownOne2; 1470 1471 switch (Op.getOpcode()) { 1472 case ISD::Constant: 1473 // We know all of the bits for a constant! 1474 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1475 KnownZero = ~KnownOne & Mask; 1476 return; 1477 case ISD::AND: 1478 // If either the LHS or the RHS are Zero, the result is zero. 1479 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1480 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1481 KnownZero2, KnownOne2, Depth+1); 1482 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1483 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1484 1485 // Output known-1 bits are only known if set in both the LHS & RHS. 1486 KnownOne &= KnownOne2; 1487 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1488 KnownZero |= KnownZero2; 1489 return; 1490 case ISD::OR: 1491 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1492 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1493 KnownZero2, KnownOne2, Depth+1); 1494 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1495 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1496 1497 // Output known-0 bits are only known if clear in both the LHS & RHS. 1498 KnownZero &= KnownZero2; 1499 // Output known-1 are known to be set if set in either the LHS | RHS. 1500 KnownOne |= KnownOne2; 1501 return; 1502 case ISD::XOR: { 1503 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1504 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1505 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1506 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1507 1508 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1509 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1510 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1511 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1512 KnownZero = KnownZeroOut; 1513 return; 1514 } 1515 case ISD::MUL: { 1516 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1517 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1518 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1519 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1520 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1521 1522 // If low bits are zero in either operand, output low known-0 bits. 1523 // Also compute a conserative estimate for high known-0 bits. 1524 // More trickiness is possible, but this is sufficient for the 1525 // interesting case of alignment computation. 1526 KnownOne.clear(); 1527 unsigned TrailZ = KnownZero.countTrailingOnes() + 1528 KnownZero2.countTrailingOnes(); 1529 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1530 KnownZero2.countLeadingOnes(), 1531 BitWidth) - BitWidth; 1532 1533 TrailZ = std::min(TrailZ, BitWidth); 1534 LeadZ = std::min(LeadZ, BitWidth); 1535 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1536 APInt::getHighBitsSet(BitWidth, LeadZ); 1537 KnownZero &= Mask; 1538 return; 1539 } 1540 case ISD::UDIV: { 1541 // For the purposes of computing leading zeros we can conservatively 1542 // treat a udiv as a logical right shift by the power of 2 known to 1543 // be less than the denominator. 1544 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1545 ComputeMaskedBits(Op.getOperand(0), 1546 AllOnes, KnownZero2, KnownOne2, Depth+1); 1547 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1548 1549 KnownOne2.clear(); 1550 KnownZero2.clear(); 1551 ComputeMaskedBits(Op.getOperand(1), 1552 AllOnes, KnownZero2, KnownOne2, Depth+1); 1553 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1554 if (RHSUnknownLeadingOnes != BitWidth) 1555 LeadZ = std::min(BitWidth, 1556 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1557 1558 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1559 return; 1560 } 1561 case ISD::SELECT: 1562 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1563 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1564 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1565 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1566 1567 // Only known if known in both the LHS and RHS. 1568 KnownOne &= KnownOne2; 1569 KnownZero &= KnownZero2; 1570 return; 1571 case ISD::SELECT_CC: 1572 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1573 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1574 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1575 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1576 1577 // Only known if known in both the LHS and RHS. 1578 KnownOne &= KnownOne2; 1579 KnownZero &= KnownZero2; 1580 return; 1581 case ISD::SADDO: 1582 case ISD::UADDO: 1583 case ISD::SSUBO: 1584 case ISD::USUBO: 1585 case ISD::SMULO: 1586 case ISD::UMULO: 1587 if (Op.getResNo() != 1) 1588 return; 1589 // The boolean result conforms to getBooleanContents. Fall through. 1590 case ISD::SETCC: 1591 // If we know the result of a setcc has the top bits zero, use this info. 1592 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1593 BitWidth > 1) 1594 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1595 return; 1596 case ISD::SHL: 1597 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1598 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1599 unsigned ShAmt = SA->getZExtValue(); 1600 1601 // If the shift count is an invalid immediate, don't do anything. 1602 if (ShAmt >= BitWidth) 1603 return; 1604 1605 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1606 KnownZero, KnownOne, Depth+1); 1607 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1608 KnownZero <<= ShAmt; 1609 KnownOne <<= ShAmt; 1610 // low bits known zero. 1611 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1612 } 1613 return; 1614 case ISD::SRL: 1615 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1616 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1617 unsigned ShAmt = SA->getZExtValue(); 1618 1619 // If the shift count is an invalid immediate, don't do anything. 1620 if (ShAmt >= BitWidth) 1621 return; 1622 1623 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1624 KnownZero, KnownOne, Depth+1); 1625 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1626 KnownZero = KnownZero.lshr(ShAmt); 1627 KnownOne = KnownOne.lshr(ShAmt); 1628 1629 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1630 KnownZero |= HighBits; // High bits known zero. 1631 } 1632 return; 1633 case ISD::SRA: 1634 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1635 unsigned ShAmt = SA->getZExtValue(); 1636 1637 // If the shift count is an invalid immediate, don't do anything. 1638 if (ShAmt >= BitWidth) 1639 return; 1640 1641 APInt InDemandedMask = (Mask << ShAmt); 1642 // If any of the demanded bits are produced by the sign extension, we also 1643 // demand the input sign bit. 1644 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1645 if (HighBits.getBoolValue()) 1646 InDemandedMask |= APInt::getSignBit(BitWidth); 1647 1648 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1649 Depth+1); 1650 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1651 KnownZero = KnownZero.lshr(ShAmt); 1652 KnownOne = KnownOne.lshr(ShAmt); 1653 1654 // Handle the sign bits. 1655 APInt SignBit = APInt::getSignBit(BitWidth); 1656 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1657 1658 if (KnownZero.intersects(SignBit)) { 1659 KnownZero |= HighBits; // New bits are known zero. 1660 } else if (KnownOne.intersects(SignBit)) { 1661 KnownOne |= HighBits; // New bits are known one. 1662 } 1663 } 1664 return; 1665 case ISD::SIGN_EXTEND_INREG: { 1666 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1667 unsigned EBits = EVT.getSizeInBits(); 1668 1669 // Sign extension. Compute the demanded bits in the result that are not 1670 // present in the input. 1671 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1672 1673 APInt InSignBit = APInt::getSignBit(EBits); 1674 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1675 1676 // If the sign extended bits are demanded, we know that the sign 1677 // bit is demanded. 1678 InSignBit.zext(BitWidth); 1679 if (NewBits.getBoolValue()) 1680 InputDemandedBits |= InSignBit; 1681 1682 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1683 KnownZero, KnownOne, Depth+1); 1684 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1685 1686 // If the sign bit of the input is known set or clear, then we know the 1687 // top bits of the result. 1688 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1689 KnownZero |= NewBits; 1690 KnownOne &= ~NewBits; 1691 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1692 KnownOne |= NewBits; 1693 KnownZero &= ~NewBits; 1694 } else { // Input sign bit unknown 1695 KnownZero &= ~NewBits; 1696 KnownOne &= ~NewBits; 1697 } 1698 return; 1699 } 1700 case ISD::CTTZ: 1701 case ISD::CTLZ: 1702 case ISD::CTPOP: { 1703 unsigned LowBits = Log2_32(BitWidth)+1; 1704 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1705 KnownOne.clear(); 1706 return; 1707 } 1708 case ISD::LOAD: { 1709 if (ISD::isZEXTLoad(Op.getNode())) { 1710 LoadSDNode *LD = cast<LoadSDNode>(Op); 1711 MVT VT = LD->getMemoryVT(); 1712 unsigned MemBits = VT.getSizeInBits(); 1713 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1714 } 1715 return; 1716 } 1717 case ISD::ZERO_EXTEND: { 1718 MVT InVT = Op.getOperand(0).getValueType(); 1719 unsigned InBits = InVT.getSizeInBits(); 1720 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1721 APInt InMask = Mask; 1722 InMask.trunc(InBits); 1723 KnownZero.trunc(InBits); 1724 KnownOne.trunc(InBits); 1725 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1726 KnownZero.zext(BitWidth); 1727 KnownOne.zext(BitWidth); 1728 KnownZero |= NewBits; 1729 return; 1730 } 1731 case ISD::SIGN_EXTEND: { 1732 MVT InVT = Op.getOperand(0).getValueType(); 1733 unsigned InBits = InVT.getSizeInBits(); 1734 APInt InSignBit = APInt::getSignBit(InBits); 1735 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1736 APInt InMask = Mask; 1737 InMask.trunc(InBits); 1738 1739 // If any of the sign extended bits are demanded, we know that the sign 1740 // bit is demanded. Temporarily set this bit in the mask for our callee. 1741 if (NewBits.getBoolValue()) 1742 InMask |= InSignBit; 1743 1744 KnownZero.trunc(InBits); 1745 KnownOne.trunc(InBits); 1746 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1747 1748 // Note if the sign bit is known to be zero or one. 1749 bool SignBitKnownZero = KnownZero.isNegative(); 1750 bool SignBitKnownOne = KnownOne.isNegative(); 1751 assert(!(SignBitKnownZero && SignBitKnownOne) && 1752 "Sign bit can't be known to be both zero and one!"); 1753 1754 // If the sign bit wasn't actually demanded by our caller, we don't 1755 // want it set in the KnownZero and KnownOne result values. Reset the 1756 // mask and reapply it to the result values. 1757 InMask = Mask; 1758 InMask.trunc(InBits); 1759 KnownZero &= InMask; 1760 KnownOne &= InMask; 1761 1762 KnownZero.zext(BitWidth); 1763 KnownOne.zext(BitWidth); 1764 1765 // If the sign bit is known zero or one, the top bits match. 1766 if (SignBitKnownZero) 1767 KnownZero |= NewBits; 1768 else if (SignBitKnownOne) 1769 KnownOne |= NewBits; 1770 return; 1771 } 1772 case ISD::ANY_EXTEND: { 1773 MVT InVT = Op.getOperand(0).getValueType(); 1774 unsigned InBits = InVT.getSizeInBits(); 1775 APInt InMask = Mask; 1776 InMask.trunc(InBits); 1777 KnownZero.trunc(InBits); 1778 KnownOne.trunc(InBits); 1779 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1780 KnownZero.zext(BitWidth); 1781 KnownOne.zext(BitWidth); 1782 return; 1783 } 1784 case ISD::TRUNCATE: { 1785 MVT InVT = Op.getOperand(0).getValueType(); 1786 unsigned InBits = InVT.getSizeInBits(); 1787 APInt InMask = Mask; 1788 InMask.zext(InBits); 1789 KnownZero.zext(InBits); 1790 KnownOne.zext(InBits); 1791 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1792 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1793 KnownZero.trunc(BitWidth); 1794 KnownOne.trunc(BitWidth); 1795 break; 1796 } 1797 case ISD::AssertZext: { 1798 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1799 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1800 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1801 KnownOne, Depth+1); 1802 KnownZero |= (~InMask) & Mask; 1803 return; 1804 } 1805 case ISD::FGETSIGN: 1806 // All bits are zero except the low bit. 1807 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1808 return; 1809 1810 case ISD::SUB: { 1811 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1812 // We know that the top bits of C-X are clear if X contains less bits 1813 // than C (i.e. no wrap-around can happen). For example, 20-X is 1814 // positive if we can prove that X is >= 0 and < 16. 1815 if (CLHS->getAPIntValue().isNonNegative()) { 1816 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1817 // NLZ can't be BitWidth with no sign bit 1818 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1819 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1820 Depth+1); 1821 1822 // If all of the MaskV bits are known to be zero, then we know the 1823 // output top bits are zero, because we now know that the output is 1824 // from [0-C]. 1825 if ((KnownZero2 & MaskV) == MaskV) { 1826 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1827 // Top bits known zero. 1828 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1829 } 1830 } 1831 } 1832 } 1833 // fall through 1834 case ISD::ADD: { 1835 // Output known-0 bits are known if clear or set in both the low clear bits 1836 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1837 // low 3 bits clear. 1838 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1839 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1840 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1841 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1842 1843 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1844 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1845 KnownZeroOut = std::min(KnownZeroOut, 1846 KnownZero2.countTrailingOnes()); 1847 1848 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1849 return; 1850 } 1851 case ISD::SREM: 1852 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1853 const APInt &RA = Rem->getAPIntValue(); 1854 if (RA.isPowerOf2() || (-RA).isPowerOf2()) { 1855 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA; 1856 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1857 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1858 1859 // If the sign bit of the first operand is zero, the sign bit of 1860 // the result is zero. If the first operand has no one bits below 1861 // the second operand's single 1 bit, its sign will be zero. 1862 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1863 KnownZero2 |= ~LowBits; 1864 1865 KnownZero |= KnownZero2 & Mask; 1866 1867 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1868 } 1869 } 1870 return; 1871 case ISD::UREM: { 1872 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1873 const APInt &RA = Rem->getAPIntValue(); 1874 if (RA.isPowerOf2()) { 1875 APInt LowBits = (RA - 1); 1876 APInt Mask2 = LowBits & Mask; 1877 KnownZero |= ~LowBits & Mask; 1878 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1879 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1880 break; 1881 } 1882 } 1883 1884 // Since the result is less than or equal to either operand, any leading 1885 // zero bits in either operand must also exist in the result. 1886 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1887 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1888 Depth+1); 1889 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1890 Depth+1); 1891 1892 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1893 KnownZero2.countLeadingOnes()); 1894 KnownOne.clear(); 1895 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1896 return; 1897 } 1898 default: 1899 // Allow the target to implement this method for its nodes. 1900 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1901 case ISD::INTRINSIC_WO_CHAIN: 1902 case ISD::INTRINSIC_W_CHAIN: 1903 case ISD::INTRINSIC_VOID: 1904 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this); 1905 } 1906 return; 1907 } 1908} 1909 1910/// ComputeNumSignBits - Return the number of times the sign bit of the 1911/// register is replicated into the other bits. We know that at least 1 bit 1912/// is always equal to the sign bit (itself), but other cases can give us 1913/// information. For example, immediately after an "SRA X, 2", we know that 1914/// the top 3 bits are all equal to each other, so we return 3. 1915unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 1916 MVT VT = Op.getValueType(); 1917 assert(VT.isInteger() && "Invalid VT!"); 1918 unsigned VTBits = VT.getSizeInBits(); 1919 unsigned Tmp, Tmp2; 1920 unsigned FirstAnswer = 1; 1921 1922 if (Depth == 6) 1923 return 1; // Limit search depth. 1924 1925 switch (Op.getOpcode()) { 1926 default: break; 1927 case ISD::AssertSext: 1928 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1929 return VTBits-Tmp+1; 1930 case ISD::AssertZext: 1931 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1932 return VTBits-Tmp; 1933 1934 case ISD::Constant: { 1935 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 1936 // If negative, return # leading ones. 1937 if (Val.isNegative()) 1938 return Val.countLeadingOnes(); 1939 1940 // Return # leading zeros. 1941 return Val.countLeadingZeros(); 1942 } 1943 1944 case ISD::SIGN_EXTEND: 1945 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits(); 1946 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 1947 1948 case ISD::SIGN_EXTEND_INREG: 1949 // Max of the input and what this extends. 1950 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1951 Tmp = VTBits-Tmp+1; 1952 1953 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1954 return std::max(Tmp, Tmp2); 1955 1956 case ISD::SRA: 1957 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1958 // SRA X, C -> adds C sign bits. 1959 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1960 Tmp += C->getZExtValue(); 1961 if (Tmp > VTBits) Tmp = VTBits; 1962 } 1963 return Tmp; 1964 case ISD::SHL: 1965 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1966 // shl destroys sign bits. 1967 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1968 if (C->getZExtValue() >= VTBits || // Bad shift. 1969 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 1970 return Tmp - C->getZExtValue(); 1971 } 1972 break; 1973 case ISD::AND: 1974 case ISD::OR: 1975 case ISD::XOR: // NOT is handled here. 1976 // Logical binary ops preserve the number of sign bits at the worst. 1977 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1978 if (Tmp != 1) { 1979 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1980 FirstAnswer = std::min(Tmp, Tmp2); 1981 // We computed what we know about the sign bits as our first 1982 // answer. Now proceed to the generic code that uses 1983 // ComputeMaskedBits, and pick whichever answer is better. 1984 } 1985 break; 1986 1987 case ISD::SELECT: 1988 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1989 if (Tmp == 1) return 1; // Early out. 1990 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 1991 return std::min(Tmp, Tmp2); 1992 1993 case ISD::SADDO: 1994 case ISD::UADDO: 1995 case ISD::SSUBO: 1996 case ISD::USUBO: 1997 case ISD::SMULO: 1998 case ISD::UMULO: 1999 if (Op.getResNo() != 1) 2000 break; 2001 // The boolean result conforms to getBooleanContents. Fall through. 2002 case ISD::SETCC: 2003 // If setcc returns 0/-1, all bits are sign bits. 2004 if (TLI.getBooleanContents() == 2005 TargetLowering::ZeroOrNegativeOneBooleanContent) 2006 return VTBits; 2007 break; 2008 case ISD::ROTL: 2009 case ISD::ROTR: 2010 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2011 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2012 2013 // Handle rotate right by N like a rotate left by 32-N. 2014 if (Op.getOpcode() == ISD::ROTR) 2015 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2016 2017 // If we aren't rotating out all of the known-in sign bits, return the 2018 // number that are left. This handles rotl(sext(x), 1) for example. 2019 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2020 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2021 } 2022 break; 2023 case ISD::ADD: 2024 // Add can have at most one carry bit. Thus we know that the output 2025 // is, at worst, one more bit than the inputs. 2026 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2027 if (Tmp == 1) return 1; // Early out. 2028 2029 // Special case decrementing a value (ADD X, -1): 2030 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2031 if (CRHS->isAllOnesValue()) { 2032 APInt KnownZero, KnownOne; 2033 APInt Mask = APInt::getAllOnesValue(VTBits); 2034 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2035 2036 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2037 // sign bits set. 2038 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2039 return VTBits; 2040 2041 // If we are subtracting one from a positive number, there is no carry 2042 // out of the result. 2043 if (KnownZero.isNegative()) 2044 return Tmp; 2045 } 2046 2047 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2048 if (Tmp2 == 1) return 1; 2049 return std::min(Tmp, Tmp2)-1; 2050 break; 2051 2052 case ISD::SUB: 2053 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2054 if (Tmp2 == 1) return 1; 2055 2056 // Handle NEG. 2057 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2058 if (CLHS->isNullValue()) { 2059 APInt KnownZero, KnownOne; 2060 APInt Mask = APInt::getAllOnesValue(VTBits); 2061 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2062 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2063 // sign bits set. 2064 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2065 return VTBits; 2066 2067 // If the input is known to be positive (the sign bit is known clear), 2068 // the output of the NEG has the same number of sign bits as the input. 2069 if (KnownZero.isNegative()) 2070 return Tmp2; 2071 2072 // Otherwise, we treat this like a SUB. 2073 } 2074 2075 // Sub can have at most one carry bit. Thus we know that the output 2076 // is, at worst, one more bit than the inputs. 2077 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2078 if (Tmp == 1) return 1; // Early out. 2079 return std::min(Tmp, Tmp2)-1; 2080 break; 2081 case ISD::TRUNCATE: 2082 // FIXME: it's tricky to do anything useful for this, but it is an important 2083 // case for targets like X86. 2084 break; 2085 } 2086 2087 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2088 if (Op.getOpcode() == ISD::LOAD) { 2089 LoadSDNode *LD = cast<LoadSDNode>(Op); 2090 unsigned ExtType = LD->getExtensionType(); 2091 switch (ExtType) { 2092 default: break; 2093 case ISD::SEXTLOAD: // '17' bits known 2094 Tmp = LD->getMemoryVT().getSizeInBits(); 2095 return VTBits-Tmp+1; 2096 case ISD::ZEXTLOAD: // '16' bits known 2097 Tmp = LD->getMemoryVT().getSizeInBits(); 2098 return VTBits-Tmp; 2099 } 2100 } 2101 2102 // Allow the target to implement this method for its nodes. 2103 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2104 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2105 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2106 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2107 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2108 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2109 } 2110 2111 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2112 // use this information. 2113 APInt KnownZero, KnownOne; 2114 APInt Mask = APInt::getAllOnesValue(VTBits); 2115 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2116 2117 if (KnownZero.isNegative()) { // sign bit is 0 2118 Mask = KnownZero; 2119 } else if (KnownOne.isNegative()) { // sign bit is 1; 2120 Mask = KnownOne; 2121 } else { 2122 // Nothing known. 2123 return FirstAnswer; 2124 } 2125 2126 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2127 // the number of identical bits in the top of the input value. 2128 Mask = ~Mask; 2129 Mask <<= Mask.getBitWidth()-VTBits; 2130 // Return # leading zeros. We use 'min' here in case Val was zero before 2131 // shifting. We don't want to return '64' as for an i32 "0". 2132 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2133} 2134 2135 2136bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2137 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2138 if (!GA) return false; 2139 if (GA->getOffset() != 0) return false; 2140 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2141 if (!GV) return false; 2142 MachineModuleInfo *MMI = getMachineModuleInfo(); 2143 return MMI && MMI->hasDebugInfo(); 2144} 2145 2146 2147/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2148/// element of the result of the vector shuffle. 2149SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) { 2150 MVT VT = N->getValueType(0); 2151 SDValue PermMask = N->getOperand(2); 2152 SDValue Idx = PermMask.getOperand(i); 2153 if (Idx.getOpcode() == ISD::UNDEF) 2154 return getNode(ISD::UNDEF, VT.getVectorElementType()); 2155 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue(); 2156 unsigned NumElems = PermMask.getNumOperands(); 2157 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2158 Index %= NumElems; 2159 2160 if (V.getOpcode() == ISD::BIT_CONVERT) { 2161 V = V.getOperand(0); 2162 MVT VVT = V.getValueType(); 2163 if (!VVT.isVector() || VVT.getVectorNumElements() != NumElems) 2164 return SDValue(); 2165 } 2166 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2167 return (Index == 0) ? V.getOperand(0) 2168 : getNode(ISD::UNDEF, VT.getVectorElementType()); 2169 if (V.getOpcode() == ISD::BUILD_VECTOR) 2170 return V.getOperand(Index); 2171 if (V.getOpcode() == ISD::VECTOR_SHUFFLE) 2172 return getShuffleScalarElt(V.getNode(), Index); 2173 return SDValue(); 2174} 2175 2176 2177/// getNode - Gets or creates the specified node. 2178/// 2179SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) { 2180 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT); 2181} 2182 2183SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT) { 2184 FoldingSetNodeID ID; 2185 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2186 void *IP = 0; 2187 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2188 return SDValue(E, 0); 2189 SDNode *N = NodeAllocator.Allocate<SDNode>(); 2190 new (N) SDNode(Opcode, DL, SDNode::getSDVTList(VT)); 2191 CSEMap.InsertNode(N, IP); 2192 2193 AllNodes.push_back(N); 2194#ifndef NDEBUG 2195 VerifyNode(N); 2196#endif 2197 return SDValue(N, 0); 2198} 2199 2200SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { 2201 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Operand); 2202} 2203 2204SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2205 MVT VT, SDValue Operand) { 2206 // Constant fold unary operations with an integer constant operand. 2207 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2208 const APInt &Val = C->getAPIntValue(); 2209 unsigned BitWidth = VT.getSizeInBits(); 2210 switch (Opcode) { 2211 default: break; 2212 case ISD::SIGN_EXTEND: 2213 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 2214 case ISD::ANY_EXTEND: 2215 case ISD::ZERO_EXTEND: 2216 case ISD::TRUNCATE: 2217 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 2218 case ISD::UINT_TO_FP: 2219 case ISD::SINT_TO_FP: { 2220 const uint64_t zero[] = {0, 0}; 2221 // No compile time operations on this type. 2222 if (VT==MVT::ppcf128) 2223 break; 2224 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 2225 (void)apf.convertFromAPInt(Val, 2226 Opcode==ISD::SINT_TO_FP, 2227 APFloat::rmNearestTiesToEven); 2228 return getConstantFP(apf, VT); 2229 } 2230 case ISD::BIT_CONVERT: 2231 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2232 return getConstantFP(Val.bitsToFloat(), VT); 2233 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2234 return getConstantFP(Val.bitsToDouble(), VT); 2235 break; 2236 case ISD::BSWAP: 2237 return getConstant(Val.byteSwap(), VT); 2238 case ISD::CTPOP: 2239 return getConstant(Val.countPopulation(), VT); 2240 case ISD::CTLZ: 2241 return getConstant(Val.countLeadingZeros(), VT); 2242 case ISD::CTTZ: 2243 return getConstant(Val.countTrailingZeros(), VT); 2244 } 2245 } 2246 2247 // Constant fold unary operations with a floating point constant operand. 2248 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2249 APFloat V = C->getValueAPF(); // make copy 2250 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2251 switch (Opcode) { 2252 case ISD::FNEG: 2253 V.changeSign(); 2254 return getConstantFP(V, VT); 2255 case ISD::FABS: 2256 V.clearSign(); 2257 return getConstantFP(V, VT); 2258 case ISD::FP_ROUND: 2259 case ISD::FP_EXTEND: { 2260 bool ignored; 2261 // This can return overflow, underflow, or inexact; we don't care. 2262 // FIXME need to be more flexible about rounding mode. 2263 (void)V.convert(*MVTToAPFloatSemantics(VT), 2264 APFloat::rmNearestTiesToEven, &ignored); 2265 return getConstantFP(V, VT); 2266 } 2267 case ISD::FP_TO_SINT: 2268 case ISD::FP_TO_UINT: { 2269 integerPart x; 2270 bool ignored; 2271 assert(integerPartWidth >= 64); 2272 // FIXME need to be more flexible about rounding mode. 2273 APFloat::opStatus s = V.convertToInteger(&x, 64U, 2274 Opcode==ISD::FP_TO_SINT, 2275 APFloat::rmTowardZero, &ignored); 2276 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2277 break; 2278 return getConstant(x, VT); 2279 } 2280 case ISD::BIT_CONVERT: 2281 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2282 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2283 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2284 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2285 break; 2286 } 2287 } 2288 } 2289 2290 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2291 switch (Opcode) { 2292 case ISD::TokenFactor: 2293 case ISD::MERGE_VALUES: 2294 case ISD::CONCAT_VECTORS: 2295 return Operand; // Factor, merge or concat of one node? No need. 2296 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node"); 2297 case ISD::FP_EXTEND: 2298 assert(VT.isFloatingPoint() && 2299 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2300 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2301 if (Operand.getOpcode() == ISD::UNDEF) 2302 return getNode(ISD::UNDEF, VT); 2303 break; 2304 case ISD::SIGN_EXTEND: 2305 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2306 "Invalid SIGN_EXTEND!"); 2307 if (Operand.getValueType() == VT) return Operand; // noop extension 2308 assert(Operand.getValueType().bitsLT(VT) 2309 && "Invalid sext node, dst < src!"); 2310 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2311 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2312 break; 2313 case ISD::ZERO_EXTEND: 2314 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2315 "Invalid ZERO_EXTEND!"); 2316 if (Operand.getValueType() == VT) return Operand; // noop extension 2317 assert(Operand.getValueType().bitsLT(VT) 2318 && "Invalid zext node, dst < src!"); 2319 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2320 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0)); 2321 break; 2322 case ISD::ANY_EXTEND: 2323 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2324 "Invalid ANY_EXTEND!"); 2325 if (Operand.getValueType() == VT) return Operand; // noop extension 2326 assert(Operand.getValueType().bitsLT(VT) 2327 && "Invalid anyext node, dst < src!"); 2328 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2329 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2330 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2331 break; 2332 case ISD::TRUNCATE: 2333 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2334 "Invalid TRUNCATE!"); 2335 if (Operand.getValueType() == VT) return Operand; // noop truncate 2336 assert(Operand.getValueType().bitsGT(VT) 2337 && "Invalid truncate node, src < dst!"); 2338 if (OpOpcode == ISD::TRUNCATE) 2339 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); 2340 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2341 OpOpcode == ISD::ANY_EXTEND) { 2342 // If the source is smaller than the dest, we still need an extend. 2343 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT)) 2344 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2345 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2346 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); 2347 else 2348 return Operand.getNode()->getOperand(0); 2349 } 2350 break; 2351 case ISD::BIT_CONVERT: 2352 // Basic sanity checking. 2353 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2354 && "Cannot BIT_CONVERT between types of different sizes!"); 2355 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2356 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2357 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0)); 2358 if (OpOpcode == ISD::UNDEF) 2359 return getNode(ISD::UNDEF, VT); 2360 break; 2361 case ISD::SCALAR_TO_VECTOR: 2362 assert(VT.isVector() && !Operand.getValueType().isVector() && 2363 VT.getVectorElementType() == Operand.getValueType() && 2364 "Illegal SCALAR_TO_VECTOR node!"); 2365 if (OpOpcode == ISD::UNDEF) 2366 return getNode(ISD::UNDEF, VT); 2367 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2368 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2369 isa<ConstantSDNode>(Operand.getOperand(1)) && 2370 Operand.getConstantOperandVal(1) == 0 && 2371 Operand.getOperand(0).getValueType() == VT) 2372 return Operand.getOperand(0); 2373 break; 2374 case ISD::FNEG: 2375 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X) 2376 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1), 2377 Operand.getNode()->getOperand(0)); 2378 if (OpOpcode == ISD::FNEG) // --X -> X 2379 return Operand.getNode()->getOperand(0); 2380 break; 2381 case ISD::FABS: 2382 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2383 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0)); 2384 break; 2385 } 2386 2387 SDNode *N; 2388 SDVTList VTs = getVTList(VT); 2389 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2390 FoldingSetNodeID ID; 2391 SDValue Ops[1] = { Operand }; 2392 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2393 void *IP = 0; 2394 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2395 return SDValue(E, 0); 2396 N = NodeAllocator.Allocate<UnarySDNode>(); 2397 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2398 CSEMap.InsertNode(N, IP); 2399 } else { 2400 N = NodeAllocator.Allocate<UnarySDNode>(); 2401 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2402 } 2403 2404 AllNodes.push_back(N); 2405#ifndef NDEBUG 2406 VerifyNode(N); 2407#endif 2408 return SDValue(N, 0); 2409} 2410 2411SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2412 MVT VT, 2413 ConstantSDNode *Cst1, 2414 ConstantSDNode *Cst2) { 2415 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2416 2417 switch (Opcode) { 2418 case ISD::ADD: return getConstant(C1 + C2, VT); 2419 case ISD::SUB: return getConstant(C1 - C2, VT); 2420 case ISD::MUL: return getConstant(C1 * C2, VT); 2421 case ISD::UDIV: 2422 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2423 break; 2424 case ISD::UREM: 2425 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2426 break; 2427 case ISD::SDIV: 2428 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2429 break; 2430 case ISD::SREM: 2431 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2432 break; 2433 case ISD::AND: return getConstant(C1 & C2, VT); 2434 case ISD::OR: return getConstant(C1 | C2, VT); 2435 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2436 case ISD::SHL: return getConstant(C1 << C2, VT); 2437 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2438 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2439 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2440 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2441 default: break; 2442 } 2443 2444 return SDValue(); 2445} 2446 2447SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2448 SDValue N1, SDValue N2) { 2449 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2); 2450} 2451 2452SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 2453 SDValue N1, SDValue N2) { 2454 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2455 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2456 switch (Opcode) { 2457 default: break; 2458 case ISD::TokenFactor: 2459 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2460 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2461 // Fold trivial token factors. 2462 if (N1.getOpcode() == ISD::EntryToken) return N2; 2463 if (N2.getOpcode() == ISD::EntryToken) return N1; 2464 if (N1 == N2) return N1; 2465 break; 2466 case ISD::CONCAT_VECTORS: 2467 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2468 // one big BUILD_VECTOR. 2469 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2470 N2.getOpcode() == ISD::BUILD_VECTOR) { 2471 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2472 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2473 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2474 } 2475 break; 2476 case ISD::AND: 2477 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2478 N1.getValueType() == VT && "Binary operator types must match!"); 2479 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2480 // worth handling here. 2481 if (N2C && N2C->isNullValue()) 2482 return N2; 2483 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2484 return N1; 2485 break; 2486 case ISD::OR: 2487 case ISD::XOR: 2488 case ISD::ADD: 2489 case ISD::SUB: 2490 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2491 N1.getValueType() == VT && "Binary operator types must match!"); 2492 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2493 // it's worth handling here. 2494 if (N2C && N2C->isNullValue()) 2495 return N1; 2496 break; 2497 case ISD::UDIV: 2498 case ISD::UREM: 2499 case ISD::MULHU: 2500 case ISD::MULHS: 2501 case ISD::MUL: 2502 case ISD::SDIV: 2503 case ISD::SREM: 2504 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2505 // fall through 2506 case ISD::FADD: 2507 case ISD::FSUB: 2508 case ISD::FMUL: 2509 case ISD::FDIV: 2510 case ISD::FREM: 2511 if (UnsafeFPMath) { 2512 if (Opcode == ISD::FADD) { 2513 // 0+x --> x 2514 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2515 if (CFP->getValueAPF().isZero()) 2516 return N2; 2517 // x+0 --> x 2518 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2519 if (CFP->getValueAPF().isZero()) 2520 return N1; 2521 } else if (Opcode == ISD::FSUB) { 2522 // x-0 --> x 2523 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2524 if (CFP->getValueAPF().isZero()) 2525 return N1; 2526 } 2527 } 2528 assert(N1.getValueType() == N2.getValueType() && 2529 N1.getValueType() == VT && "Binary operator types must match!"); 2530 break; 2531 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2532 assert(N1.getValueType() == VT && 2533 N1.getValueType().isFloatingPoint() && 2534 N2.getValueType().isFloatingPoint() && 2535 "Invalid FCOPYSIGN!"); 2536 break; 2537 case ISD::SHL: 2538 case ISD::SRA: 2539 case ISD::SRL: 2540 case ISD::ROTL: 2541 case ISD::ROTR: 2542 assert(VT == N1.getValueType() && 2543 "Shift operators return type must be the same as their first arg"); 2544 assert(VT.isInteger() && N2.getValueType().isInteger() && 2545 "Shifts only work on integers"); 2546 assert((N2.getValueType() == TLI.getShiftAmountTy() || 2547 (N2.getValueType().isVector() && N2.getValueType().isInteger())) && 2548 "Wrong type for shift amount"); 2549 2550 // Always fold shifts of i1 values so the code generator doesn't need to 2551 // handle them. Since we know the size of the shift has to be less than the 2552 // size of the value, the shift/rotate count is guaranteed to be zero. 2553 if (VT == MVT::i1) 2554 return N1; 2555 break; 2556 case ISD::FP_ROUND_INREG: { 2557 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2558 assert(VT == N1.getValueType() && "Not an inreg round!"); 2559 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2560 "Cannot FP_ROUND_INREG integer types"); 2561 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2562 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2563 break; 2564 } 2565 case ISD::FP_ROUND: 2566 assert(VT.isFloatingPoint() && 2567 N1.getValueType().isFloatingPoint() && 2568 VT.bitsLE(N1.getValueType()) && 2569 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2570 if (N1.getValueType() == VT) return N1; // noop conversion. 2571 break; 2572 case ISD::AssertSext: 2573 case ISD::AssertZext: { 2574 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2575 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2576 assert(VT.isInteger() && EVT.isInteger() && 2577 "Cannot *_EXTEND_INREG FP types"); 2578 assert(EVT.bitsLE(VT) && "Not extending!"); 2579 if (VT == EVT) return N1; // noop assertion. 2580 break; 2581 } 2582 case ISD::SIGN_EXTEND_INREG: { 2583 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2584 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2585 assert(VT.isInteger() && EVT.isInteger() && 2586 "Cannot *_EXTEND_INREG FP types"); 2587 assert(EVT.bitsLE(VT) && "Not extending!"); 2588 if (EVT == VT) return N1; // Not actually extending 2589 2590 if (N1C) { 2591 APInt Val = N1C->getAPIntValue(); 2592 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits(); 2593 Val <<= Val.getBitWidth()-FromBits; 2594 Val = Val.ashr(Val.getBitWidth()-FromBits); 2595 return getConstant(Val, VT); 2596 } 2597 break; 2598 } 2599 case ISD::EXTRACT_VECTOR_ELT: 2600 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2601 if (N1.getOpcode() == ISD::UNDEF) 2602 return getNode(ISD::UNDEF, VT); 2603 2604 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2605 // expanding copies of large vectors from registers. 2606 if (N2C && 2607 N1.getOpcode() == ISD::CONCAT_VECTORS && 2608 N1.getNumOperands() > 0) { 2609 unsigned Factor = 2610 N1.getOperand(0).getValueType().getVectorNumElements(); 2611 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, 2612 N1.getOperand(N2C->getZExtValue() / Factor), 2613 getConstant(N2C->getZExtValue() % Factor, 2614 N2.getValueType())); 2615 } 2616 2617 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2618 // expanding large vector constants. 2619 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) 2620 return N1.getOperand(N2C->getZExtValue()); 2621 2622 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2623 // operations are lowered to scalars. 2624 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2625 // If the indices are the same, return the inserted element. 2626 if (N1.getOperand(2) == N2) 2627 return N1.getOperand(1); 2628 // If the indices are known different, extract the element from 2629 // the original vector. 2630 else if (isa<ConstantSDNode>(N1.getOperand(2)) && 2631 isa<ConstantSDNode>(N2)) 2632 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2); 2633 } 2634 break; 2635 case ISD::EXTRACT_ELEMENT: 2636 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2637 assert(!N1.getValueType().isVector() && !VT.isVector() && 2638 (N1.getValueType().isInteger() == VT.isInteger()) && 2639 "Wrong types for EXTRACT_ELEMENT!"); 2640 2641 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2642 // 64-bit integers into 32-bit parts. Instead of building the extract of 2643 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2644 if (N1.getOpcode() == ISD::BUILD_PAIR) 2645 return N1.getOperand(N2C->getZExtValue()); 2646 2647 // EXTRACT_ELEMENT of a constant int is also very common. 2648 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2649 unsigned ElementSize = VT.getSizeInBits(); 2650 unsigned Shift = ElementSize * N2C->getZExtValue(); 2651 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2652 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2653 } 2654 break; 2655 case ISD::EXTRACT_SUBVECTOR: 2656 if (N1.getValueType() == VT) // Trivial extraction. 2657 return N1; 2658 break; 2659 } 2660 2661 if (N1C) { 2662 if (N2C) { 2663 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2664 if (SV.getNode()) return SV; 2665 } else { // Cannonicalize constant to RHS if commutative 2666 if (isCommutativeBinOp(Opcode)) { 2667 std::swap(N1C, N2C); 2668 std::swap(N1, N2); 2669 } 2670 } 2671 } 2672 2673 // Constant fold FP operations. 2674 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2675 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2676 if (N1CFP) { 2677 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2678 // Cannonicalize constant to RHS if commutative 2679 std::swap(N1CFP, N2CFP); 2680 std::swap(N1, N2); 2681 } else if (N2CFP && VT != MVT::ppcf128) { 2682 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2683 APFloat::opStatus s; 2684 switch (Opcode) { 2685 case ISD::FADD: 2686 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2687 if (s != APFloat::opInvalidOp) 2688 return getConstantFP(V1, VT); 2689 break; 2690 case ISD::FSUB: 2691 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2692 if (s!=APFloat::opInvalidOp) 2693 return getConstantFP(V1, VT); 2694 break; 2695 case ISD::FMUL: 2696 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2697 if (s!=APFloat::opInvalidOp) 2698 return getConstantFP(V1, VT); 2699 break; 2700 case ISD::FDIV: 2701 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2702 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2703 return getConstantFP(V1, VT); 2704 break; 2705 case ISD::FREM : 2706 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2707 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2708 return getConstantFP(V1, VT); 2709 break; 2710 case ISD::FCOPYSIGN: 2711 V1.copySign(V2); 2712 return getConstantFP(V1, VT); 2713 default: break; 2714 } 2715 } 2716 } 2717 2718 // Canonicalize an UNDEF to the RHS, even over a constant. 2719 if (N1.getOpcode() == ISD::UNDEF) { 2720 if (isCommutativeBinOp(Opcode)) { 2721 std::swap(N1, N2); 2722 } else { 2723 switch (Opcode) { 2724 case ISD::FP_ROUND_INREG: 2725 case ISD::SIGN_EXTEND_INREG: 2726 case ISD::SUB: 2727 case ISD::FSUB: 2728 case ISD::FDIV: 2729 case ISD::FREM: 2730 case ISD::SRA: 2731 return N1; // fold op(undef, arg2) -> undef 2732 case ISD::UDIV: 2733 case ISD::SDIV: 2734 case ISD::UREM: 2735 case ISD::SREM: 2736 case ISD::SRL: 2737 case ISD::SHL: 2738 if (!VT.isVector()) 2739 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2740 // For vectors, we can't easily build an all zero vector, just return 2741 // the LHS. 2742 return N2; 2743 } 2744 } 2745 } 2746 2747 // Fold a bunch of operators when the RHS is undef. 2748 if (N2.getOpcode() == ISD::UNDEF) { 2749 switch (Opcode) { 2750 case ISD::XOR: 2751 if (N1.getOpcode() == ISD::UNDEF) 2752 // Handle undef ^ undef -> 0 special case. This is a common 2753 // idiom (misuse). 2754 return getConstant(0, VT); 2755 // fallthrough 2756 case ISD::ADD: 2757 case ISD::ADDC: 2758 case ISD::ADDE: 2759 case ISD::SUB: 2760 case ISD::FADD: 2761 case ISD::FSUB: 2762 case ISD::FMUL: 2763 case ISD::FDIV: 2764 case ISD::FREM: 2765 case ISD::UDIV: 2766 case ISD::SDIV: 2767 case ISD::UREM: 2768 case ISD::SREM: 2769 return N2; // fold op(arg1, undef) -> undef 2770 case ISD::MUL: 2771 case ISD::AND: 2772 case ISD::SRL: 2773 case ISD::SHL: 2774 if (!VT.isVector()) 2775 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2776 // For vectors, we can't easily build an all zero vector, just return 2777 // the LHS. 2778 return N1; 2779 case ISD::OR: 2780 if (!VT.isVector()) 2781 return getConstant(VT.getIntegerVTBitMask(), VT); 2782 // For vectors, we can't easily build an all one vector, just return 2783 // the LHS. 2784 return N1; 2785 case ISD::SRA: 2786 return N1; 2787 } 2788 } 2789 2790 // Memoize this node if possible. 2791 SDNode *N; 2792 SDVTList VTs = getVTList(VT); 2793 if (VT != MVT::Flag) { 2794 SDValue Ops[] = { N1, N2 }; 2795 FoldingSetNodeID ID; 2796 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2797 void *IP = 0; 2798 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2799 return SDValue(E, 0); 2800 N = NodeAllocator.Allocate<BinarySDNode>(); 2801 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2802 CSEMap.InsertNode(N, IP); 2803 } else { 2804 N = NodeAllocator.Allocate<BinarySDNode>(); 2805 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2806 } 2807 2808 AllNodes.push_back(N); 2809#ifndef NDEBUG 2810 VerifyNode(N); 2811#endif 2812 return SDValue(N, 0); 2813} 2814 2815SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2816 SDValue N1, SDValue N2, SDValue N3) { 2817 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3); 2818} 2819 2820SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 2821 SDValue N1, SDValue N2, SDValue N3) { 2822 // Perform various simplifications. 2823 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2824 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2825 switch (Opcode) { 2826 case ISD::CONCAT_VECTORS: 2827 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2828 // one big BUILD_VECTOR. 2829 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2830 N2.getOpcode() == ISD::BUILD_VECTOR && 2831 N3.getOpcode() == ISD::BUILD_VECTOR) { 2832 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2833 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2834 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2835 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2836 } 2837 break; 2838 case ISD::SETCC: { 2839 // Use FoldSetCC to simplify SETCC's. 2840 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 2841 if (Simp.getNode()) return Simp; 2842 break; 2843 } 2844 case ISD::SELECT: 2845 if (N1C) { 2846 if (N1C->getZExtValue()) 2847 return N2; // select true, X, Y -> X 2848 else 2849 return N3; // select false, X, Y -> Y 2850 } 2851 2852 if (N2 == N3) return N2; // select C, X, X -> X 2853 break; 2854 case ISD::BRCOND: 2855 if (N2C) { 2856 if (N2C->getZExtValue()) // Unconditional branch 2857 return getNode(ISD::BR, MVT::Other, N1, N3); 2858 else 2859 return N1; // Never-taken branch 2860 } 2861 break; 2862 case ISD::VECTOR_SHUFFLE: 2863 assert(N1.getValueType() == N2.getValueType() && 2864 N1.getValueType().isVector() && 2865 VT.isVector() && N3.getValueType().isVector() && 2866 N3.getOpcode() == ISD::BUILD_VECTOR && 2867 VT.getVectorNumElements() == N3.getNumOperands() && 2868 "Illegal VECTOR_SHUFFLE node!"); 2869 break; 2870 case ISD::BIT_CONVERT: 2871 // Fold bit_convert nodes from a type to themselves. 2872 if (N1.getValueType() == VT) 2873 return N1; 2874 break; 2875 } 2876 2877 // Memoize node if it doesn't produce a flag. 2878 SDNode *N; 2879 SDVTList VTs = getVTList(VT); 2880 if (VT != MVT::Flag) { 2881 SDValue Ops[] = { N1, N2, N3 }; 2882 FoldingSetNodeID ID; 2883 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 2884 void *IP = 0; 2885 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2886 return SDValue(E, 0); 2887 N = NodeAllocator.Allocate<TernarySDNode>(); 2888 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 2889 CSEMap.InsertNode(N, IP); 2890 } else { 2891 N = NodeAllocator.Allocate<TernarySDNode>(); 2892 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 2893 } 2894 AllNodes.push_back(N); 2895#ifndef NDEBUG 2896 VerifyNode(N); 2897#endif 2898 return SDValue(N, 0); 2899} 2900 2901SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2902 SDValue N1, SDValue N2, SDValue N3, 2903 SDValue N4) { 2904 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4); 2905} 2906 2907SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 2908 SDValue N1, SDValue N2, SDValue N3, 2909 SDValue N4) { 2910 SDValue Ops[] = { N1, N2, N3, N4 }; 2911 return getNode(Opcode, DL, VT, Ops, 4); 2912} 2913 2914SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2915 SDValue N1, SDValue N2, SDValue N3, 2916 SDValue N4, SDValue N5) { 2917 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4, N5); 2918} 2919 2920SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 2921 SDValue N1, SDValue N2, SDValue N3, 2922 SDValue N4, SDValue N5) { 2923 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 2924 return getNode(Opcode, DL, VT, Ops, 5); 2925} 2926 2927/// getMemsetValue - Vectorized representation of the memset value 2928/// operand. 2929static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) { 2930 unsigned NumBits = VT.isVector() ? 2931 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 2932 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 2933 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 2934 unsigned Shift = 8; 2935 for (unsigned i = NumBits; i > 8; i >>= 1) { 2936 Val = (Val << Shift) | Val; 2937 Shift <<= 1; 2938 } 2939 if (VT.isInteger()) 2940 return DAG.getConstant(Val, VT); 2941 return DAG.getConstantFP(APFloat(Val), VT); 2942 } 2943 2944 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2945 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value); 2946 unsigned Shift = 8; 2947 for (unsigned i = NumBits; i > 8; i >>= 1) { 2948 Value = DAG.getNode(ISD::OR, VT, 2949 DAG.getNode(ISD::SHL, VT, Value, 2950 DAG.getConstant(Shift, 2951 TLI.getShiftAmountTy())), 2952 Value); 2953 Shift <<= 1; 2954 } 2955 2956 return Value; 2957} 2958 2959/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 2960/// used when a memcpy is turned into a memset when the source is a constant 2961/// string ptr. 2962static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG, 2963 const TargetLowering &TLI, 2964 std::string &Str, unsigned Offset) { 2965 // Handle vector with all elements zero. 2966 if (Str.empty()) { 2967 if (VT.isInteger()) 2968 return DAG.getConstant(0, VT); 2969 unsigned NumElts = VT.getVectorNumElements(); 2970 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 2971 return DAG.getNode(ISD::BIT_CONVERT, VT, 2972 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts))); 2973 } 2974 2975 assert(!VT.isVector() && "Can't handle vector type here!"); 2976 unsigned NumBits = VT.getSizeInBits(); 2977 unsigned MSB = NumBits / 8; 2978 uint64_t Val = 0; 2979 if (TLI.isLittleEndian()) 2980 Offset = Offset + MSB - 1; 2981 for (unsigned i = 0; i != MSB; ++i) { 2982 Val = (Val << 8) | (unsigned char)Str[Offset]; 2983 Offset += TLI.isLittleEndian() ? -1 : 1; 2984 } 2985 return DAG.getConstant(Val, VT); 2986} 2987 2988/// getMemBasePlusOffset - Returns base and offset node for the 2989/// 2990static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 2991 SelectionDAG &DAG) { 2992 MVT VT = Base.getValueType(); 2993 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT)); 2994} 2995 2996/// isMemSrcFromString - Returns true if memcpy source is a string constant. 2997/// 2998static bool isMemSrcFromString(SDValue Src, std::string &Str) { 2999 unsigned SrcDelta = 0; 3000 GlobalAddressSDNode *G = NULL; 3001 if (Src.getOpcode() == ISD::GlobalAddress) 3002 G = cast<GlobalAddressSDNode>(Src); 3003 else if (Src.getOpcode() == ISD::ADD && 3004 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3005 Src.getOperand(1).getOpcode() == ISD::Constant) { 3006 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3007 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3008 } 3009 if (!G) 3010 return false; 3011 3012 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3013 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3014 return true; 3015 3016 return false; 3017} 3018 3019/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 3020/// to replace the memset / memcpy is below the threshold. It also returns the 3021/// types of the sequence of memory ops to perform memset / memcpy. 3022static 3023bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps, 3024 SDValue Dst, SDValue Src, 3025 unsigned Limit, uint64_t Size, unsigned &Align, 3026 std::string &Str, bool &isSrcStr, 3027 SelectionDAG &DAG, 3028 const TargetLowering &TLI) { 3029 isSrcStr = isMemSrcFromString(Src, Str); 3030 bool isSrcConst = isa<ConstantSDNode>(Src); 3031 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(); 3032 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr); 3033 if (VT != MVT::iAny) { 3034 unsigned NewAlign = (unsigned) 3035 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT()); 3036 // If source is a string constant, this will require an unaligned load. 3037 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 3038 if (Dst.getOpcode() != ISD::FrameIndex) { 3039 // Can't change destination alignment. It requires a unaligned store. 3040 if (AllowUnalign) 3041 VT = MVT::iAny; 3042 } else { 3043 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 3044 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3045 if (MFI->isFixedObjectIndex(FI)) { 3046 // Can't change destination alignment. It requires a unaligned store. 3047 if (AllowUnalign) 3048 VT = MVT::iAny; 3049 } else { 3050 // Give the stack frame object a larger alignment if needed. 3051 if (MFI->getObjectAlignment(FI) < NewAlign) 3052 MFI->setObjectAlignment(FI, NewAlign); 3053 Align = NewAlign; 3054 } 3055 } 3056 } 3057 } 3058 3059 if (VT == MVT::iAny) { 3060 if (AllowUnalign) { 3061 VT = MVT::i64; 3062 } else { 3063 switch (Align & 7) { 3064 case 0: VT = MVT::i64; break; 3065 case 4: VT = MVT::i32; break; 3066 case 2: VT = MVT::i16; break; 3067 default: VT = MVT::i8; break; 3068 } 3069 } 3070 3071 MVT LVT = MVT::i64; 3072 while (!TLI.isTypeLegal(LVT)) 3073 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1); 3074 assert(LVT.isInteger()); 3075 3076 if (VT.bitsGT(LVT)) 3077 VT = LVT; 3078 } 3079 3080 unsigned NumMemOps = 0; 3081 while (Size != 0) { 3082 unsigned VTSize = VT.getSizeInBits() / 8; 3083 while (VTSize > Size) { 3084 // For now, only use non-vector load / store's for the left-over pieces. 3085 if (VT.isVector()) { 3086 VT = MVT::i64; 3087 while (!TLI.isTypeLegal(VT)) 3088 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 3089 VTSize = VT.getSizeInBits() / 8; 3090 } else { 3091 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 3092 VTSize >>= 1; 3093 } 3094 } 3095 3096 if (++NumMemOps > Limit) 3097 return false; 3098 MemOps.push_back(VT); 3099 Size -= VTSize; 3100 } 3101 3102 return true; 3103} 3104 3105static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, 3106 SDValue Chain, SDValue Dst, 3107 SDValue Src, uint64_t Size, 3108 unsigned Align, bool AlwaysInline, 3109 const Value *DstSV, uint64_t DstSVOff, 3110 const Value *SrcSV, uint64_t SrcSVOff){ 3111 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3112 3113 // Expand memcpy to a series of load and store ops if the size operand falls 3114 // below a certain threshold. 3115 std::vector<MVT> MemOps; 3116 uint64_t Limit = -1ULL; 3117 if (!AlwaysInline) 3118 Limit = TLI.getMaxStoresPerMemcpy(); 3119 unsigned DstAlign = Align; // Destination alignment can change. 3120 std::string Str; 3121 bool CopyFromStr; 3122 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3123 Str, CopyFromStr, DAG, TLI)) 3124 return SDValue(); 3125 3126 3127 bool isZeroStr = CopyFromStr && Str.empty(); 3128 SmallVector<SDValue, 8> OutChains; 3129 unsigned NumMemOps = MemOps.size(); 3130 uint64_t SrcOff = 0, DstOff = 0; 3131 for (unsigned i = 0; i < NumMemOps; i++) { 3132 MVT VT = MemOps[i]; 3133 unsigned VTSize = VT.getSizeInBits() / 8; 3134 SDValue Value, Store; 3135 3136 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 3137 // It's unlikely a store of a vector immediate can be done in a single 3138 // instruction. It would require a load from a constantpool first. 3139 // We also handle store a vector with all zero's. 3140 // FIXME: Handle other cases where store of vector immediate is done in 3141 // a single instruction. 3142 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff); 3143 Store = DAG.getStore(Chain, Value, 3144 getMemBasePlusOffset(Dst, DstOff, DAG), 3145 DstSV, DstSVOff + DstOff, false, DstAlign); 3146 } else { 3147 Value = DAG.getLoad(VT, Chain, 3148 getMemBasePlusOffset(Src, SrcOff, DAG), 3149 SrcSV, SrcSVOff + SrcOff, false, Align); 3150 Store = DAG.getStore(Chain, Value, 3151 getMemBasePlusOffset(Dst, DstOff, DAG), 3152 DstSV, DstSVOff + DstOff, false, DstAlign); 3153 } 3154 OutChains.push_back(Store); 3155 SrcOff += VTSize; 3156 DstOff += VTSize; 3157 } 3158 3159 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3160 &OutChains[0], OutChains.size()); 3161} 3162 3163static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, 3164 SDValue Chain, SDValue Dst, 3165 SDValue Src, uint64_t Size, 3166 unsigned Align, bool AlwaysInline, 3167 const Value *DstSV, uint64_t DstSVOff, 3168 const Value *SrcSV, uint64_t SrcSVOff){ 3169 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3170 3171 // Expand memmove to a series of load and store ops if the size operand falls 3172 // below a certain threshold. 3173 std::vector<MVT> MemOps; 3174 uint64_t Limit = -1ULL; 3175 if (!AlwaysInline) 3176 Limit = TLI.getMaxStoresPerMemmove(); 3177 unsigned DstAlign = Align; // Destination alignment can change. 3178 std::string Str; 3179 bool CopyFromStr; 3180 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3181 Str, CopyFromStr, DAG, TLI)) 3182 return SDValue(); 3183 3184 uint64_t SrcOff = 0, DstOff = 0; 3185 3186 SmallVector<SDValue, 8> LoadValues; 3187 SmallVector<SDValue, 8> LoadChains; 3188 SmallVector<SDValue, 8> OutChains; 3189 unsigned NumMemOps = MemOps.size(); 3190 for (unsigned i = 0; i < NumMemOps; i++) { 3191 MVT VT = MemOps[i]; 3192 unsigned VTSize = VT.getSizeInBits() / 8; 3193 SDValue Value, Store; 3194 3195 Value = DAG.getLoad(VT, Chain, 3196 getMemBasePlusOffset(Src, SrcOff, DAG), 3197 SrcSV, SrcSVOff + SrcOff, false, Align); 3198 LoadValues.push_back(Value); 3199 LoadChains.push_back(Value.getValue(1)); 3200 SrcOff += VTSize; 3201 } 3202 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, 3203 &LoadChains[0], LoadChains.size()); 3204 OutChains.clear(); 3205 for (unsigned i = 0; i < NumMemOps; i++) { 3206 MVT VT = MemOps[i]; 3207 unsigned VTSize = VT.getSizeInBits() / 8; 3208 SDValue Value, Store; 3209 3210 Store = DAG.getStore(Chain, LoadValues[i], 3211 getMemBasePlusOffset(Dst, DstOff, DAG), 3212 DstSV, DstSVOff + DstOff, false, DstAlign); 3213 OutChains.push_back(Store); 3214 DstOff += VTSize; 3215 } 3216 3217 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3218 &OutChains[0], OutChains.size()); 3219} 3220 3221static SDValue getMemsetStores(SelectionDAG &DAG, 3222 SDValue Chain, SDValue Dst, 3223 SDValue Src, uint64_t Size, 3224 unsigned Align, 3225 const Value *DstSV, uint64_t DstSVOff) { 3226 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3227 3228 // Expand memset to a series of load/store ops if the size operand 3229 // falls below a certain threshold. 3230 std::vector<MVT> MemOps; 3231 std::string Str; 3232 bool CopyFromStr; 3233 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 3234 Size, Align, Str, CopyFromStr, DAG, TLI)) 3235 return SDValue(); 3236 3237 SmallVector<SDValue, 8> OutChains; 3238 uint64_t DstOff = 0; 3239 3240 unsigned NumMemOps = MemOps.size(); 3241 for (unsigned i = 0; i < NumMemOps; i++) { 3242 MVT VT = MemOps[i]; 3243 unsigned VTSize = VT.getSizeInBits() / 8; 3244 SDValue Value = getMemsetValue(Src, VT, DAG); 3245 SDValue Store = DAG.getStore(Chain, Value, 3246 getMemBasePlusOffset(Dst, DstOff, DAG), 3247 DstSV, DstSVOff + DstOff); 3248 OutChains.push_back(Store); 3249 DstOff += VTSize; 3250 } 3251 3252 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3253 &OutChains[0], OutChains.size()); 3254} 3255 3256SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst, 3257 SDValue Src, SDValue Size, 3258 unsigned Align, bool AlwaysInline, 3259 const Value *DstSV, uint64_t DstSVOff, 3260 const Value *SrcSV, uint64_t SrcSVOff) { 3261 3262 // Check to see if we should lower the memcpy to loads and stores first. 3263 // For cases within the target-specified limits, this is the best choice. 3264 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3265 if (ConstantSize) { 3266 // Memcpy with size zero? Just return the original chain. 3267 if (ConstantSize->isNullValue()) 3268 return Chain; 3269 3270 SDValue Result = 3271 getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 3272 ConstantSize->getZExtValue(), 3273 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3274 if (Result.getNode()) 3275 return Result; 3276 } 3277 3278 // Then check to see if we should lower the memcpy with target-specific 3279 // code. If the target chooses to do this, this is the next best. 3280 SDValue Result = 3281 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align, 3282 AlwaysInline, 3283 DstSV, DstSVOff, SrcSV, SrcSVOff); 3284 if (Result.getNode()) 3285 return Result; 3286 3287 // If we really need inline code and the target declined to provide it, 3288 // use a (potentially long) sequence of loads and stores. 3289 if (AlwaysInline) { 3290 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3291 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 3292 ConstantSize->getZExtValue(), Align, true, 3293 DstSV, DstSVOff, SrcSV, SrcSVOff); 3294 } 3295 3296 // Emit a library call. 3297 TargetLowering::ArgListTy Args; 3298 TargetLowering::ArgListEntry Entry; 3299 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3300 Entry.Node = Dst; Args.push_back(Entry); 3301 Entry.Node = Src; Args.push_back(Entry); 3302 Entry.Node = Size; Args.push_back(Entry); 3303 std::pair<SDValue,SDValue> CallResult = 3304 TLI.LowerCallTo(Chain, Type::VoidTy, 3305 false, false, false, false, CallingConv::C, false, 3306 getExternalSymbol("memcpy", TLI.getPointerTy()), 3307 Args, *this); 3308 return CallResult.second; 3309} 3310 3311SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst, 3312 SDValue Src, SDValue Size, 3313 unsigned Align, 3314 const Value *DstSV, uint64_t DstSVOff, 3315 const Value *SrcSV, uint64_t SrcSVOff) { 3316 3317 // Check to see if we should lower the memmove to loads and stores first. 3318 // For cases within the target-specified limits, this is the best choice. 3319 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3320 if (ConstantSize) { 3321 // Memmove with size zero? Just return the original chain. 3322 if (ConstantSize->isNullValue()) 3323 return Chain; 3324 3325 SDValue Result = 3326 getMemmoveLoadsAndStores(*this, Chain, Dst, Src, 3327 ConstantSize->getZExtValue(), 3328 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3329 if (Result.getNode()) 3330 return Result; 3331 } 3332 3333 // Then check to see if we should lower the memmove with target-specific 3334 // code. If the target chooses to do this, this is the next best. 3335 SDValue Result = 3336 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align, 3337 DstSV, DstSVOff, SrcSV, SrcSVOff); 3338 if (Result.getNode()) 3339 return Result; 3340 3341 // Emit a library call. 3342 TargetLowering::ArgListTy Args; 3343 TargetLowering::ArgListEntry Entry; 3344 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3345 Entry.Node = Dst; Args.push_back(Entry); 3346 Entry.Node = Src; Args.push_back(Entry); 3347 Entry.Node = Size; Args.push_back(Entry); 3348 std::pair<SDValue,SDValue> CallResult = 3349 TLI.LowerCallTo(Chain, Type::VoidTy, 3350 false, false, false, false, CallingConv::C, false, 3351 getExternalSymbol("memmove", TLI.getPointerTy()), 3352 Args, *this); 3353 return CallResult.second; 3354} 3355 3356SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst, 3357 SDValue Src, SDValue Size, 3358 unsigned Align, 3359 const Value *DstSV, uint64_t DstSVOff) { 3360 3361 // Check to see if we should lower the memset to stores first. 3362 // For cases within the target-specified limits, this is the best choice. 3363 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3364 if (ConstantSize) { 3365 // Memset with size zero? Just return the original chain. 3366 if (ConstantSize->isNullValue()) 3367 return Chain; 3368 3369 SDValue Result = 3370 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(), 3371 Align, DstSV, DstSVOff); 3372 if (Result.getNode()) 3373 return Result; 3374 } 3375 3376 // Then check to see if we should lower the memset with target-specific 3377 // code. If the target chooses to do this, this is the next best. 3378 SDValue Result = 3379 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align, 3380 DstSV, DstSVOff); 3381 if (Result.getNode()) 3382 return Result; 3383 3384 // Emit a library call. 3385 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(); 3386 TargetLowering::ArgListTy Args; 3387 TargetLowering::ArgListEntry Entry; 3388 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3389 Args.push_back(Entry); 3390 // Extend or truncate the argument to be an i32 value for the call. 3391 if (Src.getValueType().bitsGT(MVT::i32)) 3392 Src = getNode(ISD::TRUNCATE, MVT::i32, Src); 3393 else 3394 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src); 3395 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true; 3396 Args.push_back(Entry); 3397 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false; 3398 Args.push_back(Entry); 3399 std::pair<SDValue,SDValue> CallResult = 3400 TLI.LowerCallTo(Chain, Type::VoidTy, 3401 false, false, false, false, CallingConv::C, false, 3402 getExternalSymbol("memset", TLI.getPointerTy()), 3403 Args, *this); 3404 return CallResult.second; 3405} 3406 3407SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT, 3408 SDValue Chain, 3409 SDValue Ptr, SDValue Cmp, 3410 SDValue Swp, const Value* PtrVal, 3411 unsigned Alignment) { 3412 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3413 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3414 3415 MVT VT = Cmp.getValueType(); 3416 3417 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3418 Alignment = getMVTAlignment(MemVT); 3419 3420 SDVTList VTs = getVTList(VT, MVT::Other); 3421 FoldingSetNodeID ID; 3422 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3423 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3424 void* IP = 0; 3425 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3426 return SDValue(E, 0); 3427 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3428 new (N) AtomicSDNode(Opcode, VTs, MemVT, 3429 Chain, Ptr, Cmp, Swp, PtrVal, Alignment); 3430 CSEMap.InsertNode(N, IP); 3431 AllNodes.push_back(N); 3432 return SDValue(N, 0); 3433} 3434 3435SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT, 3436 SDValue Chain, 3437 SDValue Ptr, SDValue Cmp, 3438 SDValue Swp, const Value* PtrVal, 3439 unsigned Alignment) { 3440 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3441 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3442 3443 MVT VT = Cmp.getValueType(); 3444 3445 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3446 Alignment = getMVTAlignment(MemVT); 3447 3448 SDVTList VTs = getVTList(VT, MVT::Other); 3449 FoldingSetNodeID ID; 3450 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3451 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3452 void* IP = 0; 3453 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3454 return SDValue(E, 0); 3455 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3456 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, 3457 Chain, Ptr, Cmp, Swp, PtrVal, Alignment); 3458 CSEMap.InsertNode(N, IP); 3459 AllNodes.push_back(N); 3460 return SDValue(N, 0); 3461} 3462 3463SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT, 3464 SDValue Chain, 3465 SDValue Ptr, SDValue Val, 3466 const Value* PtrVal, 3467 unsigned Alignment) { 3468 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3469 Opcode == ISD::ATOMIC_LOAD_SUB || 3470 Opcode == ISD::ATOMIC_LOAD_AND || 3471 Opcode == ISD::ATOMIC_LOAD_OR || 3472 Opcode == ISD::ATOMIC_LOAD_XOR || 3473 Opcode == ISD::ATOMIC_LOAD_NAND || 3474 Opcode == ISD::ATOMIC_LOAD_MIN || 3475 Opcode == ISD::ATOMIC_LOAD_MAX || 3476 Opcode == ISD::ATOMIC_LOAD_UMIN || 3477 Opcode == ISD::ATOMIC_LOAD_UMAX || 3478 Opcode == ISD::ATOMIC_SWAP) && 3479 "Invalid Atomic Op"); 3480 3481 MVT VT = Val.getValueType(); 3482 3483 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3484 Alignment = getMVTAlignment(MemVT); 3485 3486 SDVTList VTs = getVTList(VT, MVT::Other); 3487 FoldingSetNodeID ID; 3488 SDValue Ops[] = {Chain, Ptr, Val}; 3489 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3490 void* IP = 0; 3491 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3492 return SDValue(E, 0); 3493 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3494 new (N) AtomicSDNode(Opcode, VTs, MemVT, 3495 Chain, Ptr, Val, PtrVal, Alignment); 3496 CSEMap.InsertNode(N, IP); 3497 AllNodes.push_back(N); 3498 return SDValue(N, 0); 3499} 3500 3501SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT, 3502 SDValue Chain, 3503 SDValue Ptr, SDValue Val, 3504 const Value* PtrVal, 3505 unsigned Alignment) { 3506 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3507 Opcode == ISD::ATOMIC_LOAD_SUB || 3508 Opcode == ISD::ATOMIC_LOAD_AND || 3509 Opcode == ISD::ATOMIC_LOAD_OR || 3510 Opcode == ISD::ATOMIC_LOAD_XOR || 3511 Opcode == ISD::ATOMIC_LOAD_NAND || 3512 Opcode == ISD::ATOMIC_LOAD_MIN || 3513 Opcode == ISD::ATOMIC_LOAD_MAX || 3514 Opcode == ISD::ATOMIC_LOAD_UMIN || 3515 Opcode == ISD::ATOMIC_LOAD_UMAX || 3516 Opcode == ISD::ATOMIC_SWAP) && 3517 "Invalid Atomic Op"); 3518 3519 MVT VT = Val.getValueType(); 3520 3521 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3522 Alignment = getMVTAlignment(MemVT); 3523 3524 SDVTList VTs = getVTList(VT, MVT::Other); 3525 FoldingSetNodeID ID; 3526 SDValue Ops[] = {Chain, Ptr, Val}; 3527 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3528 void* IP = 0; 3529 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3530 return SDValue(E, 0); 3531 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3532 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, 3533 Chain, Ptr, Val, PtrVal, Alignment); 3534 CSEMap.InsertNode(N, IP); 3535 AllNodes.push_back(N); 3536 return SDValue(N, 0); 3537} 3538 3539/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3540/// Allowed to return something different (and simpler) if Simplify is true. 3541SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps) { 3542 if (NumOps == 1) 3543 return Ops[0]; 3544 3545 SmallVector<MVT, 4> VTs; 3546 VTs.reserve(NumOps); 3547 for (unsigned i = 0; i < NumOps; ++i) 3548 VTs.push_back(Ops[i].getValueType()); 3549 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps); 3550} 3551 3552SDValue 3553SelectionDAG::getMemIntrinsicNode(unsigned Opcode, 3554 const MVT *VTs, unsigned NumVTs, 3555 const SDValue *Ops, unsigned NumOps, 3556 MVT MemVT, const Value *srcValue, int SVOff, 3557 unsigned Align, bool Vol, 3558 bool ReadMem, bool WriteMem) { 3559 return getMemIntrinsicNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps, 3560 MemVT, srcValue, SVOff, Align, Vol, 3561 ReadMem, WriteMem); 3562} 3563 3564SDValue 3565SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3566 const MVT *VTs, unsigned NumVTs, 3567 const SDValue *Ops, unsigned NumOps, 3568 MVT MemVT, const Value *srcValue, int SVOff, 3569 unsigned Align, bool Vol, 3570 bool ReadMem, bool WriteMem) { 3571 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3572 MemVT, srcValue, SVOff, Align, Vol, 3573 ReadMem, WriteMem); 3574} 3575 3576SDValue 3577SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDVTList VTList, 3578 const SDValue *Ops, unsigned NumOps, 3579 MVT MemVT, const Value *srcValue, int SVOff, 3580 unsigned Align, bool Vol, 3581 bool ReadMem, bool WriteMem) { 3582 // Memoize the node unless it returns a flag. 3583 MemIntrinsicSDNode *N; 3584 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3585 FoldingSetNodeID ID; 3586 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3587 void *IP = 0; 3588 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3589 return SDValue(E, 0); 3590 3591 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3592 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT, 3593 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3594 CSEMap.InsertNode(N, IP); 3595 } else { 3596 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3597 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT, 3598 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3599 } 3600 AllNodes.push_back(N); 3601 return SDValue(N, 0); 3602} 3603 3604SDValue 3605SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3606 const SDValue *Ops, unsigned NumOps, 3607 MVT MemVT, const Value *srcValue, int SVOff, 3608 unsigned Align, bool Vol, 3609 bool ReadMem, bool WriteMem) { 3610 // Memoize the node unless it returns a flag. 3611 MemIntrinsicSDNode *N; 3612 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3613 FoldingSetNodeID ID; 3614 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3615 void *IP = 0; 3616 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3617 return SDValue(E, 0); 3618 3619 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3620 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, 3621 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3622 CSEMap.InsertNode(N, IP); 3623 } else { 3624 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3625 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, 3626 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3627 } 3628 AllNodes.push_back(N); 3629 return SDValue(N, 0); 3630} 3631 3632SDValue 3633SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall, 3634 bool IsInreg, SDVTList VTs, 3635 const SDValue *Operands, unsigned NumOperands) { 3636 // Do not include isTailCall in the folding set profile. 3637 FoldingSetNodeID ID; 3638 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands); 3639 ID.AddInteger(CallingConv); 3640 ID.AddInteger(IsVarArgs); 3641 void *IP = 0; 3642 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3643 // Instead of including isTailCall in the folding set, we just 3644 // set the flag of the existing node. 3645 if (!IsTailCall) 3646 cast<CallSDNode>(E)->setNotTailCall(); 3647 return SDValue(E, 0); 3648 } 3649 SDNode *N = NodeAllocator.Allocate<CallSDNode>(); 3650 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg, 3651 VTs, Operands, NumOperands); 3652 CSEMap.InsertNode(N, IP); 3653 AllNodes.push_back(N); 3654 return SDValue(N, 0); 3655} 3656 3657SDValue 3658SelectionDAG::getCall(unsigned CallingConv, DebugLoc dl, bool IsVarArgs, 3659 bool IsTailCall, bool IsInreg, SDVTList VTs, 3660 const SDValue *Operands, unsigned NumOperands) { 3661 // Do not include isTailCall in the folding set profile. 3662 FoldingSetNodeID ID; 3663 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands); 3664 ID.AddInteger(CallingConv); 3665 ID.AddInteger(IsVarArgs); 3666 void *IP = 0; 3667 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3668 // Instead of including isTailCall in the folding set, we just 3669 // set the flag of the existing node. 3670 if (!IsTailCall) 3671 cast<CallSDNode>(E)->setNotTailCall(); 3672 return SDValue(E, 0); 3673 } 3674 SDNode *N = NodeAllocator.Allocate<CallSDNode>(); 3675 new (N) CallSDNode(CallingConv, dl, IsVarArgs, IsTailCall, IsInreg, 3676 VTs, Operands, NumOperands); 3677 CSEMap.InsertNode(N, IP); 3678 AllNodes.push_back(N); 3679 return SDValue(N, 0); 3680} 3681 3682SDValue 3683SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3684 MVT VT, SDValue Chain, 3685 SDValue Ptr, SDValue Offset, 3686 const Value *SV, int SVOffset, MVT EVT, 3687 bool isVolatile, unsigned Alignment) { 3688 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3689 Alignment = getMVTAlignment(VT); 3690 3691 if (VT == EVT) { 3692 ExtType = ISD::NON_EXTLOAD; 3693 } else if (ExtType == ISD::NON_EXTLOAD) { 3694 assert(VT == EVT && "Non-extending load from different memory type!"); 3695 } else { 3696 // Extending load. 3697 if (VT.isVector()) 3698 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() && 3699 "Invalid vector extload!"); 3700 else 3701 assert(EVT.bitsLT(VT) && 3702 "Should only be an extending load, not truncating!"); 3703 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3704 "Cannot sign/zero extend a FP/Vector load!"); 3705 assert(VT.isInteger() == EVT.isInteger() && 3706 "Cannot convert from FP to Int or Int -> FP!"); 3707 } 3708 3709 bool Indexed = AM != ISD::UNINDEXED; 3710 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3711 "Unindexed load with an offset!"); 3712 3713 SDVTList VTs = Indexed ? 3714 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3715 SDValue Ops[] = { Chain, Ptr, Offset }; 3716 FoldingSetNodeID ID; 3717 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3718 ID.AddInteger(AM); 3719 ID.AddInteger(ExtType); 3720 ID.AddInteger(EVT.getRawBits()); 3721 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3722 void *IP = 0; 3723 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3724 return SDValue(E, 0); 3725 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3726 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset, 3727 Alignment, isVolatile); 3728 CSEMap.InsertNode(N, IP); 3729 AllNodes.push_back(N); 3730 return SDValue(N, 0); 3731} 3732 3733SDValue 3734SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3735 ISD::LoadExtType ExtType, MVT VT, SDValue Chain, 3736 SDValue Ptr, SDValue Offset, 3737 const Value *SV, int SVOffset, MVT EVT, 3738 bool isVolatile, unsigned Alignment) { 3739 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3740 Alignment = getMVTAlignment(VT); 3741 3742 if (VT == EVT) { 3743 ExtType = ISD::NON_EXTLOAD; 3744 } else if (ExtType == ISD::NON_EXTLOAD) { 3745 assert(VT == EVT && "Non-extending load from different memory type!"); 3746 } else { 3747 // Extending load. 3748 if (VT.isVector()) 3749 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() && 3750 "Invalid vector extload!"); 3751 else 3752 assert(EVT.bitsLT(VT) && 3753 "Should only be an extending load, not truncating!"); 3754 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3755 "Cannot sign/zero extend a FP/Vector load!"); 3756 assert(VT.isInteger() == EVT.isInteger() && 3757 "Cannot convert from FP to Int or Int -> FP!"); 3758 } 3759 3760 bool Indexed = AM != ISD::UNINDEXED; 3761 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3762 "Unindexed load with an offset!"); 3763 3764 SDVTList VTs = Indexed ? 3765 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3766 SDValue Ops[] = { Chain, Ptr, Offset }; 3767 FoldingSetNodeID ID; 3768 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3769 ID.AddInteger(AM); 3770 ID.AddInteger(ExtType); 3771 ID.AddInteger(EVT.getRawBits()); 3772 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3773 void *IP = 0; 3774 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3775 return SDValue(E, 0); 3776 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3777 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset, 3778 Alignment, isVolatile); 3779 CSEMap.InsertNode(N, IP); 3780 AllNodes.push_back(N); 3781 return SDValue(N, 0); 3782} 3783 3784SDValue SelectionDAG::getLoad(MVT VT, 3785 SDValue Chain, SDValue Ptr, 3786 const Value *SV, int SVOffset, 3787 bool isVolatile, unsigned Alignment) { 3788 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3789 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3790 SV, SVOffset, VT, isVolatile, Alignment); 3791} 3792 3793SDValue SelectionDAG::getLoad(MVT VT, DebugLoc dl, 3794 SDValue Chain, SDValue Ptr, 3795 const Value *SV, int SVOffset, 3796 bool isVolatile, unsigned Alignment) { 3797 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3798 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3799 SV, SVOffset, VT, isVolatile, Alignment); 3800} 3801 3802SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT, 3803 SDValue Chain, SDValue Ptr, 3804 const Value *SV, 3805 int SVOffset, MVT EVT, 3806 bool isVolatile, unsigned Alignment) { 3807 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3808 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef, 3809 SV, SVOffset, EVT, isVolatile, Alignment); 3810} 3811 3812SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, MVT VT, 3813 SDValue Chain, SDValue Ptr, 3814 const Value *SV, 3815 int SVOffset, MVT EVT, 3816 bool isVolatile, unsigned Alignment) { 3817 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3818 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3819 SV, SVOffset, EVT, isVolatile, Alignment); 3820} 3821 3822SDValue 3823SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base, 3824 SDValue Offset, ISD::MemIndexedMode AM) { 3825 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3826 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3827 "Load is already a indexed load!"); 3828 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), 3829 LD->getChain(), Base, Offset, LD->getSrcValue(), 3830 LD->getSrcValueOffset(), LD->getMemoryVT(), 3831 LD->isVolatile(), LD->getAlignment()); 3832} 3833 3834SDValue 3835SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3836 SDValue Offset, ISD::MemIndexedMode AM) { 3837 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3838 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3839 "Load is already a indexed load!"); 3840 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3841 LD->getChain(), Base, Offset, LD->getSrcValue(), 3842 LD->getSrcValueOffset(), LD->getMemoryVT(), 3843 LD->isVolatile(), LD->getAlignment()); 3844} 3845 3846SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val, 3847 SDValue Ptr, const Value *SV, int SVOffset, 3848 bool isVolatile, unsigned Alignment) { 3849 MVT VT = Val.getValueType(); 3850 3851 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3852 Alignment = getMVTAlignment(VT); 3853 3854 SDVTList VTs = getVTList(MVT::Other); 3855 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3856 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3857 FoldingSetNodeID ID; 3858 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3859 ID.AddInteger(ISD::UNINDEXED); 3860 ID.AddInteger(false); 3861 ID.AddInteger(VT.getRawBits()); 3862 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3863 void *IP = 0; 3864 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3865 return SDValue(E, 0); 3866 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3867 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false, 3868 VT, SV, SVOffset, Alignment, isVolatile); 3869 CSEMap.InsertNode(N, IP); 3870 AllNodes.push_back(N); 3871 return SDValue(N, 0); 3872} 3873 3874SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3875 SDValue Ptr, const Value *SV, int SVOffset, 3876 bool isVolatile, unsigned Alignment) { 3877 MVT VT = Val.getValueType(); 3878 3879 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3880 Alignment = getMVTAlignment(VT); 3881 3882 SDVTList VTs = getVTList(MVT::Other); 3883 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3884 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3885 FoldingSetNodeID ID; 3886 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3887 ID.AddInteger(ISD::UNINDEXED); 3888 ID.AddInteger(false); 3889 ID.AddInteger(VT.getRawBits()); 3890 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3891 void *IP = 0; 3892 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3893 return SDValue(E, 0); 3894 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3895 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false, 3896 VT, SV, SVOffset, Alignment, isVolatile); 3897 CSEMap.InsertNode(N, IP); 3898 AllNodes.push_back(N); 3899 return SDValue(N, 0); 3900} 3901 3902SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val, 3903 SDValue Ptr, const Value *SV, 3904 int SVOffset, MVT SVT, 3905 bool isVolatile, unsigned Alignment) { 3906 MVT VT = Val.getValueType(); 3907 3908 if (VT == SVT) 3909 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3910 3911 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3912 assert(VT.isInteger() == SVT.isInteger() && 3913 "Can't do FP-INT conversion!"); 3914 3915 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3916 Alignment = getMVTAlignment(VT); 3917 3918 SDVTList VTs = getVTList(MVT::Other); 3919 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3920 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3921 FoldingSetNodeID ID; 3922 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3923 ID.AddInteger(ISD::UNINDEXED); 3924 ID.AddInteger(1); 3925 ID.AddInteger(SVT.getRawBits()); 3926 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3927 void *IP = 0; 3928 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3929 return SDValue(E, 0); 3930 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3931 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true, 3932 SVT, SV, SVOffset, Alignment, isVolatile); 3933 CSEMap.InsertNode(N, IP); 3934 AllNodes.push_back(N); 3935 return SDValue(N, 0); 3936} 3937 3938SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3939 SDValue Ptr, const Value *SV, 3940 int SVOffset, MVT SVT, 3941 bool isVolatile, unsigned Alignment) { 3942 MVT VT = Val.getValueType(); 3943 3944 if (VT == SVT) 3945 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3946 3947 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3948 assert(VT.isInteger() == SVT.isInteger() && 3949 "Can't do FP-INT conversion!"); 3950 3951 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3952 Alignment = getMVTAlignment(VT); 3953 3954 SDVTList VTs = getVTList(MVT::Other); 3955 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3956 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3957 FoldingSetNodeID ID; 3958 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3959 ID.AddInteger(ISD::UNINDEXED); 3960 ID.AddInteger(1); 3961 ID.AddInteger(SVT.getRawBits()); 3962 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3963 void *IP = 0; 3964 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3965 return SDValue(E, 0); 3966 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3967 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true, 3968 SVT, SV, SVOffset, Alignment, isVolatile); 3969 CSEMap.InsertNode(N, IP); 3970 AllNodes.push_back(N); 3971 return SDValue(N, 0); 3972} 3973 3974SDValue 3975SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base, 3976 SDValue Offset, ISD::MemIndexedMode AM) { 3977 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3978 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3979 "Store is already a indexed store!"); 3980 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 3981 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3982 FoldingSetNodeID ID; 3983 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3984 ID.AddInteger(AM); 3985 ID.AddInteger(ST->isTruncatingStore()); 3986 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3987 ID.AddInteger(ST->getRawFlags()); 3988 void *IP = 0; 3989 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3990 return SDValue(E, 0); 3991 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3992 new (N) StoreSDNode(Ops, VTs, AM, 3993 ST->isTruncatingStore(), ST->getMemoryVT(), 3994 ST->getSrcValue(), ST->getSrcValueOffset(), 3995 ST->getAlignment(), ST->isVolatile()); 3996 CSEMap.InsertNode(N, IP); 3997 AllNodes.push_back(N); 3998 return SDValue(N, 0); 3999} 4000 4001SDValue 4002SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4003 SDValue Offset, ISD::MemIndexedMode AM) { 4004 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4005 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4006 "Store is already a indexed store!"); 4007 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4008 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4009 FoldingSetNodeID ID; 4010 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4011 ID.AddInteger(AM); 4012 ID.AddInteger(ST->isTruncatingStore()); 4013 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4014 ID.AddInteger(ST->getRawFlags()); 4015 void *IP = 0; 4016 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4017 return SDValue(E, 0); 4018 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 4019 new (N) StoreSDNode(Ops, dl, VTs, AM, 4020 ST->isTruncatingStore(), ST->getMemoryVT(), 4021 ST->getSrcValue(), ST->getSrcValueOffset(), 4022 ST->getAlignment(), ST->isVolatile()); 4023 CSEMap.InsertNode(N, IP); 4024 AllNodes.push_back(N); 4025 return SDValue(N, 0); 4026} 4027 4028SDValue SelectionDAG::getVAArg(MVT VT, 4029 SDValue Chain, SDValue Ptr, 4030 SDValue SV) { 4031 SDValue Ops[] = { Chain, Ptr, SV }; 4032 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3); 4033} 4034 4035SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 4036 const SDUse *Ops, unsigned NumOps) { 4037 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps); 4038} 4039 4040SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 4041 const SDUse *Ops, unsigned NumOps) { 4042 switch (NumOps) { 4043 case 0: return getNode(Opcode, DL, VT); 4044 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4045 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4046 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4047 default: break; 4048 } 4049 4050 // Copy from an SDUse array into an SDValue array for use with 4051 // the regular getNode logic. 4052 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4053 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4054} 4055 4056SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 4057 const SDValue *Ops, unsigned NumOps) { 4058 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps); 4059} 4060 4061SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 4062 const SDValue *Ops, unsigned NumOps) { 4063 switch (NumOps) { 4064 case 0: return getNode(Opcode, DL, VT); 4065 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4066 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4067 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4068 default: break; 4069 } 4070 4071 switch (Opcode) { 4072 default: break; 4073 case ISD::SELECT_CC: { 4074 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4075 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4076 "LHS and RHS of condition must have same type!"); 4077 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4078 "True and False arms of SelectCC must have same type!"); 4079 assert(Ops[2].getValueType() == VT && 4080 "select_cc node must be of same type as true and false value!"); 4081 break; 4082 } 4083 case ISD::BR_CC: { 4084 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4085 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4086 "LHS/RHS of comparison should match types!"); 4087 break; 4088 } 4089 } 4090 4091 // Memoize nodes. 4092 SDNode *N; 4093 SDVTList VTs = getVTList(VT); 4094 4095 if (VT != MVT::Flag) { 4096 FoldingSetNodeID ID; 4097 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4098 void *IP = 0; 4099 4100 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4101 return SDValue(E, 0); 4102 4103 N = NodeAllocator.Allocate<SDNode>(); 4104 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 4105 CSEMap.InsertNode(N, IP); 4106 } else { 4107 N = NodeAllocator.Allocate<SDNode>(); 4108 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 4109 } 4110 4111 AllNodes.push_back(N); 4112#ifndef NDEBUG 4113 VerifyNode(N); 4114#endif 4115 return SDValue(N, 0); 4116} 4117 4118SDValue SelectionDAG::getNode(unsigned Opcode, 4119 const std::vector<MVT> &ResultTys, 4120 const SDValue *Ops, unsigned NumOps) { 4121 return getNode(Opcode, DebugLoc::getUnknownLoc(), ResultTys, Ops, NumOps); 4122} 4123 4124SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4125 const std::vector<MVT> &ResultTys, 4126 const SDValue *Ops, unsigned NumOps) { 4127 return getNode(Opcode, DL, getNodeValueTypes(ResultTys), ResultTys.size(), 4128 Ops, NumOps); 4129} 4130 4131SDValue SelectionDAG::getNode(unsigned Opcode, 4132 const MVT *VTs, unsigned NumVTs, 4133 const SDValue *Ops, unsigned NumOps) { 4134 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTs, NumVTs, Ops, NumOps); 4135} 4136 4137SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4138 const MVT *VTs, unsigned NumVTs, 4139 const SDValue *Ops, unsigned NumOps) { 4140 if (NumVTs == 1) 4141 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4142 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4143} 4144 4145SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4146 const SDValue *Ops, unsigned NumOps) { 4147 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, Ops, NumOps); 4148} 4149 4150SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4151 const SDValue *Ops, unsigned NumOps) { 4152 if (VTList.NumVTs == 1) 4153 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4154 4155 switch (Opcode) { 4156 // FIXME: figure out how to safely handle things like 4157 // int foo(int x) { return 1 << (x & 255); } 4158 // int bar() { return foo(256); } 4159#if 0 4160 case ISD::SRA_PARTS: 4161 case ISD::SRL_PARTS: 4162 case ISD::SHL_PARTS: 4163 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4164 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4165 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4166 else if (N3.getOpcode() == ISD::AND) 4167 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4168 // If the and is only masking out bits that cannot effect the shift, 4169 // eliminate the and. 4170 unsigned NumBits = VT.getSizeInBits()*2; 4171 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4172 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4173 } 4174 break; 4175#endif 4176 } 4177 4178 // Memoize the node unless it returns a flag. 4179 SDNode *N; 4180 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4181 FoldingSetNodeID ID; 4182 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4183 void *IP = 0; 4184 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4185 return SDValue(E, 0); 4186 if (NumOps == 1) { 4187 N = NodeAllocator.Allocate<UnarySDNode>(); 4188 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4189 } else if (NumOps == 2) { 4190 N = NodeAllocator.Allocate<BinarySDNode>(); 4191 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4192 } else if (NumOps == 3) { 4193 N = NodeAllocator.Allocate<TernarySDNode>(); 4194 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 4195 } else { 4196 N = NodeAllocator.Allocate<SDNode>(); 4197 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 4198 } 4199 CSEMap.InsertNode(N, IP); 4200 } else { 4201 if (NumOps == 1) { 4202 N = NodeAllocator.Allocate<UnarySDNode>(); 4203 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4204 } else if (NumOps == 2) { 4205 N = NodeAllocator.Allocate<BinarySDNode>(); 4206 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4207 } else if (NumOps == 3) { 4208 N = NodeAllocator.Allocate<TernarySDNode>(); 4209 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 4210 } else { 4211 N = NodeAllocator.Allocate<SDNode>(); 4212 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 4213 } 4214 } 4215 AllNodes.push_back(N); 4216#ifndef NDEBUG 4217 VerifyNode(N); 4218#endif 4219 return SDValue(N, 0); 4220} 4221 4222SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) { 4223 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList); 4224} 4225 4226SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4227 return getNode(Opcode, DL, VTList, 0, 0); 4228} 4229 4230SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4231 SDValue N1) { 4232 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1); 4233} 4234 4235SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4236 SDValue N1) { 4237 SDValue Ops[] = { N1 }; 4238 return getNode(Opcode, DL, VTList, Ops, 1); 4239} 4240 4241SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4242 SDValue N1, SDValue N2) { 4243 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2); 4244} 4245 4246SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4247 SDValue N1, SDValue N2) { 4248 SDValue Ops[] = { N1, N2 }; 4249 return getNode(Opcode, DL, VTList, Ops, 2); 4250} 4251 4252SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4253 SDValue N1, SDValue N2, SDValue N3) { 4254 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3); 4255} 4256 4257SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4258 SDValue N1, SDValue N2, SDValue N3) { 4259 SDValue Ops[] = { N1, N2, N3 }; 4260 return getNode(Opcode, DL, VTList, Ops, 3); 4261} 4262 4263SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4264 SDValue N1, SDValue N2, SDValue N3, 4265 SDValue N4) { 4266 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3, N4); 4267} 4268 4269SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4270 SDValue N1, SDValue N2, SDValue N3, 4271 SDValue N4) { 4272 SDValue Ops[] = { N1, N2, N3, N4 }; 4273 return getNode(Opcode, DL, VTList, Ops, 4); 4274} 4275 4276SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4277 SDValue N1, SDValue N2, SDValue N3, 4278 SDValue N4, SDValue N5) { 4279 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3, N4, N5); 4280} 4281 4282SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4283 SDValue N1, SDValue N2, SDValue N3, 4284 SDValue N4, SDValue N5) { 4285 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4286 return getNode(Opcode, DL, VTList, Ops, 5); 4287} 4288 4289SDVTList SelectionDAG::getVTList(MVT VT) { 4290 return makeVTList(SDNode::getValueTypeList(VT), 1); 4291} 4292 4293SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) { 4294 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4295 E = VTList.rend(); I != E; ++I) 4296 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4297 return *I; 4298 4299 MVT *Array = Allocator.Allocate<MVT>(2); 4300 Array[0] = VT1; 4301 Array[1] = VT2; 4302 SDVTList Result = makeVTList(Array, 2); 4303 VTList.push_back(Result); 4304 return Result; 4305} 4306 4307SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) { 4308 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4309 E = VTList.rend(); I != E; ++I) 4310 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4311 I->VTs[2] == VT3) 4312 return *I; 4313 4314 MVT *Array = Allocator.Allocate<MVT>(3); 4315 Array[0] = VT1; 4316 Array[1] = VT2; 4317 Array[2] = VT3; 4318 SDVTList Result = makeVTList(Array, 3); 4319 VTList.push_back(Result); 4320 return Result; 4321} 4322 4323SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) { 4324 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4325 E = VTList.rend(); I != E; ++I) 4326 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4327 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4328 return *I; 4329 4330 MVT *Array = Allocator.Allocate<MVT>(3); 4331 Array[0] = VT1; 4332 Array[1] = VT2; 4333 Array[2] = VT3; 4334 Array[3] = VT4; 4335 SDVTList Result = makeVTList(Array, 4); 4336 VTList.push_back(Result); 4337 return Result; 4338} 4339 4340SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) { 4341 switch (NumVTs) { 4342 case 0: assert(0 && "Cannot have nodes without results!"); 4343 case 1: return getVTList(VTs[0]); 4344 case 2: return getVTList(VTs[0], VTs[1]); 4345 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4346 default: break; 4347 } 4348 4349 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4350 E = VTList.rend(); I != E; ++I) { 4351 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4352 continue; 4353 4354 bool NoMatch = false; 4355 for (unsigned i = 2; i != NumVTs; ++i) 4356 if (VTs[i] != I->VTs[i]) { 4357 NoMatch = true; 4358 break; 4359 } 4360 if (!NoMatch) 4361 return *I; 4362 } 4363 4364 MVT *Array = Allocator.Allocate<MVT>(NumVTs); 4365 std::copy(VTs, VTs+NumVTs, Array); 4366 SDVTList Result = makeVTList(Array, NumVTs); 4367 VTList.push_back(Result); 4368 return Result; 4369} 4370 4371 4372/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4373/// specified operands. If the resultant node already exists in the DAG, 4374/// this does not modify the specified node, instead it returns the node that 4375/// already exists. If the resultant node does not exist in the DAG, the 4376/// input node is returned. As a degenerate case, if you specify the same 4377/// input operands as the node already has, the input node is returned. 4378SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4379 SDNode *N = InN.getNode(); 4380 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4381 4382 // Check to see if there is no change. 4383 if (Op == N->getOperand(0)) return InN; 4384 4385 // See if the modified node already exists. 4386 void *InsertPos = 0; 4387 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4388 return SDValue(Existing, InN.getResNo()); 4389 4390 // Nope it doesn't. Remove the node from its current place in the maps. 4391 if (InsertPos) 4392 if (!RemoveNodeFromCSEMaps(N)) 4393 InsertPos = 0; 4394 4395 // Now we update the operands. 4396 N->OperandList[0].set(Op); 4397 4398 // If this gets put into a CSE map, add it. 4399 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4400 return InN; 4401} 4402 4403SDValue SelectionDAG:: 4404UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4405 SDNode *N = InN.getNode(); 4406 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4407 4408 // Check to see if there is no change. 4409 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4410 return InN; // No operands changed, just return the input node. 4411 4412 // See if the modified node already exists. 4413 void *InsertPos = 0; 4414 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4415 return SDValue(Existing, InN.getResNo()); 4416 4417 // Nope it doesn't. Remove the node from its current place in the maps. 4418 if (InsertPos) 4419 if (!RemoveNodeFromCSEMaps(N)) 4420 InsertPos = 0; 4421 4422 // Now we update the operands. 4423 if (N->OperandList[0] != Op1) 4424 N->OperandList[0].set(Op1); 4425 if (N->OperandList[1] != Op2) 4426 N->OperandList[1].set(Op2); 4427 4428 // If this gets put into a CSE map, add it. 4429 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4430 return InN; 4431} 4432 4433SDValue SelectionDAG:: 4434UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4435 SDValue Ops[] = { Op1, Op2, Op3 }; 4436 return UpdateNodeOperands(N, Ops, 3); 4437} 4438 4439SDValue SelectionDAG:: 4440UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4441 SDValue Op3, SDValue Op4) { 4442 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4443 return UpdateNodeOperands(N, Ops, 4); 4444} 4445 4446SDValue SelectionDAG:: 4447UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4448 SDValue Op3, SDValue Op4, SDValue Op5) { 4449 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4450 return UpdateNodeOperands(N, Ops, 5); 4451} 4452 4453SDValue SelectionDAG:: 4454UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4455 SDNode *N = InN.getNode(); 4456 assert(N->getNumOperands() == NumOps && 4457 "Update with wrong number of operands"); 4458 4459 // Check to see if there is no change. 4460 bool AnyChange = false; 4461 for (unsigned i = 0; i != NumOps; ++i) { 4462 if (Ops[i] != N->getOperand(i)) { 4463 AnyChange = true; 4464 break; 4465 } 4466 } 4467 4468 // No operands changed, just return the input node. 4469 if (!AnyChange) return InN; 4470 4471 // See if the modified node already exists. 4472 void *InsertPos = 0; 4473 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4474 return SDValue(Existing, InN.getResNo()); 4475 4476 // Nope it doesn't. Remove the node from its current place in the maps. 4477 if (InsertPos) 4478 if (!RemoveNodeFromCSEMaps(N)) 4479 InsertPos = 0; 4480 4481 // Now we update the operands. 4482 for (unsigned i = 0; i != NumOps; ++i) 4483 if (N->OperandList[i] != Ops[i]) 4484 N->OperandList[i].set(Ops[i]); 4485 4486 // If this gets put into a CSE map, add it. 4487 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4488 return InN; 4489} 4490 4491/// DropOperands - Release the operands and set this node to have 4492/// zero operands. 4493void SDNode::DropOperands() { 4494 // Unlike the code in MorphNodeTo that does this, we don't need to 4495 // watch for dead nodes here. 4496 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4497 SDUse &Use = *I++; 4498 Use.set(SDValue()); 4499 } 4500} 4501 4502/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4503/// machine opcode. 4504/// 4505SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4506 MVT VT) { 4507 SDVTList VTs = getVTList(VT); 4508 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4509} 4510 4511SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4512 MVT VT, SDValue Op1) { 4513 SDVTList VTs = getVTList(VT); 4514 SDValue Ops[] = { Op1 }; 4515 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4516} 4517 4518SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4519 MVT VT, SDValue Op1, 4520 SDValue Op2) { 4521 SDVTList VTs = getVTList(VT); 4522 SDValue Ops[] = { Op1, Op2 }; 4523 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4524} 4525 4526SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4527 MVT VT, SDValue Op1, 4528 SDValue Op2, SDValue Op3) { 4529 SDVTList VTs = getVTList(VT); 4530 SDValue Ops[] = { Op1, Op2, Op3 }; 4531 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4532} 4533 4534SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4535 MVT VT, const SDValue *Ops, 4536 unsigned NumOps) { 4537 SDVTList VTs = getVTList(VT); 4538 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4539} 4540 4541SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4542 MVT VT1, MVT VT2, const SDValue *Ops, 4543 unsigned NumOps) { 4544 SDVTList VTs = getVTList(VT1, VT2); 4545 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4546} 4547 4548SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4549 MVT VT1, MVT VT2) { 4550 SDVTList VTs = getVTList(VT1, VT2); 4551 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4552} 4553 4554SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4555 MVT VT1, MVT VT2, MVT VT3, 4556 const SDValue *Ops, unsigned NumOps) { 4557 SDVTList VTs = getVTList(VT1, VT2, VT3); 4558 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4559} 4560 4561SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4562 MVT VT1, MVT VT2, MVT VT3, MVT VT4, 4563 const SDValue *Ops, unsigned NumOps) { 4564 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4565 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4566} 4567 4568SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4569 MVT VT1, MVT VT2, 4570 SDValue Op1) { 4571 SDVTList VTs = getVTList(VT1, VT2); 4572 SDValue Ops[] = { Op1 }; 4573 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4574} 4575 4576SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4577 MVT VT1, MVT VT2, 4578 SDValue Op1, SDValue Op2) { 4579 SDVTList VTs = getVTList(VT1, VT2); 4580 SDValue Ops[] = { Op1, Op2 }; 4581 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4582} 4583 4584SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4585 MVT VT1, MVT VT2, 4586 SDValue Op1, SDValue Op2, 4587 SDValue Op3) { 4588 SDVTList VTs = getVTList(VT1, VT2); 4589 SDValue Ops[] = { Op1, Op2, Op3 }; 4590 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4591} 4592 4593SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4594 MVT VT1, MVT VT2, MVT VT3, 4595 SDValue Op1, SDValue Op2, 4596 SDValue Op3) { 4597 SDVTList VTs = getVTList(VT1, VT2, VT3); 4598 SDValue Ops[] = { Op1, Op2, Op3 }; 4599 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4600} 4601 4602SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4603 SDVTList VTs, const SDValue *Ops, 4604 unsigned NumOps) { 4605 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4606} 4607 4608SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4609 MVT VT) { 4610 SDVTList VTs = getVTList(VT); 4611 return MorphNodeTo(N, Opc, VTs, 0, 0); 4612} 4613 4614SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4615 MVT VT, SDValue Op1) { 4616 SDVTList VTs = getVTList(VT); 4617 SDValue Ops[] = { Op1 }; 4618 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4619} 4620 4621SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4622 MVT VT, SDValue Op1, 4623 SDValue Op2) { 4624 SDVTList VTs = getVTList(VT); 4625 SDValue Ops[] = { Op1, Op2 }; 4626 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4627} 4628 4629SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4630 MVT VT, SDValue Op1, 4631 SDValue Op2, SDValue Op3) { 4632 SDVTList VTs = getVTList(VT); 4633 SDValue Ops[] = { Op1, Op2, Op3 }; 4634 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4635} 4636 4637SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4638 MVT VT, const SDValue *Ops, 4639 unsigned NumOps) { 4640 SDVTList VTs = getVTList(VT); 4641 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4642} 4643 4644SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4645 MVT VT1, MVT VT2, const SDValue *Ops, 4646 unsigned NumOps) { 4647 SDVTList VTs = getVTList(VT1, VT2); 4648 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4649} 4650 4651SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4652 MVT VT1, MVT VT2) { 4653 SDVTList VTs = getVTList(VT1, VT2); 4654 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0); 4655} 4656 4657SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4658 MVT VT1, MVT VT2, MVT VT3, 4659 const SDValue *Ops, unsigned NumOps) { 4660 SDVTList VTs = getVTList(VT1, VT2, VT3); 4661 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4662} 4663 4664SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4665 MVT VT1, MVT VT2, 4666 SDValue Op1) { 4667 SDVTList VTs = getVTList(VT1, VT2); 4668 SDValue Ops[] = { Op1 }; 4669 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4670} 4671 4672SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4673 MVT VT1, MVT VT2, 4674 SDValue Op1, SDValue Op2) { 4675 SDVTList VTs = getVTList(VT1, VT2); 4676 SDValue Ops[] = { Op1, Op2 }; 4677 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4678} 4679 4680SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4681 MVT VT1, MVT VT2, 4682 SDValue Op1, SDValue Op2, 4683 SDValue Op3) { 4684 SDVTList VTs = getVTList(VT1, VT2); 4685 SDValue Ops[] = { Op1, Op2, Op3 }; 4686 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4687} 4688 4689/// MorphNodeTo - These *mutate* the specified node to have the specified 4690/// return type, opcode, and operands. 4691/// 4692/// Note that MorphNodeTo returns the resultant node. If there is already a 4693/// node of the specified opcode and operands, it returns that node instead of 4694/// the current one. 4695/// 4696/// Using MorphNodeTo is faster than creating a new node and swapping it in 4697/// with ReplaceAllUsesWith both because it often avoids allocating a new 4698/// node, and because it doesn't require CSE recalculation for any of 4699/// the node's users. 4700/// 4701SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4702 SDVTList VTs, const SDValue *Ops, 4703 unsigned NumOps) { 4704 // If an identical node already exists, use it. 4705 void *IP = 0; 4706 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4707 FoldingSetNodeID ID; 4708 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4709 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4710 return ON; 4711 } 4712 4713 if (!RemoveNodeFromCSEMaps(N)) 4714 IP = 0; 4715 4716 // Start the morphing. 4717 N->NodeType = Opc; 4718 N->ValueList = VTs.VTs; 4719 N->NumValues = VTs.NumVTs; 4720 4721 // Clear the operands list, updating used nodes to remove this from their 4722 // use list. Keep track of any operands that become dead as a result. 4723 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4724 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4725 SDUse &Use = *I++; 4726 SDNode *Used = Use.getNode(); 4727 Use.set(SDValue()); 4728 if (Used->use_empty()) 4729 DeadNodeSet.insert(Used); 4730 } 4731 4732 // If NumOps is larger than the # of operands we currently have, reallocate 4733 // the operand list. 4734 if (NumOps > N->NumOperands) { 4735 if (N->OperandsNeedDelete) 4736 delete[] N->OperandList; 4737 4738 if (N->isMachineOpcode()) { 4739 // We're creating a final node that will live unmorphed for the 4740 // remainder of the current SelectionDAG iteration, so we can allocate 4741 // the operands directly out of a pool with no recycling metadata. 4742 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps); 4743 N->OperandsNeedDelete = false; 4744 } else { 4745 N->OperandList = new SDUse[NumOps]; 4746 N->OperandsNeedDelete = true; 4747 } 4748 } 4749 4750 // Assign the new operands. 4751 N->NumOperands = NumOps; 4752 for (unsigned i = 0, e = NumOps; i != e; ++i) { 4753 N->OperandList[i].setUser(N); 4754 N->OperandList[i].setInitial(Ops[i]); 4755 } 4756 4757 // Delete any nodes that are still dead after adding the uses for the 4758 // new operands. 4759 SmallVector<SDNode *, 16> DeadNodes; 4760 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4761 E = DeadNodeSet.end(); I != E; ++I) 4762 if ((*I)->use_empty()) 4763 DeadNodes.push_back(*I); 4764 RemoveDeadNodes(DeadNodes); 4765 4766 if (IP) 4767 CSEMap.InsertNode(N, IP); // Memoize the new node. 4768 return N; 4769} 4770 4771 4772/// getTargetNode - These are used for target selectors to create a new node 4773/// with specified return type(s), target opcode, and operands. 4774/// 4775/// Note that getTargetNode returns the resultant node. If there is already a 4776/// node of the specified opcode and operands, it returns that node instead of 4777/// the current one. 4778SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) { 4779 return getNode(~Opcode, VT).getNode(); 4780} 4781SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT) { 4782 return getNode(~Opcode, dl, VT).getNode(); 4783} 4784 4785SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) { 4786 return getNode(~Opcode, VT, Op1).getNode(); 4787} 4788SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, 4789 SDValue Op1) { 4790 return getNode(~Opcode, dl, VT, Op1).getNode(); 4791} 4792 4793SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4794 SDValue Op1, SDValue Op2) { 4795 return getNode(~Opcode, VT, Op1, Op2).getNode(); 4796} 4797SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, 4798 SDValue Op1, SDValue Op2) { 4799 return getNode(~Opcode, dl, VT, Op1, Op2).getNode(); 4800} 4801 4802SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4803 SDValue Op1, SDValue Op2, 4804 SDValue Op3) { 4805 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode(); 4806} 4807SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, 4808 SDValue Op1, SDValue Op2, 4809 SDValue Op3) { 4810 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode(); 4811} 4812 4813SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4814 const SDValue *Ops, unsigned NumOps) { 4815 return getNode(~Opcode, VT, Ops, NumOps).getNode(); 4816} 4817SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, 4818 const SDValue *Ops, unsigned NumOps) { 4819 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode(); 4820} 4821 4822SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) { 4823 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4824 SDValue Op; 4825 return getNode(~Opcode, VTs, 2, &Op, 0).getNode(); 4826} 4827SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4828 MVT VT1, MVT VT2) { 4829 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4830 SDValue Op; 4831 return getNode(~Opcode, dl, VTs, 2, &Op, 0).getNode(); 4832} 4833 4834SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4835 MVT VT2, SDValue Op1) { 4836 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4837 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode(); 4838} 4839SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, 4840 MVT VT2, SDValue Op1) { 4841 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4842 return getNode(~Opcode, dl, VTs, 2, &Op1, 1).getNode(); 4843} 4844 4845SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4846 MVT VT2, SDValue Op1, 4847 SDValue Op2) { 4848 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4849 SDValue Ops[] = { Op1, Op2 }; 4850 return getNode(~Opcode, VTs, 2, Ops, 2).getNode(); 4851} 4852SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, 4853 MVT VT2, SDValue Op1, 4854 SDValue Op2) { 4855 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4856 SDValue Ops[] = { Op1, Op2 }; 4857 return getNode(~Opcode, dl, VTs, 2, Ops, 2).getNode(); 4858} 4859 4860SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4861 MVT VT2, SDValue Op1, 4862 SDValue Op2, SDValue Op3) { 4863 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4864 SDValue Ops[] = { Op1, Op2, Op3 }; 4865 return getNode(~Opcode, VTs, 2, Ops, 3).getNode(); 4866} 4867SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, 4868 MVT VT2, SDValue Op1, 4869 SDValue Op2, SDValue Op3) { 4870 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4871 SDValue Ops[] = { Op1, Op2, Op3 }; 4872 return getNode(~Opcode, dl, VTs, 2, Ops, 3).getNode(); 4873} 4874 4875SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, 4876 const SDValue *Ops, unsigned NumOps) { 4877 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4878 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode(); 4879} 4880SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4881 MVT VT1, MVT VT2, 4882 const SDValue *Ops, unsigned NumOps) { 4883 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4884 return getNode(~Opcode, dl, VTs, 2, Ops, NumOps).getNode(); 4885} 4886 4887SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4888 SDValue Op1, SDValue Op2) { 4889 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4890 SDValue Ops[] = { Op1, Op2 }; 4891 return getNode(~Opcode, VTs, 3, Ops, 2).getNode(); 4892} 4893SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4894 MVT VT1, MVT VT2, MVT VT3, 4895 SDValue Op1, SDValue Op2) { 4896 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4897 SDValue Ops[] = { Op1, Op2 }; 4898 return getNode(~Opcode, dl, VTs, 3, Ops, 2).getNode(); 4899} 4900 4901SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4902 SDValue Op1, SDValue Op2, 4903 SDValue Op3) { 4904 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4905 SDValue Ops[] = { Op1, Op2, Op3 }; 4906 return getNode(~Opcode, VTs, 3, Ops, 3).getNode(); 4907} 4908SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4909 MVT VT1, MVT VT2, MVT VT3, 4910 SDValue Op1, SDValue Op2, 4911 SDValue Op3) { 4912 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4913 SDValue Ops[] = { Op1, Op2, Op3 }; 4914 return getNode(~Opcode, dl, VTs, 3, Ops, 3).getNode(); 4915} 4916 4917SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4918 const SDValue *Ops, unsigned NumOps) { 4919 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4920 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode(); 4921} 4922SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4923 MVT VT1, MVT VT2, MVT VT3, 4924 const SDValue *Ops, unsigned NumOps) { 4925 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4926 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode(); 4927} 4928 4929SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4930 MVT VT2, MVT VT3, MVT VT4, 4931 const SDValue *Ops, unsigned NumOps) { 4932 std::vector<MVT> VTList; 4933 VTList.push_back(VT1); 4934 VTList.push_back(VT2); 4935 VTList.push_back(VT3); 4936 VTList.push_back(VT4); 4937 const MVT *VTs = getNodeValueTypes(VTList); 4938 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode(); 4939} 4940SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, 4941 MVT VT2, MVT VT3, MVT VT4, 4942 const SDValue *Ops, unsigned NumOps) { 4943 std::vector<MVT> VTList; 4944 VTList.push_back(VT1); 4945 VTList.push_back(VT2); 4946 VTList.push_back(VT3); 4947 VTList.push_back(VT4); 4948 const MVT *VTs = getNodeValueTypes(VTList); 4949 return getNode(~Opcode, dl, VTs, 4, Ops, NumOps).getNode(); 4950} 4951 4952SDNode *SelectionDAG::getTargetNode(unsigned Opcode, 4953 const std::vector<MVT> &ResultTys, 4954 const SDValue *Ops, unsigned NumOps) { 4955 const MVT *VTs = getNodeValueTypes(ResultTys); 4956 return getNode(~Opcode, VTs, ResultTys.size(), 4957 Ops, NumOps).getNode(); 4958} 4959SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4960 const std::vector<MVT> &ResultTys, 4961 const SDValue *Ops, unsigned NumOps) { 4962 const MVT *VTs = getNodeValueTypes(ResultTys); 4963 return getNode(~Opcode, dl, VTs, ResultTys.size(), 4964 Ops, NumOps).getNode(); 4965} 4966 4967/// getNodeIfExists - Get the specified node if it's already available, or 4968/// else return NULL. 4969SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4970 const SDValue *Ops, unsigned NumOps) { 4971 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4972 FoldingSetNodeID ID; 4973 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4974 void *IP = 0; 4975 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4976 return E; 4977 } 4978 return NULL; 4979} 4980 4981/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4982/// This can cause recursive merging of nodes in the DAG. 4983/// 4984/// This version assumes From has a single result value. 4985/// 4986void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4987 DAGUpdateListener *UpdateListener) { 4988 SDNode *From = FromN.getNode(); 4989 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4990 "Cannot replace with this method!"); 4991 assert(From != To.getNode() && "Cannot replace uses of with self"); 4992 4993 // Iterate over all the existing uses of From. New uses will be added 4994 // to the beginning of the use list, which we avoid visiting. 4995 // This specifically avoids visiting uses of From that arise while the 4996 // replacement is happening, because any such uses would be the result 4997 // of CSE: If an existing node looks like From after one of its operands 4998 // is replaced by To, we don't want to replace of all its users with To 4999 // too. See PR3018 for more info. 5000 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5001 while (UI != UE) { 5002 SDNode *User = *UI; 5003 5004 // This node is about to morph, remove its old self from the CSE maps. 5005 RemoveNodeFromCSEMaps(User); 5006 5007 // A user can appear in a use list multiple times, and when this 5008 // happens the uses are usually next to each other in the list. 5009 // To help reduce the number of CSE recomputations, process all 5010 // the uses of this user that we can find this way. 5011 do { 5012 SDUse &Use = UI.getUse(); 5013 ++UI; 5014 Use.set(To); 5015 } while (UI != UE && *UI == User); 5016 5017 // Now that we have modified User, add it back to the CSE maps. If it 5018 // already exists there, recursively merge the results together. 5019 AddModifiedNodeToCSEMaps(User, UpdateListener); 5020 } 5021} 5022 5023/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5024/// This can cause recursive merging of nodes in the DAG. 5025/// 5026/// This version assumes From/To have matching types and numbers of result 5027/// values. 5028/// 5029void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5030 DAGUpdateListener *UpdateListener) { 5031 assert(From->getVTList().VTs == To->getVTList().VTs && 5032 From->getNumValues() == To->getNumValues() && 5033 "Cannot use this version of ReplaceAllUsesWith!"); 5034 5035 // Handle the trivial case. 5036 if (From == To) 5037 return; 5038 5039 // Iterate over just the existing users of From. See the comments in 5040 // the ReplaceAllUsesWith above. 5041 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5042 while (UI != UE) { 5043 SDNode *User = *UI; 5044 5045 // This node is about to morph, remove its old self from the CSE maps. 5046 RemoveNodeFromCSEMaps(User); 5047 5048 // A user can appear in a use list multiple times, and when this 5049 // happens the uses are usually next to each other in the list. 5050 // To help reduce the number of CSE recomputations, process all 5051 // the uses of this user that we can find this way. 5052 do { 5053 SDUse &Use = UI.getUse(); 5054 ++UI; 5055 Use.setNode(To); 5056 } while (UI != UE && *UI == User); 5057 5058 // Now that we have modified User, add it back to the CSE maps. If it 5059 // already exists there, recursively merge the results together. 5060 AddModifiedNodeToCSEMaps(User, UpdateListener); 5061 } 5062} 5063 5064/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5065/// This can cause recursive merging of nodes in the DAG. 5066/// 5067/// This version can replace From with any result values. To must match the 5068/// number and types of values returned by From. 5069void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5070 const SDValue *To, 5071 DAGUpdateListener *UpdateListener) { 5072 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5073 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5074 5075 // Iterate over just the existing users of From. See the comments in 5076 // the ReplaceAllUsesWith above. 5077 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5078 while (UI != UE) { 5079 SDNode *User = *UI; 5080 5081 // This node is about to morph, remove its old self from the CSE maps. 5082 RemoveNodeFromCSEMaps(User); 5083 5084 // A user can appear in a use list multiple times, and when this 5085 // happens the uses are usually next to each other in the list. 5086 // To help reduce the number of CSE recomputations, process all 5087 // the uses of this user that we can find this way. 5088 do { 5089 SDUse &Use = UI.getUse(); 5090 const SDValue &ToOp = To[Use.getResNo()]; 5091 ++UI; 5092 Use.set(ToOp); 5093 } while (UI != UE && *UI == User); 5094 5095 // Now that we have modified User, add it back to the CSE maps. If it 5096 // already exists there, recursively merge the results together. 5097 AddModifiedNodeToCSEMaps(User, UpdateListener); 5098 } 5099} 5100 5101/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5102/// uses of other values produced by From.getNode() alone. The Deleted 5103/// vector is handled the same way as for ReplaceAllUsesWith. 5104void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5105 DAGUpdateListener *UpdateListener){ 5106 // Handle the really simple, really trivial case efficiently. 5107 if (From == To) return; 5108 5109 // Handle the simple, trivial, case efficiently. 5110 if (From.getNode()->getNumValues() == 1) { 5111 ReplaceAllUsesWith(From, To, UpdateListener); 5112 return; 5113 } 5114 5115 // Iterate over just the existing users of From. See the comments in 5116 // the ReplaceAllUsesWith above. 5117 SDNode::use_iterator UI = From.getNode()->use_begin(), 5118 UE = From.getNode()->use_end(); 5119 while (UI != UE) { 5120 SDNode *User = *UI; 5121 bool UserRemovedFromCSEMaps = false; 5122 5123 // A user can appear in a use list multiple times, and when this 5124 // happens the uses are usually next to each other in the list. 5125 // To help reduce the number of CSE recomputations, process all 5126 // the uses of this user that we can find this way. 5127 do { 5128 SDUse &Use = UI.getUse(); 5129 5130 // Skip uses of different values from the same node. 5131 if (Use.getResNo() != From.getResNo()) { 5132 ++UI; 5133 continue; 5134 } 5135 5136 // If this node hasn't been modified yet, it's still in the CSE maps, 5137 // so remove its old self from the CSE maps. 5138 if (!UserRemovedFromCSEMaps) { 5139 RemoveNodeFromCSEMaps(User); 5140 UserRemovedFromCSEMaps = true; 5141 } 5142 5143 ++UI; 5144 Use.set(To); 5145 } while (UI != UE && *UI == User); 5146 5147 // We are iterating over all uses of the From node, so if a use 5148 // doesn't use the specific value, no changes are made. 5149 if (!UserRemovedFromCSEMaps) 5150 continue; 5151 5152 // Now that we have modified User, add it back to the CSE maps. If it 5153 // already exists there, recursively merge the results together. 5154 AddModifiedNodeToCSEMaps(User, UpdateListener); 5155 } 5156} 5157 5158namespace { 5159 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5160 /// to record information about a use. 5161 struct UseMemo { 5162 SDNode *User; 5163 unsigned Index; 5164 SDUse *Use; 5165 }; 5166 5167 /// operator< - Sort Memos by User. 5168 bool operator<(const UseMemo &L, const UseMemo &R) { 5169 return (intptr_t)L.User < (intptr_t)R.User; 5170 } 5171} 5172 5173/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5174/// uses of other values produced by From.getNode() alone. The same value 5175/// may appear in both the From and To list. The Deleted vector is 5176/// handled the same way as for ReplaceAllUsesWith. 5177void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5178 const SDValue *To, 5179 unsigned Num, 5180 DAGUpdateListener *UpdateListener){ 5181 // Handle the simple, trivial case efficiently. 5182 if (Num == 1) 5183 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5184 5185 // Read up all the uses and make records of them. This helps 5186 // processing new uses that are introduced during the 5187 // replacement process. 5188 SmallVector<UseMemo, 4> Uses; 5189 for (unsigned i = 0; i != Num; ++i) { 5190 unsigned FromResNo = From[i].getResNo(); 5191 SDNode *FromNode = From[i].getNode(); 5192 for (SDNode::use_iterator UI = FromNode->use_begin(), 5193 E = FromNode->use_end(); UI != E; ++UI) { 5194 SDUse &Use = UI.getUse(); 5195 if (Use.getResNo() == FromResNo) { 5196 UseMemo Memo = { *UI, i, &Use }; 5197 Uses.push_back(Memo); 5198 } 5199 } 5200 } 5201 5202 // Sort the uses, so that all the uses from a given User are together. 5203 std::sort(Uses.begin(), Uses.end()); 5204 5205 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5206 UseIndex != UseIndexEnd; ) { 5207 // We know that this user uses some value of From. If it is the right 5208 // value, update it. 5209 SDNode *User = Uses[UseIndex].User; 5210 5211 // This node is about to morph, remove its old self from the CSE maps. 5212 RemoveNodeFromCSEMaps(User); 5213 5214 // The Uses array is sorted, so all the uses for a given User 5215 // are next to each other in the list. 5216 // To help reduce the number of CSE recomputations, process all 5217 // the uses of this user that we can find this way. 5218 do { 5219 unsigned i = Uses[UseIndex].Index; 5220 SDUse &Use = *Uses[UseIndex].Use; 5221 ++UseIndex; 5222 5223 Use.set(To[i]); 5224 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5225 5226 // Now that we have modified User, add it back to the CSE maps. If it 5227 // already exists there, recursively merge the results together. 5228 AddModifiedNodeToCSEMaps(User, UpdateListener); 5229 } 5230} 5231 5232/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5233/// based on their topological order. It returns the maximum id and a vector 5234/// of the SDNodes* in assigned order by reference. 5235unsigned SelectionDAG::AssignTopologicalOrder() { 5236 5237 unsigned DAGSize = 0; 5238 5239 // SortedPos tracks the progress of the algorithm. Nodes before it are 5240 // sorted, nodes after it are unsorted. When the algorithm completes 5241 // it is at the end of the list. 5242 allnodes_iterator SortedPos = allnodes_begin(); 5243 5244 // Visit all the nodes. Move nodes with no operands to the front of 5245 // the list immediately. Annotate nodes that do have operands with their 5246 // operand count. Before we do this, the Node Id fields of the nodes 5247 // may contain arbitrary values. After, the Node Id fields for nodes 5248 // before SortedPos will contain the topological sort index, and the 5249 // Node Id fields for nodes At SortedPos and after will contain the 5250 // count of outstanding operands. 5251 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5252 SDNode *N = I++; 5253 unsigned Degree = N->getNumOperands(); 5254 if (Degree == 0) { 5255 // A node with no uses, add it to the result array immediately. 5256 N->setNodeId(DAGSize++); 5257 allnodes_iterator Q = N; 5258 if (Q != SortedPos) 5259 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5260 ++SortedPos; 5261 } else { 5262 // Temporarily use the Node Id as scratch space for the degree count. 5263 N->setNodeId(Degree); 5264 } 5265 } 5266 5267 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5268 // such that by the time the end is reached all nodes will be sorted. 5269 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5270 SDNode *N = I; 5271 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5272 UI != UE; ++UI) { 5273 SDNode *P = *UI; 5274 unsigned Degree = P->getNodeId(); 5275 --Degree; 5276 if (Degree == 0) { 5277 // All of P's operands are sorted, so P may sorted now. 5278 P->setNodeId(DAGSize++); 5279 if (P != SortedPos) 5280 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5281 ++SortedPos; 5282 } else { 5283 // Update P's outstanding operand count. 5284 P->setNodeId(Degree); 5285 } 5286 } 5287 } 5288 5289 assert(SortedPos == AllNodes.end() && 5290 "Topological sort incomplete!"); 5291 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5292 "First node in topological sort is not the entry token!"); 5293 assert(AllNodes.front().getNodeId() == 0 && 5294 "First node in topological sort has non-zero id!"); 5295 assert(AllNodes.front().getNumOperands() == 0 && 5296 "First node in topological sort has operands!"); 5297 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5298 "Last node in topologic sort has unexpected id!"); 5299 assert(AllNodes.back().use_empty() && 5300 "Last node in topologic sort has users!"); 5301 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5302 return DAGSize; 5303} 5304 5305 5306 5307//===----------------------------------------------------------------------===// 5308// SDNode Class 5309//===----------------------------------------------------------------------===// 5310 5311HandleSDNode::~HandleSDNode() { 5312 DropOperands(); 5313} 5314 5315GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA, 5316 MVT VT, int64_t o) 5317 : SDNode(isa<GlobalVariable>(GA) && 5318 cast<GlobalVariable>(GA)->isThreadLocal() ? 5319 // Thread Local 5320 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) : 5321 // Non Thread Local 5322 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress), 5323 getSDVTList(VT)), Offset(o) { 5324 TheGlobal = const_cast<GlobalValue*>(GA); 5325} 5326 5327MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt, 5328 const Value *srcValue, int SVO, 5329 unsigned alignment, bool vol) 5330 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 5331 Flags(encodeMemSDNodeFlags(vol, alignment)) { 5332 5333 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 5334 assert(getAlignment() == alignment && "Alignment representation error!"); 5335 assert(isVolatile() == vol && "Volatile representation error!"); 5336} 5337 5338MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops, 5339 unsigned NumOps, MVT memvt, const Value *srcValue, 5340 int SVO, unsigned alignment, bool vol) 5341 : SDNode(Opc, VTs, Ops, NumOps), 5342 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 5343 Flags(vol | ((Log2_32(alignment) + 1) << 1)) { 5344 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 5345 assert(getAlignment() == alignment && "Alignment representation error!"); 5346 assert(isVolatile() == vol && "Volatile representation error!"); 5347} 5348 5349MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT memvt, 5350 const Value *srcValue, int SVO, 5351 unsigned alignment, bool vol) 5352 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 5353 Flags(encodeMemSDNodeFlags(vol, alignment)) { 5354 5355 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 5356 assert(getAlignment() == alignment && "Alignment representation error!"); 5357 assert(isVolatile() == vol && "Volatile representation error!"); 5358} 5359 5360MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5361 const SDValue *Ops, 5362 unsigned NumOps, MVT memvt, const Value *srcValue, 5363 int SVO, unsigned alignment, bool vol) 5364 : SDNode(Opc, dl, VTs, Ops, NumOps), 5365 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 5366 Flags(vol | ((Log2_32(alignment) + 1) << 1)) { 5367 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 5368 assert(getAlignment() == alignment && "Alignment representation error!"); 5369 assert(isVolatile() == vol && "Volatile representation error!"); 5370} 5371 5372/// getMemOperand - Return a MachineMemOperand object describing the memory 5373/// reference performed by this memory reference. 5374MachineMemOperand MemSDNode::getMemOperand() const { 5375 int Flags = 0; 5376 if (isa<LoadSDNode>(this)) 5377 Flags = MachineMemOperand::MOLoad; 5378 else if (isa<StoreSDNode>(this)) 5379 Flags = MachineMemOperand::MOStore; 5380 else if (isa<AtomicSDNode>(this)) { 5381 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 5382 } 5383 else { 5384 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this); 5385 assert(MemIntrinNode && "Unknown MemSDNode opcode!"); 5386 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad; 5387 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore; 5388 } 5389 5390 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3; 5391 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 5392 5393 // Check if the memory reference references a frame index 5394 const FrameIndexSDNode *FI = 5395 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode()); 5396 if (!getSrcValue() && FI) 5397 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()), 5398 Flags, 0, Size, getAlignment()); 5399 else 5400 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(), 5401 Size, getAlignment()); 5402} 5403 5404/// Profile - Gather unique data for the node. 5405/// 5406void SDNode::Profile(FoldingSetNodeID &ID) const { 5407 AddNodeIDNode(ID, this); 5408} 5409 5410/// getValueTypeList - Return a pointer to the specified value type. 5411/// 5412const MVT *SDNode::getValueTypeList(MVT VT) { 5413 if (VT.isExtended()) { 5414 static std::set<MVT, MVT::compareRawBits> EVTs; 5415 return &(*EVTs.insert(VT).first); 5416 } else { 5417 static MVT VTs[MVT::LAST_VALUETYPE]; 5418 VTs[VT.getSimpleVT()] = VT; 5419 return &VTs[VT.getSimpleVT()]; 5420 } 5421} 5422 5423/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5424/// indicated value. This method ignores uses of other values defined by this 5425/// operation. 5426bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5427 assert(Value < getNumValues() && "Bad value!"); 5428 5429 // TODO: Only iterate over uses of a given value of the node 5430 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5431 if (UI.getUse().getResNo() == Value) { 5432 if (NUses == 0) 5433 return false; 5434 --NUses; 5435 } 5436 } 5437 5438 // Found exactly the right number of uses? 5439 return NUses == 0; 5440} 5441 5442 5443/// hasAnyUseOfValue - Return true if there are any use of the indicated 5444/// value. This method ignores uses of other values defined by this operation. 5445bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5446 assert(Value < getNumValues() && "Bad value!"); 5447 5448 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5449 if (UI.getUse().getResNo() == Value) 5450 return true; 5451 5452 return false; 5453} 5454 5455 5456/// isOnlyUserOf - Return true if this node is the only use of N. 5457/// 5458bool SDNode::isOnlyUserOf(SDNode *N) const { 5459 bool Seen = false; 5460 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5461 SDNode *User = *I; 5462 if (User == this) 5463 Seen = true; 5464 else 5465 return false; 5466 } 5467 5468 return Seen; 5469} 5470 5471/// isOperand - Return true if this node is an operand of N. 5472/// 5473bool SDValue::isOperandOf(SDNode *N) const { 5474 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5475 if (*this == N->getOperand(i)) 5476 return true; 5477 return false; 5478} 5479 5480bool SDNode::isOperandOf(SDNode *N) const { 5481 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5482 if (this == N->OperandList[i].getNode()) 5483 return true; 5484 return false; 5485} 5486 5487/// reachesChainWithoutSideEffects - Return true if this operand (which must 5488/// be a chain) reaches the specified operand without crossing any 5489/// side-effecting instructions. In practice, this looks through token 5490/// factors and non-volatile loads. In order to remain efficient, this only 5491/// looks a couple of nodes in, it does not do an exhaustive search. 5492bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5493 unsigned Depth) const { 5494 if (*this == Dest) return true; 5495 5496 // Don't search too deeply, we just want to be able to see through 5497 // TokenFactor's etc. 5498 if (Depth == 0) return false; 5499 5500 // If this is a token factor, all inputs to the TF happen in parallel. If any 5501 // of the operands of the TF reach dest, then we can do the xform. 5502 if (getOpcode() == ISD::TokenFactor) { 5503 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5504 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5505 return true; 5506 return false; 5507 } 5508 5509 // Loads don't have side effects, look through them. 5510 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5511 if (!Ld->isVolatile()) 5512 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5513 } 5514 return false; 5515} 5516 5517 5518static void findPredecessor(SDNode *N, const SDNode *P, bool &found, 5519 SmallPtrSet<SDNode *, 32> &Visited) { 5520 if (found || !Visited.insert(N)) 5521 return; 5522 5523 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) { 5524 SDNode *Op = N->getOperand(i).getNode(); 5525 if (Op == P) { 5526 found = true; 5527 return; 5528 } 5529 findPredecessor(Op, P, found, Visited); 5530 } 5531} 5532 5533/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5534/// is either an operand of N or it can be reached by recursively traversing 5535/// up the operands. 5536/// NOTE: this is an expensive method. Use it carefully. 5537bool SDNode::isPredecessorOf(SDNode *N) const { 5538 SmallPtrSet<SDNode *, 32> Visited; 5539 bool found = false; 5540 findPredecessor(N, this, found, Visited); 5541 return found; 5542} 5543 5544uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5545 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5546 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5547} 5548 5549std::string SDNode::getOperationName(const SelectionDAG *G) const { 5550 switch (getOpcode()) { 5551 default: 5552 if (getOpcode() < ISD::BUILTIN_OP_END) 5553 return "<<Unknown DAG Node>>"; 5554 if (isMachineOpcode()) { 5555 if (G) 5556 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5557 if (getMachineOpcode() < TII->getNumOpcodes()) 5558 return TII->get(getMachineOpcode()).getName(); 5559 return "<<Unknown Machine Node>>"; 5560 } 5561 if (G) { 5562 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5563 const char *Name = TLI.getTargetNodeName(getOpcode()); 5564 if (Name) return Name; 5565 return "<<Unknown Target Node>>"; 5566 } 5567 return "<<Unknown Node>>"; 5568 5569#ifndef NDEBUG 5570 case ISD::DELETED_NODE: 5571 return "<<Deleted Node!>>"; 5572#endif 5573 case ISD::PREFETCH: return "Prefetch"; 5574 case ISD::MEMBARRIER: return "MemBarrier"; 5575 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5576 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5577 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5578 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5579 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5580 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5581 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5582 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5583 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5584 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5585 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5586 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5587 case ISD::PCMARKER: return "PCMarker"; 5588 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5589 case ISD::SRCVALUE: return "SrcValue"; 5590 case ISD::MEMOPERAND: return "MemOperand"; 5591 case ISD::EntryToken: return "EntryToken"; 5592 case ISD::TokenFactor: return "TokenFactor"; 5593 case ISD::AssertSext: return "AssertSext"; 5594 case ISD::AssertZext: return "AssertZext"; 5595 5596 case ISD::BasicBlock: return "BasicBlock"; 5597 case ISD::ARG_FLAGS: return "ArgFlags"; 5598 case ISD::VALUETYPE: return "ValueType"; 5599 case ISD::Register: return "Register"; 5600 5601 case ISD::Constant: return "Constant"; 5602 case ISD::ConstantFP: return "ConstantFP"; 5603 case ISD::GlobalAddress: return "GlobalAddress"; 5604 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5605 case ISD::FrameIndex: return "FrameIndex"; 5606 case ISD::JumpTable: return "JumpTable"; 5607 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5608 case ISD::RETURNADDR: return "RETURNADDR"; 5609 case ISD::FRAMEADDR: return "FRAMEADDR"; 5610 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5611 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5612 case ISD::EHSELECTION: return "EHSELECTION"; 5613 case ISD::EH_RETURN: return "EH_RETURN"; 5614 case ISD::ConstantPool: return "ConstantPool"; 5615 case ISD::ExternalSymbol: return "ExternalSymbol"; 5616 case ISD::INTRINSIC_WO_CHAIN: { 5617 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue(); 5618 return Intrinsic::getName((Intrinsic::ID)IID); 5619 } 5620 case ISD::INTRINSIC_VOID: 5621 case ISD::INTRINSIC_W_CHAIN: { 5622 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue(); 5623 return Intrinsic::getName((Intrinsic::ID)IID); 5624 } 5625 5626 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5627 case ISD::TargetConstant: return "TargetConstant"; 5628 case ISD::TargetConstantFP:return "TargetConstantFP"; 5629 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5630 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5631 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5632 case ISD::TargetJumpTable: return "TargetJumpTable"; 5633 case ISD::TargetConstantPool: return "TargetConstantPool"; 5634 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5635 5636 case ISD::CopyToReg: return "CopyToReg"; 5637 case ISD::CopyFromReg: return "CopyFromReg"; 5638 case ISD::UNDEF: return "undef"; 5639 case ISD::MERGE_VALUES: return "merge_values"; 5640 case ISD::INLINEASM: return "inlineasm"; 5641 case ISD::DBG_LABEL: return "dbg_label"; 5642 case ISD::EH_LABEL: return "eh_label"; 5643 case ISD::DECLARE: return "declare"; 5644 case ISD::HANDLENODE: return "handlenode"; 5645 case ISD::FORMAL_ARGUMENTS: return "formal_arguments"; 5646 case ISD::CALL: return "call"; 5647 5648 // Unary operators 5649 case ISD::FABS: return "fabs"; 5650 case ISD::FNEG: return "fneg"; 5651 case ISD::FSQRT: return "fsqrt"; 5652 case ISD::FSIN: return "fsin"; 5653 case ISD::FCOS: return "fcos"; 5654 case ISD::FPOWI: return "fpowi"; 5655 case ISD::FPOW: return "fpow"; 5656 case ISD::FTRUNC: return "ftrunc"; 5657 case ISD::FFLOOR: return "ffloor"; 5658 case ISD::FCEIL: return "fceil"; 5659 case ISD::FRINT: return "frint"; 5660 case ISD::FNEARBYINT: return "fnearbyint"; 5661 5662 // Binary operators 5663 case ISD::ADD: return "add"; 5664 case ISD::SUB: return "sub"; 5665 case ISD::MUL: return "mul"; 5666 case ISD::MULHU: return "mulhu"; 5667 case ISD::MULHS: return "mulhs"; 5668 case ISD::SDIV: return "sdiv"; 5669 case ISD::UDIV: return "udiv"; 5670 case ISD::SREM: return "srem"; 5671 case ISD::UREM: return "urem"; 5672 case ISD::SMUL_LOHI: return "smul_lohi"; 5673 case ISD::UMUL_LOHI: return "umul_lohi"; 5674 case ISD::SDIVREM: return "sdivrem"; 5675 case ISD::UDIVREM: return "udivrem"; 5676 case ISD::AND: return "and"; 5677 case ISD::OR: return "or"; 5678 case ISD::XOR: return "xor"; 5679 case ISD::SHL: return "shl"; 5680 case ISD::SRA: return "sra"; 5681 case ISD::SRL: return "srl"; 5682 case ISD::ROTL: return "rotl"; 5683 case ISD::ROTR: return "rotr"; 5684 case ISD::FADD: return "fadd"; 5685 case ISD::FSUB: return "fsub"; 5686 case ISD::FMUL: return "fmul"; 5687 case ISD::FDIV: return "fdiv"; 5688 case ISD::FREM: return "frem"; 5689 case ISD::FCOPYSIGN: return "fcopysign"; 5690 case ISD::FGETSIGN: return "fgetsign"; 5691 5692 case ISD::SETCC: return "setcc"; 5693 case ISD::VSETCC: return "vsetcc"; 5694 case ISD::SELECT: return "select"; 5695 case ISD::SELECT_CC: return "select_cc"; 5696 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5697 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5698 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5699 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5700 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5701 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5702 case ISD::CARRY_FALSE: return "carry_false"; 5703 case ISD::ADDC: return "addc"; 5704 case ISD::ADDE: return "adde"; 5705 case ISD::SADDO: return "saddo"; 5706 case ISD::UADDO: return "uaddo"; 5707 case ISD::SSUBO: return "ssubo"; 5708 case ISD::USUBO: return "usubo"; 5709 case ISD::SMULO: return "smulo"; 5710 case ISD::UMULO: return "umulo"; 5711 case ISD::SUBC: return "subc"; 5712 case ISD::SUBE: return "sube"; 5713 case ISD::SHL_PARTS: return "shl_parts"; 5714 case ISD::SRA_PARTS: return "sra_parts"; 5715 case ISD::SRL_PARTS: return "srl_parts"; 5716 5717 case ISD::EXTRACT_SUBREG: return "extract_subreg"; 5718 case ISD::INSERT_SUBREG: return "insert_subreg"; 5719 5720 // Conversion operators. 5721 case ISD::SIGN_EXTEND: return "sign_extend"; 5722 case ISD::ZERO_EXTEND: return "zero_extend"; 5723 case ISD::ANY_EXTEND: return "any_extend"; 5724 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5725 case ISD::TRUNCATE: return "truncate"; 5726 case ISD::FP_ROUND: return "fp_round"; 5727 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5728 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5729 case ISD::FP_EXTEND: return "fp_extend"; 5730 5731 case ISD::SINT_TO_FP: return "sint_to_fp"; 5732 case ISD::UINT_TO_FP: return "uint_to_fp"; 5733 case ISD::FP_TO_SINT: return "fp_to_sint"; 5734 case ISD::FP_TO_UINT: return "fp_to_uint"; 5735 case ISD::BIT_CONVERT: return "bit_convert"; 5736 5737 case ISD::CONVERT_RNDSAT: { 5738 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5739 default: assert(0 && "Unknown cvt code!"); 5740 case ISD::CVT_FF: return "cvt_ff"; 5741 case ISD::CVT_FS: return "cvt_fs"; 5742 case ISD::CVT_FU: return "cvt_fu"; 5743 case ISD::CVT_SF: return "cvt_sf"; 5744 case ISD::CVT_UF: return "cvt_uf"; 5745 case ISD::CVT_SS: return "cvt_ss"; 5746 case ISD::CVT_SU: return "cvt_su"; 5747 case ISD::CVT_US: return "cvt_us"; 5748 case ISD::CVT_UU: return "cvt_uu"; 5749 } 5750 } 5751 5752 // Control flow instructions 5753 case ISD::BR: return "br"; 5754 case ISD::BRIND: return "brind"; 5755 case ISD::BR_JT: return "br_jt"; 5756 case ISD::BRCOND: return "brcond"; 5757 case ISD::BR_CC: return "br_cc"; 5758 case ISD::RET: return "ret"; 5759 case ISD::CALLSEQ_START: return "callseq_start"; 5760 case ISD::CALLSEQ_END: return "callseq_end"; 5761 5762 // Other operators 5763 case ISD::LOAD: return "load"; 5764 case ISD::STORE: return "store"; 5765 case ISD::VAARG: return "vaarg"; 5766 case ISD::VACOPY: return "vacopy"; 5767 case ISD::VAEND: return "vaend"; 5768 case ISD::VASTART: return "vastart"; 5769 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5770 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5771 case ISD::BUILD_PAIR: return "build_pair"; 5772 case ISD::STACKSAVE: return "stacksave"; 5773 case ISD::STACKRESTORE: return "stackrestore"; 5774 case ISD::TRAP: return "trap"; 5775 5776 // Bit manipulation 5777 case ISD::BSWAP: return "bswap"; 5778 case ISD::CTPOP: return "ctpop"; 5779 case ISD::CTTZ: return "cttz"; 5780 case ISD::CTLZ: return "ctlz"; 5781 5782 // Debug info 5783 case ISD::DBG_STOPPOINT: return "dbg_stoppoint"; 5784 case ISD::DEBUG_LOC: return "debug_loc"; 5785 5786 // Trampolines 5787 case ISD::TRAMPOLINE: return "trampoline"; 5788 5789 case ISD::CONDCODE: 5790 switch (cast<CondCodeSDNode>(this)->get()) { 5791 default: assert(0 && "Unknown setcc condition!"); 5792 case ISD::SETOEQ: return "setoeq"; 5793 case ISD::SETOGT: return "setogt"; 5794 case ISD::SETOGE: return "setoge"; 5795 case ISD::SETOLT: return "setolt"; 5796 case ISD::SETOLE: return "setole"; 5797 case ISD::SETONE: return "setone"; 5798 5799 case ISD::SETO: return "seto"; 5800 case ISD::SETUO: return "setuo"; 5801 case ISD::SETUEQ: return "setue"; 5802 case ISD::SETUGT: return "setugt"; 5803 case ISD::SETUGE: return "setuge"; 5804 case ISD::SETULT: return "setult"; 5805 case ISD::SETULE: return "setule"; 5806 case ISD::SETUNE: return "setune"; 5807 5808 case ISD::SETEQ: return "seteq"; 5809 case ISD::SETGT: return "setgt"; 5810 case ISD::SETGE: return "setge"; 5811 case ISD::SETLT: return "setlt"; 5812 case ISD::SETLE: return "setle"; 5813 case ISD::SETNE: return "setne"; 5814 } 5815 } 5816} 5817 5818const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5819 switch (AM) { 5820 default: 5821 return ""; 5822 case ISD::PRE_INC: 5823 return "<pre-inc>"; 5824 case ISD::PRE_DEC: 5825 return "<pre-dec>"; 5826 case ISD::POST_INC: 5827 return "<post-inc>"; 5828 case ISD::POST_DEC: 5829 return "<post-dec>"; 5830 } 5831} 5832 5833std::string ISD::ArgFlagsTy::getArgFlagsString() { 5834 std::string S = "< "; 5835 5836 if (isZExt()) 5837 S += "zext "; 5838 if (isSExt()) 5839 S += "sext "; 5840 if (isInReg()) 5841 S += "inreg "; 5842 if (isSRet()) 5843 S += "sret "; 5844 if (isByVal()) 5845 S += "byval "; 5846 if (isNest()) 5847 S += "nest "; 5848 if (getByValAlign()) 5849 S += "byval-align:" + utostr(getByValAlign()) + " "; 5850 if (getOrigAlign()) 5851 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5852 if (getByValSize()) 5853 S += "byval-size:" + utostr(getByValSize()) + " "; 5854 return S + ">"; 5855} 5856 5857void SDNode::dump() const { dump(0); } 5858void SDNode::dump(const SelectionDAG *G) const { 5859 print(errs(), G); 5860 errs().flush(); 5861} 5862 5863void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5864 OS << (void*)this << ": "; 5865 5866 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5867 if (i) OS << ","; 5868 if (getValueType(i) == MVT::Other) 5869 OS << "ch"; 5870 else 5871 OS << getValueType(i).getMVTString(); 5872 } 5873 OS << " = " << getOperationName(G); 5874 5875 OS << " "; 5876 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5877 if (i) OS << ", "; 5878 OS << (void*)getOperand(i).getNode(); 5879 if (unsigned RN = getOperand(i).getResNo()) 5880 OS << ":" << RN; 5881 } 5882 5883 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) { 5884 SDNode *Mask = getOperand(2).getNode(); 5885 OS << "<"; 5886 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) { 5887 if (i) OS << ","; 5888 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF) 5889 OS << "u"; 5890 else 5891 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue(); 5892 } 5893 OS << ">"; 5894 } 5895 5896 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5897 OS << '<' << CSDN->getAPIntValue() << '>'; 5898 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5899 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5900 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5901 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5902 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5903 else { 5904 OS << "<APFloat("; 5905 CSDN->getValueAPF().bitcastToAPInt().dump(); 5906 OS << ")>"; 5907 } 5908 } else if (const GlobalAddressSDNode *GADN = 5909 dyn_cast<GlobalAddressSDNode>(this)) { 5910 int64_t offset = GADN->getOffset(); 5911 OS << '<'; 5912 WriteAsOperand(OS, GADN->getGlobal()); 5913 OS << '>'; 5914 if (offset > 0) 5915 OS << " + " << offset; 5916 else 5917 OS << " " << offset; 5918 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5919 OS << "<" << FIDN->getIndex() << ">"; 5920 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5921 OS << "<" << JTDN->getIndex() << ">"; 5922 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5923 int offset = CP->getOffset(); 5924 if (CP->isMachineConstantPoolEntry()) 5925 OS << "<" << *CP->getMachineCPVal() << ">"; 5926 else 5927 OS << "<" << *CP->getConstVal() << ">"; 5928 if (offset > 0) 5929 OS << " + " << offset; 5930 else 5931 OS << " " << offset; 5932 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5933 OS << "<"; 5934 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5935 if (LBB) 5936 OS << LBB->getName() << " "; 5937 OS << (const void*)BBDN->getBasicBlock() << ">"; 5938 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5939 if (G && R->getReg() && 5940 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5941 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5942 } else { 5943 OS << " #" << R->getReg(); 5944 } 5945 } else if (const ExternalSymbolSDNode *ES = 5946 dyn_cast<ExternalSymbolSDNode>(this)) { 5947 OS << "'" << ES->getSymbol() << "'"; 5948 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5949 if (M->getValue()) 5950 OS << "<" << M->getValue() << ">"; 5951 else 5952 OS << "<null>"; 5953 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) { 5954 if (M->MO.getValue()) 5955 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">"; 5956 else 5957 OS << "<null:" << M->MO.getOffset() << ">"; 5958 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) { 5959 OS << N->getArgFlags().getArgFlagsString(); 5960 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5961 OS << ":" << N->getVT().getMVTString(); 5962 } 5963 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5964 const Value *SrcValue = LD->getSrcValue(); 5965 int SrcOffset = LD->getSrcValueOffset(); 5966 OS << " <"; 5967 if (SrcValue) 5968 OS << SrcValue; 5969 else 5970 OS << "null"; 5971 OS << ":" << SrcOffset << ">"; 5972 5973 bool doExt = true; 5974 switch (LD->getExtensionType()) { 5975 default: doExt = false; break; 5976 case ISD::EXTLOAD: OS << " <anyext "; break; 5977 case ISD::SEXTLOAD: OS << " <sext "; break; 5978 case ISD::ZEXTLOAD: OS << " <zext "; break; 5979 } 5980 if (doExt) 5981 OS << LD->getMemoryVT().getMVTString() << ">"; 5982 5983 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5984 if (*AM) 5985 OS << " " << AM; 5986 if (LD->isVolatile()) 5987 OS << " <volatile>"; 5988 OS << " alignment=" << LD->getAlignment(); 5989 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5990 const Value *SrcValue = ST->getSrcValue(); 5991 int SrcOffset = ST->getSrcValueOffset(); 5992 OS << " <"; 5993 if (SrcValue) 5994 OS << SrcValue; 5995 else 5996 OS << "null"; 5997 OS << ":" << SrcOffset << ">"; 5998 5999 if (ST->isTruncatingStore()) 6000 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">"; 6001 6002 const char *AM = getIndexedModeName(ST->getAddressingMode()); 6003 if (*AM) 6004 OS << " " << AM; 6005 if (ST->isVolatile()) 6006 OS << " <volatile>"; 6007 OS << " alignment=" << ST->getAlignment(); 6008 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) { 6009 const Value *SrcValue = AT->getSrcValue(); 6010 int SrcOffset = AT->getSrcValueOffset(); 6011 OS << " <"; 6012 if (SrcValue) 6013 OS << SrcValue; 6014 else 6015 OS << "null"; 6016 OS << ":" << SrcOffset << ">"; 6017 if (AT->isVolatile()) 6018 OS << " <volatile>"; 6019 OS << " alignment=" << AT->getAlignment(); 6020 } 6021} 6022 6023static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6024 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6025 if (N->getOperand(i).getNode()->hasOneUse()) 6026 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6027 else 6028 cerr << "\n" << std::string(indent+2, ' ') 6029 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6030 6031 6032 cerr << "\n" << std::string(indent, ' '); 6033 N->dump(G); 6034} 6035 6036void SelectionDAG::dump() const { 6037 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6038 6039 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6040 I != E; ++I) { 6041 const SDNode *N = I; 6042 if (!N->hasOneUse() && N != getRoot().getNode()) 6043 DumpNodes(N, 2, this); 6044 } 6045 6046 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6047 6048 cerr << "\n\n"; 6049} 6050 6051const Type *ConstantPoolSDNode::getType() const { 6052 if (isMachineConstantPoolEntry()) 6053 return Val.MachineCPVal->getType(); 6054 return Val.ConstVal->getType(); 6055} 6056