SelectionDAG.cpp revision a23e8154dc58a62225074bb4eb1633c363ce331b
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "llvm/Constants.h" 16#include "llvm/GlobalValue.h" 17#include "llvm/Assembly/Writer.h" 18#include "llvm/CodeGen/MachineBasicBlock.h" 19#include "llvm/Support/MathExtras.h" 20#include "llvm/Target/TargetLowering.h" 21#include "llvm/Target/TargetInstrInfo.h" 22#include "llvm/Target/TargetMachine.h" 23#include <iostream> 24#include <set> 25#include <cmath> 26#include <algorithm> 27using namespace llvm; 28 29static bool isCommutativeBinOp(unsigned Opcode) { 30 switch (Opcode) { 31 case ISD::ADD: 32 case ISD::MUL: 33 case ISD::AND: 34 case ISD::OR: 35 case ISD::XOR: return true; 36 default: return false; // FIXME: Need commutative info for user ops! 37 } 38} 39 40static bool isAssociativeBinOp(unsigned Opcode) { 41 switch (Opcode) { 42 case ISD::ADD: 43 case ISD::MUL: 44 case ISD::AND: 45 case ISD::OR: 46 case ISD::XOR: return true; 47 default: return false; // FIXME: Need associative info for user ops! 48 } 49} 50 51// isInvertibleForFree - Return true if there is no cost to emitting the logical 52// inverse of this node. 53static bool isInvertibleForFree(SDOperand N) { 54 if (isa<ConstantSDNode>(N.Val)) return true; 55 if (N.Val->getOpcode() == ISD::SETCC && N.Val->hasOneUse()) 56 return true; 57 return false; 58} 59 60//===----------------------------------------------------------------------===// 61// ConstantFPSDNode Class 62//===----------------------------------------------------------------------===// 63 64/// isExactlyValue - We don't rely on operator== working on double values, as 65/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 66/// As such, this method can be used to do an exact bit-for-bit comparison of 67/// two floating point values. 68bool ConstantFPSDNode::isExactlyValue(double V) const { 69 return DoubleToBits(V) == DoubleToBits(Value); 70} 71 72//===----------------------------------------------------------------------===// 73// ISD Class 74//===----------------------------------------------------------------------===// 75 76/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 77/// when given the operation for (X op Y). 78ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 79 // To perform this operation, we just need to swap the L and G bits of the 80 // operation. 81 unsigned OldL = (Operation >> 2) & 1; 82 unsigned OldG = (Operation >> 1) & 1; 83 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 84 (OldL << 1) | // New G bit 85 (OldG << 2)); // New L bit. 86} 87 88/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 89/// 'op' is a valid SetCC operation. 90ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 91 unsigned Operation = Op; 92 if (isInteger) 93 Operation ^= 7; // Flip L, G, E bits, but not U. 94 else 95 Operation ^= 15; // Flip all of the condition bits. 96 if (Operation > ISD::SETTRUE2) 97 Operation &= ~8; // Don't let N and U bits get set. 98 return ISD::CondCode(Operation); 99} 100 101 102/// isSignedOp - For an integer comparison, return 1 if the comparison is a 103/// signed operation and 2 if the result is an unsigned comparison. Return zero 104/// if the operation does not depend on the sign of the input (setne and seteq). 105static int isSignedOp(ISD::CondCode Opcode) { 106 switch (Opcode) { 107 default: assert(0 && "Illegal integer setcc operation!"); 108 case ISD::SETEQ: 109 case ISD::SETNE: return 0; 110 case ISD::SETLT: 111 case ISD::SETLE: 112 case ISD::SETGT: 113 case ISD::SETGE: return 1; 114 case ISD::SETULT: 115 case ISD::SETULE: 116 case ISD::SETUGT: 117 case ISD::SETUGE: return 2; 118 } 119} 120 121/// getSetCCOrOperation - Return the result of a logical OR between different 122/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 123/// returns SETCC_INVALID if it is not possible to represent the resultant 124/// comparison. 125ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 126 bool isInteger) { 127 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 128 // Cannot fold a signed integer setcc with an unsigned integer setcc. 129 return ISD::SETCC_INVALID; 130 131 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 132 133 // If the N and U bits get set then the resultant comparison DOES suddenly 134 // care about orderedness, and is true when ordered. 135 if (Op > ISD::SETTRUE2) 136 Op &= ~16; // Clear the N bit. 137 return ISD::CondCode(Op); 138} 139 140/// getSetCCAndOperation - Return the result of a logical AND between different 141/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 142/// function returns zero if it is not possible to represent the resultant 143/// comparison. 144ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 145 bool isInteger) { 146 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 147 // Cannot fold a signed setcc with an unsigned setcc. 148 return ISD::SETCC_INVALID; 149 150 // Combine all of the condition bits. 151 return ISD::CondCode(Op1 & Op2); 152} 153 154const TargetMachine &SelectionDAG::getTarget() const { 155 return TLI.getTargetMachine(); 156} 157 158//===----------------------------------------------------------------------===// 159// SelectionDAG Class 160//===----------------------------------------------------------------------===// 161 162/// RemoveDeadNodes - This method deletes all unreachable nodes in the 163/// SelectionDAG, including nodes (like loads) that have uses of their token 164/// chain but no other uses and no side effect. If a node is passed in as an 165/// argument, it is used as the seed for node deletion. 166void SelectionDAG::RemoveDeadNodes(SDNode *N) { 167 std::set<SDNode*> AllNodeSet(AllNodes.begin(), AllNodes.end()); 168 169 // Create a dummy node (which is not added to allnodes), that adds a reference 170 // to the root node, preventing it from being deleted. 171 SDNode *DummyNode = new SDNode(ISD::EntryToken, getRoot()); 172 173 // If we have a hint to start from, use it. 174 if (N) DeleteNodeIfDead(N, &AllNodeSet); 175 176 Restart: 177 unsigned NumNodes = AllNodeSet.size(); 178 for (std::set<SDNode*>::iterator I = AllNodeSet.begin(), E = AllNodeSet.end(); 179 I != E; ++I) { 180 // Try to delete this node. 181 DeleteNodeIfDead(*I, &AllNodeSet); 182 183 // If we actually deleted any nodes, do not use invalid iterators in 184 // AllNodeSet. 185 if (AllNodeSet.size() != NumNodes) 186 goto Restart; 187 } 188 189 // Restore AllNodes. 190 if (AllNodes.size() != NumNodes) 191 AllNodes.assign(AllNodeSet.begin(), AllNodeSet.end()); 192 193 // If the root changed (e.g. it was a dead load, update the root). 194 setRoot(DummyNode->getOperand(0)); 195 196 // Now that we are done with the dummy node, delete it. 197 DummyNode->getOperand(0).Val->removeUser(DummyNode); 198 delete DummyNode; 199} 200 201 202void SelectionDAG::DeleteNodeIfDead(SDNode *N, void *NodeSet) { 203 if (!N->use_empty()) 204 return; 205 206 // Okay, we really are going to delete this node. First take this out of the 207 // appropriate CSE map. 208 RemoveNodeFromCSEMaps(N); 209 210 // Next, brutally remove the operand list. This is safe to do, as there are 211 // no cycles in the graph. 212 while (!N->Operands.empty()) { 213 SDNode *O = N->Operands.back().Val; 214 N->Operands.pop_back(); 215 O->removeUser(N); 216 217 // Now that we removed this operand, see if there are no uses of it left. 218 DeleteNodeIfDead(O, NodeSet); 219 } 220 221 // Remove the node from the nodes set and delete it. 222 std::set<SDNode*> &AllNodeSet = *(std::set<SDNode*>*)NodeSet; 223 AllNodeSet.erase(N); 224 225 // Now that the node is gone, check to see if any of the operands of this node 226 // are dead now. 227 delete N; 228} 229 230/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 231/// correspond to it. This is useful when we're about to delete or repurpose 232/// the node. We don't want future request for structurally identical nodes 233/// to return N anymore. 234void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 235 switch (N->getOpcode()) { 236 case ISD::Constant: 237 Constants.erase(std::make_pair(cast<ConstantSDNode>(N)->getValue(), 238 N->getValueType(0))); 239 break; 240 case ISD::TargetConstant: 241 TargetConstants.erase(std::make_pair(cast<ConstantSDNode>(N)->getValue(), 242 N->getValueType(0))); 243 break; 244 case ISD::ConstantFP: { 245 uint64_t V = DoubleToBits(cast<ConstantFPSDNode>(N)->getValue()); 246 ConstantFPs.erase(std::make_pair(V, N->getValueType(0))); 247 break; 248 } 249 case ISD::CONDCODE: 250 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 251 "Cond code doesn't exist!"); 252 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 253 break; 254 case ISD::GlobalAddress: 255 GlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal()); 256 break; 257 case ISD::FrameIndex: 258 FrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex()); 259 break; 260 case ISD::ConstantPool: 261 ConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->getIndex()); 262 break; 263 case ISD::BasicBlock: 264 BBNodes.erase(cast<BasicBlockSDNode>(N)->getBasicBlock()); 265 break; 266 case ISD::ExternalSymbol: 267 ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 268 break; 269 case ISD::VALUETYPE: 270 ValueTypeNodes[cast<VTSDNode>(N)->getVT()] = 0; 271 break; 272 case ISD::Register: 273 RegNodes[cast<RegisterSDNode>(N)->getReg()] = 0; 274 break; 275 case ISD::SRCVALUE: { 276 SrcValueSDNode *SVN = cast<SrcValueSDNode>(N); 277 ValueNodes.erase(std::make_pair(SVN->getValue(), SVN->getOffset())); 278 break; 279 } 280 case ISD::LOAD: 281 Loads.erase(std::make_pair(N->getOperand(1), 282 std::make_pair(N->getOperand(0), 283 N->getValueType(0)))); 284 break; 285 default: 286 if (N->getNumOperands() == 1) 287 UnaryOps.erase(std::make_pair(N->getOpcode(), 288 std::make_pair(N->getOperand(0), 289 N->getValueType(0)))); 290 else if (N->getNumOperands() == 2) 291 BinaryOps.erase(std::make_pair(N->getOpcode(), 292 std::make_pair(N->getOperand(0), 293 N->getOperand(1)))); 294 else if (N->getNumValues() == 1) { 295 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 296 OneResultNodes.erase(std::make_pair(N->getOpcode(), 297 std::make_pair(N->getValueType(0), 298 Ops))); 299 } else { 300 // Remove the node from the ArbitraryNodes map. 301 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end()); 302 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 303 ArbitraryNodes.erase(std::make_pair(N->getOpcode(), 304 std::make_pair(RV, Ops))); 305 } 306 break; 307 } 308} 309 310/// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It 311/// has been taken out and modified in some way. If the specified node already 312/// exists in the CSE maps, do not modify the maps, but return the existing node 313/// instead. If it doesn't exist, add it and return null. 314/// 315SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) { 316 assert(N->getNumOperands() && "This is a leaf node!"); 317 if (N->getOpcode() == ISD::LOAD) { 318 SDNode *&L = Loads[std::make_pair(N->getOperand(1), 319 std::make_pair(N->getOperand(0), 320 N->getValueType(0)))]; 321 if (L) return L; 322 L = N; 323 } else if (N->getNumOperands() == 1) { 324 SDNode *&U = UnaryOps[std::make_pair(N->getOpcode(), 325 std::make_pair(N->getOperand(0), 326 N->getValueType(0)))]; 327 if (U) return U; 328 U = N; 329 } else if (N->getNumOperands() == 2) { 330 SDNode *&B = BinaryOps[std::make_pair(N->getOpcode(), 331 std::make_pair(N->getOperand(0), 332 N->getOperand(1)))]; 333 if (B) return B; 334 B = N; 335 } else if (N->getNumValues() == 1) { 336 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 337 SDNode *&ORN = OneResultNodes[std::make_pair(N->getOpcode(), 338 std::make_pair(N->getValueType(0), Ops))]; 339 if (ORN) return ORN; 340 ORN = N; 341 } else { 342 // Remove the node from the ArbitraryNodes map. 343 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end()); 344 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 345 SDNode *&AN = ArbitraryNodes[std::make_pair(N->getOpcode(), 346 std::make_pair(RV, Ops))]; 347 if (AN) return AN; 348 AN = N; 349 } 350 return 0; 351 352} 353 354 355 356SelectionDAG::~SelectionDAG() { 357 for (unsigned i = 0, e = AllNodes.size(); i != e; ++i) 358 delete AllNodes[i]; 359} 360 361SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) { 362 if (Op.getValueType() == VT) return Op; 363 int64_t Imm = ~0ULL >> (64-MVT::getSizeInBits(VT)); 364 return getNode(ISD::AND, Op.getValueType(), Op, 365 getConstant(Imm, Op.getValueType())); 366} 367 368SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT) { 369 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!"); 370 // Mask out any bits that are not valid for this constant. 371 if (VT != MVT::i64) 372 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1; 373 374 SDNode *&N = Constants[std::make_pair(Val, VT)]; 375 if (N) return SDOperand(N, 0); 376 N = new ConstantSDNode(false, Val, VT); 377 AllNodes.push_back(N); 378 return SDOperand(N, 0); 379} 380 381SDOperand SelectionDAG::getTargetConstant(uint64_t Val, MVT::ValueType VT) { 382 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!"); 383 // Mask out any bits that are not valid for this constant. 384 if (VT != MVT::i64) 385 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1; 386 387 SDNode *&N = TargetConstants[std::make_pair(Val, VT)]; 388 if (N) return SDOperand(N, 0); 389 N = new ConstantSDNode(true, Val, VT); 390 AllNodes.push_back(N); 391 return SDOperand(N, 0); 392} 393 394SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT) { 395 assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!"); 396 if (VT == MVT::f32) 397 Val = (float)Val; // Mask out extra precision. 398 399 // Do the map lookup using the actual bit pattern for the floating point 400 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 401 // we don't have issues with SNANs. 402 SDNode *&N = ConstantFPs[std::make_pair(DoubleToBits(Val), VT)]; 403 if (N) return SDOperand(N, 0); 404 N = new ConstantFPSDNode(Val, VT); 405 AllNodes.push_back(N); 406 return SDOperand(N, 0); 407} 408 409 410 411SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV, 412 MVT::ValueType VT) { 413 SDNode *&N = GlobalValues[GV]; 414 if (N) return SDOperand(N, 0); 415 N = new GlobalAddressSDNode(GV,VT); 416 AllNodes.push_back(N); 417 return SDOperand(N, 0); 418} 419 420SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT) { 421 SDNode *&N = FrameIndices[FI]; 422 if (N) return SDOperand(N, 0); 423 N = new FrameIndexSDNode(FI, VT); 424 AllNodes.push_back(N); 425 return SDOperand(N, 0); 426} 427 428SDOperand SelectionDAG::getConstantPool(unsigned CPIdx, MVT::ValueType VT) { 429 SDNode *N = ConstantPoolIndices[CPIdx]; 430 if (N) return SDOperand(N, 0); 431 N = new ConstantPoolSDNode(CPIdx, VT); 432 AllNodes.push_back(N); 433 return SDOperand(N, 0); 434} 435 436SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 437 SDNode *&N = BBNodes[MBB]; 438 if (N) return SDOperand(N, 0); 439 N = new BasicBlockSDNode(MBB); 440 AllNodes.push_back(N); 441 return SDOperand(N, 0); 442} 443 444SDOperand SelectionDAG::getValueType(MVT::ValueType VT) { 445 if ((unsigned)VT >= ValueTypeNodes.size()) 446 ValueTypeNodes.resize(VT+1); 447 if (ValueTypeNodes[VT] == 0) { 448 ValueTypeNodes[VT] = new VTSDNode(VT); 449 AllNodes.push_back(ValueTypeNodes[VT]); 450 } 451 452 return SDOperand(ValueTypeNodes[VT], 0); 453} 454 455SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) { 456 SDNode *&N = ExternalSymbols[Sym]; 457 if (N) return SDOperand(N, 0); 458 N = new ExternalSymbolSDNode(Sym, VT); 459 AllNodes.push_back(N); 460 return SDOperand(N, 0); 461} 462 463SDOperand SelectionDAG::getCondCode(ISD::CondCode Cond) { 464 if ((unsigned)Cond >= CondCodeNodes.size()) 465 CondCodeNodes.resize(Cond+1); 466 467 if (CondCodeNodes[Cond] == 0) { 468 CondCodeNodes[Cond] = new CondCodeSDNode(Cond); 469 AllNodes.push_back(CondCodeNodes[Cond]); 470 } 471 return SDOperand(CondCodeNodes[Cond], 0); 472} 473 474SDOperand SelectionDAG::getRegister(unsigned Reg, MVT::ValueType VT) { 475 if (Reg >= RegNodes.size()) 476 RegNodes.resize(Reg+1); 477 RegisterSDNode *&Result = RegNodes[Reg]; 478 if (Result) { 479 assert(Result->getValueType(0) == VT && 480 "Inconsistent value types for machine registers"); 481 } else { 482 Result = new RegisterSDNode(Reg, VT); 483 AllNodes.push_back(Result); 484 } 485 return SDOperand(Result, 0); 486} 487 488SDOperand SelectionDAG::SimplifySetCC(MVT::ValueType VT, SDOperand N1, 489 SDOperand N2, ISD::CondCode Cond) { 490 // These setcc operations always fold. 491 switch (Cond) { 492 default: break; 493 case ISD::SETFALSE: 494 case ISD::SETFALSE2: return getConstant(0, VT); 495 case ISD::SETTRUE: 496 case ISD::SETTRUE2: return getConstant(1, VT); 497 } 498 499 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) { 500 uint64_t C2 = N2C->getValue(); 501 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 502 uint64_t C1 = N1C->getValue(); 503 504 // Sign extend the operands if required 505 if (ISD::isSignedIntSetCC(Cond)) { 506 C1 = N1C->getSignExtended(); 507 C2 = N2C->getSignExtended(); 508 } 509 510 switch (Cond) { 511 default: assert(0 && "Unknown integer setcc!"); 512 case ISD::SETEQ: return getConstant(C1 == C2, VT); 513 case ISD::SETNE: return getConstant(C1 != C2, VT); 514 case ISD::SETULT: return getConstant(C1 < C2, VT); 515 case ISD::SETUGT: return getConstant(C1 > C2, VT); 516 case ISD::SETULE: return getConstant(C1 <= C2, VT); 517 case ISD::SETUGE: return getConstant(C1 >= C2, VT); 518 case ISD::SETLT: return getConstant((int64_t)C1 < (int64_t)C2, VT); 519 case ISD::SETGT: return getConstant((int64_t)C1 > (int64_t)C2, VT); 520 case ISD::SETLE: return getConstant((int64_t)C1 <= (int64_t)C2, VT); 521 case ISD::SETGE: return getConstant((int64_t)C1 >= (int64_t)C2, VT); 522 } 523 } else { 524 // If the LHS is a ZERO_EXTEND and if this is an ==/!= comparison, perform 525 // the comparison on the input. 526 if (N1.getOpcode() == ISD::ZERO_EXTEND) { 527 unsigned InSize = MVT::getSizeInBits(N1.getOperand(0).getValueType()); 528 529 // If the comparison constant has bits in the upper part, the 530 // zero-extended value could never match. 531 if (C2 & (~0ULL << InSize)) { 532 unsigned VSize = MVT::getSizeInBits(N1.getValueType()); 533 switch (Cond) { 534 case ISD::SETUGT: 535 case ISD::SETUGE: 536 case ISD::SETEQ: return getConstant(0, VT); 537 case ISD::SETULT: 538 case ISD::SETULE: 539 case ISD::SETNE: return getConstant(1, VT); 540 case ISD::SETGT: 541 case ISD::SETGE: 542 // True if the sign bit of C2 is set. 543 return getConstant((C2 & (1ULL << VSize)) != 0, VT); 544 case ISD::SETLT: 545 case ISD::SETLE: 546 // True if the sign bit of C2 isn't set. 547 return getConstant((C2 & (1ULL << VSize)) == 0, VT); 548 default: 549 break; 550 } 551 } 552 553 // Otherwise, we can perform the comparison with the low bits. 554 switch (Cond) { 555 case ISD::SETEQ: 556 case ISD::SETNE: 557 case ISD::SETUGT: 558 case ISD::SETUGE: 559 case ISD::SETULT: 560 case ISD::SETULE: 561 return getSetCC(VT, N1.getOperand(0), 562 getConstant(C2, N1.getOperand(0).getValueType()), 563 Cond); 564 default: 565 break; // todo, be more careful with signed comparisons 566 } 567 } 568 569 uint64_t MinVal, MaxVal; 570 unsigned OperandBitSize = MVT::getSizeInBits(N2C->getValueType(0)); 571 if (ISD::isSignedIntSetCC(Cond)) { 572 MinVal = 1ULL << (OperandBitSize-1); 573 if (OperandBitSize != 1) // Avoid X >> 64, which is undefined. 574 MaxVal = ~0ULL >> (65-OperandBitSize); 575 else 576 MaxVal = 0; 577 } else { 578 MinVal = 0; 579 MaxVal = ~0ULL >> (64-OperandBitSize); 580 } 581 582 // Canonicalize GE/LE comparisons to use GT/LT comparisons. 583 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) { 584 if (C2 == MinVal) return getConstant(1, VT); // X >= MIN --> true 585 --C2; // X >= C1 --> X > (C1-1) 586 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()), 587 (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT); 588 } 589 590 if (Cond == ISD::SETLE || Cond == ISD::SETULE) { 591 if (C2 == MaxVal) return getConstant(1, VT); // X <= MAX --> true 592 ++C2; // X <= C1 --> X < (C1+1) 593 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()), 594 (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT); 595 } 596 597 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal) 598 return getConstant(0, VT); // X < MIN --> false 599 600 // Canonicalize setgt X, Min --> setne X, Min 601 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MinVal) 602 return getSetCC(VT, N1, N2, ISD::SETNE); 603 604 // If we have setult X, 1, turn it into seteq X, 0 605 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal+1) 606 return getSetCC(VT, N1, getConstant(MinVal, N1.getValueType()), 607 ISD::SETEQ); 608 // If we have setugt X, Max-1, turn it into seteq X, Max 609 else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MaxVal-1) 610 return getSetCC(VT, N1, getConstant(MaxVal, N1.getValueType()), 611 ISD::SETEQ); 612 613 // If we have "setcc X, C1", check to see if we can shrink the immediate 614 // by changing cc. 615 616 // SETUGT X, SINTMAX -> SETLT X, 0 617 if (Cond == ISD::SETUGT && OperandBitSize != 1 && 618 C2 == (~0ULL >> (65-OperandBitSize))) 619 return getSetCC(VT, N1, getConstant(0, N2.getValueType()), ISD::SETLT); 620 621 // FIXME: Implement the rest of these. 622 623 624 // Fold bit comparisons when we can. 625 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && 626 VT == N1.getValueType() && N1.getOpcode() == ISD::AND) 627 if (ConstantSDNode *AndRHS = 628 dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 629 if (Cond == ISD::SETNE && C2 == 0) {// (X & 8) != 0 --> (X & 8) >> 3 630 // Perform the xform if the AND RHS is a single bit. 631 if ((AndRHS->getValue() & (AndRHS->getValue()-1)) == 0) { 632 return getNode(ISD::SRL, VT, N1, 633 getConstant(Log2_64(AndRHS->getValue()), 634 TLI.getShiftAmountTy())); 635 } 636 } else if (Cond == ISD::SETEQ && C2 == AndRHS->getValue()) { 637 // (X & 8) == 8 --> (X & 8) >> 3 638 // Perform the xform if C2 is a single bit. 639 if ((C2 & (C2-1)) == 0) { 640 return getNode(ISD::SRL, VT, N1, 641 getConstant(Log2_64(C2),TLI.getShiftAmountTy())); 642 } 643 } 644 } 645 } 646 } else if (isa<ConstantSDNode>(N1.Val)) { 647 // Ensure that the constant occurs on the RHS. 648 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 649 } 650 651 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) 652 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) { 653 double C1 = N1C->getValue(), C2 = N2C->getValue(); 654 655 switch (Cond) { 656 default: break; // FIXME: Implement the rest of these! 657 case ISD::SETEQ: return getConstant(C1 == C2, VT); 658 case ISD::SETNE: return getConstant(C1 != C2, VT); 659 case ISD::SETLT: return getConstant(C1 < C2, VT); 660 case ISD::SETGT: return getConstant(C1 > C2, VT); 661 case ISD::SETLE: return getConstant(C1 <= C2, VT); 662 case ISD::SETGE: return getConstant(C1 >= C2, VT); 663 } 664 } else { 665 // Ensure that the constant occurs on the RHS. 666 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 667 } 668 669 if (N1 == N2) { 670 // We can always fold X == Y for integer setcc's. 671 if (MVT::isInteger(N1.getValueType())) 672 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 673 unsigned UOF = ISD::getUnorderedFlavor(Cond); 674 if (UOF == 2) // FP operators that are undefined on NaNs. 675 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 676 if (UOF == unsigned(ISD::isTrueWhenEqual(Cond))) 677 return getConstant(UOF, VT); 678 // Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO 679 // if it is not already. 680 ISD::CondCode NewCond = UOF == 0 ? ISD::SETUO : ISD::SETO; 681 if (NewCond != Cond) 682 return getSetCC(VT, N1, N2, NewCond); 683 } 684 685 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && 686 MVT::isInteger(N1.getValueType())) { 687 if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB || 688 N1.getOpcode() == ISD::XOR) { 689 // Simplify (X+Y) == (X+Z) --> Y == Z 690 if (N1.getOpcode() == N2.getOpcode()) { 691 if (N1.getOperand(0) == N2.getOperand(0)) 692 return getSetCC(VT, N1.getOperand(1), N2.getOperand(1), Cond); 693 if (N1.getOperand(1) == N2.getOperand(1)) 694 return getSetCC(VT, N1.getOperand(0), N2.getOperand(0), Cond); 695 if (isCommutativeBinOp(N1.getOpcode())) { 696 // If X op Y == Y op X, try other combinations. 697 if (N1.getOperand(0) == N2.getOperand(1)) 698 return getSetCC(VT, N1.getOperand(1), N2.getOperand(0), Cond); 699 if (N1.getOperand(1) == N2.getOperand(0)) 700 return getSetCC(VT, N1.getOperand(1), N2.getOperand(1), Cond); 701 } 702 } 703 704 // FIXME: move this stuff to the DAG Combiner when it exists! 705 706 // Simplify (X+Z) == X --> Z == 0 707 if (N1.getOperand(0) == N2) 708 return getSetCC(VT, N1.getOperand(1), 709 getConstant(0, N1.getValueType()), Cond); 710 if (N1.getOperand(1) == N2) { 711 if (isCommutativeBinOp(N1.getOpcode())) 712 return getSetCC(VT, N1.getOperand(0), 713 getConstant(0, N1.getValueType()), Cond); 714 else { 715 assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!"); 716 // (Z-X) == X --> Z == X<<1 717 return getSetCC(VT, N1.getOperand(0), 718 getNode(ISD::SHL, N2.getValueType(), 719 N2, getConstant(1, TLI.getShiftAmountTy())), 720 Cond); 721 } 722 } 723 } 724 725 if (N2.getOpcode() == ISD::ADD || N2.getOpcode() == ISD::SUB || 726 N2.getOpcode() == ISD::XOR) { 727 // Simplify X == (X+Z) --> Z == 0 728 if (N2.getOperand(0) == N1) { 729 return getSetCC(VT, N2.getOperand(1), 730 getConstant(0, N2.getValueType()), Cond); 731 } else if (N2.getOperand(1) == N1) { 732 if (isCommutativeBinOp(N2.getOpcode())) { 733 return getSetCC(VT, N2.getOperand(0), 734 getConstant(0, N2.getValueType()), Cond); 735 } else { 736 assert(N2.getOpcode() == ISD::SUB && "Unexpected operation!"); 737 // X == (Z-X) --> X<<1 == Z 738 return getSetCC(VT, getNode(ISD::SHL, N2.getValueType(), N1, 739 getConstant(1, TLI.getShiftAmountTy())), 740 N2.getOperand(0), Cond); 741 } 742 } 743 } 744 } 745 746 // Fold away ALL boolean setcc's. 747 if (N1.getValueType() == MVT::i1) { 748 switch (Cond) { 749 default: assert(0 && "Unknown integer setcc!"); 750 case ISD::SETEQ: // X == Y -> (X^Y)^1 751 N1 = getNode(ISD::XOR, MVT::i1, 752 getNode(ISD::XOR, MVT::i1, N1, N2), 753 getConstant(1, MVT::i1)); 754 break; 755 case ISD::SETNE: // X != Y --> (X^Y) 756 N1 = getNode(ISD::XOR, MVT::i1, N1, N2); 757 break; 758 case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> X^1 & Y 759 case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> X^1 & Y 760 N1 = getNode(ISD::AND, MVT::i1, N2, 761 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1))); 762 break; 763 case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> Y^1 & X 764 case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> Y^1 & X 765 N1 = getNode(ISD::AND, MVT::i1, N1, 766 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1))); 767 break; 768 case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> X^1 | Y 769 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> X^1 | Y 770 N1 = getNode(ISD::OR, MVT::i1, N2, 771 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1))); 772 break; 773 case ISD::SETUGE: // X >=u Y --> X == 1 | Y == 0 --> Y^1 | X 774 case ISD::SETLE: // X <=s Y --> X == 1 | Y == 0 --> Y^1 | X 775 N1 = getNode(ISD::OR, MVT::i1, N1, 776 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1))); 777 break; 778 } 779 if (VT != MVT::i1) 780 N1 = getNode(ISD::ZERO_EXTEND, VT, N1); 781 return N1; 782 } 783 784 // Could not fold it. 785 return SDOperand(); 786} 787 788SDOperand SelectionDAG::SimplifySelectCC(SDOperand N1, SDOperand N2, 789 SDOperand N3, SDOperand N4, 790 ISD::CondCode CC) { 791 MVT::ValueType VT = N3.getValueType(); 792 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 793 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val); 794 ConstantSDNode *N4C = dyn_cast<ConstantSDNode>(N4.Val); 795 796 // Check to see if we can simplify the select into an fabs node 797 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) { 798 // Allow either -0.0 or 0.0 799 if (CFP->getValue() == 0.0) { 800 // select (setg[te] X, +/-0.0), X, fneg(X) -> fabs 801 if ((CC == ISD::SETGE || CC == ISD::SETGT) && 802 N1 == N3 && N4.getOpcode() == ISD::FNEG && 803 N1 == N4.getOperand(0)) 804 return getNode(ISD::FABS, VT, N1); 805 806 // select (setl[te] X, +/-0.0), fneg(X), X -> fabs 807 if ((CC == ISD::SETLT || CC == ISD::SETLE) && 808 N1 == N4 && N3.getOpcode() == ISD::FNEG && 809 N3.getOperand(0) == N4) 810 return getNode(ISD::FABS, VT, N4); 811 } 812 } 813 814 // Check to see if we can perform the "gzip trick", transforming 815 // select_cc setlt X, 0, A, 0 -> and (sra X, size(X)-1), A 816 if (N2C && N2C->isNullValue() && N4C && N4C->isNullValue() && 817 MVT::isInteger(N1.getValueType()) && 818 MVT::isInteger(N3.getValueType()) && CC == ISD::SETLT) { 819 MVT::ValueType XType = N1.getValueType(); 820 MVT::ValueType AType = N3.getValueType(); 821 if (XType >= AType) { 822 // and (sra X, size(X)-1, A) -> "and (srl X, C2), A" iff A is a 823 // single-bit constant. FIXME: remove once the dag combiner 824 // exists. 825 if (N3C && ((N3C->getValue() & (N3C->getValue()-1)) == 0)) { 826 unsigned ShCtV = Log2_64(N3C->getValue()); 827 ShCtV = MVT::getSizeInBits(XType)-ShCtV-1; 828 SDOperand ShCt = getConstant(ShCtV, TLI.getShiftAmountTy()); 829 SDOperand Shift = getNode(ISD::SRL, XType, N1, ShCt); 830 if (XType > AType) 831 Shift = getNode(ISD::TRUNCATE, AType, Shift); 832 return getNode(ISD::AND, AType, Shift, N3); 833 } 834 SDOperand Shift = getNode(ISD::SRA, XType, N1, 835 getConstant(MVT::getSizeInBits(XType)-1, 836 TLI.getShiftAmountTy())); 837 if (XType > AType) 838 Shift = getNode(ISD::TRUNCATE, AType, Shift); 839 return getNode(ISD::AND, AType, Shift, N3); 840 } 841 } 842 843 // Check to see if this is an integer abs. select_cc setl[te] X, 0, -X, X -> 844 // Y = sra (X, size(X)-1); xor (add (X, Y), Y) 845 if (N2C && N2C->isNullValue() && (CC == ISD::SETLT || CC == ISD::SETLE) && 846 N1 == N4 && N3.getOpcode() == ISD::SUB && N1 == N3.getOperand(1)) { 847 if (ConstantSDNode *SubC = dyn_cast<ConstantSDNode>(N3.getOperand(0))) { 848 MVT::ValueType XType = N1.getValueType(); 849 if (SubC->isNullValue() && MVT::isInteger(XType)) { 850 SDOperand Shift = getNode(ISD::SRA, XType, N1, 851 getConstant(MVT::getSizeInBits(XType)-1, 852 TLI.getShiftAmountTy())); 853 return getNode(ISD::XOR, XType, getNode(ISD::ADD, XType, N1, Shift), 854 Shift); 855 } 856 } 857 } 858 859 // Could not fold it. 860 return SDOperand(); 861} 862 863/// getNode - Gets or creates the specified node. 864/// 865SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) { 866 SDNode *N = new SDNode(Opcode, VT); 867 AllNodes.push_back(N); 868 return SDOperand(N, 0); 869} 870 871SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 872 SDOperand Operand) { 873 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) { 874 uint64_t Val = C->getValue(); 875 switch (Opcode) { 876 default: break; 877 case ISD::SIGN_EXTEND: return getConstant(C->getSignExtended(), VT); 878 case ISD::ZERO_EXTEND: return getConstant(Val, VT); 879 case ISD::TRUNCATE: return getConstant(Val, VT); 880 case ISD::SINT_TO_FP: return getConstantFP(C->getSignExtended(), VT); 881 case ISD::UINT_TO_FP: return getConstantFP(C->getValue(), VT); 882 } 883 } 884 885 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val)) 886 switch (Opcode) { 887 case ISD::FNEG: 888 return getConstantFP(-C->getValue(), VT); 889 case ISD::FP_ROUND: 890 case ISD::FP_EXTEND: 891 return getConstantFP(C->getValue(), VT); 892 case ISD::FP_TO_SINT: 893 return getConstant((int64_t)C->getValue(), VT); 894 case ISD::FP_TO_UINT: 895 return getConstant((uint64_t)C->getValue(), VT); 896 } 897 898 unsigned OpOpcode = Operand.Val->getOpcode(); 899 switch (Opcode) { 900 case ISD::TokenFactor: 901 return Operand; // Factor of one node? No factor. 902 case ISD::SIGN_EXTEND: 903 if (Operand.getValueType() == VT) return Operand; // noop extension 904 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 905 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 906 break; 907 case ISD::ZERO_EXTEND: 908 if (Operand.getValueType() == VT) return Operand; // noop extension 909 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 910 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0)); 911 break; 912 case ISD::TRUNCATE: 913 if (Operand.getValueType() == VT) return Operand; // noop truncate 914 if (OpOpcode == ISD::TRUNCATE) 915 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 916 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) { 917 // If the source is smaller than the dest, we still need an extend. 918 if (Operand.Val->getOperand(0).getValueType() < VT) 919 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 920 else if (Operand.Val->getOperand(0).getValueType() > VT) 921 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 922 else 923 return Operand.Val->getOperand(0); 924 } 925 break; 926 case ISD::FNEG: 927 if (OpOpcode == ISD::SUB) // -(X-Y) -> (Y-X) 928 return getNode(ISD::SUB, VT, Operand.Val->getOperand(1), 929 Operand.Val->getOperand(0)); 930 if (OpOpcode == ISD::FNEG) // --X -> X 931 return Operand.Val->getOperand(0); 932 break; 933 case ISD::FABS: 934 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 935 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0)); 936 break; 937 } 938 939 SDNode *&N = UnaryOps[std::make_pair(Opcode, std::make_pair(Operand, VT))]; 940 if (N) return SDOperand(N, 0); 941 N = new SDNode(Opcode, Operand); 942 N->setValueTypes(VT); 943 AllNodes.push_back(N); 944 return SDOperand(N, 0); 945} 946 947/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 948/// this predicate to simplify operations downstream. V and Mask are known to 949/// be the same type. 950static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask, 951 const TargetLowering &TLI) { 952 unsigned SrcBits; 953 if (Mask == 0) return true; 954 955 // If we know the result of a setcc has the top bits zero, use this info. 956 switch (Op.getOpcode()) { 957 case ISD::Constant: 958 return (cast<ConstantSDNode>(Op)->getValue() & Mask) == 0; 959 960 case ISD::SETCC: 961 return ((Mask & 1) == 0) && 962 TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult; 963 964 case ISD::ZEXTLOAD: 965 SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(3))->getVT()); 966 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits. 967 case ISD::ZERO_EXTEND: 968 SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType()); 969 return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI); 970 971 case ISD::AND: 972 // (X & C1) & C2 == 0 iff C1 & C2 == 0. 973 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 974 return MaskedValueIsZero(Op.getOperand(0),AndRHS->getValue() & Mask, TLI); 975 976 // FALL THROUGH 977 case ISD::OR: 978 case ISD::XOR: 979 return MaskedValueIsZero(Op.getOperand(0), Mask, TLI) && 980 MaskedValueIsZero(Op.getOperand(1), Mask, TLI); 981 case ISD::SELECT: 982 return MaskedValueIsZero(Op.getOperand(1), Mask, TLI) && 983 MaskedValueIsZero(Op.getOperand(2), Mask, TLI); 984 985 case ISD::SRL: 986 // (ushr X, C1) & C2 == 0 iff X & (C2 << C1) == 0 987 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 988 uint64_t NewVal = Mask << ShAmt->getValue(); 989 SrcBits = MVT::getSizeInBits(Op.getValueType()); 990 if (SrcBits != 64) NewVal &= (1ULL << SrcBits)-1; 991 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI); 992 } 993 return false; 994 case ISD::SHL: 995 // (ushl X, C1) & C2 == 0 iff X & (C2 >> C1) == 0 996 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 997 uint64_t NewVal = Mask >> ShAmt->getValue(); 998 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI); 999 } 1000 return false; 1001 // TODO we could handle some SRA cases here. 1002 default: break; 1003 } 1004 1005 return false; 1006} 1007 1008 1009 1010SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1011 SDOperand N1, SDOperand N2) { 1012#ifndef NDEBUG 1013 switch (Opcode) { 1014 case ISD::TokenFactor: 1015 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 1016 N2.getValueType() == MVT::Other && "Invalid token factor!"); 1017 break; 1018 case ISD::AND: 1019 case ISD::OR: 1020 case ISD::XOR: 1021 case ISD::UDIV: 1022 case ISD::UREM: 1023 case ISD::MULHU: 1024 case ISD::MULHS: 1025 assert(MVT::isInteger(VT) && "This operator does not apply to FP types!"); 1026 // fall through 1027 case ISD::ADD: 1028 case ISD::SUB: 1029 case ISD::MUL: 1030 case ISD::SDIV: 1031 case ISD::SREM: 1032 assert(N1.getValueType() == N2.getValueType() && 1033 N1.getValueType() == VT && "Binary operator types must match!"); 1034 break; 1035 1036 case ISD::SHL: 1037 case ISD::SRA: 1038 case ISD::SRL: 1039 assert(VT == N1.getValueType() && 1040 "Shift operators return type must be the same as their first arg"); 1041 assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) && 1042 VT != MVT::i1 && "Shifts only work on integers"); 1043 break; 1044 case ISD::FP_ROUND_INREG: { 1045 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT(); 1046 assert(VT == N1.getValueType() && "Not an inreg round!"); 1047 assert(MVT::isFloatingPoint(VT) && MVT::isFloatingPoint(EVT) && 1048 "Cannot FP_ROUND_INREG integer types"); 1049 assert(EVT <= VT && "Not rounding down!"); 1050 break; 1051 } 1052 case ISD::SIGN_EXTEND_INREG: { 1053 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT(); 1054 assert(VT == N1.getValueType() && "Not an inreg extend!"); 1055 assert(MVT::isInteger(VT) && MVT::isInteger(EVT) && 1056 "Cannot *_EXTEND_INREG FP types"); 1057 assert(EVT <= VT && "Not extending!"); 1058 } 1059 1060 default: break; 1061 } 1062#endif 1063 1064 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 1065 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 1066 if (N1C) { 1067 if (N2C) { 1068 uint64_t C1 = N1C->getValue(), C2 = N2C->getValue(); 1069 switch (Opcode) { 1070 case ISD::ADD: return getConstant(C1 + C2, VT); 1071 case ISD::SUB: return getConstant(C1 - C2, VT); 1072 case ISD::MUL: return getConstant(C1 * C2, VT); 1073 case ISD::UDIV: 1074 if (C2) return getConstant(C1 / C2, VT); 1075 break; 1076 case ISD::UREM : 1077 if (C2) return getConstant(C1 % C2, VT); 1078 break; 1079 case ISD::SDIV : 1080 if (C2) return getConstant(N1C->getSignExtended() / 1081 N2C->getSignExtended(), VT); 1082 break; 1083 case ISD::SREM : 1084 if (C2) return getConstant(N1C->getSignExtended() % 1085 N2C->getSignExtended(), VT); 1086 break; 1087 case ISD::AND : return getConstant(C1 & C2, VT); 1088 case ISD::OR : return getConstant(C1 | C2, VT); 1089 case ISD::XOR : return getConstant(C1 ^ C2, VT); 1090 case ISD::SHL : return getConstant(C1 << (int)C2, VT); 1091 case ISD::SRL : return getConstant(C1 >> (unsigned)C2, VT); 1092 case ISD::SRA : return getConstant(N1C->getSignExtended() >>(int)C2, VT); 1093 default: break; 1094 } 1095 1096 } else { // Cannonicalize constant to RHS if commutative 1097 if (isCommutativeBinOp(Opcode)) { 1098 std::swap(N1C, N2C); 1099 std::swap(N1, N2); 1100 } 1101 } 1102 1103 switch (Opcode) { 1104 default: break; 1105 case ISD::SHL: // shl 0, X -> 0 1106 if (N1C->isNullValue()) return N1; 1107 break; 1108 case ISD::SRL: // srl 0, X -> 0 1109 if (N1C->isNullValue()) return N1; 1110 break; 1111 case ISD::SRA: // sra -1, X -> -1 1112 if (N1C->isAllOnesValue()) return N1; 1113 break; 1114 case ISD::SIGN_EXTEND_INREG: // SIGN_EXTEND_INREG N1C, EVT 1115 // Extending a constant? Just return the extended constant. 1116 SDOperand Tmp = getNode(ISD::TRUNCATE, cast<VTSDNode>(N2)->getVT(), N1); 1117 return getNode(ISD::SIGN_EXTEND, VT, Tmp); 1118 } 1119 } 1120 1121 if (N2C) { 1122 uint64_t C2 = N2C->getValue(); 1123 1124 switch (Opcode) { 1125 case ISD::ADD: 1126 if (!C2) return N1; // add X, 0 -> X 1127 break; 1128 case ISD::SUB: 1129 if (!C2) return N1; // sub X, 0 -> X 1130 return getNode(ISD::ADD, VT, N1, getConstant(-C2, VT)); 1131 case ISD::MUL: 1132 if (!C2) return N2; // mul X, 0 -> 0 1133 if (N2C->isAllOnesValue()) // mul X, -1 -> 0-X 1134 return getNode(ISD::SUB, VT, getConstant(0, VT), N1); 1135 1136 // FIXME: Move this to the DAG combiner when it exists. 1137 if ((C2 & C2-1) == 0) { 1138 SDOperand ShAmt = getConstant(Log2_64(C2), TLI.getShiftAmountTy()); 1139 return getNode(ISD::SHL, VT, N1, ShAmt); 1140 } 1141 break; 1142 1143 case ISD::MULHU: 1144 case ISD::MULHS: 1145 if (!C2) return N2; // mul X, 0 -> 0 1146 1147 if (C2 == 1) // 0X*01 -> 0X hi(0X) == 0 1148 return getConstant(0, VT); 1149 1150 // Many others could be handled here, including -1, powers of 2, etc. 1151 break; 1152 1153 case ISD::UDIV: 1154 // FIXME: Move this to the DAG combiner when it exists. 1155 if ((C2 & C2-1) == 0 && C2) { 1156 SDOperand ShAmt = getConstant(Log2_64(C2), TLI.getShiftAmountTy()); 1157 return getNode(ISD::SRL, VT, N1, ShAmt); 1158 } 1159 break; 1160 1161 case ISD::SHL: 1162 case ISD::SRL: 1163 case ISD::SRA: 1164 // If the shift amount is bigger than the size of the data, then all the 1165 // bits are shifted out. Simplify to undef. 1166 if (C2 >= MVT::getSizeInBits(N1.getValueType())) { 1167 return getNode(ISD::UNDEF, N1.getValueType()); 1168 } 1169 if (C2 == 0) return N1; 1170 1171 if (Opcode == ISD::SRA) { 1172 // If the sign bit is known to be zero, switch this to a SRL. 1173 if (MaskedValueIsZero(N1, 1174 1ULL << MVT::getSizeInBits(N1.getValueType())-1, 1175 TLI)) 1176 return getNode(ISD::SRL, N1.getValueType(), N1, N2); 1177 } else { 1178 // If the part left over is known to be zero, the whole thing is zero. 1179 uint64_t TypeMask = ~0ULL >> (64-MVT::getSizeInBits(N1.getValueType())); 1180 if (Opcode == ISD::SRL) { 1181 if (MaskedValueIsZero(N1, TypeMask << C2, TLI)) 1182 return getConstant(0, N1.getValueType()); 1183 } else if (Opcode == ISD::SHL) { 1184 if (MaskedValueIsZero(N1, TypeMask >> C2, TLI)) 1185 return getConstant(0, N1.getValueType()); 1186 } 1187 } 1188 1189 if (Opcode == ISD::SHL && N1.getNumOperands() == 2) 1190 if (ConstantSDNode *OpSA = dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 1191 unsigned OpSAC = OpSA->getValue(); 1192 if (N1.getOpcode() == ISD::SHL) { 1193 if (C2+OpSAC >= MVT::getSizeInBits(N1.getValueType())) 1194 return getConstant(0, N1.getValueType()); 1195 return getNode(ISD::SHL, N1.getValueType(), N1.getOperand(0), 1196 getConstant(C2+OpSAC, N2.getValueType())); 1197 } else if (N1.getOpcode() == ISD::SRL) { 1198 // (X >> C1) << C2: if C2 > C1, ((X & ~0<<C1) << C2-C1) 1199 SDOperand Mask = getNode(ISD::AND, VT, N1.getOperand(0), 1200 getConstant(~0ULL << OpSAC, VT)); 1201 if (C2 > OpSAC) { 1202 return getNode(ISD::SHL, VT, Mask, 1203 getConstant(C2-OpSAC, N2.getValueType())); 1204 } else { 1205 // (X >> C1) << C2: if C2 <= C1, ((X & ~0<<C1) >> C1-C2) 1206 return getNode(ISD::SRL, VT, Mask, 1207 getConstant(OpSAC-C2, N2.getValueType())); 1208 } 1209 } else if (N1.getOpcode() == ISD::SRA) { 1210 // if C1 == C2, just mask out low bits. 1211 if (C2 == OpSAC) 1212 return getNode(ISD::AND, VT, N1.getOperand(0), 1213 getConstant(~0ULL << C2, VT)); 1214 } 1215 } 1216 break; 1217 1218 case ISD::AND: 1219 if (!C2) return N2; // X and 0 -> 0 1220 if (N2C->isAllOnesValue()) 1221 return N1; // X and -1 -> X 1222 1223 if (MaskedValueIsZero(N1, C2, TLI)) // X and 0 -> 0 1224 return getConstant(0, VT); 1225 1226 { 1227 uint64_t NotC2 = ~C2; 1228 if (VT != MVT::i64) 1229 NotC2 &= (1ULL << MVT::getSizeInBits(VT))-1; 1230 1231 if (MaskedValueIsZero(N1, NotC2, TLI)) 1232 return N1; // if (X & ~C2) -> 0, the and is redundant 1233 } 1234 1235 // FIXME: Should add a corresponding version of this for 1236 // ZERO_EXTEND/SIGN_EXTEND by converting them to an ANY_EXTEND node which 1237 // we don't have yet. 1238 1239 // and (sign_extend_inreg x:16:32), 1 -> and x, 1 1240 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) { 1241 // If we are masking out the part of our input that was extended, just 1242 // mask the input to the extension directly. 1243 unsigned ExtendBits = 1244 MVT::getSizeInBits(cast<VTSDNode>(N1.getOperand(1))->getVT()); 1245 if ((C2 & (~0ULL << ExtendBits)) == 0) 1246 return getNode(ISD::AND, VT, N1.getOperand(0), N2); 1247 } else if (N1.getOpcode() == ISD::OR) { 1248 if (ConstantSDNode *ORI = dyn_cast<ConstantSDNode>(N1.getOperand(1))) 1249 if ((ORI->getValue() & C2) == C2) { 1250 // If the 'or' is setting all of the bits that we are masking for, 1251 // we know the result of the AND will be the AND mask itself. 1252 return N2; 1253 } 1254 } 1255 break; 1256 case ISD::OR: 1257 if (!C2)return N1; // X or 0 -> X 1258 if (N2C->isAllOnesValue()) 1259 return N2; // X or -1 -> -1 1260 break; 1261 case ISD::XOR: 1262 if (!C2) return N1; // X xor 0 -> X 1263 if (N2C->isAllOnesValue()) { 1264 if (N1.Val->getOpcode() == ISD::SETCC){ 1265 SDNode *SetCC = N1.Val; 1266 // !(X op Y) -> (X !op Y) 1267 bool isInteger = MVT::isInteger(SetCC->getOperand(0).getValueType()); 1268 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC->getOperand(2))->get(); 1269 return getSetCC(SetCC->getValueType(0), 1270 SetCC->getOperand(0), SetCC->getOperand(1), 1271 ISD::getSetCCInverse(CC, isInteger)); 1272 } else if (N1.getOpcode() == ISD::AND || N1.getOpcode() == ISD::OR) { 1273 SDNode *Op = N1.Val; 1274 // !(X or Y) -> (!X and !Y) iff X or Y are freely invertible 1275 // !(X and Y) -> (!X or !Y) iff X or Y are freely invertible 1276 SDOperand LHS = Op->getOperand(0), RHS = Op->getOperand(1); 1277 if (isInvertibleForFree(RHS) || isInvertibleForFree(LHS)) { 1278 LHS = getNode(ISD::XOR, VT, LHS, N2); // RHS = ~LHS 1279 RHS = getNode(ISD::XOR, VT, RHS, N2); // RHS = ~RHS 1280 if (Op->getOpcode() == ISD::AND) 1281 return getNode(ISD::OR, VT, LHS, RHS); 1282 return getNode(ISD::AND, VT, LHS, RHS); 1283 } 1284 } 1285 // X xor -1 -> not(x) ? 1286 } 1287 break; 1288 } 1289 1290 // Reassociate ((X op C1) op C2) if possible. 1291 if (N1.getOpcode() == Opcode && isAssociativeBinOp(Opcode)) 1292 if (ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N1.Val->getOperand(1))) 1293 return getNode(Opcode, VT, N1.Val->getOperand(0), 1294 getNode(Opcode, VT, N2, N1.Val->getOperand(1))); 1295 } 1296 1297 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val); 1298 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val); 1299 if (N1CFP) { 1300 if (N2CFP) { 1301 double C1 = N1CFP->getValue(), C2 = N2CFP->getValue(); 1302 switch (Opcode) { 1303 case ISD::ADD: return getConstantFP(C1 + C2, VT); 1304 case ISD::SUB: return getConstantFP(C1 - C2, VT); 1305 case ISD::MUL: return getConstantFP(C1 * C2, VT); 1306 case ISD::SDIV: 1307 if (C2) return getConstantFP(C1 / C2, VT); 1308 break; 1309 case ISD::SREM : 1310 if (C2) return getConstantFP(fmod(C1, C2), VT); 1311 break; 1312 default: break; 1313 } 1314 1315 } else { // Cannonicalize constant to RHS if commutative 1316 if (isCommutativeBinOp(Opcode)) { 1317 std::swap(N1CFP, N2CFP); 1318 std::swap(N1, N2); 1319 } 1320 } 1321 1322 if (Opcode == ISD::FP_ROUND_INREG) 1323 return getNode(ISD::FP_EXTEND, VT, 1324 getNode(ISD::FP_ROUND, cast<VTSDNode>(N2)->getVT(), N1)); 1325 } 1326 1327 // Finally, fold operations that do not require constants. 1328 switch (Opcode) { 1329 case ISD::TokenFactor: 1330 if (N1.getOpcode() == ISD::EntryToken) 1331 return N2; 1332 if (N2.getOpcode() == ISD::EntryToken) 1333 return N1; 1334 break; 1335 1336 case ISD::AND: 1337 case ISD::OR: 1338 if (N1.Val->getOpcode() == ISD::SETCC && N2.Val->getOpcode() == ISD::SETCC){ 1339 SDNode *LHS = N1.Val, *RHS = N2.Val; 1340 SDOperand LL = LHS->getOperand(0), RL = RHS->getOperand(0); 1341 SDOperand LR = LHS->getOperand(1), RR = RHS->getOperand(1); 1342 ISD::CondCode Op1 = cast<CondCodeSDNode>(LHS->getOperand(2))->get(); 1343 ISD::CondCode Op2 = cast<CondCodeSDNode>(RHS->getOperand(2))->get(); 1344 1345 if (LR == RR && isa<ConstantSDNode>(LR) && 1346 Op2 == Op1 && MVT::isInteger(LL.getValueType())) { 1347 // (X != 0) | (Y != 0) -> (X|Y != 0) 1348 // (X == 0) & (Y == 0) -> (X|Y == 0) 1349 // (X < 0) | (Y < 0) -> (X|Y < 0) 1350 if (cast<ConstantSDNode>(LR)->getValue() == 0 && 1351 ((Op2 == ISD::SETEQ && Opcode == ISD::AND) || 1352 (Op2 == ISD::SETNE && Opcode == ISD::OR) || 1353 (Op2 == ISD::SETLT && Opcode == ISD::OR))) 1354 return getSetCC(VT, getNode(ISD::OR, LR.getValueType(), LL, RL), LR, 1355 Op2); 1356 1357 if (cast<ConstantSDNode>(LR)->isAllOnesValue()) { 1358 // (X == -1) & (Y == -1) -> (X&Y == -1) 1359 // (X != -1) | (Y != -1) -> (X&Y != -1) 1360 // (X > -1) | (Y > -1) -> (X&Y > -1) 1361 if ((Opcode == ISD::AND && Op2 == ISD::SETEQ) || 1362 (Opcode == ISD::OR && Op2 == ISD::SETNE) || 1363 (Opcode == ISD::OR && Op2 == ISD::SETGT)) 1364 return getSetCC(VT, getNode(ISD::AND, LR.getValueType(), LL, RL), 1365 LR, Op2); 1366 // (X > -1) & (Y > -1) -> (X|Y > -1) 1367 if (Opcode == ISD::AND && Op2 == ISD::SETGT) 1368 return getSetCC(VT, getNode(ISD::OR, LR.getValueType(), LL, RL), 1369 LR, Op2); 1370 } 1371 } 1372 1373 // (X op1 Y) | (Y op2 X) -> (X op1 Y) | (X swapop2 Y) 1374 if (LL == RR && LR == RL) { 1375 Op2 = ISD::getSetCCSwappedOperands(Op2); 1376 goto MatchedBackwards; 1377 } 1378 1379 if (LL == RL && LR == RR) { 1380 MatchedBackwards: 1381 ISD::CondCode Result; 1382 bool isInteger = MVT::isInteger(LL.getValueType()); 1383 if (Opcode == ISD::OR) 1384 Result = ISD::getSetCCOrOperation(Op1, Op2, isInteger); 1385 else 1386 Result = ISD::getSetCCAndOperation(Op1, Op2, isInteger); 1387 1388 if (Result != ISD::SETCC_INVALID) 1389 return getSetCC(LHS->getValueType(0), LL, LR, Result); 1390 } 1391 } 1392 1393 // and/or zext(a), zext(b) -> zext(and/or a, b) 1394 if (N1.getOpcode() == ISD::ZERO_EXTEND && 1395 N2.getOpcode() == ISD::ZERO_EXTEND && 1396 N1.getOperand(0).getValueType() == N2.getOperand(0).getValueType()) 1397 return getNode(ISD::ZERO_EXTEND, VT, 1398 getNode(Opcode, N1.getOperand(0).getValueType(), 1399 N1.getOperand(0), N2.getOperand(0))); 1400 break; 1401 case ISD::XOR: 1402 if (N1 == N2) return getConstant(0, VT); // xor X, Y -> 0 1403 break; 1404 case ISD::ADD: 1405 if (N2.getOpcode() == ISD::FNEG) // (A+ (-B) -> A-B 1406 return getNode(ISD::SUB, VT, N1, N2.getOperand(0)); 1407 if (N1.getOpcode() == ISD::FNEG) // ((-A)+B) -> B-A 1408 return getNode(ISD::SUB, VT, N2, N1.getOperand(0)); 1409 if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) && 1410 cast<ConstantSDNode>(N1.getOperand(0))->getValue() == 0) 1411 return getNode(ISD::SUB, VT, N2, N1.getOperand(1)); // (0-A)+B -> B-A 1412 if (N2.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N2.getOperand(0)) && 1413 cast<ConstantSDNode>(N2.getOperand(0))->getValue() == 0) 1414 return getNode(ISD::SUB, VT, N1, N2.getOperand(1)); // A+(0-B) -> A-B 1415 if (N2.getOpcode() == ISD::SUB && N1 == N2.Val->getOperand(1) && 1416 !MVT::isFloatingPoint(N2.getValueType())) 1417 return N2.Val->getOperand(0); // A+(B-A) -> B 1418 break; 1419 case ISD::SUB: 1420 if (N1.getOpcode() == ISD::ADD) { 1421 if (N1.Val->getOperand(0) == N2 && 1422 !MVT::isFloatingPoint(N2.getValueType())) 1423 return N1.Val->getOperand(1); // (A+B)-A == B 1424 if (N1.Val->getOperand(1) == N2 && 1425 !MVT::isFloatingPoint(N2.getValueType())) 1426 return N1.Val->getOperand(0); // (A+B)-B == A 1427 } 1428 if (N2.getOpcode() == ISD::FNEG) // (A- (-B) -> A+B 1429 return getNode(ISD::ADD, VT, N1, N2.getOperand(0)); 1430 break; 1431 case ISD::FP_ROUND_INREG: 1432 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 1433 break; 1434 case ISD::SIGN_EXTEND_INREG: { 1435 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT(); 1436 if (EVT == VT) return N1; // Not actually extending 1437 1438 // If we are sign extending an extension, use the original source. 1439 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) 1440 if (cast<VTSDNode>(N1.getOperand(1))->getVT() <= EVT) 1441 return N1; 1442 1443 // If we are sign extending a sextload, return just the load. 1444 if (N1.getOpcode() == ISD::SEXTLOAD) 1445 if (cast<VTSDNode>(N1.getOperand(3))->getVT() <= EVT) 1446 return N1; 1447 1448 // If we are extending the result of a setcc, and we already know the 1449 // contents of the top bits, eliminate the extension. 1450 if (N1.getOpcode() == ISD::SETCC && 1451 TLI.getSetCCResultContents() == 1452 TargetLowering::ZeroOrNegativeOneSetCCResult) 1453 return N1; 1454 1455 // If we are sign extending the result of an (and X, C) operation, and we 1456 // know the extended bits are zeros already, don't do the extend. 1457 if (N1.getOpcode() == ISD::AND) 1458 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 1459 uint64_t Mask = N1C->getValue(); 1460 unsigned NumBits = MVT::getSizeInBits(EVT); 1461 if ((Mask & (~0ULL << (NumBits-1))) == 0) 1462 return N1; 1463 } 1464 break; 1465 } 1466 1467 // FIXME: figure out how to safely handle things like 1468 // int foo(int x) { return 1 << (x & 255); } 1469 // int bar() { return foo(256); } 1470#if 0 1471 case ISD::SHL: 1472 case ISD::SRL: 1473 case ISD::SRA: 1474 if (N2.getOpcode() == ISD::SIGN_EXTEND_INREG && 1475 cast<VTSDNode>(N2.getOperand(1))->getVT() != MVT::i1) 1476 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1477 else if (N2.getOpcode() == ISD::AND) 1478 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N2.getOperand(1))) { 1479 // If the and is only masking out bits that cannot effect the shift, 1480 // eliminate the and. 1481 unsigned NumBits = MVT::getSizeInBits(VT); 1482 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 1483 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1484 } 1485 break; 1486#endif 1487 } 1488 1489 // Memoize this node if possible. 1490 SDNode *N; 1491 if (Opcode != ISD::CALLSEQ_START && Opcode != ISD::CALLSEQ_END) { 1492 SDNode *&BON = BinaryOps[std::make_pair(Opcode, std::make_pair(N1, N2))]; 1493 if (BON) return SDOperand(BON, 0); 1494 1495 BON = N = new SDNode(Opcode, N1, N2); 1496 } else { 1497 N = new SDNode(Opcode, N1, N2); 1498 } 1499 1500 N->setValueTypes(VT); 1501 AllNodes.push_back(N); 1502 return SDOperand(N, 0); 1503} 1504 1505// setAdjCallChain - This method changes the token chain of an 1506// CALLSEQ_START/END node to be the specified operand. 1507void SDNode::setAdjCallChain(SDOperand N) { 1508 assert(N.getValueType() == MVT::Other); 1509 assert((getOpcode() == ISD::CALLSEQ_START || 1510 getOpcode() == ISD::CALLSEQ_END) && "Cannot adjust this node!"); 1511 1512 Operands[0].Val->removeUser(this); 1513 Operands[0] = N; 1514 N.Val->Uses.push_back(this); 1515} 1516 1517 1518 1519SDOperand SelectionDAG::getLoad(MVT::ValueType VT, 1520 SDOperand Chain, SDOperand Ptr, 1521 SDOperand SV) { 1522 SDNode *&N = Loads[std::make_pair(Ptr, std::make_pair(Chain, VT))]; 1523 if (N) return SDOperand(N, 0); 1524 N = new SDNode(ISD::LOAD, Chain, Ptr, SV); 1525 1526 // Loads have a token chain. 1527 N->setValueTypes(VT, MVT::Other); 1528 AllNodes.push_back(N); 1529 return SDOperand(N, 0); 1530} 1531 1532 1533SDOperand SelectionDAG::getExtLoad(unsigned Opcode, MVT::ValueType VT, 1534 SDOperand Chain, SDOperand Ptr, SDOperand SV, 1535 MVT::ValueType EVT) { 1536 std::vector<SDOperand> Ops; 1537 Ops.reserve(4); 1538 Ops.push_back(Chain); 1539 Ops.push_back(Ptr); 1540 Ops.push_back(SV); 1541 Ops.push_back(getValueType(EVT)); 1542 std::vector<MVT::ValueType> VTs; 1543 VTs.reserve(2); 1544 VTs.push_back(VT); VTs.push_back(MVT::Other); // Add token chain. 1545 return getNode(Opcode, VTs, Ops); 1546} 1547 1548SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1549 SDOperand N1, SDOperand N2, SDOperand N3) { 1550 // Perform various simplifications. 1551 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 1552 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 1553 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val); 1554 switch (Opcode) { 1555 case ISD::SETCC: { 1556 // Use SimplifySetCC to simplify SETCC's. 1557 SDOperand Simp = SimplifySetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 1558 if (Simp.Val) return Simp; 1559 break; 1560 } 1561 case ISD::SELECT: 1562 if (N1C) 1563 if (N1C->getValue()) 1564 return N2; // select true, X, Y -> X 1565 else 1566 return N3; // select false, X, Y -> Y 1567 1568 if (N2 == N3) return N2; // select C, X, X -> X 1569 1570 if (VT == MVT::i1) { // Boolean SELECT 1571 if (N2C) { 1572 if (N2C->getValue()) // select C, 1, X -> C | X 1573 return getNode(ISD::OR, VT, N1, N3); 1574 else // select C, 0, X -> ~C & X 1575 return getNode(ISD::AND, VT, 1576 getNode(ISD::XOR, N1.getValueType(), N1, 1577 getConstant(1, N1.getValueType())), N3); 1578 } else if (N3C) { 1579 if (N3C->getValue()) // select C, X, 1 -> ~C | X 1580 return getNode(ISD::OR, VT, 1581 getNode(ISD::XOR, N1.getValueType(), N1, 1582 getConstant(1, N1.getValueType())), N2); 1583 else // select C, X, 0 -> C & X 1584 return getNode(ISD::AND, VT, N1, N2); 1585 } 1586 1587 if (N1 == N2) // X ? X : Y --> X ? 1 : Y --> X | Y 1588 return getNode(ISD::OR, VT, N1, N3); 1589 if (N1 == N3) // X ? Y : X --> X ? Y : 0 --> X & Y 1590 return getNode(ISD::AND, VT, N1, N2); 1591 } 1592 if (N1.getOpcode() == ISD::SETCC) { 1593 SDOperand Simp = SimplifySelectCC(N1.getOperand(0), N1.getOperand(1), N2, 1594 N3, cast<CondCodeSDNode>(N1.getOperand(2))->get()); 1595 if (Simp.Val) return Simp; 1596 } 1597 break; 1598 case ISD::BRCOND: 1599 if (N2C) 1600 if (N2C->getValue()) // Unconditional branch 1601 return getNode(ISD::BR, MVT::Other, N1, N3); 1602 else 1603 return N1; // Never-taken branch 1604 break; 1605 } 1606 1607 std::vector<SDOperand> Ops; 1608 Ops.reserve(3); 1609 Ops.push_back(N1); 1610 Ops.push_back(N2); 1611 Ops.push_back(N3); 1612 1613 // Memoize nodes. 1614 SDNode *&N = OneResultNodes[std::make_pair(Opcode, std::make_pair(VT, Ops))]; 1615 if (N) return SDOperand(N, 0); 1616 1617 N = new SDNode(Opcode, N1, N2, N3); 1618 N->setValueTypes(VT); 1619 AllNodes.push_back(N); 1620 return SDOperand(N, 0); 1621} 1622 1623SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1624 SDOperand N1, SDOperand N2, SDOperand N3, 1625 SDOperand N4) { 1626 std::vector<SDOperand> Ops; 1627 Ops.reserve(4); 1628 Ops.push_back(N1); 1629 Ops.push_back(N2); 1630 Ops.push_back(N3); 1631 Ops.push_back(N4); 1632 return getNode(Opcode, VT, Ops); 1633} 1634 1635SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1636 SDOperand N1, SDOperand N2, SDOperand N3, 1637 SDOperand N4, SDOperand N5) { 1638 if (ISD::SELECT_CC == Opcode) { 1639 assert(N1.getValueType() == N2.getValueType() && 1640 "LHS and RHS of condition must have same type!"); 1641 assert(N3.getValueType() == N4.getValueType() && 1642 "True and False arms of SelectCC must have same type!"); 1643 assert(N3.getValueType() == VT && 1644 "select_cc node must be of same type as true and false value!"); 1645 SDOperand Simp = SimplifySelectCC(N1, N2, N3, N4, 1646 cast<CondCodeSDNode>(N5)->get()); 1647 if (Simp.Val) return Simp; 1648 } 1649 1650 std::vector<SDOperand> Ops; 1651 Ops.reserve(5); 1652 Ops.push_back(N1); 1653 Ops.push_back(N2); 1654 Ops.push_back(N3); 1655 Ops.push_back(N4); 1656 Ops.push_back(N5); 1657 return getNode(Opcode, VT, Ops); 1658} 1659 1660 1661SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) { 1662 assert((!V || isa<PointerType>(V->getType())) && 1663 "SrcValue is not a pointer?"); 1664 SDNode *&N = ValueNodes[std::make_pair(V, Offset)]; 1665 if (N) return SDOperand(N, 0); 1666 1667 N = new SrcValueSDNode(V, Offset); 1668 AllNodes.push_back(N); 1669 return SDOperand(N, 0); 1670} 1671 1672SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1673 std::vector<SDOperand> &Ops) { 1674 switch (Ops.size()) { 1675 case 0: return getNode(Opcode, VT); 1676 case 1: return getNode(Opcode, VT, Ops[0]); 1677 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 1678 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 1679 default: break; 1680 } 1681 1682 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(Ops[1].Val); 1683 switch (Opcode) { 1684 default: break; 1685 case ISD::BRCONDTWOWAY: 1686 if (N1C) 1687 if (N1C->getValue()) // Unconditional branch to true dest. 1688 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[2]); 1689 else // Unconditional branch to false dest. 1690 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[3]); 1691 break; 1692 case ISD::BRTWOWAY_CC: 1693 assert(Ops.size() == 6 && "BRTWOWAY_CC takes 6 operands!"); 1694 assert(Ops[2].getValueType() == Ops[3].getValueType() && 1695 "LHS and RHS of comparison must have same type!"); 1696 break; 1697 case ISD::TRUNCSTORE: { 1698 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!"); 1699 MVT::ValueType EVT = cast<VTSDNode>(Ops[4])->getVT(); 1700#if 0 // FIXME: If the target supports EVT natively, convert to a truncate/store 1701 // If this is a truncating store of a constant, convert to the desired type 1702 // and store it instead. 1703 if (isa<Constant>(Ops[0])) { 1704 SDOperand Op = getNode(ISD::TRUNCATE, EVT, N1); 1705 if (isa<Constant>(Op)) 1706 N1 = Op; 1707 } 1708 // Also for ConstantFP? 1709#endif 1710 if (Ops[0].getValueType() == EVT) // Normal store? 1711 return getNode(ISD::STORE, VT, Ops[0], Ops[1], Ops[2], Ops[3]); 1712 assert(Ops[1].getValueType() > EVT && "Not a truncation?"); 1713 assert(MVT::isInteger(Ops[1].getValueType()) == MVT::isInteger(EVT) && 1714 "Can't do FP-INT conversion!"); 1715 break; 1716 } 1717 } 1718 1719 // Memoize nodes. 1720 SDNode *&N = OneResultNodes[std::make_pair(Opcode, std::make_pair(VT, Ops))]; 1721 if (N) return SDOperand(N, 0); 1722 N = new SDNode(Opcode, Ops); 1723 N->setValueTypes(VT); 1724 AllNodes.push_back(N); 1725 return SDOperand(N, 0); 1726} 1727 1728SDOperand SelectionDAG::getNode(unsigned Opcode, 1729 std::vector<MVT::ValueType> &ResultTys, 1730 std::vector<SDOperand> &Ops) { 1731 if (ResultTys.size() == 1) 1732 return getNode(Opcode, ResultTys[0], Ops); 1733 1734 switch (Opcode) { 1735 case ISD::EXTLOAD: 1736 case ISD::SEXTLOAD: 1737 case ISD::ZEXTLOAD: { 1738 MVT::ValueType EVT = cast<VTSDNode>(Ops[3])->getVT(); 1739 assert(Ops.size() == 4 && ResultTys.size() == 2 && "Bad *EXTLOAD!"); 1740 // If they are asking for an extending load from/to the same thing, return a 1741 // normal load. 1742 if (ResultTys[0] == EVT) 1743 return getLoad(ResultTys[0], Ops[0], Ops[1], Ops[2]); 1744 assert(EVT < ResultTys[0] && 1745 "Should only be an extending load, not truncating!"); 1746 assert((Opcode == ISD::EXTLOAD || MVT::isInteger(ResultTys[0])) && 1747 "Cannot sign/zero extend a FP load!"); 1748 assert(MVT::isInteger(ResultTys[0]) == MVT::isInteger(EVT) && 1749 "Cannot convert from FP to Int or Int -> FP!"); 1750 break; 1751 } 1752 1753 // FIXME: figure out how to safely handle things like 1754 // int foo(int x) { return 1 << (x & 255); } 1755 // int bar() { return foo(256); } 1756#if 0 1757 case ISD::SRA_PARTS: 1758 case ISD::SRL_PARTS: 1759 case ISD::SHL_PARTS: 1760 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 1761 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 1762 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 1763 else if (N3.getOpcode() == ISD::AND) 1764 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 1765 // If the and is only masking out bits that cannot effect the shift, 1766 // eliminate the and. 1767 unsigned NumBits = MVT::getSizeInBits(VT)*2; 1768 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 1769 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 1770 } 1771 break; 1772#endif 1773 } 1774 1775 // Memoize the node. 1776 SDNode *&N = ArbitraryNodes[std::make_pair(Opcode, std::make_pair(ResultTys, 1777 Ops))]; 1778 if (N) return SDOperand(N, 0); 1779 N = new SDNode(Opcode, Ops); 1780 N->setValueTypes(ResultTys); 1781 AllNodes.push_back(N); 1782 return SDOperand(N, 0); 1783} 1784 1785 1786/// SelectNodeTo - These are used for target selectors to *mutate* the 1787/// specified node to have the specified return type, Target opcode, and 1788/// operands. Note that target opcodes are stored as 1789/// ISD::BUILTIN_OP_END+TargetOpcode in the node opcode field. 1790void SelectionDAG::SelectNodeTo(SDNode *N, MVT::ValueType VT, 1791 unsigned TargetOpc, SDOperand Op1) { 1792 RemoveNodeFromCSEMaps(N); 1793 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 1794 N->setValueTypes(VT); 1795 N->setOperands(Op1); 1796} 1797void SelectionDAG::SelectNodeTo(SDNode *N, MVT::ValueType VT, 1798 unsigned TargetOpc, SDOperand Op1, 1799 SDOperand Op2) { 1800 RemoveNodeFromCSEMaps(N); 1801 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 1802 N->setValueTypes(VT); 1803 N->setOperands(Op1, Op2); 1804} 1805void SelectionDAG::SelectNodeTo(SDNode *N, MVT::ValueType VT, 1806 unsigned TargetOpc, SDOperand Op1, 1807 SDOperand Op2, SDOperand Op3) { 1808 RemoveNodeFromCSEMaps(N); 1809 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 1810 N->setValueTypes(VT); 1811 N->setOperands(Op1, Op2, Op3); 1812} 1813 1814/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 1815/// This can cause recursive merging of nodes in the DAG. 1816/// 1817void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) { 1818 assert(From != To && "Cannot replace uses of with self"); 1819 while (!From->use_empty()) { 1820 // Process users until they are all gone. 1821 SDNode *U = *From->use_begin(); 1822 1823 // This node is about to morph, remove its old self from the CSE maps. 1824 RemoveNodeFromCSEMaps(U); 1825 1826 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i) 1827 if (U->getOperand(i).Val == From) { 1828 assert(From->getValueType(U->getOperand(i).ResNo) == 1829 To->getValueType(U->getOperand(i).ResNo)); 1830 From->removeUser(U); 1831 U->Operands[i].Val = To; 1832 To->addUser(U); 1833 } 1834 1835 // Now that we have modified U, add it back to the CSE maps. If it already 1836 // exists there, recursively merge the results together. 1837 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) 1838 ReplaceAllUsesWith(U, Existing); 1839 // U is now dead. 1840 } 1841} 1842 1843//===----------------------------------------------------------------------===// 1844// SDNode Class 1845//===----------------------------------------------------------------------===// 1846 1847/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 1848/// indicated value. This method ignores uses of other values defined by this 1849/// operation. 1850bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) { 1851 assert(Value < getNumValues() && "Bad value!"); 1852 1853 // If there is only one value, this is easy. 1854 if (getNumValues() == 1) 1855 return use_size() == NUses; 1856 if (Uses.size() < NUses) return false; 1857 1858 SDOperand TheValue(this, Value); 1859 1860 std::set<SDNode*> UsersHandled; 1861 1862 for (std::vector<SDNode*>::iterator UI = Uses.begin(), E = Uses.end(); 1863 UI != E; ++UI) { 1864 SDNode *User = *UI; 1865 if (User->getNumOperands() == 1 || 1866 UsersHandled.insert(User).second) // First time we've seen this? 1867 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) 1868 if (User->getOperand(i) == TheValue) { 1869 if (NUses == 0) 1870 return false; // too many uses 1871 --NUses; 1872 } 1873 } 1874 1875 // Found exactly the right number of uses? 1876 return NUses == 0; 1877} 1878 1879 1880const char *SDNode::getOperationName(const SelectionDAG *G) const { 1881 switch (getOpcode()) { 1882 default: 1883 if (getOpcode() < ISD::BUILTIN_OP_END) 1884 return "<<Unknown DAG Node>>"; 1885 else { 1886 if (G) 1887 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 1888 return TII->getName(getOpcode()-ISD::BUILTIN_OP_END); 1889 return "<<Unknown Target Node>>"; 1890 } 1891 1892 case ISD::PCMARKER: return "PCMarker"; 1893 case ISD::SRCVALUE: return "SrcValue"; 1894 case ISD::VALUETYPE: return "ValueType"; 1895 case ISD::EntryToken: return "EntryToken"; 1896 case ISD::TokenFactor: return "TokenFactor"; 1897 case ISD::Constant: return "Constant"; 1898 case ISD::TargetConstant: return "TargetConstant"; 1899 case ISD::ConstantFP: return "ConstantFP"; 1900 case ISD::GlobalAddress: return "GlobalAddress"; 1901 case ISD::FrameIndex: return "FrameIndex"; 1902 case ISD::BasicBlock: return "BasicBlock"; 1903 case ISD::Register: return "Register"; 1904 case ISD::ExternalSymbol: return "ExternalSymbol"; 1905 case ISD::ConstantPool: return "ConstantPoolIndex"; 1906 case ISD::CopyToReg: return "CopyToReg"; 1907 case ISD::CopyFromReg: return "CopyFromReg"; 1908 case ISD::ImplicitDef: return "ImplicitDef"; 1909 case ISD::UNDEF: return "undef"; 1910 1911 // Unary operators 1912 case ISD::FABS: return "fabs"; 1913 case ISD::FNEG: return "fneg"; 1914 case ISD::FSQRT: return "fsqrt"; 1915 case ISD::FSIN: return "fsin"; 1916 case ISD::FCOS: return "fcos"; 1917 1918 // Binary operators 1919 case ISD::ADD: return "add"; 1920 case ISD::SUB: return "sub"; 1921 case ISD::MUL: return "mul"; 1922 case ISD::MULHU: return "mulhu"; 1923 case ISD::MULHS: return "mulhs"; 1924 case ISD::SDIV: return "sdiv"; 1925 case ISD::UDIV: return "udiv"; 1926 case ISD::SREM: return "srem"; 1927 case ISD::UREM: return "urem"; 1928 case ISD::AND: return "and"; 1929 case ISD::OR: return "or"; 1930 case ISD::XOR: return "xor"; 1931 case ISD::SHL: return "shl"; 1932 case ISD::SRA: return "sra"; 1933 case ISD::SRL: return "srl"; 1934 1935 case ISD::SETCC: return "setcc"; 1936 case ISD::SELECT: return "select"; 1937 case ISD::SELECT_CC: return "select_cc"; 1938 case ISD::ADD_PARTS: return "add_parts"; 1939 case ISD::SUB_PARTS: return "sub_parts"; 1940 case ISD::SHL_PARTS: return "shl_parts"; 1941 case ISD::SRA_PARTS: return "sra_parts"; 1942 case ISD::SRL_PARTS: return "srl_parts"; 1943 1944 // Conversion operators. 1945 case ISD::SIGN_EXTEND: return "sign_extend"; 1946 case ISD::ZERO_EXTEND: return "zero_extend"; 1947 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 1948 case ISD::TRUNCATE: return "truncate"; 1949 case ISD::FP_ROUND: return "fp_round"; 1950 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 1951 case ISD::FP_EXTEND: return "fp_extend"; 1952 1953 case ISD::SINT_TO_FP: return "sint_to_fp"; 1954 case ISD::UINT_TO_FP: return "uint_to_fp"; 1955 case ISD::FP_TO_SINT: return "fp_to_sint"; 1956 case ISD::FP_TO_UINT: return "fp_to_uint"; 1957 1958 // Control flow instructions 1959 case ISD::BR: return "br"; 1960 case ISD::BRCOND: return "brcond"; 1961 case ISD::BRCONDTWOWAY: return "brcondtwoway"; 1962 case ISD::BR_CC: return "br_cc"; 1963 case ISD::BRTWOWAY_CC: return "brtwoway_cc"; 1964 case ISD::RET: return "ret"; 1965 case ISD::CALL: return "call"; 1966 case ISD::TAILCALL:return "tailcall"; 1967 case ISD::CALLSEQ_START: return "callseq_start"; 1968 case ISD::CALLSEQ_END: return "callseq_end"; 1969 1970 // Other operators 1971 case ISD::LOAD: return "load"; 1972 case ISD::STORE: return "store"; 1973 case ISD::EXTLOAD: return "extload"; 1974 case ISD::SEXTLOAD: return "sextload"; 1975 case ISD::ZEXTLOAD: return "zextload"; 1976 case ISD::TRUNCSTORE: return "truncstore"; 1977 1978 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 1979 case ISD::EXTRACT_ELEMENT: return "extract_element"; 1980 case ISD::BUILD_PAIR: return "build_pair"; 1981 case ISD::MEMSET: return "memset"; 1982 case ISD::MEMCPY: return "memcpy"; 1983 case ISD::MEMMOVE: return "memmove"; 1984 1985 // Bit counting 1986 case ISD::CTPOP: return "ctpop"; 1987 case ISD::CTTZ: return "cttz"; 1988 case ISD::CTLZ: return "ctlz"; 1989 1990 // IO Intrinsics 1991 case ISD::READPORT: return "readport"; 1992 case ISD::WRITEPORT: return "writeport"; 1993 case ISD::READIO: return "readio"; 1994 case ISD::WRITEIO: return "writeio"; 1995 1996 case ISD::CONDCODE: 1997 switch (cast<CondCodeSDNode>(this)->get()) { 1998 default: assert(0 && "Unknown setcc condition!"); 1999 case ISD::SETOEQ: return "setoeq"; 2000 case ISD::SETOGT: return "setogt"; 2001 case ISD::SETOGE: return "setoge"; 2002 case ISD::SETOLT: return "setolt"; 2003 case ISD::SETOLE: return "setole"; 2004 case ISD::SETONE: return "setone"; 2005 2006 case ISD::SETO: return "seto"; 2007 case ISD::SETUO: return "setuo"; 2008 case ISD::SETUEQ: return "setue"; 2009 case ISD::SETUGT: return "setugt"; 2010 case ISD::SETUGE: return "setuge"; 2011 case ISD::SETULT: return "setult"; 2012 case ISD::SETULE: return "setule"; 2013 case ISD::SETUNE: return "setune"; 2014 2015 case ISD::SETEQ: return "seteq"; 2016 case ISD::SETGT: return "setgt"; 2017 case ISD::SETGE: return "setge"; 2018 case ISD::SETLT: return "setlt"; 2019 case ISD::SETLE: return "setle"; 2020 case ISD::SETNE: return "setne"; 2021 } 2022 } 2023} 2024 2025void SDNode::dump() const { dump(0); } 2026void SDNode::dump(const SelectionDAG *G) const { 2027 std::cerr << (void*)this << ": "; 2028 2029 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 2030 if (i) std::cerr << ","; 2031 if (getValueType(i) == MVT::Other) 2032 std::cerr << "ch"; 2033 else 2034 std::cerr << MVT::getValueTypeString(getValueType(i)); 2035 } 2036 std::cerr << " = " << getOperationName(G); 2037 2038 std::cerr << " "; 2039 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 2040 if (i) std::cerr << ", "; 2041 std::cerr << (void*)getOperand(i).Val; 2042 if (unsigned RN = getOperand(i).ResNo) 2043 std::cerr << ":" << RN; 2044 } 2045 2046 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 2047 std::cerr << "<" << CSDN->getValue() << ">"; 2048 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 2049 std::cerr << "<" << CSDN->getValue() << ">"; 2050 } else if (const GlobalAddressSDNode *GADN = 2051 dyn_cast<GlobalAddressSDNode>(this)) { 2052 std::cerr << "<"; 2053 WriteAsOperand(std::cerr, GADN->getGlobal()) << ">"; 2054 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 2055 std::cerr << "<" << FIDN->getIndex() << ">"; 2056 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 2057 std::cerr << "<" << CP->getIndex() << ">"; 2058 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 2059 std::cerr << "<"; 2060 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 2061 if (LBB) 2062 std::cerr << LBB->getName() << " "; 2063 std::cerr << (const void*)BBDN->getBasicBlock() << ">"; 2064 } else if (const RegisterSDNode *C2V = dyn_cast<RegisterSDNode>(this)) { 2065 std::cerr << " #" << C2V->getReg(); 2066 } else if (const ExternalSymbolSDNode *ES = 2067 dyn_cast<ExternalSymbolSDNode>(this)) { 2068 std::cerr << "'" << ES->getSymbol() << "'"; 2069 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 2070 if (M->getValue()) 2071 std::cerr << "<" << M->getValue() << ":" << M->getOffset() << ">"; 2072 else 2073 std::cerr << "<null:" << M->getOffset() << ">"; 2074 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 2075 std::cerr << ":" << getValueTypeString(N->getVT()); 2076 } 2077} 2078 2079static void DumpNodes(SDNode *N, unsigned indent, const SelectionDAG *G) { 2080 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 2081 if (N->getOperand(i).Val->hasOneUse()) 2082 DumpNodes(N->getOperand(i).Val, indent+2, G); 2083 else 2084 std::cerr << "\n" << std::string(indent+2, ' ') 2085 << (void*)N->getOperand(i).Val << ": <multiple use>"; 2086 2087 2088 std::cerr << "\n" << std::string(indent, ' '); 2089 N->dump(G); 2090} 2091 2092void SelectionDAG::dump() const { 2093 std::cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 2094 std::vector<SDNode*> Nodes(AllNodes); 2095 std::sort(Nodes.begin(), Nodes.end()); 2096 2097 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) { 2098 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val) 2099 DumpNodes(Nodes[i], 2, this); 2100 } 2101 2102 DumpNodes(getRoot().Val, 2, this); 2103 2104 std::cerr << "\n\n"; 2105} 2106 2107