SelectionDAG.cpp revision ad017dcb3a41bb053a6a5fa873d07222763dae75
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/DebugInfo.h" 19#include "llvm/Analysis/ValueTracking.h" 20#include "llvm/Function.h" 21#include "llvm/GlobalAlias.h" 22#include "llvm/GlobalVariable.h" 23#include "llvm/Intrinsics.h" 24#include "llvm/DerivedTypes.h" 25#include "llvm/Assembly/Writer.h" 26#include "llvm/CallingConv.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/CodeGen/PseudoSourceValue.h" 32#include "llvm/Target/TargetRegisterInfo.h" 33#include "llvm/Target/TargetData.h" 34#include "llvm/Target/TargetFrameInfo.h" 35#include "llvm/Target/TargetLowering.h" 36#include "llvm/Target/TargetOptions.h" 37#include "llvm/Target/TargetInstrInfo.h" 38#include "llvm/Target/TargetIntrinsicInfo.h" 39#include "llvm/Target/TargetMachine.h" 40#include "llvm/Support/CommandLine.h" 41#include "llvm/Support/Debug.h" 42#include "llvm/Support/ErrorHandling.h" 43#include "llvm/Support/ManagedStatic.h" 44#include "llvm/Support/MathExtras.h" 45#include "llvm/Support/raw_ostream.h" 46#include "llvm/System/Mutex.h" 47#include "llvm/ADT/SetVector.h" 48#include "llvm/ADT/SmallPtrSet.h" 49#include "llvm/ADT/SmallSet.h" 50#include "llvm/ADT/SmallVector.h" 51#include "llvm/ADT/StringExtras.h" 52#include <algorithm> 53#include <cmath> 54using namespace llvm; 55 56/// makeVTList - Return an instance of the SDVTList struct initialized with the 57/// specified members. 58static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 59 SDVTList Res = {VTs, NumVTs}; 60 return Res; 61} 62 63static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 64 switch (VT.getSimpleVT().SimpleTy) { 65 default: llvm_unreachable("Unknown FP format"); 66 case MVT::f32: return &APFloat::IEEEsingle; 67 case MVT::f64: return &APFloat::IEEEdouble; 68 case MVT::f80: return &APFloat::x87DoubleExtended; 69 case MVT::f128: return &APFloat::IEEEquad; 70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 71 } 72} 73 74SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 75 76//===----------------------------------------------------------------------===// 77// ConstantFPSDNode Class 78//===----------------------------------------------------------------------===// 79 80/// isExactlyValue - We don't rely on operator== working on double values, as 81/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 82/// As such, this method can be used to do an exact bit-for-bit comparison of 83/// two floating point values. 84bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 85 return getValueAPF().bitwiseIsEqual(V); 86} 87 88bool ConstantFPSDNode::isValueValidForType(EVT VT, 89 const APFloat& Val) { 90 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 91 92 // PPC long double cannot be converted to any other type. 93 if (VT == MVT::ppcf128 || 94 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 95 return false; 96 97 // convert modifies in place, so make a copy. 98 APFloat Val2 = APFloat(Val); 99 bool losesInfo; 100 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 101 &losesInfo); 102 return !losesInfo; 103} 104 105//===----------------------------------------------------------------------===// 106// ISD Namespace 107//===----------------------------------------------------------------------===// 108 109/// isBuildVectorAllOnes - Return true if the specified node is a 110/// BUILD_VECTOR where all of the elements are ~0 or undef. 111bool ISD::isBuildVectorAllOnes(const SDNode *N) { 112 // Look through a bit convert. 113 if (N->getOpcode() == ISD::BIT_CONVERT) 114 N = N->getOperand(0).getNode(); 115 116 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 117 118 unsigned i = 0, e = N->getNumOperands(); 119 120 // Skip over all of the undef values. 121 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 122 ++i; 123 124 // Do not accept an all-undef vector. 125 if (i == e) return false; 126 127 // Do not accept build_vectors that aren't all constants or which have non-~0 128 // elements. 129 SDValue NotZero = N->getOperand(i); 130 if (isa<ConstantSDNode>(NotZero)) { 131 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 132 return false; 133 } else if (isa<ConstantFPSDNode>(NotZero)) { 134 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 135 bitcastToAPInt().isAllOnesValue()) 136 return false; 137 } else 138 return false; 139 140 // Okay, we have at least one ~0 value, check to see if the rest match or are 141 // undefs. 142 for (++i; i != e; ++i) 143 if (N->getOperand(i) != NotZero && 144 N->getOperand(i).getOpcode() != ISD::UNDEF) 145 return false; 146 return true; 147} 148 149 150/// isBuildVectorAllZeros - Return true if the specified node is a 151/// BUILD_VECTOR where all of the elements are 0 or undef. 152bool ISD::isBuildVectorAllZeros(const SDNode *N) { 153 // Look through a bit convert. 154 if (N->getOpcode() == ISD::BIT_CONVERT) 155 N = N->getOperand(0).getNode(); 156 157 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 158 159 unsigned i = 0, e = N->getNumOperands(); 160 161 // Skip over all of the undef values. 162 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 163 ++i; 164 165 // Do not accept an all-undef vector. 166 if (i == e) return false; 167 168 // Do not accept build_vectors that aren't all constants or which have non-0 169 // elements. 170 SDValue Zero = N->getOperand(i); 171 if (isa<ConstantSDNode>(Zero)) { 172 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 173 return false; 174 } else if (isa<ConstantFPSDNode>(Zero)) { 175 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 176 return false; 177 } else 178 return false; 179 180 // Okay, we have at least one 0 value, check to see if the rest match or are 181 // undefs. 182 for (++i; i != e; ++i) 183 if (N->getOperand(i) != Zero && 184 N->getOperand(i).getOpcode() != ISD::UNDEF) 185 return false; 186 return true; 187} 188 189/// isScalarToVector - Return true if the specified node is a 190/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 191/// element is not an undef. 192bool ISD::isScalarToVector(const SDNode *N) { 193 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 194 return true; 195 196 if (N->getOpcode() != ISD::BUILD_VECTOR) 197 return false; 198 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 199 return false; 200 unsigned NumElems = N->getNumOperands(); 201 for (unsigned i = 1; i < NumElems; ++i) { 202 SDValue V = N->getOperand(i); 203 if (V.getOpcode() != ISD::UNDEF) 204 return false; 205 } 206 return true; 207} 208 209/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 210/// when given the operation for (X op Y). 211ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 212 // To perform this operation, we just need to swap the L and G bits of the 213 // operation. 214 unsigned OldL = (Operation >> 2) & 1; 215 unsigned OldG = (Operation >> 1) & 1; 216 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 217 (OldL << 1) | // New G bit 218 (OldG << 2)); // New L bit. 219} 220 221/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 222/// 'op' is a valid SetCC operation. 223ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 224 unsigned Operation = Op; 225 if (isInteger) 226 Operation ^= 7; // Flip L, G, E bits, but not U. 227 else 228 Operation ^= 15; // Flip all of the condition bits. 229 230 if (Operation > ISD::SETTRUE2) 231 Operation &= ~8; // Don't let N and U bits get set. 232 233 return ISD::CondCode(Operation); 234} 235 236 237/// isSignedOp - For an integer comparison, return 1 if the comparison is a 238/// signed operation and 2 if the result is an unsigned comparison. Return zero 239/// if the operation does not depend on the sign of the input (setne and seteq). 240static int isSignedOp(ISD::CondCode Opcode) { 241 switch (Opcode) { 242 default: llvm_unreachable("Illegal integer setcc operation!"); 243 case ISD::SETEQ: 244 case ISD::SETNE: return 0; 245 case ISD::SETLT: 246 case ISD::SETLE: 247 case ISD::SETGT: 248 case ISD::SETGE: return 1; 249 case ISD::SETULT: 250 case ISD::SETULE: 251 case ISD::SETUGT: 252 case ISD::SETUGE: return 2; 253 } 254} 255 256/// getSetCCOrOperation - Return the result of a logical OR between different 257/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 258/// returns SETCC_INVALID if it is not possible to represent the resultant 259/// comparison. 260ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 261 bool isInteger) { 262 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 263 // Cannot fold a signed integer setcc with an unsigned integer setcc. 264 return ISD::SETCC_INVALID; 265 266 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 267 268 // If the N and U bits get set then the resultant comparison DOES suddenly 269 // care about orderedness, and is true when ordered. 270 if (Op > ISD::SETTRUE2) 271 Op &= ~16; // Clear the U bit if the N bit is set. 272 273 // Canonicalize illegal integer setcc's. 274 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 275 Op = ISD::SETNE; 276 277 return ISD::CondCode(Op); 278} 279 280/// getSetCCAndOperation - Return the result of a logical AND between different 281/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 282/// function returns zero if it is not possible to represent the resultant 283/// comparison. 284ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 285 bool isInteger) { 286 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 287 // Cannot fold a signed setcc with an unsigned setcc. 288 return ISD::SETCC_INVALID; 289 290 // Combine all of the condition bits. 291 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 292 293 // Canonicalize illegal integer setcc's. 294 if (isInteger) { 295 switch (Result) { 296 default: break; 297 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 298 case ISD::SETOEQ: // SETEQ & SETU[LG]E 299 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 300 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 301 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 302 } 303 } 304 305 return Result; 306} 307 308//===----------------------------------------------------------------------===// 309// SDNode Profile Support 310//===----------------------------------------------------------------------===// 311 312/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 313/// 314static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 315 ID.AddInteger(OpC); 316} 317 318/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 319/// solely with their pointer. 320static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 321 ID.AddPointer(VTList.VTs); 322} 323 324/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 325/// 326static void AddNodeIDOperands(FoldingSetNodeID &ID, 327 const SDValue *Ops, unsigned NumOps) { 328 for (; NumOps; --NumOps, ++Ops) { 329 ID.AddPointer(Ops->getNode()); 330 ID.AddInteger(Ops->getResNo()); 331 } 332} 333 334/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 335/// 336static void AddNodeIDOperands(FoldingSetNodeID &ID, 337 const SDUse *Ops, unsigned NumOps) { 338 for (; NumOps; --NumOps, ++Ops) { 339 ID.AddPointer(Ops->getNode()); 340 ID.AddInteger(Ops->getResNo()); 341 } 342} 343 344static void AddNodeIDNode(FoldingSetNodeID &ID, 345 unsigned short OpC, SDVTList VTList, 346 const SDValue *OpList, unsigned N) { 347 AddNodeIDOpcode(ID, OpC); 348 AddNodeIDValueTypes(ID, VTList); 349 AddNodeIDOperands(ID, OpList, N); 350} 351 352/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 353/// the NodeID data. 354static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 355 switch (N->getOpcode()) { 356 case ISD::TargetExternalSymbol: 357 case ISD::ExternalSymbol: 358 llvm_unreachable("Should only be used on nodes with operands"); 359 default: break; // Normal nodes don't need extra info. 360 case ISD::TargetConstant: 361 case ISD::Constant: 362 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 363 break; 364 case ISD::TargetConstantFP: 365 case ISD::ConstantFP: { 366 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 367 break; 368 } 369 case ISD::TargetGlobalAddress: 370 case ISD::GlobalAddress: 371 case ISD::TargetGlobalTLSAddress: 372 case ISD::GlobalTLSAddress: { 373 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 374 ID.AddPointer(GA->getGlobal()); 375 ID.AddInteger(GA->getOffset()); 376 ID.AddInteger(GA->getTargetFlags()); 377 break; 378 } 379 case ISD::BasicBlock: 380 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 381 break; 382 case ISD::Register: 383 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 384 break; 385 386 case ISD::SRCVALUE: 387 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 388 break; 389 case ISD::FrameIndex: 390 case ISD::TargetFrameIndex: 391 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 392 break; 393 case ISD::JumpTable: 394 case ISD::TargetJumpTable: 395 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 396 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 397 break; 398 case ISD::ConstantPool: 399 case ISD::TargetConstantPool: { 400 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 401 ID.AddInteger(CP->getAlignment()); 402 ID.AddInteger(CP->getOffset()); 403 if (CP->isMachineConstantPoolEntry()) 404 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 405 else 406 ID.AddPointer(CP->getConstVal()); 407 ID.AddInteger(CP->getTargetFlags()); 408 break; 409 } 410 case ISD::LOAD: { 411 const LoadSDNode *LD = cast<LoadSDNode>(N); 412 ID.AddInteger(LD->getMemoryVT().getRawBits()); 413 ID.AddInteger(LD->getRawSubclassData()); 414 break; 415 } 416 case ISD::STORE: { 417 const StoreSDNode *ST = cast<StoreSDNode>(N); 418 ID.AddInteger(ST->getMemoryVT().getRawBits()); 419 ID.AddInteger(ST->getRawSubclassData()); 420 break; 421 } 422 case ISD::ATOMIC_CMP_SWAP: 423 case ISD::ATOMIC_SWAP: 424 case ISD::ATOMIC_LOAD_ADD: 425 case ISD::ATOMIC_LOAD_SUB: 426 case ISD::ATOMIC_LOAD_AND: 427 case ISD::ATOMIC_LOAD_OR: 428 case ISD::ATOMIC_LOAD_XOR: 429 case ISD::ATOMIC_LOAD_NAND: 430 case ISD::ATOMIC_LOAD_MIN: 431 case ISD::ATOMIC_LOAD_MAX: 432 case ISD::ATOMIC_LOAD_UMIN: 433 case ISD::ATOMIC_LOAD_UMAX: { 434 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 435 ID.AddInteger(AT->getMemoryVT().getRawBits()); 436 ID.AddInteger(AT->getRawSubclassData()); 437 break; 438 } 439 case ISD::VECTOR_SHUFFLE: { 440 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 441 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 442 i != e; ++i) 443 ID.AddInteger(SVN->getMaskElt(i)); 444 break; 445 } 446 case ISD::TargetBlockAddress: 447 case ISD::BlockAddress: { 448 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 449 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 450 break; 451 } 452 } // end switch (N->getOpcode()) 453} 454 455/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 456/// data. 457static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 458 AddNodeIDOpcode(ID, N->getOpcode()); 459 // Add the return value info. 460 AddNodeIDValueTypes(ID, N->getVTList()); 461 // Add the operand info. 462 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 463 464 // Handle SDNode leafs with special info. 465 AddNodeIDCustom(ID, N); 466} 467 468/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 469/// the CSE map that carries volatility, temporalness, indexing mode, and 470/// extension/truncation information. 471/// 472static inline unsigned 473encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 474 bool isNonTemporal) { 475 assert((ConvType & 3) == ConvType && 476 "ConvType may not require more than 2 bits!"); 477 assert((AM & 7) == AM && 478 "AM may not require more than 3 bits!"); 479 return ConvType | 480 (AM << 2) | 481 (isVolatile << 5) | 482 (isNonTemporal << 6); 483} 484 485//===----------------------------------------------------------------------===// 486// SelectionDAG Class 487//===----------------------------------------------------------------------===// 488 489/// doNotCSE - Return true if CSE should not be performed for this node. 490static bool doNotCSE(SDNode *N) { 491 if (N->getValueType(0) == MVT::Flag) 492 return true; // Never CSE anything that produces a flag. 493 494 switch (N->getOpcode()) { 495 default: break; 496 case ISD::HANDLENODE: 497 case ISD::EH_LABEL: 498 return true; // Never CSE these nodes. 499 } 500 501 // Check that remaining values produced are not flags. 502 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 503 if (N->getValueType(i) == MVT::Flag) 504 return true; // Never CSE anything that produces a flag. 505 506 return false; 507} 508 509/// RemoveDeadNodes - This method deletes all unreachable nodes in the 510/// SelectionDAG. 511void SelectionDAG::RemoveDeadNodes() { 512 // Create a dummy node (which is not added to allnodes), that adds a reference 513 // to the root node, preventing it from being deleted. 514 HandleSDNode Dummy(getRoot()); 515 516 SmallVector<SDNode*, 128> DeadNodes; 517 518 // Add all obviously-dead nodes to the DeadNodes worklist. 519 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 520 if (I->use_empty()) 521 DeadNodes.push_back(I); 522 523 RemoveDeadNodes(DeadNodes); 524 525 // If the root changed (e.g. it was a dead load, update the root). 526 setRoot(Dummy.getValue()); 527} 528 529/// RemoveDeadNodes - This method deletes the unreachable nodes in the 530/// given list, and any nodes that become unreachable as a result. 531void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 532 DAGUpdateListener *UpdateListener) { 533 534 // Process the worklist, deleting the nodes and adding their uses to the 535 // worklist. 536 while (!DeadNodes.empty()) { 537 SDNode *N = DeadNodes.pop_back_val(); 538 539 if (UpdateListener) 540 UpdateListener->NodeDeleted(N, 0); 541 542 // Take the node out of the appropriate CSE map. 543 RemoveNodeFromCSEMaps(N); 544 545 // Next, brutally remove the operand list. This is safe to do, as there are 546 // no cycles in the graph. 547 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 548 SDUse &Use = *I++; 549 SDNode *Operand = Use.getNode(); 550 Use.set(SDValue()); 551 552 // Now that we removed this operand, see if there are no uses of it left. 553 if (Operand->use_empty()) 554 DeadNodes.push_back(Operand); 555 } 556 557 DeallocateNode(N); 558 } 559} 560 561void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 562 SmallVector<SDNode*, 16> DeadNodes(1, N); 563 RemoveDeadNodes(DeadNodes, UpdateListener); 564} 565 566void SelectionDAG::DeleteNode(SDNode *N) { 567 // First take this out of the appropriate CSE map. 568 RemoveNodeFromCSEMaps(N); 569 570 // Finally, remove uses due to operands of this node, remove from the 571 // AllNodes list, and delete the node. 572 DeleteNodeNotInCSEMaps(N); 573} 574 575void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 576 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 577 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 578 579 // Drop all of the operands and decrement used node's use counts. 580 N->DropOperands(); 581 582 DeallocateNode(N); 583} 584 585void SelectionDAG::DeallocateNode(SDNode *N) { 586 if (N->OperandsNeedDelete) 587 delete[] N->OperandList; 588 589 // Set the opcode to DELETED_NODE to help catch bugs when node 590 // memory is reallocated. 591 N->NodeType = ISD::DELETED_NODE; 592 593 NodeAllocator.Deallocate(AllNodes.remove(N)); 594 595 // Remove the ordering of this node. 596 Ordering->remove(N); 597 598 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 599 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N); 600 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 601 DbgVals[i]->setIsInvalidated(); 602} 603 604/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 605/// correspond to it. This is useful when we're about to delete or repurpose 606/// the node. We don't want future request for structurally identical nodes 607/// to return N anymore. 608bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 609 bool Erased = false; 610 switch (N->getOpcode()) { 611 case ISD::EntryToken: 612 llvm_unreachable("EntryToken should not be in CSEMaps!"); 613 return false; 614 case ISD::HANDLENODE: return false; // noop. 615 case ISD::CONDCODE: 616 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 617 "Cond code doesn't exist!"); 618 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 619 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 620 break; 621 case ISD::ExternalSymbol: 622 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 623 break; 624 case ISD::TargetExternalSymbol: { 625 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 626 Erased = TargetExternalSymbols.erase( 627 std::pair<std::string,unsigned char>(ESN->getSymbol(), 628 ESN->getTargetFlags())); 629 break; 630 } 631 case ISD::VALUETYPE: { 632 EVT VT = cast<VTSDNode>(N)->getVT(); 633 if (VT.isExtended()) { 634 Erased = ExtendedValueTypeNodes.erase(VT); 635 } else { 636 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 637 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 638 } 639 break; 640 } 641 default: 642 // Remove it from the CSE Map. 643 Erased = CSEMap.RemoveNode(N); 644 break; 645 } 646#ifndef NDEBUG 647 // Verify that the node was actually in one of the CSE maps, unless it has a 648 // flag result (which cannot be CSE'd) or is one of the special cases that are 649 // not subject to CSE. 650 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 651 !N->isMachineOpcode() && !doNotCSE(N)) { 652 N->dump(this); 653 dbgs() << "\n"; 654 llvm_unreachable("Node is not in map!"); 655 } 656#endif 657 return Erased; 658} 659 660/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 661/// maps and modified in place. Add it back to the CSE maps, unless an identical 662/// node already exists, in which case transfer all its users to the existing 663/// node. This transfer can potentially trigger recursive merging. 664/// 665void 666SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 667 DAGUpdateListener *UpdateListener) { 668 // For node types that aren't CSE'd, just act as if no identical node 669 // already exists. 670 if (!doNotCSE(N)) { 671 SDNode *Existing = CSEMap.GetOrInsertNode(N); 672 if (Existing != N) { 673 // If there was already an existing matching node, use ReplaceAllUsesWith 674 // to replace the dead one with the existing one. This can cause 675 // recursive merging of other unrelated nodes down the line. 676 ReplaceAllUsesWith(N, Existing, UpdateListener); 677 678 // N is now dead. Inform the listener if it exists and delete it. 679 if (UpdateListener) 680 UpdateListener->NodeDeleted(N, Existing); 681 DeleteNodeNotInCSEMaps(N); 682 return; 683 } 684 } 685 686 // If the node doesn't already exist, we updated it. Inform a listener if 687 // it exists. 688 if (UpdateListener) 689 UpdateListener->NodeUpdated(N); 690} 691 692/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 693/// were replaced with those specified. If this node is never memoized, 694/// return null, otherwise return a pointer to the slot it would take. If a 695/// node already exists with these operands, the slot will be non-null. 696SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 697 void *&InsertPos) { 698 if (doNotCSE(N)) 699 return 0; 700 701 SDValue Ops[] = { Op }; 702 FoldingSetNodeID ID; 703 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 704 AddNodeIDCustom(ID, N); 705 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 706 return Node; 707} 708 709/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 710/// were replaced with those specified. If this node is never memoized, 711/// return null, otherwise return a pointer to the slot it would take. If a 712/// node already exists with these operands, the slot will be non-null. 713SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 714 SDValue Op1, SDValue Op2, 715 void *&InsertPos) { 716 if (doNotCSE(N)) 717 return 0; 718 719 SDValue Ops[] = { Op1, Op2 }; 720 FoldingSetNodeID ID; 721 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 722 AddNodeIDCustom(ID, N); 723 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 724 return Node; 725} 726 727 728/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 729/// were replaced with those specified. If this node is never memoized, 730/// return null, otherwise return a pointer to the slot it would take. If a 731/// node already exists with these operands, the slot will be non-null. 732SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 733 const SDValue *Ops,unsigned NumOps, 734 void *&InsertPos) { 735 if (doNotCSE(N)) 736 return 0; 737 738 FoldingSetNodeID ID; 739 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 740 AddNodeIDCustom(ID, N); 741 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 742 return Node; 743} 744 745/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 746void SelectionDAG::VerifyNode(SDNode *N) { 747 switch (N->getOpcode()) { 748 default: 749 break; 750 case ISD::BUILD_PAIR: { 751 EVT VT = N->getValueType(0); 752 assert(N->getNumValues() == 1 && "Too many results!"); 753 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 754 "Wrong return type!"); 755 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 756 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 757 "Mismatched operand types!"); 758 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 759 "Wrong operand type!"); 760 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 761 "Wrong return type size"); 762 break; 763 } 764 case ISD::BUILD_VECTOR: { 765 assert(N->getNumValues() == 1 && "Too many results!"); 766 assert(N->getValueType(0).isVector() && "Wrong return type!"); 767 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 768 "Wrong number of operands!"); 769 EVT EltVT = N->getValueType(0).getVectorElementType(); 770 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 771 assert((I->getValueType() == EltVT || 772 (EltVT.isInteger() && I->getValueType().isInteger() && 773 EltVT.bitsLE(I->getValueType()))) && 774 "Wrong operand type!"); 775 break; 776 } 777 } 778} 779 780/// getEVTAlignment - Compute the default alignment value for the 781/// given type. 782/// 783unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 784 const Type *Ty = VT == MVT::iPTR ? 785 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 786 VT.getTypeForEVT(*getContext()); 787 788 return TLI.getTargetData()->getABITypeAlignment(Ty); 789} 790 791// EntryNode could meaningfully have debug info if we can find it... 792SelectionDAG::SelectionDAG(const TargetMachine &tm, FunctionLoweringInfo &fli) 793 : TM(tm), TLI(*tm.getTargetLowering()), FLI(fli), 794 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 795 Root(getEntryNode()), Ordering(0) { 796 AllNodes.push_back(&EntryNode); 797 Ordering = new SDNodeOrdering(); 798 DbgInfo = new SDDbgInfo(); 799} 800 801void SelectionDAG::init(MachineFunction &mf) { 802 MF = &mf; 803 Context = &mf.getFunction()->getContext(); 804} 805 806SelectionDAG::~SelectionDAG() { 807 allnodes_clear(); 808 delete Ordering; 809 DbgInfo->clear(); 810 delete DbgInfo; 811} 812 813void SelectionDAG::allnodes_clear() { 814 assert(&*AllNodes.begin() == &EntryNode); 815 AllNodes.remove(AllNodes.begin()); 816 while (!AllNodes.empty()) 817 DeallocateNode(AllNodes.begin()); 818} 819 820void SelectionDAG::clear() { 821 allnodes_clear(); 822 OperandAllocator.Reset(); 823 CSEMap.clear(); 824 825 ExtendedValueTypeNodes.clear(); 826 ExternalSymbols.clear(); 827 TargetExternalSymbols.clear(); 828 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 829 static_cast<CondCodeSDNode*>(0)); 830 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 831 static_cast<SDNode*>(0)); 832 833 EntryNode.UseList = 0; 834 AllNodes.push_back(&EntryNode); 835 Root = getEntryNode(); 836 delete Ordering; 837 Ordering = new SDNodeOrdering(); 838 DbgInfo->clear(); 839 delete DbgInfo; 840 DbgInfo = new SDDbgInfo(); 841} 842 843SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 844 return VT.bitsGT(Op.getValueType()) ? 845 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 846 getNode(ISD::TRUNCATE, DL, VT, Op); 847} 848 849SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 850 return VT.bitsGT(Op.getValueType()) ? 851 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 852 getNode(ISD::TRUNCATE, DL, VT, Op); 853} 854 855SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 856 assert(!VT.isVector() && 857 "getZeroExtendInReg should use the vector element type instead of " 858 "the vector type!"); 859 if (Op.getValueType() == VT) return Op; 860 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 861 APInt Imm = APInt::getLowBitsSet(BitWidth, 862 VT.getSizeInBits()); 863 return getNode(ISD::AND, DL, Op.getValueType(), Op, 864 getConstant(Imm, Op.getValueType())); 865} 866 867/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 868/// 869SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 870 EVT EltVT = VT.getScalarType(); 871 SDValue NegOne = 872 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 873 return getNode(ISD::XOR, DL, VT, Val, NegOne); 874} 875 876SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 877 EVT EltVT = VT.getScalarType(); 878 assert((EltVT.getSizeInBits() >= 64 || 879 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 880 "getConstant with a uint64_t value that doesn't fit in the type!"); 881 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 882} 883 884SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 885 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 886} 887 888SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 889 assert(VT.isInteger() && "Cannot create FP integer constant!"); 890 891 EVT EltVT = VT.getScalarType(); 892 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 893 "APInt size does not match type size!"); 894 895 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 896 FoldingSetNodeID ID; 897 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 898 ID.AddPointer(&Val); 899 void *IP = 0; 900 SDNode *N = NULL; 901 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 902 if (!VT.isVector()) 903 return SDValue(N, 0); 904 905 if (!N) { 906 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 907 CSEMap.InsertNode(N, IP); 908 AllNodes.push_back(N); 909 } 910 911 SDValue Result(N, 0); 912 if (VT.isVector()) { 913 SmallVector<SDValue, 8> Ops; 914 Ops.assign(VT.getVectorNumElements(), Result); 915 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 916 } 917 return Result; 918} 919 920SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 921 return getConstant(Val, TLI.getPointerTy(), isTarget); 922} 923 924 925SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 926 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 927} 928 929SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 930 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 931 932 EVT EltVT = VT.getScalarType(); 933 934 // Do the map lookup using the actual bit pattern for the floating point 935 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 936 // we don't have issues with SNANs. 937 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 938 FoldingSetNodeID ID; 939 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 940 ID.AddPointer(&V); 941 void *IP = 0; 942 SDNode *N = NULL; 943 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 944 if (!VT.isVector()) 945 return SDValue(N, 0); 946 947 if (!N) { 948 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 949 CSEMap.InsertNode(N, IP); 950 AllNodes.push_back(N); 951 } 952 953 SDValue Result(N, 0); 954 if (VT.isVector()) { 955 SmallVector<SDValue, 8> Ops; 956 Ops.assign(VT.getVectorNumElements(), Result); 957 // FIXME DebugLoc info might be appropriate here 958 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 959 } 960 return Result; 961} 962 963SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 964 EVT EltVT = VT.getScalarType(); 965 if (EltVT==MVT::f32) 966 return getConstantFP(APFloat((float)Val), VT, isTarget); 967 else if (EltVT==MVT::f64) 968 return getConstantFP(APFloat(Val), VT, isTarget); 969 else if (EltVT==MVT::f80 || EltVT==MVT::f128) { 970 bool ignored; 971 APFloat apf = APFloat(Val); 972 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 973 &ignored); 974 return getConstantFP(apf, VT, isTarget); 975 } else { 976 assert(0 && "Unsupported type in getConstantFP"); 977 return SDValue(); 978 } 979} 980 981SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 982 EVT VT, int64_t Offset, 983 bool isTargetGA, 984 unsigned char TargetFlags) { 985 assert((TargetFlags == 0 || isTargetGA) && 986 "Cannot set target flags on target-independent globals"); 987 988 // Truncate (with sign-extension) the offset value to the pointer size. 989 EVT PTy = TLI.getPointerTy(); 990 unsigned BitWidth = PTy.getSizeInBits(); 991 if (BitWidth < 64) 992 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 993 994 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 995 if (!GVar) { 996 // If GV is an alias then use the aliasee for determining thread-localness. 997 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 998 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 999 } 1000 1001 unsigned Opc; 1002 if (GVar && GVar->isThreadLocal()) 1003 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1004 else 1005 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1006 1007 FoldingSetNodeID ID; 1008 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1009 ID.AddPointer(GV); 1010 ID.AddInteger(Offset); 1011 ID.AddInteger(TargetFlags); 1012 void *IP = 0; 1013 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1014 return SDValue(E, 0); 1015 1016 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, GV, VT, 1017 Offset, TargetFlags); 1018 CSEMap.InsertNode(N, IP); 1019 AllNodes.push_back(N); 1020 return SDValue(N, 0); 1021} 1022 1023SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1024 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1025 FoldingSetNodeID ID; 1026 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1027 ID.AddInteger(FI); 1028 void *IP = 0; 1029 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1030 return SDValue(E, 0); 1031 1032 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1033 CSEMap.InsertNode(N, IP); 1034 AllNodes.push_back(N); 1035 return SDValue(N, 0); 1036} 1037 1038SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1039 unsigned char TargetFlags) { 1040 assert((TargetFlags == 0 || isTarget) && 1041 "Cannot set target flags on target-independent jump tables"); 1042 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1043 FoldingSetNodeID ID; 1044 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1045 ID.AddInteger(JTI); 1046 ID.AddInteger(TargetFlags); 1047 void *IP = 0; 1048 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1049 return SDValue(E, 0); 1050 1051 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1052 TargetFlags); 1053 CSEMap.InsertNode(N, IP); 1054 AllNodes.push_back(N); 1055 return SDValue(N, 0); 1056} 1057 1058SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1059 unsigned Alignment, int Offset, 1060 bool isTarget, 1061 unsigned char TargetFlags) { 1062 assert((TargetFlags == 0 || isTarget) && 1063 "Cannot set target flags on target-independent globals"); 1064 if (Alignment == 0) 1065 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1066 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1067 FoldingSetNodeID ID; 1068 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1069 ID.AddInteger(Alignment); 1070 ID.AddInteger(Offset); 1071 ID.AddPointer(C); 1072 ID.AddInteger(TargetFlags); 1073 void *IP = 0; 1074 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1075 return SDValue(E, 0); 1076 1077 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1078 Alignment, TargetFlags); 1079 CSEMap.InsertNode(N, IP); 1080 AllNodes.push_back(N); 1081 return SDValue(N, 0); 1082} 1083 1084 1085SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1086 unsigned Alignment, int Offset, 1087 bool isTarget, 1088 unsigned char TargetFlags) { 1089 assert((TargetFlags == 0 || isTarget) && 1090 "Cannot set target flags on target-independent globals"); 1091 if (Alignment == 0) 1092 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1093 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1094 FoldingSetNodeID ID; 1095 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1096 ID.AddInteger(Alignment); 1097 ID.AddInteger(Offset); 1098 C->AddSelectionDAGCSEId(ID); 1099 ID.AddInteger(TargetFlags); 1100 void *IP = 0; 1101 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1102 return SDValue(E, 0); 1103 1104 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1105 Alignment, TargetFlags); 1106 CSEMap.InsertNode(N, IP); 1107 AllNodes.push_back(N); 1108 return SDValue(N, 0); 1109} 1110 1111SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1112 FoldingSetNodeID ID; 1113 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1114 ID.AddPointer(MBB); 1115 void *IP = 0; 1116 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1117 return SDValue(E, 0); 1118 1119 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1120 CSEMap.InsertNode(N, IP); 1121 AllNodes.push_back(N); 1122 return SDValue(N, 0); 1123} 1124 1125SDValue SelectionDAG::getValueType(EVT VT) { 1126 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1127 ValueTypeNodes.size()) 1128 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1129 1130 SDNode *&N = VT.isExtended() ? 1131 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1132 1133 if (N) return SDValue(N, 0); 1134 N = new (NodeAllocator) VTSDNode(VT); 1135 AllNodes.push_back(N); 1136 return SDValue(N, 0); 1137} 1138 1139SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1140 SDNode *&N = ExternalSymbols[Sym]; 1141 if (N) return SDValue(N, 0); 1142 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1143 AllNodes.push_back(N); 1144 return SDValue(N, 0); 1145} 1146 1147SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1148 unsigned char TargetFlags) { 1149 SDNode *&N = 1150 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1151 TargetFlags)]; 1152 if (N) return SDValue(N, 0); 1153 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1154 AllNodes.push_back(N); 1155 return SDValue(N, 0); 1156} 1157 1158SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1159 if ((unsigned)Cond >= CondCodeNodes.size()) 1160 CondCodeNodes.resize(Cond+1); 1161 1162 if (CondCodeNodes[Cond] == 0) { 1163 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1164 CondCodeNodes[Cond] = N; 1165 AllNodes.push_back(N); 1166 } 1167 1168 return SDValue(CondCodeNodes[Cond], 0); 1169} 1170 1171// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1172// the shuffle mask M that point at N1 to point at N2, and indices that point 1173// N2 to point at N1. 1174static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1175 std::swap(N1, N2); 1176 int NElts = M.size(); 1177 for (int i = 0; i != NElts; ++i) { 1178 if (M[i] >= NElts) 1179 M[i] -= NElts; 1180 else if (M[i] >= 0) 1181 M[i] += NElts; 1182 } 1183} 1184 1185SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1186 SDValue N2, const int *Mask) { 1187 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1188 assert(VT.isVector() && N1.getValueType().isVector() && 1189 "Vector Shuffle VTs must be a vectors"); 1190 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1191 && "Vector Shuffle VTs must have same element type"); 1192 1193 // Canonicalize shuffle undef, undef -> undef 1194 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1195 return getUNDEF(VT); 1196 1197 // Validate that all indices in Mask are within the range of the elements 1198 // input to the shuffle. 1199 unsigned NElts = VT.getVectorNumElements(); 1200 SmallVector<int, 8> MaskVec; 1201 for (unsigned i = 0; i != NElts; ++i) { 1202 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1203 MaskVec.push_back(Mask[i]); 1204 } 1205 1206 // Canonicalize shuffle v, v -> v, undef 1207 if (N1 == N2) { 1208 N2 = getUNDEF(VT); 1209 for (unsigned i = 0; i != NElts; ++i) 1210 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1211 } 1212 1213 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1214 if (N1.getOpcode() == ISD::UNDEF) 1215 commuteShuffle(N1, N2, MaskVec); 1216 1217 // Canonicalize all index into lhs, -> shuffle lhs, undef 1218 // Canonicalize all index into rhs, -> shuffle rhs, undef 1219 bool AllLHS = true, AllRHS = true; 1220 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1221 for (unsigned i = 0; i != NElts; ++i) { 1222 if (MaskVec[i] >= (int)NElts) { 1223 if (N2Undef) 1224 MaskVec[i] = -1; 1225 else 1226 AllLHS = false; 1227 } else if (MaskVec[i] >= 0) { 1228 AllRHS = false; 1229 } 1230 } 1231 if (AllLHS && AllRHS) 1232 return getUNDEF(VT); 1233 if (AllLHS && !N2Undef) 1234 N2 = getUNDEF(VT); 1235 if (AllRHS) { 1236 N1 = getUNDEF(VT); 1237 commuteShuffle(N1, N2, MaskVec); 1238 } 1239 1240 // If Identity shuffle, or all shuffle in to undef, return that node. 1241 bool AllUndef = true; 1242 bool Identity = true; 1243 for (unsigned i = 0; i != NElts; ++i) { 1244 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1245 if (MaskVec[i] >= 0) AllUndef = false; 1246 } 1247 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1248 return N1; 1249 if (AllUndef) 1250 return getUNDEF(VT); 1251 1252 FoldingSetNodeID ID; 1253 SDValue Ops[2] = { N1, N2 }; 1254 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1255 for (unsigned i = 0; i != NElts; ++i) 1256 ID.AddInteger(MaskVec[i]); 1257 1258 void* IP = 0; 1259 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1260 return SDValue(E, 0); 1261 1262 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1263 // SDNode doesn't have access to it. This memory will be "leaked" when 1264 // the node is deallocated, but recovered when the NodeAllocator is released. 1265 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1266 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1267 1268 ShuffleVectorSDNode *N = 1269 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1270 CSEMap.InsertNode(N, IP); 1271 AllNodes.push_back(N); 1272 return SDValue(N, 0); 1273} 1274 1275SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1276 SDValue Val, SDValue DTy, 1277 SDValue STy, SDValue Rnd, SDValue Sat, 1278 ISD::CvtCode Code) { 1279 // If the src and dest types are the same and the conversion is between 1280 // integer types of the same sign or two floats, no conversion is necessary. 1281 if (DTy == STy && 1282 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1283 return Val; 1284 1285 FoldingSetNodeID ID; 1286 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1287 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1288 void* IP = 0; 1289 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1290 return SDValue(E, 0); 1291 1292 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1293 Code); 1294 CSEMap.InsertNode(N, IP); 1295 AllNodes.push_back(N); 1296 return SDValue(N, 0); 1297} 1298 1299SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1300 FoldingSetNodeID ID; 1301 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1302 ID.AddInteger(RegNo); 1303 void *IP = 0; 1304 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1305 return SDValue(E, 0); 1306 1307 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1308 CSEMap.InsertNode(N, IP); 1309 AllNodes.push_back(N); 1310 return SDValue(N, 0); 1311} 1312 1313SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1314 FoldingSetNodeID ID; 1315 SDValue Ops[] = { Root }; 1316 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1317 ID.AddPointer(Label); 1318 void *IP = 0; 1319 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1320 return SDValue(E, 0); 1321 1322 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1323 CSEMap.InsertNode(N, IP); 1324 AllNodes.push_back(N); 1325 return SDValue(N, 0); 1326} 1327 1328 1329SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1330 bool isTarget, 1331 unsigned char TargetFlags) { 1332 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1333 1334 FoldingSetNodeID ID; 1335 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1336 ID.AddPointer(BA); 1337 ID.AddInteger(TargetFlags); 1338 void *IP = 0; 1339 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1340 return SDValue(E, 0); 1341 1342 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1343 CSEMap.InsertNode(N, IP); 1344 AllNodes.push_back(N); 1345 return SDValue(N, 0); 1346} 1347 1348SDValue SelectionDAG::getSrcValue(const Value *V) { 1349 assert((!V || V->getType()->isPointerTy()) && 1350 "SrcValue is not a pointer?"); 1351 1352 FoldingSetNodeID ID; 1353 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1354 ID.AddPointer(V); 1355 1356 void *IP = 0; 1357 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1358 return SDValue(E, 0); 1359 1360 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1361 CSEMap.InsertNode(N, IP); 1362 AllNodes.push_back(N); 1363 return SDValue(N, 0); 1364} 1365 1366/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1367SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1368 FoldingSetNodeID ID; 1369 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1370 ID.AddPointer(MD); 1371 1372 void *IP = 0; 1373 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1374 return SDValue(E, 0); 1375 1376 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1377 CSEMap.InsertNode(N, IP); 1378 AllNodes.push_back(N); 1379 return SDValue(N, 0); 1380} 1381 1382 1383/// getShiftAmountOperand - Return the specified value casted to 1384/// the target's desired shift amount type. 1385SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1386 EVT OpTy = Op.getValueType(); 1387 MVT ShTy = TLI.getShiftAmountTy(); 1388 if (OpTy == ShTy || OpTy.isVector()) return Op; 1389 1390 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1391 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1392} 1393 1394/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1395/// specified value type. 1396SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1397 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1398 unsigned ByteSize = VT.getStoreSize(); 1399 const Type *Ty = VT.getTypeForEVT(*getContext()); 1400 unsigned StackAlign = 1401 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1402 1403 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1404 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1405} 1406 1407/// CreateStackTemporary - Create a stack temporary suitable for holding 1408/// either of the specified value types. 1409SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1410 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1411 VT2.getStoreSizeInBits())/8; 1412 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1413 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1414 const TargetData *TD = TLI.getTargetData(); 1415 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1416 TD->getPrefTypeAlignment(Ty2)); 1417 1418 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1419 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1420 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1421} 1422 1423SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1424 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1425 // These setcc operations always fold. 1426 switch (Cond) { 1427 default: break; 1428 case ISD::SETFALSE: 1429 case ISD::SETFALSE2: return getConstant(0, VT); 1430 case ISD::SETTRUE: 1431 case ISD::SETTRUE2: return getConstant(1, VT); 1432 1433 case ISD::SETOEQ: 1434 case ISD::SETOGT: 1435 case ISD::SETOGE: 1436 case ISD::SETOLT: 1437 case ISD::SETOLE: 1438 case ISD::SETONE: 1439 case ISD::SETO: 1440 case ISD::SETUO: 1441 case ISD::SETUEQ: 1442 case ISD::SETUNE: 1443 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1444 break; 1445 } 1446 1447 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1448 const APInt &C2 = N2C->getAPIntValue(); 1449 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1450 const APInt &C1 = N1C->getAPIntValue(); 1451 1452 switch (Cond) { 1453 default: llvm_unreachable("Unknown integer setcc!"); 1454 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1455 case ISD::SETNE: return getConstant(C1 != C2, VT); 1456 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1457 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1458 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1459 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1460 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1461 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1462 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1463 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1464 } 1465 } 1466 } 1467 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1468 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1469 // No compile time operations on this type yet. 1470 if (N1C->getValueType(0) == MVT::ppcf128) 1471 return SDValue(); 1472 1473 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1474 switch (Cond) { 1475 default: break; 1476 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1477 return getUNDEF(VT); 1478 // fall through 1479 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1480 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1481 return getUNDEF(VT); 1482 // fall through 1483 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1484 R==APFloat::cmpLessThan, VT); 1485 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1486 return getUNDEF(VT); 1487 // fall through 1488 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1489 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1490 return getUNDEF(VT); 1491 // fall through 1492 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1493 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1494 return getUNDEF(VT); 1495 // fall through 1496 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1497 R==APFloat::cmpEqual, VT); 1498 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1499 return getUNDEF(VT); 1500 // fall through 1501 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1502 R==APFloat::cmpEqual, VT); 1503 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1504 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1505 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1506 R==APFloat::cmpEqual, VT); 1507 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1508 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1509 R==APFloat::cmpLessThan, VT); 1510 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1511 R==APFloat::cmpUnordered, VT); 1512 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1513 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1514 } 1515 } else { 1516 // Ensure that the constant occurs on the RHS. 1517 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1518 } 1519 } 1520 1521 // Could not fold it. 1522 return SDValue(); 1523} 1524 1525/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1526/// use this predicate to simplify operations downstream. 1527bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1528 // This predicate is not safe for vector operations. 1529 if (Op.getValueType().isVector()) 1530 return false; 1531 1532 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1533 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1534} 1535 1536/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1537/// this predicate to simplify operations downstream. Mask is known to be zero 1538/// for bits that V cannot have. 1539bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1540 unsigned Depth) const { 1541 APInt KnownZero, KnownOne; 1542 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1543 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1544 return (KnownZero & Mask) == Mask; 1545} 1546 1547/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1548/// known to be either zero or one and return them in the KnownZero/KnownOne 1549/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1550/// processing. 1551void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1552 APInt &KnownZero, APInt &KnownOne, 1553 unsigned Depth) const { 1554 unsigned BitWidth = Mask.getBitWidth(); 1555 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1556 "Mask size mismatches value type size!"); 1557 1558 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1559 if (Depth == 6 || Mask == 0) 1560 return; // Limit search depth. 1561 1562 APInt KnownZero2, KnownOne2; 1563 1564 switch (Op.getOpcode()) { 1565 case ISD::Constant: 1566 // We know all of the bits for a constant! 1567 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1568 KnownZero = ~KnownOne & Mask; 1569 return; 1570 case ISD::AND: 1571 // If either the LHS or the RHS are Zero, the result is zero. 1572 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1573 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1574 KnownZero2, KnownOne2, Depth+1); 1575 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1576 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1577 1578 // Output known-1 bits are only known if set in both the LHS & RHS. 1579 KnownOne &= KnownOne2; 1580 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1581 KnownZero |= KnownZero2; 1582 return; 1583 case ISD::OR: 1584 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1585 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1586 KnownZero2, KnownOne2, Depth+1); 1587 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1588 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1589 1590 // Output known-0 bits are only known if clear in both the LHS & RHS. 1591 KnownZero &= KnownZero2; 1592 // Output known-1 are known to be set if set in either the LHS | RHS. 1593 KnownOne |= KnownOne2; 1594 return; 1595 case ISD::XOR: { 1596 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1597 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1598 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1599 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1600 1601 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1602 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1603 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1604 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1605 KnownZero = KnownZeroOut; 1606 return; 1607 } 1608 case ISD::MUL: { 1609 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1610 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1611 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1612 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1613 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1614 1615 // If low bits are zero in either operand, output low known-0 bits. 1616 // Also compute a conserative estimate for high known-0 bits. 1617 // More trickiness is possible, but this is sufficient for the 1618 // interesting case of alignment computation. 1619 KnownOne.clear(); 1620 unsigned TrailZ = KnownZero.countTrailingOnes() + 1621 KnownZero2.countTrailingOnes(); 1622 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1623 KnownZero2.countLeadingOnes(), 1624 BitWidth) - BitWidth; 1625 1626 TrailZ = std::min(TrailZ, BitWidth); 1627 LeadZ = std::min(LeadZ, BitWidth); 1628 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1629 APInt::getHighBitsSet(BitWidth, LeadZ); 1630 KnownZero &= Mask; 1631 return; 1632 } 1633 case ISD::UDIV: { 1634 // For the purposes of computing leading zeros we can conservatively 1635 // treat a udiv as a logical right shift by the power of 2 known to 1636 // be less than the denominator. 1637 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1638 ComputeMaskedBits(Op.getOperand(0), 1639 AllOnes, KnownZero2, KnownOne2, Depth+1); 1640 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1641 1642 KnownOne2.clear(); 1643 KnownZero2.clear(); 1644 ComputeMaskedBits(Op.getOperand(1), 1645 AllOnes, KnownZero2, KnownOne2, Depth+1); 1646 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1647 if (RHSUnknownLeadingOnes != BitWidth) 1648 LeadZ = std::min(BitWidth, 1649 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1650 1651 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1652 return; 1653 } 1654 case ISD::SELECT: 1655 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1656 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1657 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1658 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1659 1660 // Only known if known in both the LHS and RHS. 1661 KnownOne &= KnownOne2; 1662 KnownZero &= KnownZero2; 1663 return; 1664 case ISD::SELECT_CC: 1665 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1666 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1667 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1668 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1669 1670 // Only known if known in both the LHS and RHS. 1671 KnownOne &= KnownOne2; 1672 KnownZero &= KnownZero2; 1673 return; 1674 case ISD::SADDO: 1675 case ISD::UADDO: 1676 case ISD::SSUBO: 1677 case ISD::USUBO: 1678 case ISD::SMULO: 1679 case ISD::UMULO: 1680 if (Op.getResNo() != 1) 1681 return; 1682 // The boolean result conforms to getBooleanContents. Fall through. 1683 case ISD::SETCC: 1684 // If we know the result of a setcc has the top bits zero, use this info. 1685 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1686 BitWidth > 1) 1687 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1688 return; 1689 case ISD::SHL: 1690 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1691 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1692 unsigned ShAmt = SA->getZExtValue(); 1693 1694 // If the shift count is an invalid immediate, don't do anything. 1695 if (ShAmt >= BitWidth) 1696 return; 1697 1698 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1699 KnownZero, KnownOne, Depth+1); 1700 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1701 KnownZero <<= ShAmt; 1702 KnownOne <<= ShAmt; 1703 // low bits known zero. 1704 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1705 } 1706 return; 1707 case ISD::SRL: 1708 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1709 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1710 unsigned ShAmt = SA->getZExtValue(); 1711 1712 // If the shift count is an invalid immediate, don't do anything. 1713 if (ShAmt >= BitWidth) 1714 return; 1715 1716 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1717 KnownZero, KnownOne, Depth+1); 1718 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1719 KnownZero = KnownZero.lshr(ShAmt); 1720 KnownOne = KnownOne.lshr(ShAmt); 1721 1722 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1723 KnownZero |= HighBits; // High bits known zero. 1724 } 1725 return; 1726 case ISD::SRA: 1727 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1728 unsigned ShAmt = SA->getZExtValue(); 1729 1730 // If the shift count is an invalid immediate, don't do anything. 1731 if (ShAmt >= BitWidth) 1732 return; 1733 1734 APInt InDemandedMask = (Mask << ShAmt); 1735 // If any of the demanded bits are produced by the sign extension, we also 1736 // demand the input sign bit. 1737 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1738 if (HighBits.getBoolValue()) 1739 InDemandedMask |= APInt::getSignBit(BitWidth); 1740 1741 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1742 Depth+1); 1743 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1744 KnownZero = KnownZero.lshr(ShAmt); 1745 KnownOne = KnownOne.lshr(ShAmt); 1746 1747 // Handle the sign bits. 1748 APInt SignBit = APInt::getSignBit(BitWidth); 1749 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1750 1751 if (KnownZero.intersects(SignBit)) { 1752 KnownZero |= HighBits; // New bits are known zero. 1753 } else if (KnownOne.intersects(SignBit)) { 1754 KnownOne |= HighBits; // New bits are known one. 1755 } 1756 } 1757 return; 1758 case ISD::SIGN_EXTEND_INREG: { 1759 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1760 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1761 1762 // Sign extension. Compute the demanded bits in the result that are not 1763 // present in the input. 1764 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1765 1766 APInt InSignBit = APInt::getSignBit(EBits); 1767 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1768 1769 // If the sign extended bits are demanded, we know that the sign 1770 // bit is demanded. 1771 InSignBit.zext(BitWidth); 1772 if (NewBits.getBoolValue()) 1773 InputDemandedBits |= InSignBit; 1774 1775 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1776 KnownZero, KnownOne, Depth+1); 1777 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1778 1779 // If the sign bit of the input is known set or clear, then we know the 1780 // top bits of the result. 1781 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1782 KnownZero |= NewBits; 1783 KnownOne &= ~NewBits; 1784 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1785 KnownOne |= NewBits; 1786 KnownZero &= ~NewBits; 1787 } else { // Input sign bit unknown 1788 KnownZero &= ~NewBits; 1789 KnownOne &= ~NewBits; 1790 } 1791 return; 1792 } 1793 case ISD::CTTZ: 1794 case ISD::CTLZ: 1795 case ISD::CTPOP: { 1796 unsigned LowBits = Log2_32(BitWidth)+1; 1797 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1798 KnownOne.clear(); 1799 return; 1800 } 1801 case ISD::LOAD: { 1802 if (ISD::isZEXTLoad(Op.getNode())) { 1803 LoadSDNode *LD = cast<LoadSDNode>(Op); 1804 EVT VT = LD->getMemoryVT(); 1805 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1806 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1807 } 1808 return; 1809 } 1810 case ISD::ZERO_EXTEND: { 1811 EVT InVT = Op.getOperand(0).getValueType(); 1812 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1813 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1814 APInt InMask = Mask; 1815 InMask.trunc(InBits); 1816 KnownZero.trunc(InBits); 1817 KnownOne.trunc(InBits); 1818 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1819 KnownZero.zext(BitWidth); 1820 KnownOne.zext(BitWidth); 1821 KnownZero |= NewBits; 1822 return; 1823 } 1824 case ISD::SIGN_EXTEND: { 1825 EVT InVT = Op.getOperand(0).getValueType(); 1826 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1827 APInt InSignBit = APInt::getSignBit(InBits); 1828 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1829 APInt InMask = Mask; 1830 InMask.trunc(InBits); 1831 1832 // If any of the sign extended bits are demanded, we know that the sign 1833 // bit is demanded. Temporarily set this bit in the mask for our callee. 1834 if (NewBits.getBoolValue()) 1835 InMask |= InSignBit; 1836 1837 KnownZero.trunc(InBits); 1838 KnownOne.trunc(InBits); 1839 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1840 1841 // Note if the sign bit is known to be zero or one. 1842 bool SignBitKnownZero = KnownZero.isNegative(); 1843 bool SignBitKnownOne = KnownOne.isNegative(); 1844 assert(!(SignBitKnownZero && SignBitKnownOne) && 1845 "Sign bit can't be known to be both zero and one!"); 1846 1847 // If the sign bit wasn't actually demanded by our caller, we don't 1848 // want it set in the KnownZero and KnownOne result values. Reset the 1849 // mask and reapply it to the result values. 1850 InMask = Mask; 1851 InMask.trunc(InBits); 1852 KnownZero &= InMask; 1853 KnownOne &= InMask; 1854 1855 KnownZero.zext(BitWidth); 1856 KnownOne.zext(BitWidth); 1857 1858 // If the sign bit is known zero or one, the top bits match. 1859 if (SignBitKnownZero) 1860 KnownZero |= NewBits; 1861 else if (SignBitKnownOne) 1862 KnownOne |= NewBits; 1863 return; 1864 } 1865 case ISD::ANY_EXTEND: { 1866 EVT InVT = Op.getOperand(0).getValueType(); 1867 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1868 APInt InMask = Mask; 1869 InMask.trunc(InBits); 1870 KnownZero.trunc(InBits); 1871 KnownOne.trunc(InBits); 1872 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1873 KnownZero.zext(BitWidth); 1874 KnownOne.zext(BitWidth); 1875 return; 1876 } 1877 case ISD::TRUNCATE: { 1878 EVT InVT = Op.getOperand(0).getValueType(); 1879 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1880 APInt InMask = Mask; 1881 InMask.zext(InBits); 1882 KnownZero.zext(InBits); 1883 KnownOne.zext(InBits); 1884 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1885 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1886 KnownZero.trunc(BitWidth); 1887 KnownOne.trunc(BitWidth); 1888 break; 1889 } 1890 case ISD::AssertZext: { 1891 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1892 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1893 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1894 KnownOne, Depth+1); 1895 KnownZero |= (~InMask) & Mask; 1896 return; 1897 } 1898 case ISD::FGETSIGN: 1899 // All bits are zero except the low bit. 1900 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1901 return; 1902 1903 case ISD::SUB: { 1904 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1905 // We know that the top bits of C-X are clear if X contains less bits 1906 // than C (i.e. no wrap-around can happen). For example, 20-X is 1907 // positive if we can prove that X is >= 0 and < 16. 1908 if (CLHS->getAPIntValue().isNonNegative()) { 1909 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1910 // NLZ can't be BitWidth with no sign bit 1911 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1912 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1913 Depth+1); 1914 1915 // If all of the MaskV bits are known to be zero, then we know the 1916 // output top bits are zero, because we now know that the output is 1917 // from [0-C]. 1918 if ((KnownZero2 & MaskV) == MaskV) { 1919 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1920 // Top bits known zero. 1921 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1922 } 1923 } 1924 } 1925 } 1926 // fall through 1927 case ISD::ADD: { 1928 // Output known-0 bits are known if clear or set in both the low clear bits 1929 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1930 // low 3 bits clear. 1931 APInt Mask2 = APInt::getLowBitsSet(BitWidth, 1932 BitWidth - Mask.countLeadingZeros()); 1933 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1934 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1935 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1936 1937 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1938 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1939 KnownZeroOut = std::min(KnownZeroOut, 1940 KnownZero2.countTrailingOnes()); 1941 1942 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1943 return; 1944 } 1945 case ISD::SREM: 1946 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1947 const APInt &RA = Rem->getAPIntValue().abs(); 1948 if (RA.isPowerOf2()) { 1949 APInt LowBits = RA - 1; 1950 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1951 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1952 1953 // The low bits of the first operand are unchanged by the srem. 1954 KnownZero = KnownZero2 & LowBits; 1955 KnownOne = KnownOne2 & LowBits; 1956 1957 // If the first operand is non-negative or has all low bits zero, then 1958 // the upper bits are all zero. 1959 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1960 KnownZero |= ~LowBits; 1961 1962 // If the first operand is negative and not all low bits are zero, then 1963 // the upper bits are all one. 1964 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 1965 KnownOne |= ~LowBits; 1966 1967 KnownZero &= Mask; 1968 KnownOne &= Mask; 1969 1970 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1971 } 1972 } 1973 return; 1974 case ISD::UREM: { 1975 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1976 const APInt &RA = Rem->getAPIntValue(); 1977 if (RA.isPowerOf2()) { 1978 APInt LowBits = (RA - 1); 1979 APInt Mask2 = LowBits & Mask; 1980 KnownZero |= ~LowBits & Mask; 1981 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1982 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1983 break; 1984 } 1985 } 1986 1987 // Since the result is less than or equal to either operand, any leading 1988 // zero bits in either operand must also exist in the result. 1989 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1990 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1991 Depth+1); 1992 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1993 Depth+1); 1994 1995 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1996 KnownZero2.countLeadingOnes()); 1997 KnownOne.clear(); 1998 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1999 return; 2000 } 2001 default: 2002 // Allow the target to implement this method for its nodes. 2003 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 2004 case ISD::INTRINSIC_WO_CHAIN: 2005 case ISD::INTRINSIC_W_CHAIN: 2006 case ISD::INTRINSIC_VOID: 2007 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 2008 Depth); 2009 } 2010 return; 2011 } 2012} 2013 2014/// ComputeNumSignBits - Return the number of times the sign bit of the 2015/// register is replicated into the other bits. We know that at least 1 bit 2016/// is always equal to the sign bit (itself), but other cases can give us 2017/// information. For example, immediately after an "SRA X, 2", we know that 2018/// the top 3 bits are all equal to each other, so we return 3. 2019unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2020 EVT VT = Op.getValueType(); 2021 assert(VT.isInteger() && "Invalid VT!"); 2022 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2023 unsigned Tmp, Tmp2; 2024 unsigned FirstAnswer = 1; 2025 2026 if (Depth == 6) 2027 return 1; // Limit search depth. 2028 2029 switch (Op.getOpcode()) { 2030 default: break; 2031 case ISD::AssertSext: 2032 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2033 return VTBits-Tmp+1; 2034 case ISD::AssertZext: 2035 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2036 return VTBits-Tmp; 2037 2038 case ISD::Constant: { 2039 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2040 // If negative, return # leading ones. 2041 if (Val.isNegative()) 2042 return Val.countLeadingOnes(); 2043 2044 // Return # leading zeros. 2045 return Val.countLeadingZeros(); 2046 } 2047 2048 case ISD::SIGN_EXTEND: 2049 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2050 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2051 2052 case ISD::SIGN_EXTEND_INREG: 2053 // Max of the input and what this extends. 2054 Tmp = 2055 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2056 Tmp = VTBits-Tmp+1; 2057 2058 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2059 return std::max(Tmp, Tmp2); 2060 2061 case ISD::SRA: 2062 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2063 // SRA X, C -> adds C sign bits. 2064 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2065 Tmp += C->getZExtValue(); 2066 if (Tmp > VTBits) Tmp = VTBits; 2067 } 2068 return Tmp; 2069 case ISD::SHL: 2070 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2071 // shl destroys sign bits. 2072 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2073 if (C->getZExtValue() >= VTBits || // Bad shift. 2074 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2075 return Tmp - C->getZExtValue(); 2076 } 2077 break; 2078 case ISD::AND: 2079 case ISD::OR: 2080 case ISD::XOR: // NOT is handled here. 2081 // Logical binary ops preserve the number of sign bits at the worst. 2082 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2083 if (Tmp != 1) { 2084 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2085 FirstAnswer = std::min(Tmp, Tmp2); 2086 // We computed what we know about the sign bits as our first 2087 // answer. Now proceed to the generic code that uses 2088 // ComputeMaskedBits, and pick whichever answer is better. 2089 } 2090 break; 2091 2092 case ISD::SELECT: 2093 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2094 if (Tmp == 1) return 1; // Early out. 2095 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2096 return std::min(Tmp, Tmp2); 2097 2098 case ISD::SADDO: 2099 case ISD::UADDO: 2100 case ISD::SSUBO: 2101 case ISD::USUBO: 2102 case ISD::SMULO: 2103 case ISD::UMULO: 2104 if (Op.getResNo() != 1) 2105 break; 2106 // The boolean result conforms to getBooleanContents. Fall through. 2107 case ISD::SETCC: 2108 // If setcc returns 0/-1, all bits are sign bits. 2109 if (TLI.getBooleanContents() == 2110 TargetLowering::ZeroOrNegativeOneBooleanContent) 2111 return VTBits; 2112 break; 2113 case ISD::ROTL: 2114 case ISD::ROTR: 2115 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2116 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2117 2118 // Handle rotate right by N like a rotate left by 32-N. 2119 if (Op.getOpcode() == ISD::ROTR) 2120 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2121 2122 // If we aren't rotating out all of the known-in sign bits, return the 2123 // number that are left. This handles rotl(sext(x), 1) for example. 2124 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2125 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2126 } 2127 break; 2128 case ISD::ADD: 2129 // Add can have at most one carry bit. Thus we know that the output 2130 // is, at worst, one more bit than the inputs. 2131 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2132 if (Tmp == 1) return 1; // Early out. 2133 2134 // Special case decrementing a value (ADD X, -1): 2135 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2136 if (CRHS->isAllOnesValue()) { 2137 APInt KnownZero, KnownOne; 2138 APInt Mask = APInt::getAllOnesValue(VTBits); 2139 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2140 2141 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2142 // sign bits set. 2143 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2144 return VTBits; 2145 2146 // If we are subtracting one from a positive number, there is no carry 2147 // out of the result. 2148 if (KnownZero.isNegative()) 2149 return Tmp; 2150 } 2151 2152 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2153 if (Tmp2 == 1) return 1; 2154 return std::min(Tmp, Tmp2)-1; 2155 break; 2156 2157 case ISD::SUB: 2158 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2159 if (Tmp2 == 1) return 1; 2160 2161 // Handle NEG. 2162 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2163 if (CLHS->isNullValue()) { 2164 APInt KnownZero, KnownOne; 2165 APInt Mask = APInt::getAllOnesValue(VTBits); 2166 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2167 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2168 // sign bits set. 2169 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2170 return VTBits; 2171 2172 // If the input is known to be positive (the sign bit is known clear), 2173 // the output of the NEG has the same number of sign bits as the input. 2174 if (KnownZero.isNegative()) 2175 return Tmp2; 2176 2177 // Otherwise, we treat this like a SUB. 2178 } 2179 2180 // Sub can have at most one carry bit. Thus we know that the output 2181 // is, at worst, one more bit than the inputs. 2182 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2183 if (Tmp == 1) return 1; // Early out. 2184 return std::min(Tmp, Tmp2)-1; 2185 break; 2186 case ISD::TRUNCATE: 2187 // FIXME: it's tricky to do anything useful for this, but it is an important 2188 // case for targets like X86. 2189 break; 2190 } 2191 2192 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2193 if (Op.getOpcode() == ISD::LOAD) { 2194 LoadSDNode *LD = cast<LoadSDNode>(Op); 2195 unsigned ExtType = LD->getExtensionType(); 2196 switch (ExtType) { 2197 default: break; 2198 case ISD::SEXTLOAD: // '17' bits known 2199 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2200 return VTBits-Tmp+1; 2201 case ISD::ZEXTLOAD: // '16' bits known 2202 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2203 return VTBits-Tmp; 2204 } 2205 } 2206 2207 // Allow the target to implement this method for its nodes. 2208 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2209 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2210 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2211 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2212 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2213 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2214 } 2215 2216 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2217 // use this information. 2218 APInt KnownZero, KnownOne; 2219 APInt Mask = APInt::getAllOnesValue(VTBits); 2220 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2221 2222 if (KnownZero.isNegative()) { // sign bit is 0 2223 Mask = KnownZero; 2224 } else if (KnownOne.isNegative()) { // sign bit is 1; 2225 Mask = KnownOne; 2226 } else { 2227 // Nothing known. 2228 return FirstAnswer; 2229 } 2230 2231 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2232 // the number of identical bits in the top of the input value. 2233 Mask = ~Mask; 2234 Mask <<= Mask.getBitWidth()-VTBits; 2235 // Return # leading zeros. We use 'min' here in case Val was zero before 2236 // shifting. We don't want to return '64' as for an i32 "0". 2237 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2238} 2239 2240bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2241 // If we're told that NaNs won't happen, assume they won't. 2242 if (FiniteOnlyFPMath()) 2243 return true; 2244 2245 // If the value is a constant, we can obviously see if it is a NaN or not. 2246 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2247 return !C->getValueAPF().isNaN(); 2248 2249 // TODO: Recognize more cases here. 2250 2251 return false; 2252} 2253 2254bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2255 // If the value is a constant, we can obviously see if it is a zero or not. 2256 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2257 return !C->isZero(); 2258 2259 // TODO: Recognize more cases here. 2260 2261 return false; 2262} 2263 2264bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2265 // Check the obvious case. 2266 if (A == B) return true; 2267 2268 // For for negative and positive zero. 2269 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2270 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2271 if (CA->isZero() && CB->isZero()) return true; 2272 2273 // Otherwise they may not be equal. 2274 return false; 2275} 2276 2277bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2278 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2279 if (!GA) return false; 2280 if (GA->getOffset() != 0) return false; 2281 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2282 if (!GV) return false; 2283 return MF->getMMI().hasDebugInfo(); 2284} 2285 2286 2287/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2288/// element of the result of the vector shuffle. 2289SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2290 unsigned i) { 2291 EVT VT = N->getValueType(0); 2292 DebugLoc dl = N->getDebugLoc(); 2293 if (N->getMaskElt(i) < 0) 2294 return getUNDEF(VT.getVectorElementType()); 2295 unsigned Index = N->getMaskElt(i); 2296 unsigned NumElems = VT.getVectorNumElements(); 2297 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2298 Index %= NumElems; 2299 2300 if (V.getOpcode() == ISD::BIT_CONVERT) { 2301 V = V.getOperand(0); 2302 EVT VVT = V.getValueType(); 2303 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2304 return SDValue(); 2305 } 2306 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2307 return (Index == 0) ? V.getOperand(0) 2308 : getUNDEF(VT.getVectorElementType()); 2309 if (V.getOpcode() == ISD::BUILD_VECTOR) 2310 return V.getOperand(Index); 2311 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2312 return getShuffleScalarElt(SVN, Index); 2313 return SDValue(); 2314} 2315 2316 2317/// getNode - Gets or creates the specified node. 2318/// 2319SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2320 FoldingSetNodeID ID; 2321 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2322 void *IP = 0; 2323 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2324 return SDValue(E, 0); 2325 2326 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2327 CSEMap.InsertNode(N, IP); 2328 2329 AllNodes.push_back(N); 2330#ifndef NDEBUG 2331 VerifyNode(N); 2332#endif 2333 return SDValue(N, 0); 2334} 2335 2336SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2337 EVT VT, SDValue Operand) { 2338 // Constant fold unary operations with an integer constant operand. 2339 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2340 const APInt &Val = C->getAPIntValue(); 2341 switch (Opcode) { 2342 default: break; 2343 case ISD::SIGN_EXTEND: 2344 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT); 2345 case ISD::ANY_EXTEND: 2346 case ISD::ZERO_EXTEND: 2347 case ISD::TRUNCATE: 2348 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT); 2349 case ISD::UINT_TO_FP: 2350 case ISD::SINT_TO_FP: { 2351 const uint64_t zero[] = {0, 0}; 2352 // No compile time operations on ppcf128. 2353 if (VT == MVT::ppcf128) break; 2354 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero)); 2355 (void)apf.convertFromAPInt(Val, 2356 Opcode==ISD::SINT_TO_FP, 2357 APFloat::rmNearestTiesToEven); 2358 return getConstantFP(apf, VT); 2359 } 2360 case ISD::BIT_CONVERT: 2361 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2362 return getConstantFP(Val.bitsToFloat(), VT); 2363 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2364 return getConstantFP(Val.bitsToDouble(), VT); 2365 break; 2366 case ISD::BSWAP: 2367 return getConstant(Val.byteSwap(), VT); 2368 case ISD::CTPOP: 2369 return getConstant(Val.countPopulation(), VT); 2370 case ISD::CTLZ: 2371 return getConstant(Val.countLeadingZeros(), VT); 2372 case ISD::CTTZ: 2373 return getConstant(Val.countTrailingZeros(), VT); 2374 } 2375 } 2376 2377 // Constant fold unary operations with a floating point constant operand. 2378 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2379 APFloat V = C->getValueAPF(); // make copy 2380 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2381 switch (Opcode) { 2382 case ISD::FNEG: 2383 V.changeSign(); 2384 return getConstantFP(V, VT); 2385 case ISD::FABS: 2386 V.clearSign(); 2387 return getConstantFP(V, VT); 2388 case ISD::FP_ROUND: 2389 case ISD::FP_EXTEND: { 2390 bool ignored; 2391 // This can return overflow, underflow, or inexact; we don't care. 2392 // FIXME need to be more flexible about rounding mode. 2393 (void)V.convert(*EVTToAPFloatSemantics(VT), 2394 APFloat::rmNearestTiesToEven, &ignored); 2395 return getConstantFP(V, VT); 2396 } 2397 case ISD::FP_TO_SINT: 2398 case ISD::FP_TO_UINT: { 2399 integerPart x[2]; 2400 bool ignored; 2401 assert(integerPartWidth >= 64); 2402 // FIXME need to be more flexible about rounding mode. 2403 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2404 Opcode==ISD::FP_TO_SINT, 2405 APFloat::rmTowardZero, &ignored); 2406 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2407 break; 2408 APInt api(VT.getSizeInBits(), 2, x); 2409 return getConstant(api, VT); 2410 } 2411 case ISD::BIT_CONVERT: 2412 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2413 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2414 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2415 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2416 break; 2417 } 2418 } 2419 } 2420 2421 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2422 switch (Opcode) { 2423 case ISD::TokenFactor: 2424 case ISD::MERGE_VALUES: 2425 case ISD::CONCAT_VECTORS: 2426 return Operand; // Factor, merge or concat of one node? No need. 2427 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2428 case ISD::FP_EXTEND: 2429 assert(VT.isFloatingPoint() && 2430 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2431 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2432 assert((!VT.isVector() || 2433 VT.getVectorNumElements() == 2434 Operand.getValueType().getVectorNumElements()) && 2435 "Vector element count mismatch!"); 2436 if (Operand.getOpcode() == ISD::UNDEF) 2437 return getUNDEF(VT); 2438 break; 2439 case ISD::SIGN_EXTEND: 2440 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2441 "Invalid SIGN_EXTEND!"); 2442 if (Operand.getValueType() == VT) return Operand; // noop extension 2443 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2444 "Invalid sext node, dst < src!"); 2445 assert((!VT.isVector() || 2446 VT.getVectorNumElements() == 2447 Operand.getValueType().getVectorNumElements()) && 2448 "Vector element count mismatch!"); 2449 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2450 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2451 break; 2452 case ISD::ZERO_EXTEND: 2453 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2454 "Invalid ZERO_EXTEND!"); 2455 if (Operand.getValueType() == VT) return Operand; // noop extension 2456 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2457 "Invalid zext node, dst < src!"); 2458 assert((!VT.isVector() || 2459 VT.getVectorNumElements() == 2460 Operand.getValueType().getVectorNumElements()) && 2461 "Vector element count mismatch!"); 2462 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2463 return getNode(ISD::ZERO_EXTEND, DL, VT, 2464 Operand.getNode()->getOperand(0)); 2465 break; 2466 case ISD::ANY_EXTEND: 2467 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2468 "Invalid ANY_EXTEND!"); 2469 if (Operand.getValueType() == VT) return Operand; // noop extension 2470 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2471 "Invalid anyext node, dst < src!"); 2472 assert((!VT.isVector() || 2473 VT.getVectorNumElements() == 2474 Operand.getValueType().getVectorNumElements()) && 2475 "Vector element count mismatch!"); 2476 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2477 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2478 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2479 break; 2480 case ISD::TRUNCATE: 2481 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2482 "Invalid TRUNCATE!"); 2483 if (Operand.getValueType() == VT) return Operand; // noop truncate 2484 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2485 "Invalid truncate node, src < dst!"); 2486 assert((!VT.isVector() || 2487 VT.getVectorNumElements() == 2488 Operand.getValueType().getVectorNumElements()) && 2489 "Vector element count mismatch!"); 2490 if (OpOpcode == ISD::TRUNCATE) 2491 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2492 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2493 OpOpcode == ISD::ANY_EXTEND) { 2494 // If the source is smaller than the dest, we still need an extend. 2495 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2496 .bitsLT(VT.getScalarType())) 2497 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2498 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2499 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2500 else 2501 return Operand.getNode()->getOperand(0); 2502 } 2503 break; 2504 case ISD::BIT_CONVERT: 2505 // Basic sanity checking. 2506 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2507 && "Cannot BIT_CONVERT between types of different sizes!"); 2508 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2509 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2510 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2511 if (OpOpcode == ISD::UNDEF) 2512 return getUNDEF(VT); 2513 break; 2514 case ISD::SCALAR_TO_VECTOR: 2515 assert(VT.isVector() && !Operand.getValueType().isVector() && 2516 (VT.getVectorElementType() == Operand.getValueType() || 2517 (VT.getVectorElementType().isInteger() && 2518 Operand.getValueType().isInteger() && 2519 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2520 "Illegal SCALAR_TO_VECTOR node!"); 2521 if (OpOpcode == ISD::UNDEF) 2522 return getUNDEF(VT); 2523 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2524 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2525 isa<ConstantSDNode>(Operand.getOperand(1)) && 2526 Operand.getConstantOperandVal(1) == 0 && 2527 Operand.getOperand(0).getValueType() == VT) 2528 return Operand.getOperand(0); 2529 break; 2530 case ISD::FNEG: 2531 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2532 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2533 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2534 Operand.getNode()->getOperand(0)); 2535 if (OpOpcode == ISD::FNEG) // --X -> X 2536 return Operand.getNode()->getOperand(0); 2537 break; 2538 case ISD::FABS: 2539 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2540 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2541 break; 2542 } 2543 2544 SDNode *N; 2545 SDVTList VTs = getVTList(VT); 2546 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2547 FoldingSetNodeID ID; 2548 SDValue Ops[1] = { Operand }; 2549 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2550 void *IP = 0; 2551 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2552 return SDValue(E, 0); 2553 2554 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2555 CSEMap.InsertNode(N, IP); 2556 } else { 2557 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2558 } 2559 2560 AllNodes.push_back(N); 2561#ifndef NDEBUG 2562 VerifyNode(N); 2563#endif 2564 return SDValue(N, 0); 2565} 2566 2567SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2568 EVT VT, 2569 ConstantSDNode *Cst1, 2570 ConstantSDNode *Cst2) { 2571 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2572 2573 switch (Opcode) { 2574 case ISD::ADD: return getConstant(C1 + C2, VT); 2575 case ISD::SUB: return getConstant(C1 - C2, VT); 2576 case ISD::MUL: return getConstant(C1 * C2, VT); 2577 case ISD::UDIV: 2578 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2579 break; 2580 case ISD::UREM: 2581 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2582 break; 2583 case ISD::SDIV: 2584 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2585 break; 2586 case ISD::SREM: 2587 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2588 break; 2589 case ISD::AND: return getConstant(C1 & C2, VT); 2590 case ISD::OR: return getConstant(C1 | C2, VT); 2591 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2592 case ISD::SHL: return getConstant(C1 << C2, VT); 2593 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2594 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2595 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2596 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2597 default: break; 2598 } 2599 2600 return SDValue(); 2601} 2602 2603SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2604 SDValue N1, SDValue N2) { 2605 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2606 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2607 switch (Opcode) { 2608 default: break; 2609 case ISD::TokenFactor: 2610 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2611 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2612 // Fold trivial token factors. 2613 if (N1.getOpcode() == ISD::EntryToken) return N2; 2614 if (N2.getOpcode() == ISD::EntryToken) return N1; 2615 if (N1 == N2) return N1; 2616 break; 2617 case ISD::CONCAT_VECTORS: 2618 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2619 // one big BUILD_VECTOR. 2620 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2621 N2.getOpcode() == ISD::BUILD_VECTOR) { 2622 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2623 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2624 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2625 } 2626 break; 2627 case ISD::AND: 2628 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2629 N1.getValueType() == VT && "Binary operator types must match!"); 2630 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2631 // worth handling here. 2632 if (N2C && N2C->isNullValue()) 2633 return N2; 2634 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2635 return N1; 2636 break; 2637 case ISD::OR: 2638 case ISD::XOR: 2639 case ISD::ADD: 2640 case ISD::SUB: 2641 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2642 N1.getValueType() == VT && "Binary operator types must match!"); 2643 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2644 // it's worth handling here. 2645 if (N2C && N2C->isNullValue()) 2646 return N1; 2647 break; 2648 case ISD::UDIV: 2649 case ISD::UREM: 2650 case ISD::MULHU: 2651 case ISD::MULHS: 2652 case ISD::MUL: 2653 case ISD::SDIV: 2654 case ISD::SREM: 2655 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2656 // fall through 2657 case ISD::FADD: 2658 case ISD::FSUB: 2659 case ISD::FMUL: 2660 case ISD::FDIV: 2661 case ISD::FREM: 2662 if (UnsafeFPMath) { 2663 if (Opcode == ISD::FADD) { 2664 // 0+x --> x 2665 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2666 if (CFP->getValueAPF().isZero()) 2667 return N2; 2668 // x+0 --> x 2669 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2670 if (CFP->getValueAPF().isZero()) 2671 return N1; 2672 } else if (Opcode == ISD::FSUB) { 2673 // x-0 --> x 2674 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2675 if (CFP->getValueAPF().isZero()) 2676 return N1; 2677 } 2678 } 2679 assert(N1.getValueType() == N2.getValueType() && 2680 N1.getValueType() == VT && "Binary operator types must match!"); 2681 break; 2682 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2683 assert(N1.getValueType() == VT && 2684 N1.getValueType().isFloatingPoint() && 2685 N2.getValueType().isFloatingPoint() && 2686 "Invalid FCOPYSIGN!"); 2687 break; 2688 case ISD::SHL: 2689 case ISD::SRA: 2690 case ISD::SRL: 2691 case ISD::ROTL: 2692 case ISD::ROTR: 2693 assert(VT == N1.getValueType() && 2694 "Shift operators return type must be the same as their first arg"); 2695 assert(VT.isInteger() && N2.getValueType().isInteger() && 2696 "Shifts only work on integers"); 2697 2698 // Always fold shifts of i1 values so the code generator doesn't need to 2699 // handle them. Since we know the size of the shift has to be less than the 2700 // size of the value, the shift/rotate count is guaranteed to be zero. 2701 if (VT == MVT::i1) 2702 return N1; 2703 if (N2C && N2C->isNullValue()) 2704 return N1; 2705 break; 2706 case ISD::FP_ROUND_INREG: { 2707 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2708 assert(VT == N1.getValueType() && "Not an inreg round!"); 2709 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2710 "Cannot FP_ROUND_INREG integer types"); 2711 assert(EVT.isVector() == VT.isVector() && 2712 "FP_ROUND_INREG type should be vector iff the operand " 2713 "type is vector!"); 2714 assert((!EVT.isVector() || 2715 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2716 "Vector element counts must match in FP_ROUND_INREG"); 2717 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2718 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2719 break; 2720 } 2721 case ISD::FP_ROUND: 2722 assert(VT.isFloatingPoint() && 2723 N1.getValueType().isFloatingPoint() && 2724 VT.bitsLE(N1.getValueType()) && 2725 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2726 if (N1.getValueType() == VT) return N1; // noop conversion. 2727 break; 2728 case ISD::AssertSext: 2729 case ISD::AssertZext: { 2730 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2731 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2732 assert(VT.isInteger() && EVT.isInteger() && 2733 "Cannot *_EXTEND_INREG FP types"); 2734 assert(!EVT.isVector() && 2735 "AssertSExt/AssertZExt type should be the vector element type " 2736 "rather than the vector type!"); 2737 assert(EVT.bitsLE(VT) && "Not extending!"); 2738 if (VT == EVT) return N1; // noop assertion. 2739 break; 2740 } 2741 case ISD::SIGN_EXTEND_INREG: { 2742 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2743 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2744 assert(VT.isInteger() && EVT.isInteger() && 2745 "Cannot *_EXTEND_INREG FP types"); 2746 assert(EVT.isVector() == VT.isVector() && 2747 "SIGN_EXTEND_INREG type should be vector iff the operand " 2748 "type is vector!"); 2749 assert((!EVT.isVector() || 2750 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2751 "Vector element counts must match in SIGN_EXTEND_INREG"); 2752 assert(EVT.bitsLE(VT) && "Not extending!"); 2753 if (EVT == VT) return N1; // Not actually extending 2754 2755 if (N1C) { 2756 APInt Val = N1C->getAPIntValue(); 2757 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2758 Val <<= Val.getBitWidth()-FromBits; 2759 Val = Val.ashr(Val.getBitWidth()-FromBits); 2760 return getConstant(Val, VT); 2761 } 2762 break; 2763 } 2764 case ISD::EXTRACT_VECTOR_ELT: 2765 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2766 if (N1.getOpcode() == ISD::UNDEF) 2767 return getUNDEF(VT); 2768 2769 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2770 // expanding copies of large vectors from registers. 2771 if (N2C && 2772 N1.getOpcode() == ISD::CONCAT_VECTORS && 2773 N1.getNumOperands() > 0) { 2774 unsigned Factor = 2775 N1.getOperand(0).getValueType().getVectorNumElements(); 2776 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2777 N1.getOperand(N2C->getZExtValue() / Factor), 2778 getConstant(N2C->getZExtValue() % Factor, 2779 N2.getValueType())); 2780 } 2781 2782 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2783 // expanding large vector constants. 2784 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2785 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2786 EVT VEltTy = N1.getValueType().getVectorElementType(); 2787 if (Elt.getValueType() != VEltTy) { 2788 // If the vector element type is not legal, the BUILD_VECTOR operands 2789 // are promoted and implicitly truncated. Make that explicit here. 2790 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2791 } 2792 if (VT != VEltTy) { 2793 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2794 // result is implicitly extended. 2795 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2796 } 2797 return Elt; 2798 } 2799 2800 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2801 // operations are lowered to scalars. 2802 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2803 // If the indices are the same, return the inserted element else 2804 // if the indices are known different, extract the element from 2805 // the original vector. 2806 SDValue N1Op2 = N1.getOperand(2); 2807 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2808 2809 if (N1Op2C && N2C) { 2810 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2811 if (VT == N1.getOperand(1).getValueType()) 2812 return N1.getOperand(1); 2813 else 2814 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2815 } 2816 2817 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2818 } 2819 } 2820 break; 2821 case ISD::EXTRACT_ELEMENT: 2822 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2823 assert(!N1.getValueType().isVector() && !VT.isVector() && 2824 (N1.getValueType().isInteger() == VT.isInteger()) && 2825 "Wrong types for EXTRACT_ELEMENT!"); 2826 2827 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2828 // 64-bit integers into 32-bit parts. Instead of building the extract of 2829 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2830 if (N1.getOpcode() == ISD::BUILD_PAIR) 2831 return N1.getOperand(N2C->getZExtValue()); 2832 2833 // EXTRACT_ELEMENT of a constant int is also very common. 2834 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2835 unsigned ElementSize = VT.getSizeInBits(); 2836 unsigned Shift = ElementSize * N2C->getZExtValue(); 2837 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2838 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2839 } 2840 break; 2841 case ISD::EXTRACT_SUBVECTOR: 2842 if (N1.getValueType() == VT) // Trivial extraction. 2843 return N1; 2844 break; 2845 } 2846 2847 if (N1C) { 2848 if (N2C) { 2849 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2850 if (SV.getNode()) return SV; 2851 } else { // Cannonicalize constant to RHS if commutative 2852 if (isCommutativeBinOp(Opcode)) { 2853 std::swap(N1C, N2C); 2854 std::swap(N1, N2); 2855 } 2856 } 2857 } 2858 2859 // Constant fold FP operations. 2860 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2861 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2862 if (N1CFP) { 2863 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2864 // Cannonicalize constant to RHS if commutative 2865 std::swap(N1CFP, N2CFP); 2866 std::swap(N1, N2); 2867 } else if (N2CFP && VT != MVT::ppcf128) { 2868 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2869 APFloat::opStatus s; 2870 switch (Opcode) { 2871 case ISD::FADD: 2872 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2873 if (s != APFloat::opInvalidOp) 2874 return getConstantFP(V1, VT); 2875 break; 2876 case ISD::FSUB: 2877 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2878 if (s!=APFloat::opInvalidOp) 2879 return getConstantFP(V1, VT); 2880 break; 2881 case ISD::FMUL: 2882 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2883 if (s!=APFloat::opInvalidOp) 2884 return getConstantFP(V1, VT); 2885 break; 2886 case ISD::FDIV: 2887 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2888 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2889 return getConstantFP(V1, VT); 2890 break; 2891 case ISD::FREM : 2892 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2893 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2894 return getConstantFP(V1, VT); 2895 break; 2896 case ISD::FCOPYSIGN: 2897 V1.copySign(V2); 2898 return getConstantFP(V1, VT); 2899 default: break; 2900 } 2901 } 2902 } 2903 2904 // Canonicalize an UNDEF to the RHS, even over a constant. 2905 if (N1.getOpcode() == ISD::UNDEF) { 2906 if (isCommutativeBinOp(Opcode)) { 2907 std::swap(N1, N2); 2908 } else { 2909 switch (Opcode) { 2910 case ISD::FP_ROUND_INREG: 2911 case ISD::SIGN_EXTEND_INREG: 2912 case ISD::SUB: 2913 case ISD::FSUB: 2914 case ISD::FDIV: 2915 case ISD::FREM: 2916 case ISD::SRA: 2917 return N1; // fold op(undef, arg2) -> undef 2918 case ISD::UDIV: 2919 case ISD::SDIV: 2920 case ISD::UREM: 2921 case ISD::SREM: 2922 case ISD::SRL: 2923 case ISD::SHL: 2924 if (!VT.isVector()) 2925 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2926 // For vectors, we can't easily build an all zero vector, just return 2927 // the LHS. 2928 return N2; 2929 } 2930 } 2931 } 2932 2933 // Fold a bunch of operators when the RHS is undef. 2934 if (N2.getOpcode() == ISD::UNDEF) { 2935 switch (Opcode) { 2936 case ISD::XOR: 2937 if (N1.getOpcode() == ISD::UNDEF) 2938 // Handle undef ^ undef -> 0 special case. This is a common 2939 // idiom (misuse). 2940 return getConstant(0, VT); 2941 // fallthrough 2942 case ISD::ADD: 2943 case ISD::ADDC: 2944 case ISD::ADDE: 2945 case ISD::SUB: 2946 case ISD::UDIV: 2947 case ISD::SDIV: 2948 case ISD::UREM: 2949 case ISD::SREM: 2950 return N2; // fold op(arg1, undef) -> undef 2951 case ISD::FADD: 2952 case ISD::FSUB: 2953 case ISD::FMUL: 2954 case ISD::FDIV: 2955 case ISD::FREM: 2956 if (UnsafeFPMath) 2957 return N2; 2958 break; 2959 case ISD::MUL: 2960 case ISD::AND: 2961 case ISD::SRL: 2962 case ISD::SHL: 2963 if (!VT.isVector()) 2964 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2965 // For vectors, we can't easily build an all zero vector, just return 2966 // the LHS. 2967 return N1; 2968 case ISD::OR: 2969 if (!VT.isVector()) 2970 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2971 // For vectors, we can't easily build an all one vector, just return 2972 // the LHS. 2973 return N1; 2974 case ISD::SRA: 2975 return N1; 2976 } 2977 } 2978 2979 // Memoize this node if possible. 2980 SDNode *N; 2981 SDVTList VTs = getVTList(VT); 2982 if (VT != MVT::Flag) { 2983 SDValue Ops[] = { N1, N2 }; 2984 FoldingSetNodeID ID; 2985 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2986 void *IP = 0; 2987 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2988 return SDValue(E, 0); 2989 2990 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2991 CSEMap.InsertNode(N, IP); 2992 } else { 2993 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2994 } 2995 2996 AllNodes.push_back(N); 2997#ifndef NDEBUG 2998 VerifyNode(N); 2999#endif 3000 return SDValue(N, 0); 3001} 3002 3003SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3004 SDValue N1, SDValue N2, SDValue N3) { 3005 // Perform various simplifications. 3006 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3007 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 3008 switch (Opcode) { 3009 case ISD::CONCAT_VECTORS: 3010 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3011 // one big BUILD_VECTOR. 3012 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3013 N2.getOpcode() == ISD::BUILD_VECTOR && 3014 N3.getOpcode() == ISD::BUILD_VECTOR) { 3015 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 3016 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 3017 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 3018 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3019 } 3020 break; 3021 case ISD::SETCC: { 3022 // Use FoldSetCC to simplify SETCC's. 3023 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3024 if (Simp.getNode()) return Simp; 3025 break; 3026 } 3027 case ISD::SELECT: 3028 if (N1C) { 3029 if (N1C->getZExtValue()) 3030 return N2; // select true, X, Y -> X 3031 else 3032 return N3; // select false, X, Y -> Y 3033 } 3034 3035 if (N2 == N3) return N2; // select C, X, X -> X 3036 break; 3037 case ISD::BRCOND: 3038 if (N2C) { 3039 if (N2C->getZExtValue()) // Unconditional branch 3040 return getNode(ISD::BR, DL, MVT::Other, N1, N3); 3041 else 3042 return N1; // Never-taken branch 3043 } 3044 break; 3045 case ISD::VECTOR_SHUFFLE: 3046 llvm_unreachable("should use getVectorShuffle constructor!"); 3047 break; 3048 case ISD::BIT_CONVERT: 3049 // Fold bit_convert nodes from a type to themselves. 3050 if (N1.getValueType() == VT) 3051 return N1; 3052 break; 3053 } 3054 3055 // Memoize node if it doesn't produce a flag. 3056 SDNode *N; 3057 SDVTList VTs = getVTList(VT); 3058 if (VT != MVT::Flag) { 3059 SDValue Ops[] = { N1, N2, N3 }; 3060 FoldingSetNodeID ID; 3061 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3062 void *IP = 0; 3063 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3064 return SDValue(E, 0); 3065 3066 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3067 CSEMap.InsertNode(N, IP); 3068 } else { 3069 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3070 } 3071 3072 AllNodes.push_back(N); 3073#ifndef NDEBUG 3074 VerifyNode(N); 3075#endif 3076 return SDValue(N, 0); 3077} 3078 3079SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3080 SDValue N1, SDValue N2, SDValue N3, 3081 SDValue N4) { 3082 SDValue Ops[] = { N1, N2, N3, N4 }; 3083 return getNode(Opcode, DL, VT, Ops, 4); 3084} 3085 3086SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3087 SDValue N1, SDValue N2, SDValue N3, 3088 SDValue N4, SDValue N5) { 3089 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3090 return getNode(Opcode, DL, VT, Ops, 5); 3091} 3092 3093/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3094/// the incoming stack arguments to be loaded from the stack. 3095SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3096 SmallVector<SDValue, 8> ArgChains; 3097 3098 // Include the original chain at the beginning of the list. When this is 3099 // used by target LowerCall hooks, this helps legalize find the 3100 // CALLSEQ_BEGIN node. 3101 ArgChains.push_back(Chain); 3102 3103 // Add a chain value for each stack argument. 3104 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3105 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3106 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3107 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3108 if (FI->getIndex() < 0) 3109 ArgChains.push_back(SDValue(L, 1)); 3110 3111 // Build a tokenfactor for all the chains. 3112 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3113 &ArgChains[0], ArgChains.size()); 3114} 3115 3116/// getMemsetValue - Vectorized representation of the memset value 3117/// operand. 3118static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3119 DebugLoc dl) { 3120 assert(Value.getOpcode() != ISD::UNDEF); 3121 3122 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3123 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3124 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3125 unsigned Shift = 8; 3126 for (unsigned i = NumBits; i > 8; i >>= 1) { 3127 Val = (Val << Shift) | Val; 3128 Shift <<= 1; 3129 } 3130 if (VT.isInteger()) 3131 return DAG.getConstant(Val, VT); 3132 return DAG.getConstantFP(APFloat(Val), VT); 3133 } 3134 3135 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3136 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3137 unsigned Shift = 8; 3138 for (unsigned i = NumBits; i > 8; i >>= 1) { 3139 Value = DAG.getNode(ISD::OR, dl, VT, 3140 DAG.getNode(ISD::SHL, dl, VT, Value, 3141 DAG.getConstant(Shift, 3142 TLI.getShiftAmountTy())), 3143 Value); 3144 Shift <<= 1; 3145 } 3146 3147 return Value; 3148} 3149 3150/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3151/// used when a memcpy is turned into a memset when the source is a constant 3152/// string ptr. 3153static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3154 const TargetLowering &TLI, 3155 std::string &Str, unsigned Offset) { 3156 // Handle vector with all elements zero. 3157 if (Str.empty()) { 3158 if (VT.isInteger()) 3159 return DAG.getConstant(0, VT); 3160 else if (VT.getSimpleVT().SimpleTy == MVT::f32 || 3161 VT.getSimpleVT().SimpleTy == MVT::f64) 3162 return DAG.getConstantFP(0.0, VT); 3163 else if (VT.isVector()) { 3164 unsigned NumElts = VT.getVectorNumElements(); 3165 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3166 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3167 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3168 EltVT, NumElts))); 3169 } else 3170 llvm_unreachable("Expected type!"); 3171 } 3172 3173 assert(!VT.isVector() && "Can't handle vector type here!"); 3174 unsigned NumBits = VT.getSizeInBits(); 3175 unsigned MSB = NumBits / 8; 3176 uint64_t Val = 0; 3177 if (TLI.isLittleEndian()) 3178 Offset = Offset + MSB - 1; 3179 for (unsigned i = 0; i != MSB; ++i) { 3180 Val = (Val << 8) | (unsigned char)Str[Offset]; 3181 Offset += TLI.isLittleEndian() ? -1 : 1; 3182 } 3183 return DAG.getConstant(Val, VT); 3184} 3185 3186/// getMemBasePlusOffset - Returns base and offset node for the 3187/// 3188static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3189 SelectionDAG &DAG) { 3190 EVT VT = Base.getValueType(); 3191 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3192 VT, Base, DAG.getConstant(Offset, VT)); 3193} 3194 3195/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3196/// 3197static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3198 unsigned SrcDelta = 0; 3199 GlobalAddressSDNode *G = NULL; 3200 if (Src.getOpcode() == ISD::GlobalAddress) 3201 G = cast<GlobalAddressSDNode>(Src); 3202 else if (Src.getOpcode() == ISD::ADD && 3203 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3204 Src.getOperand(1).getOpcode() == ISD::Constant) { 3205 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3206 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3207 } 3208 if (!G) 3209 return false; 3210 3211 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3212 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3213 return true; 3214 3215 return false; 3216} 3217 3218/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3219/// to replace the memset / memcpy. Return true if the number of memory ops 3220/// is below the threshold. It returns the types of the sequence of 3221/// memory ops to perform memset / memcpy by reference. 3222static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3223 unsigned Limit, uint64_t Size, 3224 unsigned DstAlign, unsigned SrcAlign, 3225 bool NonScalarIntSafe, 3226 bool MemcpyStrSrc, 3227 SelectionDAG &DAG, 3228 const TargetLowering &TLI) { 3229 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3230 "Expecting memcpy / memset source to meet alignment requirement!"); 3231 // If 'SrcAlign' is zero, that means the memory operation does not need load 3232 // the value, i.e. memset or memcpy from constant string. Otherwise, it's 3233 // the inferred alignment of the source. 'DstAlign', on the other hand, is the 3234 // specified alignment of the memory operation. If it is zero, that means 3235 // it's possible to change the alignment of the destination. 'MemcpyStrSrc' 3236 // indicates whether the memcpy source is constant so it does not need to be 3237 // loaded. 3238 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3239 NonScalarIntSafe, MemcpyStrSrc, 3240 DAG.getMachineFunction()); 3241 3242 if (VT == MVT::Other) { 3243 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3244 TLI.allowsUnalignedMemoryAccesses(VT)) { 3245 VT = TLI.getPointerTy(); 3246 } else { 3247 switch (DstAlign & 7) { 3248 case 0: VT = MVT::i64; break; 3249 case 4: VT = MVT::i32; break; 3250 case 2: VT = MVT::i16; break; 3251 default: VT = MVT::i8; break; 3252 } 3253 } 3254 3255 MVT LVT = MVT::i64; 3256 while (!TLI.isTypeLegal(LVT)) 3257 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3258 assert(LVT.isInteger()); 3259 3260 if (VT.bitsGT(LVT)) 3261 VT = LVT; 3262 } 3263 3264 unsigned NumMemOps = 0; 3265 while (Size != 0) { 3266 unsigned VTSize = VT.getSizeInBits() / 8; 3267 while (VTSize > Size) { 3268 // For now, only use non-vector load / store's for the left-over pieces. 3269 if (VT.isVector() || VT.isFloatingPoint()) { 3270 VT = MVT::i64; 3271 while (!TLI.isTypeLegal(VT)) 3272 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3273 VTSize = VT.getSizeInBits() / 8; 3274 } else { 3275 // This can result in a type that is not legal on the target, e.g. 3276 // 1 or 2 bytes on PPC. 3277 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3278 VTSize >>= 1; 3279 } 3280 } 3281 3282 if (++NumMemOps > Limit) 3283 return false; 3284 MemOps.push_back(VT); 3285 Size -= VTSize; 3286 } 3287 3288 return true; 3289} 3290 3291static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3292 SDValue Chain, SDValue Dst, 3293 SDValue Src, uint64_t Size, 3294 unsigned Align, bool isVol, 3295 bool AlwaysInline, 3296 const Value *DstSV, uint64_t DstSVOff, 3297 const Value *SrcSV, uint64_t SrcSVOff) { 3298 // Turn a memcpy of undef to nop. 3299 if (Src.getOpcode() == ISD::UNDEF) 3300 return Chain; 3301 3302 // Expand memcpy to a series of load and store ops if the size operand falls 3303 // below a certain threshold. 3304 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3305 std::vector<EVT> MemOps; 3306 bool DstAlignCanChange = false; 3307 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3308 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3309 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3310 DstAlignCanChange = true; 3311 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3312 if (Align > SrcAlign) 3313 SrcAlign = Align; 3314 std::string Str; 3315 bool CopyFromStr = isMemSrcFromString(Src, Str); 3316 bool isZeroStr = CopyFromStr && Str.empty(); 3317 uint64_t Limit = -1ULL; 3318 if (!AlwaysInline) 3319 Limit = TLI.getMaxStoresPerMemcpy(); 3320 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3321 (DstAlignCanChange ? 0 : Align), 3322 (isZeroStr ? 0 : SrcAlign), 3323 true, CopyFromStr, DAG, TLI)) 3324 return SDValue(); 3325 3326 if (DstAlignCanChange) { 3327 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3328 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3329 if (NewAlign > Align) { 3330 // Give the stack frame object a larger alignment if needed. 3331 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3332 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3333 Align = NewAlign; 3334 } 3335 } 3336 3337 SmallVector<SDValue, 8> OutChains; 3338 unsigned NumMemOps = MemOps.size(); 3339 uint64_t SrcOff = 0, DstOff = 0; 3340 for (unsigned i = 0; i != NumMemOps; ++i) { 3341 EVT VT = MemOps[i]; 3342 unsigned VTSize = VT.getSizeInBits() / 8; 3343 SDValue Value, Store; 3344 3345 if (CopyFromStr && 3346 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3347 // It's unlikely a store of a vector immediate can be done in a single 3348 // instruction. It would require a load from a constantpool first. 3349 // We only handle zero vectors here. 3350 // FIXME: Handle other cases where store of vector immediate is done in 3351 // a single instruction. 3352 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3353 Store = DAG.getStore(Chain, dl, Value, 3354 getMemBasePlusOffset(Dst, DstOff, DAG), 3355 DstSV, DstSVOff + DstOff, isVol, false, Align); 3356 } else { 3357 // The type might not be legal for the target. This should only happen 3358 // if the type is smaller than a legal type, as on PPC, so the right 3359 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3360 // to Load/Store if NVT==VT. 3361 // FIXME does the case above also need this? 3362 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3363 assert(NVT.bitsGE(VT)); 3364 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3365 getMemBasePlusOffset(Src, SrcOff, DAG), 3366 SrcSV, SrcSVOff + SrcOff, VT, isVol, false, 3367 MinAlign(SrcAlign, SrcOff)); 3368 Store = DAG.getTruncStore(Chain, dl, Value, 3369 getMemBasePlusOffset(Dst, DstOff, DAG), 3370 DstSV, DstSVOff + DstOff, VT, isVol, false, 3371 Align); 3372 } 3373 OutChains.push_back(Store); 3374 SrcOff += VTSize; 3375 DstOff += VTSize; 3376 } 3377 3378 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3379 &OutChains[0], OutChains.size()); 3380} 3381 3382static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3383 SDValue Chain, SDValue Dst, 3384 SDValue Src, uint64_t Size, 3385 unsigned Align, bool isVol, 3386 bool AlwaysInline, 3387 const Value *DstSV, uint64_t DstSVOff, 3388 const Value *SrcSV, uint64_t SrcSVOff) { 3389 // Turn a memmove of undef to nop. 3390 if (Src.getOpcode() == ISD::UNDEF) 3391 return Chain; 3392 3393 // Expand memmove to a series of load and store ops if the size operand falls 3394 // below a certain threshold. 3395 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3396 std::vector<EVT> MemOps; 3397 uint64_t Limit = -1ULL; 3398 if (!AlwaysInline) 3399 Limit = TLI.getMaxStoresPerMemmove(); 3400 bool DstAlignCanChange = false; 3401 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3402 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3403 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3404 DstAlignCanChange = true; 3405 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3406 if (Align > SrcAlign) 3407 SrcAlign = Align; 3408 3409 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3410 (DstAlignCanChange ? 0 : Align), 3411 SrcAlign, true, false, DAG, TLI)) 3412 return SDValue(); 3413 3414 if (DstAlignCanChange) { 3415 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3416 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3417 if (NewAlign > Align) { 3418 // Give the stack frame object a larger alignment if needed. 3419 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3420 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3421 Align = NewAlign; 3422 } 3423 } 3424 3425 uint64_t SrcOff = 0, DstOff = 0; 3426 SmallVector<SDValue, 8> LoadValues; 3427 SmallVector<SDValue, 8> LoadChains; 3428 SmallVector<SDValue, 8> OutChains; 3429 unsigned NumMemOps = MemOps.size(); 3430 for (unsigned i = 0; i < NumMemOps; i++) { 3431 EVT VT = MemOps[i]; 3432 unsigned VTSize = VT.getSizeInBits() / 8; 3433 SDValue Value, Store; 3434 3435 Value = DAG.getLoad(VT, dl, Chain, 3436 getMemBasePlusOffset(Src, SrcOff, DAG), 3437 SrcSV, SrcSVOff + SrcOff, isVol, false, SrcAlign); 3438 LoadValues.push_back(Value); 3439 LoadChains.push_back(Value.getValue(1)); 3440 SrcOff += VTSize; 3441 } 3442 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3443 &LoadChains[0], LoadChains.size()); 3444 OutChains.clear(); 3445 for (unsigned i = 0; i < NumMemOps; i++) { 3446 EVT VT = MemOps[i]; 3447 unsigned VTSize = VT.getSizeInBits() / 8; 3448 SDValue Value, Store; 3449 3450 Store = DAG.getStore(Chain, dl, LoadValues[i], 3451 getMemBasePlusOffset(Dst, DstOff, DAG), 3452 DstSV, DstSVOff + DstOff, isVol, false, Align); 3453 OutChains.push_back(Store); 3454 DstOff += VTSize; 3455 } 3456 3457 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3458 &OutChains[0], OutChains.size()); 3459} 3460 3461static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3462 SDValue Chain, SDValue Dst, 3463 SDValue Src, uint64_t Size, 3464 unsigned Align, bool isVol, 3465 const Value *DstSV, uint64_t DstSVOff) { 3466 // Turn a memset of undef to nop. 3467 if (Src.getOpcode() == ISD::UNDEF) 3468 return Chain; 3469 3470 // Expand memset to a series of load/store ops if the size operand 3471 // falls below a certain threshold. 3472 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3473 std::vector<EVT> MemOps; 3474 bool DstAlignCanChange = false; 3475 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3476 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3477 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3478 DstAlignCanChange = true; 3479 bool NonScalarIntSafe = 3480 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3481 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(), 3482 Size, (DstAlignCanChange ? 0 : Align), 0, 3483 NonScalarIntSafe, false, DAG, TLI)) 3484 return SDValue(); 3485 3486 if (DstAlignCanChange) { 3487 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3488 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3489 if (NewAlign > Align) { 3490 // Give the stack frame object a larger alignment if needed. 3491 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3492 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3493 Align = NewAlign; 3494 } 3495 } 3496 3497 SmallVector<SDValue, 8> OutChains; 3498 uint64_t DstOff = 0; 3499 unsigned NumMemOps = MemOps.size(); 3500 for (unsigned i = 0; i < NumMemOps; i++) { 3501 EVT VT = MemOps[i]; 3502 unsigned VTSize = VT.getSizeInBits() / 8; 3503 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3504 SDValue Store = DAG.getStore(Chain, dl, Value, 3505 getMemBasePlusOffset(Dst, DstOff, DAG), 3506 DstSV, DstSVOff + DstOff, isVol, false, 0); 3507 OutChains.push_back(Store); 3508 DstOff += VTSize; 3509 } 3510 3511 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3512 &OutChains[0], OutChains.size()); 3513} 3514 3515SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3516 SDValue Src, SDValue Size, 3517 unsigned Align, bool isVol, bool AlwaysInline, 3518 const Value *DstSV, uint64_t DstSVOff, 3519 const Value *SrcSV, uint64_t SrcSVOff) { 3520 3521 // Check to see if we should lower the memcpy to loads and stores first. 3522 // For cases within the target-specified limits, this is the best choice. 3523 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3524 if (ConstantSize) { 3525 // Memcpy with size zero? Just return the original chain. 3526 if (ConstantSize->isNullValue()) 3527 return Chain; 3528 3529 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3530 ConstantSize->getZExtValue(),Align, 3531 isVol, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3532 if (Result.getNode()) 3533 return Result; 3534 } 3535 3536 // Then check to see if we should lower the memcpy with target-specific 3537 // code. If the target chooses to do this, this is the next best. 3538 SDValue Result = 3539 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3540 isVol, AlwaysInline, 3541 DstSV, DstSVOff, SrcSV, SrcSVOff); 3542 if (Result.getNode()) 3543 return Result; 3544 3545 // If we really need inline code and the target declined to provide it, 3546 // use a (potentially long) sequence of loads and stores. 3547 if (AlwaysInline) { 3548 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3549 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3550 ConstantSize->getZExtValue(), Align, isVol, 3551 true, DstSV, DstSVOff, SrcSV, SrcSVOff); 3552 } 3553 3554 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3555 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3556 // respect volatile, so they may do things like read or write memory 3557 // beyond the given memory regions. But fixing this isn't easy, and most 3558 // people don't care. 3559 3560 // Emit a library call. 3561 TargetLowering::ArgListTy Args; 3562 TargetLowering::ArgListEntry Entry; 3563 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3564 Entry.Node = Dst; Args.push_back(Entry); 3565 Entry.Node = Src; Args.push_back(Entry); 3566 Entry.Node = Size; Args.push_back(Entry); 3567 // FIXME: pass in DebugLoc 3568 std::pair<SDValue,SDValue> CallResult = 3569 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3570 false, false, false, false, 0, 3571 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3572 /*isReturnValueUsed=*/false, 3573 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3574 TLI.getPointerTy()), 3575 Args, *this, dl); 3576 return CallResult.second; 3577} 3578 3579SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3580 SDValue Src, SDValue Size, 3581 unsigned Align, bool isVol, 3582 const Value *DstSV, uint64_t DstSVOff, 3583 const Value *SrcSV, uint64_t SrcSVOff) { 3584 3585 // Check to see if we should lower the memmove to loads and stores first. 3586 // For cases within the target-specified limits, this is the best choice. 3587 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3588 if (ConstantSize) { 3589 // Memmove with size zero? Just return the original chain. 3590 if (ConstantSize->isNullValue()) 3591 return Chain; 3592 3593 SDValue Result = 3594 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3595 ConstantSize->getZExtValue(), Align, isVol, 3596 false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3597 if (Result.getNode()) 3598 return Result; 3599 } 3600 3601 // Then check to see if we should lower the memmove with target-specific 3602 // code. If the target chooses to do this, this is the next best. 3603 SDValue Result = 3604 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3605 DstSV, DstSVOff, SrcSV, SrcSVOff); 3606 if (Result.getNode()) 3607 return Result; 3608 3609 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3610 // not be safe. See memcpy above for more details. 3611 3612 // Emit a library call. 3613 TargetLowering::ArgListTy Args; 3614 TargetLowering::ArgListEntry Entry; 3615 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3616 Entry.Node = Dst; Args.push_back(Entry); 3617 Entry.Node = Src; Args.push_back(Entry); 3618 Entry.Node = Size; Args.push_back(Entry); 3619 // FIXME: pass in DebugLoc 3620 std::pair<SDValue,SDValue> CallResult = 3621 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3622 false, false, false, false, 0, 3623 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3624 /*isReturnValueUsed=*/false, 3625 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3626 TLI.getPointerTy()), 3627 Args, *this, dl); 3628 return CallResult.second; 3629} 3630 3631SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3632 SDValue Src, SDValue Size, 3633 unsigned Align, bool isVol, 3634 const Value *DstSV, uint64_t DstSVOff) { 3635 3636 // Check to see if we should lower the memset to stores first. 3637 // For cases within the target-specified limits, this is the best choice. 3638 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3639 if (ConstantSize) { 3640 // Memset with size zero? Just return the original chain. 3641 if (ConstantSize->isNullValue()) 3642 return Chain; 3643 3644 SDValue Result = 3645 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3646 Align, isVol, DstSV, DstSVOff); 3647 3648 if (Result.getNode()) 3649 return Result; 3650 } 3651 3652 // Then check to see if we should lower the memset with target-specific 3653 // code. If the target chooses to do this, this is the next best. 3654 SDValue Result = 3655 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3656 DstSV, DstSVOff); 3657 if (Result.getNode()) 3658 return Result; 3659 3660 // Emit a library call. 3661 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3662 TargetLowering::ArgListTy Args; 3663 TargetLowering::ArgListEntry Entry; 3664 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3665 Args.push_back(Entry); 3666 // Extend or truncate the argument to be an i32 value for the call. 3667 if (Src.getValueType().bitsGT(MVT::i32)) 3668 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3669 else 3670 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3671 Entry.Node = Src; 3672 Entry.Ty = Type::getInt32Ty(*getContext()); 3673 Entry.isSExt = true; 3674 Args.push_back(Entry); 3675 Entry.Node = Size; 3676 Entry.Ty = IntPtrTy; 3677 Entry.isSExt = false; 3678 Args.push_back(Entry); 3679 // FIXME: pass in DebugLoc 3680 std::pair<SDValue,SDValue> CallResult = 3681 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3682 false, false, false, false, 0, 3683 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3684 /*isReturnValueUsed=*/false, 3685 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3686 TLI.getPointerTy()), 3687 Args, *this, dl); 3688 return CallResult.second; 3689} 3690 3691SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3692 SDValue Chain, 3693 SDValue Ptr, SDValue Cmp, 3694 SDValue Swp, const Value* PtrVal, 3695 unsigned Alignment) { 3696 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3697 Alignment = getEVTAlignment(MemVT); 3698 3699 // Check if the memory reference references a frame index 3700 if (!PtrVal) 3701 if (const FrameIndexSDNode *FI = 3702 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3703 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3704 3705 MachineFunction &MF = getMachineFunction(); 3706 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3707 3708 // For now, atomics are considered to be volatile always. 3709 Flags |= MachineMemOperand::MOVolatile; 3710 3711 MachineMemOperand *MMO = 3712 MF.getMachineMemOperand(PtrVal, Flags, 0, 3713 MemVT.getStoreSize(), Alignment); 3714 3715 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3716} 3717 3718SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3719 SDValue Chain, 3720 SDValue Ptr, SDValue Cmp, 3721 SDValue Swp, MachineMemOperand *MMO) { 3722 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3723 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3724 3725 EVT VT = Cmp.getValueType(); 3726 3727 SDVTList VTs = getVTList(VT, MVT::Other); 3728 FoldingSetNodeID ID; 3729 ID.AddInteger(MemVT.getRawBits()); 3730 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3731 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3732 void* IP = 0; 3733 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3734 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3735 return SDValue(E, 0); 3736 } 3737 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3738 Ptr, Cmp, Swp, MMO); 3739 CSEMap.InsertNode(N, IP); 3740 AllNodes.push_back(N); 3741 return SDValue(N, 0); 3742} 3743 3744SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3745 SDValue Chain, 3746 SDValue Ptr, SDValue Val, 3747 const Value* PtrVal, 3748 unsigned Alignment) { 3749 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3750 Alignment = getEVTAlignment(MemVT); 3751 3752 // Check if the memory reference references a frame index 3753 if (!PtrVal) 3754 if (const FrameIndexSDNode *FI = 3755 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3756 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3757 3758 MachineFunction &MF = getMachineFunction(); 3759 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3760 3761 // For now, atomics are considered to be volatile always. 3762 Flags |= MachineMemOperand::MOVolatile; 3763 3764 MachineMemOperand *MMO = 3765 MF.getMachineMemOperand(PtrVal, Flags, 0, 3766 MemVT.getStoreSize(), Alignment); 3767 3768 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3769} 3770 3771SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3772 SDValue Chain, 3773 SDValue Ptr, SDValue Val, 3774 MachineMemOperand *MMO) { 3775 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3776 Opcode == ISD::ATOMIC_LOAD_SUB || 3777 Opcode == ISD::ATOMIC_LOAD_AND || 3778 Opcode == ISD::ATOMIC_LOAD_OR || 3779 Opcode == ISD::ATOMIC_LOAD_XOR || 3780 Opcode == ISD::ATOMIC_LOAD_NAND || 3781 Opcode == ISD::ATOMIC_LOAD_MIN || 3782 Opcode == ISD::ATOMIC_LOAD_MAX || 3783 Opcode == ISD::ATOMIC_LOAD_UMIN || 3784 Opcode == ISD::ATOMIC_LOAD_UMAX || 3785 Opcode == ISD::ATOMIC_SWAP) && 3786 "Invalid Atomic Op"); 3787 3788 EVT VT = Val.getValueType(); 3789 3790 SDVTList VTs = getVTList(VT, MVT::Other); 3791 FoldingSetNodeID ID; 3792 ID.AddInteger(MemVT.getRawBits()); 3793 SDValue Ops[] = {Chain, Ptr, Val}; 3794 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3795 void* IP = 0; 3796 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3797 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3798 return SDValue(E, 0); 3799 } 3800 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3801 Ptr, Val, MMO); 3802 CSEMap.InsertNode(N, IP); 3803 AllNodes.push_back(N); 3804 return SDValue(N, 0); 3805} 3806 3807/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3808/// Allowed to return something different (and simpler) if Simplify is true. 3809SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3810 DebugLoc dl) { 3811 if (NumOps == 1) 3812 return Ops[0]; 3813 3814 SmallVector<EVT, 4> VTs; 3815 VTs.reserve(NumOps); 3816 for (unsigned i = 0; i < NumOps; ++i) 3817 VTs.push_back(Ops[i].getValueType()); 3818 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3819 Ops, NumOps); 3820} 3821 3822SDValue 3823SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3824 const EVT *VTs, unsigned NumVTs, 3825 const SDValue *Ops, unsigned NumOps, 3826 EVT MemVT, const Value *srcValue, int SVOff, 3827 unsigned Align, bool Vol, 3828 bool ReadMem, bool WriteMem) { 3829 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3830 MemVT, srcValue, SVOff, Align, Vol, 3831 ReadMem, WriteMem); 3832} 3833 3834SDValue 3835SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3836 const SDValue *Ops, unsigned NumOps, 3837 EVT MemVT, const Value *srcValue, int SVOff, 3838 unsigned Align, bool Vol, 3839 bool ReadMem, bool WriteMem) { 3840 if (Align == 0) // Ensure that codegen never sees alignment 0 3841 Align = getEVTAlignment(MemVT); 3842 3843 MachineFunction &MF = getMachineFunction(); 3844 unsigned Flags = 0; 3845 if (WriteMem) 3846 Flags |= MachineMemOperand::MOStore; 3847 if (ReadMem) 3848 Flags |= MachineMemOperand::MOLoad; 3849 if (Vol) 3850 Flags |= MachineMemOperand::MOVolatile; 3851 MachineMemOperand *MMO = 3852 MF.getMachineMemOperand(srcValue, Flags, SVOff, 3853 MemVT.getStoreSize(), Align); 3854 3855 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3856} 3857 3858SDValue 3859SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3860 const SDValue *Ops, unsigned NumOps, 3861 EVT MemVT, MachineMemOperand *MMO) { 3862 assert((Opcode == ISD::INTRINSIC_VOID || 3863 Opcode == ISD::INTRINSIC_W_CHAIN || 3864 (Opcode <= INT_MAX && 3865 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3866 "Opcode is not a memory-accessing opcode!"); 3867 3868 // Memoize the node unless it returns a flag. 3869 MemIntrinsicSDNode *N; 3870 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3871 FoldingSetNodeID ID; 3872 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3873 void *IP = 0; 3874 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3875 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3876 return SDValue(E, 0); 3877 } 3878 3879 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3880 MemVT, MMO); 3881 CSEMap.InsertNode(N, IP); 3882 } else { 3883 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3884 MemVT, MMO); 3885 } 3886 AllNodes.push_back(N); 3887 return SDValue(N, 0); 3888} 3889 3890SDValue 3891SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3892 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3893 SDValue Ptr, SDValue Offset, 3894 const Value *SV, int SVOffset, EVT MemVT, 3895 bool isVolatile, bool isNonTemporal, 3896 unsigned Alignment) { 3897 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3898 Alignment = getEVTAlignment(VT); 3899 3900 // Check if the memory reference references a frame index 3901 if (!SV) 3902 if (const FrameIndexSDNode *FI = 3903 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3904 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3905 3906 MachineFunction &MF = getMachineFunction(); 3907 unsigned Flags = MachineMemOperand::MOLoad; 3908 if (isVolatile) 3909 Flags |= MachineMemOperand::MOVolatile; 3910 if (isNonTemporal) 3911 Flags |= MachineMemOperand::MONonTemporal; 3912 MachineMemOperand *MMO = 3913 MF.getMachineMemOperand(SV, Flags, SVOffset, 3914 MemVT.getStoreSize(), Alignment); 3915 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO); 3916} 3917 3918SDValue 3919SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3920 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3921 SDValue Ptr, SDValue Offset, EVT MemVT, 3922 MachineMemOperand *MMO) { 3923 if (VT == MemVT) { 3924 ExtType = ISD::NON_EXTLOAD; 3925 } else if (ExtType == ISD::NON_EXTLOAD) { 3926 assert(VT == MemVT && "Non-extending load from different memory type!"); 3927 } else { 3928 // Extending load. 3929 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 3930 "Should only be an extending load, not truncating!"); 3931 assert(VT.isInteger() == MemVT.isInteger() && 3932 "Cannot convert from FP to Int or Int -> FP!"); 3933 assert(VT.isVector() == MemVT.isVector() && 3934 "Cannot use trunc store to convert to or from a vector!"); 3935 assert((!VT.isVector() || 3936 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 3937 "Cannot use trunc store to change the number of vector elements!"); 3938 } 3939 3940 bool Indexed = AM != ISD::UNINDEXED; 3941 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3942 "Unindexed load with an offset!"); 3943 3944 SDVTList VTs = Indexed ? 3945 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3946 SDValue Ops[] = { Chain, Ptr, Offset }; 3947 FoldingSetNodeID ID; 3948 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3949 ID.AddInteger(MemVT.getRawBits()); 3950 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 3951 MMO->isNonTemporal())); 3952 void *IP = 0; 3953 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3954 cast<LoadSDNode>(E)->refineAlignment(MMO); 3955 return SDValue(E, 0); 3956 } 3957 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 3958 MemVT, MMO); 3959 CSEMap.InsertNode(N, IP); 3960 AllNodes.push_back(N); 3961 return SDValue(N, 0); 3962} 3963 3964SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3965 SDValue Chain, SDValue Ptr, 3966 const Value *SV, int SVOffset, 3967 bool isVolatile, bool isNonTemporal, 3968 unsigned Alignment) { 3969 SDValue Undef = getUNDEF(Ptr.getValueType()); 3970 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3971 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment); 3972} 3973 3974SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3975 SDValue Chain, SDValue Ptr, 3976 const Value *SV, 3977 int SVOffset, EVT MemVT, 3978 bool isVolatile, bool isNonTemporal, 3979 unsigned Alignment) { 3980 SDValue Undef = getUNDEF(Ptr.getValueType()); 3981 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3982 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment); 3983} 3984 3985SDValue 3986SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3987 SDValue Offset, ISD::MemIndexedMode AM) { 3988 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3989 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3990 "Load is already a indexed load!"); 3991 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3992 LD->getChain(), Base, Offset, LD->getSrcValue(), 3993 LD->getSrcValueOffset(), LD->getMemoryVT(), 3994 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 3995} 3996 3997SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3998 SDValue Ptr, const Value *SV, int SVOffset, 3999 bool isVolatile, bool isNonTemporal, 4000 unsigned Alignment) { 4001 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4002 Alignment = getEVTAlignment(Val.getValueType()); 4003 4004 // Check if the memory reference references a frame index 4005 if (!SV) 4006 if (const FrameIndexSDNode *FI = 4007 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 4008 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 4009 4010 MachineFunction &MF = getMachineFunction(); 4011 unsigned Flags = MachineMemOperand::MOStore; 4012 if (isVolatile) 4013 Flags |= MachineMemOperand::MOVolatile; 4014 if (isNonTemporal) 4015 Flags |= MachineMemOperand::MONonTemporal; 4016 MachineMemOperand *MMO = 4017 MF.getMachineMemOperand(SV, Flags, SVOffset, 4018 Val.getValueType().getStoreSize(), Alignment); 4019 4020 return getStore(Chain, dl, Val, Ptr, MMO); 4021} 4022 4023SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4024 SDValue Ptr, MachineMemOperand *MMO) { 4025 EVT VT = Val.getValueType(); 4026 SDVTList VTs = getVTList(MVT::Other); 4027 SDValue Undef = getUNDEF(Ptr.getValueType()); 4028 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4029 FoldingSetNodeID ID; 4030 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4031 ID.AddInteger(VT.getRawBits()); 4032 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4033 MMO->isNonTemporal())); 4034 void *IP = 0; 4035 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4036 cast<StoreSDNode>(E)->refineAlignment(MMO); 4037 return SDValue(E, 0); 4038 } 4039 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4040 false, VT, MMO); 4041 CSEMap.InsertNode(N, IP); 4042 AllNodes.push_back(N); 4043 return SDValue(N, 0); 4044} 4045 4046SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4047 SDValue Ptr, const Value *SV, 4048 int SVOffset, EVT SVT, 4049 bool isVolatile, bool isNonTemporal, 4050 unsigned Alignment) { 4051 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4052 Alignment = getEVTAlignment(SVT); 4053 4054 // Check if the memory reference references a frame index 4055 if (!SV) 4056 if (const FrameIndexSDNode *FI = 4057 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 4058 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 4059 4060 MachineFunction &MF = getMachineFunction(); 4061 unsigned Flags = MachineMemOperand::MOStore; 4062 if (isVolatile) 4063 Flags |= MachineMemOperand::MOVolatile; 4064 if (isNonTemporal) 4065 Flags |= MachineMemOperand::MONonTemporal; 4066 MachineMemOperand *MMO = 4067 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment); 4068 4069 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4070} 4071 4072SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4073 SDValue Ptr, EVT SVT, 4074 MachineMemOperand *MMO) { 4075 EVT VT = Val.getValueType(); 4076 4077 if (VT == SVT) 4078 return getStore(Chain, dl, Val, Ptr, MMO); 4079 4080 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4081 "Should only be a truncating store, not extending!"); 4082 assert(VT.isInteger() == SVT.isInteger() && 4083 "Can't do FP-INT conversion!"); 4084 assert(VT.isVector() == SVT.isVector() && 4085 "Cannot use trunc store to convert to or from a vector!"); 4086 assert((!VT.isVector() || 4087 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4088 "Cannot use trunc store to change the number of vector elements!"); 4089 4090 SDVTList VTs = getVTList(MVT::Other); 4091 SDValue Undef = getUNDEF(Ptr.getValueType()); 4092 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4093 FoldingSetNodeID ID; 4094 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4095 ID.AddInteger(SVT.getRawBits()); 4096 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4097 MMO->isNonTemporal())); 4098 void *IP = 0; 4099 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4100 cast<StoreSDNode>(E)->refineAlignment(MMO); 4101 return SDValue(E, 0); 4102 } 4103 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4104 true, SVT, MMO); 4105 CSEMap.InsertNode(N, IP); 4106 AllNodes.push_back(N); 4107 return SDValue(N, 0); 4108} 4109 4110SDValue 4111SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4112 SDValue Offset, ISD::MemIndexedMode AM) { 4113 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4114 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4115 "Store is already a indexed store!"); 4116 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4117 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4118 FoldingSetNodeID ID; 4119 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4120 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4121 ID.AddInteger(ST->getRawSubclassData()); 4122 void *IP = 0; 4123 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4124 return SDValue(E, 0); 4125 4126 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4127 ST->isTruncatingStore(), 4128 ST->getMemoryVT(), 4129 ST->getMemOperand()); 4130 CSEMap.InsertNode(N, IP); 4131 AllNodes.push_back(N); 4132 return SDValue(N, 0); 4133} 4134 4135SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4136 SDValue Chain, SDValue Ptr, 4137 SDValue SV) { 4138 SDValue Ops[] = { Chain, Ptr, SV }; 4139 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 4140} 4141 4142SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4143 const SDUse *Ops, unsigned NumOps) { 4144 switch (NumOps) { 4145 case 0: return getNode(Opcode, DL, VT); 4146 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4147 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4148 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4149 default: break; 4150 } 4151 4152 // Copy from an SDUse array into an SDValue array for use with 4153 // the regular getNode logic. 4154 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4155 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4156} 4157 4158SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4159 const SDValue *Ops, unsigned NumOps) { 4160 switch (NumOps) { 4161 case 0: return getNode(Opcode, DL, VT); 4162 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4163 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4164 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4165 default: break; 4166 } 4167 4168 switch (Opcode) { 4169 default: break; 4170 case ISD::SELECT_CC: { 4171 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4172 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4173 "LHS and RHS of condition must have same type!"); 4174 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4175 "True and False arms of SelectCC must have same type!"); 4176 assert(Ops[2].getValueType() == VT && 4177 "select_cc node must be of same type as true and false value!"); 4178 break; 4179 } 4180 case ISD::BR_CC: { 4181 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4182 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4183 "LHS/RHS of comparison should match types!"); 4184 break; 4185 } 4186 } 4187 4188 // Memoize nodes. 4189 SDNode *N; 4190 SDVTList VTs = getVTList(VT); 4191 4192 if (VT != MVT::Flag) { 4193 FoldingSetNodeID ID; 4194 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4195 void *IP = 0; 4196 4197 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4198 return SDValue(E, 0); 4199 4200 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4201 CSEMap.InsertNode(N, IP); 4202 } else { 4203 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4204 } 4205 4206 AllNodes.push_back(N); 4207#ifndef NDEBUG 4208 VerifyNode(N); 4209#endif 4210 return SDValue(N, 0); 4211} 4212 4213SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4214 const std::vector<EVT> &ResultTys, 4215 const SDValue *Ops, unsigned NumOps) { 4216 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4217 Ops, NumOps); 4218} 4219 4220SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4221 const EVT *VTs, unsigned NumVTs, 4222 const SDValue *Ops, unsigned NumOps) { 4223 if (NumVTs == 1) 4224 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4225 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4226} 4227 4228SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4229 const SDValue *Ops, unsigned NumOps) { 4230 if (VTList.NumVTs == 1) 4231 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4232 4233#if 0 4234 switch (Opcode) { 4235 // FIXME: figure out how to safely handle things like 4236 // int foo(int x) { return 1 << (x & 255); } 4237 // int bar() { return foo(256); } 4238 case ISD::SRA_PARTS: 4239 case ISD::SRL_PARTS: 4240 case ISD::SHL_PARTS: 4241 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4242 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4243 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4244 else if (N3.getOpcode() == ISD::AND) 4245 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4246 // If the and is only masking out bits that cannot effect the shift, 4247 // eliminate the and. 4248 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4249 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4250 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4251 } 4252 break; 4253 } 4254#endif 4255 4256 // Memoize the node unless it returns a flag. 4257 SDNode *N; 4258 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4259 FoldingSetNodeID ID; 4260 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4261 void *IP = 0; 4262 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4263 return SDValue(E, 0); 4264 4265 if (NumOps == 1) { 4266 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4267 } else if (NumOps == 2) { 4268 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4269 } else if (NumOps == 3) { 4270 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4271 Ops[2]); 4272 } else { 4273 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4274 } 4275 CSEMap.InsertNode(N, IP); 4276 } else { 4277 if (NumOps == 1) { 4278 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4279 } else if (NumOps == 2) { 4280 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4281 } else if (NumOps == 3) { 4282 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4283 Ops[2]); 4284 } else { 4285 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4286 } 4287 } 4288 AllNodes.push_back(N); 4289#ifndef NDEBUG 4290 VerifyNode(N); 4291#endif 4292 return SDValue(N, 0); 4293} 4294 4295SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4296 return getNode(Opcode, DL, VTList, 0, 0); 4297} 4298 4299SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4300 SDValue N1) { 4301 SDValue Ops[] = { N1 }; 4302 return getNode(Opcode, DL, VTList, Ops, 1); 4303} 4304 4305SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4306 SDValue N1, SDValue N2) { 4307 SDValue Ops[] = { N1, N2 }; 4308 return getNode(Opcode, DL, VTList, Ops, 2); 4309} 4310 4311SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4312 SDValue N1, SDValue N2, SDValue N3) { 4313 SDValue Ops[] = { N1, N2, N3 }; 4314 return getNode(Opcode, DL, VTList, Ops, 3); 4315} 4316 4317SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4318 SDValue N1, SDValue N2, SDValue N3, 4319 SDValue N4) { 4320 SDValue Ops[] = { N1, N2, N3, N4 }; 4321 return getNode(Opcode, DL, VTList, Ops, 4); 4322} 4323 4324SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4325 SDValue N1, SDValue N2, SDValue N3, 4326 SDValue N4, SDValue N5) { 4327 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4328 return getNode(Opcode, DL, VTList, Ops, 5); 4329} 4330 4331SDVTList SelectionDAG::getVTList(EVT VT) { 4332 return makeVTList(SDNode::getValueTypeList(VT), 1); 4333} 4334 4335SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4336 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4337 E = VTList.rend(); I != E; ++I) 4338 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4339 return *I; 4340 4341 EVT *Array = Allocator.Allocate<EVT>(2); 4342 Array[0] = VT1; 4343 Array[1] = VT2; 4344 SDVTList Result = makeVTList(Array, 2); 4345 VTList.push_back(Result); 4346 return Result; 4347} 4348 4349SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4350 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4351 E = VTList.rend(); I != E; ++I) 4352 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4353 I->VTs[2] == VT3) 4354 return *I; 4355 4356 EVT *Array = Allocator.Allocate<EVT>(3); 4357 Array[0] = VT1; 4358 Array[1] = VT2; 4359 Array[2] = VT3; 4360 SDVTList Result = makeVTList(Array, 3); 4361 VTList.push_back(Result); 4362 return Result; 4363} 4364 4365SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4366 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4367 E = VTList.rend(); I != E; ++I) 4368 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4369 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4370 return *I; 4371 4372 EVT *Array = Allocator.Allocate<EVT>(4); 4373 Array[0] = VT1; 4374 Array[1] = VT2; 4375 Array[2] = VT3; 4376 Array[3] = VT4; 4377 SDVTList Result = makeVTList(Array, 4); 4378 VTList.push_back(Result); 4379 return Result; 4380} 4381 4382SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4383 switch (NumVTs) { 4384 case 0: llvm_unreachable("Cannot have nodes without results!"); 4385 case 1: return getVTList(VTs[0]); 4386 case 2: return getVTList(VTs[0], VTs[1]); 4387 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4388 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4389 default: break; 4390 } 4391 4392 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4393 E = VTList.rend(); I != E; ++I) { 4394 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4395 continue; 4396 4397 bool NoMatch = false; 4398 for (unsigned i = 2; i != NumVTs; ++i) 4399 if (VTs[i] != I->VTs[i]) { 4400 NoMatch = true; 4401 break; 4402 } 4403 if (!NoMatch) 4404 return *I; 4405 } 4406 4407 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4408 std::copy(VTs, VTs+NumVTs, Array); 4409 SDVTList Result = makeVTList(Array, NumVTs); 4410 VTList.push_back(Result); 4411 return Result; 4412} 4413 4414 4415/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4416/// specified operands. If the resultant node already exists in the DAG, 4417/// this does not modify the specified node, instead it returns the node that 4418/// already exists. If the resultant node does not exist in the DAG, the 4419/// input node is returned. As a degenerate case, if you specify the same 4420/// input operands as the node already has, the input node is returned. 4421SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4422 SDNode *N = InN.getNode(); 4423 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4424 4425 // Check to see if there is no change. 4426 if (Op == N->getOperand(0)) return InN; 4427 4428 // See if the modified node already exists. 4429 void *InsertPos = 0; 4430 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4431 return SDValue(Existing, InN.getResNo()); 4432 4433 // Nope it doesn't. Remove the node from its current place in the maps. 4434 if (InsertPos) 4435 if (!RemoveNodeFromCSEMaps(N)) 4436 InsertPos = 0; 4437 4438 // Now we update the operands. 4439 N->OperandList[0].set(Op); 4440 4441 // If this gets put into a CSE map, add it. 4442 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4443 return InN; 4444} 4445 4446SDValue SelectionDAG:: 4447UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4448 SDNode *N = InN.getNode(); 4449 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4450 4451 // Check to see if there is no change. 4452 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4453 return InN; // No operands changed, just return the input node. 4454 4455 // See if the modified node already exists. 4456 void *InsertPos = 0; 4457 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4458 return SDValue(Existing, InN.getResNo()); 4459 4460 // Nope it doesn't. Remove the node from its current place in the maps. 4461 if (InsertPos) 4462 if (!RemoveNodeFromCSEMaps(N)) 4463 InsertPos = 0; 4464 4465 // Now we update the operands. 4466 if (N->OperandList[0] != Op1) 4467 N->OperandList[0].set(Op1); 4468 if (N->OperandList[1] != Op2) 4469 N->OperandList[1].set(Op2); 4470 4471 // If this gets put into a CSE map, add it. 4472 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4473 return InN; 4474} 4475 4476SDValue SelectionDAG:: 4477UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4478 SDValue Ops[] = { Op1, Op2, Op3 }; 4479 return UpdateNodeOperands(N, Ops, 3); 4480} 4481 4482SDValue SelectionDAG:: 4483UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4484 SDValue Op3, SDValue Op4) { 4485 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4486 return UpdateNodeOperands(N, Ops, 4); 4487} 4488 4489SDValue SelectionDAG:: 4490UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4491 SDValue Op3, SDValue Op4, SDValue Op5) { 4492 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4493 return UpdateNodeOperands(N, Ops, 5); 4494} 4495 4496SDValue SelectionDAG:: 4497UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4498 SDNode *N = InN.getNode(); 4499 assert(N->getNumOperands() == NumOps && 4500 "Update with wrong number of operands"); 4501 4502 // Check to see if there is no change. 4503 bool AnyChange = false; 4504 for (unsigned i = 0; i != NumOps; ++i) { 4505 if (Ops[i] != N->getOperand(i)) { 4506 AnyChange = true; 4507 break; 4508 } 4509 } 4510 4511 // No operands changed, just return the input node. 4512 if (!AnyChange) return InN; 4513 4514 // See if the modified node already exists. 4515 void *InsertPos = 0; 4516 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4517 return SDValue(Existing, InN.getResNo()); 4518 4519 // Nope it doesn't. Remove the node from its current place in the maps. 4520 if (InsertPos) 4521 if (!RemoveNodeFromCSEMaps(N)) 4522 InsertPos = 0; 4523 4524 // Now we update the operands. 4525 for (unsigned i = 0; i != NumOps; ++i) 4526 if (N->OperandList[i] != Ops[i]) 4527 N->OperandList[i].set(Ops[i]); 4528 4529 // If this gets put into a CSE map, add it. 4530 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4531 return InN; 4532} 4533 4534/// DropOperands - Release the operands and set this node to have 4535/// zero operands. 4536void SDNode::DropOperands() { 4537 // Unlike the code in MorphNodeTo that does this, we don't need to 4538 // watch for dead nodes here. 4539 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4540 SDUse &Use = *I++; 4541 Use.set(SDValue()); 4542 } 4543} 4544 4545/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4546/// machine opcode. 4547/// 4548SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4549 EVT VT) { 4550 SDVTList VTs = getVTList(VT); 4551 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4552} 4553 4554SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4555 EVT VT, SDValue Op1) { 4556 SDVTList VTs = getVTList(VT); 4557 SDValue Ops[] = { Op1 }; 4558 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4559} 4560 4561SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4562 EVT VT, SDValue Op1, 4563 SDValue Op2) { 4564 SDVTList VTs = getVTList(VT); 4565 SDValue Ops[] = { Op1, Op2 }; 4566 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4567} 4568 4569SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4570 EVT VT, SDValue Op1, 4571 SDValue Op2, SDValue Op3) { 4572 SDVTList VTs = getVTList(VT); 4573 SDValue Ops[] = { Op1, Op2, Op3 }; 4574 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4575} 4576 4577SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4578 EVT VT, const SDValue *Ops, 4579 unsigned NumOps) { 4580 SDVTList VTs = getVTList(VT); 4581 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4582} 4583 4584SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4585 EVT VT1, EVT VT2, const SDValue *Ops, 4586 unsigned NumOps) { 4587 SDVTList VTs = getVTList(VT1, VT2); 4588 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4589} 4590 4591SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4592 EVT VT1, EVT VT2) { 4593 SDVTList VTs = getVTList(VT1, VT2); 4594 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4595} 4596 4597SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4598 EVT VT1, EVT VT2, EVT VT3, 4599 const SDValue *Ops, unsigned NumOps) { 4600 SDVTList VTs = getVTList(VT1, VT2, VT3); 4601 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4602} 4603 4604SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4605 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4606 const SDValue *Ops, unsigned NumOps) { 4607 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4608 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4609} 4610 4611SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4612 EVT VT1, EVT VT2, 4613 SDValue Op1) { 4614 SDVTList VTs = getVTList(VT1, VT2); 4615 SDValue Ops[] = { Op1 }; 4616 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4617} 4618 4619SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4620 EVT VT1, EVT VT2, 4621 SDValue Op1, SDValue Op2) { 4622 SDVTList VTs = getVTList(VT1, VT2); 4623 SDValue Ops[] = { Op1, Op2 }; 4624 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4625} 4626 4627SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4628 EVT VT1, EVT VT2, 4629 SDValue Op1, SDValue Op2, 4630 SDValue Op3) { 4631 SDVTList VTs = getVTList(VT1, VT2); 4632 SDValue Ops[] = { Op1, Op2, Op3 }; 4633 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4634} 4635 4636SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4637 EVT VT1, EVT VT2, EVT VT3, 4638 SDValue Op1, SDValue Op2, 4639 SDValue Op3) { 4640 SDVTList VTs = getVTList(VT1, VT2, VT3); 4641 SDValue Ops[] = { Op1, Op2, Op3 }; 4642 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4643} 4644 4645SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4646 SDVTList VTs, const SDValue *Ops, 4647 unsigned NumOps) { 4648 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4649 // Reset the NodeID to -1. 4650 N->setNodeId(-1); 4651 return N; 4652} 4653 4654/// MorphNodeTo - This *mutates* the specified node to have the specified 4655/// return type, opcode, and operands. 4656/// 4657/// Note that MorphNodeTo returns the resultant node. If there is already a 4658/// node of the specified opcode and operands, it returns that node instead of 4659/// the current one. Note that the DebugLoc need not be the same. 4660/// 4661/// Using MorphNodeTo is faster than creating a new node and swapping it in 4662/// with ReplaceAllUsesWith both because it often avoids allocating a new 4663/// node, and because it doesn't require CSE recalculation for any of 4664/// the node's users. 4665/// 4666SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4667 SDVTList VTs, const SDValue *Ops, 4668 unsigned NumOps) { 4669 // If an identical node already exists, use it. 4670 void *IP = 0; 4671 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4672 FoldingSetNodeID ID; 4673 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4674 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4675 return ON; 4676 } 4677 4678 if (!RemoveNodeFromCSEMaps(N)) 4679 IP = 0; 4680 4681 // Start the morphing. 4682 N->NodeType = Opc; 4683 N->ValueList = VTs.VTs; 4684 N->NumValues = VTs.NumVTs; 4685 4686 // Clear the operands list, updating used nodes to remove this from their 4687 // use list. Keep track of any operands that become dead as a result. 4688 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4689 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4690 SDUse &Use = *I++; 4691 SDNode *Used = Use.getNode(); 4692 Use.set(SDValue()); 4693 if (Used->use_empty()) 4694 DeadNodeSet.insert(Used); 4695 } 4696 4697 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4698 // Initialize the memory references information. 4699 MN->setMemRefs(0, 0); 4700 // If NumOps is larger than the # of operands we can have in a 4701 // MachineSDNode, reallocate the operand list. 4702 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4703 if (MN->OperandsNeedDelete) 4704 delete[] MN->OperandList; 4705 if (NumOps > array_lengthof(MN->LocalOperands)) 4706 // We're creating a final node that will live unmorphed for the 4707 // remainder of the current SelectionDAG iteration, so we can allocate 4708 // the operands directly out of a pool with no recycling metadata. 4709 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4710 Ops, NumOps); 4711 else 4712 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4713 MN->OperandsNeedDelete = false; 4714 } else 4715 MN->InitOperands(MN->OperandList, Ops, NumOps); 4716 } else { 4717 // If NumOps is larger than the # of operands we currently have, reallocate 4718 // the operand list. 4719 if (NumOps > N->NumOperands) { 4720 if (N->OperandsNeedDelete) 4721 delete[] N->OperandList; 4722 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4723 N->OperandsNeedDelete = true; 4724 } else 4725 N->InitOperands(N->OperandList, Ops, NumOps); 4726 } 4727 4728 // Delete any nodes that are still dead after adding the uses for the 4729 // new operands. 4730 if (!DeadNodeSet.empty()) { 4731 SmallVector<SDNode *, 16> DeadNodes; 4732 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4733 E = DeadNodeSet.end(); I != E; ++I) 4734 if ((*I)->use_empty()) 4735 DeadNodes.push_back(*I); 4736 RemoveDeadNodes(DeadNodes); 4737 } 4738 4739 if (IP) 4740 CSEMap.InsertNode(N, IP); // Memoize the new node. 4741 return N; 4742} 4743 4744 4745/// getMachineNode - These are used for target selectors to create a new node 4746/// with specified return type(s), MachineInstr opcode, and operands. 4747/// 4748/// Note that getMachineNode returns the resultant node. If there is already a 4749/// node of the specified opcode and operands, it returns that node instead of 4750/// the current one. 4751MachineSDNode * 4752SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4753 SDVTList VTs = getVTList(VT); 4754 return getMachineNode(Opcode, dl, VTs, 0, 0); 4755} 4756 4757MachineSDNode * 4758SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4759 SDVTList VTs = getVTList(VT); 4760 SDValue Ops[] = { Op1 }; 4761 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4762} 4763 4764MachineSDNode * 4765SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4766 SDValue Op1, SDValue Op2) { 4767 SDVTList VTs = getVTList(VT); 4768 SDValue Ops[] = { Op1, Op2 }; 4769 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4770} 4771 4772MachineSDNode * 4773SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4774 SDValue Op1, SDValue Op2, SDValue Op3) { 4775 SDVTList VTs = getVTList(VT); 4776 SDValue Ops[] = { Op1, Op2, Op3 }; 4777 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4778} 4779 4780MachineSDNode * 4781SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4782 const SDValue *Ops, unsigned NumOps) { 4783 SDVTList VTs = getVTList(VT); 4784 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4785} 4786 4787MachineSDNode * 4788SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4789 SDVTList VTs = getVTList(VT1, VT2); 4790 return getMachineNode(Opcode, dl, VTs, 0, 0); 4791} 4792 4793MachineSDNode * 4794SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4795 EVT VT1, EVT VT2, SDValue Op1) { 4796 SDVTList VTs = getVTList(VT1, VT2); 4797 SDValue Ops[] = { Op1 }; 4798 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4799} 4800 4801MachineSDNode * 4802SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4803 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4804 SDVTList VTs = getVTList(VT1, VT2); 4805 SDValue Ops[] = { Op1, Op2 }; 4806 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4807} 4808 4809MachineSDNode * 4810SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4811 EVT VT1, EVT VT2, SDValue Op1, 4812 SDValue Op2, SDValue Op3) { 4813 SDVTList VTs = getVTList(VT1, VT2); 4814 SDValue Ops[] = { Op1, Op2, Op3 }; 4815 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4816} 4817 4818MachineSDNode * 4819SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4820 EVT VT1, EVT VT2, 4821 const SDValue *Ops, unsigned NumOps) { 4822 SDVTList VTs = getVTList(VT1, VT2); 4823 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4824} 4825 4826MachineSDNode * 4827SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4828 EVT VT1, EVT VT2, EVT VT3, 4829 SDValue Op1, SDValue Op2) { 4830 SDVTList VTs = getVTList(VT1, VT2, VT3); 4831 SDValue Ops[] = { Op1, Op2 }; 4832 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4833} 4834 4835MachineSDNode * 4836SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4837 EVT VT1, EVT VT2, EVT VT3, 4838 SDValue Op1, SDValue Op2, SDValue Op3) { 4839 SDVTList VTs = getVTList(VT1, VT2, VT3); 4840 SDValue Ops[] = { Op1, Op2, Op3 }; 4841 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4842} 4843 4844MachineSDNode * 4845SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4846 EVT VT1, EVT VT2, EVT VT3, 4847 const SDValue *Ops, unsigned NumOps) { 4848 SDVTList VTs = getVTList(VT1, VT2, VT3); 4849 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4850} 4851 4852MachineSDNode * 4853SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4854 EVT VT2, EVT VT3, EVT VT4, 4855 const SDValue *Ops, unsigned NumOps) { 4856 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4857 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4858} 4859 4860MachineSDNode * 4861SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4862 const std::vector<EVT> &ResultTys, 4863 const SDValue *Ops, unsigned NumOps) { 4864 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4865 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4866} 4867 4868MachineSDNode * 4869SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4870 const SDValue *Ops, unsigned NumOps) { 4871 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4872 MachineSDNode *N; 4873 void *IP; 4874 4875 if (DoCSE) { 4876 FoldingSetNodeID ID; 4877 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4878 IP = 0; 4879 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4880 return cast<MachineSDNode>(E); 4881 } 4882 4883 // Allocate a new MachineSDNode. 4884 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 4885 4886 // Initialize the operands list. 4887 if (NumOps > array_lengthof(N->LocalOperands)) 4888 // We're creating a final node that will live unmorphed for the 4889 // remainder of the current SelectionDAG iteration, so we can allocate 4890 // the operands directly out of a pool with no recycling metadata. 4891 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4892 Ops, NumOps); 4893 else 4894 N->InitOperands(N->LocalOperands, Ops, NumOps); 4895 N->OperandsNeedDelete = false; 4896 4897 if (DoCSE) 4898 CSEMap.InsertNode(N, IP); 4899 4900 AllNodes.push_back(N); 4901#ifndef NDEBUG 4902 VerifyNode(N); 4903#endif 4904 return N; 4905} 4906 4907/// getTargetExtractSubreg - A convenience function for creating 4908/// TargetOpcode::EXTRACT_SUBREG nodes. 4909SDValue 4910SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4911 SDValue Operand) { 4912 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4913 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 4914 VT, Operand, SRIdxVal); 4915 return SDValue(Subreg, 0); 4916} 4917 4918/// getTargetInsertSubreg - A convenience function for creating 4919/// TargetOpcode::INSERT_SUBREG nodes. 4920SDValue 4921SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4922 SDValue Operand, SDValue Subreg) { 4923 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4924 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 4925 VT, Operand, Subreg, SRIdxVal); 4926 return SDValue(Result, 0); 4927} 4928 4929/// getNodeIfExists - Get the specified node if it's already available, or 4930/// else return NULL. 4931SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4932 const SDValue *Ops, unsigned NumOps) { 4933 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4934 FoldingSetNodeID ID; 4935 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4936 void *IP = 0; 4937 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4938 return E; 4939 } 4940 return NULL; 4941} 4942 4943/// getDbgValue - Creates a SDDbgValue node. 4944/// 4945SDDbgValue * 4946SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 4947 DebugLoc DL, unsigned O) { 4948 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 4949} 4950 4951SDDbgValue * 4952SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 4953 DebugLoc DL, unsigned O) { 4954 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 4955} 4956 4957SDDbgValue * 4958SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 4959 DebugLoc DL, unsigned O) { 4960 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 4961} 4962 4963namespace { 4964 4965/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 4966/// pointed to by a use iterator is deleted, increment the use iterator 4967/// so that it doesn't dangle. 4968/// 4969/// This class also manages a "downlink" DAGUpdateListener, to forward 4970/// messages to ReplaceAllUsesWith's callers. 4971/// 4972class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 4973 SelectionDAG::DAGUpdateListener *DownLink; 4974 SDNode::use_iterator &UI; 4975 SDNode::use_iterator &UE; 4976 4977 virtual void NodeDeleted(SDNode *N, SDNode *E) { 4978 // Increment the iterator as needed. 4979 while (UI != UE && N == *UI) 4980 ++UI; 4981 4982 // Then forward the message. 4983 if (DownLink) DownLink->NodeDeleted(N, E); 4984 } 4985 4986 virtual void NodeUpdated(SDNode *N) { 4987 // Just forward the message. 4988 if (DownLink) DownLink->NodeUpdated(N); 4989 } 4990 4991public: 4992 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 4993 SDNode::use_iterator &ui, 4994 SDNode::use_iterator &ue) 4995 : DownLink(dl), UI(ui), UE(ue) {} 4996}; 4997 4998} 4999 5000/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5001/// This can cause recursive merging of nodes in the DAG. 5002/// 5003/// This version assumes From has a single result value. 5004/// 5005void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 5006 DAGUpdateListener *UpdateListener) { 5007 SDNode *From = FromN.getNode(); 5008 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5009 "Cannot replace with this method!"); 5010 assert(From != To.getNode() && "Cannot replace uses of with self"); 5011 5012 // Iterate over all the existing uses of From. New uses will be added 5013 // to the beginning of the use list, which we avoid visiting. 5014 // This specifically avoids visiting uses of From that arise while the 5015 // replacement is happening, because any such uses would be the result 5016 // of CSE: If an existing node looks like From after one of its operands 5017 // is replaced by To, we don't want to replace of all its users with To 5018 // too. See PR3018 for more info. 5019 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5020 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5021 while (UI != UE) { 5022 SDNode *User = *UI; 5023 5024 // This node is about to morph, remove its old self from the CSE maps. 5025 RemoveNodeFromCSEMaps(User); 5026 5027 // A user can appear in a use list multiple times, and when this 5028 // happens the uses are usually next to each other in the list. 5029 // To help reduce the number of CSE recomputations, process all 5030 // the uses of this user that we can find this way. 5031 do { 5032 SDUse &Use = UI.getUse(); 5033 ++UI; 5034 Use.set(To); 5035 } while (UI != UE && *UI == User); 5036 5037 // Now that we have modified User, add it back to the CSE maps. If it 5038 // already exists there, recursively merge the results together. 5039 AddModifiedNodeToCSEMaps(User, &Listener); 5040 } 5041} 5042 5043/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5044/// This can cause recursive merging of nodes in the DAG. 5045/// 5046/// This version assumes that for each value of From, there is a 5047/// corresponding value in To in the same position with the same type. 5048/// 5049void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5050 DAGUpdateListener *UpdateListener) { 5051#ifndef NDEBUG 5052 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5053 assert((!From->hasAnyUseOfValue(i) || 5054 From->getValueType(i) == To->getValueType(i)) && 5055 "Cannot use this version of ReplaceAllUsesWith!"); 5056#endif 5057 5058 // Handle the trivial case. 5059 if (From == To) 5060 return; 5061 5062 // Iterate over just the existing users of From. See the comments in 5063 // the ReplaceAllUsesWith above. 5064 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5065 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5066 while (UI != UE) { 5067 SDNode *User = *UI; 5068 5069 // This node is about to morph, remove its old self from the CSE maps. 5070 RemoveNodeFromCSEMaps(User); 5071 5072 // A user can appear in a use list multiple times, and when this 5073 // happens the uses are usually next to each other in the list. 5074 // To help reduce the number of CSE recomputations, process all 5075 // the uses of this user that we can find this way. 5076 do { 5077 SDUse &Use = UI.getUse(); 5078 ++UI; 5079 Use.setNode(To); 5080 } while (UI != UE && *UI == User); 5081 5082 // Now that we have modified User, add it back to the CSE maps. If it 5083 // already exists there, recursively merge the results together. 5084 AddModifiedNodeToCSEMaps(User, &Listener); 5085 } 5086} 5087 5088/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5089/// This can cause recursive merging of nodes in the DAG. 5090/// 5091/// This version can replace From with any result values. To must match the 5092/// number and types of values returned by From. 5093void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5094 const SDValue *To, 5095 DAGUpdateListener *UpdateListener) { 5096 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5097 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5098 5099 // Iterate over just the existing users of From. See the comments in 5100 // the ReplaceAllUsesWith above. 5101 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5102 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5103 while (UI != UE) { 5104 SDNode *User = *UI; 5105 5106 // This node is about to morph, remove its old self from the CSE maps. 5107 RemoveNodeFromCSEMaps(User); 5108 5109 // A user can appear in a use list multiple times, and when this 5110 // happens the uses are usually next to each other in the list. 5111 // To help reduce the number of CSE recomputations, process all 5112 // the uses of this user that we can find this way. 5113 do { 5114 SDUse &Use = UI.getUse(); 5115 const SDValue &ToOp = To[Use.getResNo()]; 5116 ++UI; 5117 Use.set(ToOp); 5118 } while (UI != UE && *UI == User); 5119 5120 // Now that we have modified User, add it back to the CSE maps. If it 5121 // already exists there, recursively merge the results together. 5122 AddModifiedNodeToCSEMaps(User, &Listener); 5123 } 5124} 5125 5126/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5127/// uses of other values produced by From.getNode() alone. The Deleted 5128/// vector is handled the same way as for ReplaceAllUsesWith. 5129void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5130 DAGUpdateListener *UpdateListener){ 5131 // Handle the really simple, really trivial case efficiently. 5132 if (From == To) return; 5133 5134 // Handle the simple, trivial, case efficiently. 5135 if (From.getNode()->getNumValues() == 1) { 5136 ReplaceAllUsesWith(From, To, UpdateListener); 5137 return; 5138 } 5139 5140 // Iterate over just the existing users of From. See the comments in 5141 // the ReplaceAllUsesWith above. 5142 SDNode::use_iterator UI = From.getNode()->use_begin(), 5143 UE = From.getNode()->use_end(); 5144 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5145 while (UI != UE) { 5146 SDNode *User = *UI; 5147 bool UserRemovedFromCSEMaps = false; 5148 5149 // A user can appear in a use list multiple times, and when this 5150 // happens the uses are usually next to each other in the list. 5151 // To help reduce the number of CSE recomputations, process all 5152 // the uses of this user that we can find this way. 5153 do { 5154 SDUse &Use = UI.getUse(); 5155 5156 // Skip uses of different values from the same node. 5157 if (Use.getResNo() != From.getResNo()) { 5158 ++UI; 5159 continue; 5160 } 5161 5162 // If this node hasn't been modified yet, it's still in the CSE maps, 5163 // so remove its old self from the CSE maps. 5164 if (!UserRemovedFromCSEMaps) { 5165 RemoveNodeFromCSEMaps(User); 5166 UserRemovedFromCSEMaps = true; 5167 } 5168 5169 ++UI; 5170 Use.set(To); 5171 } while (UI != UE && *UI == User); 5172 5173 // We are iterating over all uses of the From node, so if a use 5174 // doesn't use the specific value, no changes are made. 5175 if (!UserRemovedFromCSEMaps) 5176 continue; 5177 5178 // Now that we have modified User, add it back to the CSE maps. If it 5179 // already exists there, recursively merge the results together. 5180 AddModifiedNodeToCSEMaps(User, &Listener); 5181 } 5182} 5183 5184namespace { 5185 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5186 /// to record information about a use. 5187 struct UseMemo { 5188 SDNode *User; 5189 unsigned Index; 5190 SDUse *Use; 5191 }; 5192 5193 /// operator< - Sort Memos by User. 5194 bool operator<(const UseMemo &L, const UseMemo &R) { 5195 return (intptr_t)L.User < (intptr_t)R.User; 5196 } 5197} 5198 5199/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5200/// uses of other values produced by From.getNode() alone. The same value 5201/// may appear in both the From and To list. The Deleted vector is 5202/// handled the same way as for ReplaceAllUsesWith. 5203void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5204 const SDValue *To, 5205 unsigned Num, 5206 DAGUpdateListener *UpdateListener){ 5207 // Handle the simple, trivial case efficiently. 5208 if (Num == 1) 5209 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5210 5211 // Read up all the uses and make records of them. This helps 5212 // processing new uses that are introduced during the 5213 // replacement process. 5214 SmallVector<UseMemo, 4> Uses; 5215 for (unsigned i = 0; i != Num; ++i) { 5216 unsigned FromResNo = From[i].getResNo(); 5217 SDNode *FromNode = From[i].getNode(); 5218 for (SDNode::use_iterator UI = FromNode->use_begin(), 5219 E = FromNode->use_end(); UI != E; ++UI) { 5220 SDUse &Use = UI.getUse(); 5221 if (Use.getResNo() == FromResNo) { 5222 UseMemo Memo = { *UI, i, &Use }; 5223 Uses.push_back(Memo); 5224 } 5225 } 5226 } 5227 5228 // Sort the uses, so that all the uses from a given User are together. 5229 std::sort(Uses.begin(), Uses.end()); 5230 5231 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5232 UseIndex != UseIndexEnd; ) { 5233 // We know that this user uses some value of From. If it is the right 5234 // value, update it. 5235 SDNode *User = Uses[UseIndex].User; 5236 5237 // This node is about to morph, remove its old self from the CSE maps. 5238 RemoveNodeFromCSEMaps(User); 5239 5240 // The Uses array is sorted, so all the uses for a given User 5241 // are next to each other in the list. 5242 // To help reduce the number of CSE recomputations, process all 5243 // the uses of this user that we can find this way. 5244 do { 5245 unsigned i = Uses[UseIndex].Index; 5246 SDUse &Use = *Uses[UseIndex].Use; 5247 ++UseIndex; 5248 5249 Use.set(To[i]); 5250 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5251 5252 // Now that we have modified User, add it back to the CSE maps. If it 5253 // already exists there, recursively merge the results together. 5254 AddModifiedNodeToCSEMaps(User, UpdateListener); 5255 } 5256} 5257 5258/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5259/// based on their topological order. It returns the maximum id and a vector 5260/// of the SDNodes* in assigned order by reference. 5261unsigned SelectionDAG::AssignTopologicalOrder() { 5262 5263 unsigned DAGSize = 0; 5264 5265 // SortedPos tracks the progress of the algorithm. Nodes before it are 5266 // sorted, nodes after it are unsorted. When the algorithm completes 5267 // it is at the end of the list. 5268 allnodes_iterator SortedPos = allnodes_begin(); 5269 5270 // Visit all the nodes. Move nodes with no operands to the front of 5271 // the list immediately. Annotate nodes that do have operands with their 5272 // operand count. Before we do this, the Node Id fields of the nodes 5273 // may contain arbitrary values. After, the Node Id fields for nodes 5274 // before SortedPos will contain the topological sort index, and the 5275 // Node Id fields for nodes At SortedPos and after will contain the 5276 // count of outstanding operands. 5277 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5278 SDNode *N = I++; 5279 checkForCycles(N); 5280 unsigned Degree = N->getNumOperands(); 5281 if (Degree == 0) { 5282 // A node with no uses, add it to the result array immediately. 5283 N->setNodeId(DAGSize++); 5284 allnodes_iterator Q = N; 5285 if (Q != SortedPos) 5286 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5287 assert(SortedPos != AllNodes.end() && "Overran node list"); 5288 ++SortedPos; 5289 } else { 5290 // Temporarily use the Node Id as scratch space for the degree count. 5291 N->setNodeId(Degree); 5292 } 5293 } 5294 5295 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5296 // such that by the time the end is reached all nodes will be sorted. 5297 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5298 SDNode *N = I; 5299 checkForCycles(N); 5300 // N is in sorted position, so all its uses have one less operand 5301 // that needs to be sorted. 5302 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5303 UI != UE; ++UI) { 5304 SDNode *P = *UI; 5305 unsigned Degree = P->getNodeId(); 5306 assert(Degree != 0 && "Invalid node degree"); 5307 --Degree; 5308 if (Degree == 0) { 5309 // All of P's operands are sorted, so P may sorted now. 5310 P->setNodeId(DAGSize++); 5311 if (P != SortedPos) 5312 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5313 assert(SortedPos != AllNodes.end() && "Overran node list"); 5314 ++SortedPos; 5315 } else { 5316 // Update P's outstanding operand count. 5317 P->setNodeId(Degree); 5318 } 5319 } 5320 if (I == SortedPos) { 5321#ifndef NDEBUG 5322 SDNode *S = ++I; 5323 dbgs() << "Overran sorted position:\n"; 5324 S->dumprFull(); 5325#endif 5326 llvm_unreachable(0); 5327 } 5328 } 5329 5330 assert(SortedPos == AllNodes.end() && 5331 "Topological sort incomplete!"); 5332 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5333 "First node in topological sort is not the entry token!"); 5334 assert(AllNodes.front().getNodeId() == 0 && 5335 "First node in topological sort has non-zero id!"); 5336 assert(AllNodes.front().getNumOperands() == 0 && 5337 "First node in topological sort has operands!"); 5338 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5339 "Last node in topologic sort has unexpected id!"); 5340 assert(AllNodes.back().use_empty() && 5341 "Last node in topologic sort has users!"); 5342 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5343 return DAGSize; 5344} 5345 5346/// AssignOrdering - Assign an order to the SDNode. 5347void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5348 assert(SD && "Trying to assign an order to a null node!"); 5349 Ordering->add(SD, Order); 5350} 5351 5352/// GetOrdering - Get the order for the SDNode. 5353unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5354 assert(SD && "Trying to get the order of a null node!"); 5355 return Ordering->getOrder(SD); 5356} 5357 5358/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5359/// value is produced by SD. 5360void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5361 DbgInfo->add(DB, SD, isParameter); 5362 if (SD) 5363 SD->setHasDebugValue(true); 5364} 5365 5366//===----------------------------------------------------------------------===// 5367// SDNode Class 5368//===----------------------------------------------------------------------===// 5369 5370HandleSDNode::~HandleSDNode() { 5371 DropOperands(); 5372} 5373 5374GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 5375 EVT VT, int64_t o, unsigned char TF) 5376 : SDNode(Opc, DebugLoc(), getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5377 TheGlobal = GA; 5378} 5379 5380MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5381 MachineMemOperand *mmo) 5382 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5383 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5384 MMO->isNonTemporal()); 5385 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5386 assert(isNonTemporal() == MMO->isNonTemporal() && 5387 "Non-temporal encoding error!"); 5388 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5389} 5390 5391MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5392 const SDValue *Ops, unsigned NumOps, EVT memvt, 5393 MachineMemOperand *mmo) 5394 : SDNode(Opc, dl, VTs, Ops, NumOps), 5395 MemoryVT(memvt), MMO(mmo) { 5396 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5397 MMO->isNonTemporal()); 5398 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5399 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5400} 5401 5402/// Profile - Gather unique data for the node. 5403/// 5404void SDNode::Profile(FoldingSetNodeID &ID) const { 5405 AddNodeIDNode(ID, this); 5406} 5407 5408namespace { 5409 struct EVTArray { 5410 std::vector<EVT> VTs; 5411 5412 EVTArray() { 5413 VTs.reserve(MVT::LAST_VALUETYPE); 5414 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5415 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5416 } 5417 }; 5418} 5419 5420static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5421static ManagedStatic<EVTArray> SimpleVTArray; 5422static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5423 5424/// getValueTypeList - Return a pointer to the specified value type. 5425/// 5426const EVT *SDNode::getValueTypeList(EVT VT) { 5427 if (VT.isExtended()) { 5428 sys::SmartScopedLock<true> Lock(*VTMutex); 5429 return &(*EVTs->insert(VT).first); 5430 } else { 5431 assert(VT.getSimpleVT().SimpleTy < MVT::LAST_VALUETYPE && 5432 "Value type out of range!"); 5433 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5434 } 5435} 5436 5437/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5438/// indicated value. This method ignores uses of other values defined by this 5439/// operation. 5440bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5441 assert(Value < getNumValues() && "Bad value!"); 5442 5443 // TODO: Only iterate over uses of a given value of the node 5444 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5445 if (UI.getUse().getResNo() == Value) { 5446 if (NUses == 0) 5447 return false; 5448 --NUses; 5449 } 5450 } 5451 5452 // Found exactly the right number of uses? 5453 return NUses == 0; 5454} 5455 5456 5457/// hasAnyUseOfValue - Return true if there are any use of the indicated 5458/// value. This method ignores uses of other values defined by this operation. 5459bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5460 assert(Value < getNumValues() && "Bad value!"); 5461 5462 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5463 if (UI.getUse().getResNo() == Value) 5464 return true; 5465 5466 return false; 5467} 5468 5469 5470/// isOnlyUserOf - Return true if this node is the only use of N. 5471/// 5472bool SDNode::isOnlyUserOf(SDNode *N) const { 5473 bool Seen = false; 5474 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5475 SDNode *User = *I; 5476 if (User == this) 5477 Seen = true; 5478 else 5479 return false; 5480 } 5481 5482 return Seen; 5483} 5484 5485/// isOperand - Return true if this node is an operand of N. 5486/// 5487bool SDValue::isOperandOf(SDNode *N) const { 5488 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5489 if (*this == N->getOperand(i)) 5490 return true; 5491 return false; 5492} 5493 5494bool SDNode::isOperandOf(SDNode *N) const { 5495 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5496 if (this == N->OperandList[i].getNode()) 5497 return true; 5498 return false; 5499} 5500 5501/// reachesChainWithoutSideEffects - Return true if this operand (which must 5502/// be a chain) reaches the specified operand without crossing any 5503/// side-effecting instructions. In practice, this looks through token 5504/// factors and non-volatile loads. In order to remain efficient, this only 5505/// looks a couple of nodes in, it does not do an exhaustive search. 5506bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5507 unsigned Depth) const { 5508 if (*this == Dest) return true; 5509 5510 // Don't search too deeply, we just want to be able to see through 5511 // TokenFactor's etc. 5512 if (Depth == 0) return false; 5513 5514 // If this is a token factor, all inputs to the TF happen in parallel. If any 5515 // of the operands of the TF reach dest, then we can do the xform. 5516 if (getOpcode() == ISD::TokenFactor) { 5517 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5518 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5519 return true; 5520 return false; 5521 } 5522 5523 // Loads don't have side effects, look through them. 5524 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5525 if (!Ld->isVolatile()) 5526 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5527 } 5528 return false; 5529} 5530 5531/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5532/// is either an operand of N or it can be reached by traversing up the operands. 5533/// NOTE: this is an expensive method. Use it carefully. 5534bool SDNode::isPredecessorOf(SDNode *N) const { 5535 SmallPtrSet<SDNode *, 32> Visited; 5536 SmallVector<SDNode *, 16> Worklist; 5537 Worklist.push_back(N); 5538 5539 do { 5540 N = Worklist.pop_back_val(); 5541 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5542 SDNode *Op = N->getOperand(i).getNode(); 5543 if (Op == this) 5544 return true; 5545 if (Visited.insert(Op)) 5546 Worklist.push_back(Op); 5547 } 5548 } while (!Worklist.empty()); 5549 5550 return false; 5551} 5552 5553uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5554 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5555 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5556} 5557 5558std::string SDNode::getOperationName(const SelectionDAG *G) const { 5559 switch (getOpcode()) { 5560 default: 5561 if (getOpcode() < ISD::BUILTIN_OP_END) 5562 return "<<Unknown DAG Node>>"; 5563 if (isMachineOpcode()) { 5564 if (G) 5565 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5566 if (getMachineOpcode() < TII->getNumOpcodes()) 5567 return TII->get(getMachineOpcode()).getName(); 5568 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5569 } 5570 if (G) { 5571 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5572 const char *Name = TLI.getTargetNodeName(getOpcode()); 5573 if (Name) return Name; 5574 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5575 } 5576 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5577 5578#ifndef NDEBUG 5579 case ISD::DELETED_NODE: 5580 return "<<Deleted Node!>>"; 5581#endif 5582 case ISD::PREFETCH: return "Prefetch"; 5583 case ISD::MEMBARRIER: return "MemBarrier"; 5584 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5585 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5586 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5587 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5588 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5589 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5590 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5591 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5592 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5593 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5594 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5595 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5596 case ISD::PCMARKER: return "PCMarker"; 5597 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5598 case ISD::SRCVALUE: return "SrcValue"; 5599 case ISD::MDNODE_SDNODE: return "MDNode"; 5600 case ISD::EntryToken: return "EntryToken"; 5601 case ISD::TokenFactor: return "TokenFactor"; 5602 case ISD::AssertSext: return "AssertSext"; 5603 case ISD::AssertZext: return "AssertZext"; 5604 5605 case ISD::BasicBlock: return "BasicBlock"; 5606 case ISD::VALUETYPE: return "ValueType"; 5607 case ISD::Register: return "Register"; 5608 5609 case ISD::Constant: return "Constant"; 5610 case ISD::ConstantFP: return "ConstantFP"; 5611 case ISD::GlobalAddress: return "GlobalAddress"; 5612 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5613 case ISD::FrameIndex: return "FrameIndex"; 5614 case ISD::JumpTable: return "JumpTable"; 5615 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5616 case ISD::RETURNADDR: return "RETURNADDR"; 5617 case ISD::FRAMEADDR: return "FRAMEADDR"; 5618 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5619 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5620 case ISD::LSDAADDR: return "LSDAADDR"; 5621 case ISD::EHSELECTION: return "EHSELECTION"; 5622 case ISD::EH_RETURN: return "EH_RETURN"; 5623 case ISD::ConstantPool: return "ConstantPool"; 5624 case ISD::ExternalSymbol: return "ExternalSymbol"; 5625 case ISD::BlockAddress: return "BlockAddress"; 5626 case ISD::INTRINSIC_WO_CHAIN: 5627 case ISD::INTRINSIC_VOID: 5628 case ISD::INTRINSIC_W_CHAIN: { 5629 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5630 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5631 if (IID < Intrinsic::num_intrinsics) 5632 return Intrinsic::getName((Intrinsic::ID)IID); 5633 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5634 return TII->getName(IID); 5635 llvm_unreachable("Invalid intrinsic ID"); 5636 } 5637 5638 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5639 case ISD::TargetConstant: return "TargetConstant"; 5640 case ISD::TargetConstantFP:return "TargetConstantFP"; 5641 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5642 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5643 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5644 case ISD::TargetJumpTable: return "TargetJumpTable"; 5645 case ISD::TargetConstantPool: return "TargetConstantPool"; 5646 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5647 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5648 5649 case ISD::CopyToReg: return "CopyToReg"; 5650 case ISD::CopyFromReg: return "CopyFromReg"; 5651 case ISD::UNDEF: return "undef"; 5652 case ISD::MERGE_VALUES: return "merge_values"; 5653 case ISD::INLINEASM: return "inlineasm"; 5654 case ISD::EH_LABEL: return "eh_label"; 5655 case ISD::HANDLENODE: return "handlenode"; 5656 5657 // Unary operators 5658 case ISD::FABS: return "fabs"; 5659 case ISD::FNEG: return "fneg"; 5660 case ISD::FSQRT: return "fsqrt"; 5661 case ISD::FSIN: return "fsin"; 5662 case ISD::FCOS: return "fcos"; 5663 case ISD::FPOWI: return "fpowi"; 5664 case ISD::FPOW: return "fpow"; 5665 case ISD::FTRUNC: return "ftrunc"; 5666 case ISD::FFLOOR: return "ffloor"; 5667 case ISD::FCEIL: return "fceil"; 5668 case ISD::FRINT: return "frint"; 5669 case ISD::FNEARBYINT: return "fnearbyint"; 5670 5671 // Binary operators 5672 case ISD::ADD: return "add"; 5673 case ISD::SUB: return "sub"; 5674 case ISD::MUL: return "mul"; 5675 case ISD::MULHU: return "mulhu"; 5676 case ISD::MULHS: return "mulhs"; 5677 case ISD::SDIV: return "sdiv"; 5678 case ISD::UDIV: return "udiv"; 5679 case ISD::SREM: return "srem"; 5680 case ISD::UREM: return "urem"; 5681 case ISD::SMUL_LOHI: return "smul_lohi"; 5682 case ISD::UMUL_LOHI: return "umul_lohi"; 5683 case ISD::SDIVREM: return "sdivrem"; 5684 case ISD::UDIVREM: return "udivrem"; 5685 case ISD::AND: return "and"; 5686 case ISD::OR: return "or"; 5687 case ISD::XOR: return "xor"; 5688 case ISD::SHL: return "shl"; 5689 case ISD::SRA: return "sra"; 5690 case ISD::SRL: return "srl"; 5691 case ISD::ROTL: return "rotl"; 5692 case ISD::ROTR: return "rotr"; 5693 case ISD::FADD: return "fadd"; 5694 case ISD::FSUB: return "fsub"; 5695 case ISD::FMUL: return "fmul"; 5696 case ISD::FDIV: return "fdiv"; 5697 case ISD::FREM: return "frem"; 5698 case ISD::FCOPYSIGN: return "fcopysign"; 5699 case ISD::FGETSIGN: return "fgetsign"; 5700 5701 case ISD::SETCC: return "setcc"; 5702 case ISD::VSETCC: return "vsetcc"; 5703 case ISD::SELECT: return "select"; 5704 case ISD::SELECT_CC: return "select_cc"; 5705 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5706 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5707 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5708 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5709 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5710 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5711 case ISD::CARRY_FALSE: return "carry_false"; 5712 case ISD::ADDC: return "addc"; 5713 case ISD::ADDE: return "adde"; 5714 case ISD::SADDO: return "saddo"; 5715 case ISD::UADDO: return "uaddo"; 5716 case ISD::SSUBO: return "ssubo"; 5717 case ISD::USUBO: return "usubo"; 5718 case ISD::SMULO: return "smulo"; 5719 case ISD::UMULO: return "umulo"; 5720 case ISD::SUBC: return "subc"; 5721 case ISD::SUBE: return "sube"; 5722 case ISD::SHL_PARTS: return "shl_parts"; 5723 case ISD::SRA_PARTS: return "sra_parts"; 5724 case ISD::SRL_PARTS: return "srl_parts"; 5725 5726 // Conversion operators. 5727 case ISD::SIGN_EXTEND: return "sign_extend"; 5728 case ISD::ZERO_EXTEND: return "zero_extend"; 5729 case ISD::ANY_EXTEND: return "any_extend"; 5730 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5731 case ISD::TRUNCATE: return "truncate"; 5732 case ISD::FP_ROUND: return "fp_round"; 5733 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5734 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5735 case ISD::FP_EXTEND: return "fp_extend"; 5736 5737 case ISD::SINT_TO_FP: return "sint_to_fp"; 5738 case ISD::UINT_TO_FP: return "uint_to_fp"; 5739 case ISD::FP_TO_SINT: return "fp_to_sint"; 5740 case ISD::FP_TO_UINT: return "fp_to_uint"; 5741 case ISD::BIT_CONVERT: return "bit_convert"; 5742 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5743 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5744 5745 case ISD::CONVERT_RNDSAT: { 5746 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5747 default: llvm_unreachable("Unknown cvt code!"); 5748 case ISD::CVT_FF: return "cvt_ff"; 5749 case ISD::CVT_FS: return "cvt_fs"; 5750 case ISD::CVT_FU: return "cvt_fu"; 5751 case ISD::CVT_SF: return "cvt_sf"; 5752 case ISD::CVT_UF: return "cvt_uf"; 5753 case ISD::CVT_SS: return "cvt_ss"; 5754 case ISD::CVT_SU: return "cvt_su"; 5755 case ISD::CVT_US: return "cvt_us"; 5756 case ISD::CVT_UU: return "cvt_uu"; 5757 } 5758 } 5759 5760 // Control flow instructions 5761 case ISD::BR: return "br"; 5762 case ISD::BRIND: return "brind"; 5763 case ISD::BR_JT: return "br_jt"; 5764 case ISD::BRCOND: return "brcond"; 5765 case ISD::BR_CC: return "br_cc"; 5766 case ISD::CALLSEQ_START: return "callseq_start"; 5767 case ISD::CALLSEQ_END: return "callseq_end"; 5768 5769 // Other operators 5770 case ISD::LOAD: return "load"; 5771 case ISD::STORE: return "store"; 5772 case ISD::VAARG: return "vaarg"; 5773 case ISD::VACOPY: return "vacopy"; 5774 case ISD::VAEND: return "vaend"; 5775 case ISD::VASTART: return "vastart"; 5776 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5777 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5778 case ISD::BUILD_PAIR: return "build_pair"; 5779 case ISD::STACKSAVE: return "stacksave"; 5780 case ISD::STACKRESTORE: return "stackrestore"; 5781 case ISD::TRAP: return "trap"; 5782 5783 // Bit manipulation 5784 case ISD::BSWAP: return "bswap"; 5785 case ISD::CTPOP: return "ctpop"; 5786 case ISD::CTTZ: return "cttz"; 5787 case ISD::CTLZ: return "ctlz"; 5788 5789 // Trampolines 5790 case ISD::TRAMPOLINE: return "trampoline"; 5791 5792 case ISD::CONDCODE: 5793 switch (cast<CondCodeSDNode>(this)->get()) { 5794 default: llvm_unreachable("Unknown setcc condition!"); 5795 case ISD::SETOEQ: return "setoeq"; 5796 case ISD::SETOGT: return "setogt"; 5797 case ISD::SETOGE: return "setoge"; 5798 case ISD::SETOLT: return "setolt"; 5799 case ISD::SETOLE: return "setole"; 5800 case ISD::SETONE: return "setone"; 5801 5802 case ISD::SETO: return "seto"; 5803 case ISD::SETUO: return "setuo"; 5804 case ISD::SETUEQ: return "setue"; 5805 case ISD::SETUGT: return "setugt"; 5806 case ISD::SETUGE: return "setuge"; 5807 case ISD::SETULT: return "setult"; 5808 case ISD::SETULE: return "setule"; 5809 case ISD::SETUNE: return "setune"; 5810 5811 case ISD::SETEQ: return "seteq"; 5812 case ISD::SETGT: return "setgt"; 5813 case ISD::SETGE: return "setge"; 5814 case ISD::SETLT: return "setlt"; 5815 case ISD::SETLE: return "setle"; 5816 case ISD::SETNE: return "setne"; 5817 } 5818 } 5819} 5820 5821const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5822 switch (AM) { 5823 default: 5824 return ""; 5825 case ISD::PRE_INC: 5826 return "<pre-inc>"; 5827 case ISD::PRE_DEC: 5828 return "<pre-dec>"; 5829 case ISD::POST_INC: 5830 return "<post-inc>"; 5831 case ISD::POST_DEC: 5832 return "<post-dec>"; 5833 } 5834} 5835 5836std::string ISD::ArgFlagsTy::getArgFlagsString() { 5837 std::string S = "< "; 5838 5839 if (isZExt()) 5840 S += "zext "; 5841 if (isSExt()) 5842 S += "sext "; 5843 if (isInReg()) 5844 S += "inreg "; 5845 if (isSRet()) 5846 S += "sret "; 5847 if (isByVal()) 5848 S += "byval "; 5849 if (isNest()) 5850 S += "nest "; 5851 if (getByValAlign()) 5852 S += "byval-align:" + utostr(getByValAlign()) + " "; 5853 if (getOrigAlign()) 5854 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5855 if (getByValSize()) 5856 S += "byval-size:" + utostr(getByValSize()) + " "; 5857 return S + ">"; 5858} 5859 5860void SDNode::dump() const { dump(0); } 5861void SDNode::dump(const SelectionDAG *G) const { 5862 print(dbgs(), G); 5863} 5864 5865void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5866 OS << (void*)this << ": "; 5867 5868 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5869 if (i) OS << ","; 5870 if (getValueType(i) == MVT::Other) 5871 OS << "ch"; 5872 else 5873 OS << getValueType(i).getEVTString(); 5874 } 5875 OS << " = " << getOperationName(G); 5876} 5877 5878void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5879 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5880 if (!MN->memoperands_empty()) { 5881 OS << "<"; 5882 OS << "Mem:"; 5883 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5884 e = MN->memoperands_end(); i != e; ++i) { 5885 OS << **i; 5886 if (next(i) != e) 5887 OS << " "; 5888 } 5889 OS << ">"; 5890 } 5891 } else if (const ShuffleVectorSDNode *SVN = 5892 dyn_cast<ShuffleVectorSDNode>(this)) { 5893 OS << "<"; 5894 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5895 int Idx = SVN->getMaskElt(i); 5896 if (i) OS << ","; 5897 if (Idx < 0) 5898 OS << "u"; 5899 else 5900 OS << Idx; 5901 } 5902 OS << ">"; 5903 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5904 OS << '<' << CSDN->getAPIntValue() << '>'; 5905 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5906 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5907 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5908 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5909 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5910 else { 5911 OS << "<APFloat("; 5912 CSDN->getValueAPF().bitcastToAPInt().dump(); 5913 OS << ")>"; 5914 } 5915 } else if (const GlobalAddressSDNode *GADN = 5916 dyn_cast<GlobalAddressSDNode>(this)) { 5917 int64_t offset = GADN->getOffset(); 5918 OS << '<'; 5919 WriteAsOperand(OS, GADN->getGlobal()); 5920 OS << '>'; 5921 if (offset > 0) 5922 OS << " + " << offset; 5923 else 5924 OS << " " << offset; 5925 if (unsigned int TF = GADN->getTargetFlags()) 5926 OS << " [TF=" << TF << ']'; 5927 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5928 OS << "<" << FIDN->getIndex() << ">"; 5929 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5930 OS << "<" << JTDN->getIndex() << ">"; 5931 if (unsigned int TF = JTDN->getTargetFlags()) 5932 OS << " [TF=" << TF << ']'; 5933 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5934 int offset = CP->getOffset(); 5935 if (CP->isMachineConstantPoolEntry()) 5936 OS << "<" << *CP->getMachineCPVal() << ">"; 5937 else 5938 OS << "<" << *CP->getConstVal() << ">"; 5939 if (offset > 0) 5940 OS << " + " << offset; 5941 else 5942 OS << " " << offset; 5943 if (unsigned int TF = CP->getTargetFlags()) 5944 OS << " [TF=" << TF << ']'; 5945 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5946 OS << "<"; 5947 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5948 if (LBB) 5949 OS << LBB->getName() << " "; 5950 OS << (const void*)BBDN->getBasicBlock() << ">"; 5951 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5952 if (G && R->getReg() && 5953 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5954 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5955 } else { 5956 OS << " %reg" << R->getReg(); 5957 } 5958 } else if (const ExternalSymbolSDNode *ES = 5959 dyn_cast<ExternalSymbolSDNode>(this)) { 5960 OS << "'" << ES->getSymbol() << "'"; 5961 if (unsigned int TF = ES->getTargetFlags()) 5962 OS << " [TF=" << TF << ']'; 5963 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5964 if (M->getValue()) 5965 OS << "<" << M->getValue() << ">"; 5966 else 5967 OS << "<null>"; 5968 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 5969 if (MD->getMD()) 5970 OS << "<" << MD->getMD() << ">"; 5971 else 5972 OS << "<null>"; 5973 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5974 OS << ":" << N->getVT().getEVTString(); 5975 } 5976 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5977 OS << "<" << *LD->getMemOperand(); 5978 5979 bool doExt = true; 5980 switch (LD->getExtensionType()) { 5981 default: doExt = false; break; 5982 case ISD::EXTLOAD: OS << ", anyext"; break; 5983 case ISD::SEXTLOAD: OS << ", sext"; break; 5984 case ISD::ZEXTLOAD: OS << ", zext"; break; 5985 } 5986 if (doExt) 5987 OS << " from " << LD->getMemoryVT().getEVTString(); 5988 5989 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5990 if (*AM) 5991 OS << ", " << AM; 5992 5993 OS << ">"; 5994 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5995 OS << "<" << *ST->getMemOperand(); 5996 5997 if (ST->isTruncatingStore()) 5998 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 5999 6000 const char *AM = getIndexedModeName(ST->getAddressingMode()); 6001 if (*AM) 6002 OS << ", " << AM; 6003 6004 OS << ">"; 6005 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 6006 OS << "<" << *M->getMemOperand() << ">"; 6007 } else if (const BlockAddressSDNode *BA = 6008 dyn_cast<BlockAddressSDNode>(this)) { 6009 OS << "<"; 6010 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 6011 OS << ", "; 6012 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 6013 OS << ">"; 6014 if (unsigned int TF = BA->getTargetFlags()) 6015 OS << " [TF=" << TF << ']'; 6016 } 6017 6018 if (G) 6019 if (unsigned Order = G->GetOrdering(this)) 6020 OS << " [ORD=" << Order << ']'; 6021 6022 if (getNodeId() != -1) 6023 OS << " [ID=" << getNodeId() << ']'; 6024 6025 DebugLoc dl = getDebugLoc(); 6026 if (G && !dl.isUnknown()) { 6027 DIScope 6028 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext())); 6029 OS << " dbg:"; 6030 // Omit the directory, since it's usually long and uninteresting. 6031 if (Scope.Verify()) 6032 OS << Scope.getFilename(); 6033 else 6034 OS << "<unknown>"; 6035 OS << ':' << dl.getLine(); 6036 if (dl.getCol() != 0) 6037 OS << ':' << dl.getCol(); 6038 } 6039} 6040 6041void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6042 print_types(OS, G); 6043 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6044 if (i) OS << ", "; else OS << " "; 6045 OS << (void*)getOperand(i).getNode(); 6046 if (unsigned RN = getOperand(i).getResNo()) 6047 OS << ":" << RN; 6048 } 6049 print_details(OS, G); 6050} 6051 6052static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6053 const SelectionDAG *G, unsigned depth, 6054 unsigned indent) 6055{ 6056 if (depth == 0) 6057 return; 6058 6059 OS.indent(indent); 6060 6061 N->print(OS, G); 6062 6063 if (depth < 1) 6064 return; 6065 6066 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6067 OS << '\n'; 6068 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6069 } 6070} 6071 6072void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6073 unsigned depth) const { 6074 printrWithDepthHelper(OS, this, G, depth, 0); 6075} 6076 6077void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6078 // Don't print impossibly deep things. 6079 printrWithDepth(OS, G, 100); 6080} 6081 6082void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6083 printrWithDepth(dbgs(), G, depth); 6084} 6085 6086void SDNode::dumprFull(const SelectionDAG *G) const { 6087 // Don't print impossibly deep things. 6088 dumprWithDepth(G, 100); 6089} 6090 6091static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6092 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6093 if (N->getOperand(i).getNode()->hasOneUse()) 6094 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6095 else 6096 dbgs() << "\n" << std::string(indent+2, ' ') 6097 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6098 6099 6100 dbgs() << "\n"; 6101 dbgs().indent(indent); 6102 N->dump(G); 6103} 6104 6105SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6106 assert(N->getNumValues() == 1 && 6107 "Can't unroll a vector with multiple results!"); 6108 6109 EVT VT = N->getValueType(0); 6110 unsigned NE = VT.getVectorNumElements(); 6111 EVT EltVT = VT.getVectorElementType(); 6112 DebugLoc dl = N->getDebugLoc(); 6113 6114 SmallVector<SDValue, 8> Scalars; 6115 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6116 6117 // If ResNE is 0, fully unroll the vector op. 6118 if (ResNE == 0) 6119 ResNE = NE; 6120 else if (NE > ResNE) 6121 NE = ResNE; 6122 6123 unsigned i; 6124 for (i= 0; i != NE; ++i) { 6125 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6126 SDValue Operand = N->getOperand(j); 6127 EVT OperandVT = Operand.getValueType(); 6128 if (OperandVT.isVector()) { 6129 // A vector operand; extract a single element. 6130 EVT OperandEltVT = OperandVT.getVectorElementType(); 6131 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6132 OperandEltVT, 6133 Operand, 6134 getConstant(i, MVT::i32)); 6135 } else { 6136 // A scalar operand; just use it as is. 6137 Operands[j] = Operand; 6138 } 6139 } 6140 6141 switch (N->getOpcode()) { 6142 default: 6143 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6144 &Operands[0], Operands.size())); 6145 break; 6146 case ISD::SHL: 6147 case ISD::SRA: 6148 case ISD::SRL: 6149 case ISD::ROTL: 6150 case ISD::ROTR: 6151 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6152 getShiftAmountOperand(Operands[1]))); 6153 break; 6154 case ISD::SIGN_EXTEND_INREG: 6155 case ISD::FP_ROUND_INREG: { 6156 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6157 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6158 Operands[0], 6159 getValueType(ExtVT))); 6160 } 6161 } 6162 } 6163 6164 for (; i < ResNE; ++i) 6165 Scalars.push_back(getUNDEF(EltVT)); 6166 6167 return getNode(ISD::BUILD_VECTOR, dl, 6168 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6169 &Scalars[0], Scalars.size()); 6170} 6171 6172 6173/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6174/// location that is 'Dist' units away from the location that the 'Base' load 6175/// is loading from. 6176bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6177 unsigned Bytes, int Dist) const { 6178 if (LD->getChain() != Base->getChain()) 6179 return false; 6180 EVT VT = LD->getValueType(0); 6181 if (VT.getSizeInBits() / 8 != Bytes) 6182 return false; 6183 6184 SDValue Loc = LD->getOperand(1); 6185 SDValue BaseLoc = Base->getOperand(1); 6186 if (Loc.getOpcode() == ISD::FrameIndex) { 6187 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6188 return false; 6189 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6190 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6191 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6192 int FS = MFI->getObjectSize(FI); 6193 int BFS = MFI->getObjectSize(BFI); 6194 if (FS != BFS || FS != (int)Bytes) return false; 6195 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6196 } 6197 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6198 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6199 if (V && (V->getSExtValue() == Dist*Bytes)) 6200 return true; 6201 } 6202 6203 const GlobalValue *GV1 = NULL; 6204 const GlobalValue *GV2 = NULL; 6205 int64_t Offset1 = 0; 6206 int64_t Offset2 = 0; 6207 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6208 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6209 if (isGA1 && isGA2 && GV1 == GV2) 6210 return Offset1 == (Offset2 + Dist*Bytes); 6211 return false; 6212} 6213 6214 6215/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6216/// it cannot be inferred. 6217unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6218 // If this is a GlobalAddress + cst, return the alignment. 6219 const GlobalValue *GV; 6220 int64_t GVOffset = 0; 6221 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6222 // If GV has specified alignment, then use it. Otherwise, use the preferred 6223 // alignment. 6224 unsigned Align = GV->getAlignment(); 6225 if (!Align) { 6226 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6227 if (GVar->hasInitializer()) { 6228 const TargetData *TD = TLI.getTargetData(); 6229 Align = TD->getPreferredAlignment(GVar); 6230 } 6231 } 6232 } 6233 return MinAlign(Align, GVOffset); 6234 } 6235 6236 // If this is a direct reference to a stack slot, use information about the 6237 // stack slot's alignment. 6238 int FrameIdx = 1 << 31; 6239 int64_t FrameOffset = 0; 6240 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6241 FrameIdx = FI->getIndex(); 6242 } else if (Ptr.getOpcode() == ISD::ADD && 6243 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6244 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6245 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6246 FrameOffset = Ptr.getConstantOperandVal(1); 6247 } 6248 6249 if (FrameIdx != (1 << 31)) { 6250 // FIXME: Handle FI+CST. 6251 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6252 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6253 FrameOffset); 6254 if (MFI.isFixedObjectIndex(FrameIdx)) { 6255 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset; 6256 6257 // The alignment of the frame index can be determined from its offset from 6258 // the incoming frame position. If the frame object is at offset 32 and 6259 // the stack is guaranteed to be 16-byte aligned, then we know that the 6260 // object is 16-byte aligned. 6261 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment(); 6262 unsigned Align = MinAlign(ObjectOffset, StackAlign); 6263 6264 // Finally, the frame object itself may have a known alignment. Factor 6265 // the alignment + offset into a new alignment. For example, if we know 6266 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a 6267 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte 6268 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc. 6269 return std::max(Align, FIInfoAlign); 6270 } 6271 return FIInfoAlign; 6272 } 6273 6274 return 0; 6275} 6276 6277void SelectionDAG::dump() const { 6278 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6279 6280 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6281 I != E; ++I) { 6282 const SDNode *N = I; 6283 if (!N->hasOneUse() && N != getRoot().getNode()) 6284 DumpNodes(N, 2, this); 6285 } 6286 6287 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6288 6289 dbgs() << "\n\n"; 6290} 6291 6292void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6293 print_types(OS, G); 6294 print_details(OS, G); 6295} 6296 6297typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6298static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6299 const SelectionDAG *G, VisitedSDNodeSet &once) { 6300 if (!once.insert(N)) // If we've been here before, return now. 6301 return; 6302 6303 // Dump the current SDNode, but don't end the line yet. 6304 OS << std::string(indent, ' '); 6305 N->printr(OS, G); 6306 6307 // Having printed this SDNode, walk the children: 6308 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6309 const SDNode *child = N->getOperand(i).getNode(); 6310 6311 if (i) OS << ","; 6312 OS << " "; 6313 6314 if (child->getNumOperands() == 0) { 6315 // This child has no grandchildren; print it inline right here. 6316 child->printr(OS, G); 6317 once.insert(child); 6318 } else { // Just the address. FIXME: also print the child's opcode. 6319 OS << (void*)child; 6320 if (unsigned RN = N->getOperand(i).getResNo()) 6321 OS << ":" << RN; 6322 } 6323 } 6324 6325 OS << "\n"; 6326 6327 // Dump children that have grandchildren on their own line(s). 6328 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6329 const SDNode *child = N->getOperand(i).getNode(); 6330 DumpNodesr(OS, child, indent+2, G, once); 6331 } 6332} 6333 6334void SDNode::dumpr() const { 6335 VisitedSDNodeSet once; 6336 DumpNodesr(dbgs(), this, 0, 0, once); 6337} 6338 6339void SDNode::dumpr(const SelectionDAG *G) const { 6340 VisitedSDNodeSet once; 6341 DumpNodesr(dbgs(), this, 0, G, once); 6342} 6343 6344 6345// getAddressSpace - Return the address space this GlobalAddress belongs to. 6346unsigned GlobalAddressSDNode::getAddressSpace() const { 6347 return getGlobal()->getType()->getAddressSpace(); 6348} 6349 6350 6351const Type *ConstantPoolSDNode::getType() const { 6352 if (isMachineConstantPoolEntry()) 6353 return Val.MachineCPVal->getType(); 6354 return Val.ConstVal->getType(); 6355} 6356 6357bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6358 APInt &SplatUndef, 6359 unsigned &SplatBitSize, 6360 bool &HasAnyUndefs, 6361 unsigned MinSplatBits, 6362 bool isBigEndian) { 6363 EVT VT = getValueType(0); 6364 assert(VT.isVector() && "Expected a vector type"); 6365 unsigned sz = VT.getSizeInBits(); 6366 if (MinSplatBits > sz) 6367 return false; 6368 6369 SplatValue = APInt(sz, 0); 6370 SplatUndef = APInt(sz, 0); 6371 6372 // Get the bits. Bits with undefined values (when the corresponding element 6373 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6374 // in SplatValue. If any of the values are not constant, give up and return 6375 // false. 6376 unsigned int nOps = getNumOperands(); 6377 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6378 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6379 6380 for (unsigned j = 0; j < nOps; ++j) { 6381 unsigned i = isBigEndian ? nOps-1-j : j; 6382 SDValue OpVal = getOperand(i); 6383 unsigned BitPos = j * EltBitSize; 6384 6385 if (OpVal.getOpcode() == ISD::UNDEF) 6386 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6387 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6388 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 6389 zextOrTrunc(sz) << BitPos; 6390 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6391 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6392 else 6393 return false; 6394 } 6395 6396 // The build_vector is all constants or undefs. Find the smallest element 6397 // size that splats the vector. 6398 6399 HasAnyUndefs = (SplatUndef != 0); 6400 while (sz > 8) { 6401 6402 unsigned HalfSize = sz / 2; 6403 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 6404 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 6405 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 6406 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 6407 6408 // If the two halves do not match (ignoring undef bits), stop here. 6409 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6410 MinSplatBits > HalfSize) 6411 break; 6412 6413 SplatValue = HighValue | LowValue; 6414 SplatUndef = HighUndef & LowUndef; 6415 6416 sz = HalfSize; 6417 } 6418 6419 SplatBitSize = sz; 6420 return true; 6421} 6422 6423bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6424 // Find the first non-undef value in the shuffle mask. 6425 unsigned i, e; 6426 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6427 /* search */; 6428 6429 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6430 6431 // Make sure all remaining elements are either undef or the same as the first 6432 // non-undef value. 6433 for (int Idx = Mask[i]; i != e; ++i) 6434 if (Mask[i] >= 0 && Mask[i] != Idx) 6435 return false; 6436 return true; 6437} 6438 6439#ifdef XDEBUG 6440static void checkForCyclesHelper(const SDNode *N, 6441 SmallPtrSet<const SDNode*, 32> &Visited, 6442 SmallPtrSet<const SDNode*, 32> &Checked) { 6443 // If this node has already been checked, don't check it again. 6444 if (Checked.count(N)) 6445 return; 6446 6447 // If a node has already been visited on this depth-first walk, reject it as 6448 // a cycle. 6449 if (!Visited.insert(N)) { 6450 dbgs() << "Offending node:\n"; 6451 N->dumprFull(); 6452 errs() << "Detected cycle in SelectionDAG\n"; 6453 abort(); 6454 } 6455 6456 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6457 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6458 6459 Checked.insert(N); 6460 Visited.erase(N); 6461} 6462#endif 6463 6464void llvm::checkForCycles(const llvm::SDNode *N) { 6465#ifdef XDEBUG 6466 assert(N && "Checking nonexistant SDNode"); 6467 SmallPtrSet<const SDNode*, 32> visited; 6468 SmallPtrSet<const SDNode*, 32> checked; 6469 checkForCyclesHelper(N, visited, checked); 6470#endif 6471} 6472 6473void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6474 checkForCycles(DAG->getRoot().getNode()); 6475} 6476