SelectionDAG.cpp revision c53361294957b63a9c1e405256c6f0a81db1685c
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13#include "llvm/CodeGen/SelectionDAG.h" 14#include "llvm/Constants.h" 15#include "llvm/Analysis/ValueTracking.h" 16#include "llvm/GlobalAlias.h" 17#include "llvm/GlobalVariable.h" 18#include "llvm/Intrinsics.h" 19#include "llvm/DerivedTypes.h" 20#include "llvm/Assembly/Writer.h" 21#include "llvm/CallingConv.h" 22#include "llvm/CodeGen/MachineBasicBlock.h" 23#include "llvm/CodeGen/MachineConstantPool.h" 24#include "llvm/CodeGen/MachineFrameInfo.h" 25#include "llvm/CodeGen/MachineModuleInfo.h" 26#include "llvm/CodeGen/PseudoSourceValue.h" 27#include "llvm/Target/TargetRegisterInfo.h" 28#include "llvm/Target/TargetData.h" 29#include "llvm/Target/TargetLowering.h" 30#include "llvm/Target/TargetInstrInfo.h" 31#include "llvm/Target/TargetMachine.h" 32#include "llvm/Support/CommandLine.h" 33#include "llvm/Support/MathExtras.h" 34#include "llvm/Support/raw_ostream.h" 35#include "llvm/ADT/SetVector.h" 36#include "llvm/ADT/SmallPtrSet.h" 37#include "llvm/ADT/SmallSet.h" 38#include "llvm/ADT/SmallVector.h" 39#include "llvm/ADT/StringExtras.h" 40#include <algorithm> 41#include <cmath> 42using namespace llvm; 43 44/// makeVTList - Return an instance of the SDVTList struct initialized with the 45/// specified members. 46static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) { 47 SDVTList Res = {VTs, NumVTs}; 48 return Res; 49} 50 51static const fltSemantics *MVTToAPFloatSemantics(MVT VT) { 52 switch (VT.getSimpleVT()) { 53 default: assert(0 && "Unknown FP format"); 54 case MVT::f32: return &APFloat::IEEEsingle; 55 case MVT::f64: return &APFloat::IEEEdouble; 56 case MVT::f80: return &APFloat::x87DoubleExtended; 57 case MVT::f128: return &APFloat::IEEEquad; 58 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 59 } 60} 61 62SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 63 64//===----------------------------------------------------------------------===// 65// ConstantFPSDNode Class 66//===----------------------------------------------------------------------===// 67 68/// isExactlyValue - We don't rely on operator== working on double values, as 69/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 70/// As such, this method can be used to do an exact bit-for-bit comparison of 71/// two floating point values. 72bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 73 return getValueAPF().bitwiseIsEqual(V); 74} 75 76bool ConstantFPSDNode::isValueValidForType(MVT VT, 77 const APFloat& Val) { 78 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 79 80 // PPC long double cannot be converted to any other type. 81 if (VT == MVT::ppcf128 || 82 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 83 return false; 84 85 // convert modifies in place, so make a copy. 86 APFloat Val2 = APFloat(Val); 87 bool losesInfo; 88 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 89 &losesInfo); 90 return !losesInfo; 91} 92 93//===----------------------------------------------------------------------===// 94// ISD Namespace 95//===----------------------------------------------------------------------===// 96 97/// isBuildVectorAllOnes - Return true if the specified node is a 98/// BUILD_VECTOR where all of the elements are ~0 or undef. 99bool ISD::isBuildVectorAllOnes(const SDNode *N) { 100 // Look through a bit convert. 101 if (N->getOpcode() == ISD::BIT_CONVERT) 102 N = N->getOperand(0).getNode(); 103 104 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 105 106 unsigned i = 0, e = N->getNumOperands(); 107 108 // Skip over all of the undef values. 109 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 110 ++i; 111 112 // Do not accept an all-undef vector. 113 if (i == e) return false; 114 115 // Do not accept build_vectors that aren't all constants or which have non-~0 116 // elements. 117 SDValue NotZero = N->getOperand(i); 118 if (isa<ConstantSDNode>(NotZero)) { 119 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 120 return false; 121 } else if (isa<ConstantFPSDNode>(NotZero)) { 122 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 123 bitcastToAPInt().isAllOnesValue()) 124 return false; 125 } else 126 return false; 127 128 // Okay, we have at least one ~0 value, check to see if the rest match or are 129 // undefs. 130 for (++i; i != e; ++i) 131 if (N->getOperand(i) != NotZero && 132 N->getOperand(i).getOpcode() != ISD::UNDEF) 133 return false; 134 return true; 135} 136 137 138/// isBuildVectorAllZeros - Return true if the specified node is a 139/// BUILD_VECTOR where all of the elements are 0 or undef. 140bool ISD::isBuildVectorAllZeros(const SDNode *N) { 141 // Look through a bit convert. 142 if (N->getOpcode() == ISD::BIT_CONVERT) 143 N = N->getOperand(0).getNode(); 144 145 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 146 147 unsigned i = 0, e = N->getNumOperands(); 148 149 // Skip over all of the undef values. 150 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 151 ++i; 152 153 // Do not accept an all-undef vector. 154 if (i == e) return false; 155 156 // Do not accept build_vectors that aren't all constants or which have non-~0 157 // elements. 158 SDValue Zero = N->getOperand(i); 159 if (isa<ConstantSDNode>(Zero)) { 160 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 161 return false; 162 } else if (isa<ConstantFPSDNode>(Zero)) { 163 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 164 return false; 165 } else 166 return false; 167 168 // Okay, we have at least one ~0 value, check to see if the rest match or are 169 // undefs. 170 for (++i; i != e; ++i) 171 if (N->getOperand(i) != Zero && 172 N->getOperand(i).getOpcode() != ISD::UNDEF) 173 return false; 174 return true; 175} 176 177/// isScalarToVector - Return true if the specified node is a 178/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 179/// element is not an undef. 180bool ISD::isScalarToVector(const SDNode *N) { 181 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 182 return true; 183 184 if (N->getOpcode() != ISD::BUILD_VECTOR) 185 return false; 186 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 187 return false; 188 unsigned NumElems = N->getNumOperands(); 189 for (unsigned i = 1; i < NumElems; ++i) { 190 SDValue V = N->getOperand(i); 191 if (V.getOpcode() != ISD::UNDEF) 192 return false; 193 } 194 return true; 195} 196 197 198/// isDebugLabel - Return true if the specified node represents a debug 199/// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node). 200bool ISD::isDebugLabel(const SDNode *N) { 201 SDValue Zero; 202 if (N->getOpcode() == ISD::DBG_LABEL) 203 return true; 204 if (N->isMachineOpcode() && 205 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL) 206 return true; 207 return false; 208} 209 210/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 211/// when given the operation for (X op Y). 212ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 213 // To perform this operation, we just need to swap the L and G bits of the 214 // operation. 215 unsigned OldL = (Operation >> 2) & 1; 216 unsigned OldG = (Operation >> 1) & 1; 217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 218 (OldL << 1) | // New G bit 219 (OldG << 2)); // New L bit. 220} 221 222/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 223/// 'op' is a valid SetCC operation. 224ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 225 unsigned Operation = Op; 226 if (isInteger) 227 Operation ^= 7; // Flip L, G, E bits, but not U. 228 else 229 Operation ^= 15; // Flip all of the condition bits. 230 231 if (Operation > ISD::SETTRUE2) 232 Operation &= ~8; // Don't let N and U bits get set. 233 234 return ISD::CondCode(Operation); 235} 236 237 238/// isSignedOp - For an integer comparison, return 1 if the comparison is a 239/// signed operation and 2 if the result is an unsigned comparison. Return zero 240/// if the operation does not depend on the sign of the input (setne and seteq). 241static int isSignedOp(ISD::CondCode Opcode) { 242 switch (Opcode) { 243 default: assert(0 && "Illegal integer setcc operation!"); 244 case ISD::SETEQ: 245 case ISD::SETNE: return 0; 246 case ISD::SETLT: 247 case ISD::SETLE: 248 case ISD::SETGT: 249 case ISD::SETGE: return 1; 250 case ISD::SETULT: 251 case ISD::SETULE: 252 case ISD::SETUGT: 253 case ISD::SETUGE: return 2; 254 } 255} 256 257/// getSetCCOrOperation - Return the result of a logical OR between different 258/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 259/// returns SETCC_INVALID if it is not possible to represent the resultant 260/// comparison. 261ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 262 bool isInteger) { 263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 264 // Cannot fold a signed integer setcc with an unsigned integer setcc. 265 return ISD::SETCC_INVALID; 266 267 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 268 269 // If the N and U bits get set then the resultant comparison DOES suddenly 270 // care about orderedness, and is true when ordered. 271 if (Op > ISD::SETTRUE2) 272 Op &= ~16; // Clear the U bit if the N bit is set. 273 274 // Canonicalize illegal integer setcc's. 275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 276 Op = ISD::SETNE; 277 278 return ISD::CondCode(Op); 279} 280 281/// getSetCCAndOperation - Return the result of a logical AND between different 282/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 283/// function returns zero if it is not possible to represent the resultant 284/// comparison. 285ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 286 bool isInteger) { 287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 288 // Cannot fold a signed setcc with an unsigned setcc. 289 return ISD::SETCC_INVALID; 290 291 // Combine all of the condition bits. 292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 293 294 // Canonicalize illegal integer setcc's. 295 if (isInteger) { 296 switch (Result) { 297 default: break; 298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 299 case ISD::SETOEQ: // SETEQ & SETU[LG]E 300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 303 } 304 } 305 306 return Result; 307} 308 309const TargetMachine &SelectionDAG::getTarget() const { 310 return MF->getTarget(); 311} 312 313//===----------------------------------------------------------------------===// 314// SDNode Profile Support 315//===----------------------------------------------------------------------===// 316 317/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 318/// 319static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 320 ID.AddInteger(OpC); 321} 322 323/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 324/// solely with their pointer. 325static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 326 ID.AddPointer(VTList.VTs); 327} 328 329/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 330/// 331static void AddNodeIDOperands(FoldingSetNodeID &ID, 332 const SDValue *Ops, unsigned NumOps) { 333 for (; NumOps; --NumOps, ++Ops) { 334 ID.AddPointer(Ops->getNode()); 335 ID.AddInteger(Ops->getResNo()); 336 } 337} 338 339/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 340/// 341static void AddNodeIDOperands(FoldingSetNodeID &ID, 342 const SDUse *Ops, unsigned NumOps) { 343 for (; NumOps; --NumOps, ++Ops) { 344 ID.AddPointer(Ops->getVal()); 345 ID.AddInteger(Ops->getSDValue().getResNo()); 346 } 347} 348 349static void AddNodeIDNode(FoldingSetNodeID &ID, 350 unsigned short OpC, SDVTList VTList, 351 const SDValue *OpList, unsigned N) { 352 AddNodeIDOpcode(ID, OpC); 353 AddNodeIDValueTypes(ID, VTList); 354 AddNodeIDOperands(ID, OpList, N); 355} 356 357/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 358/// the NodeID data. 359static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 360 switch (N->getOpcode()) { 361 default: break; // Normal nodes don't need extra info. 362 case ISD::ARG_FLAGS: 363 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits()); 364 break; 365 case ISD::TargetConstant: 366 case ISD::Constant: 367 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 368 break; 369 case ISD::TargetConstantFP: 370 case ISD::ConstantFP: { 371 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 372 break; 373 } 374 case ISD::TargetGlobalAddress: 375 case ISD::GlobalAddress: 376 case ISD::TargetGlobalTLSAddress: 377 case ISD::GlobalTLSAddress: { 378 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 379 ID.AddPointer(GA->getGlobal()); 380 ID.AddInteger(GA->getOffset()); 381 break; 382 } 383 case ISD::BasicBlock: 384 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 385 break; 386 case ISD::Register: 387 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 388 break; 389 case ISD::DBG_STOPPOINT: { 390 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N); 391 ID.AddInteger(DSP->getLine()); 392 ID.AddInteger(DSP->getColumn()); 393 ID.AddPointer(DSP->getCompileUnit()); 394 break; 395 } 396 case ISD::SRCVALUE: 397 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 398 break; 399 case ISD::MEMOPERAND: { 400 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO; 401 MO.Profile(ID); 402 break; 403 } 404 case ISD::FrameIndex: 405 case ISD::TargetFrameIndex: 406 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 407 break; 408 case ISD::JumpTable: 409 case ISD::TargetJumpTable: 410 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 411 break; 412 case ISD::ConstantPool: 413 case ISD::TargetConstantPool: { 414 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 415 ID.AddInteger(CP->getAlignment()); 416 ID.AddInteger(CP->getOffset()); 417 if (CP->isMachineConstantPoolEntry()) 418 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 419 else 420 ID.AddPointer(CP->getConstVal()); 421 break; 422 } 423 case ISD::CALL: { 424 const CallSDNode *Call = cast<CallSDNode>(N); 425 ID.AddInteger(Call->getCallingConv()); 426 ID.AddInteger(Call->isVarArg()); 427 break; 428 } 429 case ISD::LOAD: { 430 const LoadSDNode *LD = cast<LoadSDNode>(N); 431 ID.AddInteger(LD->getAddressingMode()); 432 ID.AddInteger(LD->getExtensionType()); 433 ID.AddInteger(LD->getMemoryVT().getRawBits()); 434 ID.AddInteger(LD->getRawFlags()); 435 break; 436 } 437 case ISD::STORE: { 438 const StoreSDNode *ST = cast<StoreSDNode>(N); 439 ID.AddInteger(ST->getAddressingMode()); 440 ID.AddInteger(ST->isTruncatingStore()); 441 ID.AddInteger(ST->getMemoryVT().getRawBits()); 442 ID.AddInteger(ST->getRawFlags()); 443 break; 444 } 445 case ISD::ATOMIC_CMP_SWAP: 446 case ISD::ATOMIC_SWAP: 447 case ISD::ATOMIC_LOAD_ADD: 448 case ISD::ATOMIC_LOAD_SUB: 449 case ISD::ATOMIC_LOAD_AND: 450 case ISD::ATOMIC_LOAD_OR: 451 case ISD::ATOMIC_LOAD_XOR: 452 case ISD::ATOMIC_LOAD_NAND: 453 case ISD::ATOMIC_LOAD_MIN: 454 case ISD::ATOMIC_LOAD_MAX: 455 case ISD::ATOMIC_LOAD_UMIN: 456 case ISD::ATOMIC_LOAD_UMAX: { 457 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 458 ID.AddInteger(AT->getRawFlags()); 459 break; 460 } 461 } // end switch (N->getOpcode()) 462} 463 464/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 465/// data. 466static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 467 AddNodeIDOpcode(ID, N->getOpcode()); 468 // Add the return value info. 469 AddNodeIDValueTypes(ID, N->getVTList()); 470 // Add the operand info. 471 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 472 473 // Handle SDNode leafs with special info. 474 AddNodeIDCustom(ID, N); 475} 476 477/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 478/// the CSE map that carries both alignment and volatility information. 479/// 480static inline unsigned 481encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) { 482 return isVolatile | ((Log2_32(Alignment) + 1) << 1); 483} 484 485//===----------------------------------------------------------------------===// 486// SelectionDAG Class 487//===----------------------------------------------------------------------===// 488 489/// doNotCSE - Return true if CSE should not be performed for this node. 490static bool doNotCSE(SDNode *N) { 491 if (N->getValueType(0) == MVT::Flag) 492 return true; // Never CSE anything that produces a flag. 493 494 switch (N->getOpcode()) { 495 default: break; 496 case ISD::HANDLENODE: 497 case ISD::DBG_LABEL: 498 case ISD::DBG_STOPPOINT: 499 case ISD::EH_LABEL: 500 case ISD::DECLARE: 501 return true; // Never CSE these nodes. 502 } 503 504 // Check that remaining values produced are not flags. 505 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 506 if (N->getValueType(i) == MVT::Flag) 507 return true; // Never CSE anything that produces a flag. 508 509 return false; 510} 511 512/// RemoveDeadNodes - This method deletes all unreachable nodes in the 513/// SelectionDAG. 514void SelectionDAG::RemoveDeadNodes() { 515 // Create a dummy node (which is not added to allnodes), that adds a reference 516 // to the root node, preventing it from being deleted. 517 HandleSDNode Dummy(getRoot()); 518 519 SmallVector<SDNode*, 128> DeadNodes; 520 521 // Add all obviously-dead nodes to the DeadNodes worklist. 522 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 523 if (I->use_empty()) 524 DeadNodes.push_back(I); 525 526 RemoveDeadNodes(DeadNodes); 527 528 // If the root changed (e.g. it was a dead load, update the root). 529 setRoot(Dummy.getValue()); 530} 531 532/// RemoveDeadNodes - This method deletes the unreachable nodes in the 533/// given list, and any nodes that become unreachable as a result. 534void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 535 DAGUpdateListener *UpdateListener) { 536 537 // Process the worklist, deleting the nodes and adding their uses to the 538 // worklist. 539 while (!DeadNodes.empty()) { 540 SDNode *N = DeadNodes.back(); 541 DeadNodes.pop_back(); 542 543 if (UpdateListener) 544 UpdateListener->NodeDeleted(N, 0); 545 546 // Take the node out of the appropriate CSE map. 547 RemoveNodeFromCSEMaps(N); 548 549 // Next, brutally remove the operand list. This is safe to do, as there are 550 // no cycles in the graph. 551 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 552 SDNode *Operand = I->getVal(); 553 Operand->removeUser(std::distance(N->op_begin(), I), N); 554 555 // Now that we removed this operand, see if there are no uses of it left. 556 if (Operand->use_empty()) 557 DeadNodes.push_back(Operand); 558 } 559 560 DeallocateNode(N); 561 } 562} 563 564void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 565 SmallVector<SDNode*, 16> DeadNodes(1, N); 566 RemoveDeadNodes(DeadNodes, UpdateListener); 567} 568 569void SelectionDAG::DeleteNode(SDNode *N) { 570 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 571 572 // First take this out of the appropriate CSE map. 573 RemoveNodeFromCSEMaps(N); 574 575 // Finally, remove uses due to operands of this node, remove from the 576 // AllNodes list, and delete the node. 577 DeleteNodeNotInCSEMaps(N); 578} 579 580void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 581 assert(N != AllNodes.begin()); 582 583 // Drop all of the operands and decrement used node's use counts. 584 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 585 I->getVal()->removeUser(std::distance(N->op_begin(), I), N); 586 587 DeallocateNode(N); 588} 589 590void SelectionDAG::DeallocateNode(SDNode *N) { 591 if (N->OperandsNeedDelete) 592 delete[] N->OperandList; 593 594 // Set the opcode to DELETED_NODE to help catch bugs when node 595 // memory is reallocated. 596 N->NodeType = ISD::DELETED_NODE; 597 598 NodeAllocator.Deallocate(AllNodes.remove(N)); 599} 600 601/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 602/// correspond to it. This is useful when we're about to delete or repurpose 603/// the node. We don't want future request for structurally identical nodes 604/// to return N anymore. 605bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 606 bool Erased = false; 607 switch (N->getOpcode()) { 608 case ISD::EntryToken: 609 assert(0 && "EntryToken should not be in CSEMaps!"); 610 return false; 611 case ISD::HANDLENODE: return false; // noop. 612 case ISD::CONDCODE: 613 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 614 "Cond code doesn't exist!"); 615 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 616 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 617 break; 618 case ISD::ExternalSymbol: 619 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 620 break; 621 case ISD::TargetExternalSymbol: 622 Erased = 623 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 624 break; 625 case ISD::VALUETYPE: { 626 MVT VT = cast<VTSDNode>(N)->getVT(); 627 if (VT.isExtended()) { 628 Erased = ExtendedValueTypeNodes.erase(VT); 629 } else { 630 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0; 631 ValueTypeNodes[VT.getSimpleVT()] = 0; 632 } 633 break; 634 } 635 default: 636 // Remove it from the CSE Map. 637 Erased = CSEMap.RemoveNode(N); 638 break; 639 } 640#ifndef NDEBUG 641 // Verify that the node was actually in one of the CSE maps, unless it has a 642 // flag result (which cannot be CSE'd) or is one of the special cases that are 643 // not subject to CSE. 644 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 645 !N->isMachineOpcode() && !doNotCSE(N)) { 646 N->dump(this); 647 cerr << "\n"; 648 assert(0 && "Node is not in map!"); 649 } 650#endif 651 return Erased; 652} 653 654/// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It 655/// has been taken out and modified in some way. If the specified node already 656/// exists in the CSE maps, do not modify the maps, but return the existing node 657/// instead. If it doesn't exist, add it and return null. 658/// 659SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) { 660 assert(N->getNumOperands() && "This is a leaf node!"); 661 662 if (doNotCSE(N)) 663 return 0; 664 665 SDNode *New = CSEMap.GetOrInsertNode(N); 666 if (New != N) return New; // Node already existed. 667 return 0; 668} 669 670/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 671/// were replaced with those specified. If this node is never memoized, 672/// return null, otherwise return a pointer to the slot it would take. If a 673/// node already exists with these operands, the slot will be non-null. 674SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 675 void *&InsertPos) { 676 if (doNotCSE(N)) 677 return 0; 678 679 SDValue Ops[] = { Op }; 680 FoldingSetNodeID ID; 681 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 682 AddNodeIDCustom(ID, N); 683 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 684} 685 686/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 687/// were replaced with those specified. If this node is never memoized, 688/// return null, otherwise return a pointer to the slot it would take. If a 689/// node already exists with these operands, the slot will be non-null. 690SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 691 SDValue Op1, SDValue Op2, 692 void *&InsertPos) { 693 if (doNotCSE(N)) 694 return 0; 695 696 SDValue Ops[] = { Op1, Op2 }; 697 FoldingSetNodeID ID; 698 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 699 AddNodeIDCustom(ID, N); 700 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 701} 702 703 704/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 705/// were replaced with those specified. If this node is never memoized, 706/// return null, otherwise return a pointer to the slot it would take. If a 707/// node already exists with these operands, the slot will be non-null. 708SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 709 const SDValue *Ops,unsigned NumOps, 710 void *&InsertPos) { 711 if (doNotCSE(N)) 712 return 0; 713 714 FoldingSetNodeID ID; 715 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 716 AddNodeIDCustom(ID, N); 717 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 718} 719 720/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 721void SelectionDAG::VerifyNode(SDNode *N) { 722 switch (N->getOpcode()) { 723 default: 724 break; 725 case ISD::BUILD_PAIR: { 726 MVT VT = N->getValueType(0); 727 assert(N->getNumValues() == 1 && "Too many results!"); 728 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 729 "Wrong return type!"); 730 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 731 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 732 "Mismatched operand types!"); 733 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 734 "Wrong operand type!"); 735 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 736 "Wrong return type size"); 737 break; 738 } 739 case ISD::BUILD_VECTOR: { 740 assert(N->getNumValues() == 1 && "Too many results!"); 741 assert(N->getValueType(0).isVector() && "Wrong return type!"); 742 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 743 "Wrong number of operands!"); 744 // FIXME: Change vector_shuffle to a variadic node with mask elements being 745 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an 746 // operand, and it is not always possible to legalize it. Turning off the 747 // following checks at least makes it possible to legalize most of the time. 748// MVT EltVT = N->getValueType(0).getVectorElementType(); 749// for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 750// assert(I->getSDValue().getValueType() == EltVT && 751// "Wrong operand type!"); 752 break; 753 } 754 } 755} 756 757/// getMVTAlignment - Compute the default alignment value for the 758/// given type. 759/// 760unsigned SelectionDAG::getMVTAlignment(MVT VT) const { 761 const Type *Ty = VT == MVT::iPTR ? 762 PointerType::get(Type::Int8Ty, 0) : 763 VT.getTypeForMVT(); 764 765 return TLI.getTargetData()->getABITypeAlignment(Ty); 766} 767 768SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 769 : TLI(tli), FLI(fli), 770 EntryNode(ISD::EntryToken, getVTList(MVT::Other)), 771 Root(getEntryNode()) { 772 AllNodes.push_back(&EntryNode); 773} 774 775void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi, 776 DwarfWriter *dw) { 777 MF = &mf; 778 MMI = mmi; 779 DW = dw; 780} 781 782SelectionDAG::~SelectionDAG() { 783 allnodes_clear(); 784} 785 786void SelectionDAG::allnodes_clear() { 787 assert(&*AllNodes.begin() == &EntryNode); 788 AllNodes.remove(AllNodes.begin()); 789 while (!AllNodes.empty()) 790 DeallocateNode(AllNodes.begin()); 791} 792 793void SelectionDAG::clear() { 794 allnodes_clear(); 795 OperandAllocator.Reset(); 796 CSEMap.clear(); 797 798 ExtendedValueTypeNodes.clear(); 799 ExternalSymbols.clear(); 800 TargetExternalSymbols.clear(); 801 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 802 static_cast<CondCodeSDNode*>(0)); 803 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 804 static_cast<SDNode*>(0)); 805 806 EntryNode.Uses = 0; 807 AllNodes.push_back(&EntryNode); 808 Root = getEntryNode(); 809} 810 811SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) { 812 if (Op.getValueType() == VT) return Op; 813 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 814 VT.getSizeInBits()); 815 return getNode(ISD::AND, Op.getValueType(), Op, 816 getConstant(Imm, Op.getValueType())); 817} 818 819SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) { 820 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 821 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 822} 823 824SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) { 825 return getConstant(*ConstantInt::get(Val), VT, isT); 826} 827 828SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) { 829 assert(VT.isInteger() && "Cannot create FP integer constant!"); 830 831 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 832 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 833 "APInt size does not match type size!"); 834 835 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 836 FoldingSetNodeID ID; 837 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 838 ID.AddPointer(&Val); 839 void *IP = 0; 840 SDNode *N = NULL; 841 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 842 if (!VT.isVector()) 843 return SDValue(N, 0); 844 if (!N) { 845 N = NodeAllocator.Allocate<ConstantSDNode>(); 846 new (N) ConstantSDNode(isT, &Val, EltVT); 847 CSEMap.InsertNode(N, IP); 848 AllNodes.push_back(N); 849 } 850 851 SDValue Result(N, 0); 852 if (VT.isVector()) { 853 SmallVector<SDValue, 8> Ops; 854 Ops.assign(VT.getVectorNumElements(), Result); 855 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 856 } 857 return Result; 858} 859 860SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 861 return getConstant(Val, TLI.getPointerTy(), isTarget); 862} 863 864 865SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) { 866 return getConstantFP(*ConstantFP::get(V), VT, isTarget); 867} 868 869SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){ 870 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 871 872 MVT EltVT = 873 VT.isVector() ? VT.getVectorElementType() : VT; 874 875 // Do the map lookup using the actual bit pattern for the floating point 876 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 877 // we don't have issues with SNANs. 878 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 879 FoldingSetNodeID ID; 880 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 881 ID.AddPointer(&V); 882 void *IP = 0; 883 SDNode *N = NULL; 884 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 885 if (!VT.isVector()) 886 return SDValue(N, 0); 887 if (!N) { 888 N = NodeAllocator.Allocate<ConstantFPSDNode>(); 889 new (N) ConstantFPSDNode(isTarget, &V, EltVT); 890 CSEMap.InsertNode(N, IP); 891 AllNodes.push_back(N); 892 } 893 894 SDValue Result(N, 0); 895 if (VT.isVector()) { 896 SmallVector<SDValue, 8> Ops; 897 Ops.assign(VT.getVectorNumElements(), Result); 898 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 899 } 900 return Result; 901} 902 903SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) { 904 MVT EltVT = 905 VT.isVector() ? VT.getVectorElementType() : VT; 906 if (EltVT==MVT::f32) 907 return getConstantFP(APFloat((float)Val), VT, isTarget); 908 else 909 return getConstantFP(APFloat(Val), VT, isTarget); 910} 911 912SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 913 MVT VT, int64_t Offset, 914 bool isTargetGA) { 915 unsigned Opc; 916 917 // Truncate (with sign-extension) the offset value to the pointer size. 918 unsigned BitWidth = TLI.getPointerTy().getSizeInBits(); 919 if (BitWidth < 64) 920 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 921 922 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 923 if (!GVar) { 924 // If GV is an alias then use the aliasee for determining thread-localness. 925 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 926 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 927 } 928 929 if (GVar && GVar->isThreadLocal()) 930 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 931 else 932 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 933 934 FoldingSetNodeID ID; 935 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 936 ID.AddPointer(GV); 937 ID.AddInteger(Offset); 938 void *IP = 0; 939 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 940 return SDValue(E, 0); 941 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>(); 942 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset); 943 CSEMap.InsertNode(N, IP); 944 AllNodes.push_back(N); 945 return SDValue(N, 0); 946} 947 948SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) { 949 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 950 FoldingSetNodeID ID; 951 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 952 ID.AddInteger(FI); 953 void *IP = 0; 954 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 955 return SDValue(E, 0); 956 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>(); 957 new (N) FrameIndexSDNode(FI, VT, isTarget); 958 CSEMap.InsertNode(N, IP); 959 AllNodes.push_back(N); 960 return SDValue(N, 0); 961} 962 963SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){ 964 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 965 FoldingSetNodeID ID; 966 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 967 ID.AddInteger(JTI); 968 void *IP = 0; 969 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 970 return SDValue(E, 0); 971 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>(); 972 new (N) JumpTableSDNode(JTI, VT, isTarget); 973 CSEMap.InsertNode(N, IP); 974 AllNodes.push_back(N); 975 return SDValue(N, 0); 976} 977 978SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT, 979 unsigned Alignment, int Offset, 980 bool isTarget) { 981 if (Alignment == 0) 982 Alignment = 983 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType()); 984 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 985 FoldingSetNodeID ID; 986 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 987 ID.AddInteger(Alignment); 988 ID.AddInteger(Offset); 989 ID.AddPointer(C); 990 void *IP = 0; 991 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 992 return SDValue(E, 0); 993 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 994 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 995 CSEMap.InsertNode(N, IP); 996 AllNodes.push_back(N); 997 return SDValue(N, 0); 998} 999 1000 1001SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT, 1002 unsigned Alignment, int Offset, 1003 bool isTarget) { 1004 if (Alignment == 0) 1005 Alignment = 1006 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType()); 1007 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1008 FoldingSetNodeID ID; 1009 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1010 ID.AddInteger(Alignment); 1011 ID.AddInteger(Offset); 1012 C->AddSelectionDAGCSEId(ID); 1013 void *IP = 0; 1014 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1015 return SDValue(E, 0); 1016 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1017 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 1018 CSEMap.InsertNode(N, IP); 1019 AllNodes.push_back(N); 1020 return SDValue(N, 0); 1021} 1022 1023 1024SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1025 FoldingSetNodeID ID; 1026 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1027 ID.AddPointer(MBB); 1028 void *IP = 0; 1029 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1030 return SDValue(E, 0); 1031 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1032 new (N) BasicBlockSDNode(MBB); 1033 CSEMap.InsertNode(N, IP); 1034 AllNodes.push_back(N); 1035 return SDValue(N, 0); 1036} 1037 1038SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) { 1039 FoldingSetNodeID ID; 1040 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0); 1041 ID.AddInteger(Flags.getRawBits()); 1042 void *IP = 0; 1043 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1044 return SDValue(E, 0); 1045 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>(); 1046 new (N) ARG_FLAGSSDNode(Flags); 1047 CSEMap.InsertNode(N, IP); 1048 AllNodes.push_back(N); 1049 return SDValue(N, 0); 1050} 1051 1052SDValue SelectionDAG::getValueType(MVT VT) { 1053 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size()) 1054 ValueTypeNodes.resize(VT.getSimpleVT()+1); 1055 1056 SDNode *&N = VT.isExtended() ? 1057 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()]; 1058 1059 if (N) return SDValue(N, 0); 1060 N = NodeAllocator.Allocate<VTSDNode>(); 1061 new (N) VTSDNode(VT); 1062 AllNodes.push_back(N); 1063 return SDValue(N, 0); 1064} 1065 1066SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) { 1067 SDNode *&N = ExternalSymbols[Sym]; 1068 if (N) return SDValue(N, 0); 1069 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1070 new (N) ExternalSymbolSDNode(false, Sym, VT); 1071 AllNodes.push_back(N); 1072 return SDValue(N, 0); 1073} 1074 1075SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) { 1076 SDNode *&N = TargetExternalSymbols[Sym]; 1077 if (N) return SDValue(N, 0); 1078 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1079 new (N) ExternalSymbolSDNode(true, Sym, VT); 1080 AllNodes.push_back(N); 1081 return SDValue(N, 0); 1082} 1083 1084SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1085 if ((unsigned)Cond >= CondCodeNodes.size()) 1086 CondCodeNodes.resize(Cond+1); 1087 1088 if (CondCodeNodes[Cond] == 0) { 1089 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>(); 1090 new (N) CondCodeSDNode(Cond); 1091 CondCodeNodes[Cond] = N; 1092 AllNodes.push_back(N); 1093 } 1094 return SDValue(CondCodeNodes[Cond], 0); 1095} 1096 1097SDValue SelectionDAG::getConvertRndSat(MVT VT, SDValue Val, SDValue DTy, 1098 SDValue STy, SDValue Rnd, SDValue Sat, 1099 ISD::CvtCode Code) { 1100 // If the src and dest types are the same, no conversion is necessary. 1101 if (DTy == STy) 1102 return Val; 1103 1104 FoldingSetNodeID ID; 1105 void* IP = 0; 1106 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1107 return SDValue(E, 0); 1108 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>(); 1109 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1110 new (N) CvtRndSatSDNode(VT, Ops, 5, Code); 1111 CSEMap.InsertNode(N, IP); 1112 AllNodes.push_back(N); 1113 return SDValue(N, 0); 1114} 1115 1116SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) { 1117 FoldingSetNodeID ID; 1118 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1119 ID.AddInteger(RegNo); 1120 void *IP = 0; 1121 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1122 return SDValue(E, 0); 1123 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>(); 1124 new (N) RegisterSDNode(RegNo, VT); 1125 CSEMap.InsertNode(N, IP); 1126 AllNodes.push_back(N); 1127 return SDValue(N, 0); 1128} 1129 1130SDValue SelectionDAG::getDbgStopPoint(SDValue Root, 1131 unsigned Line, unsigned Col, 1132 Value *CU) { 1133 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>(); 1134 new (N) DbgStopPointSDNode(Root, Line, Col, CU); 1135 AllNodes.push_back(N); 1136 return SDValue(N, 0); 1137} 1138 1139SDValue SelectionDAG::getLabel(unsigned Opcode, 1140 SDValue Root, 1141 unsigned LabelID) { 1142 FoldingSetNodeID ID; 1143 SDValue Ops[] = { Root }; 1144 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1145 ID.AddInteger(LabelID); 1146 void *IP = 0; 1147 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1148 return SDValue(E, 0); 1149 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1150 new (N) LabelSDNode(Opcode, Root, LabelID); 1151 CSEMap.InsertNode(N, IP); 1152 AllNodes.push_back(N); 1153 return SDValue(N, 0); 1154} 1155 1156SDValue SelectionDAG::getSrcValue(const Value *V) { 1157 assert((!V || isa<PointerType>(V->getType())) && 1158 "SrcValue is not a pointer?"); 1159 1160 FoldingSetNodeID ID; 1161 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1162 ID.AddPointer(V); 1163 1164 void *IP = 0; 1165 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1166 return SDValue(E, 0); 1167 1168 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>(); 1169 new (N) SrcValueSDNode(V); 1170 CSEMap.InsertNode(N, IP); 1171 AllNodes.push_back(N); 1172 return SDValue(N, 0); 1173} 1174 1175SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) { 1176#ifndef NDEBUG 1177 const Value *v = MO.getValue(); 1178 assert((!v || isa<PointerType>(v->getType())) && 1179 "SrcValue is not a pointer?"); 1180#endif 1181 1182 FoldingSetNodeID ID; 1183 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0); 1184 MO.Profile(ID); 1185 1186 void *IP = 0; 1187 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1188 return SDValue(E, 0); 1189 1190 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>(); 1191 new (N) MemOperandSDNode(MO); 1192 CSEMap.InsertNode(N, IP); 1193 AllNodes.push_back(N); 1194 return SDValue(N, 0); 1195} 1196 1197/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1198/// specified value type. 1199SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) { 1200 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1201 unsigned ByteSize = VT.getStoreSizeInBits()/8; 1202 const Type *Ty = VT.getTypeForMVT(); 1203 unsigned StackAlign = 1204 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1205 1206 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign); 1207 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1208} 1209 1210/// CreateStackTemporary - Create a stack temporary suitable for holding 1211/// either of the specified value types. 1212SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) { 1213 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1214 VT2.getStoreSizeInBits())/8; 1215 const Type *Ty1 = VT1.getTypeForMVT(); 1216 const Type *Ty2 = VT2.getTypeForMVT(); 1217 const TargetData *TD = TLI.getTargetData(); 1218 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1219 TD->getPrefTypeAlignment(Ty2)); 1220 1221 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1222 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align); 1223 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1224} 1225 1226SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1, 1227 SDValue N2, ISD::CondCode Cond) { 1228 // These setcc operations always fold. 1229 switch (Cond) { 1230 default: break; 1231 case ISD::SETFALSE: 1232 case ISD::SETFALSE2: return getConstant(0, VT); 1233 case ISD::SETTRUE: 1234 case ISD::SETTRUE2: return getConstant(1, VT); 1235 1236 case ISD::SETOEQ: 1237 case ISD::SETOGT: 1238 case ISD::SETOGE: 1239 case ISD::SETOLT: 1240 case ISD::SETOLE: 1241 case ISD::SETONE: 1242 case ISD::SETO: 1243 case ISD::SETUO: 1244 case ISD::SETUEQ: 1245 case ISD::SETUNE: 1246 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1247 break; 1248 } 1249 1250 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1251 const APInt &C2 = N2C->getAPIntValue(); 1252 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1253 const APInt &C1 = N1C->getAPIntValue(); 1254 1255 switch (Cond) { 1256 default: assert(0 && "Unknown integer setcc!"); 1257 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1258 case ISD::SETNE: return getConstant(C1 != C2, VT); 1259 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1260 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1261 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1262 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1263 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1264 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1265 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1266 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1267 } 1268 } 1269 } 1270 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1271 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1272 // No compile time operations on this type yet. 1273 if (N1C->getValueType(0) == MVT::ppcf128) 1274 return SDValue(); 1275 1276 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1277 switch (Cond) { 1278 default: break; 1279 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1280 return getNode(ISD::UNDEF, VT); 1281 // fall through 1282 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1283 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1284 return getNode(ISD::UNDEF, VT); 1285 // fall through 1286 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1287 R==APFloat::cmpLessThan, VT); 1288 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1289 return getNode(ISD::UNDEF, VT); 1290 // fall through 1291 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1292 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1293 return getNode(ISD::UNDEF, VT); 1294 // fall through 1295 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1296 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1297 return getNode(ISD::UNDEF, VT); 1298 // fall through 1299 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1300 R==APFloat::cmpEqual, VT); 1301 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1302 return getNode(ISD::UNDEF, VT); 1303 // fall through 1304 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1305 R==APFloat::cmpEqual, VT); 1306 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1307 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1308 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1309 R==APFloat::cmpEqual, VT); 1310 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1311 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1312 R==APFloat::cmpLessThan, VT); 1313 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1314 R==APFloat::cmpUnordered, VT); 1315 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1316 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1317 } 1318 } else { 1319 // Ensure that the constant occurs on the RHS. 1320 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1321 } 1322 } 1323 1324 // Could not fold it. 1325 return SDValue(); 1326} 1327 1328/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1329/// use this predicate to simplify operations downstream. 1330bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1331 unsigned BitWidth = Op.getValueSizeInBits(); 1332 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1333} 1334 1335/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1336/// this predicate to simplify operations downstream. Mask is known to be zero 1337/// for bits that V cannot have. 1338bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1339 unsigned Depth) const { 1340 APInt KnownZero, KnownOne; 1341 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1342 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1343 return (KnownZero & Mask) == Mask; 1344} 1345 1346/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1347/// known to be either zero or one and return them in the KnownZero/KnownOne 1348/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1349/// processing. 1350void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1351 APInt &KnownZero, APInt &KnownOne, 1352 unsigned Depth) const { 1353 unsigned BitWidth = Mask.getBitWidth(); 1354 assert(BitWidth == Op.getValueType().getSizeInBits() && 1355 "Mask size mismatches value type size!"); 1356 1357 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1358 if (Depth == 6 || Mask == 0) 1359 return; // Limit search depth. 1360 1361 APInt KnownZero2, KnownOne2; 1362 1363 switch (Op.getOpcode()) { 1364 case ISD::Constant: 1365 // We know all of the bits for a constant! 1366 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1367 KnownZero = ~KnownOne & Mask; 1368 return; 1369 case ISD::AND: 1370 // If either the LHS or the RHS are Zero, the result is zero. 1371 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1372 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1373 KnownZero2, KnownOne2, Depth+1); 1374 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1375 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1376 1377 // Output known-1 bits are only known if set in both the LHS & RHS. 1378 KnownOne &= KnownOne2; 1379 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1380 KnownZero |= KnownZero2; 1381 return; 1382 case ISD::OR: 1383 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1384 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1385 KnownZero2, KnownOne2, Depth+1); 1386 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1387 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1388 1389 // Output known-0 bits are only known if clear in both the LHS & RHS. 1390 KnownZero &= KnownZero2; 1391 // Output known-1 are known to be set if set in either the LHS | RHS. 1392 KnownOne |= KnownOne2; 1393 return; 1394 case ISD::XOR: { 1395 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1396 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1397 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1398 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1399 1400 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1401 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1402 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1403 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1404 KnownZero = KnownZeroOut; 1405 return; 1406 } 1407 case ISD::MUL: { 1408 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1409 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1410 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1411 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1412 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1413 1414 // If low bits are zero in either operand, output low known-0 bits. 1415 // Also compute a conserative estimate for high known-0 bits. 1416 // More trickiness is possible, but this is sufficient for the 1417 // interesting case of alignment computation. 1418 KnownOne.clear(); 1419 unsigned TrailZ = KnownZero.countTrailingOnes() + 1420 KnownZero2.countTrailingOnes(); 1421 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1422 KnownZero2.countLeadingOnes(), 1423 BitWidth) - BitWidth; 1424 1425 TrailZ = std::min(TrailZ, BitWidth); 1426 LeadZ = std::min(LeadZ, BitWidth); 1427 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1428 APInt::getHighBitsSet(BitWidth, LeadZ); 1429 KnownZero &= Mask; 1430 return; 1431 } 1432 case ISD::UDIV: { 1433 // For the purposes of computing leading zeros we can conservatively 1434 // treat a udiv as a logical right shift by the power of 2 known to 1435 // be less than the denominator. 1436 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1437 ComputeMaskedBits(Op.getOperand(0), 1438 AllOnes, KnownZero2, KnownOne2, Depth+1); 1439 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1440 1441 KnownOne2.clear(); 1442 KnownZero2.clear(); 1443 ComputeMaskedBits(Op.getOperand(1), 1444 AllOnes, KnownZero2, KnownOne2, Depth+1); 1445 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1446 if (RHSUnknownLeadingOnes != BitWidth) 1447 LeadZ = std::min(BitWidth, 1448 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1449 1450 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1451 return; 1452 } 1453 case ISD::SELECT: 1454 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1455 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1456 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1457 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1458 1459 // Only known if known in both the LHS and RHS. 1460 KnownOne &= KnownOne2; 1461 KnownZero &= KnownZero2; 1462 return; 1463 case ISD::SELECT_CC: 1464 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1465 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1466 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1467 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1468 1469 // Only known if known in both the LHS and RHS. 1470 KnownOne &= KnownOne2; 1471 KnownZero &= KnownZero2; 1472 return; 1473 case ISD::SADDO: 1474 case ISD::UADDO: 1475 case ISD::SSUBO: 1476 case ISD::USUBO: 1477 case ISD::SMULO: 1478 case ISD::UMULO: 1479 if (Op.getResNo() != 1) 1480 return; 1481 // The boolean result conforms to getBooleanContents. Fall through. 1482 case ISD::SETCC: 1483 // If we know the result of a setcc has the top bits zero, use this info. 1484 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1485 BitWidth > 1) 1486 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1487 return; 1488 case ISD::SHL: 1489 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1490 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1491 unsigned ShAmt = SA->getZExtValue(); 1492 1493 // If the shift count is an invalid immediate, don't do anything. 1494 if (ShAmt >= BitWidth) 1495 return; 1496 1497 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1498 KnownZero, KnownOne, Depth+1); 1499 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1500 KnownZero <<= ShAmt; 1501 KnownOne <<= ShAmt; 1502 // low bits known zero. 1503 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1504 } 1505 return; 1506 case ISD::SRL: 1507 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1508 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1509 unsigned ShAmt = SA->getZExtValue(); 1510 1511 // If the shift count is an invalid immediate, don't do anything. 1512 if (ShAmt >= BitWidth) 1513 return; 1514 1515 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1516 KnownZero, KnownOne, Depth+1); 1517 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1518 KnownZero = KnownZero.lshr(ShAmt); 1519 KnownOne = KnownOne.lshr(ShAmt); 1520 1521 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1522 KnownZero |= HighBits; // High bits known zero. 1523 } 1524 return; 1525 case ISD::SRA: 1526 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1527 unsigned ShAmt = SA->getZExtValue(); 1528 1529 // If the shift count is an invalid immediate, don't do anything. 1530 if (ShAmt >= BitWidth) 1531 return; 1532 1533 APInt InDemandedMask = (Mask << ShAmt); 1534 // If any of the demanded bits are produced by the sign extension, we also 1535 // demand the input sign bit. 1536 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1537 if (HighBits.getBoolValue()) 1538 InDemandedMask |= APInt::getSignBit(BitWidth); 1539 1540 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1541 Depth+1); 1542 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1543 KnownZero = KnownZero.lshr(ShAmt); 1544 KnownOne = KnownOne.lshr(ShAmt); 1545 1546 // Handle the sign bits. 1547 APInt SignBit = APInt::getSignBit(BitWidth); 1548 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1549 1550 if (KnownZero.intersects(SignBit)) { 1551 KnownZero |= HighBits; // New bits are known zero. 1552 } else if (KnownOne.intersects(SignBit)) { 1553 KnownOne |= HighBits; // New bits are known one. 1554 } 1555 } 1556 return; 1557 case ISD::SIGN_EXTEND_INREG: { 1558 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1559 unsigned EBits = EVT.getSizeInBits(); 1560 1561 // Sign extension. Compute the demanded bits in the result that are not 1562 // present in the input. 1563 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1564 1565 APInt InSignBit = APInt::getSignBit(EBits); 1566 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1567 1568 // If the sign extended bits are demanded, we know that the sign 1569 // bit is demanded. 1570 InSignBit.zext(BitWidth); 1571 if (NewBits.getBoolValue()) 1572 InputDemandedBits |= InSignBit; 1573 1574 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1575 KnownZero, KnownOne, Depth+1); 1576 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1577 1578 // If the sign bit of the input is known set or clear, then we know the 1579 // top bits of the result. 1580 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1581 KnownZero |= NewBits; 1582 KnownOne &= ~NewBits; 1583 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1584 KnownOne |= NewBits; 1585 KnownZero &= ~NewBits; 1586 } else { // Input sign bit unknown 1587 KnownZero &= ~NewBits; 1588 KnownOne &= ~NewBits; 1589 } 1590 return; 1591 } 1592 case ISD::CTTZ: 1593 case ISD::CTLZ: 1594 case ISD::CTPOP: { 1595 unsigned LowBits = Log2_32(BitWidth)+1; 1596 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1597 KnownOne.clear(); 1598 return; 1599 } 1600 case ISD::LOAD: { 1601 if (ISD::isZEXTLoad(Op.getNode())) { 1602 LoadSDNode *LD = cast<LoadSDNode>(Op); 1603 MVT VT = LD->getMemoryVT(); 1604 unsigned MemBits = VT.getSizeInBits(); 1605 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1606 } 1607 return; 1608 } 1609 case ISD::ZERO_EXTEND: { 1610 MVT InVT = Op.getOperand(0).getValueType(); 1611 unsigned InBits = InVT.getSizeInBits(); 1612 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1613 APInt InMask = Mask; 1614 InMask.trunc(InBits); 1615 KnownZero.trunc(InBits); 1616 KnownOne.trunc(InBits); 1617 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1618 KnownZero.zext(BitWidth); 1619 KnownOne.zext(BitWidth); 1620 KnownZero |= NewBits; 1621 return; 1622 } 1623 case ISD::SIGN_EXTEND: { 1624 MVT InVT = Op.getOperand(0).getValueType(); 1625 unsigned InBits = InVT.getSizeInBits(); 1626 APInt InSignBit = APInt::getSignBit(InBits); 1627 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1628 APInt InMask = Mask; 1629 InMask.trunc(InBits); 1630 1631 // If any of the sign extended bits are demanded, we know that the sign 1632 // bit is demanded. Temporarily set this bit in the mask for our callee. 1633 if (NewBits.getBoolValue()) 1634 InMask |= InSignBit; 1635 1636 KnownZero.trunc(InBits); 1637 KnownOne.trunc(InBits); 1638 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1639 1640 // Note if the sign bit is known to be zero or one. 1641 bool SignBitKnownZero = KnownZero.isNegative(); 1642 bool SignBitKnownOne = KnownOne.isNegative(); 1643 assert(!(SignBitKnownZero && SignBitKnownOne) && 1644 "Sign bit can't be known to be both zero and one!"); 1645 1646 // If the sign bit wasn't actually demanded by our caller, we don't 1647 // want it set in the KnownZero and KnownOne result values. Reset the 1648 // mask and reapply it to the result values. 1649 InMask = Mask; 1650 InMask.trunc(InBits); 1651 KnownZero &= InMask; 1652 KnownOne &= InMask; 1653 1654 KnownZero.zext(BitWidth); 1655 KnownOne.zext(BitWidth); 1656 1657 // If the sign bit is known zero or one, the top bits match. 1658 if (SignBitKnownZero) 1659 KnownZero |= NewBits; 1660 else if (SignBitKnownOne) 1661 KnownOne |= NewBits; 1662 return; 1663 } 1664 case ISD::ANY_EXTEND: { 1665 MVT InVT = Op.getOperand(0).getValueType(); 1666 unsigned InBits = InVT.getSizeInBits(); 1667 APInt InMask = Mask; 1668 InMask.trunc(InBits); 1669 KnownZero.trunc(InBits); 1670 KnownOne.trunc(InBits); 1671 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1672 KnownZero.zext(BitWidth); 1673 KnownOne.zext(BitWidth); 1674 return; 1675 } 1676 case ISD::TRUNCATE: { 1677 MVT InVT = Op.getOperand(0).getValueType(); 1678 unsigned InBits = InVT.getSizeInBits(); 1679 APInt InMask = Mask; 1680 InMask.zext(InBits); 1681 KnownZero.zext(InBits); 1682 KnownOne.zext(InBits); 1683 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1684 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1685 KnownZero.trunc(BitWidth); 1686 KnownOne.trunc(BitWidth); 1687 break; 1688 } 1689 case ISD::AssertZext: { 1690 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1691 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1692 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1693 KnownOne, Depth+1); 1694 KnownZero |= (~InMask) & Mask; 1695 return; 1696 } 1697 case ISD::FGETSIGN: 1698 // All bits are zero except the low bit. 1699 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1700 return; 1701 1702 case ISD::SUB: { 1703 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1704 // We know that the top bits of C-X are clear if X contains less bits 1705 // than C (i.e. no wrap-around can happen). For example, 20-X is 1706 // positive if we can prove that X is >= 0 and < 16. 1707 if (CLHS->getAPIntValue().isNonNegative()) { 1708 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1709 // NLZ can't be BitWidth with no sign bit 1710 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1711 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1712 Depth+1); 1713 1714 // If all of the MaskV bits are known to be zero, then we know the 1715 // output top bits are zero, because we now know that the output is 1716 // from [0-C]. 1717 if ((KnownZero2 & MaskV) == MaskV) { 1718 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1719 // Top bits known zero. 1720 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1721 } 1722 } 1723 } 1724 } 1725 // fall through 1726 case ISD::ADD: { 1727 // Output known-0 bits are known if clear or set in both the low clear bits 1728 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1729 // low 3 bits clear. 1730 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1731 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1732 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1733 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1734 1735 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1736 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1737 KnownZeroOut = std::min(KnownZeroOut, 1738 KnownZero2.countTrailingOnes()); 1739 1740 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1741 return; 1742 } 1743 case ISD::SREM: 1744 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1745 const APInt &RA = Rem->getAPIntValue(); 1746 if (RA.isPowerOf2() || (-RA).isPowerOf2()) { 1747 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA; 1748 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1749 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1750 1751 // If the sign bit of the first operand is zero, the sign bit of 1752 // the result is zero. If the first operand has no one bits below 1753 // the second operand's single 1 bit, its sign will be zero. 1754 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1755 KnownZero2 |= ~LowBits; 1756 1757 KnownZero |= KnownZero2 & Mask; 1758 1759 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1760 } 1761 } 1762 return; 1763 case ISD::UREM: { 1764 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1765 const APInt &RA = Rem->getAPIntValue(); 1766 if (RA.isPowerOf2()) { 1767 APInt LowBits = (RA - 1); 1768 APInt Mask2 = LowBits & Mask; 1769 KnownZero |= ~LowBits & Mask; 1770 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1771 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1772 break; 1773 } 1774 } 1775 1776 // Since the result is less than or equal to either operand, any leading 1777 // zero bits in either operand must also exist in the result. 1778 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1779 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1780 Depth+1); 1781 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1782 Depth+1); 1783 1784 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1785 KnownZero2.countLeadingOnes()); 1786 KnownOne.clear(); 1787 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1788 return; 1789 } 1790 default: 1791 // Allow the target to implement this method for its nodes. 1792 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1793 case ISD::INTRINSIC_WO_CHAIN: 1794 case ISD::INTRINSIC_W_CHAIN: 1795 case ISD::INTRINSIC_VOID: 1796 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this); 1797 } 1798 return; 1799 } 1800} 1801 1802/// ComputeNumSignBits - Return the number of times the sign bit of the 1803/// register is replicated into the other bits. We know that at least 1 bit 1804/// is always equal to the sign bit (itself), but other cases can give us 1805/// information. For example, immediately after an "SRA X, 2", we know that 1806/// the top 3 bits are all equal to each other, so we return 3. 1807unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 1808 MVT VT = Op.getValueType(); 1809 assert(VT.isInteger() && "Invalid VT!"); 1810 unsigned VTBits = VT.getSizeInBits(); 1811 unsigned Tmp, Tmp2; 1812 unsigned FirstAnswer = 1; 1813 1814 if (Depth == 6) 1815 return 1; // Limit search depth. 1816 1817 switch (Op.getOpcode()) { 1818 default: break; 1819 case ISD::AssertSext: 1820 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1821 return VTBits-Tmp+1; 1822 case ISD::AssertZext: 1823 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1824 return VTBits-Tmp; 1825 1826 case ISD::Constant: { 1827 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 1828 // If negative, return # leading ones. 1829 if (Val.isNegative()) 1830 return Val.countLeadingOnes(); 1831 1832 // Return # leading zeros. 1833 return Val.countLeadingZeros(); 1834 } 1835 1836 case ISD::SIGN_EXTEND: 1837 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits(); 1838 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 1839 1840 case ISD::SIGN_EXTEND_INREG: 1841 // Max of the input and what this extends. 1842 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1843 Tmp = VTBits-Tmp+1; 1844 1845 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1846 return std::max(Tmp, Tmp2); 1847 1848 case ISD::SRA: 1849 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1850 // SRA X, C -> adds C sign bits. 1851 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1852 Tmp += C->getZExtValue(); 1853 if (Tmp > VTBits) Tmp = VTBits; 1854 } 1855 return Tmp; 1856 case ISD::SHL: 1857 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1858 // shl destroys sign bits. 1859 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1860 if (C->getZExtValue() >= VTBits || // Bad shift. 1861 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 1862 return Tmp - C->getZExtValue(); 1863 } 1864 break; 1865 case ISD::AND: 1866 case ISD::OR: 1867 case ISD::XOR: // NOT is handled here. 1868 // Logical binary ops preserve the number of sign bits at the worst. 1869 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1870 if (Tmp != 1) { 1871 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1872 FirstAnswer = std::min(Tmp, Tmp2); 1873 // We computed what we know about the sign bits as our first 1874 // answer. Now proceed to the generic code that uses 1875 // ComputeMaskedBits, and pick whichever answer is better. 1876 } 1877 break; 1878 1879 case ISD::SELECT: 1880 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1881 if (Tmp == 1) return 1; // Early out. 1882 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 1883 return std::min(Tmp, Tmp2); 1884 1885 case ISD::SADDO: 1886 case ISD::UADDO: 1887 case ISD::SSUBO: 1888 case ISD::USUBO: 1889 case ISD::SMULO: 1890 case ISD::UMULO: 1891 if (Op.getResNo() != 1) 1892 break; 1893 // The boolean result conforms to getBooleanContents. Fall through. 1894 case ISD::SETCC: 1895 // If setcc returns 0/-1, all bits are sign bits. 1896 if (TLI.getBooleanContents() == 1897 TargetLowering::ZeroOrNegativeOneBooleanContent) 1898 return VTBits; 1899 break; 1900 case ISD::ROTL: 1901 case ISD::ROTR: 1902 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1903 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 1904 1905 // Handle rotate right by N like a rotate left by 32-N. 1906 if (Op.getOpcode() == ISD::ROTR) 1907 RotAmt = (VTBits-RotAmt) & (VTBits-1); 1908 1909 // If we aren't rotating out all of the known-in sign bits, return the 1910 // number that are left. This handles rotl(sext(x), 1) for example. 1911 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1912 if (Tmp > RotAmt+1) return Tmp-RotAmt; 1913 } 1914 break; 1915 case ISD::ADD: 1916 // Add can have at most one carry bit. Thus we know that the output 1917 // is, at worst, one more bit than the inputs. 1918 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1919 if (Tmp == 1) return 1; // Early out. 1920 1921 // Special case decrementing a value (ADD X, -1): 1922 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1923 if (CRHS->isAllOnesValue()) { 1924 APInt KnownZero, KnownOne; 1925 APInt Mask = APInt::getAllOnesValue(VTBits); 1926 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 1927 1928 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1929 // sign bits set. 1930 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1931 return VTBits; 1932 1933 // If we are subtracting one from a positive number, there is no carry 1934 // out of the result. 1935 if (KnownZero.isNegative()) 1936 return Tmp; 1937 } 1938 1939 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1940 if (Tmp2 == 1) return 1; 1941 return std::min(Tmp, Tmp2)-1; 1942 break; 1943 1944 case ISD::SUB: 1945 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1946 if (Tmp2 == 1) return 1; 1947 1948 // Handle NEG. 1949 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1950 if (CLHS->isNullValue()) { 1951 APInt KnownZero, KnownOne; 1952 APInt Mask = APInt::getAllOnesValue(VTBits); 1953 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1954 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1955 // sign bits set. 1956 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1957 return VTBits; 1958 1959 // If the input is known to be positive (the sign bit is known clear), 1960 // the output of the NEG has the same number of sign bits as the input. 1961 if (KnownZero.isNegative()) 1962 return Tmp2; 1963 1964 // Otherwise, we treat this like a SUB. 1965 } 1966 1967 // Sub can have at most one carry bit. Thus we know that the output 1968 // is, at worst, one more bit than the inputs. 1969 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1970 if (Tmp == 1) return 1; // Early out. 1971 return std::min(Tmp, Tmp2)-1; 1972 break; 1973 case ISD::TRUNCATE: 1974 // FIXME: it's tricky to do anything useful for this, but it is an important 1975 // case for targets like X86. 1976 break; 1977 } 1978 1979 // Handle LOADX separately here. EXTLOAD case will fallthrough. 1980 if (Op.getOpcode() == ISD::LOAD) { 1981 LoadSDNode *LD = cast<LoadSDNode>(Op); 1982 unsigned ExtType = LD->getExtensionType(); 1983 switch (ExtType) { 1984 default: break; 1985 case ISD::SEXTLOAD: // '17' bits known 1986 Tmp = LD->getMemoryVT().getSizeInBits(); 1987 return VTBits-Tmp+1; 1988 case ISD::ZEXTLOAD: // '16' bits known 1989 Tmp = LD->getMemoryVT().getSizeInBits(); 1990 return VTBits-Tmp; 1991 } 1992 } 1993 1994 // Allow the target to implement this method for its nodes. 1995 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 1996 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 1997 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 1998 Op.getOpcode() == ISD::INTRINSIC_VOID) { 1999 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2000 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2001 } 2002 2003 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2004 // use this information. 2005 APInt KnownZero, KnownOne; 2006 APInt Mask = APInt::getAllOnesValue(VTBits); 2007 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2008 2009 if (KnownZero.isNegative()) { // sign bit is 0 2010 Mask = KnownZero; 2011 } else if (KnownOne.isNegative()) { // sign bit is 1; 2012 Mask = KnownOne; 2013 } else { 2014 // Nothing known. 2015 return FirstAnswer; 2016 } 2017 2018 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2019 // the number of identical bits in the top of the input value. 2020 Mask = ~Mask; 2021 Mask <<= Mask.getBitWidth()-VTBits; 2022 // Return # leading zeros. We use 'min' here in case Val was zero before 2023 // shifting. We don't want to return '64' as for an i32 "0". 2024 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2025} 2026 2027 2028bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2029 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2030 if (!GA) return false; 2031 if (GA->getOffset() != 0) return false; 2032 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2033 if (!GV) return false; 2034 MachineModuleInfo *MMI = getMachineModuleInfo(); 2035 return MMI && MMI->hasDebugInfo(); 2036} 2037 2038 2039/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2040/// element of the result of the vector shuffle. 2041SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) { 2042 MVT VT = N->getValueType(0); 2043 SDValue PermMask = N->getOperand(2); 2044 SDValue Idx = PermMask.getOperand(i); 2045 if (Idx.getOpcode() == ISD::UNDEF) 2046 return getNode(ISD::UNDEF, VT.getVectorElementType()); 2047 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue(); 2048 unsigned NumElems = PermMask.getNumOperands(); 2049 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2050 Index %= NumElems; 2051 2052 if (V.getOpcode() == ISD::BIT_CONVERT) { 2053 V = V.getOperand(0); 2054 MVT VVT = V.getValueType(); 2055 if (!VVT.isVector() || VVT.getVectorNumElements() != NumElems) 2056 return SDValue(); 2057 } 2058 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2059 return (Index == 0) ? V.getOperand(0) 2060 : getNode(ISD::UNDEF, VT.getVectorElementType()); 2061 if (V.getOpcode() == ISD::BUILD_VECTOR) 2062 return V.getOperand(Index); 2063 if (V.getOpcode() == ISD::VECTOR_SHUFFLE) 2064 return getShuffleScalarElt(V.getNode(), Index); 2065 return SDValue(); 2066} 2067 2068 2069/// getNode - Gets or creates the specified node. 2070/// 2071SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) { 2072 FoldingSetNodeID ID; 2073 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2074 void *IP = 0; 2075 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2076 return SDValue(E, 0); 2077 SDNode *N = NodeAllocator.Allocate<SDNode>(); 2078 new (N) SDNode(Opcode, SDNode::getSDVTList(VT)); 2079 CSEMap.InsertNode(N, IP); 2080 2081 AllNodes.push_back(N); 2082#ifndef NDEBUG 2083 VerifyNode(N); 2084#endif 2085 return SDValue(N, 0); 2086} 2087 2088SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { 2089 // Constant fold unary operations with an integer constant operand. 2090 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2091 const APInt &Val = C->getAPIntValue(); 2092 unsigned BitWidth = VT.getSizeInBits(); 2093 switch (Opcode) { 2094 default: break; 2095 case ISD::SIGN_EXTEND: 2096 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 2097 case ISD::ANY_EXTEND: 2098 case ISD::ZERO_EXTEND: 2099 case ISD::TRUNCATE: 2100 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 2101 case ISD::UINT_TO_FP: 2102 case ISD::SINT_TO_FP: { 2103 const uint64_t zero[] = {0, 0}; 2104 // No compile time operations on this type. 2105 if (VT==MVT::ppcf128) 2106 break; 2107 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 2108 (void)apf.convertFromAPInt(Val, 2109 Opcode==ISD::SINT_TO_FP, 2110 APFloat::rmNearestTiesToEven); 2111 return getConstantFP(apf, VT); 2112 } 2113 case ISD::BIT_CONVERT: 2114 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2115 return getConstantFP(Val.bitsToFloat(), VT); 2116 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2117 return getConstantFP(Val.bitsToDouble(), VT); 2118 break; 2119 case ISD::BSWAP: 2120 return getConstant(Val.byteSwap(), VT); 2121 case ISD::CTPOP: 2122 return getConstant(Val.countPopulation(), VT); 2123 case ISD::CTLZ: 2124 return getConstant(Val.countLeadingZeros(), VT); 2125 case ISD::CTTZ: 2126 return getConstant(Val.countTrailingZeros(), VT); 2127 } 2128 } 2129 2130 // Constant fold unary operations with a floating point constant operand. 2131 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2132 APFloat V = C->getValueAPF(); // make copy 2133 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2134 switch (Opcode) { 2135 case ISD::FNEG: 2136 V.changeSign(); 2137 return getConstantFP(V, VT); 2138 case ISD::FABS: 2139 V.clearSign(); 2140 return getConstantFP(V, VT); 2141 case ISD::FP_ROUND: 2142 case ISD::FP_EXTEND: { 2143 bool ignored; 2144 // This can return overflow, underflow, or inexact; we don't care. 2145 // FIXME need to be more flexible about rounding mode. 2146 (void)V.convert(*MVTToAPFloatSemantics(VT), 2147 APFloat::rmNearestTiesToEven, &ignored); 2148 return getConstantFP(V, VT); 2149 } 2150 case ISD::FP_TO_SINT: 2151 case ISD::FP_TO_UINT: { 2152 integerPart x; 2153 bool ignored; 2154 assert(integerPartWidth >= 64); 2155 // FIXME need to be more flexible about rounding mode. 2156 APFloat::opStatus s = V.convertToInteger(&x, 64U, 2157 Opcode==ISD::FP_TO_SINT, 2158 APFloat::rmTowardZero, &ignored); 2159 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2160 break; 2161 return getConstant(x, VT); 2162 } 2163 case ISD::BIT_CONVERT: 2164 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2165 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2166 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2167 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2168 break; 2169 } 2170 } 2171 } 2172 2173 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2174 switch (Opcode) { 2175 case ISD::TokenFactor: 2176 case ISD::MERGE_VALUES: 2177 case ISD::CONCAT_VECTORS: 2178 return Operand; // Factor, merge or concat of one node? No need. 2179 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node"); 2180 case ISD::FP_EXTEND: 2181 assert(VT.isFloatingPoint() && 2182 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2183 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2184 if (Operand.getOpcode() == ISD::UNDEF) 2185 return getNode(ISD::UNDEF, VT); 2186 break; 2187 case ISD::SIGN_EXTEND: 2188 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2189 "Invalid SIGN_EXTEND!"); 2190 if (Operand.getValueType() == VT) return Operand; // noop extension 2191 assert(Operand.getValueType().bitsLT(VT) 2192 && "Invalid sext node, dst < src!"); 2193 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2194 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2195 break; 2196 case ISD::ZERO_EXTEND: 2197 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2198 "Invalid ZERO_EXTEND!"); 2199 if (Operand.getValueType() == VT) return Operand; // noop extension 2200 assert(Operand.getValueType().bitsLT(VT) 2201 && "Invalid zext node, dst < src!"); 2202 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2203 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0)); 2204 break; 2205 case ISD::ANY_EXTEND: 2206 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2207 "Invalid ANY_EXTEND!"); 2208 if (Operand.getValueType() == VT) return Operand; // noop extension 2209 assert(Operand.getValueType().bitsLT(VT) 2210 && "Invalid anyext node, dst < src!"); 2211 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2212 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2213 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2214 break; 2215 case ISD::TRUNCATE: 2216 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2217 "Invalid TRUNCATE!"); 2218 if (Operand.getValueType() == VT) return Operand; // noop truncate 2219 assert(Operand.getValueType().bitsGT(VT) 2220 && "Invalid truncate node, src < dst!"); 2221 if (OpOpcode == ISD::TRUNCATE) 2222 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); 2223 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2224 OpOpcode == ISD::ANY_EXTEND) { 2225 // If the source is smaller than the dest, we still need an extend. 2226 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT)) 2227 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2228 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2229 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); 2230 else 2231 return Operand.getNode()->getOperand(0); 2232 } 2233 break; 2234 case ISD::BIT_CONVERT: 2235 // Basic sanity checking. 2236 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2237 && "Cannot BIT_CONVERT between types of different sizes!"); 2238 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2239 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2240 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0)); 2241 if (OpOpcode == ISD::UNDEF) 2242 return getNode(ISD::UNDEF, VT); 2243 break; 2244 case ISD::SCALAR_TO_VECTOR: 2245 assert(VT.isVector() && !Operand.getValueType().isVector() && 2246 VT.getVectorElementType() == Operand.getValueType() && 2247 "Illegal SCALAR_TO_VECTOR node!"); 2248 if (OpOpcode == ISD::UNDEF) 2249 return getNode(ISD::UNDEF, VT); 2250 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2251 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2252 isa<ConstantSDNode>(Operand.getOperand(1)) && 2253 Operand.getConstantOperandVal(1) == 0 && 2254 Operand.getOperand(0).getValueType() == VT) 2255 return Operand.getOperand(0); 2256 break; 2257 case ISD::FNEG: 2258 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X) 2259 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1), 2260 Operand.getNode()->getOperand(0)); 2261 if (OpOpcode == ISD::FNEG) // --X -> X 2262 return Operand.getNode()->getOperand(0); 2263 break; 2264 case ISD::FABS: 2265 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2266 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0)); 2267 break; 2268 } 2269 2270 SDNode *N; 2271 SDVTList VTs = getVTList(VT); 2272 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2273 FoldingSetNodeID ID; 2274 SDValue Ops[1] = { Operand }; 2275 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2276 void *IP = 0; 2277 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2278 return SDValue(E, 0); 2279 N = NodeAllocator.Allocate<UnarySDNode>(); 2280 new (N) UnarySDNode(Opcode, VTs, Operand); 2281 CSEMap.InsertNode(N, IP); 2282 } else { 2283 N = NodeAllocator.Allocate<UnarySDNode>(); 2284 new (N) UnarySDNode(Opcode, VTs, Operand); 2285 } 2286 2287 AllNodes.push_back(N); 2288#ifndef NDEBUG 2289 VerifyNode(N); 2290#endif 2291 return SDValue(N, 0); 2292} 2293 2294SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2295 MVT VT, 2296 ConstantSDNode *Cst1, 2297 ConstantSDNode *Cst2) { 2298 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2299 2300 switch (Opcode) { 2301 case ISD::ADD: return getConstant(C1 + C2, VT); 2302 case ISD::SUB: return getConstant(C1 - C2, VT); 2303 case ISD::MUL: return getConstant(C1 * C2, VT); 2304 case ISD::UDIV: 2305 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2306 break; 2307 case ISD::UREM: 2308 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2309 break; 2310 case ISD::SDIV: 2311 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2312 break; 2313 case ISD::SREM: 2314 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2315 break; 2316 case ISD::AND: return getConstant(C1 & C2, VT); 2317 case ISD::OR: return getConstant(C1 | C2, VT); 2318 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2319 case ISD::SHL: return getConstant(C1 << C2, VT); 2320 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2321 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2322 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2323 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2324 default: break; 2325 } 2326 2327 return SDValue(); 2328} 2329 2330SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2331 SDValue N1, SDValue N2) { 2332 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2333 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2334 switch (Opcode) { 2335 default: break; 2336 case ISD::TokenFactor: 2337 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2338 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2339 // Fold trivial token factors. 2340 if (N1.getOpcode() == ISD::EntryToken) return N2; 2341 if (N2.getOpcode() == ISD::EntryToken) return N1; 2342 if (N1 == N2) return N1; 2343 break; 2344 case ISD::CONCAT_VECTORS: 2345 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2346 // one big BUILD_VECTOR. 2347 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2348 N2.getOpcode() == ISD::BUILD_VECTOR) { 2349 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2350 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2351 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2352 } 2353 break; 2354 case ISD::AND: 2355 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2356 N1.getValueType() == VT && "Binary operator types must match!"); 2357 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2358 // worth handling here. 2359 if (N2C && N2C->isNullValue()) 2360 return N2; 2361 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2362 return N1; 2363 break; 2364 case ISD::OR: 2365 case ISD::XOR: 2366 case ISD::ADD: 2367 case ISD::SUB: 2368 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2369 N1.getValueType() == VT && "Binary operator types must match!"); 2370 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2371 // it's worth handling here. 2372 if (N2C && N2C->isNullValue()) 2373 return N1; 2374 break; 2375 case ISD::UDIV: 2376 case ISD::UREM: 2377 case ISD::MULHU: 2378 case ISD::MULHS: 2379 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2380 // fall through 2381 case ISD::MUL: 2382 case ISD::SDIV: 2383 case ISD::SREM: 2384 case ISD::FADD: 2385 case ISD::FSUB: 2386 case ISD::FMUL: 2387 case ISD::FDIV: 2388 case ISD::FREM: 2389 assert(N1.getValueType() == N2.getValueType() && 2390 N1.getValueType() == VT && "Binary operator types must match!"); 2391 break; 2392 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2393 assert(N1.getValueType() == VT && 2394 N1.getValueType().isFloatingPoint() && 2395 N2.getValueType().isFloatingPoint() && 2396 "Invalid FCOPYSIGN!"); 2397 break; 2398 case ISD::SHL: 2399 case ISD::SRA: 2400 case ISD::SRL: 2401 case ISD::ROTL: 2402 case ISD::ROTR: 2403 assert(VT == N1.getValueType() && 2404 "Shift operators return type must be the same as their first arg"); 2405 assert(VT.isInteger() && N2.getValueType().isInteger() && 2406 "Shifts only work on integers"); 2407 assert((N2.getValueType() == TLI.getShiftAmountTy() || 2408 (N2.getValueType().isVector() && N2.getValueType().isInteger())) && 2409 "Wrong type for shift amount"); 2410 2411 // Always fold shifts of i1 values so the code generator doesn't need to 2412 // handle them. Since we know the size of the shift has to be less than the 2413 // size of the value, the shift/rotate count is guaranteed to be zero. 2414 if (VT == MVT::i1) 2415 return N1; 2416 break; 2417 case ISD::FP_ROUND_INREG: { 2418 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2419 assert(VT == N1.getValueType() && "Not an inreg round!"); 2420 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2421 "Cannot FP_ROUND_INREG integer types"); 2422 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2423 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2424 break; 2425 } 2426 case ISD::FP_ROUND: 2427 assert(VT.isFloatingPoint() && 2428 N1.getValueType().isFloatingPoint() && 2429 VT.bitsLE(N1.getValueType()) && 2430 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2431 if (N1.getValueType() == VT) return N1; // noop conversion. 2432 break; 2433 case ISD::AssertSext: 2434 case ISD::AssertZext: { 2435 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2436 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2437 assert(VT.isInteger() && EVT.isInteger() && 2438 "Cannot *_EXTEND_INREG FP types"); 2439 assert(EVT.bitsLE(VT) && "Not extending!"); 2440 if (VT == EVT) return N1; // noop assertion. 2441 break; 2442 } 2443 case ISD::SIGN_EXTEND_INREG: { 2444 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2445 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2446 assert(VT.isInteger() && EVT.isInteger() && 2447 "Cannot *_EXTEND_INREG FP types"); 2448 assert(EVT.bitsLE(VT) && "Not extending!"); 2449 if (EVT == VT) return N1; // Not actually extending 2450 2451 if (N1C) { 2452 APInt Val = N1C->getAPIntValue(); 2453 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits(); 2454 Val <<= Val.getBitWidth()-FromBits; 2455 Val = Val.ashr(Val.getBitWidth()-FromBits); 2456 return getConstant(Val, VT); 2457 } 2458 break; 2459 } 2460 case ISD::EXTRACT_VECTOR_ELT: 2461 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2462 if (N1.getOpcode() == ISD::UNDEF) 2463 return getNode(ISD::UNDEF, VT); 2464 2465 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2466 // expanding copies of large vectors from registers. 2467 if (N2C && 2468 N1.getOpcode() == ISD::CONCAT_VECTORS && 2469 N1.getNumOperands() > 0) { 2470 unsigned Factor = 2471 N1.getOperand(0).getValueType().getVectorNumElements(); 2472 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, 2473 N1.getOperand(N2C->getZExtValue() / Factor), 2474 getConstant(N2C->getZExtValue() % Factor, 2475 N2.getValueType())); 2476 } 2477 2478 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2479 // expanding large vector constants. 2480 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) 2481 return N1.getOperand(N2C->getZExtValue()); 2482 2483 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2484 // operations are lowered to scalars. 2485 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2486 if (N1.getOperand(2) == N2) 2487 return N1.getOperand(1); 2488 else 2489 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2); 2490 } 2491 break; 2492 case ISD::EXTRACT_ELEMENT: 2493 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2494 assert(!N1.getValueType().isVector() && !VT.isVector() && 2495 (N1.getValueType().isInteger() == VT.isInteger()) && 2496 "Wrong types for EXTRACT_ELEMENT!"); 2497 2498 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2499 // 64-bit integers into 32-bit parts. Instead of building the extract of 2500 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2501 if (N1.getOpcode() == ISD::BUILD_PAIR) 2502 return N1.getOperand(N2C->getZExtValue()); 2503 2504 // EXTRACT_ELEMENT of a constant int is also very common. 2505 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2506 unsigned ElementSize = VT.getSizeInBits(); 2507 unsigned Shift = ElementSize * N2C->getZExtValue(); 2508 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2509 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2510 } 2511 break; 2512 case ISD::EXTRACT_SUBVECTOR: 2513 if (N1.getValueType() == VT) // Trivial extraction. 2514 return N1; 2515 break; 2516 } 2517 2518 if (N1C) { 2519 if (N2C) { 2520 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2521 if (SV.getNode()) return SV; 2522 } else { // Cannonicalize constant to RHS if commutative 2523 if (isCommutativeBinOp(Opcode)) { 2524 std::swap(N1C, N2C); 2525 std::swap(N1, N2); 2526 } 2527 } 2528 } 2529 2530 // Constant fold FP operations. 2531 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2532 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2533 if (N1CFP) { 2534 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2535 // Cannonicalize constant to RHS if commutative 2536 std::swap(N1CFP, N2CFP); 2537 std::swap(N1, N2); 2538 } else if (N2CFP && VT != MVT::ppcf128) { 2539 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2540 APFloat::opStatus s; 2541 switch (Opcode) { 2542 case ISD::FADD: 2543 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2544 if (s != APFloat::opInvalidOp) 2545 return getConstantFP(V1, VT); 2546 break; 2547 case ISD::FSUB: 2548 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2549 if (s!=APFloat::opInvalidOp) 2550 return getConstantFP(V1, VT); 2551 break; 2552 case ISD::FMUL: 2553 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2554 if (s!=APFloat::opInvalidOp) 2555 return getConstantFP(V1, VT); 2556 break; 2557 case ISD::FDIV: 2558 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2559 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2560 return getConstantFP(V1, VT); 2561 break; 2562 case ISD::FREM : 2563 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2564 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2565 return getConstantFP(V1, VT); 2566 break; 2567 case ISD::FCOPYSIGN: 2568 V1.copySign(V2); 2569 return getConstantFP(V1, VT); 2570 default: break; 2571 } 2572 } 2573 } 2574 2575 // Canonicalize an UNDEF to the RHS, even over a constant. 2576 if (N1.getOpcode() == ISD::UNDEF) { 2577 if (isCommutativeBinOp(Opcode)) { 2578 std::swap(N1, N2); 2579 } else { 2580 switch (Opcode) { 2581 case ISD::FP_ROUND_INREG: 2582 case ISD::SIGN_EXTEND_INREG: 2583 case ISD::SUB: 2584 case ISD::FSUB: 2585 case ISD::FDIV: 2586 case ISD::FREM: 2587 case ISD::SRA: 2588 return N1; // fold op(undef, arg2) -> undef 2589 case ISD::UDIV: 2590 case ISD::SDIV: 2591 case ISD::UREM: 2592 case ISD::SREM: 2593 case ISD::SRL: 2594 case ISD::SHL: 2595 if (!VT.isVector()) 2596 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2597 // For vectors, we can't easily build an all zero vector, just return 2598 // the LHS. 2599 return N2; 2600 } 2601 } 2602 } 2603 2604 // Fold a bunch of operators when the RHS is undef. 2605 if (N2.getOpcode() == ISD::UNDEF) { 2606 switch (Opcode) { 2607 case ISD::XOR: 2608 if (N1.getOpcode() == ISD::UNDEF) 2609 // Handle undef ^ undef -> 0 special case. This is a common 2610 // idiom (misuse). 2611 return getConstant(0, VT); 2612 // fallthrough 2613 case ISD::ADD: 2614 case ISD::ADDC: 2615 case ISD::ADDE: 2616 case ISD::SUB: 2617 case ISD::FADD: 2618 case ISD::FSUB: 2619 case ISD::FMUL: 2620 case ISD::FDIV: 2621 case ISD::FREM: 2622 case ISD::UDIV: 2623 case ISD::SDIV: 2624 case ISD::UREM: 2625 case ISD::SREM: 2626 return N2; // fold op(arg1, undef) -> undef 2627 case ISD::MUL: 2628 case ISD::AND: 2629 case ISD::SRL: 2630 case ISD::SHL: 2631 if (!VT.isVector()) 2632 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2633 // For vectors, we can't easily build an all zero vector, just return 2634 // the LHS. 2635 return N1; 2636 case ISD::OR: 2637 if (!VT.isVector()) 2638 return getConstant(VT.getIntegerVTBitMask(), VT); 2639 // For vectors, we can't easily build an all one vector, just return 2640 // the LHS. 2641 return N1; 2642 case ISD::SRA: 2643 return N1; 2644 } 2645 } 2646 2647 // Memoize this node if possible. 2648 SDNode *N; 2649 SDVTList VTs = getVTList(VT); 2650 if (VT != MVT::Flag) { 2651 SDValue Ops[] = { N1, N2 }; 2652 FoldingSetNodeID ID; 2653 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2654 void *IP = 0; 2655 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2656 return SDValue(E, 0); 2657 N = NodeAllocator.Allocate<BinarySDNode>(); 2658 new (N) BinarySDNode(Opcode, VTs, N1, N2); 2659 CSEMap.InsertNode(N, IP); 2660 } else { 2661 N = NodeAllocator.Allocate<BinarySDNode>(); 2662 new (N) BinarySDNode(Opcode, VTs, N1, N2); 2663 } 2664 2665 AllNodes.push_back(N); 2666#ifndef NDEBUG 2667 VerifyNode(N); 2668#endif 2669 return SDValue(N, 0); 2670} 2671 2672SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2673 SDValue N1, SDValue N2, SDValue N3) { 2674 // Perform various simplifications. 2675 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2676 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2677 switch (Opcode) { 2678 case ISD::CONCAT_VECTORS: 2679 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2680 // one big BUILD_VECTOR. 2681 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2682 N2.getOpcode() == ISD::BUILD_VECTOR && 2683 N3.getOpcode() == ISD::BUILD_VECTOR) { 2684 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2685 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2686 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2687 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2688 } 2689 break; 2690 case ISD::SETCC: { 2691 // Use FoldSetCC to simplify SETCC's. 2692 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 2693 if (Simp.getNode()) return Simp; 2694 break; 2695 } 2696 case ISD::SELECT: 2697 if (N1C) { 2698 if (N1C->getZExtValue()) 2699 return N2; // select true, X, Y -> X 2700 else 2701 return N3; // select false, X, Y -> Y 2702 } 2703 2704 if (N2 == N3) return N2; // select C, X, X -> X 2705 break; 2706 case ISD::BRCOND: 2707 if (N2C) { 2708 if (N2C->getZExtValue()) // Unconditional branch 2709 return getNode(ISD::BR, MVT::Other, N1, N3); 2710 else 2711 return N1; // Never-taken branch 2712 } 2713 break; 2714 case ISD::VECTOR_SHUFFLE: 2715 assert(N1.getValueType() == N2.getValueType() && 2716 N1.getValueType().isVector() && 2717 VT.isVector() && N3.getValueType().isVector() && 2718 N3.getOpcode() == ISD::BUILD_VECTOR && 2719 VT.getVectorNumElements() == N3.getNumOperands() && 2720 "Illegal VECTOR_SHUFFLE node!"); 2721 break; 2722 case ISD::BIT_CONVERT: 2723 // Fold bit_convert nodes from a type to themselves. 2724 if (N1.getValueType() == VT) 2725 return N1; 2726 break; 2727 } 2728 2729 // Memoize node if it doesn't produce a flag. 2730 SDNode *N; 2731 SDVTList VTs = getVTList(VT); 2732 if (VT != MVT::Flag) { 2733 SDValue Ops[] = { N1, N2, N3 }; 2734 FoldingSetNodeID ID; 2735 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 2736 void *IP = 0; 2737 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2738 return SDValue(E, 0); 2739 N = NodeAllocator.Allocate<TernarySDNode>(); 2740 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3); 2741 CSEMap.InsertNode(N, IP); 2742 } else { 2743 N = NodeAllocator.Allocate<TernarySDNode>(); 2744 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3); 2745 } 2746 AllNodes.push_back(N); 2747#ifndef NDEBUG 2748 VerifyNode(N); 2749#endif 2750 return SDValue(N, 0); 2751} 2752 2753SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2754 SDValue N1, SDValue N2, SDValue N3, 2755 SDValue N4) { 2756 SDValue Ops[] = { N1, N2, N3, N4 }; 2757 return getNode(Opcode, VT, Ops, 4); 2758} 2759 2760SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2761 SDValue N1, SDValue N2, SDValue N3, 2762 SDValue N4, SDValue N5) { 2763 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 2764 return getNode(Opcode, VT, Ops, 5); 2765} 2766 2767/// getMemsetValue - Vectorized representation of the memset value 2768/// operand. 2769static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) { 2770 unsigned NumBits = VT.isVector() ? 2771 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 2772 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 2773 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 2774 unsigned Shift = 8; 2775 for (unsigned i = NumBits; i > 8; i >>= 1) { 2776 Val = (Val << Shift) | Val; 2777 Shift <<= 1; 2778 } 2779 if (VT.isInteger()) 2780 return DAG.getConstant(Val, VT); 2781 return DAG.getConstantFP(APFloat(Val), VT); 2782 } 2783 2784 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2785 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value); 2786 unsigned Shift = 8; 2787 for (unsigned i = NumBits; i > 8; i >>= 1) { 2788 Value = DAG.getNode(ISD::OR, VT, 2789 DAG.getNode(ISD::SHL, VT, Value, 2790 DAG.getConstant(Shift, 2791 TLI.getShiftAmountTy())), 2792 Value); 2793 Shift <<= 1; 2794 } 2795 2796 return Value; 2797} 2798 2799/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 2800/// used when a memcpy is turned into a memset when the source is a constant 2801/// string ptr. 2802static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG, 2803 const TargetLowering &TLI, 2804 std::string &Str, unsigned Offset) { 2805 // Handle vector with all elements zero. 2806 if (Str.empty()) { 2807 if (VT.isInteger()) 2808 return DAG.getConstant(0, VT); 2809 unsigned NumElts = VT.getVectorNumElements(); 2810 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 2811 return DAG.getNode(ISD::BIT_CONVERT, VT, 2812 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts))); 2813 } 2814 2815 assert(!VT.isVector() && "Can't handle vector type here!"); 2816 unsigned NumBits = VT.getSizeInBits(); 2817 unsigned MSB = NumBits / 8; 2818 uint64_t Val = 0; 2819 if (TLI.isLittleEndian()) 2820 Offset = Offset + MSB - 1; 2821 for (unsigned i = 0; i != MSB; ++i) { 2822 Val = (Val << 8) | (unsigned char)Str[Offset]; 2823 Offset += TLI.isLittleEndian() ? -1 : 1; 2824 } 2825 return DAG.getConstant(Val, VT); 2826} 2827 2828/// getMemBasePlusOffset - Returns base and offset node for the 2829/// 2830static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 2831 SelectionDAG &DAG) { 2832 MVT VT = Base.getValueType(); 2833 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT)); 2834} 2835 2836/// isMemSrcFromString - Returns true if memcpy source is a string constant. 2837/// 2838static bool isMemSrcFromString(SDValue Src, std::string &Str) { 2839 unsigned SrcDelta = 0; 2840 GlobalAddressSDNode *G = NULL; 2841 if (Src.getOpcode() == ISD::GlobalAddress) 2842 G = cast<GlobalAddressSDNode>(Src); 2843 else if (Src.getOpcode() == ISD::ADD && 2844 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 2845 Src.getOperand(1).getOpcode() == ISD::Constant) { 2846 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 2847 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 2848 } 2849 if (!G) 2850 return false; 2851 2852 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 2853 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 2854 return true; 2855 2856 return false; 2857} 2858 2859/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 2860/// to replace the memset / memcpy is below the threshold. It also returns the 2861/// types of the sequence of memory ops to perform memset / memcpy. 2862static 2863bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps, 2864 SDValue Dst, SDValue Src, 2865 unsigned Limit, uint64_t Size, unsigned &Align, 2866 std::string &Str, bool &isSrcStr, 2867 SelectionDAG &DAG, 2868 const TargetLowering &TLI) { 2869 isSrcStr = isMemSrcFromString(Src, Str); 2870 bool isSrcConst = isa<ConstantSDNode>(Src); 2871 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(); 2872 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr); 2873 if (VT != MVT::iAny) { 2874 unsigned NewAlign = (unsigned) 2875 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT()); 2876 // If source is a string constant, this will require an unaligned load. 2877 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 2878 if (Dst.getOpcode() != ISD::FrameIndex) { 2879 // Can't change destination alignment. It requires a unaligned store. 2880 if (AllowUnalign) 2881 VT = MVT::iAny; 2882 } else { 2883 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 2884 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 2885 if (MFI->isFixedObjectIndex(FI)) { 2886 // Can't change destination alignment. It requires a unaligned store. 2887 if (AllowUnalign) 2888 VT = MVT::iAny; 2889 } else { 2890 // Give the stack frame object a larger alignment if needed. 2891 if (MFI->getObjectAlignment(FI) < NewAlign) 2892 MFI->setObjectAlignment(FI, NewAlign); 2893 Align = NewAlign; 2894 } 2895 } 2896 } 2897 } 2898 2899 if (VT == MVT::iAny) { 2900 if (AllowUnalign) { 2901 VT = MVT::i64; 2902 } else { 2903 switch (Align & 7) { 2904 case 0: VT = MVT::i64; break; 2905 case 4: VT = MVT::i32; break; 2906 case 2: VT = MVT::i16; break; 2907 default: VT = MVT::i8; break; 2908 } 2909 } 2910 2911 MVT LVT = MVT::i64; 2912 while (!TLI.isTypeLegal(LVT)) 2913 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1); 2914 assert(LVT.isInteger()); 2915 2916 if (VT.bitsGT(LVT)) 2917 VT = LVT; 2918 } 2919 2920 unsigned NumMemOps = 0; 2921 while (Size != 0) { 2922 unsigned VTSize = VT.getSizeInBits() / 8; 2923 while (VTSize > Size) { 2924 // For now, only use non-vector load / store's for the left-over pieces. 2925 if (VT.isVector()) { 2926 VT = MVT::i64; 2927 while (!TLI.isTypeLegal(VT)) 2928 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2929 VTSize = VT.getSizeInBits() / 8; 2930 } else { 2931 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2932 VTSize >>= 1; 2933 } 2934 } 2935 2936 if (++NumMemOps > Limit) 2937 return false; 2938 MemOps.push_back(VT); 2939 Size -= VTSize; 2940 } 2941 2942 return true; 2943} 2944 2945static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, 2946 SDValue Chain, SDValue Dst, 2947 SDValue Src, uint64_t Size, 2948 unsigned Align, bool AlwaysInline, 2949 const Value *DstSV, uint64_t DstSVOff, 2950 const Value *SrcSV, uint64_t SrcSVOff){ 2951 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2952 2953 // Expand memcpy to a series of load and store ops if the size operand falls 2954 // below a certain threshold. 2955 std::vector<MVT> MemOps; 2956 uint64_t Limit = -1ULL; 2957 if (!AlwaysInline) 2958 Limit = TLI.getMaxStoresPerMemcpy(); 2959 unsigned DstAlign = Align; // Destination alignment can change. 2960 std::string Str; 2961 bool CopyFromStr; 2962 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 2963 Str, CopyFromStr, DAG, TLI)) 2964 return SDValue(); 2965 2966 2967 bool isZeroStr = CopyFromStr && Str.empty(); 2968 SmallVector<SDValue, 8> OutChains; 2969 unsigned NumMemOps = MemOps.size(); 2970 uint64_t SrcOff = 0, DstOff = 0; 2971 for (unsigned i = 0; i < NumMemOps; i++) { 2972 MVT VT = MemOps[i]; 2973 unsigned VTSize = VT.getSizeInBits() / 8; 2974 SDValue Value, Store; 2975 2976 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 2977 // It's unlikely a store of a vector immediate can be done in a single 2978 // instruction. It would require a load from a constantpool first. 2979 // We also handle store a vector with all zero's. 2980 // FIXME: Handle other cases where store of vector immediate is done in 2981 // a single instruction. 2982 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff); 2983 Store = DAG.getStore(Chain, Value, 2984 getMemBasePlusOffset(Dst, DstOff, DAG), 2985 DstSV, DstSVOff + DstOff, false, DstAlign); 2986 } else { 2987 Value = DAG.getLoad(VT, Chain, 2988 getMemBasePlusOffset(Src, SrcOff, DAG), 2989 SrcSV, SrcSVOff + SrcOff, false, Align); 2990 Store = DAG.getStore(Chain, Value, 2991 getMemBasePlusOffset(Dst, DstOff, DAG), 2992 DstSV, DstSVOff + DstOff, false, DstAlign); 2993 } 2994 OutChains.push_back(Store); 2995 SrcOff += VTSize; 2996 DstOff += VTSize; 2997 } 2998 2999 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3000 &OutChains[0], OutChains.size()); 3001} 3002 3003static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, 3004 SDValue Chain, SDValue Dst, 3005 SDValue Src, uint64_t Size, 3006 unsigned Align, bool AlwaysInline, 3007 const Value *DstSV, uint64_t DstSVOff, 3008 const Value *SrcSV, uint64_t SrcSVOff){ 3009 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3010 3011 // Expand memmove to a series of load and store ops if the size operand falls 3012 // below a certain threshold. 3013 std::vector<MVT> MemOps; 3014 uint64_t Limit = -1ULL; 3015 if (!AlwaysInline) 3016 Limit = TLI.getMaxStoresPerMemmove(); 3017 unsigned DstAlign = Align; // Destination alignment can change. 3018 std::string Str; 3019 bool CopyFromStr; 3020 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3021 Str, CopyFromStr, DAG, TLI)) 3022 return SDValue(); 3023 3024 uint64_t SrcOff = 0, DstOff = 0; 3025 3026 SmallVector<SDValue, 8> LoadValues; 3027 SmallVector<SDValue, 8> LoadChains; 3028 SmallVector<SDValue, 8> OutChains; 3029 unsigned NumMemOps = MemOps.size(); 3030 for (unsigned i = 0; i < NumMemOps; i++) { 3031 MVT VT = MemOps[i]; 3032 unsigned VTSize = VT.getSizeInBits() / 8; 3033 SDValue Value, Store; 3034 3035 Value = DAG.getLoad(VT, Chain, 3036 getMemBasePlusOffset(Src, SrcOff, DAG), 3037 SrcSV, SrcSVOff + SrcOff, false, Align); 3038 LoadValues.push_back(Value); 3039 LoadChains.push_back(Value.getValue(1)); 3040 SrcOff += VTSize; 3041 } 3042 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, 3043 &LoadChains[0], LoadChains.size()); 3044 OutChains.clear(); 3045 for (unsigned i = 0; i < NumMemOps; i++) { 3046 MVT VT = MemOps[i]; 3047 unsigned VTSize = VT.getSizeInBits() / 8; 3048 SDValue Value, Store; 3049 3050 Store = DAG.getStore(Chain, LoadValues[i], 3051 getMemBasePlusOffset(Dst, DstOff, DAG), 3052 DstSV, DstSVOff + DstOff, false, DstAlign); 3053 OutChains.push_back(Store); 3054 DstOff += VTSize; 3055 } 3056 3057 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3058 &OutChains[0], OutChains.size()); 3059} 3060 3061static SDValue getMemsetStores(SelectionDAG &DAG, 3062 SDValue Chain, SDValue Dst, 3063 SDValue Src, uint64_t Size, 3064 unsigned Align, 3065 const Value *DstSV, uint64_t DstSVOff) { 3066 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3067 3068 // Expand memset to a series of load/store ops if the size operand 3069 // falls below a certain threshold. 3070 std::vector<MVT> MemOps; 3071 std::string Str; 3072 bool CopyFromStr; 3073 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 3074 Size, Align, Str, CopyFromStr, DAG, TLI)) 3075 return SDValue(); 3076 3077 SmallVector<SDValue, 8> OutChains; 3078 uint64_t DstOff = 0; 3079 3080 unsigned NumMemOps = MemOps.size(); 3081 for (unsigned i = 0; i < NumMemOps; i++) { 3082 MVT VT = MemOps[i]; 3083 unsigned VTSize = VT.getSizeInBits() / 8; 3084 SDValue Value = getMemsetValue(Src, VT, DAG); 3085 SDValue Store = DAG.getStore(Chain, Value, 3086 getMemBasePlusOffset(Dst, DstOff, DAG), 3087 DstSV, DstSVOff + DstOff); 3088 OutChains.push_back(Store); 3089 DstOff += VTSize; 3090 } 3091 3092 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3093 &OutChains[0], OutChains.size()); 3094} 3095 3096SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst, 3097 SDValue Src, SDValue Size, 3098 unsigned Align, bool AlwaysInline, 3099 const Value *DstSV, uint64_t DstSVOff, 3100 const Value *SrcSV, uint64_t SrcSVOff) { 3101 3102 // Check to see if we should lower the memcpy to loads and stores first. 3103 // For cases within the target-specified limits, this is the best choice. 3104 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3105 if (ConstantSize) { 3106 // Memcpy with size zero? Just return the original chain. 3107 if (ConstantSize->isNullValue()) 3108 return Chain; 3109 3110 SDValue Result = 3111 getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 3112 ConstantSize->getZExtValue(), 3113 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3114 if (Result.getNode()) 3115 return Result; 3116 } 3117 3118 // Then check to see if we should lower the memcpy with target-specific 3119 // code. If the target chooses to do this, this is the next best. 3120 SDValue Result = 3121 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align, 3122 AlwaysInline, 3123 DstSV, DstSVOff, SrcSV, SrcSVOff); 3124 if (Result.getNode()) 3125 return Result; 3126 3127 // If we really need inline code and the target declined to provide it, 3128 // use a (potentially long) sequence of loads and stores. 3129 if (AlwaysInline) { 3130 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3131 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 3132 ConstantSize->getZExtValue(), Align, true, 3133 DstSV, DstSVOff, SrcSV, SrcSVOff); 3134 } 3135 3136 // Emit a library call. 3137 TargetLowering::ArgListTy Args; 3138 TargetLowering::ArgListEntry Entry; 3139 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3140 Entry.Node = Dst; Args.push_back(Entry); 3141 Entry.Node = Src; Args.push_back(Entry); 3142 Entry.Node = Size; Args.push_back(Entry); 3143 std::pair<SDValue,SDValue> CallResult = 3144 TLI.LowerCallTo(Chain, Type::VoidTy, 3145 false, false, false, false, CallingConv::C, false, 3146 getExternalSymbol("memcpy", TLI.getPointerTy()), 3147 Args, *this); 3148 return CallResult.second; 3149} 3150 3151SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst, 3152 SDValue Src, SDValue Size, 3153 unsigned Align, 3154 const Value *DstSV, uint64_t DstSVOff, 3155 const Value *SrcSV, uint64_t SrcSVOff) { 3156 3157 // Check to see if we should lower the memmove to loads and stores first. 3158 // For cases within the target-specified limits, this is the best choice. 3159 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3160 if (ConstantSize) { 3161 // Memmove with size zero? Just return the original chain. 3162 if (ConstantSize->isNullValue()) 3163 return Chain; 3164 3165 SDValue Result = 3166 getMemmoveLoadsAndStores(*this, Chain, Dst, Src, 3167 ConstantSize->getZExtValue(), 3168 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3169 if (Result.getNode()) 3170 return Result; 3171 } 3172 3173 // Then check to see if we should lower the memmove with target-specific 3174 // code. If the target chooses to do this, this is the next best. 3175 SDValue Result = 3176 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align, 3177 DstSV, DstSVOff, SrcSV, SrcSVOff); 3178 if (Result.getNode()) 3179 return Result; 3180 3181 // Emit a library call. 3182 TargetLowering::ArgListTy Args; 3183 TargetLowering::ArgListEntry Entry; 3184 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3185 Entry.Node = Dst; Args.push_back(Entry); 3186 Entry.Node = Src; Args.push_back(Entry); 3187 Entry.Node = Size; Args.push_back(Entry); 3188 std::pair<SDValue,SDValue> CallResult = 3189 TLI.LowerCallTo(Chain, Type::VoidTy, 3190 false, false, false, false, CallingConv::C, false, 3191 getExternalSymbol("memmove", TLI.getPointerTy()), 3192 Args, *this); 3193 return CallResult.second; 3194} 3195 3196SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst, 3197 SDValue Src, SDValue Size, 3198 unsigned Align, 3199 const Value *DstSV, uint64_t DstSVOff) { 3200 3201 // Check to see if we should lower the memset to stores first. 3202 // For cases within the target-specified limits, this is the best choice. 3203 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3204 if (ConstantSize) { 3205 // Memset with size zero? Just return the original chain. 3206 if (ConstantSize->isNullValue()) 3207 return Chain; 3208 3209 SDValue Result = 3210 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(), 3211 Align, DstSV, DstSVOff); 3212 if (Result.getNode()) 3213 return Result; 3214 } 3215 3216 // Then check to see if we should lower the memset with target-specific 3217 // code. If the target chooses to do this, this is the next best. 3218 SDValue Result = 3219 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align, 3220 DstSV, DstSVOff); 3221 if (Result.getNode()) 3222 return Result; 3223 3224 // Emit a library call. 3225 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(); 3226 TargetLowering::ArgListTy Args; 3227 TargetLowering::ArgListEntry Entry; 3228 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3229 Args.push_back(Entry); 3230 // Extend or truncate the argument to be an i32 value for the call. 3231 if (Src.getValueType().bitsGT(MVT::i32)) 3232 Src = getNode(ISD::TRUNCATE, MVT::i32, Src); 3233 else 3234 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src); 3235 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true; 3236 Args.push_back(Entry); 3237 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false; 3238 Args.push_back(Entry); 3239 std::pair<SDValue,SDValue> CallResult = 3240 TLI.LowerCallTo(Chain, Type::VoidTy, 3241 false, false, false, false, CallingConv::C, false, 3242 getExternalSymbol("memset", TLI.getPointerTy()), 3243 Args, *this); 3244 return CallResult.second; 3245} 3246 3247SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT, 3248 SDValue Chain, 3249 SDValue Ptr, SDValue Cmp, 3250 SDValue Swp, const Value* PtrVal, 3251 unsigned Alignment) { 3252 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3253 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3254 3255 MVT VT = Cmp.getValueType(); 3256 3257 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3258 Alignment = getMVTAlignment(MemVT); 3259 3260 SDVTList VTs = getVTList(VT, MVT::Other); 3261 FoldingSetNodeID ID; 3262 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3263 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3264 void* IP = 0; 3265 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3266 return SDValue(E, 0); 3267 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3268 new (N) AtomicSDNode(Opcode, VTs, MemVT, 3269 Chain, Ptr, Cmp, Swp, PtrVal, Alignment); 3270 CSEMap.InsertNode(N, IP); 3271 AllNodes.push_back(N); 3272 return SDValue(N, 0); 3273} 3274 3275SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT, 3276 SDValue Chain, 3277 SDValue Ptr, SDValue Val, 3278 const Value* PtrVal, 3279 unsigned Alignment) { 3280 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3281 Opcode == ISD::ATOMIC_LOAD_SUB || 3282 Opcode == ISD::ATOMIC_LOAD_AND || 3283 Opcode == ISD::ATOMIC_LOAD_OR || 3284 Opcode == ISD::ATOMIC_LOAD_XOR || 3285 Opcode == ISD::ATOMIC_LOAD_NAND || 3286 Opcode == ISD::ATOMIC_LOAD_MIN || 3287 Opcode == ISD::ATOMIC_LOAD_MAX || 3288 Opcode == ISD::ATOMIC_LOAD_UMIN || 3289 Opcode == ISD::ATOMIC_LOAD_UMAX || 3290 Opcode == ISD::ATOMIC_SWAP) && 3291 "Invalid Atomic Op"); 3292 3293 MVT VT = Val.getValueType(); 3294 3295 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3296 Alignment = getMVTAlignment(MemVT); 3297 3298 SDVTList VTs = getVTList(VT, MVT::Other); 3299 FoldingSetNodeID ID; 3300 SDValue Ops[] = {Chain, Ptr, Val}; 3301 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3302 void* IP = 0; 3303 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3304 return SDValue(E, 0); 3305 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3306 new (N) AtomicSDNode(Opcode, VTs, MemVT, 3307 Chain, Ptr, Val, PtrVal, Alignment); 3308 CSEMap.InsertNode(N, IP); 3309 AllNodes.push_back(N); 3310 return SDValue(N, 0); 3311} 3312 3313/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3314/// Allowed to return something different (and simpler) if Simplify is true. 3315SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps) { 3316 if (NumOps == 1) 3317 return Ops[0]; 3318 3319 SmallVector<MVT, 4> VTs; 3320 VTs.reserve(NumOps); 3321 for (unsigned i = 0; i < NumOps; ++i) 3322 VTs.push_back(Ops[i].getValueType()); 3323 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps); 3324} 3325 3326SDValue 3327SelectionDAG::getMemIntrinsicNode(unsigned Opcode, 3328 const MVT *VTs, unsigned NumVTs, 3329 const SDValue *Ops, unsigned NumOps, 3330 MVT MemVT, const Value *srcValue, int SVOff, 3331 unsigned Align, bool Vol, 3332 bool ReadMem, bool WriteMem) { 3333 return getMemIntrinsicNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps, 3334 MemVT, srcValue, SVOff, Align, Vol, 3335 ReadMem, WriteMem); 3336} 3337 3338SDValue 3339SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDVTList VTList, 3340 const SDValue *Ops, unsigned NumOps, 3341 MVT MemVT, const Value *srcValue, int SVOff, 3342 unsigned Align, bool Vol, 3343 bool ReadMem, bool WriteMem) { 3344 // Memoize the node unless it returns a flag. 3345 MemIntrinsicSDNode *N; 3346 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3347 FoldingSetNodeID ID; 3348 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3349 void *IP = 0; 3350 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3351 return SDValue(E, 0); 3352 3353 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3354 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT, 3355 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3356 CSEMap.InsertNode(N, IP); 3357 } else { 3358 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3359 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT, 3360 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3361 } 3362 AllNodes.push_back(N); 3363 return SDValue(N, 0); 3364} 3365 3366SDValue 3367SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall, 3368 bool IsInreg, SDVTList VTs, 3369 const SDValue *Operands, unsigned NumOperands) { 3370 // Do not include isTailCall in the folding set profile. 3371 FoldingSetNodeID ID; 3372 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands); 3373 ID.AddInteger(CallingConv); 3374 ID.AddInteger(IsVarArgs); 3375 void *IP = 0; 3376 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3377 // Instead of including isTailCall in the folding set, we just 3378 // set the flag of the existing node. 3379 if (!IsTailCall) 3380 cast<CallSDNode>(E)->setNotTailCall(); 3381 return SDValue(E, 0); 3382 } 3383 SDNode *N = NodeAllocator.Allocate<CallSDNode>(); 3384 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg, 3385 VTs, Operands, NumOperands); 3386 CSEMap.InsertNode(N, IP); 3387 AllNodes.push_back(N); 3388 return SDValue(N, 0); 3389} 3390 3391SDValue 3392SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3393 MVT VT, SDValue Chain, 3394 SDValue Ptr, SDValue Offset, 3395 const Value *SV, int SVOffset, MVT EVT, 3396 bool isVolatile, unsigned Alignment) { 3397 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3398 Alignment = getMVTAlignment(VT); 3399 3400 if (VT == EVT) { 3401 ExtType = ISD::NON_EXTLOAD; 3402 } else if (ExtType == ISD::NON_EXTLOAD) { 3403 assert(VT == EVT && "Non-extending load from different memory type!"); 3404 } else { 3405 // Extending load. 3406 if (VT.isVector()) 3407 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() && 3408 "Invalid vector extload!"); 3409 else 3410 assert(EVT.bitsLT(VT) && 3411 "Should only be an extending load, not truncating!"); 3412 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3413 "Cannot sign/zero extend a FP/Vector load!"); 3414 assert(VT.isInteger() == EVT.isInteger() && 3415 "Cannot convert from FP to Int or Int -> FP!"); 3416 } 3417 3418 bool Indexed = AM != ISD::UNINDEXED; 3419 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3420 "Unindexed load with an offset!"); 3421 3422 SDVTList VTs = Indexed ? 3423 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3424 SDValue Ops[] = { Chain, Ptr, Offset }; 3425 FoldingSetNodeID ID; 3426 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3427 ID.AddInteger(AM); 3428 ID.AddInteger(ExtType); 3429 ID.AddInteger(EVT.getRawBits()); 3430 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3431 void *IP = 0; 3432 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3433 return SDValue(E, 0); 3434 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3435 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset, 3436 Alignment, isVolatile); 3437 CSEMap.InsertNode(N, IP); 3438 AllNodes.push_back(N); 3439 return SDValue(N, 0); 3440} 3441 3442SDValue SelectionDAG::getLoad(MVT VT, 3443 SDValue Chain, SDValue Ptr, 3444 const Value *SV, int SVOffset, 3445 bool isVolatile, unsigned Alignment) { 3446 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3447 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3448 SV, SVOffset, VT, isVolatile, Alignment); 3449} 3450 3451SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT, 3452 SDValue Chain, SDValue Ptr, 3453 const Value *SV, 3454 int SVOffset, MVT EVT, 3455 bool isVolatile, unsigned Alignment) { 3456 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3457 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef, 3458 SV, SVOffset, EVT, isVolatile, Alignment); 3459} 3460 3461SDValue 3462SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base, 3463 SDValue Offset, ISD::MemIndexedMode AM) { 3464 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3465 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3466 "Load is already a indexed load!"); 3467 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), 3468 LD->getChain(), Base, Offset, LD->getSrcValue(), 3469 LD->getSrcValueOffset(), LD->getMemoryVT(), 3470 LD->isVolatile(), LD->getAlignment()); 3471} 3472 3473SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val, 3474 SDValue Ptr, const Value *SV, int SVOffset, 3475 bool isVolatile, unsigned Alignment) { 3476 MVT VT = Val.getValueType(); 3477 3478 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3479 Alignment = getMVTAlignment(VT); 3480 3481 SDVTList VTs = getVTList(MVT::Other); 3482 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3483 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3484 FoldingSetNodeID ID; 3485 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3486 ID.AddInteger(ISD::UNINDEXED); 3487 ID.AddInteger(false); 3488 ID.AddInteger(VT.getRawBits()); 3489 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3490 void *IP = 0; 3491 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3492 return SDValue(E, 0); 3493 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3494 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false, 3495 VT, SV, SVOffset, Alignment, isVolatile); 3496 CSEMap.InsertNode(N, IP); 3497 AllNodes.push_back(N); 3498 return SDValue(N, 0); 3499} 3500 3501SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val, 3502 SDValue Ptr, const Value *SV, 3503 int SVOffset, MVT SVT, 3504 bool isVolatile, unsigned Alignment) { 3505 MVT VT = Val.getValueType(); 3506 3507 if (VT == SVT) 3508 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3509 3510 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3511 assert(VT.isInteger() == SVT.isInteger() && 3512 "Can't do FP-INT conversion!"); 3513 3514 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3515 Alignment = getMVTAlignment(VT); 3516 3517 SDVTList VTs = getVTList(MVT::Other); 3518 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3519 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3520 FoldingSetNodeID ID; 3521 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3522 ID.AddInteger(ISD::UNINDEXED); 3523 ID.AddInteger(1); 3524 ID.AddInteger(SVT.getRawBits()); 3525 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3526 void *IP = 0; 3527 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3528 return SDValue(E, 0); 3529 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3530 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true, 3531 SVT, SV, SVOffset, Alignment, isVolatile); 3532 CSEMap.InsertNode(N, IP); 3533 AllNodes.push_back(N); 3534 return SDValue(N, 0); 3535} 3536 3537SDValue 3538SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base, 3539 SDValue Offset, ISD::MemIndexedMode AM) { 3540 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3541 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3542 "Store is already a indexed store!"); 3543 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 3544 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3545 FoldingSetNodeID ID; 3546 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3547 ID.AddInteger(AM); 3548 ID.AddInteger(ST->isTruncatingStore()); 3549 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3550 ID.AddInteger(ST->getRawFlags()); 3551 void *IP = 0; 3552 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3553 return SDValue(E, 0); 3554 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3555 new (N) StoreSDNode(Ops, VTs, AM, 3556 ST->isTruncatingStore(), ST->getMemoryVT(), 3557 ST->getSrcValue(), ST->getSrcValueOffset(), 3558 ST->getAlignment(), ST->isVolatile()); 3559 CSEMap.InsertNode(N, IP); 3560 AllNodes.push_back(N); 3561 return SDValue(N, 0); 3562} 3563 3564SDValue SelectionDAG::getVAArg(MVT VT, 3565 SDValue Chain, SDValue Ptr, 3566 SDValue SV) { 3567 SDValue Ops[] = { Chain, Ptr, SV }; 3568 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3); 3569} 3570 3571SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 3572 const SDUse *Ops, unsigned NumOps) { 3573 switch (NumOps) { 3574 case 0: return getNode(Opcode, VT); 3575 case 1: return getNode(Opcode, VT, Ops[0]); 3576 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 3577 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 3578 default: break; 3579 } 3580 3581 // Copy from an SDUse array into an SDValue array for use with 3582 // the regular getNode logic. 3583 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 3584 return getNode(Opcode, VT, &NewOps[0], NumOps); 3585} 3586 3587SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 3588 const SDValue *Ops, unsigned NumOps) { 3589 switch (NumOps) { 3590 case 0: return getNode(Opcode, VT); 3591 case 1: return getNode(Opcode, VT, Ops[0]); 3592 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 3593 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 3594 default: break; 3595 } 3596 3597 switch (Opcode) { 3598 default: break; 3599 case ISD::SELECT_CC: { 3600 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 3601 assert(Ops[0].getValueType() == Ops[1].getValueType() && 3602 "LHS and RHS of condition must have same type!"); 3603 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3604 "True and False arms of SelectCC must have same type!"); 3605 assert(Ops[2].getValueType() == VT && 3606 "select_cc node must be of same type as true and false value!"); 3607 break; 3608 } 3609 case ISD::BR_CC: { 3610 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 3611 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3612 "LHS/RHS of comparison should match types!"); 3613 break; 3614 } 3615 } 3616 3617 // Memoize nodes. 3618 SDNode *N; 3619 SDVTList VTs = getVTList(VT); 3620 if (VT != MVT::Flag) { 3621 FoldingSetNodeID ID; 3622 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 3623 void *IP = 0; 3624 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3625 return SDValue(E, 0); 3626 N = NodeAllocator.Allocate<SDNode>(); 3627 new (N) SDNode(Opcode, VTs, Ops, NumOps); 3628 CSEMap.InsertNode(N, IP); 3629 } else { 3630 N = NodeAllocator.Allocate<SDNode>(); 3631 new (N) SDNode(Opcode, VTs, Ops, NumOps); 3632 } 3633 AllNodes.push_back(N); 3634#ifndef NDEBUG 3635 VerifyNode(N); 3636#endif 3637 return SDValue(N, 0); 3638} 3639 3640SDValue SelectionDAG::getNode(unsigned Opcode, 3641 const std::vector<MVT> &ResultTys, 3642 const SDValue *Ops, unsigned NumOps) { 3643 return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(), 3644 Ops, NumOps); 3645} 3646 3647SDValue SelectionDAG::getNode(unsigned Opcode, 3648 const MVT *VTs, unsigned NumVTs, 3649 const SDValue *Ops, unsigned NumOps) { 3650 if (NumVTs == 1) 3651 return getNode(Opcode, VTs[0], Ops, NumOps); 3652 return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps); 3653} 3654 3655SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3656 const SDValue *Ops, unsigned NumOps) { 3657 if (VTList.NumVTs == 1) 3658 return getNode(Opcode, VTList.VTs[0], Ops, NumOps); 3659 3660 switch (Opcode) { 3661 // FIXME: figure out how to safely handle things like 3662 // int foo(int x) { return 1 << (x & 255); } 3663 // int bar() { return foo(256); } 3664#if 0 3665 case ISD::SRA_PARTS: 3666 case ISD::SRL_PARTS: 3667 case ISD::SHL_PARTS: 3668 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 3669 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 3670 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3671 else if (N3.getOpcode() == ISD::AND) 3672 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 3673 // If the and is only masking out bits that cannot effect the shift, 3674 // eliminate the and. 3675 unsigned NumBits = VT.getSizeInBits()*2; 3676 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 3677 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3678 } 3679 break; 3680#endif 3681 } 3682 3683 // Memoize the node unless it returns a flag. 3684 SDNode *N; 3685 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3686 FoldingSetNodeID ID; 3687 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3688 void *IP = 0; 3689 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3690 return SDValue(E, 0); 3691 if (NumOps == 1) { 3692 N = NodeAllocator.Allocate<UnarySDNode>(); 3693 new (N) UnarySDNode(Opcode, VTList, Ops[0]); 3694 } else if (NumOps == 2) { 3695 N = NodeAllocator.Allocate<BinarySDNode>(); 3696 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3697 } else if (NumOps == 3) { 3698 N = NodeAllocator.Allocate<TernarySDNode>(); 3699 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3700 } else { 3701 N = NodeAllocator.Allocate<SDNode>(); 3702 new (N) SDNode(Opcode, VTList, Ops, NumOps); 3703 } 3704 CSEMap.InsertNode(N, IP); 3705 } else { 3706 if (NumOps == 1) { 3707 N = NodeAllocator.Allocate<UnarySDNode>(); 3708 new (N) UnarySDNode(Opcode, VTList, Ops[0]); 3709 } else if (NumOps == 2) { 3710 N = NodeAllocator.Allocate<BinarySDNode>(); 3711 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3712 } else if (NumOps == 3) { 3713 N = NodeAllocator.Allocate<TernarySDNode>(); 3714 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3715 } else { 3716 N = NodeAllocator.Allocate<SDNode>(); 3717 new (N) SDNode(Opcode, VTList, Ops, NumOps); 3718 } 3719 } 3720 AllNodes.push_back(N); 3721#ifndef NDEBUG 3722 VerifyNode(N); 3723#endif 3724 return SDValue(N, 0); 3725} 3726 3727SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) { 3728 return getNode(Opcode, VTList, 0, 0); 3729} 3730 3731SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3732 SDValue N1) { 3733 SDValue Ops[] = { N1 }; 3734 return getNode(Opcode, VTList, Ops, 1); 3735} 3736 3737SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3738 SDValue N1, SDValue N2) { 3739 SDValue Ops[] = { N1, N2 }; 3740 return getNode(Opcode, VTList, Ops, 2); 3741} 3742 3743SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3744 SDValue N1, SDValue N2, SDValue N3) { 3745 SDValue Ops[] = { N1, N2, N3 }; 3746 return getNode(Opcode, VTList, Ops, 3); 3747} 3748 3749SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3750 SDValue N1, SDValue N2, SDValue N3, 3751 SDValue N4) { 3752 SDValue Ops[] = { N1, N2, N3, N4 }; 3753 return getNode(Opcode, VTList, Ops, 4); 3754} 3755 3756SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3757 SDValue N1, SDValue N2, SDValue N3, 3758 SDValue N4, SDValue N5) { 3759 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3760 return getNode(Opcode, VTList, Ops, 5); 3761} 3762 3763SDVTList SelectionDAG::getVTList(MVT VT) { 3764 return makeVTList(SDNode::getValueTypeList(VT), 1); 3765} 3766 3767SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) { 3768 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3769 E = VTList.rend(); I != E; ++I) 3770 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 3771 return *I; 3772 3773 MVT *Array = Allocator.Allocate<MVT>(2); 3774 Array[0] = VT1; 3775 Array[1] = VT2; 3776 SDVTList Result = makeVTList(Array, 2); 3777 VTList.push_back(Result); 3778 return Result; 3779} 3780 3781SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) { 3782 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3783 E = VTList.rend(); I != E; ++I) 3784 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 3785 I->VTs[2] == VT3) 3786 return *I; 3787 3788 MVT *Array = Allocator.Allocate<MVT>(3); 3789 Array[0] = VT1; 3790 Array[1] = VT2; 3791 Array[2] = VT3; 3792 SDVTList Result = makeVTList(Array, 3); 3793 VTList.push_back(Result); 3794 return Result; 3795} 3796 3797SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) { 3798 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3799 E = VTList.rend(); I != E; ++I) 3800 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 3801 I->VTs[2] == VT3 && I->VTs[3] == VT4) 3802 return *I; 3803 3804 MVT *Array = Allocator.Allocate<MVT>(3); 3805 Array[0] = VT1; 3806 Array[1] = VT2; 3807 Array[2] = VT3; 3808 Array[3] = VT4; 3809 SDVTList Result = makeVTList(Array, 4); 3810 VTList.push_back(Result); 3811 return Result; 3812} 3813 3814SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) { 3815 switch (NumVTs) { 3816 case 0: assert(0 && "Cannot have nodes without results!"); 3817 case 1: return getVTList(VTs[0]); 3818 case 2: return getVTList(VTs[0], VTs[1]); 3819 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 3820 default: break; 3821 } 3822 3823 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3824 E = VTList.rend(); I != E; ++I) { 3825 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 3826 continue; 3827 3828 bool NoMatch = false; 3829 for (unsigned i = 2; i != NumVTs; ++i) 3830 if (VTs[i] != I->VTs[i]) { 3831 NoMatch = true; 3832 break; 3833 } 3834 if (!NoMatch) 3835 return *I; 3836 } 3837 3838 MVT *Array = Allocator.Allocate<MVT>(NumVTs); 3839 std::copy(VTs, VTs+NumVTs, Array); 3840 SDVTList Result = makeVTList(Array, NumVTs); 3841 VTList.push_back(Result); 3842 return Result; 3843} 3844 3845 3846/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 3847/// specified operands. If the resultant node already exists in the DAG, 3848/// this does not modify the specified node, instead it returns the node that 3849/// already exists. If the resultant node does not exist in the DAG, the 3850/// input node is returned. As a degenerate case, if you specify the same 3851/// input operands as the node already has, the input node is returned. 3852SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 3853 SDNode *N = InN.getNode(); 3854 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 3855 3856 // Check to see if there is no change. 3857 if (Op == N->getOperand(0)) return InN; 3858 3859 // See if the modified node already exists. 3860 void *InsertPos = 0; 3861 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 3862 return SDValue(Existing, InN.getResNo()); 3863 3864 // Nope it doesn't. Remove the node from its current place in the maps. 3865 if (InsertPos) 3866 if (!RemoveNodeFromCSEMaps(N)) 3867 InsertPos = 0; 3868 3869 // Now we update the operands. 3870 N->OperandList[0].getVal()->removeUser(0, N); 3871 N->OperandList[0] = Op; 3872 N->OperandList[0].setUser(N); 3873 Op.getNode()->addUser(0, N); 3874 3875 // If this gets put into a CSE map, add it. 3876 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3877 return InN; 3878} 3879 3880SDValue SelectionDAG:: 3881UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 3882 SDNode *N = InN.getNode(); 3883 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 3884 3885 // Check to see if there is no change. 3886 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 3887 return InN; // No operands changed, just return the input node. 3888 3889 // See if the modified node already exists. 3890 void *InsertPos = 0; 3891 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 3892 return SDValue(Existing, InN.getResNo()); 3893 3894 // Nope it doesn't. Remove the node from its current place in the maps. 3895 if (InsertPos) 3896 if (!RemoveNodeFromCSEMaps(N)) 3897 InsertPos = 0; 3898 3899 // Now we update the operands. 3900 if (N->OperandList[0] != Op1) { 3901 N->OperandList[0].getVal()->removeUser(0, N); 3902 N->OperandList[0] = Op1; 3903 N->OperandList[0].setUser(N); 3904 Op1.getNode()->addUser(0, N); 3905 } 3906 if (N->OperandList[1] != Op2) { 3907 N->OperandList[1].getVal()->removeUser(1, N); 3908 N->OperandList[1] = Op2; 3909 N->OperandList[1].setUser(N); 3910 Op2.getNode()->addUser(1, N); 3911 } 3912 3913 // If this gets put into a CSE map, add it. 3914 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3915 return InN; 3916} 3917 3918SDValue SelectionDAG:: 3919UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 3920 SDValue Ops[] = { Op1, Op2, Op3 }; 3921 return UpdateNodeOperands(N, Ops, 3); 3922} 3923 3924SDValue SelectionDAG:: 3925UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 3926 SDValue Op3, SDValue Op4) { 3927 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 3928 return UpdateNodeOperands(N, Ops, 4); 3929} 3930 3931SDValue SelectionDAG:: 3932UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 3933 SDValue Op3, SDValue Op4, SDValue Op5) { 3934 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 3935 return UpdateNodeOperands(N, Ops, 5); 3936} 3937 3938SDValue SelectionDAG:: 3939UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 3940 SDNode *N = InN.getNode(); 3941 assert(N->getNumOperands() == NumOps && 3942 "Update with wrong number of operands"); 3943 3944 // Check to see if there is no change. 3945 bool AnyChange = false; 3946 for (unsigned i = 0; i != NumOps; ++i) { 3947 if (Ops[i] != N->getOperand(i)) { 3948 AnyChange = true; 3949 break; 3950 } 3951 } 3952 3953 // No operands changed, just return the input node. 3954 if (!AnyChange) return InN; 3955 3956 // See if the modified node already exists. 3957 void *InsertPos = 0; 3958 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 3959 return SDValue(Existing, InN.getResNo()); 3960 3961 // Nope it doesn't. Remove the node from its current place in the maps. 3962 if (InsertPos) 3963 if (!RemoveNodeFromCSEMaps(N)) 3964 InsertPos = 0; 3965 3966 // Now we update the operands. 3967 for (unsigned i = 0; i != NumOps; ++i) { 3968 if (N->OperandList[i] != Ops[i]) { 3969 N->OperandList[i].getVal()->removeUser(i, N); 3970 N->OperandList[i] = Ops[i]; 3971 N->OperandList[i].setUser(N); 3972 Ops[i].getNode()->addUser(i, N); 3973 } 3974 } 3975 3976 // If this gets put into a CSE map, add it. 3977 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3978 return InN; 3979} 3980 3981/// DropOperands - Release the operands and set this node to have 3982/// zero operands. 3983void SDNode::DropOperands() { 3984 // Unlike the code in MorphNodeTo that does this, we don't need to 3985 // watch for dead nodes here. 3986 for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) 3987 I->getVal()->removeUser(std::distance(op_begin(), I), this); 3988 3989 NumOperands = 0; 3990} 3991 3992/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 3993/// machine opcode. 3994/// 3995SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3996 MVT VT) { 3997 SDVTList VTs = getVTList(VT); 3998 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 3999} 4000 4001SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4002 MVT VT, SDValue Op1) { 4003 SDVTList VTs = getVTList(VT); 4004 SDValue Ops[] = { Op1 }; 4005 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4006} 4007 4008SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4009 MVT VT, SDValue Op1, 4010 SDValue Op2) { 4011 SDVTList VTs = getVTList(VT); 4012 SDValue Ops[] = { Op1, Op2 }; 4013 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4014} 4015 4016SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4017 MVT VT, SDValue Op1, 4018 SDValue Op2, SDValue Op3) { 4019 SDVTList VTs = getVTList(VT); 4020 SDValue Ops[] = { Op1, Op2, Op3 }; 4021 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4022} 4023 4024SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4025 MVT VT, const SDValue *Ops, 4026 unsigned NumOps) { 4027 SDVTList VTs = getVTList(VT); 4028 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4029} 4030 4031SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4032 MVT VT1, MVT VT2, const SDValue *Ops, 4033 unsigned NumOps) { 4034 SDVTList VTs = getVTList(VT1, VT2); 4035 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4036} 4037 4038SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4039 MVT VT1, MVT VT2) { 4040 SDVTList VTs = getVTList(VT1, VT2); 4041 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4042} 4043 4044SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4045 MVT VT1, MVT VT2, MVT VT3, 4046 const SDValue *Ops, unsigned NumOps) { 4047 SDVTList VTs = getVTList(VT1, VT2, VT3); 4048 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4049} 4050 4051SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4052 MVT VT1, MVT VT2, MVT VT3, MVT VT4, 4053 const SDValue *Ops, unsigned NumOps) { 4054 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4055 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4056} 4057 4058SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4059 MVT VT1, MVT VT2, 4060 SDValue Op1) { 4061 SDVTList VTs = getVTList(VT1, VT2); 4062 SDValue Ops[] = { Op1 }; 4063 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4064} 4065 4066SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4067 MVT VT1, MVT VT2, 4068 SDValue Op1, SDValue Op2) { 4069 SDVTList VTs = getVTList(VT1, VT2); 4070 SDValue Ops[] = { Op1, Op2 }; 4071 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4072} 4073 4074SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4075 MVT VT1, MVT VT2, 4076 SDValue Op1, SDValue Op2, 4077 SDValue Op3) { 4078 SDVTList VTs = getVTList(VT1, VT2); 4079 SDValue Ops[] = { Op1, Op2, Op3 }; 4080 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4081} 4082 4083SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4084 MVT VT1, MVT VT2, MVT VT3, 4085 SDValue Op1, SDValue Op2, 4086 SDValue Op3) { 4087 SDVTList VTs = getVTList(VT1, VT2, VT3); 4088 SDValue Ops[] = { Op1, Op2, Op3 }; 4089 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4090} 4091 4092SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4093 SDVTList VTs, const SDValue *Ops, 4094 unsigned NumOps) { 4095 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4096} 4097 4098SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4099 MVT VT) { 4100 SDVTList VTs = getVTList(VT); 4101 return MorphNodeTo(N, Opc, VTs, 0, 0); 4102} 4103 4104SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4105 MVT VT, SDValue Op1) { 4106 SDVTList VTs = getVTList(VT); 4107 SDValue Ops[] = { Op1 }; 4108 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4109} 4110 4111SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4112 MVT VT, SDValue Op1, 4113 SDValue Op2) { 4114 SDVTList VTs = getVTList(VT); 4115 SDValue Ops[] = { Op1, Op2 }; 4116 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4117} 4118 4119SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4120 MVT VT, SDValue Op1, 4121 SDValue Op2, SDValue Op3) { 4122 SDVTList VTs = getVTList(VT); 4123 SDValue Ops[] = { Op1, Op2, Op3 }; 4124 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4125} 4126 4127SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4128 MVT VT, const SDValue *Ops, 4129 unsigned NumOps) { 4130 SDVTList VTs = getVTList(VT); 4131 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4132} 4133 4134SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4135 MVT VT1, MVT VT2, const SDValue *Ops, 4136 unsigned NumOps) { 4137 SDVTList VTs = getVTList(VT1, VT2); 4138 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4139} 4140 4141SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4142 MVT VT1, MVT VT2) { 4143 SDVTList VTs = getVTList(VT1, VT2); 4144 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0); 4145} 4146 4147SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4148 MVT VT1, MVT VT2, MVT VT3, 4149 const SDValue *Ops, unsigned NumOps) { 4150 SDVTList VTs = getVTList(VT1, VT2, VT3); 4151 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4152} 4153 4154SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4155 MVT VT1, MVT VT2, 4156 SDValue Op1) { 4157 SDVTList VTs = getVTList(VT1, VT2); 4158 SDValue Ops[] = { Op1 }; 4159 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4160} 4161 4162SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4163 MVT VT1, MVT VT2, 4164 SDValue Op1, SDValue Op2) { 4165 SDVTList VTs = getVTList(VT1, VT2); 4166 SDValue Ops[] = { Op1, Op2 }; 4167 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4168} 4169 4170SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4171 MVT VT1, MVT VT2, 4172 SDValue Op1, SDValue Op2, 4173 SDValue Op3) { 4174 SDVTList VTs = getVTList(VT1, VT2); 4175 SDValue Ops[] = { Op1, Op2, Op3 }; 4176 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4177} 4178 4179/// MorphNodeTo - These *mutate* the specified node to have the specified 4180/// return type, opcode, and operands. 4181/// 4182/// Note that MorphNodeTo returns the resultant node. If there is already a 4183/// node of the specified opcode and operands, it returns that node instead of 4184/// the current one. 4185/// 4186/// Using MorphNodeTo is faster than creating a new node and swapping it in 4187/// with ReplaceAllUsesWith both because it often avoids allocating a new 4188/// node, and because it doesn't require CSE recalculation for any of 4189/// the node's users. 4190/// 4191SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4192 SDVTList VTs, const SDValue *Ops, 4193 unsigned NumOps) { 4194 // If an identical node already exists, use it. 4195 void *IP = 0; 4196 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4197 FoldingSetNodeID ID; 4198 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4199 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4200 return ON; 4201 } 4202 4203 if (!RemoveNodeFromCSEMaps(N)) 4204 IP = 0; 4205 4206 // Start the morphing. 4207 N->NodeType = Opc; 4208 N->ValueList = VTs.VTs; 4209 N->NumValues = VTs.NumVTs; 4210 4211 // Clear the operands list, updating used nodes to remove this from their 4212 // use list. Keep track of any operands that become dead as a result. 4213 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4214 for (SDNode::op_iterator B = N->op_begin(), I = B, E = N->op_end(); 4215 I != E; ++I) { 4216 SDNode *Used = I->getVal(); 4217 Used->removeUser(std::distance(B, I), N); 4218 if (Used->use_empty()) 4219 DeadNodeSet.insert(Used); 4220 } 4221 4222 // If NumOps is larger than the # of operands we currently have, reallocate 4223 // the operand list. 4224 if (NumOps > N->NumOperands) { 4225 if (N->OperandsNeedDelete) 4226 delete[] N->OperandList; 4227 4228 if (N->isMachineOpcode()) { 4229 // We're creating a final node that will live unmorphed for the 4230 // remainder of the current SelectionDAG iteration, so we can allocate 4231 // the operands directly out of a pool with no recycling metadata. 4232 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps); 4233 N->OperandsNeedDelete = false; 4234 } else { 4235 N->OperandList = new SDUse[NumOps]; 4236 N->OperandsNeedDelete = true; 4237 } 4238 } 4239 4240 // Assign the new operands. 4241 N->NumOperands = NumOps; 4242 for (unsigned i = 0, e = NumOps; i != e; ++i) { 4243 N->OperandList[i] = Ops[i]; 4244 N->OperandList[i].setUser(N); 4245 SDNode *ToUse = N->OperandList[i].getVal(); 4246 ToUse->addUser(i, N); 4247 } 4248 4249 // Delete any nodes that are still dead after adding the uses for the 4250 // new operands. 4251 SmallVector<SDNode *, 16> DeadNodes; 4252 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4253 E = DeadNodeSet.end(); I != E; ++I) 4254 if ((*I)->use_empty()) 4255 DeadNodes.push_back(*I); 4256 RemoveDeadNodes(DeadNodes); 4257 4258 if (IP) 4259 CSEMap.InsertNode(N, IP); // Memoize the new node. 4260 return N; 4261} 4262 4263 4264/// getTargetNode - These are used for target selectors to create a new node 4265/// with specified return type(s), target opcode, and operands. 4266/// 4267/// Note that getTargetNode returns the resultant node. If there is already a 4268/// node of the specified opcode and operands, it returns that node instead of 4269/// the current one. 4270SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) { 4271 return getNode(~Opcode, VT).getNode(); 4272} 4273SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) { 4274 return getNode(~Opcode, VT, Op1).getNode(); 4275} 4276SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4277 SDValue Op1, SDValue Op2) { 4278 return getNode(~Opcode, VT, Op1, Op2).getNode(); 4279} 4280SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4281 SDValue Op1, SDValue Op2, 4282 SDValue Op3) { 4283 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode(); 4284} 4285SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4286 const SDValue *Ops, unsigned NumOps) { 4287 return getNode(~Opcode, VT, Ops, NumOps).getNode(); 4288} 4289SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) { 4290 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4291 SDValue Op; 4292 return getNode(~Opcode, VTs, 2, &Op, 0).getNode(); 4293} 4294SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4295 MVT VT2, SDValue Op1) { 4296 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4297 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode(); 4298} 4299SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4300 MVT VT2, SDValue Op1, 4301 SDValue Op2) { 4302 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4303 SDValue Ops[] = { Op1, Op2 }; 4304 return getNode(~Opcode, VTs, 2, Ops, 2).getNode(); 4305} 4306SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4307 MVT VT2, SDValue Op1, 4308 SDValue Op2, SDValue Op3) { 4309 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4310 SDValue Ops[] = { Op1, Op2, Op3 }; 4311 return getNode(~Opcode, VTs, 2, Ops, 3).getNode(); 4312} 4313SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, 4314 const SDValue *Ops, unsigned NumOps) { 4315 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4316 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode(); 4317} 4318SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4319 SDValue Op1, SDValue Op2) { 4320 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4321 SDValue Ops[] = { Op1, Op2 }; 4322 return getNode(~Opcode, VTs, 3, Ops, 2).getNode(); 4323} 4324SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4325 SDValue Op1, SDValue Op2, 4326 SDValue Op3) { 4327 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4328 SDValue Ops[] = { Op1, Op2, Op3 }; 4329 return getNode(~Opcode, VTs, 3, Ops, 3).getNode(); 4330} 4331SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4332 const SDValue *Ops, unsigned NumOps) { 4333 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4334 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode(); 4335} 4336SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4337 MVT VT2, MVT VT3, MVT VT4, 4338 const SDValue *Ops, unsigned NumOps) { 4339 std::vector<MVT> VTList; 4340 VTList.push_back(VT1); 4341 VTList.push_back(VT2); 4342 VTList.push_back(VT3); 4343 VTList.push_back(VT4); 4344 const MVT *VTs = getNodeValueTypes(VTList); 4345 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode(); 4346} 4347SDNode *SelectionDAG::getTargetNode(unsigned Opcode, 4348 const std::vector<MVT> &ResultTys, 4349 const SDValue *Ops, unsigned NumOps) { 4350 const MVT *VTs = getNodeValueTypes(ResultTys); 4351 return getNode(~Opcode, VTs, ResultTys.size(), 4352 Ops, NumOps).getNode(); 4353} 4354 4355/// getNodeIfExists - Get the specified node if it's already available, or 4356/// else return NULL. 4357SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4358 const SDValue *Ops, unsigned NumOps) { 4359 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4360 FoldingSetNodeID ID; 4361 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4362 void *IP = 0; 4363 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4364 return E; 4365 } 4366 return NULL; 4367} 4368 4369 4370/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4371/// This can cause recursive merging of nodes in the DAG. 4372/// 4373/// This version assumes From has a single result value. 4374/// 4375void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4376 DAGUpdateListener *UpdateListener) { 4377 SDNode *From = FromN.getNode(); 4378 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4379 "Cannot replace with this method!"); 4380 assert(From != To.getNode() && "Cannot replace uses of with self"); 4381 4382 // Iterate over all the existing uses of From. This specifically avoids 4383 // visiting any new uses of From that arrise while the replacement is 4384 // happening, because any such uses would be the result of CSE: If an 4385 // existing node looks like From after one of its operands is replaced 4386 // by To, we don't want to replace of all its users with To too. 4387 // See PR3018 for more info. 4388 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4389 while (UI != UE) { 4390 SDNode *U = *UI; 4391 do ++UI; while (UI != UE && *UI == U); 4392 4393 // This node is about to morph, remove its old self from the CSE maps. 4394 RemoveNodeFromCSEMaps(U); 4395 int operandNum = 0; 4396 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4397 I != E; ++I, ++operandNum) 4398 if (I->getVal() == From) { 4399 From->removeUser(operandNum, U); 4400 *I = To; 4401 I->setUser(U); 4402 To.getNode()->addUser(operandNum, U); 4403 } 4404 4405 // Now that we have modified U, add it back to the CSE maps. If it already 4406 // exists there, recursively merge the results together. 4407 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4408 ReplaceAllUsesWith(U, Existing, UpdateListener); 4409 // U is now dead. Inform the listener if it exists and delete it. 4410 if (UpdateListener) 4411 UpdateListener->NodeDeleted(U, Existing); 4412 DeleteNodeNotInCSEMaps(U); 4413 } else { 4414 // If the node doesn't already exist, we updated it. Inform a listener if 4415 // it exists. 4416 if (UpdateListener) 4417 UpdateListener->NodeUpdated(U); 4418 } 4419 } 4420} 4421 4422/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4423/// This can cause recursive merging of nodes in the DAG. 4424/// 4425/// This version assumes From/To have matching types and numbers of result 4426/// values. 4427/// 4428void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 4429 DAGUpdateListener *UpdateListener) { 4430 assert(From->getVTList().VTs == To->getVTList().VTs && 4431 From->getNumValues() == To->getNumValues() && 4432 "Cannot use this version of ReplaceAllUsesWith!"); 4433 4434 // Handle the trivial case. 4435 if (From == To) 4436 return; 4437 4438 // Iterate over just the existing users of From. See the comments in 4439 // the ReplaceAllUsesWith above. 4440 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4441 while (UI != UE) { 4442 SDNode *U = *UI; 4443 do ++UI; while (UI != UE && *UI == U); 4444 4445 // This node is about to morph, remove its old self from the CSE maps. 4446 RemoveNodeFromCSEMaps(U); 4447 int operandNum = 0; 4448 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4449 I != E; ++I, ++operandNum) 4450 if (I->getVal() == From) { 4451 From->removeUser(operandNum, U); 4452 I->getSDValue().setNode(To); 4453 To->addUser(operandNum, U); 4454 } 4455 4456 // Now that we have modified U, add it back to the CSE maps. If it already 4457 // exists there, recursively merge the results together. 4458 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4459 ReplaceAllUsesWith(U, Existing, UpdateListener); 4460 // U is now dead. Inform the listener if it exists and delete it. 4461 if (UpdateListener) 4462 UpdateListener->NodeDeleted(U, Existing); 4463 DeleteNodeNotInCSEMaps(U); 4464 } else { 4465 // If the node doesn't already exist, we updated it. Inform a listener if 4466 // it exists. 4467 if (UpdateListener) 4468 UpdateListener->NodeUpdated(U); 4469 } 4470 } 4471} 4472 4473/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4474/// This can cause recursive merging of nodes in the DAG. 4475/// 4476/// This version can replace From with any result values. To must match the 4477/// number and types of values returned by From. 4478void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 4479 const SDValue *To, 4480 DAGUpdateListener *UpdateListener) { 4481 if (From->getNumValues() == 1) // Handle the simple case efficiently. 4482 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 4483 4484 // Iterate over just the existing users of From. See the comments in 4485 // the ReplaceAllUsesWith above. 4486 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4487 while (UI != UE) { 4488 SDNode *U = *UI; 4489 do ++UI; while (UI != UE && *UI == U); 4490 4491 // This node is about to morph, remove its old self from the CSE maps. 4492 RemoveNodeFromCSEMaps(U); 4493 int operandNum = 0; 4494 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4495 I != E; ++I, ++operandNum) 4496 if (I->getVal() == From) { 4497 const SDValue &ToOp = To[I->getSDValue().getResNo()]; 4498 From->removeUser(operandNum, U); 4499 *I = ToOp; 4500 I->setUser(U); 4501 ToOp.getNode()->addUser(operandNum, U); 4502 } 4503 4504 // Now that we have modified U, add it back to the CSE maps. If it already 4505 // exists there, recursively merge the results together. 4506 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4507 ReplaceAllUsesWith(U, Existing, UpdateListener); 4508 // U is now dead. Inform the listener if it exists and delete it. 4509 if (UpdateListener) 4510 UpdateListener->NodeDeleted(U, Existing); 4511 DeleteNodeNotInCSEMaps(U); 4512 } else { 4513 // If the node doesn't already exist, we updated it. Inform a listener if 4514 // it exists. 4515 if (UpdateListener) 4516 UpdateListener->NodeUpdated(U); 4517 } 4518 } 4519} 4520 4521/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 4522/// uses of other values produced by From.getVal() alone. The Deleted vector is 4523/// handled the same way as for ReplaceAllUsesWith. 4524void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 4525 DAGUpdateListener *UpdateListener){ 4526 // Handle the really simple, really trivial case efficiently. 4527 if (From == To) return; 4528 4529 // Handle the simple, trivial, case efficiently. 4530 if (From.getNode()->getNumValues() == 1) { 4531 ReplaceAllUsesWith(From, To, UpdateListener); 4532 return; 4533 } 4534 4535 // Get all of the users of From.getNode(). We want these in a nice, 4536 // deterministically ordered and uniqued set, so we use a SmallSetVector. 4537 SmallSetVector<SDNode*, 16> Users(From.getNode()->use_begin(), From.getNode()->use_end()); 4538 4539 while (!Users.empty()) { 4540 // We know that this user uses some value of From. If it is the right 4541 // value, update it. 4542 SDNode *User = Users.back(); 4543 Users.pop_back(); 4544 4545 // Scan for an operand that matches From. 4546 SDNode::op_iterator Op = User->op_begin(), E = User->op_end(); 4547 for (; Op != E; ++Op) 4548 if (*Op == From) break; 4549 4550 // If there are no matches, the user must use some other result of From. 4551 if (Op == E) continue; 4552 4553 // Okay, we know this user needs to be updated. Remove its old self 4554 // from the CSE maps. 4555 RemoveNodeFromCSEMaps(User); 4556 4557 // Update all operands that match "From" in case there are multiple uses. 4558 for (; Op != E; ++Op) { 4559 if (*Op == From) { 4560 From.getNode()->removeUser(Op-User->op_begin(), User); 4561 *Op = To; 4562 Op->setUser(User); 4563 To.getNode()->addUser(Op-User->op_begin(), User); 4564 } 4565 } 4566 4567 // Now that we have modified User, add it back to the CSE maps. If it 4568 // already exists there, recursively merge the results together. 4569 SDNode *Existing = AddNonLeafNodeToCSEMaps(User); 4570 if (!Existing) { 4571 if (UpdateListener) UpdateListener->NodeUpdated(User); 4572 continue; // Continue on to next user. 4573 } 4574 4575 // If there was already an existing matching node, use ReplaceAllUsesWith 4576 // to replace the dead one with the existing one. This can cause 4577 // recursive merging of other unrelated nodes down the line. 4578 ReplaceAllUsesWith(User, Existing, UpdateListener); 4579 4580 // User is now dead. Notify a listener if present. 4581 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing); 4582 DeleteNodeNotInCSEMaps(User); 4583 } 4584} 4585 4586/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 4587/// uses of other values produced by From.getVal() alone. The same value may 4588/// appear in both the From and To list. The Deleted vector is 4589/// handled the same way as for ReplaceAllUsesWith. 4590void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 4591 const SDValue *To, 4592 unsigned Num, 4593 DAGUpdateListener *UpdateListener){ 4594 // Handle the simple, trivial case efficiently. 4595 if (Num == 1) 4596 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 4597 4598 SmallVector<std::pair<SDNode *, unsigned>, 16> Users; 4599 for (unsigned i = 0; i != Num; ++i) 4600 for (SDNode::use_iterator UI = From[i].getNode()->use_begin(), 4601 E = From[i].getNode()->use_end(); UI != E; ++UI) 4602 Users.push_back(std::make_pair(*UI, i)); 4603 4604 while (!Users.empty()) { 4605 // We know that this user uses some value of From. If it is the right 4606 // value, update it. 4607 SDNode *User = Users.back().first; 4608 unsigned i = Users.back().second; 4609 Users.pop_back(); 4610 4611 // Scan for an operand that matches From. 4612 SDNode::op_iterator Op = User->op_begin(), E = User->op_end(); 4613 for (; Op != E; ++Op) 4614 if (*Op == From[i]) break; 4615 4616 // If there are no matches, the user must use some other result of From. 4617 if (Op == E) continue; 4618 4619 // Okay, we know this user needs to be updated. Remove its old self 4620 // from the CSE maps. 4621 RemoveNodeFromCSEMaps(User); 4622 4623 // Update all operands that match "From" in case there are multiple uses. 4624 for (; Op != E; ++Op) { 4625 if (*Op == From[i]) { 4626 From[i].getNode()->removeUser(Op-User->op_begin(), User); 4627 *Op = To[i]; 4628 Op->setUser(User); 4629 To[i].getNode()->addUser(Op-User->op_begin(), User); 4630 } 4631 } 4632 4633 // Now that we have modified User, add it back to the CSE maps. If it 4634 // already exists there, recursively merge the results together. 4635 SDNode *Existing = AddNonLeafNodeToCSEMaps(User); 4636 if (!Existing) { 4637 if (UpdateListener) UpdateListener->NodeUpdated(User); 4638 continue; // Continue on to next user. 4639 } 4640 4641 // If there was already an existing matching node, use ReplaceAllUsesWith 4642 // to replace the dead one with the existing one. This can cause 4643 // recursive merging of other unrelated nodes down the line. 4644 ReplaceAllUsesWith(User, Existing, UpdateListener); 4645 4646 // User is now dead. Notify a listener if present. 4647 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing); 4648 DeleteNodeNotInCSEMaps(User); 4649 } 4650} 4651 4652/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 4653/// based on their topological order. It returns the maximum id and a vector 4654/// of the SDNodes* in assigned order by reference. 4655unsigned SelectionDAG::AssignTopologicalOrder() { 4656 4657 unsigned DAGSize = 0; 4658 4659 // SortedPos tracks the progress of the algorithm. Nodes before it are 4660 // sorted, nodes after it are unsorted. When the algorithm completes 4661 // it is at the end of the list. 4662 allnodes_iterator SortedPos = allnodes_begin(); 4663 4664 // Visit all the nodes. Move nodes with no operands to the front of 4665 // the list immediately. Annotate nodes that do have operands with their 4666 // operand count. Before we do this, the Node Id fields of the nodes 4667 // may contain arbitrary values. After, the Node Id fields for nodes 4668 // before SortedPos will contain the topological sort index, and the 4669 // Node Id fields for nodes At SortedPos and after will contain the 4670 // count of outstanding operands. 4671 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 4672 SDNode *N = I++; 4673 unsigned Degree = N->getNumOperands(); 4674 if (Degree == 0) { 4675 // A node with no uses, add it to the result array immediately. 4676 N->setNodeId(DAGSize++); 4677 allnodes_iterator Q = N; 4678 if (Q != SortedPos) 4679 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 4680 ++SortedPos; 4681 } else { 4682 // Temporarily use the Node Id as scratch space for the degree count. 4683 N->setNodeId(Degree); 4684 } 4685 } 4686 4687 // Visit all the nodes. As we iterate, moves nodes into sorted order, 4688 // such that by the time the end is reached all nodes will be sorted. 4689 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 4690 SDNode *N = I; 4691 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 4692 UI != UE; ++UI) { 4693 SDNode *P = *UI; 4694 unsigned Degree = P->getNodeId(); 4695 --Degree; 4696 if (Degree == 0) { 4697 // All of P's operands are sorted, so P may sorted now. 4698 P->setNodeId(DAGSize++); 4699 if (P != SortedPos) 4700 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 4701 ++SortedPos; 4702 } else { 4703 // Update P's outstanding operand count. 4704 P->setNodeId(Degree); 4705 } 4706 } 4707 } 4708 4709 assert(SortedPos == AllNodes.end() && 4710 "Topological sort incomplete!"); 4711 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 4712 "First node in topological sort is not the entry token!"); 4713 assert(AllNodes.front().getNodeId() == 0 && 4714 "First node in topological sort has non-zero id!"); 4715 assert(AllNodes.front().getNumOperands() == 0 && 4716 "First node in topological sort has operands!"); 4717 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 4718 "Last node in topologic sort has unexpected id!"); 4719 assert(AllNodes.back().use_empty() && 4720 "Last node in topologic sort has users!"); 4721 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 4722 return DAGSize; 4723} 4724 4725 4726 4727//===----------------------------------------------------------------------===// 4728// SDNode Class 4729//===----------------------------------------------------------------------===// 4730 4731HandleSDNode::~HandleSDNode() { 4732 DropOperands(); 4733} 4734 4735GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA, 4736 MVT VT, int64_t o) 4737 : SDNode(isa<GlobalVariable>(GA) && 4738 cast<GlobalVariable>(GA)->isThreadLocal() ? 4739 // Thread Local 4740 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) : 4741 // Non Thread Local 4742 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress), 4743 getSDVTList(VT)), Offset(o) { 4744 TheGlobal = const_cast<GlobalValue*>(GA); 4745} 4746 4747MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt, 4748 const Value *srcValue, int SVO, 4749 unsigned alignment, bool vol) 4750 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 4751 Flags(encodeMemSDNodeFlags(vol, alignment)) { 4752 4753 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 4754 assert(getAlignment() == alignment && "Alignment representation error!"); 4755 assert(isVolatile() == vol && "Volatile representation error!"); 4756} 4757 4758MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops, 4759 unsigned NumOps, MVT memvt, const Value *srcValue, 4760 int SVO, unsigned alignment, bool vol) 4761 : SDNode(Opc, VTs, Ops, NumOps), 4762 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 4763 Flags(vol | ((Log2_32(alignment) + 1) << 1)) { 4764 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 4765 assert(getAlignment() == alignment && "Alignment representation error!"); 4766 assert(isVolatile() == vol && "Volatile representation error!"); 4767} 4768 4769/// getMemOperand - Return a MachineMemOperand object describing the memory 4770/// reference performed by this memory reference. 4771MachineMemOperand MemSDNode::getMemOperand() const { 4772 int Flags = 0; 4773 if (isa<LoadSDNode>(this)) 4774 Flags = MachineMemOperand::MOLoad; 4775 else if (isa<StoreSDNode>(this)) 4776 Flags = MachineMemOperand::MOStore; 4777 else if (isa<AtomicSDNode>(this)) { 4778 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 4779 } 4780 else { 4781 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this); 4782 assert(MemIntrinNode && "Unknown MemSDNode opcode!"); 4783 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad; 4784 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore; 4785 } 4786 4787 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3; 4788 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 4789 4790 // Check if the memory reference references a frame index 4791 const FrameIndexSDNode *FI = 4792 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode()); 4793 if (!getSrcValue() && FI) 4794 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()), 4795 Flags, 0, Size, getAlignment()); 4796 else 4797 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(), 4798 Size, getAlignment()); 4799} 4800 4801/// Profile - Gather unique data for the node. 4802/// 4803void SDNode::Profile(FoldingSetNodeID &ID) const { 4804 AddNodeIDNode(ID, this); 4805} 4806 4807/// getValueTypeList - Return a pointer to the specified value type. 4808/// 4809const MVT *SDNode::getValueTypeList(MVT VT) { 4810 if (VT.isExtended()) { 4811 static std::set<MVT, MVT::compareRawBits> EVTs; 4812 return &(*EVTs.insert(VT).first); 4813 } else { 4814 static MVT VTs[MVT::LAST_VALUETYPE]; 4815 VTs[VT.getSimpleVT()] = VT; 4816 return &VTs[VT.getSimpleVT()]; 4817 } 4818} 4819 4820/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 4821/// indicated value. This method ignores uses of other values defined by this 4822/// operation. 4823bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 4824 assert(Value < getNumValues() && "Bad value!"); 4825 4826 // TODO: Only iterate over uses of a given value of the node 4827 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 4828 if (UI.getUse().getSDValue().getResNo() == Value) { 4829 if (NUses == 0) 4830 return false; 4831 --NUses; 4832 } 4833 } 4834 4835 // Found exactly the right number of uses? 4836 return NUses == 0; 4837} 4838 4839 4840/// hasAnyUseOfValue - Return true if there are any use of the indicated 4841/// value. This method ignores uses of other values defined by this operation. 4842bool SDNode::hasAnyUseOfValue(unsigned Value) const { 4843 assert(Value < getNumValues() && "Bad value!"); 4844 4845 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 4846 if (UI.getUse().getSDValue().getResNo() == Value) 4847 return true; 4848 4849 return false; 4850} 4851 4852 4853/// isOnlyUserOf - Return true if this node is the only use of N. 4854/// 4855bool SDNode::isOnlyUserOf(SDNode *N) const { 4856 bool Seen = false; 4857 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 4858 SDNode *User = *I; 4859 if (User == this) 4860 Seen = true; 4861 else 4862 return false; 4863 } 4864 4865 return Seen; 4866} 4867 4868/// isOperand - Return true if this node is an operand of N. 4869/// 4870bool SDValue::isOperandOf(SDNode *N) const { 4871 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 4872 if (*this == N->getOperand(i)) 4873 return true; 4874 return false; 4875} 4876 4877bool SDNode::isOperandOf(SDNode *N) const { 4878 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 4879 if (this == N->OperandList[i].getVal()) 4880 return true; 4881 return false; 4882} 4883 4884/// reachesChainWithoutSideEffects - Return true if this operand (which must 4885/// be a chain) reaches the specified operand without crossing any 4886/// side-effecting instructions. In practice, this looks through token 4887/// factors and non-volatile loads. In order to remain efficient, this only 4888/// looks a couple of nodes in, it does not do an exhaustive search. 4889bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 4890 unsigned Depth) const { 4891 if (*this == Dest) return true; 4892 4893 // Don't search too deeply, we just want to be able to see through 4894 // TokenFactor's etc. 4895 if (Depth == 0) return false; 4896 4897 // If this is a token factor, all inputs to the TF happen in parallel. If any 4898 // of the operands of the TF reach dest, then we can do the xform. 4899 if (getOpcode() == ISD::TokenFactor) { 4900 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 4901 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 4902 return true; 4903 return false; 4904 } 4905 4906 // Loads don't have side effects, look through them. 4907 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 4908 if (!Ld->isVolatile()) 4909 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 4910 } 4911 return false; 4912} 4913 4914 4915static void findPredecessor(SDNode *N, const SDNode *P, bool &found, 4916 SmallPtrSet<SDNode *, 32> &Visited) { 4917 if (found || !Visited.insert(N)) 4918 return; 4919 4920 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) { 4921 SDNode *Op = N->getOperand(i).getNode(); 4922 if (Op == P) { 4923 found = true; 4924 return; 4925 } 4926 findPredecessor(Op, P, found, Visited); 4927 } 4928} 4929 4930/// isPredecessorOf - Return true if this node is a predecessor of N. This node 4931/// is either an operand of N or it can be reached by recursively traversing 4932/// up the operands. 4933/// NOTE: this is an expensive method. Use it carefully. 4934bool SDNode::isPredecessorOf(SDNode *N) const { 4935 SmallPtrSet<SDNode *, 32> Visited; 4936 bool found = false; 4937 findPredecessor(N, this, found, Visited); 4938 return found; 4939} 4940 4941uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 4942 assert(Num < NumOperands && "Invalid child # of SDNode!"); 4943 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 4944} 4945 4946std::string SDNode::getOperationName(const SelectionDAG *G) const { 4947 switch (getOpcode()) { 4948 default: 4949 if (getOpcode() < ISD::BUILTIN_OP_END) 4950 return "<<Unknown DAG Node>>"; 4951 if (isMachineOpcode()) { 4952 if (G) 4953 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 4954 if (getMachineOpcode() < TII->getNumOpcodes()) 4955 return TII->get(getMachineOpcode()).getName(); 4956 return "<<Unknown Machine Node>>"; 4957 } 4958 if (G) { 4959 const TargetLowering &TLI = G->getTargetLoweringInfo(); 4960 const char *Name = TLI.getTargetNodeName(getOpcode()); 4961 if (Name) return Name; 4962 return "<<Unknown Target Node>>"; 4963 } 4964 return "<<Unknown Node>>"; 4965 4966#ifndef NDEBUG 4967 case ISD::DELETED_NODE: 4968 return "<<Deleted Node!>>"; 4969#endif 4970 case ISD::PREFETCH: return "Prefetch"; 4971 case ISD::MEMBARRIER: return "MemBarrier"; 4972 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 4973 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 4974 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 4975 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 4976 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 4977 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 4978 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 4979 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 4980 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 4981 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 4982 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 4983 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 4984 case ISD::PCMARKER: return "PCMarker"; 4985 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 4986 case ISD::SRCVALUE: return "SrcValue"; 4987 case ISD::MEMOPERAND: return "MemOperand"; 4988 case ISD::EntryToken: return "EntryToken"; 4989 case ISD::TokenFactor: return "TokenFactor"; 4990 case ISD::AssertSext: return "AssertSext"; 4991 case ISD::AssertZext: return "AssertZext"; 4992 4993 case ISD::BasicBlock: return "BasicBlock"; 4994 case ISD::ARG_FLAGS: return "ArgFlags"; 4995 case ISD::VALUETYPE: return "ValueType"; 4996 case ISD::Register: return "Register"; 4997 4998 case ISD::Constant: return "Constant"; 4999 case ISD::ConstantFP: return "ConstantFP"; 5000 case ISD::GlobalAddress: return "GlobalAddress"; 5001 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5002 case ISD::FrameIndex: return "FrameIndex"; 5003 case ISD::JumpTable: return "JumpTable"; 5004 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5005 case ISD::RETURNADDR: return "RETURNADDR"; 5006 case ISD::FRAMEADDR: return "FRAMEADDR"; 5007 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5008 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5009 case ISD::EHSELECTION: return "EHSELECTION"; 5010 case ISD::EH_RETURN: return "EH_RETURN"; 5011 case ISD::ConstantPool: return "ConstantPool"; 5012 case ISD::ExternalSymbol: return "ExternalSymbol"; 5013 case ISD::INTRINSIC_WO_CHAIN: { 5014 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue(); 5015 return Intrinsic::getName((Intrinsic::ID)IID); 5016 } 5017 case ISD::INTRINSIC_VOID: 5018 case ISD::INTRINSIC_W_CHAIN: { 5019 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue(); 5020 return Intrinsic::getName((Intrinsic::ID)IID); 5021 } 5022 5023 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5024 case ISD::TargetConstant: return "TargetConstant"; 5025 case ISD::TargetConstantFP:return "TargetConstantFP"; 5026 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5027 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5028 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5029 case ISD::TargetJumpTable: return "TargetJumpTable"; 5030 case ISD::TargetConstantPool: return "TargetConstantPool"; 5031 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5032 5033 case ISD::CopyToReg: return "CopyToReg"; 5034 case ISD::CopyFromReg: return "CopyFromReg"; 5035 case ISD::UNDEF: return "undef"; 5036 case ISD::MERGE_VALUES: return "merge_values"; 5037 case ISD::INLINEASM: return "inlineasm"; 5038 case ISD::DBG_LABEL: return "dbg_label"; 5039 case ISD::EH_LABEL: return "eh_label"; 5040 case ISD::DECLARE: return "declare"; 5041 case ISD::HANDLENODE: return "handlenode"; 5042 case ISD::FORMAL_ARGUMENTS: return "formal_arguments"; 5043 case ISD::CALL: return "call"; 5044 5045 // Unary operators 5046 case ISD::FABS: return "fabs"; 5047 case ISD::FNEG: return "fneg"; 5048 case ISD::FSQRT: return "fsqrt"; 5049 case ISD::FSIN: return "fsin"; 5050 case ISD::FCOS: return "fcos"; 5051 case ISD::FPOWI: return "fpowi"; 5052 case ISD::FPOW: return "fpow"; 5053 case ISD::FTRUNC: return "ftrunc"; 5054 case ISD::FFLOOR: return "ffloor"; 5055 case ISD::FCEIL: return "fceil"; 5056 case ISD::FRINT: return "frint"; 5057 case ISD::FNEARBYINT: return "fnearbyint"; 5058 5059 // Binary operators 5060 case ISD::ADD: return "add"; 5061 case ISD::SUB: return "sub"; 5062 case ISD::MUL: return "mul"; 5063 case ISD::MULHU: return "mulhu"; 5064 case ISD::MULHS: return "mulhs"; 5065 case ISD::SDIV: return "sdiv"; 5066 case ISD::UDIV: return "udiv"; 5067 case ISD::SREM: return "srem"; 5068 case ISD::UREM: return "urem"; 5069 case ISD::SMUL_LOHI: return "smul_lohi"; 5070 case ISD::UMUL_LOHI: return "umul_lohi"; 5071 case ISD::SDIVREM: return "sdivrem"; 5072 case ISD::UDIVREM: return "udivrem"; 5073 case ISD::AND: return "and"; 5074 case ISD::OR: return "or"; 5075 case ISD::XOR: return "xor"; 5076 case ISD::SHL: return "shl"; 5077 case ISD::SRA: return "sra"; 5078 case ISD::SRL: return "srl"; 5079 case ISD::ROTL: return "rotl"; 5080 case ISD::ROTR: return "rotr"; 5081 case ISD::FADD: return "fadd"; 5082 case ISD::FSUB: return "fsub"; 5083 case ISD::FMUL: return "fmul"; 5084 case ISD::FDIV: return "fdiv"; 5085 case ISD::FREM: return "frem"; 5086 case ISD::FCOPYSIGN: return "fcopysign"; 5087 case ISD::FGETSIGN: return "fgetsign"; 5088 5089 case ISD::SETCC: return "setcc"; 5090 case ISD::VSETCC: return "vsetcc"; 5091 case ISD::SELECT: return "select"; 5092 case ISD::SELECT_CC: return "select_cc"; 5093 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5094 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5095 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5096 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5097 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5098 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5099 case ISD::CARRY_FALSE: return "carry_false"; 5100 case ISD::ADDC: return "addc"; 5101 case ISD::ADDE: return "adde"; 5102 case ISD::SADDO: return "saddo"; 5103 case ISD::UADDO: return "uaddo"; 5104 case ISD::SSUBO: return "ssubo"; 5105 case ISD::USUBO: return "usubo"; 5106 case ISD::SMULO: return "smulo"; 5107 case ISD::UMULO: return "umulo"; 5108 case ISD::SUBC: return "subc"; 5109 case ISD::SUBE: return "sube"; 5110 case ISD::SHL_PARTS: return "shl_parts"; 5111 case ISD::SRA_PARTS: return "sra_parts"; 5112 case ISD::SRL_PARTS: return "srl_parts"; 5113 5114 case ISD::EXTRACT_SUBREG: return "extract_subreg"; 5115 case ISD::INSERT_SUBREG: return "insert_subreg"; 5116 5117 // Conversion operators. 5118 case ISD::SIGN_EXTEND: return "sign_extend"; 5119 case ISD::ZERO_EXTEND: return "zero_extend"; 5120 case ISD::ANY_EXTEND: return "any_extend"; 5121 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5122 case ISD::TRUNCATE: return "truncate"; 5123 case ISD::FP_ROUND: return "fp_round"; 5124 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5125 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5126 case ISD::FP_EXTEND: return "fp_extend"; 5127 5128 case ISD::SINT_TO_FP: return "sint_to_fp"; 5129 case ISD::UINT_TO_FP: return "uint_to_fp"; 5130 case ISD::FP_TO_SINT: return "fp_to_sint"; 5131 case ISD::FP_TO_UINT: return "fp_to_uint"; 5132 case ISD::BIT_CONVERT: return "bit_convert"; 5133 5134 case ISD::CONVERT_RNDSAT: { 5135 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5136 default: assert(0 && "Unknown cvt code!"); 5137 case ISD::CVT_FF: return "cvt_ff"; 5138 case ISD::CVT_FS: return "cvt_fs"; 5139 case ISD::CVT_FU: return "cvt_fu"; 5140 case ISD::CVT_SF: return "cvt_sf"; 5141 case ISD::CVT_UF: return "cvt_uf"; 5142 case ISD::CVT_SS: return "cvt_ss"; 5143 case ISD::CVT_SU: return "cvt_su"; 5144 case ISD::CVT_US: return "cvt_us"; 5145 case ISD::CVT_UU: return "cvt_uu"; 5146 } 5147 } 5148 5149 // Control flow instructions 5150 case ISD::BR: return "br"; 5151 case ISD::BRIND: return "brind"; 5152 case ISD::BR_JT: return "br_jt"; 5153 case ISD::BRCOND: return "brcond"; 5154 case ISD::BR_CC: return "br_cc"; 5155 case ISD::RET: return "ret"; 5156 case ISD::CALLSEQ_START: return "callseq_start"; 5157 case ISD::CALLSEQ_END: return "callseq_end"; 5158 5159 // Other operators 5160 case ISD::LOAD: return "load"; 5161 case ISD::STORE: return "store"; 5162 case ISD::VAARG: return "vaarg"; 5163 case ISD::VACOPY: return "vacopy"; 5164 case ISD::VAEND: return "vaend"; 5165 case ISD::VASTART: return "vastart"; 5166 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5167 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5168 case ISD::BUILD_PAIR: return "build_pair"; 5169 case ISD::STACKSAVE: return "stacksave"; 5170 case ISD::STACKRESTORE: return "stackrestore"; 5171 case ISD::TRAP: return "trap"; 5172 5173 // Bit manipulation 5174 case ISD::BSWAP: return "bswap"; 5175 case ISD::CTPOP: return "ctpop"; 5176 case ISD::CTTZ: return "cttz"; 5177 case ISD::CTLZ: return "ctlz"; 5178 5179 // Debug info 5180 case ISD::DBG_STOPPOINT: return "dbg_stoppoint"; 5181 case ISD::DEBUG_LOC: return "debug_loc"; 5182 5183 // Trampolines 5184 case ISD::TRAMPOLINE: return "trampoline"; 5185 5186 case ISD::CONDCODE: 5187 switch (cast<CondCodeSDNode>(this)->get()) { 5188 default: assert(0 && "Unknown setcc condition!"); 5189 case ISD::SETOEQ: return "setoeq"; 5190 case ISD::SETOGT: return "setogt"; 5191 case ISD::SETOGE: return "setoge"; 5192 case ISD::SETOLT: return "setolt"; 5193 case ISD::SETOLE: return "setole"; 5194 case ISD::SETONE: return "setone"; 5195 5196 case ISD::SETO: return "seto"; 5197 case ISD::SETUO: return "setuo"; 5198 case ISD::SETUEQ: return "setue"; 5199 case ISD::SETUGT: return "setugt"; 5200 case ISD::SETUGE: return "setuge"; 5201 case ISD::SETULT: return "setult"; 5202 case ISD::SETULE: return "setule"; 5203 case ISD::SETUNE: return "setune"; 5204 5205 case ISD::SETEQ: return "seteq"; 5206 case ISD::SETGT: return "setgt"; 5207 case ISD::SETGE: return "setge"; 5208 case ISD::SETLT: return "setlt"; 5209 case ISD::SETLE: return "setle"; 5210 case ISD::SETNE: return "setne"; 5211 } 5212 } 5213} 5214 5215const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5216 switch (AM) { 5217 default: 5218 return ""; 5219 case ISD::PRE_INC: 5220 return "<pre-inc>"; 5221 case ISD::PRE_DEC: 5222 return "<pre-dec>"; 5223 case ISD::POST_INC: 5224 return "<post-inc>"; 5225 case ISD::POST_DEC: 5226 return "<post-dec>"; 5227 } 5228} 5229 5230std::string ISD::ArgFlagsTy::getArgFlagsString() { 5231 std::string S = "< "; 5232 5233 if (isZExt()) 5234 S += "zext "; 5235 if (isSExt()) 5236 S += "sext "; 5237 if (isInReg()) 5238 S += "inreg "; 5239 if (isSRet()) 5240 S += "sret "; 5241 if (isByVal()) 5242 S += "byval "; 5243 if (isNest()) 5244 S += "nest "; 5245 if (getByValAlign()) 5246 S += "byval-align:" + utostr(getByValAlign()) + " "; 5247 if (getOrigAlign()) 5248 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5249 if (getByValSize()) 5250 S += "byval-size:" + utostr(getByValSize()) + " "; 5251 return S + ">"; 5252} 5253 5254void SDNode::dump() const { dump(0); } 5255void SDNode::dump(const SelectionDAG *G) const { 5256 print(errs(), G); 5257 errs().flush(); 5258} 5259 5260void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5261 OS << (void*)this << ": "; 5262 5263 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5264 if (i) OS << ","; 5265 if (getValueType(i) == MVT::Other) 5266 OS << "ch"; 5267 else 5268 OS << getValueType(i).getMVTString(); 5269 } 5270 OS << " = " << getOperationName(G); 5271 5272 OS << " "; 5273 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5274 if (i) OS << ", "; 5275 OS << (void*)getOperand(i).getNode(); 5276 if (unsigned RN = getOperand(i).getResNo()) 5277 OS << ":" << RN; 5278 } 5279 5280 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) { 5281 SDNode *Mask = getOperand(2).getNode(); 5282 OS << "<"; 5283 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) { 5284 if (i) OS << ","; 5285 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF) 5286 OS << "u"; 5287 else 5288 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue(); 5289 } 5290 OS << ">"; 5291 } 5292 5293 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5294 OS << '<' << CSDN->getAPIntValue() << '>'; 5295 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5296 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5297 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5298 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5299 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5300 else { 5301 OS << "<APFloat("; 5302 CSDN->getValueAPF().bitcastToAPInt().dump(); 5303 OS << ")>"; 5304 } 5305 } else if (const GlobalAddressSDNode *GADN = 5306 dyn_cast<GlobalAddressSDNode>(this)) { 5307 int64_t offset = GADN->getOffset(); 5308 OS << '<'; 5309 WriteAsOperand(OS, GADN->getGlobal()); 5310 OS << '>'; 5311 if (offset > 0) 5312 OS << " + " << offset; 5313 else 5314 OS << " " << offset; 5315 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5316 OS << "<" << FIDN->getIndex() << ">"; 5317 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5318 OS << "<" << JTDN->getIndex() << ">"; 5319 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5320 int offset = CP->getOffset(); 5321 if (CP->isMachineConstantPoolEntry()) 5322 OS << "<" << *CP->getMachineCPVal() << ">"; 5323 else 5324 OS << "<" << *CP->getConstVal() << ">"; 5325 if (offset > 0) 5326 OS << " + " << offset; 5327 else 5328 OS << " " << offset; 5329 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5330 OS << "<"; 5331 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5332 if (LBB) 5333 OS << LBB->getName() << " "; 5334 OS << (const void*)BBDN->getBasicBlock() << ">"; 5335 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5336 if (G && R->getReg() && 5337 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5338 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5339 } else { 5340 OS << " #" << R->getReg(); 5341 } 5342 } else if (const ExternalSymbolSDNode *ES = 5343 dyn_cast<ExternalSymbolSDNode>(this)) { 5344 OS << "'" << ES->getSymbol() << "'"; 5345 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5346 if (M->getValue()) 5347 OS << "<" << M->getValue() << ">"; 5348 else 5349 OS << "<null>"; 5350 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) { 5351 if (M->MO.getValue()) 5352 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">"; 5353 else 5354 OS << "<null:" << M->MO.getOffset() << ">"; 5355 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) { 5356 OS << N->getArgFlags().getArgFlagsString(); 5357 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5358 OS << ":" << N->getVT().getMVTString(); 5359 } 5360 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5361 const Value *SrcValue = LD->getSrcValue(); 5362 int SrcOffset = LD->getSrcValueOffset(); 5363 OS << " <"; 5364 if (SrcValue) 5365 OS << SrcValue; 5366 else 5367 OS << "null"; 5368 OS << ":" << SrcOffset << ">"; 5369 5370 bool doExt = true; 5371 switch (LD->getExtensionType()) { 5372 default: doExt = false; break; 5373 case ISD::EXTLOAD: OS << " <anyext "; break; 5374 case ISD::SEXTLOAD: OS << " <sext "; break; 5375 case ISD::ZEXTLOAD: OS << " <zext "; break; 5376 } 5377 if (doExt) 5378 OS << LD->getMemoryVT().getMVTString() << ">"; 5379 5380 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5381 if (*AM) 5382 OS << " " << AM; 5383 if (LD->isVolatile()) 5384 OS << " <volatile>"; 5385 OS << " alignment=" << LD->getAlignment(); 5386 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5387 const Value *SrcValue = ST->getSrcValue(); 5388 int SrcOffset = ST->getSrcValueOffset(); 5389 OS << " <"; 5390 if (SrcValue) 5391 OS << SrcValue; 5392 else 5393 OS << "null"; 5394 OS << ":" << SrcOffset << ">"; 5395 5396 if (ST->isTruncatingStore()) 5397 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">"; 5398 5399 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5400 if (*AM) 5401 OS << " " << AM; 5402 if (ST->isVolatile()) 5403 OS << " <volatile>"; 5404 OS << " alignment=" << ST->getAlignment(); 5405 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) { 5406 const Value *SrcValue = AT->getSrcValue(); 5407 int SrcOffset = AT->getSrcValueOffset(); 5408 OS << " <"; 5409 if (SrcValue) 5410 OS << SrcValue; 5411 else 5412 OS << "null"; 5413 OS << ":" << SrcOffset << ">"; 5414 if (AT->isVolatile()) 5415 OS << " <volatile>"; 5416 OS << " alignment=" << AT->getAlignment(); 5417 } 5418} 5419 5420static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 5421 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5422 if (N->getOperand(i).getNode()->hasOneUse()) 5423 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 5424 else 5425 cerr << "\n" << std::string(indent+2, ' ') 5426 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 5427 5428 5429 cerr << "\n" << std::string(indent, ' '); 5430 N->dump(G); 5431} 5432 5433void SelectionDAG::dump() const { 5434 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 5435 5436 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 5437 I != E; ++I) { 5438 const SDNode *N = I; 5439 if (!N->hasOneUse() && N != getRoot().getNode()) 5440 DumpNodes(N, 2, this); 5441 } 5442 5443 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 5444 5445 cerr << "\n\n"; 5446} 5447 5448const Type *ConstantPoolSDNode::getType() const { 5449 if (isMachineConstantPoolEntry()) 5450 return Val.MachineCPVal->getType(); 5451 return Val.ConstVal->getType(); 5452} 5453