SelectionDAG.cpp revision d71bb562758c417e91ab05424cea93264b35c67a
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/ValueTracking.h" 19#include "llvm/Function.h" 20#include "llvm/GlobalAlias.h" 21#include "llvm/GlobalVariable.h" 22#include "llvm/Intrinsics.h" 23#include "llvm/DerivedTypes.h" 24#include "llvm/Assembly/Writer.h" 25#include "llvm/CallingConv.h" 26#include "llvm/CodeGen/MachineBasicBlock.h" 27#include "llvm/CodeGen/MachineConstantPool.h" 28#include "llvm/CodeGen/MachineFrameInfo.h" 29#include "llvm/CodeGen/MachineModuleInfo.h" 30#include "llvm/CodeGen/PseudoSourceValue.h" 31#include "llvm/Target/TargetRegisterInfo.h" 32#include "llvm/Target/TargetData.h" 33#include "llvm/Target/TargetFrameInfo.h" 34#include "llvm/Target/TargetLowering.h" 35#include "llvm/Target/TargetOptions.h" 36#include "llvm/Target/TargetInstrInfo.h" 37#include "llvm/Target/TargetIntrinsicInfo.h" 38#include "llvm/Target/TargetMachine.h" 39#include "llvm/Support/CommandLine.h" 40#include "llvm/Support/Debug.h" 41#include "llvm/Support/ErrorHandling.h" 42#include "llvm/Support/ManagedStatic.h" 43#include "llvm/Support/MathExtras.h" 44#include "llvm/Support/raw_ostream.h" 45#include "llvm/System/Mutex.h" 46#include "llvm/ADT/SetVector.h" 47#include "llvm/ADT/SmallPtrSet.h" 48#include "llvm/ADT/SmallSet.h" 49#include "llvm/ADT/SmallVector.h" 50#include "llvm/ADT/StringExtras.h" 51#include <algorithm> 52#include <cmath> 53using namespace llvm; 54 55/// makeVTList - Return an instance of the SDVTList struct initialized with the 56/// specified members. 57static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 58 SDVTList Res = {VTs, NumVTs}; 59 return Res; 60} 61 62static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 63 switch (VT.getSimpleVT().SimpleTy) { 64 default: llvm_unreachable("Unknown FP format"); 65 case MVT::f32: return &APFloat::IEEEsingle; 66 case MVT::f64: return &APFloat::IEEEdouble; 67 case MVT::f80: return &APFloat::x87DoubleExtended; 68 case MVT::f128: return &APFloat::IEEEquad; 69 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 70 } 71} 72 73SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 74 75//===----------------------------------------------------------------------===// 76// ConstantFPSDNode Class 77//===----------------------------------------------------------------------===// 78 79/// isExactlyValue - We don't rely on operator== working on double values, as 80/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 81/// As such, this method can be used to do an exact bit-for-bit comparison of 82/// two floating point values. 83bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 84 return getValueAPF().bitwiseIsEqual(V); 85} 86 87bool ConstantFPSDNode::isValueValidForType(EVT VT, 88 const APFloat& Val) { 89 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 90 91 // PPC long double cannot be converted to any other type. 92 if (VT == MVT::ppcf128 || 93 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 94 return false; 95 96 // convert modifies in place, so make a copy. 97 APFloat Val2 = APFloat(Val); 98 bool losesInfo; 99 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 100 &losesInfo); 101 return !losesInfo; 102} 103 104//===----------------------------------------------------------------------===// 105// ISD Namespace 106//===----------------------------------------------------------------------===// 107 108/// isBuildVectorAllOnes - Return true if the specified node is a 109/// BUILD_VECTOR where all of the elements are ~0 or undef. 110bool ISD::isBuildVectorAllOnes(const SDNode *N) { 111 // Look through a bit convert. 112 if (N->getOpcode() == ISD::BIT_CONVERT) 113 N = N->getOperand(0).getNode(); 114 115 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 116 117 unsigned i = 0, e = N->getNumOperands(); 118 119 // Skip over all of the undef values. 120 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 121 ++i; 122 123 // Do not accept an all-undef vector. 124 if (i == e) return false; 125 126 // Do not accept build_vectors that aren't all constants or which have non-~0 127 // elements. 128 SDValue NotZero = N->getOperand(i); 129 if (isa<ConstantSDNode>(NotZero)) { 130 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 131 return false; 132 } else if (isa<ConstantFPSDNode>(NotZero)) { 133 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 134 bitcastToAPInt().isAllOnesValue()) 135 return false; 136 } else 137 return false; 138 139 // Okay, we have at least one ~0 value, check to see if the rest match or are 140 // undefs. 141 for (++i; i != e; ++i) 142 if (N->getOperand(i) != NotZero && 143 N->getOperand(i).getOpcode() != ISD::UNDEF) 144 return false; 145 return true; 146} 147 148 149/// isBuildVectorAllZeros - Return true if the specified node is a 150/// BUILD_VECTOR where all of the elements are 0 or undef. 151bool ISD::isBuildVectorAllZeros(const SDNode *N) { 152 // Look through a bit convert. 153 if (N->getOpcode() == ISD::BIT_CONVERT) 154 N = N->getOperand(0).getNode(); 155 156 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 157 158 unsigned i = 0, e = N->getNumOperands(); 159 160 // Skip over all of the undef values. 161 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 162 ++i; 163 164 // Do not accept an all-undef vector. 165 if (i == e) return false; 166 167 // Do not accept build_vectors that aren't all constants or which have non-0 168 // elements. 169 SDValue Zero = N->getOperand(i); 170 if (isa<ConstantSDNode>(Zero)) { 171 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 172 return false; 173 } else if (isa<ConstantFPSDNode>(Zero)) { 174 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 175 return false; 176 } else 177 return false; 178 179 // Okay, we have at least one 0 value, check to see if the rest match or are 180 // undefs. 181 for (++i; i != e; ++i) 182 if (N->getOperand(i) != Zero && 183 N->getOperand(i).getOpcode() != ISD::UNDEF) 184 return false; 185 return true; 186} 187 188/// isScalarToVector - Return true if the specified node is a 189/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 190/// element is not an undef. 191bool ISD::isScalarToVector(const SDNode *N) { 192 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 193 return true; 194 195 if (N->getOpcode() != ISD::BUILD_VECTOR) 196 return false; 197 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 198 return false; 199 unsigned NumElems = N->getNumOperands(); 200 for (unsigned i = 1; i < NumElems; ++i) { 201 SDValue V = N->getOperand(i); 202 if (V.getOpcode() != ISD::UNDEF) 203 return false; 204 } 205 return true; 206} 207 208/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 209/// when given the operation for (X op Y). 210ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 211 // To perform this operation, we just need to swap the L and G bits of the 212 // operation. 213 unsigned OldL = (Operation >> 2) & 1; 214 unsigned OldG = (Operation >> 1) & 1; 215 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 216 (OldL << 1) | // New G bit 217 (OldG << 2)); // New L bit. 218} 219 220/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 221/// 'op' is a valid SetCC operation. 222ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 223 unsigned Operation = Op; 224 if (isInteger) 225 Operation ^= 7; // Flip L, G, E bits, but not U. 226 else 227 Operation ^= 15; // Flip all of the condition bits. 228 229 if (Operation > ISD::SETTRUE2) 230 Operation &= ~8; // Don't let N and U bits get set. 231 232 return ISD::CondCode(Operation); 233} 234 235 236/// isSignedOp - For an integer comparison, return 1 if the comparison is a 237/// signed operation and 2 if the result is an unsigned comparison. Return zero 238/// if the operation does not depend on the sign of the input (setne and seteq). 239static int isSignedOp(ISD::CondCode Opcode) { 240 switch (Opcode) { 241 default: llvm_unreachable("Illegal integer setcc operation!"); 242 case ISD::SETEQ: 243 case ISD::SETNE: return 0; 244 case ISD::SETLT: 245 case ISD::SETLE: 246 case ISD::SETGT: 247 case ISD::SETGE: return 1; 248 case ISD::SETULT: 249 case ISD::SETULE: 250 case ISD::SETUGT: 251 case ISD::SETUGE: return 2; 252 } 253} 254 255/// getSetCCOrOperation - Return the result of a logical OR between different 256/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 257/// returns SETCC_INVALID if it is not possible to represent the resultant 258/// comparison. 259ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 260 bool isInteger) { 261 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 262 // Cannot fold a signed integer setcc with an unsigned integer setcc. 263 return ISD::SETCC_INVALID; 264 265 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 266 267 // If the N and U bits get set then the resultant comparison DOES suddenly 268 // care about orderedness, and is true when ordered. 269 if (Op > ISD::SETTRUE2) 270 Op &= ~16; // Clear the U bit if the N bit is set. 271 272 // Canonicalize illegal integer setcc's. 273 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 274 Op = ISD::SETNE; 275 276 return ISD::CondCode(Op); 277} 278 279/// getSetCCAndOperation - Return the result of a logical AND between different 280/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 281/// function returns zero if it is not possible to represent the resultant 282/// comparison. 283ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 284 bool isInteger) { 285 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 286 // Cannot fold a signed setcc with an unsigned setcc. 287 return ISD::SETCC_INVALID; 288 289 // Combine all of the condition bits. 290 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 291 292 // Canonicalize illegal integer setcc's. 293 if (isInteger) { 294 switch (Result) { 295 default: break; 296 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 297 case ISD::SETOEQ: // SETEQ & SETU[LG]E 298 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 299 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 300 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 301 } 302 } 303 304 return Result; 305} 306 307//===----------------------------------------------------------------------===// 308// SDNode Profile Support 309//===----------------------------------------------------------------------===// 310 311/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 312/// 313static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 314 ID.AddInteger(OpC); 315} 316 317/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 318/// solely with their pointer. 319static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 320 ID.AddPointer(VTList.VTs); 321} 322 323/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 324/// 325static void AddNodeIDOperands(FoldingSetNodeID &ID, 326 const SDValue *Ops, unsigned NumOps) { 327 for (; NumOps; --NumOps, ++Ops) { 328 ID.AddPointer(Ops->getNode()); 329 ID.AddInteger(Ops->getResNo()); 330 } 331} 332 333/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 334/// 335static void AddNodeIDOperands(FoldingSetNodeID &ID, 336 const SDUse *Ops, unsigned NumOps) { 337 for (; NumOps; --NumOps, ++Ops) { 338 ID.AddPointer(Ops->getNode()); 339 ID.AddInteger(Ops->getResNo()); 340 } 341} 342 343static void AddNodeIDNode(FoldingSetNodeID &ID, 344 unsigned short OpC, SDVTList VTList, 345 const SDValue *OpList, unsigned N) { 346 AddNodeIDOpcode(ID, OpC); 347 AddNodeIDValueTypes(ID, VTList); 348 AddNodeIDOperands(ID, OpList, N); 349} 350 351/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 352/// the NodeID data. 353static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 354 switch (N->getOpcode()) { 355 case ISD::TargetExternalSymbol: 356 case ISD::ExternalSymbol: 357 llvm_unreachable("Should only be used on nodes with operands"); 358 default: break; // Normal nodes don't need extra info. 359 case ISD::TargetConstant: 360 case ISD::Constant: 361 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 362 break; 363 case ISD::TargetConstantFP: 364 case ISD::ConstantFP: { 365 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 366 break; 367 } 368 case ISD::TargetGlobalAddress: 369 case ISD::GlobalAddress: 370 case ISD::TargetGlobalTLSAddress: 371 case ISD::GlobalTLSAddress: { 372 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 373 ID.AddPointer(GA->getGlobal()); 374 ID.AddInteger(GA->getOffset()); 375 ID.AddInteger(GA->getTargetFlags()); 376 break; 377 } 378 case ISD::BasicBlock: 379 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 380 break; 381 case ISD::Register: 382 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 383 break; 384 385 case ISD::SRCVALUE: 386 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 387 break; 388 case ISD::FrameIndex: 389 case ISD::TargetFrameIndex: 390 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 391 break; 392 case ISD::JumpTable: 393 case ISD::TargetJumpTable: 394 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 395 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 396 break; 397 case ISD::ConstantPool: 398 case ISD::TargetConstantPool: { 399 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 400 ID.AddInteger(CP->getAlignment()); 401 ID.AddInteger(CP->getOffset()); 402 if (CP->isMachineConstantPoolEntry()) 403 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 404 else 405 ID.AddPointer(CP->getConstVal()); 406 ID.AddInteger(CP->getTargetFlags()); 407 break; 408 } 409 case ISD::LOAD: { 410 const LoadSDNode *LD = cast<LoadSDNode>(N); 411 ID.AddInteger(LD->getMemoryVT().getRawBits()); 412 ID.AddInteger(LD->getRawSubclassData()); 413 break; 414 } 415 case ISD::STORE: { 416 const StoreSDNode *ST = cast<StoreSDNode>(N); 417 ID.AddInteger(ST->getMemoryVT().getRawBits()); 418 ID.AddInteger(ST->getRawSubclassData()); 419 break; 420 } 421 case ISD::ATOMIC_CMP_SWAP: 422 case ISD::ATOMIC_SWAP: 423 case ISD::ATOMIC_LOAD_ADD: 424 case ISD::ATOMIC_LOAD_SUB: 425 case ISD::ATOMIC_LOAD_AND: 426 case ISD::ATOMIC_LOAD_OR: 427 case ISD::ATOMIC_LOAD_XOR: 428 case ISD::ATOMIC_LOAD_NAND: 429 case ISD::ATOMIC_LOAD_MIN: 430 case ISD::ATOMIC_LOAD_MAX: 431 case ISD::ATOMIC_LOAD_UMIN: 432 case ISD::ATOMIC_LOAD_UMAX: { 433 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 434 ID.AddInteger(AT->getMemoryVT().getRawBits()); 435 ID.AddInteger(AT->getRawSubclassData()); 436 break; 437 } 438 case ISD::VECTOR_SHUFFLE: { 439 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 440 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 441 i != e; ++i) 442 ID.AddInteger(SVN->getMaskElt(i)); 443 break; 444 } 445 case ISD::TargetBlockAddress: 446 case ISD::BlockAddress: { 447 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 448 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 449 break; 450 } 451 } // end switch (N->getOpcode()) 452} 453 454/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 455/// data. 456static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 457 AddNodeIDOpcode(ID, N->getOpcode()); 458 // Add the return value info. 459 AddNodeIDValueTypes(ID, N->getVTList()); 460 // Add the operand info. 461 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 462 463 // Handle SDNode leafs with special info. 464 AddNodeIDCustom(ID, N); 465} 466 467/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 468/// the CSE map that carries volatility, temporalness, indexing mode, and 469/// extension/truncation information. 470/// 471static inline unsigned 472encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 473 bool isNonTemporal) { 474 assert((ConvType & 3) == ConvType && 475 "ConvType may not require more than 2 bits!"); 476 assert((AM & 7) == AM && 477 "AM may not require more than 3 bits!"); 478 return ConvType | 479 (AM << 2) | 480 (isVolatile << 5) | 481 (isNonTemporal << 6); 482} 483 484//===----------------------------------------------------------------------===// 485// SelectionDAG Class 486//===----------------------------------------------------------------------===// 487 488/// doNotCSE - Return true if CSE should not be performed for this node. 489static bool doNotCSE(SDNode *N) { 490 if (N->getValueType(0) == MVT::Flag) 491 return true; // Never CSE anything that produces a flag. 492 493 switch (N->getOpcode()) { 494 default: break; 495 case ISD::HANDLENODE: 496 case ISD::EH_LABEL: 497 return true; // Never CSE these nodes. 498 } 499 500 // Check that remaining values produced are not flags. 501 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 502 if (N->getValueType(i) == MVT::Flag) 503 return true; // Never CSE anything that produces a flag. 504 505 return false; 506} 507 508/// RemoveDeadNodes - This method deletes all unreachable nodes in the 509/// SelectionDAG. 510void SelectionDAG::RemoveDeadNodes() { 511 // Create a dummy node (which is not added to allnodes), that adds a reference 512 // to the root node, preventing it from being deleted. 513 HandleSDNode Dummy(getRoot()); 514 515 SmallVector<SDNode*, 128> DeadNodes; 516 517 // Add all obviously-dead nodes to the DeadNodes worklist. 518 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 519 if (I->use_empty()) 520 DeadNodes.push_back(I); 521 522 RemoveDeadNodes(DeadNodes); 523 524 // If the root changed (e.g. it was a dead load, update the root). 525 setRoot(Dummy.getValue()); 526} 527 528/// RemoveDeadNodes - This method deletes the unreachable nodes in the 529/// given list, and any nodes that become unreachable as a result. 530void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 531 DAGUpdateListener *UpdateListener) { 532 533 // Process the worklist, deleting the nodes and adding their uses to the 534 // worklist. 535 while (!DeadNodes.empty()) { 536 SDNode *N = DeadNodes.pop_back_val(); 537 538 if (UpdateListener) 539 UpdateListener->NodeDeleted(N, 0); 540 541 // Take the node out of the appropriate CSE map. 542 RemoveNodeFromCSEMaps(N); 543 544 // Next, brutally remove the operand list. This is safe to do, as there are 545 // no cycles in the graph. 546 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 547 SDUse &Use = *I++; 548 SDNode *Operand = Use.getNode(); 549 Use.set(SDValue()); 550 551 // Now that we removed this operand, see if there are no uses of it left. 552 if (Operand->use_empty()) 553 DeadNodes.push_back(Operand); 554 } 555 556 DeallocateNode(N); 557 } 558} 559 560void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 561 SmallVector<SDNode*, 16> DeadNodes(1, N); 562 RemoveDeadNodes(DeadNodes, UpdateListener); 563} 564 565void SelectionDAG::DeleteNode(SDNode *N) { 566 // First take this out of the appropriate CSE map. 567 RemoveNodeFromCSEMaps(N); 568 569 // Finally, remove uses due to operands of this node, remove from the 570 // AllNodes list, and delete the node. 571 DeleteNodeNotInCSEMaps(N); 572} 573 574void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 575 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 576 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 577 578 // Drop all of the operands and decrement used node's use counts. 579 N->DropOperands(); 580 581 DeallocateNode(N); 582} 583 584void SelectionDAG::DeallocateNode(SDNode *N) { 585 if (N->OperandsNeedDelete) 586 delete[] N->OperandList; 587 588 // Set the opcode to DELETED_NODE to help catch bugs when node 589 // memory is reallocated. 590 N->NodeType = ISD::DELETED_NODE; 591 592 NodeAllocator.Deallocate(AllNodes.remove(N)); 593 594 // Remove the ordering of this node. 595 Ordering->remove(N); 596 597 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 598 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N); 599 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 600 DbgVals[i]->setIsInvalidated(); 601} 602 603/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 604/// correspond to it. This is useful when we're about to delete or repurpose 605/// the node. We don't want future request for structurally identical nodes 606/// to return N anymore. 607bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 608 bool Erased = false; 609 switch (N->getOpcode()) { 610 case ISD::EntryToken: 611 llvm_unreachable("EntryToken should not be in CSEMaps!"); 612 return false; 613 case ISD::HANDLENODE: return false; // noop. 614 case ISD::CONDCODE: 615 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 616 "Cond code doesn't exist!"); 617 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 618 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 619 break; 620 case ISD::ExternalSymbol: 621 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 622 break; 623 case ISD::TargetExternalSymbol: { 624 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 625 Erased = TargetExternalSymbols.erase( 626 std::pair<std::string,unsigned char>(ESN->getSymbol(), 627 ESN->getTargetFlags())); 628 break; 629 } 630 case ISD::VALUETYPE: { 631 EVT VT = cast<VTSDNode>(N)->getVT(); 632 if (VT.isExtended()) { 633 Erased = ExtendedValueTypeNodes.erase(VT); 634 } else { 635 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 636 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 637 } 638 break; 639 } 640 default: 641 // Remove it from the CSE Map. 642 Erased = CSEMap.RemoveNode(N); 643 break; 644 } 645#ifndef NDEBUG 646 // Verify that the node was actually in one of the CSE maps, unless it has a 647 // flag result (which cannot be CSE'd) or is one of the special cases that are 648 // not subject to CSE. 649 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 650 !N->isMachineOpcode() && !doNotCSE(N)) { 651 N->dump(this); 652 dbgs() << "\n"; 653 llvm_unreachable("Node is not in map!"); 654 } 655#endif 656 return Erased; 657} 658 659/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 660/// maps and modified in place. Add it back to the CSE maps, unless an identical 661/// node already exists, in which case transfer all its users to the existing 662/// node. This transfer can potentially trigger recursive merging. 663/// 664void 665SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 666 DAGUpdateListener *UpdateListener) { 667 // For node types that aren't CSE'd, just act as if no identical node 668 // already exists. 669 if (!doNotCSE(N)) { 670 SDNode *Existing = CSEMap.GetOrInsertNode(N); 671 if (Existing != N) { 672 // If there was already an existing matching node, use ReplaceAllUsesWith 673 // to replace the dead one with the existing one. This can cause 674 // recursive merging of other unrelated nodes down the line. 675 ReplaceAllUsesWith(N, Existing, UpdateListener); 676 677 // N is now dead. Inform the listener if it exists and delete it. 678 if (UpdateListener) 679 UpdateListener->NodeDeleted(N, Existing); 680 DeleteNodeNotInCSEMaps(N); 681 return; 682 } 683 } 684 685 // If the node doesn't already exist, we updated it. Inform a listener if 686 // it exists. 687 if (UpdateListener) 688 UpdateListener->NodeUpdated(N); 689} 690 691/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 692/// were replaced with those specified. If this node is never memoized, 693/// return null, otherwise return a pointer to the slot it would take. If a 694/// node already exists with these operands, the slot will be non-null. 695SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 696 void *&InsertPos) { 697 if (doNotCSE(N)) 698 return 0; 699 700 SDValue Ops[] = { Op }; 701 FoldingSetNodeID ID; 702 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 703 AddNodeIDCustom(ID, N); 704 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 705 return Node; 706} 707 708/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 709/// were replaced with those specified. If this node is never memoized, 710/// return null, otherwise return a pointer to the slot it would take. If a 711/// node already exists with these operands, the slot will be non-null. 712SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 713 SDValue Op1, SDValue Op2, 714 void *&InsertPos) { 715 if (doNotCSE(N)) 716 return 0; 717 718 SDValue Ops[] = { Op1, Op2 }; 719 FoldingSetNodeID ID; 720 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 721 AddNodeIDCustom(ID, N); 722 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 723 return Node; 724} 725 726 727/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 728/// were replaced with those specified. If this node is never memoized, 729/// return null, otherwise return a pointer to the slot it would take. If a 730/// node already exists with these operands, the slot will be non-null. 731SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 732 const SDValue *Ops,unsigned NumOps, 733 void *&InsertPos) { 734 if (doNotCSE(N)) 735 return 0; 736 737 FoldingSetNodeID ID; 738 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 739 AddNodeIDCustom(ID, N); 740 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 741 return Node; 742} 743 744/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 745void SelectionDAG::VerifyNode(SDNode *N) { 746 switch (N->getOpcode()) { 747 default: 748 break; 749 case ISD::BUILD_PAIR: { 750 EVT VT = N->getValueType(0); 751 assert(N->getNumValues() == 1 && "Too many results!"); 752 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 753 "Wrong return type!"); 754 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 755 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 756 "Mismatched operand types!"); 757 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 758 "Wrong operand type!"); 759 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 760 "Wrong return type size"); 761 break; 762 } 763 case ISD::BUILD_VECTOR: { 764 assert(N->getNumValues() == 1 && "Too many results!"); 765 assert(N->getValueType(0).isVector() && "Wrong return type!"); 766 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 767 "Wrong number of operands!"); 768 EVT EltVT = N->getValueType(0).getVectorElementType(); 769 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 770 assert((I->getValueType() == EltVT || 771 (EltVT.isInteger() && I->getValueType().isInteger() && 772 EltVT.bitsLE(I->getValueType()))) && 773 "Wrong operand type!"); 774 break; 775 } 776 } 777} 778 779/// getEVTAlignment - Compute the default alignment value for the 780/// given type. 781/// 782unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 783 const Type *Ty = VT == MVT::iPTR ? 784 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 785 VT.getTypeForEVT(*getContext()); 786 787 return TLI.getTargetData()->getABITypeAlignment(Ty); 788} 789 790// EntryNode could meaningfully have debug info if we can find it... 791SelectionDAG::SelectionDAG(const TargetMachine &tm, FunctionLoweringInfo &fli) 792 : TM(tm), TLI(*tm.getTargetLowering()), FLI(fli), 793 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 794 Root(getEntryNode()), Ordering(0) { 795 AllNodes.push_back(&EntryNode); 796 Ordering = new SDNodeOrdering(); 797 DbgInfo = new SDDbgInfo(); 798} 799 800void SelectionDAG::init(MachineFunction &mf) { 801 MF = &mf; 802 Context = &mf.getFunction()->getContext(); 803} 804 805SelectionDAG::~SelectionDAG() { 806 allnodes_clear(); 807 delete Ordering; 808 DbgInfo->clear(); 809 delete DbgInfo; 810} 811 812void SelectionDAG::allnodes_clear() { 813 assert(&*AllNodes.begin() == &EntryNode); 814 AllNodes.remove(AllNodes.begin()); 815 while (!AllNodes.empty()) 816 DeallocateNode(AllNodes.begin()); 817} 818 819void SelectionDAG::clear() { 820 allnodes_clear(); 821 OperandAllocator.Reset(); 822 CSEMap.clear(); 823 824 ExtendedValueTypeNodes.clear(); 825 ExternalSymbols.clear(); 826 TargetExternalSymbols.clear(); 827 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 828 static_cast<CondCodeSDNode*>(0)); 829 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 830 static_cast<SDNode*>(0)); 831 832 EntryNode.UseList = 0; 833 AllNodes.push_back(&EntryNode); 834 Root = getEntryNode(); 835 delete Ordering; 836 Ordering = new SDNodeOrdering(); 837 DbgInfo->clear(); 838 delete DbgInfo; 839 DbgInfo = new SDDbgInfo(); 840} 841 842SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 843 return VT.bitsGT(Op.getValueType()) ? 844 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 845 getNode(ISD::TRUNCATE, DL, VT, Op); 846} 847 848SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 849 return VT.bitsGT(Op.getValueType()) ? 850 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 851 getNode(ISD::TRUNCATE, DL, VT, Op); 852} 853 854SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 855 assert(!VT.isVector() && 856 "getZeroExtendInReg should use the vector element type instead of " 857 "the vector type!"); 858 if (Op.getValueType() == VT) return Op; 859 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 860 APInt Imm = APInt::getLowBitsSet(BitWidth, 861 VT.getSizeInBits()); 862 return getNode(ISD::AND, DL, Op.getValueType(), Op, 863 getConstant(Imm, Op.getValueType())); 864} 865 866/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 867/// 868SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 869 EVT EltVT = VT.getScalarType(); 870 SDValue NegOne = 871 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 872 return getNode(ISD::XOR, DL, VT, Val, NegOne); 873} 874 875SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 876 EVT EltVT = VT.getScalarType(); 877 assert((EltVT.getSizeInBits() >= 64 || 878 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 879 "getConstant with a uint64_t value that doesn't fit in the type!"); 880 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 881} 882 883SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 884 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 885} 886 887SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 888 assert(VT.isInteger() && "Cannot create FP integer constant!"); 889 890 EVT EltVT = VT.getScalarType(); 891 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 892 "APInt size does not match type size!"); 893 894 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 895 FoldingSetNodeID ID; 896 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 897 ID.AddPointer(&Val); 898 void *IP = 0; 899 SDNode *N = NULL; 900 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 901 if (!VT.isVector()) 902 return SDValue(N, 0); 903 904 if (!N) { 905 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 906 CSEMap.InsertNode(N, IP); 907 AllNodes.push_back(N); 908 } 909 910 SDValue Result(N, 0); 911 if (VT.isVector()) { 912 SmallVector<SDValue, 8> Ops; 913 Ops.assign(VT.getVectorNumElements(), Result); 914 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 915 } 916 return Result; 917} 918 919SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 920 return getConstant(Val, TLI.getPointerTy(), isTarget); 921} 922 923 924SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 925 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 926} 927 928SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 929 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 930 931 EVT EltVT = VT.getScalarType(); 932 933 // Do the map lookup using the actual bit pattern for the floating point 934 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 935 // we don't have issues with SNANs. 936 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 937 FoldingSetNodeID ID; 938 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 939 ID.AddPointer(&V); 940 void *IP = 0; 941 SDNode *N = NULL; 942 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 943 if (!VT.isVector()) 944 return SDValue(N, 0); 945 946 if (!N) { 947 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 948 CSEMap.InsertNode(N, IP); 949 AllNodes.push_back(N); 950 } 951 952 SDValue Result(N, 0); 953 if (VT.isVector()) { 954 SmallVector<SDValue, 8> Ops; 955 Ops.assign(VT.getVectorNumElements(), Result); 956 // FIXME DebugLoc info might be appropriate here 957 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 958 } 959 return Result; 960} 961 962SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 963 EVT EltVT = VT.getScalarType(); 964 if (EltVT==MVT::f32) 965 return getConstantFP(APFloat((float)Val), VT, isTarget); 966 else 967 return getConstantFP(APFloat(Val), VT, isTarget); 968} 969 970SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 971 EVT VT, int64_t Offset, 972 bool isTargetGA, 973 unsigned char TargetFlags) { 974 assert((TargetFlags == 0 || isTargetGA) && 975 "Cannot set target flags on target-independent globals"); 976 977 // Truncate (with sign-extension) the offset value to the pointer size. 978 EVT PTy = TLI.getPointerTy(); 979 unsigned BitWidth = PTy.getSizeInBits(); 980 if (BitWidth < 64) 981 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 982 983 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 984 if (!GVar) { 985 // If GV is an alias then use the aliasee for determining thread-localness. 986 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 987 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 988 } 989 990 unsigned Opc; 991 if (GVar && GVar->isThreadLocal()) 992 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 993 else 994 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 995 996 FoldingSetNodeID ID; 997 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 998 ID.AddPointer(GV); 999 ID.AddInteger(Offset); 1000 ID.AddInteger(TargetFlags); 1001 void *IP = 0; 1002 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1003 return SDValue(E, 0); 1004 1005 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, GV, VT, 1006 Offset, TargetFlags); 1007 CSEMap.InsertNode(N, IP); 1008 AllNodes.push_back(N); 1009 return SDValue(N, 0); 1010} 1011 1012SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1013 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1014 FoldingSetNodeID ID; 1015 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1016 ID.AddInteger(FI); 1017 void *IP = 0; 1018 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1019 return SDValue(E, 0); 1020 1021 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1022 CSEMap.InsertNode(N, IP); 1023 AllNodes.push_back(N); 1024 return SDValue(N, 0); 1025} 1026 1027SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1028 unsigned char TargetFlags) { 1029 assert((TargetFlags == 0 || isTarget) && 1030 "Cannot set target flags on target-independent jump tables"); 1031 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1032 FoldingSetNodeID ID; 1033 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1034 ID.AddInteger(JTI); 1035 ID.AddInteger(TargetFlags); 1036 void *IP = 0; 1037 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1038 return SDValue(E, 0); 1039 1040 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1041 TargetFlags); 1042 CSEMap.InsertNode(N, IP); 1043 AllNodes.push_back(N); 1044 return SDValue(N, 0); 1045} 1046 1047SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1048 unsigned Alignment, int Offset, 1049 bool isTarget, 1050 unsigned char TargetFlags) { 1051 assert((TargetFlags == 0 || isTarget) && 1052 "Cannot set target flags on target-independent globals"); 1053 if (Alignment == 0) 1054 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1055 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1056 FoldingSetNodeID ID; 1057 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1058 ID.AddInteger(Alignment); 1059 ID.AddInteger(Offset); 1060 ID.AddPointer(C); 1061 ID.AddInteger(TargetFlags); 1062 void *IP = 0; 1063 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1064 return SDValue(E, 0); 1065 1066 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1067 Alignment, TargetFlags); 1068 CSEMap.InsertNode(N, IP); 1069 AllNodes.push_back(N); 1070 return SDValue(N, 0); 1071} 1072 1073 1074SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1075 unsigned Alignment, int Offset, 1076 bool isTarget, 1077 unsigned char TargetFlags) { 1078 assert((TargetFlags == 0 || isTarget) && 1079 "Cannot set target flags on target-independent globals"); 1080 if (Alignment == 0) 1081 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1082 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1083 FoldingSetNodeID ID; 1084 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1085 ID.AddInteger(Alignment); 1086 ID.AddInteger(Offset); 1087 C->AddSelectionDAGCSEId(ID); 1088 ID.AddInteger(TargetFlags); 1089 void *IP = 0; 1090 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1091 return SDValue(E, 0); 1092 1093 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1094 Alignment, TargetFlags); 1095 CSEMap.InsertNode(N, IP); 1096 AllNodes.push_back(N); 1097 return SDValue(N, 0); 1098} 1099 1100SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1101 FoldingSetNodeID ID; 1102 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1103 ID.AddPointer(MBB); 1104 void *IP = 0; 1105 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1106 return SDValue(E, 0); 1107 1108 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1109 CSEMap.InsertNode(N, IP); 1110 AllNodes.push_back(N); 1111 return SDValue(N, 0); 1112} 1113 1114SDValue SelectionDAG::getValueType(EVT VT) { 1115 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1116 ValueTypeNodes.size()) 1117 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1118 1119 SDNode *&N = VT.isExtended() ? 1120 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1121 1122 if (N) return SDValue(N, 0); 1123 N = new (NodeAllocator) VTSDNode(VT); 1124 AllNodes.push_back(N); 1125 return SDValue(N, 0); 1126} 1127 1128SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1129 SDNode *&N = ExternalSymbols[Sym]; 1130 if (N) return SDValue(N, 0); 1131 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1132 AllNodes.push_back(N); 1133 return SDValue(N, 0); 1134} 1135 1136SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1137 unsigned char TargetFlags) { 1138 SDNode *&N = 1139 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1140 TargetFlags)]; 1141 if (N) return SDValue(N, 0); 1142 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1143 AllNodes.push_back(N); 1144 return SDValue(N, 0); 1145} 1146 1147SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1148 if ((unsigned)Cond >= CondCodeNodes.size()) 1149 CondCodeNodes.resize(Cond+1); 1150 1151 if (CondCodeNodes[Cond] == 0) { 1152 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1153 CondCodeNodes[Cond] = N; 1154 AllNodes.push_back(N); 1155 } 1156 1157 return SDValue(CondCodeNodes[Cond], 0); 1158} 1159 1160// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1161// the shuffle mask M that point at N1 to point at N2, and indices that point 1162// N2 to point at N1. 1163static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1164 std::swap(N1, N2); 1165 int NElts = M.size(); 1166 for (int i = 0; i != NElts; ++i) { 1167 if (M[i] >= NElts) 1168 M[i] -= NElts; 1169 else if (M[i] >= 0) 1170 M[i] += NElts; 1171 } 1172} 1173 1174SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1175 SDValue N2, const int *Mask) { 1176 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1177 assert(VT.isVector() && N1.getValueType().isVector() && 1178 "Vector Shuffle VTs must be a vectors"); 1179 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1180 && "Vector Shuffle VTs must have same element type"); 1181 1182 // Canonicalize shuffle undef, undef -> undef 1183 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1184 return getUNDEF(VT); 1185 1186 // Validate that all indices in Mask are within the range of the elements 1187 // input to the shuffle. 1188 unsigned NElts = VT.getVectorNumElements(); 1189 SmallVector<int, 8> MaskVec; 1190 for (unsigned i = 0; i != NElts; ++i) { 1191 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1192 MaskVec.push_back(Mask[i]); 1193 } 1194 1195 // Canonicalize shuffle v, v -> v, undef 1196 if (N1 == N2) { 1197 N2 = getUNDEF(VT); 1198 for (unsigned i = 0; i != NElts; ++i) 1199 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1200 } 1201 1202 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1203 if (N1.getOpcode() == ISD::UNDEF) 1204 commuteShuffle(N1, N2, MaskVec); 1205 1206 // Canonicalize all index into lhs, -> shuffle lhs, undef 1207 // Canonicalize all index into rhs, -> shuffle rhs, undef 1208 bool AllLHS = true, AllRHS = true; 1209 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1210 for (unsigned i = 0; i != NElts; ++i) { 1211 if (MaskVec[i] >= (int)NElts) { 1212 if (N2Undef) 1213 MaskVec[i] = -1; 1214 else 1215 AllLHS = false; 1216 } else if (MaskVec[i] >= 0) { 1217 AllRHS = false; 1218 } 1219 } 1220 if (AllLHS && AllRHS) 1221 return getUNDEF(VT); 1222 if (AllLHS && !N2Undef) 1223 N2 = getUNDEF(VT); 1224 if (AllRHS) { 1225 N1 = getUNDEF(VT); 1226 commuteShuffle(N1, N2, MaskVec); 1227 } 1228 1229 // If Identity shuffle, or all shuffle in to undef, return that node. 1230 bool AllUndef = true; 1231 bool Identity = true; 1232 for (unsigned i = 0; i != NElts; ++i) { 1233 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1234 if (MaskVec[i] >= 0) AllUndef = false; 1235 } 1236 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1237 return N1; 1238 if (AllUndef) 1239 return getUNDEF(VT); 1240 1241 FoldingSetNodeID ID; 1242 SDValue Ops[2] = { N1, N2 }; 1243 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1244 for (unsigned i = 0; i != NElts; ++i) 1245 ID.AddInteger(MaskVec[i]); 1246 1247 void* IP = 0; 1248 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1249 return SDValue(E, 0); 1250 1251 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1252 // SDNode doesn't have access to it. This memory will be "leaked" when 1253 // the node is deallocated, but recovered when the NodeAllocator is released. 1254 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1255 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1256 1257 ShuffleVectorSDNode *N = 1258 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1259 CSEMap.InsertNode(N, IP); 1260 AllNodes.push_back(N); 1261 return SDValue(N, 0); 1262} 1263 1264SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1265 SDValue Val, SDValue DTy, 1266 SDValue STy, SDValue Rnd, SDValue Sat, 1267 ISD::CvtCode Code) { 1268 // If the src and dest types are the same and the conversion is between 1269 // integer types of the same sign or two floats, no conversion is necessary. 1270 if (DTy == STy && 1271 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1272 return Val; 1273 1274 FoldingSetNodeID ID; 1275 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1276 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1277 void* IP = 0; 1278 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1279 return SDValue(E, 0); 1280 1281 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1282 Code); 1283 CSEMap.InsertNode(N, IP); 1284 AllNodes.push_back(N); 1285 return SDValue(N, 0); 1286} 1287 1288SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1289 FoldingSetNodeID ID; 1290 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1291 ID.AddInteger(RegNo); 1292 void *IP = 0; 1293 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1294 return SDValue(E, 0); 1295 1296 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1297 CSEMap.InsertNode(N, IP); 1298 AllNodes.push_back(N); 1299 return SDValue(N, 0); 1300} 1301 1302SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1303 FoldingSetNodeID ID; 1304 SDValue Ops[] = { Root }; 1305 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1306 ID.AddPointer(Label); 1307 void *IP = 0; 1308 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1309 return SDValue(E, 0); 1310 1311 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1312 CSEMap.InsertNode(N, IP); 1313 AllNodes.push_back(N); 1314 return SDValue(N, 0); 1315} 1316 1317 1318SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1319 bool isTarget, 1320 unsigned char TargetFlags) { 1321 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1322 1323 FoldingSetNodeID ID; 1324 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1325 ID.AddPointer(BA); 1326 ID.AddInteger(TargetFlags); 1327 void *IP = 0; 1328 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1329 return SDValue(E, 0); 1330 1331 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1332 CSEMap.InsertNode(N, IP); 1333 AllNodes.push_back(N); 1334 return SDValue(N, 0); 1335} 1336 1337SDValue SelectionDAG::getSrcValue(const Value *V) { 1338 assert((!V || V->getType()->isPointerTy()) && 1339 "SrcValue is not a pointer?"); 1340 1341 FoldingSetNodeID ID; 1342 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1343 ID.AddPointer(V); 1344 1345 void *IP = 0; 1346 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1347 return SDValue(E, 0); 1348 1349 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1350 CSEMap.InsertNode(N, IP); 1351 AllNodes.push_back(N); 1352 return SDValue(N, 0); 1353} 1354 1355/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1356SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1357 FoldingSetNodeID ID; 1358 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1359 ID.AddPointer(MD); 1360 1361 void *IP = 0; 1362 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1363 return SDValue(E, 0); 1364 1365 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1366 CSEMap.InsertNode(N, IP); 1367 AllNodes.push_back(N); 1368 return SDValue(N, 0); 1369} 1370 1371 1372/// getShiftAmountOperand - Return the specified value casted to 1373/// the target's desired shift amount type. 1374SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1375 EVT OpTy = Op.getValueType(); 1376 MVT ShTy = TLI.getShiftAmountTy(); 1377 if (OpTy == ShTy || OpTy.isVector()) return Op; 1378 1379 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1380 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1381} 1382 1383/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1384/// specified value type. 1385SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1386 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1387 unsigned ByteSize = VT.getStoreSize(); 1388 const Type *Ty = VT.getTypeForEVT(*getContext()); 1389 unsigned StackAlign = 1390 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1391 1392 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1393 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1394} 1395 1396/// CreateStackTemporary - Create a stack temporary suitable for holding 1397/// either of the specified value types. 1398SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1399 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1400 VT2.getStoreSizeInBits())/8; 1401 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1402 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1403 const TargetData *TD = TLI.getTargetData(); 1404 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1405 TD->getPrefTypeAlignment(Ty2)); 1406 1407 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1408 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1409 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1410} 1411 1412SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1413 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1414 // These setcc operations always fold. 1415 switch (Cond) { 1416 default: break; 1417 case ISD::SETFALSE: 1418 case ISD::SETFALSE2: return getConstant(0, VT); 1419 case ISD::SETTRUE: 1420 case ISD::SETTRUE2: return getConstant(1, VT); 1421 1422 case ISD::SETOEQ: 1423 case ISD::SETOGT: 1424 case ISD::SETOGE: 1425 case ISD::SETOLT: 1426 case ISD::SETOLE: 1427 case ISD::SETONE: 1428 case ISD::SETO: 1429 case ISD::SETUO: 1430 case ISD::SETUEQ: 1431 case ISD::SETUNE: 1432 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1433 break; 1434 } 1435 1436 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1437 const APInt &C2 = N2C->getAPIntValue(); 1438 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1439 const APInt &C1 = N1C->getAPIntValue(); 1440 1441 switch (Cond) { 1442 default: llvm_unreachable("Unknown integer setcc!"); 1443 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1444 case ISD::SETNE: return getConstant(C1 != C2, VT); 1445 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1446 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1447 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1448 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1449 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1450 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1451 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1452 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1453 } 1454 } 1455 } 1456 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1457 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1458 // No compile time operations on this type yet. 1459 if (N1C->getValueType(0) == MVT::ppcf128) 1460 return SDValue(); 1461 1462 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1463 switch (Cond) { 1464 default: break; 1465 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1466 return getUNDEF(VT); 1467 // fall through 1468 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1469 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1470 return getUNDEF(VT); 1471 // fall through 1472 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1473 R==APFloat::cmpLessThan, VT); 1474 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1475 return getUNDEF(VT); 1476 // fall through 1477 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1478 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1479 return getUNDEF(VT); 1480 // fall through 1481 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1482 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1483 return getUNDEF(VT); 1484 // fall through 1485 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1486 R==APFloat::cmpEqual, VT); 1487 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1488 return getUNDEF(VT); 1489 // fall through 1490 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1491 R==APFloat::cmpEqual, VT); 1492 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1493 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1494 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1495 R==APFloat::cmpEqual, VT); 1496 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1497 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1498 R==APFloat::cmpLessThan, VT); 1499 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1500 R==APFloat::cmpUnordered, VT); 1501 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1502 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1503 } 1504 } else { 1505 // Ensure that the constant occurs on the RHS. 1506 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1507 } 1508 } 1509 1510 // Could not fold it. 1511 return SDValue(); 1512} 1513 1514/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1515/// use this predicate to simplify operations downstream. 1516bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1517 // This predicate is not safe for vector operations. 1518 if (Op.getValueType().isVector()) 1519 return false; 1520 1521 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1522 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1523} 1524 1525/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1526/// this predicate to simplify operations downstream. Mask is known to be zero 1527/// for bits that V cannot have. 1528bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1529 unsigned Depth) const { 1530 APInt KnownZero, KnownOne; 1531 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1532 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1533 return (KnownZero & Mask) == Mask; 1534} 1535 1536/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1537/// known to be either zero or one and return them in the KnownZero/KnownOne 1538/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1539/// processing. 1540void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1541 APInt &KnownZero, APInt &KnownOne, 1542 unsigned Depth) const { 1543 unsigned BitWidth = Mask.getBitWidth(); 1544 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1545 "Mask size mismatches value type size!"); 1546 1547 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1548 if (Depth == 6 || Mask == 0) 1549 return; // Limit search depth. 1550 1551 APInt KnownZero2, KnownOne2; 1552 1553 switch (Op.getOpcode()) { 1554 case ISD::Constant: 1555 // We know all of the bits for a constant! 1556 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1557 KnownZero = ~KnownOne & Mask; 1558 return; 1559 case ISD::AND: 1560 // If either the LHS or the RHS are Zero, the result is zero. 1561 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1562 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1563 KnownZero2, KnownOne2, Depth+1); 1564 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1565 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1566 1567 // Output known-1 bits are only known if set in both the LHS & RHS. 1568 KnownOne &= KnownOne2; 1569 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1570 KnownZero |= KnownZero2; 1571 return; 1572 case ISD::OR: 1573 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1574 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1575 KnownZero2, KnownOne2, Depth+1); 1576 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1577 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1578 1579 // Output known-0 bits are only known if clear in both the LHS & RHS. 1580 KnownZero &= KnownZero2; 1581 // Output known-1 are known to be set if set in either the LHS | RHS. 1582 KnownOne |= KnownOne2; 1583 return; 1584 case ISD::XOR: { 1585 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1586 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1587 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1588 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1589 1590 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1591 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1592 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1593 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1594 KnownZero = KnownZeroOut; 1595 return; 1596 } 1597 case ISD::MUL: { 1598 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1599 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1600 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1601 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1602 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1603 1604 // If low bits are zero in either operand, output low known-0 bits. 1605 // Also compute a conserative estimate for high known-0 bits. 1606 // More trickiness is possible, but this is sufficient for the 1607 // interesting case of alignment computation. 1608 KnownOne.clear(); 1609 unsigned TrailZ = KnownZero.countTrailingOnes() + 1610 KnownZero2.countTrailingOnes(); 1611 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1612 KnownZero2.countLeadingOnes(), 1613 BitWidth) - BitWidth; 1614 1615 TrailZ = std::min(TrailZ, BitWidth); 1616 LeadZ = std::min(LeadZ, BitWidth); 1617 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1618 APInt::getHighBitsSet(BitWidth, LeadZ); 1619 KnownZero &= Mask; 1620 return; 1621 } 1622 case ISD::UDIV: { 1623 // For the purposes of computing leading zeros we can conservatively 1624 // treat a udiv as a logical right shift by the power of 2 known to 1625 // be less than the denominator. 1626 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1627 ComputeMaskedBits(Op.getOperand(0), 1628 AllOnes, KnownZero2, KnownOne2, Depth+1); 1629 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1630 1631 KnownOne2.clear(); 1632 KnownZero2.clear(); 1633 ComputeMaskedBits(Op.getOperand(1), 1634 AllOnes, KnownZero2, KnownOne2, Depth+1); 1635 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1636 if (RHSUnknownLeadingOnes != BitWidth) 1637 LeadZ = std::min(BitWidth, 1638 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1639 1640 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1641 return; 1642 } 1643 case ISD::SELECT: 1644 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1645 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1646 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1647 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1648 1649 // Only known if known in both the LHS and RHS. 1650 KnownOne &= KnownOne2; 1651 KnownZero &= KnownZero2; 1652 return; 1653 case ISD::SELECT_CC: 1654 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1655 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1656 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1657 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1658 1659 // Only known if known in both the LHS and RHS. 1660 KnownOne &= KnownOne2; 1661 KnownZero &= KnownZero2; 1662 return; 1663 case ISD::SADDO: 1664 case ISD::UADDO: 1665 case ISD::SSUBO: 1666 case ISD::USUBO: 1667 case ISD::SMULO: 1668 case ISD::UMULO: 1669 if (Op.getResNo() != 1) 1670 return; 1671 // The boolean result conforms to getBooleanContents. Fall through. 1672 case ISD::SETCC: 1673 // If we know the result of a setcc has the top bits zero, use this info. 1674 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1675 BitWidth > 1) 1676 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1677 return; 1678 case ISD::SHL: 1679 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1680 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1681 unsigned ShAmt = SA->getZExtValue(); 1682 1683 // If the shift count is an invalid immediate, don't do anything. 1684 if (ShAmt >= BitWidth) 1685 return; 1686 1687 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1688 KnownZero, KnownOne, Depth+1); 1689 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1690 KnownZero <<= ShAmt; 1691 KnownOne <<= ShAmt; 1692 // low bits known zero. 1693 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1694 } 1695 return; 1696 case ISD::SRL: 1697 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1698 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1699 unsigned ShAmt = SA->getZExtValue(); 1700 1701 // If the shift count is an invalid immediate, don't do anything. 1702 if (ShAmt >= BitWidth) 1703 return; 1704 1705 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1706 KnownZero, KnownOne, Depth+1); 1707 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1708 KnownZero = KnownZero.lshr(ShAmt); 1709 KnownOne = KnownOne.lshr(ShAmt); 1710 1711 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1712 KnownZero |= HighBits; // High bits known zero. 1713 } 1714 return; 1715 case ISD::SRA: 1716 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1717 unsigned ShAmt = SA->getZExtValue(); 1718 1719 // If the shift count is an invalid immediate, don't do anything. 1720 if (ShAmt >= BitWidth) 1721 return; 1722 1723 APInt InDemandedMask = (Mask << ShAmt); 1724 // If any of the demanded bits are produced by the sign extension, we also 1725 // demand the input sign bit. 1726 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1727 if (HighBits.getBoolValue()) 1728 InDemandedMask |= APInt::getSignBit(BitWidth); 1729 1730 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1731 Depth+1); 1732 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1733 KnownZero = KnownZero.lshr(ShAmt); 1734 KnownOne = KnownOne.lshr(ShAmt); 1735 1736 // Handle the sign bits. 1737 APInt SignBit = APInt::getSignBit(BitWidth); 1738 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1739 1740 if (KnownZero.intersects(SignBit)) { 1741 KnownZero |= HighBits; // New bits are known zero. 1742 } else if (KnownOne.intersects(SignBit)) { 1743 KnownOne |= HighBits; // New bits are known one. 1744 } 1745 } 1746 return; 1747 case ISD::SIGN_EXTEND_INREG: { 1748 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1749 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1750 1751 // Sign extension. Compute the demanded bits in the result that are not 1752 // present in the input. 1753 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1754 1755 APInt InSignBit = APInt::getSignBit(EBits); 1756 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1757 1758 // If the sign extended bits are demanded, we know that the sign 1759 // bit is demanded. 1760 InSignBit.zext(BitWidth); 1761 if (NewBits.getBoolValue()) 1762 InputDemandedBits |= InSignBit; 1763 1764 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1765 KnownZero, KnownOne, Depth+1); 1766 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1767 1768 // If the sign bit of the input is known set or clear, then we know the 1769 // top bits of the result. 1770 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1771 KnownZero |= NewBits; 1772 KnownOne &= ~NewBits; 1773 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1774 KnownOne |= NewBits; 1775 KnownZero &= ~NewBits; 1776 } else { // Input sign bit unknown 1777 KnownZero &= ~NewBits; 1778 KnownOne &= ~NewBits; 1779 } 1780 return; 1781 } 1782 case ISD::CTTZ: 1783 case ISD::CTLZ: 1784 case ISD::CTPOP: { 1785 unsigned LowBits = Log2_32(BitWidth)+1; 1786 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1787 KnownOne.clear(); 1788 return; 1789 } 1790 case ISD::LOAD: { 1791 if (ISD::isZEXTLoad(Op.getNode())) { 1792 LoadSDNode *LD = cast<LoadSDNode>(Op); 1793 EVT VT = LD->getMemoryVT(); 1794 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1795 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1796 } 1797 return; 1798 } 1799 case ISD::ZERO_EXTEND: { 1800 EVT InVT = Op.getOperand(0).getValueType(); 1801 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1802 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1803 APInt InMask = Mask; 1804 InMask.trunc(InBits); 1805 KnownZero.trunc(InBits); 1806 KnownOne.trunc(InBits); 1807 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1808 KnownZero.zext(BitWidth); 1809 KnownOne.zext(BitWidth); 1810 KnownZero |= NewBits; 1811 return; 1812 } 1813 case ISD::SIGN_EXTEND: { 1814 EVT InVT = Op.getOperand(0).getValueType(); 1815 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1816 APInt InSignBit = APInt::getSignBit(InBits); 1817 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1818 APInt InMask = Mask; 1819 InMask.trunc(InBits); 1820 1821 // If any of the sign extended bits are demanded, we know that the sign 1822 // bit is demanded. Temporarily set this bit in the mask for our callee. 1823 if (NewBits.getBoolValue()) 1824 InMask |= InSignBit; 1825 1826 KnownZero.trunc(InBits); 1827 KnownOne.trunc(InBits); 1828 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1829 1830 // Note if the sign bit is known to be zero or one. 1831 bool SignBitKnownZero = KnownZero.isNegative(); 1832 bool SignBitKnownOne = KnownOne.isNegative(); 1833 assert(!(SignBitKnownZero && SignBitKnownOne) && 1834 "Sign bit can't be known to be both zero and one!"); 1835 1836 // If the sign bit wasn't actually demanded by our caller, we don't 1837 // want it set in the KnownZero and KnownOne result values. Reset the 1838 // mask and reapply it to the result values. 1839 InMask = Mask; 1840 InMask.trunc(InBits); 1841 KnownZero &= InMask; 1842 KnownOne &= InMask; 1843 1844 KnownZero.zext(BitWidth); 1845 KnownOne.zext(BitWidth); 1846 1847 // If the sign bit is known zero or one, the top bits match. 1848 if (SignBitKnownZero) 1849 KnownZero |= NewBits; 1850 else if (SignBitKnownOne) 1851 KnownOne |= NewBits; 1852 return; 1853 } 1854 case ISD::ANY_EXTEND: { 1855 EVT InVT = Op.getOperand(0).getValueType(); 1856 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1857 APInt InMask = Mask; 1858 InMask.trunc(InBits); 1859 KnownZero.trunc(InBits); 1860 KnownOne.trunc(InBits); 1861 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1862 KnownZero.zext(BitWidth); 1863 KnownOne.zext(BitWidth); 1864 return; 1865 } 1866 case ISD::TRUNCATE: { 1867 EVT InVT = Op.getOperand(0).getValueType(); 1868 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1869 APInt InMask = Mask; 1870 InMask.zext(InBits); 1871 KnownZero.zext(InBits); 1872 KnownOne.zext(InBits); 1873 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1874 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1875 KnownZero.trunc(BitWidth); 1876 KnownOne.trunc(BitWidth); 1877 break; 1878 } 1879 case ISD::AssertZext: { 1880 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1881 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1882 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1883 KnownOne, Depth+1); 1884 KnownZero |= (~InMask) & Mask; 1885 return; 1886 } 1887 case ISD::FGETSIGN: 1888 // All bits are zero except the low bit. 1889 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1890 return; 1891 1892 case ISD::SUB: { 1893 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1894 // We know that the top bits of C-X are clear if X contains less bits 1895 // than C (i.e. no wrap-around can happen). For example, 20-X is 1896 // positive if we can prove that X is >= 0 and < 16. 1897 if (CLHS->getAPIntValue().isNonNegative()) { 1898 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1899 // NLZ can't be BitWidth with no sign bit 1900 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1901 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1902 Depth+1); 1903 1904 // If all of the MaskV bits are known to be zero, then we know the 1905 // output top bits are zero, because we now know that the output is 1906 // from [0-C]. 1907 if ((KnownZero2 & MaskV) == MaskV) { 1908 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1909 // Top bits known zero. 1910 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1911 } 1912 } 1913 } 1914 } 1915 // fall through 1916 case ISD::ADD: { 1917 // Output known-0 bits are known if clear or set in both the low clear bits 1918 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1919 // low 3 bits clear. 1920 APInt Mask2 = APInt::getLowBitsSet(BitWidth, 1921 BitWidth - Mask.countLeadingZeros()); 1922 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1923 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1924 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1925 1926 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1927 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1928 KnownZeroOut = std::min(KnownZeroOut, 1929 KnownZero2.countTrailingOnes()); 1930 1931 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1932 return; 1933 } 1934 case ISD::SREM: 1935 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1936 const APInt &RA = Rem->getAPIntValue().abs(); 1937 if (RA.isPowerOf2()) { 1938 APInt LowBits = RA - 1; 1939 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1940 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1941 1942 // The low bits of the first operand are unchanged by the srem. 1943 KnownZero = KnownZero2 & LowBits; 1944 KnownOne = KnownOne2 & LowBits; 1945 1946 // If the first operand is non-negative or has all low bits zero, then 1947 // the upper bits are all zero. 1948 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1949 KnownZero |= ~LowBits; 1950 1951 // If the first operand is negative and not all low bits are zero, then 1952 // the upper bits are all one. 1953 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 1954 KnownOne |= ~LowBits; 1955 1956 KnownZero &= Mask; 1957 KnownOne &= Mask; 1958 1959 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1960 } 1961 } 1962 return; 1963 case ISD::UREM: { 1964 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1965 const APInt &RA = Rem->getAPIntValue(); 1966 if (RA.isPowerOf2()) { 1967 APInt LowBits = (RA - 1); 1968 APInt Mask2 = LowBits & Mask; 1969 KnownZero |= ~LowBits & Mask; 1970 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1971 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1972 break; 1973 } 1974 } 1975 1976 // Since the result is less than or equal to either operand, any leading 1977 // zero bits in either operand must also exist in the result. 1978 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1979 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1980 Depth+1); 1981 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1982 Depth+1); 1983 1984 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1985 KnownZero2.countLeadingOnes()); 1986 KnownOne.clear(); 1987 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1988 return; 1989 } 1990 default: 1991 // Allow the target to implement this method for its nodes. 1992 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1993 case ISD::INTRINSIC_WO_CHAIN: 1994 case ISD::INTRINSIC_W_CHAIN: 1995 case ISD::INTRINSIC_VOID: 1996 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 1997 Depth); 1998 } 1999 return; 2000 } 2001} 2002 2003/// ComputeNumSignBits - Return the number of times the sign bit of the 2004/// register is replicated into the other bits. We know that at least 1 bit 2005/// is always equal to the sign bit (itself), but other cases can give us 2006/// information. For example, immediately after an "SRA X, 2", we know that 2007/// the top 3 bits are all equal to each other, so we return 3. 2008unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2009 EVT VT = Op.getValueType(); 2010 assert(VT.isInteger() && "Invalid VT!"); 2011 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2012 unsigned Tmp, Tmp2; 2013 unsigned FirstAnswer = 1; 2014 2015 if (Depth == 6) 2016 return 1; // Limit search depth. 2017 2018 switch (Op.getOpcode()) { 2019 default: break; 2020 case ISD::AssertSext: 2021 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2022 return VTBits-Tmp+1; 2023 case ISD::AssertZext: 2024 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2025 return VTBits-Tmp; 2026 2027 case ISD::Constant: { 2028 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2029 // If negative, return # leading ones. 2030 if (Val.isNegative()) 2031 return Val.countLeadingOnes(); 2032 2033 // Return # leading zeros. 2034 return Val.countLeadingZeros(); 2035 } 2036 2037 case ISD::SIGN_EXTEND: 2038 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2039 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2040 2041 case ISD::SIGN_EXTEND_INREG: 2042 // Max of the input and what this extends. 2043 Tmp = 2044 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2045 Tmp = VTBits-Tmp+1; 2046 2047 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2048 return std::max(Tmp, Tmp2); 2049 2050 case ISD::SRA: 2051 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2052 // SRA X, C -> adds C sign bits. 2053 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2054 Tmp += C->getZExtValue(); 2055 if (Tmp > VTBits) Tmp = VTBits; 2056 } 2057 return Tmp; 2058 case ISD::SHL: 2059 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2060 // shl destroys sign bits. 2061 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2062 if (C->getZExtValue() >= VTBits || // Bad shift. 2063 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2064 return Tmp - C->getZExtValue(); 2065 } 2066 break; 2067 case ISD::AND: 2068 case ISD::OR: 2069 case ISD::XOR: // NOT is handled here. 2070 // Logical binary ops preserve the number of sign bits at the worst. 2071 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2072 if (Tmp != 1) { 2073 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2074 FirstAnswer = std::min(Tmp, Tmp2); 2075 // We computed what we know about the sign bits as our first 2076 // answer. Now proceed to the generic code that uses 2077 // ComputeMaskedBits, and pick whichever answer is better. 2078 } 2079 break; 2080 2081 case ISD::SELECT: 2082 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2083 if (Tmp == 1) return 1; // Early out. 2084 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2085 return std::min(Tmp, Tmp2); 2086 2087 case ISD::SADDO: 2088 case ISD::UADDO: 2089 case ISD::SSUBO: 2090 case ISD::USUBO: 2091 case ISD::SMULO: 2092 case ISD::UMULO: 2093 if (Op.getResNo() != 1) 2094 break; 2095 // The boolean result conforms to getBooleanContents. Fall through. 2096 case ISD::SETCC: 2097 // If setcc returns 0/-1, all bits are sign bits. 2098 if (TLI.getBooleanContents() == 2099 TargetLowering::ZeroOrNegativeOneBooleanContent) 2100 return VTBits; 2101 break; 2102 case ISD::ROTL: 2103 case ISD::ROTR: 2104 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2105 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2106 2107 // Handle rotate right by N like a rotate left by 32-N. 2108 if (Op.getOpcode() == ISD::ROTR) 2109 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2110 2111 // If we aren't rotating out all of the known-in sign bits, return the 2112 // number that are left. This handles rotl(sext(x), 1) for example. 2113 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2114 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2115 } 2116 break; 2117 case ISD::ADD: 2118 // Add can have at most one carry bit. Thus we know that the output 2119 // is, at worst, one more bit than the inputs. 2120 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2121 if (Tmp == 1) return 1; // Early out. 2122 2123 // Special case decrementing a value (ADD X, -1): 2124 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2125 if (CRHS->isAllOnesValue()) { 2126 APInt KnownZero, KnownOne; 2127 APInt Mask = APInt::getAllOnesValue(VTBits); 2128 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2129 2130 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2131 // sign bits set. 2132 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2133 return VTBits; 2134 2135 // If we are subtracting one from a positive number, there is no carry 2136 // out of the result. 2137 if (KnownZero.isNegative()) 2138 return Tmp; 2139 } 2140 2141 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2142 if (Tmp2 == 1) return 1; 2143 return std::min(Tmp, Tmp2)-1; 2144 break; 2145 2146 case ISD::SUB: 2147 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2148 if (Tmp2 == 1) return 1; 2149 2150 // Handle NEG. 2151 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2152 if (CLHS->isNullValue()) { 2153 APInt KnownZero, KnownOne; 2154 APInt Mask = APInt::getAllOnesValue(VTBits); 2155 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2156 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2157 // sign bits set. 2158 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2159 return VTBits; 2160 2161 // If the input is known to be positive (the sign bit is known clear), 2162 // the output of the NEG has the same number of sign bits as the input. 2163 if (KnownZero.isNegative()) 2164 return Tmp2; 2165 2166 // Otherwise, we treat this like a SUB. 2167 } 2168 2169 // Sub can have at most one carry bit. Thus we know that the output 2170 // is, at worst, one more bit than the inputs. 2171 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2172 if (Tmp == 1) return 1; // Early out. 2173 return std::min(Tmp, Tmp2)-1; 2174 break; 2175 case ISD::TRUNCATE: 2176 // FIXME: it's tricky to do anything useful for this, but it is an important 2177 // case for targets like X86. 2178 break; 2179 } 2180 2181 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2182 if (Op.getOpcode() == ISD::LOAD) { 2183 LoadSDNode *LD = cast<LoadSDNode>(Op); 2184 unsigned ExtType = LD->getExtensionType(); 2185 switch (ExtType) { 2186 default: break; 2187 case ISD::SEXTLOAD: // '17' bits known 2188 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2189 return VTBits-Tmp+1; 2190 case ISD::ZEXTLOAD: // '16' bits known 2191 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2192 return VTBits-Tmp; 2193 } 2194 } 2195 2196 // Allow the target to implement this method for its nodes. 2197 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2198 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2199 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2200 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2201 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2202 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2203 } 2204 2205 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2206 // use this information. 2207 APInt KnownZero, KnownOne; 2208 APInt Mask = APInt::getAllOnesValue(VTBits); 2209 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2210 2211 if (KnownZero.isNegative()) { // sign bit is 0 2212 Mask = KnownZero; 2213 } else if (KnownOne.isNegative()) { // sign bit is 1; 2214 Mask = KnownOne; 2215 } else { 2216 // Nothing known. 2217 return FirstAnswer; 2218 } 2219 2220 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2221 // the number of identical bits in the top of the input value. 2222 Mask = ~Mask; 2223 Mask <<= Mask.getBitWidth()-VTBits; 2224 // Return # leading zeros. We use 'min' here in case Val was zero before 2225 // shifting. We don't want to return '64' as for an i32 "0". 2226 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2227} 2228 2229bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2230 // If we're told that NaNs won't happen, assume they won't. 2231 if (FiniteOnlyFPMath()) 2232 return true; 2233 2234 // If the value is a constant, we can obviously see if it is a NaN or not. 2235 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2236 return !C->getValueAPF().isNaN(); 2237 2238 // TODO: Recognize more cases here. 2239 2240 return false; 2241} 2242 2243bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2244 // If the value is a constant, we can obviously see if it is a zero or not. 2245 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2246 return !C->isZero(); 2247 2248 // TODO: Recognize more cases here. 2249 2250 return false; 2251} 2252 2253bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2254 // Check the obvious case. 2255 if (A == B) return true; 2256 2257 // For for negative and positive zero. 2258 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2259 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2260 if (CA->isZero() && CB->isZero()) return true; 2261 2262 // Otherwise they may not be equal. 2263 return false; 2264} 2265 2266bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2267 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2268 if (!GA) return false; 2269 if (GA->getOffset() != 0) return false; 2270 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2271 if (!GV) return false; 2272 return MF->getMMI().hasDebugInfo(); 2273} 2274 2275 2276/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2277/// element of the result of the vector shuffle. 2278SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2279 unsigned i) { 2280 EVT VT = N->getValueType(0); 2281 DebugLoc dl = N->getDebugLoc(); 2282 if (N->getMaskElt(i) < 0) 2283 return getUNDEF(VT.getVectorElementType()); 2284 unsigned Index = N->getMaskElt(i); 2285 unsigned NumElems = VT.getVectorNumElements(); 2286 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2287 Index %= NumElems; 2288 2289 if (V.getOpcode() == ISD::BIT_CONVERT) { 2290 V = V.getOperand(0); 2291 EVT VVT = V.getValueType(); 2292 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2293 return SDValue(); 2294 } 2295 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2296 return (Index == 0) ? V.getOperand(0) 2297 : getUNDEF(VT.getVectorElementType()); 2298 if (V.getOpcode() == ISD::BUILD_VECTOR) 2299 return V.getOperand(Index); 2300 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2301 return getShuffleScalarElt(SVN, Index); 2302 return SDValue(); 2303} 2304 2305 2306/// getNode - Gets or creates the specified node. 2307/// 2308SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2309 FoldingSetNodeID ID; 2310 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2311 void *IP = 0; 2312 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2313 return SDValue(E, 0); 2314 2315 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2316 CSEMap.InsertNode(N, IP); 2317 2318 AllNodes.push_back(N); 2319#ifndef NDEBUG 2320 VerifyNode(N); 2321#endif 2322 return SDValue(N, 0); 2323} 2324 2325SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2326 EVT VT, SDValue Operand) { 2327 // Constant fold unary operations with an integer constant operand. 2328 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2329 const APInt &Val = C->getAPIntValue(); 2330 switch (Opcode) { 2331 default: break; 2332 case ISD::SIGN_EXTEND: 2333 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT); 2334 case ISD::ANY_EXTEND: 2335 case ISD::ZERO_EXTEND: 2336 case ISD::TRUNCATE: 2337 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT); 2338 case ISD::UINT_TO_FP: 2339 case ISD::SINT_TO_FP: { 2340 const uint64_t zero[] = {0, 0}; 2341 // No compile time operations on ppcf128. 2342 if (VT == MVT::ppcf128) break; 2343 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero)); 2344 (void)apf.convertFromAPInt(Val, 2345 Opcode==ISD::SINT_TO_FP, 2346 APFloat::rmNearestTiesToEven); 2347 return getConstantFP(apf, VT); 2348 } 2349 case ISD::BIT_CONVERT: 2350 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2351 return getConstantFP(Val.bitsToFloat(), VT); 2352 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2353 return getConstantFP(Val.bitsToDouble(), VT); 2354 break; 2355 case ISD::BSWAP: 2356 return getConstant(Val.byteSwap(), VT); 2357 case ISD::CTPOP: 2358 return getConstant(Val.countPopulation(), VT); 2359 case ISD::CTLZ: 2360 return getConstant(Val.countLeadingZeros(), VT); 2361 case ISD::CTTZ: 2362 return getConstant(Val.countTrailingZeros(), VT); 2363 } 2364 } 2365 2366 // Constant fold unary operations with a floating point constant operand. 2367 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2368 APFloat V = C->getValueAPF(); // make copy 2369 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2370 switch (Opcode) { 2371 case ISD::FNEG: 2372 V.changeSign(); 2373 return getConstantFP(V, VT); 2374 case ISD::FABS: 2375 V.clearSign(); 2376 return getConstantFP(V, VT); 2377 case ISD::FP_ROUND: 2378 case ISD::FP_EXTEND: { 2379 bool ignored; 2380 // This can return overflow, underflow, or inexact; we don't care. 2381 // FIXME need to be more flexible about rounding mode. 2382 (void)V.convert(*EVTToAPFloatSemantics(VT), 2383 APFloat::rmNearestTiesToEven, &ignored); 2384 return getConstantFP(V, VT); 2385 } 2386 case ISD::FP_TO_SINT: 2387 case ISD::FP_TO_UINT: { 2388 integerPart x[2]; 2389 bool ignored; 2390 assert(integerPartWidth >= 64); 2391 // FIXME need to be more flexible about rounding mode. 2392 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2393 Opcode==ISD::FP_TO_SINT, 2394 APFloat::rmTowardZero, &ignored); 2395 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2396 break; 2397 APInt api(VT.getSizeInBits(), 2, x); 2398 return getConstant(api, VT); 2399 } 2400 case ISD::BIT_CONVERT: 2401 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2402 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2403 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2404 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2405 break; 2406 } 2407 } 2408 } 2409 2410 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2411 switch (Opcode) { 2412 case ISD::TokenFactor: 2413 case ISD::MERGE_VALUES: 2414 case ISD::CONCAT_VECTORS: 2415 return Operand; // Factor, merge or concat of one node? No need. 2416 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2417 case ISD::FP_EXTEND: 2418 assert(VT.isFloatingPoint() && 2419 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2420 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2421 assert((!VT.isVector() || 2422 VT.getVectorNumElements() == 2423 Operand.getValueType().getVectorNumElements()) && 2424 "Vector element count mismatch!"); 2425 if (Operand.getOpcode() == ISD::UNDEF) 2426 return getUNDEF(VT); 2427 break; 2428 case ISD::SIGN_EXTEND: 2429 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2430 "Invalid SIGN_EXTEND!"); 2431 if (Operand.getValueType() == VT) return Operand; // noop extension 2432 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2433 "Invalid sext node, dst < src!"); 2434 assert((!VT.isVector() || 2435 VT.getVectorNumElements() == 2436 Operand.getValueType().getVectorNumElements()) && 2437 "Vector element count mismatch!"); 2438 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2439 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2440 break; 2441 case ISD::ZERO_EXTEND: 2442 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2443 "Invalid ZERO_EXTEND!"); 2444 if (Operand.getValueType() == VT) return Operand; // noop extension 2445 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2446 "Invalid zext node, dst < src!"); 2447 assert((!VT.isVector() || 2448 VT.getVectorNumElements() == 2449 Operand.getValueType().getVectorNumElements()) && 2450 "Vector element count mismatch!"); 2451 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2452 return getNode(ISD::ZERO_EXTEND, DL, VT, 2453 Operand.getNode()->getOperand(0)); 2454 break; 2455 case ISD::ANY_EXTEND: 2456 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2457 "Invalid ANY_EXTEND!"); 2458 if (Operand.getValueType() == VT) return Operand; // noop extension 2459 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2460 "Invalid anyext node, dst < src!"); 2461 assert((!VT.isVector() || 2462 VT.getVectorNumElements() == 2463 Operand.getValueType().getVectorNumElements()) && 2464 "Vector element count mismatch!"); 2465 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2466 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2467 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2468 break; 2469 case ISD::TRUNCATE: 2470 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2471 "Invalid TRUNCATE!"); 2472 if (Operand.getValueType() == VT) return Operand; // noop truncate 2473 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2474 "Invalid truncate node, src < dst!"); 2475 assert((!VT.isVector() || 2476 VT.getVectorNumElements() == 2477 Operand.getValueType().getVectorNumElements()) && 2478 "Vector element count mismatch!"); 2479 if (OpOpcode == ISD::TRUNCATE) 2480 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2481 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2482 OpOpcode == ISD::ANY_EXTEND) { 2483 // If the source is smaller than the dest, we still need an extend. 2484 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2485 .bitsLT(VT.getScalarType())) 2486 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2487 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2488 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2489 else 2490 return Operand.getNode()->getOperand(0); 2491 } 2492 break; 2493 case ISD::BIT_CONVERT: 2494 // Basic sanity checking. 2495 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2496 && "Cannot BIT_CONVERT between types of different sizes!"); 2497 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2498 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2499 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2500 if (OpOpcode == ISD::UNDEF) 2501 return getUNDEF(VT); 2502 break; 2503 case ISD::SCALAR_TO_VECTOR: 2504 assert(VT.isVector() && !Operand.getValueType().isVector() && 2505 (VT.getVectorElementType() == Operand.getValueType() || 2506 (VT.getVectorElementType().isInteger() && 2507 Operand.getValueType().isInteger() && 2508 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2509 "Illegal SCALAR_TO_VECTOR node!"); 2510 if (OpOpcode == ISD::UNDEF) 2511 return getUNDEF(VT); 2512 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2513 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2514 isa<ConstantSDNode>(Operand.getOperand(1)) && 2515 Operand.getConstantOperandVal(1) == 0 && 2516 Operand.getOperand(0).getValueType() == VT) 2517 return Operand.getOperand(0); 2518 break; 2519 case ISD::FNEG: 2520 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2521 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2522 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2523 Operand.getNode()->getOperand(0)); 2524 if (OpOpcode == ISD::FNEG) // --X -> X 2525 return Operand.getNode()->getOperand(0); 2526 break; 2527 case ISD::FABS: 2528 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2529 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2530 break; 2531 } 2532 2533 SDNode *N; 2534 SDVTList VTs = getVTList(VT); 2535 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2536 FoldingSetNodeID ID; 2537 SDValue Ops[1] = { Operand }; 2538 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2539 void *IP = 0; 2540 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2541 return SDValue(E, 0); 2542 2543 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2544 CSEMap.InsertNode(N, IP); 2545 } else { 2546 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2547 } 2548 2549 AllNodes.push_back(N); 2550#ifndef NDEBUG 2551 VerifyNode(N); 2552#endif 2553 return SDValue(N, 0); 2554} 2555 2556SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2557 EVT VT, 2558 ConstantSDNode *Cst1, 2559 ConstantSDNode *Cst2) { 2560 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2561 2562 switch (Opcode) { 2563 case ISD::ADD: return getConstant(C1 + C2, VT); 2564 case ISD::SUB: return getConstant(C1 - C2, VT); 2565 case ISD::MUL: return getConstant(C1 * C2, VT); 2566 case ISD::UDIV: 2567 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2568 break; 2569 case ISD::UREM: 2570 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2571 break; 2572 case ISD::SDIV: 2573 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2574 break; 2575 case ISD::SREM: 2576 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2577 break; 2578 case ISD::AND: return getConstant(C1 & C2, VT); 2579 case ISD::OR: return getConstant(C1 | C2, VT); 2580 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2581 case ISD::SHL: return getConstant(C1 << C2, VT); 2582 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2583 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2584 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2585 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2586 default: break; 2587 } 2588 2589 return SDValue(); 2590} 2591 2592SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2593 SDValue N1, SDValue N2) { 2594 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2595 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2596 switch (Opcode) { 2597 default: break; 2598 case ISD::TokenFactor: 2599 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2600 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2601 // Fold trivial token factors. 2602 if (N1.getOpcode() == ISD::EntryToken) return N2; 2603 if (N2.getOpcode() == ISD::EntryToken) return N1; 2604 if (N1 == N2) return N1; 2605 break; 2606 case ISD::CONCAT_VECTORS: 2607 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2608 // one big BUILD_VECTOR. 2609 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2610 N2.getOpcode() == ISD::BUILD_VECTOR) { 2611 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2612 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2613 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2614 } 2615 break; 2616 case ISD::AND: 2617 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2618 N1.getValueType() == VT && "Binary operator types must match!"); 2619 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2620 // worth handling here. 2621 if (N2C && N2C->isNullValue()) 2622 return N2; 2623 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2624 return N1; 2625 break; 2626 case ISD::OR: 2627 case ISD::XOR: 2628 case ISD::ADD: 2629 case ISD::SUB: 2630 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2631 N1.getValueType() == VT && "Binary operator types must match!"); 2632 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2633 // it's worth handling here. 2634 if (N2C && N2C->isNullValue()) 2635 return N1; 2636 break; 2637 case ISD::UDIV: 2638 case ISD::UREM: 2639 case ISD::MULHU: 2640 case ISD::MULHS: 2641 case ISD::MUL: 2642 case ISD::SDIV: 2643 case ISD::SREM: 2644 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2645 // fall through 2646 case ISD::FADD: 2647 case ISD::FSUB: 2648 case ISD::FMUL: 2649 case ISD::FDIV: 2650 case ISD::FREM: 2651 if (UnsafeFPMath) { 2652 if (Opcode == ISD::FADD) { 2653 // 0+x --> x 2654 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2655 if (CFP->getValueAPF().isZero()) 2656 return N2; 2657 // x+0 --> x 2658 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2659 if (CFP->getValueAPF().isZero()) 2660 return N1; 2661 } else if (Opcode == ISD::FSUB) { 2662 // x-0 --> x 2663 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2664 if (CFP->getValueAPF().isZero()) 2665 return N1; 2666 } 2667 } 2668 assert(N1.getValueType() == N2.getValueType() && 2669 N1.getValueType() == VT && "Binary operator types must match!"); 2670 break; 2671 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2672 assert(N1.getValueType() == VT && 2673 N1.getValueType().isFloatingPoint() && 2674 N2.getValueType().isFloatingPoint() && 2675 "Invalid FCOPYSIGN!"); 2676 break; 2677 case ISD::SHL: 2678 case ISD::SRA: 2679 case ISD::SRL: 2680 case ISD::ROTL: 2681 case ISD::ROTR: 2682 assert(VT == N1.getValueType() && 2683 "Shift operators return type must be the same as their first arg"); 2684 assert(VT.isInteger() && N2.getValueType().isInteger() && 2685 "Shifts only work on integers"); 2686 2687 // Always fold shifts of i1 values so the code generator doesn't need to 2688 // handle them. Since we know the size of the shift has to be less than the 2689 // size of the value, the shift/rotate count is guaranteed to be zero. 2690 if (VT == MVT::i1) 2691 return N1; 2692 if (N2C && N2C->isNullValue()) 2693 return N1; 2694 break; 2695 case ISD::FP_ROUND_INREG: { 2696 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2697 assert(VT == N1.getValueType() && "Not an inreg round!"); 2698 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2699 "Cannot FP_ROUND_INREG integer types"); 2700 assert(EVT.isVector() == VT.isVector() && 2701 "FP_ROUND_INREG type should be vector iff the operand " 2702 "type is vector!"); 2703 assert((!EVT.isVector() || 2704 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2705 "Vector element counts must match in FP_ROUND_INREG"); 2706 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2707 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2708 break; 2709 } 2710 case ISD::FP_ROUND: 2711 assert(VT.isFloatingPoint() && 2712 N1.getValueType().isFloatingPoint() && 2713 VT.bitsLE(N1.getValueType()) && 2714 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2715 if (N1.getValueType() == VT) return N1; // noop conversion. 2716 break; 2717 case ISD::AssertSext: 2718 case ISD::AssertZext: { 2719 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2720 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2721 assert(VT.isInteger() && EVT.isInteger() && 2722 "Cannot *_EXTEND_INREG FP types"); 2723 assert(!EVT.isVector() && 2724 "AssertSExt/AssertZExt type should be the vector element type " 2725 "rather than the vector type!"); 2726 assert(EVT.bitsLE(VT) && "Not extending!"); 2727 if (VT == EVT) return N1; // noop assertion. 2728 break; 2729 } 2730 case ISD::SIGN_EXTEND_INREG: { 2731 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2732 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2733 assert(VT.isInteger() && EVT.isInteger() && 2734 "Cannot *_EXTEND_INREG FP types"); 2735 assert(EVT.isVector() == VT.isVector() && 2736 "SIGN_EXTEND_INREG type should be vector iff the operand " 2737 "type is vector!"); 2738 assert((!EVT.isVector() || 2739 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2740 "Vector element counts must match in SIGN_EXTEND_INREG"); 2741 assert(EVT.bitsLE(VT) && "Not extending!"); 2742 if (EVT == VT) return N1; // Not actually extending 2743 2744 if (N1C) { 2745 APInt Val = N1C->getAPIntValue(); 2746 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2747 Val <<= Val.getBitWidth()-FromBits; 2748 Val = Val.ashr(Val.getBitWidth()-FromBits); 2749 return getConstant(Val, VT); 2750 } 2751 break; 2752 } 2753 case ISD::EXTRACT_VECTOR_ELT: 2754 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2755 if (N1.getOpcode() == ISD::UNDEF) 2756 return getUNDEF(VT); 2757 2758 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2759 // expanding copies of large vectors from registers. 2760 if (N2C && 2761 N1.getOpcode() == ISD::CONCAT_VECTORS && 2762 N1.getNumOperands() > 0) { 2763 unsigned Factor = 2764 N1.getOperand(0).getValueType().getVectorNumElements(); 2765 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2766 N1.getOperand(N2C->getZExtValue() / Factor), 2767 getConstant(N2C->getZExtValue() % Factor, 2768 N2.getValueType())); 2769 } 2770 2771 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2772 // expanding large vector constants. 2773 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2774 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2775 EVT VEltTy = N1.getValueType().getVectorElementType(); 2776 if (Elt.getValueType() != VEltTy) { 2777 // If the vector element type is not legal, the BUILD_VECTOR operands 2778 // are promoted and implicitly truncated. Make that explicit here. 2779 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2780 } 2781 if (VT != VEltTy) { 2782 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2783 // result is implicitly extended. 2784 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2785 } 2786 return Elt; 2787 } 2788 2789 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2790 // operations are lowered to scalars. 2791 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2792 // If the indices are the same, return the inserted element else 2793 // if the indices are known different, extract the element from 2794 // the original vector. 2795 SDValue N1Op2 = N1.getOperand(2); 2796 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2797 2798 if (N1Op2C && N2C) { 2799 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2800 if (VT == N1.getOperand(1).getValueType()) 2801 return N1.getOperand(1); 2802 else 2803 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2804 } 2805 2806 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2807 } 2808 } 2809 break; 2810 case ISD::EXTRACT_ELEMENT: 2811 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2812 assert(!N1.getValueType().isVector() && !VT.isVector() && 2813 (N1.getValueType().isInteger() == VT.isInteger()) && 2814 "Wrong types for EXTRACT_ELEMENT!"); 2815 2816 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2817 // 64-bit integers into 32-bit parts. Instead of building the extract of 2818 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2819 if (N1.getOpcode() == ISD::BUILD_PAIR) 2820 return N1.getOperand(N2C->getZExtValue()); 2821 2822 // EXTRACT_ELEMENT of a constant int is also very common. 2823 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2824 unsigned ElementSize = VT.getSizeInBits(); 2825 unsigned Shift = ElementSize * N2C->getZExtValue(); 2826 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2827 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2828 } 2829 break; 2830 case ISD::EXTRACT_SUBVECTOR: 2831 if (N1.getValueType() == VT) // Trivial extraction. 2832 return N1; 2833 break; 2834 } 2835 2836 if (N1C) { 2837 if (N2C) { 2838 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2839 if (SV.getNode()) return SV; 2840 } else { // Cannonicalize constant to RHS if commutative 2841 if (isCommutativeBinOp(Opcode)) { 2842 std::swap(N1C, N2C); 2843 std::swap(N1, N2); 2844 } 2845 } 2846 } 2847 2848 // Constant fold FP operations. 2849 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2850 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2851 if (N1CFP) { 2852 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2853 // Cannonicalize constant to RHS if commutative 2854 std::swap(N1CFP, N2CFP); 2855 std::swap(N1, N2); 2856 } else if (N2CFP && VT != MVT::ppcf128) { 2857 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2858 APFloat::opStatus s; 2859 switch (Opcode) { 2860 case ISD::FADD: 2861 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2862 if (s != APFloat::opInvalidOp) 2863 return getConstantFP(V1, VT); 2864 break; 2865 case ISD::FSUB: 2866 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2867 if (s!=APFloat::opInvalidOp) 2868 return getConstantFP(V1, VT); 2869 break; 2870 case ISD::FMUL: 2871 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2872 if (s!=APFloat::opInvalidOp) 2873 return getConstantFP(V1, VT); 2874 break; 2875 case ISD::FDIV: 2876 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2877 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2878 return getConstantFP(V1, VT); 2879 break; 2880 case ISD::FREM : 2881 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2882 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2883 return getConstantFP(V1, VT); 2884 break; 2885 case ISD::FCOPYSIGN: 2886 V1.copySign(V2); 2887 return getConstantFP(V1, VT); 2888 default: break; 2889 } 2890 } 2891 } 2892 2893 // Canonicalize an UNDEF to the RHS, even over a constant. 2894 if (N1.getOpcode() == ISD::UNDEF) { 2895 if (isCommutativeBinOp(Opcode)) { 2896 std::swap(N1, N2); 2897 } else { 2898 switch (Opcode) { 2899 case ISD::FP_ROUND_INREG: 2900 case ISD::SIGN_EXTEND_INREG: 2901 case ISD::SUB: 2902 case ISD::FSUB: 2903 case ISD::FDIV: 2904 case ISD::FREM: 2905 case ISD::SRA: 2906 return N1; // fold op(undef, arg2) -> undef 2907 case ISD::UDIV: 2908 case ISD::SDIV: 2909 case ISD::UREM: 2910 case ISD::SREM: 2911 case ISD::SRL: 2912 case ISD::SHL: 2913 if (!VT.isVector()) 2914 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2915 // For vectors, we can't easily build an all zero vector, just return 2916 // the LHS. 2917 return N2; 2918 } 2919 } 2920 } 2921 2922 // Fold a bunch of operators when the RHS is undef. 2923 if (N2.getOpcode() == ISD::UNDEF) { 2924 switch (Opcode) { 2925 case ISD::XOR: 2926 if (N1.getOpcode() == ISD::UNDEF) 2927 // Handle undef ^ undef -> 0 special case. This is a common 2928 // idiom (misuse). 2929 return getConstant(0, VT); 2930 // fallthrough 2931 case ISD::ADD: 2932 case ISD::ADDC: 2933 case ISD::ADDE: 2934 case ISD::SUB: 2935 case ISD::UDIV: 2936 case ISD::SDIV: 2937 case ISD::UREM: 2938 case ISD::SREM: 2939 return N2; // fold op(arg1, undef) -> undef 2940 case ISD::FADD: 2941 case ISD::FSUB: 2942 case ISD::FMUL: 2943 case ISD::FDIV: 2944 case ISD::FREM: 2945 if (UnsafeFPMath) 2946 return N2; 2947 break; 2948 case ISD::MUL: 2949 case ISD::AND: 2950 case ISD::SRL: 2951 case ISD::SHL: 2952 if (!VT.isVector()) 2953 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2954 // For vectors, we can't easily build an all zero vector, just return 2955 // the LHS. 2956 return N1; 2957 case ISD::OR: 2958 if (!VT.isVector()) 2959 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2960 // For vectors, we can't easily build an all one vector, just return 2961 // the LHS. 2962 return N1; 2963 case ISD::SRA: 2964 return N1; 2965 } 2966 } 2967 2968 // Memoize this node if possible. 2969 SDNode *N; 2970 SDVTList VTs = getVTList(VT); 2971 if (VT != MVT::Flag) { 2972 SDValue Ops[] = { N1, N2 }; 2973 FoldingSetNodeID ID; 2974 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2975 void *IP = 0; 2976 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2977 return SDValue(E, 0); 2978 2979 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2980 CSEMap.InsertNode(N, IP); 2981 } else { 2982 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2983 } 2984 2985 AllNodes.push_back(N); 2986#ifndef NDEBUG 2987 VerifyNode(N); 2988#endif 2989 return SDValue(N, 0); 2990} 2991 2992SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2993 SDValue N1, SDValue N2, SDValue N3) { 2994 // Perform various simplifications. 2995 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2996 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2997 switch (Opcode) { 2998 case ISD::CONCAT_VECTORS: 2999 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3000 // one big BUILD_VECTOR. 3001 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3002 N2.getOpcode() == ISD::BUILD_VECTOR && 3003 N3.getOpcode() == ISD::BUILD_VECTOR) { 3004 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 3005 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 3006 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 3007 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3008 } 3009 break; 3010 case ISD::SETCC: { 3011 // Use FoldSetCC to simplify SETCC's. 3012 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3013 if (Simp.getNode()) return Simp; 3014 break; 3015 } 3016 case ISD::SELECT: 3017 if (N1C) { 3018 if (N1C->getZExtValue()) 3019 return N2; // select true, X, Y -> X 3020 else 3021 return N3; // select false, X, Y -> Y 3022 } 3023 3024 if (N2 == N3) return N2; // select C, X, X -> X 3025 break; 3026 case ISD::BRCOND: 3027 if (N2C) { 3028 if (N2C->getZExtValue()) // Unconditional branch 3029 return getNode(ISD::BR, DL, MVT::Other, N1, N3); 3030 else 3031 return N1; // Never-taken branch 3032 } 3033 break; 3034 case ISD::VECTOR_SHUFFLE: 3035 llvm_unreachable("should use getVectorShuffle constructor!"); 3036 break; 3037 case ISD::BIT_CONVERT: 3038 // Fold bit_convert nodes from a type to themselves. 3039 if (N1.getValueType() == VT) 3040 return N1; 3041 break; 3042 } 3043 3044 // Memoize node if it doesn't produce a flag. 3045 SDNode *N; 3046 SDVTList VTs = getVTList(VT); 3047 if (VT != MVT::Flag) { 3048 SDValue Ops[] = { N1, N2, N3 }; 3049 FoldingSetNodeID ID; 3050 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3051 void *IP = 0; 3052 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3053 return SDValue(E, 0); 3054 3055 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3056 CSEMap.InsertNode(N, IP); 3057 } else { 3058 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3059 } 3060 3061 AllNodes.push_back(N); 3062#ifndef NDEBUG 3063 VerifyNode(N); 3064#endif 3065 return SDValue(N, 0); 3066} 3067 3068SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3069 SDValue N1, SDValue N2, SDValue N3, 3070 SDValue N4) { 3071 SDValue Ops[] = { N1, N2, N3, N4 }; 3072 return getNode(Opcode, DL, VT, Ops, 4); 3073} 3074 3075SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3076 SDValue N1, SDValue N2, SDValue N3, 3077 SDValue N4, SDValue N5) { 3078 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3079 return getNode(Opcode, DL, VT, Ops, 5); 3080} 3081 3082/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3083/// the incoming stack arguments to be loaded from the stack. 3084SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3085 SmallVector<SDValue, 8> ArgChains; 3086 3087 // Include the original chain at the beginning of the list. When this is 3088 // used by target LowerCall hooks, this helps legalize find the 3089 // CALLSEQ_BEGIN node. 3090 ArgChains.push_back(Chain); 3091 3092 // Add a chain value for each stack argument. 3093 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3094 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3095 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3096 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3097 if (FI->getIndex() < 0) 3098 ArgChains.push_back(SDValue(L, 1)); 3099 3100 // Build a tokenfactor for all the chains. 3101 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3102 &ArgChains[0], ArgChains.size()); 3103} 3104 3105/// getMemsetValue - Vectorized representation of the memset value 3106/// operand. 3107static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3108 DebugLoc dl) { 3109 assert(Value.getOpcode() != ISD::UNDEF); 3110 3111 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3112 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3113 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3114 unsigned Shift = 8; 3115 for (unsigned i = NumBits; i > 8; i >>= 1) { 3116 Val = (Val << Shift) | Val; 3117 Shift <<= 1; 3118 } 3119 if (VT.isInteger()) 3120 return DAG.getConstant(Val, VT); 3121 return DAG.getConstantFP(APFloat(Val), VT); 3122 } 3123 3124 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3125 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3126 unsigned Shift = 8; 3127 for (unsigned i = NumBits; i > 8; i >>= 1) { 3128 Value = DAG.getNode(ISD::OR, dl, VT, 3129 DAG.getNode(ISD::SHL, dl, VT, Value, 3130 DAG.getConstant(Shift, 3131 TLI.getShiftAmountTy())), 3132 Value); 3133 Shift <<= 1; 3134 } 3135 3136 return Value; 3137} 3138 3139/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3140/// used when a memcpy is turned into a memset when the source is a constant 3141/// string ptr. 3142static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3143 const TargetLowering &TLI, 3144 std::string &Str, unsigned Offset) { 3145 // Handle vector with all elements zero. 3146 if (Str.empty()) { 3147 if (VT.isInteger()) 3148 return DAG.getConstant(0, VT); 3149 else if (VT.getSimpleVT().SimpleTy == MVT::f32 || 3150 VT.getSimpleVT().SimpleTy == MVT::f64) 3151 return DAG.getConstantFP(0.0, VT); 3152 else if (VT.isVector()) { 3153 unsigned NumElts = VT.getVectorNumElements(); 3154 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3155 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3156 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3157 EltVT, NumElts))); 3158 } else 3159 llvm_unreachable("Expected type!"); 3160 } 3161 3162 assert(!VT.isVector() && "Can't handle vector type here!"); 3163 unsigned NumBits = VT.getSizeInBits(); 3164 unsigned MSB = NumBits / 8; 3165 uint64_t Val = 0; 3166 if (TLI.isLittleEndian()) 3167 Offset = Offset + MSB - 1; 3168 for (unsigned i = 0; i != MSB; ++i) { 3169 Val = (Val << 8) | (unsigned char)Str[Offset]; 3170 Offset += TLI.isLittleEndian() ? -1 : 1; 3171 } 3172 return DAG.getConstant(Val, VT); 3173} 3174 3175/// getMemBasePlusOffset - Returns base and offset node for the 3176/// 3177static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3178 SelectionDAG &DAG) { 3179 EVT VT = Base.getValueType(); 3180 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3181 VT, Base, DAG.getConstant(Offset, VT)); 3182} 3183 3184/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3185/// 3186static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3187 unsigned SrcDelta = 0; 3188 GlobalAddressSDNode *G = NULL; 3189 if (Src.getOpcode() == ISD::GlobalAddress) 3190 G = cast<GlobalAddressSDNode>(Src); 3191 else if (Src.getOpcode() == ISD::ADD && 3192 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3193 Src.getOperand(1).getOpcode() == ISD::Constant) { 3194 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3195 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3196 } 3197 if (!G) 3198 return false; 3199 3200 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3201 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3202 return true; 3203 3204 return false; 3205} 3206 3207/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3208/// to replace the memset / memcpy. Return true if the number of memory ops 3209/// is below the threshold. It returns the types of the sequence of 3210/// memory ops to perform memset / memcpy by reference. 3211static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3212 unsigned Limit, uint64_t Size, 3213 unsigned DstAlign, unsigned SrcAlign, 3214 bool NonScalarIntSafe, 3215 bool MemcpyStrSrc, 3216 SelectionDAG &DAG, 3217 const TargetLowering &TLI) { 3218 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3219 "Expecting memcpy / memset source to meet alignment requirement!"); 3220 // If 'SrcAlign' is zero, that means the memory operation does not need load 3221 // the value, i.e. memset or memcpy from constant string. Otherwise, it's 3222 // the inferred alignment of the source. 'DstAlign', on the other hand, is the 3223 // specified alignment of the memory operation. If it is zero, that means 3224 // it's possible to change the alignment of the destination. 'MemcpyStrSrc' 3225 // indicates whether the memcpy source is constant so it does not need to be 3226 // loaded. 3227 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3228 NonScalarIntSafe, MemcpyStrSrc, 3229 DAG.getMachineFunction()); 3230 3231 if (VT == MVT::Other) { 3232 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3233 TLI.allowsUnalignedMemoryAccesses(VT)) { 3234 VT = TLI.getPointerTy(); 3235 } else { 3236 switch (DstAlign & 7) { 3237 case 0: VT = MVT::i64; break; 3238 case 4: VT = MVT::i32; break; 3239 case 2: VT = MVT::i16; break; 3240 default: VT = MVT::i8; break; 3241 } 3242 } 3243 3244 MVT LVT = MVT::i64; 3245 while (!TLI.isTypeLegal(LVT)) 3246 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3247 assert(LVT.isInteger()); 3248 3249 if (VT.bitsGT(LVT)) 3250 VT = LVT; 3251 } 3252 3253 unsigned NumMemOps = 0; 3254 while (Size != 0) { 3255 unsigned VTSize = VT.getSizeInBits() / 8; 3256 while (VTSize > Size) { 3257 // For now, only use non-vector load / store's for the left-over pieces. 3258 if (VT.isVector() || VT.isFloatingPoint()) { 3259 VT = MVT::i64; 3260 while (!TLI.isTypeLegal(VT)) 3261 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3262 VTSize = VT.getSizeInBits() / 8; 3263 } else { 3264 // This can result in a type that is not legal on the target, e.g. 3265 // 1 or 2 bytes on PPC. 3266 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3267 VTSize >>= 1; 3268 } 3269 } 3270 3271 if (++NumMemOps > Limit) 3272 return false; 3273 MemOps.push_back(VT); 3274 Size -= VTSize; 3275 } 3276 3277 return true; 3278} 3279 3280static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3281 SDValue Chain, SDValue Dst, 3282 SDValue Src, uint64_t Size, 3283 unsigned Align, bool isVol, 3284 bool AlwaysInline, 3285 const Value *DstSV, uint64_t DstSVOff, 3286 const Value *SrcSV, uint64_t SrcSVOff) { 3287 // Turn a memcpy of undef to nop. 3288 if (Src.getOpcode() == ISD::UNDEF) 3289 return Chain; 3290 3291 // Expand memcpy to a series of load and store ops if the size operand falls 3292 // below a certain threshold. 3293 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3294 std::vector<EVT> MemOps; 3295 bool DstAlignCanChange = false; 3296 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3297 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3298 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3299 DstAlignCanChange = true; 3300 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3301 if (Align > SrcAlign) 3302 SrcAlign = Align; 3303 std::string Str; 3304 bool CopyFromStr = isMemSrcFromString(Src, Str); 3305 bool isZeroStr = CopyFromStr && Str.empty(); 3306 uint64_t Limit = -1ULL; 3307 if (!AlwaysInline) 3308 Limit = TLI.getMaxStoresPerMemcpy(); 3309 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3310 (DstAlignCanChange ? 0 : Align), 3311 (isZeroStr ? 0 : SrcAlign), 3312 true, CopyFromStr, DAG, TLI)) 3313 return SDValue(); 3314 3315 if (DstAlignCanChange) { 3316 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3317 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3318 if (NewAlign > Align) { 3319 // Give the stack frame object a larger alignment if needed. 3320 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3321 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3322 Align = NewAlign; 3323 } 3324 } 3325 3326 SmallVector<SDValue, 8> OutChains; 3327 unsigned NumMemOps = MemOps.size(); 3328 uint64_t SrcOff = 0, DstOff = 0; 3329 for (unsigned i = 0; i != NumMemOps; ++i) { 3330 EVT VT = MemOps[i]; 3331 unsigned VTSize = VT.getSizeInBits() / 8; 3332 SDValue Value, Store; 3333 3334 if (CopyFromStr && 3335 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3336 // It's unlikely a store of a vector immediate can be done in a single 3337 // instruction. It would require a load from a constantpool first. 3338 // We only handle zero vectors here. 3339 // FIXME: Handle other cases where store of vector immediate is done in 3340 // a single instruction. 3341 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3342 Store = DAG.getStore(Chain, dl, Value, 3343 getMemBasePlusOffset(Dst, DstOff, DAG), 3344 DstSV, DstSVOff + DstOff, isVol, false, Align); 3345 } else { 3346 // The type might not be legal for the target. This should only happen 3347 // if the type is smaller than a legal type, as on PPC, so the right 3348 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3349 // to Load/Store if NVT==VT. 3350 // FIXME does the case above also need this? 3351 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3352 assert(NVT.bitsGE(VT)); 3353 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3354 getMemBasePlusOffset(Src, SrcOff, DAG), 3355 SrcSV, SrcSVOff + SrcOff, VT, isVol, false, 3356 MinAlign(SrcAlign, SrcOff)); 3357 Store = DAG.getTruncStore(Chain, dl, Value, 3358 getMemBasePlusOffset(Dst, DstOff, DAG), 3359 DstSV, DstSVOff + DstOff, VT, isVol, false, 3360 Align); 3361 } 3362 OutChains.push_back(Store); 3363 SrcOff += VTSize; 3364 DstOff += VTSize; 3365 } 3366 3367 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3368 &OutChains[0], OutChains.size()); 3369} 3370 3371static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3372 SDValue Chain, SDValue Dst, 3373 SDValue Src, uint64_t Size, 3374 unsigned Align, bool isVol, 3375 bool AlwaysInline, 3376 const Value *DstSV, uint64_t DstSVOff, 3377 const Value *SrcSV, uint64_t SrcSVOff) { 3378 // Turn a memmove of undef to nop. 3379 if (Src.getOpcode() == ISD::UNDEF) 3380 return Chain; 3381 3382 // Expand memmove to a series of load and store ops if the size operand falls 3383 // below a certain threshold. 3384 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3385 std::vector<EVT> MemOps; 3386 uint64_t Limit = -1ULL; 3387 if (!AlwaysInline) 3388 Limit = TLI.getMaxStoresPerMemmove(); 3389 bool DstAlignCanChange = false; 3390 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3391 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3392 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3393 DstAlignCanChange = true; 3394 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3395 if (Align > SrcAlign) 3396 SrcAlign = Align; 3397 3398 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3399 (DstAlignCanChange ? 0 : Align), 3400 SrcAlign, true, false, DAG, TLI)) 3401 return SDValue(); 3402 3403 if (DstAlignCanChange) { 3404 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3405 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3406 if (NewAlign > Align) { 3407 // Give the stack frame object a larger alignment if needed. 3408 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3409 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3410 Align = NewAlign; 3411 } 3412 } 3413 3414 uint64_t SrcOff = 0, DstOff = 0; 3415 SmallVector<SDValue, 8> LoadValues; 3416 SmallVector<SDValue, 8> LoadChains; 3417 SmallVector<SDValue, 8> OutChains; 3418 unsigned NumMemOps = MemOps.size(); 3419 for (unsigned i = 0; i < NumMemOps; i++) { 3420 EVT VT = MemOps[i]; 3421 unsigned VTSize = VT.getSizeInBits() / 8; 3422 SDValue Value, Store; 3423 3424 Value = DAG.getLoad(VT, dl, Chain, 3425 getMemBasePlusOffset(Src, SrcOff, DAG), 3426 SrcSV, SrcSVOff + SrcOff, isVol, false, SrcAlign); 3427 LoadValues.push_back(Value); 3428 LoadChains.push_back(Value.getValue(1)); 3429 SrcOff += VTSize; 3430 } 3431 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3432 &LoadChains[0], LoadChains.size()); 3433 OutChains.clear(); 3434 for (unsigned i = 0; i < NumMemOps; i++) { 3435 EVT VT = MemOps[i]; 3436 unsigned VTSize = VT.getSizeInBits() / 8; 3437 SDValue Value, Store; 3438 3439 Store = DAG.getStore(Chain, dl, LoadValues[i], 3440 getMemBasePlusOffset(Dst, DstOff, DAG), 3441 DstSV, DstSVOff + DstOff, isVol, false, Align); 3442 OutChains.push_back(Store); 3443 DstOff += VTSize; 3444 } 3445 3446 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3447 &OutChains[0], OutChains.size()); 3448} 3449 3450static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3451 SDValue Chain, SDValue Dst, 3452 SDValue Src, uint64_t Size, 3453 unsigned Align, bool isVol, 3454 const Value *DstSV, uint64_t DstSVOff) { 3455 // Turn a memset of undef to nop. 3456 if (Src.getOpcode() == ISD::UNDEF) 3457 return Chain; 3458 3459 // Expand memset to a series of load/store ops if the size operand 3460 // falls below a certain threshold. 3461 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3462 std::vector<EVT> MemOps; 3463 bool DstAlignCanChange = false; 3464 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3465 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3466 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3467 DstAlignCanChange = true; 3468 bool NonScalarIntSafe = 3469 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3470 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(), 3471 Size, (DstAlignCanChange ? 0 : Align), 0, 3472 NonScalarIntSafe, false, DAG, TLI)) 3473 return SDValue(); 3474 3475 if (DstAlignCanChange) { 3476 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3477 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3478 if (NewAlign > Align) { 3479 // Give the stack frame object a larger alignment if needed. 3480 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3481 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3482 Align = NewAlign; 3483 } 3484 } 3485 3486 SmallVector<SDValue, 8> OutChains; 3487 uint64_t DstOff = 0; 3488 unsigned NumMemOps = MemOps.size(); 3489 for (unsigned i = 0; i < NumMemOps; i++) { 3490 EVT VT = MemOps[i]; 3491 unsigned VTSize = VT.getSizeInBits() / 8; 3492 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3493 SDValue Store = DAG.getStore(Chain, dl, Value, 3494 getMemBasePlusOffset(Dst, DstOff, DAG), 3495 DstSV, DstSVOff + DstOff, isVol, false, 0); 3496 OutChains.push_back(Store); 3497 DstOff += VTSize; 3498 } 3499 3500 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3501 &OutChains[0], OutChains.size()); 3502} 3503 3504SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3505 SDValue Src, SDValue Size, 3506 unsigned Align, bool isVol, bool AlwaysInline, 3507 const Value *DstSV, uint64_t DstSVOff, 3508 const Value *SrcSV, uint64_t SrcSVOff) { 3509 3510 // Check to see if we should lower the memcpy to loads and stores first. 3511 // For cases within the target-specified limits, this is the best choice. 3512 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3513 if (ConstantSize) { 3514 // Memcpy with size zero? Just return the original chain. 3515 if (ConstantSize->isNullValue()) 3516 return Chain; 3517 3518 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3519 ConstantSize->getZExtValue(),Align, 3520 isVol, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3521 if (Result.getNode()) 3522 return Result; 3523 } 3524 3525 // Then check to see if we should lower the memcpy with target-specific 3526 // code. If the target chooses to do this, this is the next best. 3527 SDValue Result = 3528 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3529 isVol, AlwaysInline, 3530 DstSV, DstSVOff, SrcSV, SrcSVOff); 3531 if (Result.getNode()) 3532 return Result; 3533 3534 // If we really need inline code and the target declined to provide it, 3535 // use a (potentially long) sequence of loads and stores. 3536 if (AlwaysInline) { 3537 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3538 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3539 ConstantSize->getZExtValue(), Align, isVol, 3540 true, DstSV, DstSVOff, SrcSV, SrcSVOff); 3541 } 3542 3543 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3544 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3545 // respect volatile, so they may do things like read or write memory 3546 // beyond the given memory regions. But fixing this isn't easy, and most 3547 // people don't care. 3548 3549 // Emit a library call. 3550 TargetLowering::ArgListTy Args; 3551 TargetLowering::ArgListEntry Entry; 3552 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3553 Entry.Node = Dst; Args.push_back(Entry); 3554 Entry.Node = Src; Args.push_back(Entry); 3555 Entry.Node = Size; Args.push_back(Entry); 3556 // FIXME: pass in DebugLoc 3557 std::pair<SDValue,SDValue> CallResult = 3558 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3559 false, false, false, false, 0, 3560 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3561 /*isReturnValueUsed=*/false, 3562 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3563 TLI.getPointerTy()), 3564 Args, *this, dl); 3565 return CallResult.second; 3566} 3567 3568SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3569 SDValue Src, SDValue Size, 3570 unsigned Align, bool isVol, 3571 const Value *DstSV, uint64_t DstSVOff, 3572 const Value *SrcSV, uint64_t SrcSVOff) { 3573 3574 // Check to see if we should lower the memmove to loads and stores first. 3575 // For cases within the target-specified limits, this is the best choice. 3576 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3577 if (ConstantSize) { 3578 // Memmove with size zero? Just return the original chain. 3579 if (ConstantSize->isNullValue()) 3580 return Chain; 3581 3582 SDValue Result = 3583 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3584 ConstantSize->getZExtValue(), Align, isVol, 3585 false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3586 if (Result.getNode()) 3587 return Result; 3588 } 3589 3590 // Then check to see if we should lower the memmove with target-specific 3591 // code. If the target chooses to do this, this is the next best. 3592 SDValue Result = 3593 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3594 DstSV, DstSVOff, SrcSV, SrcSVOff); 3595 if (Result.getNode()) 3596 return Result; 3597 3598 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3599 // not be safe. See memcpy above for more details. 3600 3601 // Emit a library call. 3602 TargetLowering::ArgListTy Args; 3603 TargetLowering::ArgListEntry Entry; 3604 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3605 Entry.Node = Dst; Args.push_back(Entry); 3606 Entry.Node = Src; Args.push_back(Entry); 3607 Entry.Node = Size; Args.push_back(Entry); 3608 // FIXME: pass in DebugLoc 3609 std::pair<SDValue,SDValue> CallResult = 3610 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3611 false, false, false, false, 0, 3612 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3613 /*isReturnValueUsed=*/false, 3614 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3615 TLI.getPointerTy()), 3616 Args, *this, dl); 3617 return CallResult.second; 3618} 3619 3620SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3621 SDValue Src, SDValue Size, 3622 unsigned Align, bool isVol, 3623 const Value *DstSV, uint64_t DstSVOff) { 3624 3625 // Check to see if we should lower the memset to stores first. 3626 // For cases within the target-specified limits, this is the best choice. 3627 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3628 if (ConstantSize) { 3629 // Memset with size zero? Just return the original chain. 3630 if (ConstantSize->isNullValue()) 3631 return Chain; 3632 3633 SDValue Result = 3634 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3635 Align, isVol, DstSV, DstSVOff); 3636 3637 if (Result.getNode()) 3638 return Result; 3639 } 3640 3641 // Then check to see if we should lower the memset with target-specific 3642 // code. If the target chooses to do this, this is the next best. 3643 SDValue Result = 3644 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3645 DstSV, DstSVOff); 3646 if (Result.getNode()) 3647 return Result; 3648 3649 // Emit a library call. 3650 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3651 TargetLowering::ArgListTy Args; 3652 TargetLowering::ArgListEntry Entry; 3653 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3654 Args.push_back(Entry); 3655 // Extend or truncate the argument to be an i32 value for the call. 3656 if (Src.getValueType().bitsGT(MVT::i32)) 3657 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3658 else 3659 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3660 Entry.Node = Src; 3661 Entry.Ty = Type::getInt32Ty(*getContext()); 3662 Entry.isSExt = true; 3663 Args.push_back(Entry); 3664 Entry.Node = Size; 3665 Entry.Ty = IntPtrTy; 3666 Entry.isSExt = false; 3667 Args.push_back(Entry); 3668 // FIXME: pass in DebugLoc 3669 std::pair<SDValue,SDValue> CallResult = 3670 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3671 false, false, false, false, 0, 3672 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3673 /*isReturnValueUsed=*/false, 3674 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3675 TLI.getPointerTy()), 3676 Args, *this, dl); 3677 return CallResult.second; 3678} 3679 3680SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3681 SDValue Chain, 3682 SDValue Ptr, SDValue Cmp, 3683 SDValue Swp, const Value* PtrVal, 3684 unsigned Alignment) { 3685 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3686 Alignment = getEVTAlignment(MemVT); 3687 3688 // Check if the memory reference references a frame index 3689 if (!PtrVal) 3690 if (const FrameIndexSDNode *FI = 3691 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3692 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3693 3694 MachineFunction &MF = getMachineFunction(); 3695 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3696 3697 // For now, atomics are considered to be volatile always. 3698 Flags |= MachineMemOperand::MOVolatile; 3699 3700 MachineMemOperand *MMO = 3701 MF.getMachineMemOperand(PtrVal, Flags, 0, 3702 MemVT.getStoreSize(), Alignment); 3703 3704 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3705} 3706 3707SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3708 SDValue Chain, 3709 SDValue Ptr, SDValue Cmp, 3710 SDValue Swp, MachineMemOperand *MMO) { 3711 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3712 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3713 3714 EVT VT = Cmp.getValueType(); 3715 3716 SDVTList VTs = getVTList(VT, MVT::Other); 3717 FoldingSetNodeID ID; 3718 ID.AddInteger(MemVT.getRawBits()); 3719 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3720 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3721 void* IP = 0; 3722 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3723 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3724 return SDValue(E, 0); 3725 } 3726 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3727 Ptr, Cmp, Swp, MMO); 3728 CSEMap.InsertNode(N, IP); 3729 AllNodes.push_back(N); 3730 return SDValue(N, 0); 3731} 3732 3733SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3734 SDValue Chain, 3735 SDValue Ptr, SDValue Val, 3736 const Value* PtrVal, 3737 unsigned Alignment) { 3738 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3739 Alignment = getEVTAlignment(MemVT); 3740 3741 // Check if the memory reference references a frame index 3742 if (!PtrVal) 3743 if (const FrameIndexSDNode *FI = 3744 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3745 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3746 3747 MachineFunction &MF = getMachineFunction(); 3748 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3749 3750 // For now, atomics are considered to be volatile always. 3751 Flags |= MachineMemOperand::MOVolatile; 3752 3753 MachineMemOperand *MMO = 3754 MF.getMachineMemOperand(PtrVal, Flags, 0, 3755 MemVT.getStoreSize(), Alignment); 3756 3757 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3758} 3759 3760SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3761 SDValue Chain, 3762 SDValue Ptr, SDValue Val, 3763 MachineMemOperand *MMO) { 3764 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3765 Opcode == ISD::ATOMIC_LOAD_SUB || 3766 Opcode == ISD::ATOMIC_LOAD_AND || 3767 Opcode == ISD::ATOMIC_LOAD_OR || 3768 Opcode == ISD::ATOMIC_LOAD_XOR || 3769 Opcode == ISD::ATOMIC_LOAD_NAND || 3770 Opcode == ISD::ATOMIC_LOAD_MIN || 3771 Opcode == ISD::ATOMIC_LOAD_MAX || 3772 Opcode == ISD::ATOMIC_LOAD_UMIN || 3773 Opcode == ISD::ATOMIC_LOAD_UMAX || 3774 Opcode == ISD::ATOMIC_SWAP) && 3775 "Invalid Atomic Op"); 3776 3777 EVT VT = Val.getValueType(); 3778 3779 SDVTList VTs = getVTList(VT, MVT::Other); 3780 FoldingSetNodeID ID; 3781 ID.AddInteger(MemVT.getRawBits()); 3782 SDValue Ops[] = {Chain, Ptr, Val}; 3783 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3784 void* IP = 0; 3785 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3786 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3787 return SDValue(E, 0); 3788 } 3789 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3790 Ptr, Val, MMO); 3791 CSEMap.InsertNode(N, IP); 3792 AllNodes.push_back(N); 3793 return SDValue(N, 0); 3794} 3795 3796/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3797/// Allowed to return something different (and simpler) if Simplify is true. 3798SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3799 DebugLoc dl) { 3800 if (NumOps == 1) 3801 return Ops[0]; 3802 3803 SmallVector<EVT, 4> VTs; 3804 VTs.reserve(NumOps); 3805 for (unsigned i = 0; i < NumOps; ++i) 3806 VTs.push_back(Ops[i].getValueType()); 3807 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3808 Ops, NumOps); 3809} 3810 3811SDValue 3812SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3813 const EVT *VTs, unsigned NumVTs, 3814 const SDValue *Ops, unsigned NumOps, 3815 EVT MemVT, const Value *srcValue, int SVOff, 3816 unsigned Align, bool Vol, 3817 bool ReadMem, bool WriteMem) { 3818 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3819 MemVT, srcValue, SVOff, Align, Vol, 3820 ReadMem, WriteMem); 3821} 3822 3823SDValue 3824SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3825 const SDValue *Ops, unsigned NumOps, 3826 EVT MemVT, const Value *srcValue, int SVOff, 3827 unsigned Align, bool Vol, 3828 bool ReadMem, bool WriteMem) { 3829 if (Align == 0) // Ensure that codegen never sees alignment 0 3830 Align = getEVTAlignment(MemVT); 3831 3832 MachineFunction &MF = getMachineFunction(); 3833 unsigned Flags = 0; 3834 if (WriteMem) 3835 Flags |= MachineMemOperand::MOStore; 3836 if (ReadMem) 3837 Flags |= MachineMemOperand::MOLoad; 3838 if (Vol) 3839 Flags |= MachineMemOperand::MOVolatile; 3840 MachineMemOperand *MMO = 3841 MF.getMachineMemOperand(srcValue, Flags, SVOff, 3842 MemVT.getStoreSize(), Align); 3843 3844 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3845} 3846 3847SDValue 3848SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3849 const SDValue *Ops, unsigned NumOps, 3850 EVT MemVT, MachineMemOperand *MMO) { 3851 assert((Opcode == ISD::INTRINSIC_VOID || 3852 Opcode == ISD::INTRINSIC_W_CHAIN || 3853 (Opcode <= INT_MAX && 3854 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3855 "Opcode is not a memory-accessing opcode!"); 3856 3857 // Memoize the node unless it returns a flag. 3858 MemIntrinsicSDNode *N; 3859 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3860 FoldingSetNodeID ID; 3861 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3862 void *IP = 0; 3863 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3864 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3865 return SDValue(E, 0); 3866 } 3867 3868 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3869 MemVT, MMO); 3870 CSEMap.InsertNode(N, IP); 3871 } else { 3872 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3873 MemVT, MMO); 3874 } 3875 AllNodes.push_back(N); 3876 return SDValue(N, 0); 3877} 3878 3879SDValue 3880SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3881 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3882 SDValue Ptr, SDValue Offset, 3883 const Value *SV, int SVOffset, EVT MemVT, 3884 bool isVolatile, bool isNonTemporal, 3885 unsigned Alignment) { 3886 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3887 Alignment = getEVTAlignment(VT); 3888 3889 // Check if the memory reference references a frame index 3890 if (!SV) 3891 if (const FrameIndexSDNode *FI = 3892 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3893 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3894 3895 MachineFunction &MF = getMachineFunction(); 3896 unsigned Flags = MachineMemOperand::MOLoad; 3897 if (isVolatile) 3898 Flags |= MachineMemOperand::MOVolatile; 3899 if (isNonTemporal) 3900 Flags |= MachineMemOperand::MONonTemporal; 3901 MachineMemOperand *MMO = 3902 MF.getMachineMemOperand(SV, Flags, SVOffset, 3903 MemVT.getStoreSize(), Alignment); 3904 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO); 3905} 3906 3907SDValue 3908SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3909 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3910 SDValue Ptr, SDValue Offset, EVT MemVT, 3911 MachineMemOperand *MMO) { 3912 if (VT == MemVT) { 3913 ExtType = ISD::NON_EXTLOAD; 3914 } else if (ExtType == ISD::NON_EXTLOAD) { 3915 assert(VT == MemVT && "Non-extending load from different memory type!"); 3916 } else { 3917 // Extending load. 3918 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 3919 "Should only be an extending load, not truncating!"); 3920 assert(VT.isInteger() == MemVT.isInteger() && 3921 "Cannot convert from FP to Int or Int -> FP!"); 3922 assert(VT.isVector() == MemVT.isVector() && 3923 "Cannot use trunc store to convert to or from a vector!"); 3924 assert((!VT.isVector() || 3925 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 3926 "Cannot use trunc store to change the number of vector elements!"); 3927 } 3928 3929 bool Indexed = AM != ISD::UNINDEXED; 3930 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3931 "Unindexed load with an offset!"); 3932 3933 SDVTList VTs = Indexed ? 3934 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3935 SDValue Ops[] = { Chain, Ptr, Offset }; 3936 FoldingSetNodeID ID; 3937 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3938 ID.AddInteger(MemVT.getRawBits()); 3939 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 3940 MMO->isNonTemporal())); 3941 void *IP = 0; 3942 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3943 cast<LoadSDNode>(E)->refineAlignment(MMO); 3944 return SDValue(E, 0); 3945 } 3946 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 3947 MemVT, MMO); 3948 CSEMap.InsertNode(N, IP); 3949 AllNodes.push_back(N); 3950 return SDValue(N, 0); 3951} 3952 3953SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3954 SDValue Chain, SDValue Ptr, 3955 const Value *SV, int SVOffset, 3956 bool isVolatile, bool isNonTemporal, 3957 unsigned Alignment) { 3958 SDValue Undef = getUNDEF(Ptr.getValueType()); 3959 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3960 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment); 3961} 3962 3963SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3964 SDValue Chain, SDValue Ptr, 3965 const Value *SV, 3966 int SVOffset, EVT MemVT, 3967 bool isVolatile, bool isNonTemporal, 3968 unsigned Alignment) { 3969 SDValue Undef = getUNDEF(Ptr.getValueType()); 3970 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3971 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment); 3972} 3973 3974SDValue 3975SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3976 SDValue Offset, ISD::MemIndexedMode AM) { 3977 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3978 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3979 "Load is already a indexed load!"); 3980 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3981 LD->getChain(), Base, Offset, LD->getSrcValue(), 3982 LD->getSrcValueOffset(), LD->getMemoryVT(), 3983 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 3984} 3985 3986SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3987 SDValue Ptr, const Value *SV, int SVOffset, 3988 bool isVolatile, bool isNonTemporal, 3989 unsigned Alignment) { 3990 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3991 Alignment = getEVTAlignment(Val.getValueType()); 3992 3993 // Check if the memory reference references a frame index 3994 if (!SV) 3995 if (const FrameIndexSDNode *FI = 3996 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3997 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3998 3999 MachineFunction &MF = getMachineFunction(); 4000 unsigned Flags = MachineMemOperand::MOStore; 4001 if (isVolatile) 4002 Flags |= MachineMemOperand::MOVolatile; 4003 if (isNonTemporal) 4004 Flags |= MachineMemOperand::MONonTemporal; 4005 MachineMemOperand *MMO = 4006 MF.getMachineMemOperand(SV, Flags, SVOffset, 4007 Val.getValueType().getStoreSize(), Alignment); 4008 4009 return getStore(Chain, dl, Val, Ptr, MMO); 4010} 4011 4012SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4013 SDValue Ptr, MachineMemOperand *MMO) { 4014 EVT VT = Val.getValueType(); 4015 SDVTList VTs = getVTList(MVT::Other); 4016 SDValue Undef = getUNDEF(Ptr.getValueType()); 4017 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4018 FoldingSetNodeID ID; 4019 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4020 ID.AddInteger(VT.getRawBits()); 4021 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4022 MMO->isNonTemporal())); 4023 void *IP = 0; 4024 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4025 cast<StoreSDNode>(E)->refineAlignment(MMO); 4026 return SDValue(E, 0); 4027 } 4028 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4029 false, VT, MMO); 4030 CSEMap.InsertNode(N, IP); 4031 AllNodes.push_back(N); 4032 return SDValue(N, 0); 4033} 4034 4035SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4036 SDValue Ptr, const Value *SV, 4037 int SVOffset, EVT SVT, 4038 bool isVolatile, bool isNonTemporal, 4039 unsigned Alignment) { 4040 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4041 Alignment = getEVTAlignment(SVT); 4042 4043 // Check if the memory reference references a frame index 4044 if (!SV) 4045 if (const FrameIndexSDNode *FI = 4046 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 4047 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 4048 4049 MachineFunction &MF = getMachineFunction(); 4050 unsigned Flags = MachineMemOperand::MOStore; 4051 if (isVolatile) 4052 Flags |= MachineMemOperand::MOVolatile; 4053 if (isNonTemporal) 4054 Flags |= MachineMemOperand::MONonTemporal; 4055 MachineMemOperand *MMO = 4056 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment); 4057 4058 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4059} 4060 4061SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4062 SDValue Ptr, EVT SVT, 4063 MachineMemOperand *MMO) { 4064 EVT VT = Val.getValueType(); 4065 4066 if (VT == SVT) 4067 return getStore(Chain, dl, Val, Ptr, MMO); 4068 4069 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4070 "Should only be a truncating store, not extending!"); 4071 assert(VT.isInteger() == SVT.isInteger() && 4072 "Can't do FP-INT conversion!"); 4073 assert(VT.isVector() == SVT.isVector() && 4074 "Cannot use trunc store to convert to or from a vector!"); 4075 assert((!VT.isVector() || 4076 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4077 "Cannot use trunc store to change the number of vector elements!"); 4078 4079 SDVTList VTs = getVTList(MVT::Other); 4080 SDValue Undef = getUNDEF(Ptr.getValueType()); 4081 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4082 FoldingSetNodeID ID; 4083 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4084 ID.AddInteger(SVT.getRawBits()); 4085 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4086 MMO->isNonTemporal())); 4087 void *IP = 0; 4088 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4089 cast<StoreSDNode>(E)->refineAlignment(MMO); 4090 return SDValue(E, 0); 4091 } 4092 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4093 true, SVT, MMO); 4094 CSEMap.InsertNode(N, IP); 4095 AllNodes.push_back(N); 4096 return SDValue(N, 0); 4097} 4098 4099SDValue 4100SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4101 SDValue Offset, ISD::MemIndexedMode AM) { 4102 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4103 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4104 "Store is already a indexed store!"); 4105 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4106 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4107 FoldingSetNodeID ID; 4108 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4109 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4110 ID.AddInteger(ST->getRawSubclassData()); 4111 void *IP = 0; 4112 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4113 return SDValue(E, 0); 4114 4115 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4116 ST->isTruncatingStore(), 4117 ST->getMemoryVT(), 4118 ST->getMemOperand()); 4119 CSEMap.InsertNode(N, IP); 4120 AllNodes.push_back(N); 4121 return SDValue(N, 0); 4122} 4123 4124SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4125 SDValue Chain, SDValue Ptr, 4126 SDValue SV) { 4127 SDValue Ops[] = { Chain, Ptr, SV }; 4128 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 4129} 4130 4131SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4132 const SDUse *Ops, unsigned NumOps) { 4133 switch (NumOps) { 4134 case 0: return getNode(Opcode, DL, VT); 4135 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4136 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4137 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4138 default: break; 4139 } 4140 4141 // Copy from an SDUse array into an SDValue array for use with 4142 // the regular getNode logic. 4143 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4144 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4145} 4146 4147SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4148 const SDValue *Ops, unsigned NumOps) { 4149 switch (NumOps) { 4150 case 0: return getNode(Opcode, DL, VT); 4151 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4152 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4153 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4154 default: break; 4155 } 4156 4157 switch (Opcode) { 4158 default: break; 4159 case ISD::SELECT_CC: { 4160 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4161 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4162 "LHS and RHS of condition must have same type!"); 4163 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4164 "True and False arms of SelectCC must have same type!"); 4165 assert(Ops[2].getValueType() == VT && 4166 "select_cc node must be of same type as true and false value!"); 4167 break; 4168 } 4169 case ISD::BR_CC: { 4170 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4171 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4172 "LHS/RHS of comparison should match types!"); 4173 break; 4174 } 4175 } 4176 4177 // Memoize nodes. 4178 SDNode *N; 4179 SDVTList VTs = getVTList(VT); 4180 4181 if (VT != MVT::Flag) { 4182 FoldingSetNodeID ID; 4183 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4184 void *IP = 0; 4185 4186 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4187 return SDValue(E, 0); 4188 4189 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4190 CSEMap.InsertNode(N, IP); 4191 } else { 4192 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4193 } 4194 4195 AllNodes.push_back(N); 4196#ifndef NDEBUG 4197 VerifyNode(N); 4198#endif 4199 return SDValue(N, 0); 4200} 4201 4202SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4203 const std::vector<EVT> &ResultTys, 4204 const SDValue *Ops, unsigned NumOps) { 4205 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4206 Ops, NumOps); 4207} 4208 4209SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4210 const EVT *VTs, unsigned NumVTs, 4211 const SDValue *Ops, unsigned NumOps) { 4212 if (NumVTs == 1) 4213 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4214 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4215} 4216 4217SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4218 const SDValue *Ops, unsigned NumOps) { 4219 if (VTList.NumVTs == 1) 4220 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4221 4222#if 0 4223 switch (Opcode) { 4224 // FIXME: figure out how to safely handle things like 4225 // int foo(int x) { return 1 << (x & 255); } 4226 // int bar() { return foo(256); } 4227 case ISD::SRA_PARTS: 4228 case ISD::SRL_PARTS: 4229 case ISD::SHL_PARTS: 4230 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4231 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4232 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4233 else if (N3.getOpcode() == ISD::AND) 4234 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4235 // If the and is only masking out bits that cannot effect the shift, 4236 // eliminate the and. 4237 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4238 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4239 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4240 } 4241 break; 4242 } 4243#endif 4244 4245 // Memoize the node unless it returns a flag. 4246 SDNode *N; 4247 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4248 FoldingSetNodeID ID; 4249 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4250 void *IP = 0; 4251 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4252 return SDValue(E, 0); 4253 4254 if (NumOps == 1) { 4255 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4256 } else if (NumOps == 2) { 4257 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4258 } else if (NumOps == 3) { 4259 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4260 Ops[2]); 4261 } else { 4262 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4263 } 4264 CSEMap.InsertNode(N, IP); 4265 } else { 4266 if (NumOps == 1) { 4267 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4268 } else if (NumOps == 2) { 4269 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4270 } else if (NumOps == 3) { 4271 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4272 Ops[2]); 4273 } else { 4274 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4275 } 4276 } 4277 AllNodes.push_back(N); 4278#ifndef NDEBUG 4279 VerifyNode(N); 4280#endif 4281 return SDValue(N, 0); 4282} 4283 4284SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4285 return getNode(Opcode, DL, VTList, 0, 0); 4286} 4287 4288SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4289 SDValue N1) { 4290 SDValue Ops[] = { N1 }; 4291 return getNode(Opcode, DL, VTList, Ops, 1); 4292} 4293 4294SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4295 SDValue N1, SDValue N2) { 4296 SDValue Ops[] = { N1, N2 }; 4297 return getNode(Opcode, DL, VTList, Ops, 2); 4298} 4299 4300SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4301 SDValue N1, SDValue N2, SDValue N3) { 4302 SDValue Ops[] = { N1, N2, N3 }; 4303 return getNode(Opcode, DL, VTList, Ops, 3); 4304} 4305 4306SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4307 SDValue N1, SDValue N2, SDValue N3, 4308 SDValue N4) { 4309 SDValue Ops[] = { N1, N2, N3, N4 }; 4310 return getNode(Opcode, DL, VTList, Ops, 4); 4311} 4312 4313SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4314 SDValue N1, SDValue N2, SDValue N3, 4315 SDValue N4, SDValue N5) { 4316 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4317 return getNode(Opcode, DL, VTList, Ops, 5); 4318} 4319 4320SDVTList SelectionDAG::getVTList(EVT VT) { 4321 return makeVTList(SDNode::getValueTypeList(VT), 1); 4322} 4323 4324SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4325 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4326 E = VTList.rend(); I != E; ++I) 4327 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4328 return *I; 4329 4330 EVT *Array = Allocator.Allocate<EVT>(2); 4331 Array[0] = VT1; 4332 Array[1] = VT2; 4333 SDVTList Result = makeVTList(Array, 2); 4334 VTList.push_back(Result); 4335 return Result; 4336} 4337 4338SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4339 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4340 E = VTList.rend(); I != E; ++I) 4341 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4342 I->VTs[2] == VT3) 4343 return *I; 4344 4345 EVT *Array = Allocator.Allocate<EVT>(3); 4346 Array[0] = VT1; 4347 Array[1] = VT2; 4348 Array[2] = VT3; 4349 SDVTList Result = makeVTList(Array, 3); 4350 VTList.push_back(Result); 4351 return Result; 4352} 4353 4354SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4355 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4356 E = VTList.rend(); I != E; ++I) 4357 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4358 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4359 return *I; 4360 4361 EVT *Array = Allocator.Allocate<EVT>(4); 4362 Array[0] = VT1; 4363 Array[1] = VT2; 4364 Array[2] = VT3; 4365 Array[3] = VT4; 4366 SDVTList Result = makeVTList(Array, 4); 4367 VTList.push_back(Result); 4368 return Result; 4369} 4370 4371SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4372 switch (NumVTs) { 4373 case 0: llvm_unreachable("Cannot have nodes without results!"); 4374 case 1: return getVTList(VTs[0]); 4375 case 2: return getVTList(VTs[0], VTs[1]); 4376 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4377 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4378 default: break; 4379 } 4380 4381 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4382 E = VTList.rend(); I != E; ++I) { 4383 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4384 continue; 4385 4386 bool NoMatch = false; 4387 for (unsigned i = 2; i != NumVTs; ++i) 4388 if (VTs[i] != I->VTs[i]) { 4389 NoMatch = true; 4390 break; 4391 } 4392 if (!NoMatch) 4393 return *I; 4394 } 4395 4396 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4397 std::copy(VTs, VTs+NumVTs, Array); 4398 SDVTList Result = makeVTList(Array, NumVTs); 4399 VTList.push_back(Result); 4400 return Result; 4401} 4402 4403 4404/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4405/// specified operands. If the resultant node already exists in the DAG, 4406/// this does not modify the specified node, instead it returns the node that 4407/// already exists. If the resultant node does not exist in the DAG, the 4408/// input node is returned. As a degenerate case, if you specify the same 4409/// input operands as the node already has, the input node is returned. 4410SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4411 SDNode *N = InN.getNode(); 4412 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4413 4414 // Check to see if there is no change. 4415 if (Op == N->getOperand(0)) return InN; 4416 4417 // See if the modified node already exists. 4418 void *InsertPos = 0; 4419 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4420 return SDValue(Existing, InN.getResNo()); 4421 4422 // Nope it doesn't. Remove the node from its current place in the maps. 4423 if (InsertPos) 4424 if (!RemoveNodeFromCSEMaps(N)) 4425 InsertPos = 0; 4426 4427 // Now we update the operands. 4428 N->OperandList[0].set(Op); 4429 4430 // If this gets put into a CSE map, add it. 4431 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4432 return InN; 4433} 4434 4435SDValue SelectionDAG:: 4436UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4437 SDNode *N = InN.getNode(); 4438 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4439 4440 // Check to see if there is no change. 4441 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4442 return InN; // No operands changed, just return the input node. 4443 4444 // See if the modified node already exists. 4445 void *InsertPos = 0; 4446 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4447 return SDValue(Existing, InN.getResNo()); 4448 4449 // Nope it doesn't. Remove the node from its current place in the maps. 4450 if (InsertPos) 4451 if (!RemoveNodeFromCSEMaps(N)) 4452 InsertPos = 0; 4453 4454 // Now we update the operands. 4455 if (N->OperandList[0] != Op1) 4456 N->OperandList[0].set(Op1); 4457 if (N->OperandList[1] != Op2) 4458 N->OperandList[1].set(Op2); 4459 4460 // If this gets put into a CSE map, add it. 4461 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4462 return InN; 4463} 4464 4465SDValue SelectionDAG:: 4466UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4467 SDValue Ops[] = { Op1, Op2, Op3 }; 4468 return UpdateNodeOperands(N, Ops, 3); 4469} 4470 4471SDValue SelectionDAG:: 4472UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4473 SDValue Op3, SDValue Op4) { 4474 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4475 return UpdateNodeOperands(N, Ops, 4); 4476} 4477 4478SDValue SelectionDAG:: 4479UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4480 SDValue Op3, SDValue Op4, SDValue Op5) { 4481 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4482 return UpdateNodeOperands(N, Ops, 5); 4483} 4484 4485SDValue SelectionDAG:: 4486UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4487 SDNode *N = InN.getNode(); 4488 assert(N->getNumOperands() == NumOps && 4489 "Update with wrong number of operands"); 4490 4491 // Check to see if there is no change. 4492 bool AnyChange = false; 4493 for (unsigned i = 0; i != NumOps; ++i) { 4494 if (Ops[i] != N->getOperand(i)) { 4495 AnyChange = true; 4496 break; 4497 } 4498 } 4499 4500 // No operands changed, just return the input node. 4501 if (!AnyChange) return InN; 4502 4503 // See if the modified node already exists. 4504 void *InsertPos = 0; 4505 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4506 return SDValue(Existing, InN.getResNo()); 4507 4508 // Nope it doesn't. Remove the node from its current place in the maps. 4509 if (InsertPos) 4510 if (!RemoveNodeFromCSEMaps(N)) 4511 InsertPos = 0; 4512 4513 // Now we update the operands. 4514 for (unsigned i = 0; i != NumOps; ++i) 4515 if (N->OperandList[i] != Ops[i]) 4516 N->OperandList[i].set(Ops[i]); 4517 4518 // If this gets put into a CSE map, add it. 4519 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4520 return InN; 4521} 4522 4523/// DropOperands - Release the operands and set this node to have 4524/// zero operands. 4525void SDNode::DropOperands() { 4526 // Unlike the code in MorphNodeTo that does this, we don't need to 4527 // watch for dead nodes here. 4528 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4529 SDUse &Use = *I++; 4530 Use.set(SDValue()); 4531 } 4532} 4533 4534/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4535/// machine opcode. 4536/// 4537SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4538 EVT VT) { 4539 SDVTList VTs = getVTList(VT); 4540 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4541} 4542 4543SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4544 EVT VT, SDValue Op1) { 4545 SDVTList VTs = getVTList(VT); 4546 SDValue Ops[] = { Op1 }; 4547 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4548} 4549 4550SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4551 EVT VT, SDValue Op1, 4552 SDValue Op2) { 4553 SDVTList VTs = getVTList(VT); 4554 SDValue Ops[] = { Op1, Op2 }; 4555 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4556} 4557 4558SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4559 EVT VT, SDValue Op1, 4560 SDValue Op2, SDValue Op3) { 4561 SDVTList VTs = getVTList(VT); 4562 SDValue Ops[] = { Op1, Op2, Op3 }; 4563 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4564} 4565 4566SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4567 EVT VT, const SDValue *Ops, 4568 unsigned NumOps) { 4569 SDVTList VTs = getVTList(VT); 4570 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4571} 4572 4573SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4574 EVT VT1, EVT VT2, const SDValue *Ops, 4575 unsigned NumOps) { 4576 SDVTList VTs = getVTList(VT1, VT2); 4577 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4578} 4579 4580SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4581 EVT VT1, EVT VT2) { 4582 SDVTList VTs = getVTList(VT1, VT2); 4583 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4584} 4585 4586SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4587 EVT VT1, EVT VT2, EVT VT3, 4588 const SDValue *Ops, unsigned NumOps) { 4589 SDVTList VTs = getVTList(VT1, VT2, VT3); 4590 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4591} 4592 4593SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4594 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4595 const SDValue *Ops, unsigned NumOps) { 4596 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4597 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4598} 4599 4600SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4601 EVT VT1, EVT VT2, 4602 SDValue Op1) { 4603 SDVTList VTs = getVTList(VT1, VT2); 4604 SDValue Ops[] = { Op1 }; 4605 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4606} 4607 4608SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4609 EVT VT1, EVT VT2, 4610 SDValue Op1, SDValue Op2) { 4611 SDVTList VTs = getVTList(VT1, VT2); 4612 SDValue Ops[] = { Op1, Op2 }; 4613 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4614} 4615 4616SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4617 EVT VT1, EVT VT2, 4618 SDValue Op1, SDValue Op2, 4619 SDValue Op3) { 4620 SDVTList VTs = getVTList(VT1, VT2); 4621 SDValue Ops[] = { Op1, Op2, Op3 }; 4622 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4623} 4624 4625SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4626 EVT VT1, EVT VT2, EVT VT3, 4627 SDValue Op1, SDValue Op2, 4628 SDValue Op3) { 4629 SDVTList VTs = getVTList(VT1, VT2, VT3); 4630 SDValue Ops[] = { Op1, Op2, Op3 }; 4631 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4632} 4633 4634SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4635 SDVTList VTs, const SDValue *Ops, 4636 unsigned NumOps) { 4637 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4638 // Reset the NodeID to -1. 4639 N->setNodeId(-1); 4640 return N; 4641} 4642 4643/// MorphNodeTo - This *mutates* the specified node to have the specified 4644/// return type, opcode, and operands. 4645/// 4646/// Note that MorphNodeTo returns the resultant node. If there is already a 4647/// node of the specified opcode and operands, it returns that node instead of 4648/// the current one. Note that the DebugLoc need not be the same. 4649/// 4650/// Using MorphNodeTo is faster than creating a new node and swapping it in 4651/// with ReplaceAllUsesWith both because it often avoids allocating a new 4652/// node, and because it doesn't require CSE recalculation for any of 4653/// the node's users. 4654/// 4655SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4656 SDVTList VTs, const SDValue *Ops, 4657 unsigned NumOps) { 4658 // If an identical node already exists, use it. 4659 void *IP = 0; 4660 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4661 FoldingSetNodeID ID; 4662 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4663 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4664 return ON; 4665 } 4666 4667 if (!RemoveNodeFromCSEMaps(N)) 4668 IP = 0; 4669 4670 // Start the morphing. 4671 N->NodeType = Opc; 4672 N->ValueList = VTs.VTs; 4673 N->NumValues = VTs.NumVTs; 4674 4675 // Clear the operands list, updating used nodes to remove this from their 4676 // use list. Keep track of any operands that become dead as a result. 4677 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4678 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4679 SDUse &Use = *I++; 4680 SDNode *Used = Use.getNode(); 4681 Use.set(SDValue()); 4682 if (Used->use_empty()) 4683 DeadNodeSet.insert(Used); 4684 } 4685 4686 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4687 // Initialize the memory references information. 4688 MN->setMemRefs(0, 0); 4689 // If NumOps is larger than the # of operands we can have in a 4690 // MachineSDNode, reallocate the operand list. 4691 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4692 if (MN->OperandsNeedDelete) 4693 delete[] MN->OperandList; 4694 if (NumOps > array_lengthof(MN->LocalOperands)) 4695 // We're creating a final node that will live unmorphed for the 4696 // remainder of the current SelectionDAG iteration, so we can allocate 4697 // the operands directly out of a pool with no recycling metadata. 4698 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4699 Ops, NumOps); 4700 else 4701 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4702 MN->OperandsNeedDelete = false; 4703 } else 4704 MN->InitOperands(MN->OperandList, Ops, NumOps); 4705 } else { 4706 // If NumOps is larger than the # of operands we currently have, reallocate 4707 // the operand list. 4708 if (NumOps > N->NumOperands) { 4709 if (N->OperandsNeedDelete) 4710 delete[] N->OperandList; 4711 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4712 N->OperandsNeedDelete = true; 4713 } else 4714 N->InitOperands(N->OperandList, Ops, NumOps); 4715 } 4716 4717 // Delete any nodes that are still dead after adding the uses for the 4718 // new operands. 4719 if (!DeadNodeSet.empty()) { 4720 SmallVector<SDNode *, 16> DeadNodes; 4721 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4722 E = DeadNodeSet.end(); I != E; ++I) 4723 if ((*I)->use_empty()) 4724 DeadNodes.push_back(*I); 4725 RemoveDeadNodes(DeadNodes); 4726 } 4727 4728 if (IP) 4729 CSEMap.InsertNode(N, IP); // Memoize the new node. 4730 return N; 4731} 4732 4733 4734/// getMachineNode - These are used for target selectors to create a new node 4735/// with specified return type(s), MachineInstr opcode, and operands. 4736/// 4737/// Note that getMachineNode returns the resultant node. If there is already a 4738/// node of the specified opcode and operands, it returns that node instead of 4739/// the current one. 4740MachineSDNode * 4741SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4742 SDVTList VTs = getVTList(VT); 4743 return getMachineNode(Opcode, dl, VTs, 0, 0); 4744} 4745 4746MachineSDNode * 4747SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4748 SDVTList VTs = getVTList(VT); 4749 SDValue Ops[] = { Op1 }; 4750 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4751} 4752 4753MachineSDNode * 4754SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4755 SDValue Op1, SDValue Op2) { 4756 SDVTList VTs = getVTList(VT); 4757 SDValue Ops[] = { Op1, Op2 }; 4758 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4759} 4760 4761MachineSDNode * 4762SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4763 SDValue Op1, SDValue Op2, SDValue Op3) { 4764 SDVTList VTs = getVTList(VT); 4765 SDValue Ops[] = { Op1, Op2, Op3 }; 4766 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4767} 4768 4769MachineSDNode * 4770SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4771 const SDValue *Ops, unsigned NumOps) { 4772 SDVTList VTs = getVTList(VT); 4773 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4774} 4775 4776MachineSDNode * 4777SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4778 SDVTList VTs = getVTList(VT1, VT2); 4779 return getMachineNode(Opcode, dl, VTs, 0, 0); 4780} 4781 4782MachineSDNode * 4783SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4784 EVT VT1, EVT VT2, SDValue Op1) { 4785 SDVTList VTs = getVTList(VT1, VT2); 4786 SDValue Ops[] = { Op1 }; 4787 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4788} 4789 4790MachineSDNode * 4791SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4792 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4793 SDVTList VTs = getVTList(VT1, VT2); 4794 SDValue Ops[] = { Op1, Op2 }; 4795 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4796} 4797 4798MachineSDNode * 4799SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4800 EVT VT1, EVT VT2, SDValue Op1, 4801 SDValue Op2, SDValue Op3) { 4802 SDVTList VTs = getVTList(VT1, VT2); 4803 SDValue Ops[] = { Op1, Op2, Op3 }; 4804 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4805} 4806 4807MachineSDNode * 4808SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4809 EVT VT1, EVT VT2, 4810 const SDValue *Ops, unsigned NumOps) { 4811 SDVTList VTs = getVTList(VT1, VT2); 4812 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4813} 4814 4815MachineSDNode * 4816SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4817 EVT VT1, EVT VT2, EVT VT3, 4818 SDValue Op1, SDValue Op2) { 4819 SDVTList VTs = getVTList(VT1, VT2, VT3); 4820 SDValue Ops[] = { Op1, Op2 }; 4821 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4822} 4823 4824MachineSDNode * 4825SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4826 EVT VT1, EVT VT2, EVT VT3, 4827 SDValue Op1, SDValue Op2, SDValue Op3) { 4828 SDVTList VTs = getVTList(VT1, VT2, VT3); 4829 SDValue Ops[] = { Op1, Op2, Op3 }; 4830 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4831} 4832 4833MachineSDNode * 4834SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4835 EVT VT1, EVT VT2, EVT VT3, 4836 const SDValue *Ops, unsigned NumOps) { 4837 SDVTList VTs = getVTList(VT1, VT2, VT3); 4838 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4839} 4840 4841MachineSDNode * 4842SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4843 EVT VT2, EVT VT3, EVT VT4, 4844 const SDValue *Ops, unsigned NumOps) { 4845 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4846 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4847} 4848 4849MachineSDNode * 4850SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4851 const std::vector<EVT> &ResultTys, 4852 const SDValue *Ops, unsigned NumOps) { 4853 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4854 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4855} 4856 4857MachineSDNode * 4858SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4859 const SDValue *Ops, unsigned NumOps) { 4860 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4861 MachineSDNode *N; 4862 void *IP; 4863 4864 if (DoCSE) { 4865 FoldingSetNodeID ID; 4866 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4867 IP = 0; 4868 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4869 return cast<MachineSDNode>(E); 4870 } 4871 4872 // Allocate a new MachineSDNode. 4873 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 4874 4875 // Initialize the operands list. 4876 if (NumOps > array_lengthof(N->LocalOperands)) 4877 // We're creating a final node that will live unmorphed for the 4878 // remainder of the current SelectionDAG iteration, so we can allocate 4879 // the operands directly out of a pool with no recycling metadata. 4880 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4881 Ops, NumOps); 4882 else 4883 N->InitOperands(N->LocalOperands, Ops, NumOps); 4884 N->OperandsNeedDelete = false; 4885 4886 if (DoCSE) 4887 CSEMap.InsertNode(N, IP); 4888 4889 AllNodes.push_back(N); 4890#ifndef NDEBUG 4891 VerifyNode(N); 4892#endif 4893 return N; 4894} 4895 4896/// getTargetExtractSubreg - A convenience function for creating 4897/// TargetOpcode::EXTRACT_SUBREG nodes. 4898SDValue 4899SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4900 SDValue Operand) { 4901 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4902 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 4903 VT, Operand, SRIdxVal); 4904 return SDValue(Subreg, 0); 4905} 4906 4907/// getTargetInsertSubreg - A convenience function for creating 4908/// TargetOpcode::INSERT_SUBREG nodes. 4909SDValue 4910SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4911 SDValue Operand, SDValue Subreg) { 4912 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4913 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 4914 VT, Operand, Subreg, SRIdxVal); 4915 return SDValue(Result, 0); 4916} 4917 4918/// getNodeIfExists - Get the specified node if it's already available, or 4919/// else return NULL. 4920SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4921 const SDValue *Ops, unsigned NumOps) { 4922 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4923 FoldingSetNodeID ID; 4924 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4925 void *IP = 0; 4926 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4927 return E; 4928 } 4929 return NULL; 4930} 4931 4932/// getDbgValue - Creates a SDDbgValue node. 4933/// 4934SDDbgValue * 4935SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 4936 DebugLoc DL, unsigned O) { 4937 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 4938} 4939 4940SDDbgValue * 4941SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 4942 DebugLoc DL, unsigned O) { 4943 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 4944} 4945 4946SDDbgValue * 4947SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 4948 DebugLoc DL, unsigned O) { 4949 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 4950} 4951 4952namespace { 4953 4954/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 4955/// pointed to by a use iterator is deleted, increment the use iterator 4956/// so that it doesn't dangle. 4957/// 4958/// This class also manages a "downlink" DAGUpdateListener, to forward 4959/// messages to ReplaceAllUsesWith's callers. 4960/// 4961class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 4962 SelectionDAG::DAGUpdateListener *DownLink; 4963 SDNode::use_iterator &UI; 4964 SDNode::use_iterator &UE; 4965 4966 virtual void NodeDeleted(SDNode *N, SDNode *E) { 4967 // Increment the iterator as needed. 4968 while (UI != UE && N == *UI) 4969 ++UI; 4970 4971 // Then forward the message. 4972 if (DownLink) DownLink->NodeDeleted(N, E); 4973 } 4974 4975 virtual void NodeUpdated(SDNode *N) { 4976 // Just forward the message. 4977 if (DownLink) DownLink->NodeUpdated(N); 4978 } 4979 4980public: 4981 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 4982 SDNode::use_iterator &ui, 4983 SDNode::use_iterator &ue) 4984 : DownLink(dl), UI(ui), UE(ue) {} 4985}; 4986 4987} 4988 4989/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4990/// This can cause recursive merging of nodes in the DAG. 4991/// 4992/// This version assumes From has a single result value. 4993/// 4994void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4995 DAGUpdateListener *UpdateListener) { 4996 SDNode *From = FromN.getNode(); 4997 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4998 "Cannot replace with this method!"); 4999 assert(From != To.getNode() && "Cannot replace uses of with self"); 5000 5001 // Iterate over all the existing uses of From. New uses will be added 5002 // to the beginning of the use list, which we avoid visiting. 5003 // This specifically avoids visiting uses of From that arise while the 5004 // replacement is happening, because any such uses would be the result 5005 // of CSE: If an existing node looks like From after one of its operands 5006 // is replaced by To, we don't want to replace of all its users with To 5007 // too. See PR3018 for more info. 5008 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5009 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5010 while (UI != UE) { 5011 SDNode *User = *UI; 5012 5013 // This node is about to morph, remove its old self from the CSE maps. 5014 RemoveNodeFromCSEMaps(User); 5015 5016 // A user can appear in a use list multiple times, and when this 5017 // happens the uses are usually next to each other in the list. 5018 // To help reduce the number of CSE recomputations, process all 5019 // the uses of this user that we can find this way. 5020 do { 5021 SDUse &Use = UI.getUse(); 5022 ++UI; 5023 Use.set(To); 5024 } while (UI != UE && *UI == User); 5025 5026 // Now that we have modified User, add it back to the CSE maps. If it 5027 // already exists there, recursively merge the results together. 5028 AddModifiedNodeToCSEMaps(User, &Listener); 5029 } 5030} 5031 5032/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5033/// This can cause recursive merging of nodes in the DAG. 5034/// 5035/// This version assumes that for each value of From, there is a 5036/// corresponding value in To in the same position with the same type. 5037/// 5038void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5039 DAGUpdateListener *UpdateListener) { 5040#ifndef NDEBUG 5041 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5042 assert((!From->hasAnyUseOfValue(i) || 5043 From->getValueType(i) == To->getValueType(i)) && 5044 "Cannot use this version of ReplaceAllUsesWith!"); 5045#endif 5046 5047 // Handle the trivial case. 5048 if (From == To) 5049 return; 5050 5051 // Iterate over just the existing users of From. See the comments in 5052 // the ReplaceAllUsesWith above. 5053 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5054 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5055 while (UI != UE) { 5056 SDNode *User = *UI; 5057 5058 // This node is about to morph, remove its old self from the CSE maps. 5059 RemoveNodeFromCSEMaps(User); 5060 5061 // A user can appear in a use list multiple times, and when this 5062 // happens the uses are usually next to each other in the list. 5063 // To help reduce the number of CSE recomputations, process all 5064 // the uses of this user that we can find this way. 5065 do { 5066 SDUse &Use = UI.getUse(); 5067 ++UI; 5068 Use.setNode(To); 5069 } while (UI != UE && *UI == User); 5070 5071 // Now that we have modified User, add it back to the CSE maps. If it 5072 // already exists there, recursively merge the results together. 5073 AddModifiedNodeToCSEMaps(User, &Listener); 5074 } 5075} 5076 5077/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5078/// This can cause recursive merging of nodes in the DAG. 5079/// 5080/// This version can replace From with any result values. To must match the 5081/// number and types of values returned by From. 5082void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5083 const SDValue *To, 5084 DAGUpdateListener *UpdateListener) { 5085 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5086 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5087 5088 // Iterate over just the existing users of From. See the comments in 5089 // the ReplaceAllUsesWith above. 5090 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5091 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5092 while (UI != UE) { 5093 SDNode *User = *UI; 5094 5095 // This node is about to morph, remove its old self from the CSE maps. 5096 RemoveNodeFromCSEMaps(User); 5097 5098 // A user can appear in a use list multiple times, and when this 5099 // happens the uses are usually next to each other in the list. 5100 // To help reduce the number of CSE recomputations, process all 5101 // the uses of this user that we can find this way. 5102 do { 5103 SDUse &Use = UI.getUse(); 5104 const SDValue &ToOp = To[Use.getResNo()]; 5105 ++UI; 5106 Use.set(ToOp); 5107 } while (UI != UE && *UI == User); 5108 5109 // Now that we have modified User, add it back to the CSE maps. If it 5110 // already exists there, recursively merge the results together. 5111 AddModifiedNodeToCSEMaps(User, &Listener); 5112 } 5113} 5114 5115/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5116/// uses of other values produced by From.getNode() alone. The Deleted 5117/// vector is handled the same way as for ReplaceAllUsesWith. 5118void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5119 DAGUpdateListener *UpdateListener){ 5120 // Handle the really simple, really trivial case efficiently. 5121 if (From == To) return; 5122 5123 // Handle the simple, trivial, case efficiently. 5124 if (From.getNode()->getNumValues() == 1) { 5125 ReplaceAllUsesWith(From, To, UpdateListener); 5126 return; 5127 } 5128 5129 // Iterate over just the existing users of From. See the comments in 5130 // the ReplaceAllUsesWith above. 5131 SDNode::use_iterator UI = From.getNode()->use_begin(), 5132 UE = From.getNode()->use_end(); 5133 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5134 while (UI != UE) { 5135 SDNode *User = *UI; 5136 bool UserRemovedFromCSEMaps = false; 5137 5138 // A user can appear in a use list multiple times, and when this 5139 // happens the uses are usually next to each other in the list. 5140 // To help reduce the number of CSE recomputations, process all 5141 // the uses of this user that we can find this way. 5142 do { 5143 SDUse &Use = UI.getUse(); 5144 5145 // Skip uses of different values from the same node. 5146 if (Use.getResNo() != From.getResNo()) { 5147 ++UI; 5148 continue; 5149 } 5150 5151 // If this node hasn't been modified yet, it's still in the CSE maps, 5152 // so remove its old self from the CSE maps. 5153 if (!UserRemovedFromCSEMaps) { 5154 RemoveNodeFromCSEMaps(User); 5155 UserRemovedFromCSEMaps = true; 5156 } 5157 5158 ++UI; 5159 Use.set(To); 5160 } while (UI != UE && *UI == User); 5161 5162 // We are iterating over all uses of the From node, so if a use 5163 // doesn't use the specific value, no changes are made. 5164 if (!UserRemovedFromCSEMaps) 5165 continue; 5166 5167 // Now that we have modified User, add it back to the CSE maps. If it 5168 // already exists there, recursively merge the results together. 5169 AddModifiedNodeToCSEMaps(User, &Listener); 5170 } 5171} 5172 5173namespace { 5174 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5175 /// to record information about a use. 5176 struct UseMemo { 5177 SDNode *User; 5178 unsigned Index; 5179 SDUse *Use; 5180 }; 5181 5182 /// operator< - Sort Memos by User. 5183 bool operator<(const UseMemo &L, const UseMemo &R) { 5184 return (intptr_t)L.User < (intptr_t)R.User; 5185 } 5186} 5187 5188/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5189/// uses of other values produced by From.getNode() alone. The same value 5190/// may appear in both the From and To list. The Deleted vector is 5191/// handled the same way as for ReplaceAllUsesWith. 5192void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5193 const SDValue *To, 5194 unsigned Num, 5195 DAGUpdateListener *UpdateListener){ 5196 // Handle the simple, trivial case efficiently. 5197 if (Num == 1) 5198 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5199 5200 // Read up all the uses and make records of them. This helps 5201 // processing new uses that are introduced during the 5202 // replacement process. 5203 SmallVector<UseMemo, 4> Uses; 5204 for (unsigned i = 0; i != Num; ++i) { 5205 unsigned FromResNo = From[i].getResNo(); 5206 SDNode *FromNode = From[i].getNode(); 5207 for (SDNode::use_iterator UI = FromNode->use_begin(), 5208 E = FromNode->use_end(); UI != E; ++UI) { 5209 SDUse &Use = UI.getUse(); 5210 if (Use.getResNo() == FromResNo) { 5211 UseMemo Memo = { *UI, i, &Use }; 5212 Uses.push_back(Memo); 5213 } 5214 } 5215 } 5216 5217 // Sort the uses, so that all the uses from a given User are together. 5218 std::sort(Uses.begin(), Uses.end()); 5219 5220 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5221 UseIndex != UseIndexEnd; ) { 5222 // We know that this user uses some value of From. If it is the right 5223 // value, update it. 5224 SDNode *User = Uses[UseIndex].User; 5225 5226 // This node is about to morph, remove its old self from the CSE maps. 5227 RemoveNodeFromCSEMaps(User); 5228 5229 // The Uses array is sorted, so all the uses for a given User 5230 // are next to each other in the list. 5231 // To help reduce the number of CSE recomputations, process all 5232 // the uses of this user that we can find this way. 5233 do { 5234 unsigned i = Uses[UseIndex].Index; 5235 SDUse &Use = *Uses[UseIndex].Use; 5236 ++UseIndex; 5237 5238 Use.set(To[i]); 5239 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5240 5241 // Now that we have modified User, add it back to the CSE maps. If it 5242 // already exists there, recursively merge the results together. 5243 AddModifiedNodeToCSEMaps(User, UpdateListener); 5244 } 5245} 5246 5247/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5248/// based on their topological order. It returns the maximum id and a vector 5249/// of the SDNodes* in assigned order by reference. 5250unsigned SelectionDAG::AssignTopologicalOrder() { 5251 5252 unsigned DAGSize = 0; 5253 5254 // SortedPos tracks the progress of the algorithm. Nodes before it are 5255 // sorted, nodes after it are unsorted. When the algorithm completes 5256 // it is at the end of the list. 5257 allnodes_iterator SortedPos = allnodes_begin(); 5258 5259 // Visit all the nodes. Move nodes with no operands to the front of 5260 // the list immediately. Annotate nodes that do have operands with their 5261 // operand count. Before we do this, the Node Id fields of the nodes 5262 // may contain arbitrary values. After, the Node Id fields for nodes 5263 // before SortedPos will contain the topological sort index, and the 5264 // Node Id fields for nodes At SortedPos and after will contain the 5265 // count of outstanding operands. 5266 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5267 SDNode *N = I++; 5268 checkForCycles(N); 5269 unsigned Degree = N->getNumOperands(); 5270 if (Degree == 0) { 5271 // A node with no uses, add it to the result array immediately. 5272 N->setNodeId(DAGSize++); 5273 allnodes_iterator Q = N; 5274 if (Q != SortedPos) 5275 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5276 assert(SortedPos != AllNodes.end() && "Overran node list"); 5277 ++SortedPos; 5278 } else { 5279 // Temporarily use the Node Id as scratch space for the degree count. 5280 N->setNodeId(Degree); 5281 } 5282 } 5283 5284 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5285 // such that by the time the end is reached all nodes will be sorted. 5286 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5287 SDNode *N = I; 5288 checkForCycles(N); 5289 // N is in sorted position, so all its uses have one less operand 5290 // that needs to be sorted. 5291 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5292 UI != UE; ++UI) { 5293 SDNode *P = *UI; 5294 unsigned Degree = P->getNodeId(); 5295 assert(Degree != 0 && "Invalid node degree"); 5296 --Degree; 5297 if (Degree == 0) { 5298 // All of P's operands are sorted, so P may sorted now. 5299 P->setNodeId(DAGSize++); 5300 if (P != SortedPos) 5301 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5302 assert(SortedPos != AllNodes.end() && "Overran node list"); 5303 ++SortedPos; 5304 } else { 5305 // Update P's outstanding operand count. 5306 P->setNodeId(Degree); 5307 } 5308 } 5309 if (I == SortedPos) { 5310#ifndef NDEBUG 5311 SDNode *S = ++I; 5312 dbgs() << "Overran sorted position:\n"; 5313 S->dumprFull(); 5314#endif 5315 llvm_unreachable(0); 5316 } 5317 } 5318 5319 assert(SortedPos == AllNodes.end() && 5320 "Topological sort incomplete!"); 5321 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5322 "First node in topological sort is not the entry token!"); 5323 assert(AllNodes.front().getNodeId() == 0 && 5324 "First node in topological sort has non-zero id!"); 5325 assert(AllNodes.front().getNumOperands() == 0 && 5326 "First node in topological sort has operands!"); 5327 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5328 "Last node in topologic sort has unexpected id!"); 5329 assert(AllNodes.back().use_empty() && 5330 "Last node in topologic sort has users!"); 5331 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5332 return DAGSize; 5333} 5334 5335/// AssignOrdering - Assign an order to the SDNode. 5336void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5337 assert(SD && "Trying to assign an order to a null node!"); 5338 Ordering->add(SD, Order); 5339} 5340 5341/// GetOrdering - Get the order for the SDNode. 5342unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5343 assert(SD && "Trying to get the order of a null node!"); 5344 return Ordering->getOrder(SD); 5345} 5346 5347/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5348/// value is produced by SD. 5349void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5350 DbgInfo->add(DB, SD, isParameter); 5351 if (SD) 5352 SD->setHasDebugValue(true); 5353} 5354 5355//===----------------------------------------------------------------------===// 5356// SDNode Class 5357//===----------------------------------------------------------------------===// 5358 5359HandleSDNode::~HandleSDNode() { 5360 DropOperands(); 5361} 5362 5363GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 5364 EVT VT, int64_t o, unsigned char TF) 5365 : SDNode(Opc, DebugLoc(), getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5366 TheGlobal = GA; 5367} 5368 5369MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5370 MachineMemOperand *mmo) 5371 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5372 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5373 MMO->isNonTemporal()); 5374 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5375 assert(isNonTemporal() == MMO->isNonTemporal() && 5376 "Non-temporal encoding error!"); 5377 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5378} 5379 5380MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5381 const SDValue *Ops, unsigned NumOps, EVT memvt, 5382 MachineMemOperand *mmo) 5383 : SDNode(Opc, dl, VTs, Ops, NumOps), 5384 MemoryVT(memvt), MMO(mmo) { 5385 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5386 MMO->isNonTemporal()); 5387 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5388 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5389} 5390 5391/// Profile - Gather unique data for the node. 5392/// 5393void SDNode::Profile(FoldingSetNodeID &ID) const { 5394 AddNodeIDNode(ID, this); 5395} 5396 5397namespace { 5398 struct EVTArray { 5399 std::vector<EVT> VTs; 5400 5401 EVTArray() { 5402 VTs.reserve(MVT::LAST_VALUETYPE); 5403 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5404 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5405 } 5406 }; 5407} 5408 5409static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5410static ManagedStatic<EVTArray> SimpleVTArray; 5411static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5412 5413/// getValueTypeList - Return a pointer to the specified value type. 5414/// 5415const EVT *SDNode::getValueTypeList(EVT VT) { 5416 if (VT.isExtended()) { 5417 sys::SmartScopedLock<true> Lock(*VTMutex); 5418 return &(*EVTs->insert(VT).first); 5419 } else { 5420 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5421 } 5422} 5423 5424/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5425/// indicated value. This method ignores uses of other values defined by this 5426/// operation. 5427bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5428 assert(Value < getNumValues() && "Bad value!"); 5429 5430 // TODO: Only iterate over uses of a given value of the node 5431 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5432 if (UI.getUse().getResNo() == Value) { 5433 if (NUses == 0) 5434 return false; 5435 --NUses; 5436 } 5437 } 5438 5439 // Found exactly the right number of uses? 5440 return NUses == 0; 5441} 5442 5443 5444/// hasAnyUseOfValue - Return true if there are any use of the indicated 5445/// value. This method ignores uses of other values defined by this operation. 5446bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5447 assert(Value < getNumValues() && "Bad value!"); 5448 5449 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5450 if (UI.getUse().getResNo() == Value) 5451 return true; 5452 5453 return false; 5454} 5455 5456 5457/// isOnlyUserOf - Return true if this node is the only use of N. 5458/// 5459bool SDNode::isOnlyUserOf(SDNode *N) const { 5460 bool Seen = false; 5461 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5462 SDNode *User = *I; 5463 if (User == this) 5464 Seen = true; 5465 else 5466 return false; 5467 } 5468 5469 return Seen; 5470} 5471 5472/// isOperand - Return true if this node is an operand of N. 5473/// 5474bool SDValue::isOperandOf(SDNode *N) const { 5475 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5476 if (*this == N->getOperand(i)) 5477 return true; 5478 return false; 5479} 5480 5481bool SDNode::isOperandOf(SDNode *N) const { 5482 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5483 if (this == N->OperandList[i].getNode()) 5484 return true; 5485 return false; 5486} 5487 5488/// reachesChainWithoutSideEffects - Return true if this operand (which must 5489/// be a chain) reaches the specified operand without crossing any 5490/// side-effecting instructions. In practice, this looks through token 5491/// factors and non-volatile loads. In order to remain efficient, this only 5492/// looks a couple of nodes in, it does not do an exhaustive search. 5493bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5494 unsigned Depth) const { 5495 if (*this == Dest) return true; 5496 5497 // Don't search too deeply, we just want to be able to see through 5498 // TokenFactor's etc. 5499 if (Depth == 0) return false; 5500 5501 // If this is a token factor, all inputs to the TF happen in parallel. If any 5502 // of the operands of the TF reach dest, then we can do the xform. 5503 if (getOpcode() == ISD::TokenFactor) { 5504 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5505 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5506 return true; 5507 return false; 5508 } 5509 5510 // Loads don't have side effects, look through them. 5511 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5512 if (!Ld->isVolatile()) 5513 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5514 } 5515 return false; 5516} 5517 5518/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5519/// is either an operand of N or it can be reached by traversing up the operands. 5520/// NOTE: this is an expensive method. Use it carefully. 5521bool SDNode::isPredecessorOf(SDNode *N) const { 5522 SmallPtrSet<SDNode *, 32> Visited; 5523 SmallVector<SDNode *, 16> Worklist; 5524 Worklist.push_back(N); 5525 5526 do { 5527 N = Worklist.pop_back_val(); 5528 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5529 SDNode *Op = N->getOperand(i).getNode(); 5530 if (Op == this) 5531 return true; 5532 if (Visited.insert(Op)) 5533 Worklist.push_back(Op); 5534 } 5535 } while (!Worklist.empty()); 5536 5537 return false; 5538} 5539 5540uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5541 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5542 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5543} 5544 5545std::string SDNode::getOperationName(const SelectionDAG *G) const { 5546 switch (getOpcode()) { 5547 default: 5548 if (getOpcode() < ISD::BUILTIN_OP_END) 5549 return "<<Unknown DAG Node>>"; 5550 if (isMachineOpcode()) { 5551 if (G) 5552 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5553 if (getMachineOpcode() < TII->getNumOpcodes()) 5554 return TII->get(getMachineOpcode()).getName(); 5555 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5556 } 5557 if (G) { 5558 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5559 const char *Name = TLI.getTargetNodeName(getOpcode()); 5560 if (Name) return Name; 5561 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5562 } 5563 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5564 5565#ifndef NDEBUG 5566 case ISD::DELETED_NODE: 5567 return "<<Deleted Node!>>"; 5568#endif 5569 case ISD::PREFETCH: return "Prefetch"; 5570 case ISD::MEMBARRIER: return "MemBarrier"; 5571 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5572 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5573 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5574 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5575 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5576 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5577 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5578 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5579 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5580 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5581 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5582 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5583 case ISD::PCMARKER: return "PCMarker"; 5584 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5585 case ISD::SRCVALUE: return "SrcValue"; 5586 case ISD::MDNODE_SDNODE: return "MDNode"; 5587 case ISD::EntryToken: return "EntryToken"; 5588 case ISD::TokenFactor: return "TokenFactor"; 5589 case ISD::AssertSext: return "AssertSext"; 5590 case ISD::AssertZext: return "AssertZext"; 5591 5592 case ISD::BasicBlock: return "BasicBlock"; 5593 case ISD::VALUETYPE: return "ValueType"; 5594 case ISD::Register: return "Register"; 5595 5596 case ISD::Constant: return "Constant"; 5597 case ISD::ConstantFP: return "ConstantFP"; 5598 case ISD::GlobalAddress: return "GlobalAddress"; 5599 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5600 case ISD::FrameIndex: return "FrameIndex"; 5601 case ISD::JumpTable: return "JumpTable"; 5602 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5603 case ISD::RETURNADDR: return "RETURNADDR"; 5604 case ISD::FRAMEADDR: return "FRAMEADDR"; 5605 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5606 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5607 case ISD::LSDAADDR: return "LSDAADDR"; 5608 case ISD::EHSELECTION: return "EHSELECTION"; 5609 case ISD::EH_RETURN: return "EH_RETURN"; 5610 case ISD::ConstantPool: return "ConstantPool"; 5611 case ISD::ExternalSymbol: return "ExternalSymbol"; 5612 case ISD::BlockAddress: return "BlockAddress"; 5613 case ISD::INTRINSIC_WO_CHAIN: 5614 case ISD::INTRINSIC_VOID: 5615 case ISD::INTRINSIC_W_CHAIN: { 5616 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5617 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5618 if (IID < Intrinsic::num_intrinsics) 5619 return Intrinsic::getName((Intrinsic::ID)IID); 5620 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5621 return TII->getName(IID); 5622 llvm_unreachable("Invalid intrinsic ID"); 5623 } 5624 5625 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5626 case ISD::TargetConstant: return "TargetConstant"; 5627 case ISD::TargetConstantFP:return "TargetConstantFP"; 5628 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5629 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5630 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5631 case ISD::TargetJumpTable: return "TargetJumpTable"; 5632 case ISD::TargetConstantPool: return "TargetConstantPool"; 5633 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5634 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5635 5636 case ISD::CopyToReg: return "CopyToReg"; 5637 case ISD::CopyFromReg: return "CopyFromReg"; 5638 case ISD::UNDEF: return "undef"; 5639 case ISD::MERGE_VALUES: return "merge_values"; 5640 case ISD::INLINEASM: return "inlineasm"; 5641 case ISD::EH_LABEL: return "eh_label"; 5642 case ISD::HANDLENODE: return "handlenode"; 5643 5644 // Unary operators 5645 case ISD::FABS: return "fabs"; 5646 case ISD::FNEG: return "fneg"; 5647 case ISD::FSQRT: return "fsqrt"; 5648 case ISD::FSIN: return "fsin"; 5649 case ISD::FCOS: return "fcos"; 5650 case ISD::FPOWI: return "fpowi"; 5651 case ISD::FPOW: return "fpow"; 5652 case ISD::FTRUNC: return "ftrunc"; 5653 case ISD::FFLOOR: return "ffloor"; 5654 case ISD::FCEIL: return "fceil"; 5655 case ISD::FRINT: return "frint"; 5656 case ISD::FNEARBYINT: return "fnearbyint"; 5657 5658 // Binary operators 5659 case ISD::ADD: return "add"; 5660 case ISD::SUB: return "sub"; 5661 case ISD::MUL: return "mul"; 5662 case ISD::MULHU: return "mulhu"; 5663 case ISD::MULHS: return "mulhs"; 5664 case ISD::SDIV: return "sdiv"; 5665 case ISD::UDIV: return "udiv"; 5666 case ISD::SREM: return "srem"; 5667 case ISD::UREM: return "urem"; 5668 case ISD::SMUL_LOHI: return "smul_lohi"; 5669 case ISD::UMUL_LOHI: return "umul_lohi"; 5670 case ISD::SDIVREM: return "sdivrem"; 5671 case ISD::UDIVREM: return "udivrem"; 5672 case ISD::AND: return "and"; 5673 case ISD::OR: return "or"; 5674 case ISD::XOR: return "xor"; 5675 case ISD::SHL: return "shl"; 5676 case ISD::SRA: return "sra"; 5677 case ISD::SRL: return "srl"; 5678 case ISD::ROTL: return "rotl"; 5679 case ISD::ROTR: return "rotr"; 5680 case ISD::FADD: return "fadd"; 5681 case ISD::FSUB: return "fsub"; 5682 case ISD::FMUL: return "fmul"; 5683 case ISD::FDIV: return "fdiv"; 5684 case ISD::FREM: return "frem"; 5685 case ISD::FCOPYSIGN: return "fcopysign"; 5686 case ISD::FGETSIGN: return "fgetsign"; 5687 5688 case ISD::SETCC: return "setcc"; 5689 case ISD::VSETCC: return "vsetcc"; 5690 case ISD::SELECT: return "select"; 5691 case ISD::SELECT_CC: return "select_cc"; 5692 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5693 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5694 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5695 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5696 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5697 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5698 case ISD::CARRY_FALSE: return "carry_false"; 5699 case ISD::ADDC: return "addc"; 5700 case ISD::ADDE: return "adde"; 5701 case ISD::SADDO: return "saddo"; 5702 case ISD::UADDO: return "uaddo"; 5703 case ISD::SSUBO: return "ssubo"; 5704 case ISD::USUBO: return "usubo"; 5705 case ISD::SMULO: return "smulo"; 5706 case ISD::UMULO: return "umulo"; 5707 case ISD::SUBC: return "subc"; 5708 case ISD::SUBE: return "sube"; 5709 case ISD::SHL_PARTS: return "shl_parts"; 5710 case ISD::SRA_PARTS: return "sra_parts"; 5711 case ISD::SRL_PARTS: return "srl_parts"; 5712 5713 // Conversion operators. 5714 case ISD::SIGN_EXTEND: return "sign_extend"; 5715 case ISD::ZERO_EXTEND: return "zero_extend"; 5716 case ISD::ANY_EXTEND: return "any_extend"; 5717 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5718 case ISD::TRUNCATE: return "truncate"; 5719 case ISD::FP_ROUND: return "fp_round"; 5720 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5721 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5722 case ISD::FP_EXTEND: return "fp_extend"; 5723 5724 case ISD::SINT_TO_FP: return "sint_to_fp"; 5725 case ISD::UINT_TO_FP: return "uint_to_fp"; 5726 case ISD::FP_TO_SINT: return "fp_to_sint"; 5727 case ISD::FP_TO_UINT: return "fp_to_uint"; 5728 case ISD::BIT_CONVERT: return "bit_convert"; 5729 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5730 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5731 5732 case ISD::CONVERT_RNDSAT: { 5733 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5734 default: llvm_unreachable("Unknown cvt code!"); 5735 case ISD::CVT_FF: return "cvt_ff"; 5736 case ISD::CVT_FS: return "cvt_fs"; 5737 case ISD::CVT_FU: return "cvt_fu"; 5738 case ISD::CVT_SF: return "cvt_sf"; 5739 case ISD::CVT_UF: return "cvt_uf"; 5740 case ISD::CVT_SS: return "cvt_ss"; 5741 case ISD::CVT_SU: return "cvt_su"; 5742 case ISD::CVT_US: return "cvt_us"; 5743 case ISD::CVT_UU: return "cvt_uu"; 5744 } 5745 } 5746 5747 // Control flow instructions 5748 case ISD::BR: return "br"; 5749 case ISD::BRIND: return "brind"; 5750 case ISD::BR_JT: return "br_jt"; 5751 case ISD::BRCOND: return "brcond"; 5752 case ISD::BR_CC: return "br_cc"; 5753 case ISD::CALLSEQ_START: return "callseq_start"; 5754 case ISD::CALLSEQ_END: return "callseq_end"; 5755 5756 // Other operators 5757 case ISD::LOAD: return "load"; 5758 case ISD::STORE: return "store"; 5759 case ISD::VAARG: return "vaarg"; 5760 case ISD::VACOPY: return "vacopy"; 5761 case ISD::VAEND: return "vaend"; 5762 case ISD::VASTART: return "vastart"; 5763 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5764 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5765 case ISD::BUILD_PAIR: return "build_pair"; 5766 case ISD::STACKSAVE: return "stacksave"; 5767 case ISD::STACKRESTORE: return "stackrestore"; 5768 case ISD::TRAP: return "trap"; 5769 5770 // Bit manipulation 5771 case ISD::BSWAP: return "bswap"; 5772 case ISD::CTPOP: return "ctpop"; 5773 case ISD::CTTZ: return "cttz"; 5774 case ISD::CTLZ: return "ctlz"; 5775 5776 // Trampolines 5777 case ISD::TRAMPOLINE: return "trampoline"; 5778 5779 case ISD::CONDCODE: 5780 switch (cast<CondCodeSDNode>(this)->get()) { 5781 default: llvm_unreachable("Unknown setcc condition!"); 5782 case ISD::SETOEQ: return "setoeq"; 5783 case ISD::SETOGT: return "setogt"; 5784 case ISD::SETOGE: return "setoge"; 5785 case ISD::SETOLT: return "setolt"; 5786 case ISD::SETOLE: return "setole"; 5787 case ISD::SETONE: return "setone"; 5788 5789 case ISD::SETO: return "seto"; 5790 case ISD::SETUO: return "setuo"; 5791 case ISD::SETUEQ: return "setue"; 5792 case ISD::SETUGT: return "setugt"; 5793 case ISD::SETUGE: return "setuge"; 5794 case ISD::SETULT: return "setult"; 5795 case ISD::SETULE: return "setule"; 5796 case ISD::SETUNE: return "setune"; 5797 5798 case ISD::SETEQ: return "seteq"; 5799 case ISD::SETGT: return "setgt"; 5800 case ISD::SETGE: return "setge"; 5801 case ISD::SETLT: return "setlt"; 5802 case ISD::SETLE: return "setle"; 5803 case ISD::SETNE: return "setne"; 5804 } 5805 } 5806} 5807 5808const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5809 switch (AM) { 5810 default: 5811 return ""; 5812 case ISD::PRE_INC: 5813 return "<pre-inc>"; 5814 case ISD::PRE_DEC: 5815 return "<pre-dec>"; 5816 case ISD::POST_INC: 5817 return "<post-inc>"; 5818 case ISD::POST_DEC: 5819 return "<post-dec>"; 5820 } 5821} 5822 5823std::string ISD::ArgFlagsTy::getArgFlagsString() { 5824 std::string S = "< "; 5825 5826 if (isZExt()) 5827 S += "zext "; 5828 if (isSExt()) 5829 S += "sext "; 5830 if (isInReg()) 5831 S += "inreg "; 5832 if (isSRet()) 5833 S += "sret "; 5834 if (isByVal()) 5835 S += "byval "; 5836 if (isNest()) 5837 S += "nest "; 5838 if (getByValAlign()) 5839 S += "byval-align:" + utostr(getByValAlign()) + " "; 5840 if (getOrigAlign()) 5841 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5842 if (getByValSize()) 5843 S += "byval-size:" + utostr(getByValSize()) + " "; 5844 return S + ">"; 5845} 5846 5847void SDNode::dump() const { dump(0); } 5848void SDNode::dump(const SelectionDAG *G) const { 5849 print(dbgs(), G); 5850} 5851 5852void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5853 OS << (void*)this << ": "; 5854 5855 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5856 if (i) OS << ","; 5857 if (getValueType(i) == MVT::Other) 5858 OS << "ch"; 5859 else 5860 OS << getValueType(i).getEVTString(); 5861 } 5862 OS << " = " << getOperationName(G); 5863} 5864 5865void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5866 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5867 if (!MN->memoperands_empty()) { 5868 OS << "<"; 5869 OS << "Mem:"; 5870 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5871 e = MN->memoperands_end(); i != e; ++i) { 5872 OS << **i; 5873 if (next(i) != e) 5874 OS << " "; 5875 } 5876 OS << ">"; 5877 } 5878 } else if (const ShuffleVectorSDNode *SVN = 5879 dyn_cast<ShuffleVectorSDNode>(this)) { 5880 OS << "<"; 5881 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5882 int Idx = SVN->getMaskElt(i); 5883 if (i) OS << ","; 5884 if (Idx < 0) 5885 OS << "u"; 5886 else 5887 OS << Idx; 5888 } 5889 OS << ">"; 5890 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5891 OS << '<' << CSDN->getAPIntValue() << '>'; 5892 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5893 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5894 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5895 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5896 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5897 else { 5898 OS << "<APFloat("; 5899 CSDN->getValueAPF().bitcastToAPInt().dump(); 5900 OS << ")>"; 5901 } 5902 } else if (const GlobalAddressSDNode *GADN = 5903 dyn_cast<GlobalAddressSDNode>(this)) { 5904 int64_t offset = GADN->getOffset(); 5905 OS << '<'; 5906 WriteAsOperand(OS, GADN->getGlobal()); 5907 OS << '>'; 5908 if (offset > 0) 5909 OS << " + " << offset; 5910 else 5911 OS << " " << offset; 5912 if (unsigned int TF = GADN->getTargetFlags()) 5913 OS << " [TF=" << TF << ']'; 5914 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5915 OS << "<" << FIDN->getIndex() << ">"; 5916 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5917 OS << "<" << JTDN->getIndex() << ">"; 5918 if (unsigned int TF = JTDN->getTargetFlags()) 5919 OS << " [TF=" << TF << ']'; 5920 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5921 int offset = CP->getOffset(); 5922 if (CP->isMachineConstantPoolEntry()) 5923 OS << "<" << *CP->getMachineCPVal() << ">"; 5924 else 5925 OS << "<" << *CP->getConstVal() << ">"; 5926 if (offset > 0) 5927 OS << " + " << offset; 5928 else 5929 OS << " " << offset; 5930 if (unsigned int TF = CP->getTargetFlags()) 5931 OS << " [TF=" << TF << ']'; 5932 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5933 OS << "<"; 5934 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5935 if (LBB) 5936 OS << LBB->getName() << " "; 5937 OS << (const void*)BBDN->getBasicBlock() << ">"; 5938 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5939 if (G && R->getReg() && 5940 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5941 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5942 } else { 5943 OS << " %reg" << R->getReg(); 5944 } 5945 } else if (const ExternalSymbolSDNode *ES = 5946 dyn_cast<ExternalSymbolSDNode>(this)) { 5947 OS << "'" << ES->getSymbol() << "'"; 5948 if (unsigned int TF = ES->getTargetFlags()) 5949 OS << " [TF=" << TF << ']'; 5950 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5951 if (M->getValue()) 5952 OS << "<" << M->getValue() << ">"; 5953 else 5954 OS << "<null>"; 5955 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 5956 if (MD->getMD()) 5957 OS << "<" << MD->getMD() << ">"; 5958 else 5959 OS << "<null>"; 5960 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5961 OS << ":" << N->getVT().getEVTString(); 5962 } 5963 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5964 OS << "<" << *LD->getMemOperand(); 5965 5966 bool doExt = true; 5967 switch (LD->getExtensionType()) { 5968 default: doExt = false; break; 5969 case ISD::EXTLOAD: OS << ", anyext"; break; 5970 case ISD::SEXTLOAD: OS << ", sext"; break; 5971 case ISD::ZEXTLOAD: OS << ", zext"; break; 5972 } 5973 if (doExt) 5974 OS << " from " << LD->getMemoryVT().getEVTString(); 5975 5976 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5977 if (*AM) 5978 OS << ", " << AM; 5979 5980 OS << ">"; 5981 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5982 OS << "<" << *ST->getMemOperand(); 5983 5984 if (ST->isTruncatingStore()) 5985 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 5986 5987 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5988 if (*AM) 5989 OS << ", " << AM; 5990 5991 OS << ">"; 5992 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 5993 OS << "<" << *M->getMemOperand() << ">"; 5994 } else if (const BlockAddressSDNode *BA = 5995 dyn_cast<BlockAddressSDNode>(this)) { 5996 OS << "<"; 5997 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 5998 OS << ", "; 5999 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 6000 OS << ">"; 6001 if (unsigned int TF = BA->getTargetFlags()) 6002 OS << " [TF=" << TF << ']'; 6003 } 6004 6005 if (G) 6006 if (unsigned Order = G->GetOrdering(this)) 6007 OS << " [ORD=" << Order << ']'; 6008 6009 if (getNodeId() != -1) 6010 OS << " [ID=" << getNodeId() << ']'; 6011} 6012 6013void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6014 print_types(OS, G); 6015 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6016 if (i) OS << ", "; else OS << " "; 6017 OS << (void*)getOperand(i).getNode(); 6018 if (unsigned RN = getOperand(i).getResNo()) 6019 OS << ":" << RN; 6020 } 6021 print_details(OS, G); 6022} 6023 6024static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6025 const SelectionDAG *G, unsigned depth, 6026 unsigned indent) 6027{ 6028 if (depth == 0) 6029 return; 6030 6031 OS.indent(indent); 6032 6033 N->print(OS, G); 6034 6035 if (depth < 1) 6036 return; 6037 6038 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6039 OS << '\n'; 6040 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6041 } 6042} 6043 6044void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6045 unsigned depth) const { 6046 printrWithDepthHelper(OS, this, G, depth, 0); 6047} 6048 6049void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6050 // Don't print impossibly deep things. 6051 printrWithDepth(OS, G, 100); 6052} 6053 6054void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6055 printrWithDepth(dbgs(), G, depth); 6056} 6057 6058void SDNode::dumprFull(const SelectionDAG *G) const { 6059 // Don't print impossibly deep things. 6060 dumprWithDepth(G, 100); 6061} 6062 6063static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6064 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6065 if (N->getOperand(i).getNode()->hasOneUse()) 6066 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6067 else 6068 dbgs() << "\n" << std::string(indent+2, ' ') 6069 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6070 6071 6072 dbgs() << "\n"; 6073 dbgs().indent(indent); 6074 N->dump(G); 6075} 6076 6077SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6078 assert(N->getNumValues() == 1 && 6079 "Can't unroll a vector with multiple results!"); 6080 6081 EVT VT = N->getValueType(0); 6082 unsigned NE = VT.getVectorNumElements(); 6083 EVT EltVT = VT.getVectorElementType(); 6084 DebugLoc dl = N->getDebugLoc(); 6085 6086 SmallVector<SDValue, 8> Scalars; 6087 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6088 6089 // If ResNE is 0, fully unroll the vector op. 6090 if (ResNE == 0) 6091 ResNE = NE; 6092 else if (NE > ResNE) 6093 NE = ResNE; 6094 6095 unsigned i; 6096 for (i= 0; i != NE; ++i) { 6097 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6098 SDValue Operand = N->getOperand(j); 6099 EVT OperandVT = Operand.getValueType(); 6100 if (OperandVT.isVector()) { 6101 // A vector operand; extract a single element. 6102 EVT OperandEltVT = OperandVT.getVectorElementType(); 6103 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6104 OperandEltVT, 6105 Operand, 6106 getConstant(i, MVT::i32)); 6107 } else { 6108 // A scalar operand; just use it as is. 6109 Operands[j] = Operand; 6110 } 6111 } 6112 6113 switch (N->getOpcode()) { 6114 default: 6115 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6116 &Operands[0], Operands.size())); 6117 break; 6118 case ISD::SHL: 6119 case ISD::SRA: 6120 case ISD::SRL: 6121 case ISD::ROTL: 6122 case ISD::ROTR: 6123 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6124 getShiftAmountOperand(Operands[1]))); 6125 break; 6126 case ISD::SIGN_EXTEND_INREG: 6127 case ISD::FP_ROUND_INREG: { 6128 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6129 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6130 Operands[0], 6131 getValueType(ExtVT))); 6132 } 6133 } 6134 } 6135 6136 for (; i < ResNE; ++i) 6137 Scalars.push_back(getUNDEF(EltVT)); 6138 6139 return getNode(ISD::BUILD_VECTOR, dl, 6140 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6141 &Scalars[0], Scalars.size()); 6142} 6143 6144 6145/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6146/// location that is 'Dist' units away from the location that the 'Base' load 6147/// is loading from. 6148bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6149 unsigned Bytes, int Dist) const { 6150 if (LD->getChain() != Base->getChain()) 6151 return false; 6152 EVT VT = LD->getValueType(0); 6153 if (VT.getSizeInBits() / 8 != Bytes) 6154 return false; 6155 6156 SDValue Loc = LD->getOperand(1); 6157 SDValue BaseLoc = Base->getOperand(1); 6158 if (Loc.getOpcode() == ISD::FrameIndex) { 6159 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6160 return false; 6161 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6162 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6163 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6164 int FS = MFI->getObjectSize(FI); 6165 int BFS = MFI->getObjectSize(BFI); 6166 if (FS != BFS || FS != (int)Bytes) return false; 6167 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6168 } 6169 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6170 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6171 if (V && (V->getSExtValue() == Dist*Bytes)) 6172 return true; 6173 } 6174 6175 const GlobalValue *GV1 = NULL; 6176 const GlobalValue *GV2 = NULL; 6177 int64_t Offset1 = 0; 6178 int64_t Offset2 = 0; 6179 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6180 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6181 if (isGA1 && isGA2 && GV1 == GV2) 6182 return Offset1 == (Offset2 + Dist*Bytes); 6183 return false; 6184} 6185 6186 6187/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6188/// it cannot be inferred. 6189unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6190 // If this is a GlobalAddress + cst, return the alignment. 6191 const GlobalValue *GV; 6192 int64_t GVOffset = 0; 6193 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6194 // If GV has specified alignment, then use it. Otherwise, use the preferred 6195 // alignment. 6196 unsigned Align = GV->getAlignment(); 6197 if (!Align) { 6198 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6199 if (GVar->hasInitializer()) { 6200 const TargetData *TD = TLI.getTargetData(); 6201 Align = TD->getPreferredAlignment(GVar); 6202 } 6203 } 6204 } 6205 return MinAlign(Align, GVOffset); 6206 } 6207 6208 // If this is a direct reference to a stack slot, use information about the 6209 // stack slot's alignment. 6210 int FrameIdx = 1 << 31; 6211 int64_t FrameOffset = 0; 6212 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6213 FrameIdx = FI->getIndex(); 6214 } else if (Ptr.getOpcode() == ISD::ADD && 6215 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6216 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6217 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6218 FrameOffset = Ptr.getConstantOperandVal(1); 6219 } 6220 6221 if (FrameIdx != (1 << 31)) { 6222 // FIXME: Handle FI+CST. 6223 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6224 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6225 FrameOffset); 6226 if (MFI.isFixedObjectIndex(FrameIdx)) { 6227 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset; 6228 6229 // The alignment of the frame index can be determined from its offset from 6230 // the incoming frame position. If the frame object is at offset 32 and 6231 // the stack is guaranteed to be 16-byte aligned, then we know that the 6232 // object is 16-byte aligned. 6233 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment(); 6234 unsigned Align = MinAlign(ObjectOffset, StackAlign); 6235 6236 // Finally, the frame object itself may have a known alignment. Factor 6237 // the alignment + offset into a new alignment. For example, if we know 6238 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a 6239 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte 6240 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc. 6241 return std::max(Align, FIInfoAlign); 6242 } 6243 return FIInfoAlign; 6244 } 6245 6246 return 0; 6247} 6248 6249void SelectionDAG::dump() const { 6250 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6251 6252 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6253 I != E; ++I) { 6254 const SDNode *N = I; 6255 if (!N->hasOneUse() && N != getRoot().getNode()) 6256 DumpNodes(N, 2, this); 6257 } 6258 6259 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6260 6261 dbgs() << "\n\n"; 6262} 6263 6264void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6265 print_types(OS, G); 6266 print_details(OS, G); 6267} 6268 6269typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6270static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6271 const SelectionDAG *G, VisitedSDNodeSet &once) { 6272 if (!once.insert(N)) // If we've been here before, return now. 6273 return; 6274 6275 // Dump the current SDNode, but don't end the line yet. 6276 OS << std::string(indent, ' '); 6277 N->printr(OS, G); 6278 6279 // Having printed this SDNode, walk the children: 6280 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6281 const SDNode *child = N->getOperand(i).getNode(); 6282 6283 if (i) OS << ","; 6284 OS << " "; 6285 6286 if (child->getNumOperands() == 0) { 6287 // This child has no grandchildren; print it inline right here. 6288 child->printr(OS, G); 6289 once.insert(child); 6290 } else { // Just the address. FIXME: also print the child's opcode. 6291 OS << (void*)child; 6292 if (unsigned RN = N->getOperand(i).getResNo()) 6293 OS << ":" << RN; 6294 } 6295 } 6296 6297 OS << "\n"; 6298 6299 // Dump children that have grandchildren on their own line(s). 6300 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6301 const SDNode *child = N->getOperand(i).getNode(); 6302 DumpNodesr(OS, child, indent+2, G, once); 6303 } 6304} 6305 6306void SDNode::dumpr() const { 6307 VisitedSDNodeSet once; 6308 DumpNodesr(dbgs(), this, 0, 0, once); 6309} 6310 6311void SDNode::dumpr(const SelectionDAG *G) const { 6312 VisitedSDNodeSet once; 6313 DumpNodesr(dbgs(), this, 0, G, once); 6314} 6315 6316 6317// getAddressSpace - Return the address space this GlobalAddress belongs to. 6318unsigned GlobalAddressSDNode::getAddressSpace() const { 6319 return getGlobal()->getType()->getAddressSpace(); 6320} 6321 6322 6323const Type *ConstantPoolSDNode::getType() const { 6324 if (isMachineConstantPoolEntry()) 6325 return Val.MachineCPVal->getType(); 6326 return Val.ConstVal->getType(); 6327} 6328 6329bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6330 APInt &SplatUndef, 6331 unsigned &SplatBitSize, 6332 bool &HasAnyUndefs, 6333 unsigned MinSplatBits, 6334 bool isBigEndian) { 6335 EVT VT = getValueType(0); 6336 assert(VT.isVector() && "Expected a vector type"); 6337 unsigned sz = VT.getSizeInBits(); 6338 if (MinSplatBits > sz) 6339 return false; 6340 6341 SplatValue = APInt(sz, 0); 6342 SplatUndef = APInt(sz, 0); 6343 6344 // Get the bits. Bits with undefined values (when the corresponding element 6345 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6346 // in SplatValue. If any of the values are not constant, give up and return 6347 // false. 6348 unsigned int nOps = getNumOperands(); 6349 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6350 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6351 6352 for (unsigned j = 0; j < nOps; ++j) { 6353 unsigned i = isBigEndian ? nOps-1-j : j; 6354 SDValue OpVal = getOperand(i); 6355 unsigned BitPos = j * EltBitSize; 6356 6357 if (OpVal.getOpcode() == ISD::UNDEF) 6358 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6359 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6360 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 6361 zextOrTrunc(sz) << BitPos; 6362 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6363 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6364 else 6365 return false; 6366 } 6367 6368 // The build_vector is all constants or undefs. Find the smallest element 6369 // size that splats the vector. 6370 6371 HasAnyUndefs = (SplatUndef != 0); 6372 while (sz > 8) { 6373 6374 unsigned HalfSize = sz / 2; 6375 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 6376 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 6377 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 6378 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 6379 6380 // If the two halves do not match (ignoring undef bits), stop here. 6381 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6382 MinSplatBits > HalfSize) 6383 break; 6384 6385 SplatValue = HighValue | LowValue; 6386 SplatUndef = HighUndef & LowUndef; 6387 6388 sz = HalfSize; 6389 } 6390 6391 SplatBitSize = sz; 6392 return true; 6393} 6394 6395bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6396 // Find the first non-undef value in the shuffle mask. 6397 unsigned i, e; 6398 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6399 /* search */; 6400 6401 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6402 6403 // Make sure all remaining elements are either undef or the same as the first 6404 // non-undef value. 6405 for (int Idx = Mask[i]; i != e; ++i) 6406 if (Mask[i] >= 0 && Mask[i] != Idx) 6407 return false; 6408 return true; 6409} 6410 6411#ifdef XDEBUG 6412static void checkForCyclesHelper(const SDNode *N, 6413 SmallPtrSet<const SDNode*, 32> &Visited, 6414 SmallPtrSet<const SDNode*, 32> &Checked) { 6415 // If this node has already been checked, don't check it again. 6416 if (Checked.count(N)) 6417 return; 6418 6419 // If a node has already been visited on this depth-first walk, reject it as 6420 // a cycle. 6421 if (!Visited.insert(N)) { 6422 dbgs() << "Offending node:\n"; 6423 N->dumprFull(); 6424 errs() << "Detected cycle in SelectionDAG\n"; 6425 abort(); 6426 } 6427 6428 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6429 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6430 6431 Checked.insert(N); 6432 Visited.erase(N); 6433} 6434#endif 6435 6436void llvm::checkForCycles(const llvm::SDNode *N) { 6437#ifdef XDEBUG 6438 assert(N && "Checking nonexistant SDNode"); 6439 SmallPtrSet<const SDNode*, 32> visited; 6440 SmallPtrSet<const SDNode*, 32> checked; 6441 checkForCyclesHelper(N, visited, checked); 6442#endif 6443} 6444 6445void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6446 checkForCycles(DAG->getRoot().getNode()); 6447} 6448