SelectionDAG.cpp revision d7484e5d9b25fe907cdad283659fcdeb5c73060f
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/DebugInfo.h" 19#include "llvm/Analysis/ValueTracking.h" 20#include "llvm/Function.h" 21#include "llvm/GlobalAlias.h" 22#include "llvm/GlobalVariable.h" 23#include "llvm/Intrinsics.h" 24#include "llvm/DerivedTypes.h" 25#include "llvm/Assembly/Writer.h" 26#include "llvm/CallingConv.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/Target/TargetRegisterInfo.h" 32#include "llvm/Target/TargetData.h" 33#include "llvm/Target/TargetLowering.h" 34#include "llvm/Target/TargetSelectionDAGInfo.h" 35#include "llvm/Target/TargetOptions.h" 36#include "llvm/Target/TargetInstrInfo.h" 37#include "llvm/Target/TargetIntrinsicInfo.h" 38#include "llvm/Target/TargetMachine.h" 39#include "llvm/Support/CommandLine.h" 40#include "llvm/Support/Debug.h" 41#include "llvm/Support/ErrorHandling.h" 42#include "llvm/Support/ManagedStatic.h" 43#include "llvm/Support/MathExtras.h" 44#include "llvm/Support/raw_ostream.h" 45#include "llvm/Support/Mutex.h" 46#include "llvm/ADT/SetVector.h" 47#include "llvm/ADT/SmallPtrSet.h" 48#include "llvm/ADT/SmallSet.h" 49#include "llvm/ADT/SmallVector.h" 50#include "llvm/ADT/StringExtras.h" 51#include <algorithm> 52#include <cmath> 53using namespace llvm; 54 55/// makeVTList - Return an instance of the SDVTList struct initialized with the 56/// specified members. 57static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 58 SDVTList Res = {VTs, NumVTs}; 59 return Res; 60} 61 62static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 63 switch (VT.getSimpleVT().SimpleTy) { 64 default: llvm_unreachable("Unknown FP format"); 65 case MVT::f16: return &APFloat::IEEEhalf; 66 case MVT::f32: return &APFloat::IEEEsingle; 67 case MVT::f64: return &APFloat::IEEEdouble; 68 case MVT::f80: return &APFloat::x87DoubleExtended; 69 case MVT::f128: return &APFloat::IEEEquad; 70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 71 } 72} 73 74SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 75 76//===----------------------------------------------------------------------===// 77// ConstantFPSDNode Class 78//===----------------------------------------------------------------------===// 79 80/// isExactlyValue - We don't rely on operator== working on double values, as 81/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 82/// As such, this method can be used to do an exact bit-for-bit comparison of 83/// two floating point values. 84bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 85 return getValueAPF().bitwiseIsEqual(V); 86} 87 88bool ConstantFPSDNode::isValueValidForType(EVT VT, 89 const APFloat& Val) { 90 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 91 92 // PPC long double cannot be converted to any other type. 93 if (VT == MVT::ppcf128 || 94 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 95 return false; 96 97 // convert modifies in place, so make a copy. 98 APFloat Val2 = APFloat(Val); 99 bool losesInfo; 100 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 101 &losesInfo); 102 return !losesInfo; 103} 104 105//===----------------------------------------------------------------------===// 106// ISD Namespace 107//===----------------------------------------------------------------------===// 108 109/// isBuildVectorAllOnes - Return true if the specified node is a 110/// BUILD_VECTOR where all of the elements are ~0 or undef. 111bool ISD::isBuildVectorAllOnes(const SDNode *N) { 112 // Look through a bit convert. 113 if (N->getOpcode() == ISD::BITCAST) 114 N = N->getOperand(0).getNode(); 115 116 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 117 118 unsigned i = 0, e = N->getNumOperands(); 119 120 // Skip over all of the undef values. 121 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 122 ++i; 123 124 // Do not accept an all-undef vector. 125 if (i == e) return false; 126 127 // Do not accept build_vectors that aren't all constants or which have non-~0 128 // elements. We have to be a bit careful here, as the type of the constant 129 // may not be the same as the type of the vector elements due to type 130 // legalization (the elements are promoted to a legal type for the target and 131 // a vector of a type may be legal when the base element type is not). 132 // We only want to check enough bits to cover the vector elements, because 133 // we care if the resultant vector is all ones, not whether the individual 134 // constants are. 135 SDValue NotZero = N->getOperand(i); 136 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); 137 if (isa<ConstantSDNode>(NotZero)) { 138 if (cast<ConstantSDNode>(NotZero)->getAPIntValue().countTrailingOnes() < 139 EltSize) 140 return false; 141 } else if (isa<ConstantFPSDNode>(NotZero)) { 142 if (cast<ConstantFPSDNode>(NotZero)->getValueAPF() 143 .bitcastToAPInt().countTrailingOnes() < EltSize) 144 return false; 145 } else 146 return false; 147 148 // Okay, we have at least one ~0 value, check to see if the rest match or are 149 // undefs. Even with the above element type twiddling, this should be OK, as 150 // the same type legalization should have applied to all the elements. 151 for (++i; i != e; ++i) 152 if (N->getOperand(i) != NotZero && 153 N->getOperand(i).getOpcode() != ISD::UNDEF) 154 return false; 155 return true; 156} 157 158 159/// isBuildVectorAllZeros - Return true if the specified node is a 160/// BUILD_VECTOR where all of the elements are 0 or undef. 161bool ISD::isBuildVectorAllZeros(const SDNode *N) { 162 // Look through a bit convert. 163 if (N->getOpcode() == ISD::BITCAST) 164 N = N->getOperand(0).getNode(); 165 166 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 167 168 unsigned i = 0, e = N->getNumOperands(); 169 170 // Skip over all of the undef values. 171 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 172 ++i; 173 174 // Do not accept an all-undef vector. 175 if (i == e) return false; 176 177 // Do not accept build_vectors that aren't all constants or which have non-0 178 // elements. 179 SDValue Zero = N->getOperand(i); 180 if (isa<ConstantSDNode>(Zero)) { 181 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 182 return false; 183 } else if (isa<ConstantFPSDNode>(Zero)) { 184 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 185 return false; 186 } else 187 return false; 188 189 // Okay, we have at least one 0 value, check to see if the rest match or are 190 // undefs. 191 for (++i; i != e; ++i) 192 if (N->getOperand(i) != Zero && 193 N->getOperand(i).getOpcode() != ISD::UNDEF) 194 return false; 195 return true; 196} 197 198/// isScalarToVector - Return true if the specified node is a 199/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 200/// element is not an undef. 201bool ISD::isScalarToVector(const SDNode *N) { 202 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 203 return true; 204 205 if (N->getOpcode() != ISD::BUILD_VECTOR) 206 return false; 207 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 208 return false; 209 unsigned NumElems = N->getNumOperands(); 210 if (NumElems == 1) 211 return false; 212 for (unsigned i = 1; i < NumElems; ++i) { 213 SDValue V = N->getOperand(i); 214 if (V.getOpcode() != ISD::UNDEF) 215 return false; 216 } 217 return true; 218} 219 220/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 221/// when given the operation for (X op Y). 222ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 223 // To perform this operation, we just need to swap the L and G bits of the 224 // operation. 225 unsigned OldL = (Operation >> 2) & 1; 226 unsigned OldG = (Operation >> 1) & 1; 227 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 228 (OldL << 1) | // New G bit 229 (OldG << 2)); // New L bit. 230} 231 232/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 233/// 'op' is a valid SetCC operation. 234ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 235 unsigned Operation = Op; 236 if (isInteger) 237 Operation ^= 7; // Flip L, G, E bits, but not U. 238 else 239 Operation ^= 15; // Flip all of the condition bits. 240 241 if (Operation > ISD::SETTRUE2) 242 Operation &= ~8; // Don't let N and U bits get set. 243 244 return ISD::CondCode(Operation); 245} 246 247 248/// isSignedOp - For an integer comparison, return 1 if the comparison is a 249/// signed operation and 2 if the result is an unsigned comparison. Return zero 250/// if the operation does not depend on the sign of the input (setne and seteq). 251static int isSignedOp(ISD::CondCode Opcode) { 252 switch (Opcode) { 253 default: llvm_unreachable("Illegal integer setcc operation!"); 254 case ISD::SETEQ: 255 case ISD::SETNE: return 0; 256 case ISD::SETLT: 257 case ISD::SETLE: 258 case ISD::SETGT: 259 case ISD::SETGE: return 1; 260 case ISD::SETULT: 261 case ISD::SETULE: 262 case ISD::SETUGT: 263 case ISD::SETUGE: return 2; 264 } 265} 266 267/// getSetCCOrOperation - Return the result of a logical OR between different 268/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 269/// returns SETCC_INVALID if it is not possible to represent the resultant 270/// comparison. 271ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 272 bool isInteger) { 273 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 274 // Cannot fold a signed integer setcc with an unsigned integer setcc. 275 return ISD::SETCC_INVALID; 276 277 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 278 279 // If the N and U bits get set then the resultant comparison DOES suddenly 280 // care about orderedness, and is true when ordered. 281 if (Op > ISD::SETTRUE2) 282 Op &= ~16; // Clear the U bit if the N bit is set. 283 284 // Canonicalize illegal integer setcc's. 285 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 286 Op = ISD::SETNE; 287 288 return ISD::CondCode(Op); 289} 290 291/// getSetCCAndOperation - Return the result of a logical AND between different 292/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 293/// function returns zero if it is not possible to represent the resultant 294/// comparison. 295ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 296 bool isInteger) { 297 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 298 // Cannot fold a signed setcc with an unsigned setcc. 299 return ISD::SETCC_INVALID; 300 301 // Combine all of the condition bits. 302 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 303 304 // Canonicalize illegal integer setcc's. 305 if (isInteger) { 306 switch (Result) { 307 default: break; 308 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 309 case ISD::SETOEQ: // SETEQ & SETU[LG]E 310 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 311 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 312 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 313 } 314 } 315 316 return Result; 317} 318 319//===----------------------------------------------------------------------===// 320// SDNode Profile Support 321//===----------------------------------------------------------------------===// 322 323/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 324/// 325static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 326 ID.AddInteger(OpC); 327} 328 329/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 330/// solely with their pointer. 331static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 332 ID.AddPointer(VTList.VTs); 333} 334 335/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 336/// 337static void AddNodeIDOperands(FoldingSetNodeID &ID, 338 const SDValue *Ops, unsigned NumOps) { 339 for (; NumOps; --NumOps, ++Ops) { 340 ID.AddPointer(Ops->getNode()); 341 ID.AddInteger(Ops->getResNo()); 342 } 343} 344 345/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 346/// 347static void AddNodeIDOperands(FoldingSetNodeID &ID, 348 const SDUse *Ops, unsigned NumOps) { 349 for (; NumOps; --NumOps, ++Ops) { 350 ID.AddPointer(Ops->getNode()); 351 ID.AddInteger(Ops->getResNo()); 352 } 353} 354 355static void AddNodeIDNode(FoldingSetNodeID &ID, 356 unsigned short OpC, SDVTList VTList, 357 const SDValue *OpList, unsigned N) { 358 AddNodeIDOpcode(ID, OpC); 359 AddNodeIDValueTypes(ID, VTList); 360 AddNodeIDOperands(ID, OpList, N); 361} 362 363/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 364/// the NodeID data. 365static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 366 switch (N->getOpcode()) { 367 case ISD::TargetExternalSymbol: 368 case ISD::ExternalSymbol: 369 llvm_unreachable("Should only be used on nodes with operands"); 370 default: break; // Normal nodes don't need extra info. 371 case ISD::TargetConstant: 372 case ISD::Constant: 373 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 374 break; 375 case ISD::TargetConstantFP: 376 case ISD::ConstantFP: { 377 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 378 break; 379 } 380 case ISD::TargetGlobalAddress: 381 case ISD::GlobalAddress: 382 case ISD::TargetGlobalTLSAddress: 383 case ISD::GlobalTLSAddress: { 384 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 385 ID.AddPointer(GA->getGlobal()); 386 ID.AddInteger(GA->getOffset()); 387 ID.AddInteger(GA->getTargetFlags()); 388 break; 389 } 390 case ISD::BasicBlock: 391 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 392 break; 393 case ISD::Register: 394 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 395 break; 396 case ISD::RegisterMask: 397 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask()); 398 break; 399 case ISD::SRCVALUE: 400 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 401 break; 402 case ISD::FrameIndex: 403 case ISD::TargetFrameIndex: 404 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 405 break; 406 case ISD::JumpTable: 407 case ISD::TargetJumpTable: 408 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 409 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 410 break; 411 case ISD::ConstantPool: 412 case ISD::TargetConstantPool: { 413 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 414 ID.AddInteger(CP->getAlignment()); 415 ID.AddInteger(CP->getOffset()); 416 if (CP->isMachineConstantPoolEntry()) 417 CP->getMachineCPVal()->addSelectionDAGCSEId(ID); 418 else 419 ID.AddPointer(CP->getConstVal()); 420 ID.AddInteger(CP->getTargetFlags()); 421 break; 422 } 423 case ISD::LOAD: { 424 const LoadSDNode *LD = cast<LoadSDNode>(N); 425 ID.AddInteger(LD->getMemoryVT().getRawBits()); 426 ID.AddInteger(LD->getRawSubclassData()); 427 break; 428 } 429 case ISD::STORE: { 430 const StoreSDNode *ST = cast<StoreSDNode>(N); 431 ID.AddInteger(ST->getMemoryVT().getRawBits()); 432 ID.AddInteger(ST->getRawSubclassData()); 433 break; 434 } 435 case ISD::ATOMIC_CMP_SWAP: 436 case ISD::ATOMIC_SWAP: 437 case ISD::ATOMIC_LOAD_ADD: 438 case ISD::ATOMIC_LOAD_SUB: 439 case ISD::ATOMIC_LOAD_AND: 440 case ISD::ATOMIC_LOAD_OR: 441 case ISD::ATOMIC_LOAD_XOR: 442 case ISD::ATOMIC_LOAD_NAND: 443 case ISD::ATOMIC_LOAD_MIN: 444 case ISD::ATOMIC_LOAD_MAX: 445 case ISD::ATOMIC_LOAD_UMIN: 446 case ISD::ATOMIC_LOAD_UMAX: 447 case ISD::ATOMIC_LOAD: 448 case ISD::ATOMIC_STORE: { 449 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 450 ID.AddInteger(AT->getMemoryVT().getRawBits()); 451 ID.AddInteger(AT->getRawSubclassData()); 452 break; 453 } 454 case ISD::VECTOR_SHUFFLE: { 455 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 456 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 457 i != e; ++i) 458 ID.AddInteger(SVN->getMaskElt(i)); 459 break; 460 } 461 case ISD::TargetBlockAddress: 462 case ISD::BlockAddress: { 463 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 464 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 465 break; 466 } 467 } // end switch (N->getOpcode()) 468} 469 470/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 471/// data. 472static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 473 AddNodeIDOpcode(ID, N->getOpcode()); 474 // Add the return value info. 475 AddNodeIDValueTypes(ID, N->getVTList()); 476 // Add the operand info. 477 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 478 479 // Handle SDNode leafs with special info. 480 AddNodeIDCustom(ID, N); 481} 482 483/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 484/// the CSE map that carries volatility, temporalness, indexing mode, and 485/// extension/truncation information. 486/// 487static inline unsigned 488encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 489 bool isNonTemporal, bool isInvariant) { 490 assert((ConvType & 3) == ConvType && 491 "ConvType may not require more than 2 bits!"); 492 assert((AM & 7) == AM && 493 "AM may not require more than 3 bits!"); 494 return ConvType | 495 (AM << 2) | 496 (isVolatile << 5) | 497 (isNonTemporal << 6) | 498 (isInvariant << 7); 499} 500 501//===----------------------------------------------------------------------===// 502// SelectionDAG Class 503//===----------------------------------------------------------------------===// 504 505/// doNotCSE - Return true if CSE should not be performed for this node. 506static bool doNotCSE(SDNode *N) { 507 if (N->getValueType(0) == MVT::Glue) 508 return true; // Never CSE anything that produces a flag. 509 510 switch (N->getOpcode()) { 511 default: break; 512 case ISD::HANDLENODE: 513 case ISD::EH_LABEL: 514 return true; // Never CSE these nodes. 515 } 516 517 // Check that remaining values produced are not flags. 518 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 519 if (N->getValueType(i) == MVT::Glue) 520 return true; // Never CSE anything that produces a flag. 521 522 return false; 523} 524 525/// RemoveDeadNodes - This method deletes all unreachable nodes in the 526/// SelectionDAG. 527void SelectionDAG::RemoveDeadNodes() { 528 // Create a dummy node (which is not added to allnodes), that adds a reference 529 // to the root node, preventing it from being deleted. 530 HandleSDNode Dummy(getRoot()); 531 532 SmallVector<SDNode*, 128> DeadNodes; 533 534 // Add all obviously-dead nodes to the DeadNodes worklist. 535 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 536 if (I->use_empty()) 537 DeadNodes.push_back(I); 538 539 RemoveDeadNodes(DeadNodes); 540 541 // If the root changed (e.g. it was a dead load, update the root). 542 setRoot(Dummy.getValue()); 543} 544 545/// RemoveDeadNodes - This method deletes the unreachable nodes in the 546/// given list, and any nodes that become unreachable as a result. 547void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 548 DAGUpdateListener *UpdateListener) { 549 550 // Process the worklist, deleting the nodes and adding their uses to the 551 // worklist. 552 while (!DeadNodes.empty()) { 553 SDNode *N = DeadNodes.pop_back_val(); 554 555 if (UpdateListener) 556 UpdateListener->NodeDeleted(N, 0); 557 558 // Take the node out of the appropriate CSE map. 559 RemoveNodeFromCSEMaps(N); 560 561 // Next, brutally remove the operand list. This is safe to do, as there are 562 // no cycles in the graph. 563 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 564 SDUse &Use = *I++; 565 SDNode *Operand = Use.getNode(); 566 Use.set(SDValue()); 567 568 // Now that we removed this operand, see if there are no uses of it left. 569 if (Operand->use_empty()) 570 DeadNodes.push_back(Operand); 571 } 572 573 DeallocateNode(N); 574 } 575} 576 577void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 578 SmallVector<SDNode*, 16> DeadNodes(1, N); 579 580 // Create a dummy node that adds a reference to the root node, preventing 581 // it from being deleted. (This matters if the root is an operand of the 582 // dead node.) 583 HandleSDNode Dummy(getRoot()); 584 585 RemoveDeadNodes(DeadNodes, UpdateListener); 586} 587 588void SelectionDAG::DeleteNode(SDNode *N) { 589 // First take this out of the appropriate CSE map. 590 RemoveNodeFromCSEMaps(N); 591 592 // Finally, remove uses due to operands of this node, remove from the 593 // AllNodes list, and delete the node. 594 DeleteNodeNotInCSEMaps(N); 595} 596 597void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 598 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 599 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 600 601 // Drop all of the operands and decrement used node's use counts. 602 N->DropOperands(); 603 604 DeallocateNode(N); 605} 606 607void SelectionDAG::DeallocateNode(SDNode *N) { 608 if (N->OperandsNeedDelete) 609 delete[] N->OperandList; 610 611 // Set the opcode to DELETED_NODE to help catch bugs when node 612 // memory is reallocated. 613 N->NodeType = ISD::DELETED_NODE; 614 615 NodeAllocator.Deallocate(AllNodes.remove(N)); 616 617 // Remove the ordering of this node. 618 Ordering->remove(N); 619 620 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 621 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N); 622 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 623 DbgVals[i]->setIsInvalidated(); 624} 625 626/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 627/// correspond to it. This is useful when we're about to delete or repurpose 628/// the node. We don't want future request for structurally identical nodes 629/// to return N anymore. 630bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 631 bool Erased = false; 632 switch (N->getOpcode()) { 633 case ISD::HANDLENODE: return false; // noop. 634 case ISD::CONDCODE: 635 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 636 "Cond code doesn't exist!"); 637 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 638 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 639 break; 640 case ISD::ExternalSymbol: 641 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 642 break; 643 case ISD::TargetExternalSymbol: { 644 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 645 Erased = TargetExternalSymbols.erase( 646 std::pair<std::string,unsigned char>(ESN->getSymbol(), 647 ESN->getTargetFlags())); 648 break; 649 } 650 case ISD::VALUETYPE: { 651 EVT VT = cast<VTSDNode>(N)->getVT(); 652 if (VT.isExtended()) { 653 Erased = ExtendedValueTypeNodes.erase(VT); 654 } else { 655 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 656 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 657 } 658 break; 659 } 660 default: 661 // Remove it from the CSE Map. 662 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 663 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 664 Erased = CSEMap.RemoveNode(N); 665 break; 666 } 667#ifndef NDEBUG 668 // Verify that the node was actually in one of the CSE maps, unless it has a 669 // flag result (which cannot be CSE'd) or is one of the special cases that are 670 // not subject to CSE. 671 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 672 !N->isMachineOpcode() && !doNotCSE(N)) { 673 N->dump(this); 674 dbgs() << "\n"; 675 llvm_unreachable("Node is not in map!"); 676 } 677#endif 678 return Erased; 679} 680 681/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 682/// maps and modified in place. Add it back to the CSE maps, unless an identical 683/// node already exists, in which case transfer all its users to the existing 684/// node. This transfer can potentially trigger recursive merging. 685/// 686void 687SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 688 DAGUpdateListener *UpdateListener) { 689 // For node types that aren't CSE'd, just act as if no identical node 690 // already exists. 691 if (!doNotCSE(N)) { 692 SDNode *Existing = CSEMap.GetOrInsertNode(N); 693 if (Existing != N) { 694 // If there was already an existing matching node, use ReplaceAllUsesWith 695 // to replace the dead one with the existing one. This can cause 696 // recursive merging of other unrelated nodes down the line. 697 ReplaceAllUsesWith(N, Existing, UpdateListener); 698 699 // N is now dead. Inform the listener if it exists and delete it. 700 if (UpdateListener) 701 UpdateListener->NodeDeleted(N, Existing); 702 DeleteNodeNotInCSEMaps(N); 703 return; 704 } 705 } 706 707 // If the node doesn't already exist, we updated it. Inform a listener if 708 // it exists. 709 if (UpdateListener) 710 UpdateListener->NodeUpdated(N); 711} 712 713/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 714/// were replaced with those specified. If this node is never memoized, 715/// return null, otherwise return a pointer to the slot it would take. If a 716/// node already exists with these operands, the slot will be non-null. 717SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 718 void *&InsertPos) { 719 if (doNotCSE(N)) 720 return 0; 721 722 SDValue Ops[] = { Op }; 723 FoldingSetNodeID ID; 724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 725 AddNodeIDCustom(ID, N); 726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 727 return Node; 728} 729 730/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 731/// were replaced with those specified. If this node is never memoized, 732/// return null, otherwise return a pointer to the slot it would take. If a 733/// node already exists with these operands, the slot will be non-null. 734SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 735 SDValue Op1, SDValue Op2, 736 void *&InsertPos) { 737 if (doNotCSE(N)) 738 return 0; 739 740 SDValue Ops[] = { Op1, Op2 }; 741 FoldingSetNodeID ID; 742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 743 AddNodeIDCustom(ID, N); 744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 745 return Node; 746} 747 748 749/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 750/// were replaced with those specified. If this node is never memoized, 751/// return null, otherwise return a pointer to the slot it would take. If a 752/// node already exists with these operands, the slot will be non-null. 753SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 754 const SDValue *Ops,unsigned NumOps, 755 void *&InsertPos) { 756 if (doNotCSE(N)) 757 return 0; 758 759 FoldingSetNodeID ID; 760 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 761 AddNodeIDCustom(ID, N); 762 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 763 return Node; 764} 765 766#ifndef NDEBUG 767/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 768static void VerifyNodeCommon(SDNode *N) { 769 switch (N->getOpcode()) { 770 default: 771 break; 772 case ISD::BUILD_PAIR: { 773 EVT VT = N->getValueType(0); 774 assert(N->getNumValues() == 1 && "Too many results!"); 775 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 776 "Wrong return type!"); 777 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 778 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 779 "Mismatched operand types!"); 780 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 781 "Wrong operand type!"); 782 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 783 "Wrong return type size"); 784 break; 785 } 786 case ISD::BUILD_VECTOR: { 787 assert(N->getNumValues() == 1 && "Too many results!"); 788 assert(N->getValueType(0).isVector() && "Wrong return type!"); 789 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 790 "Wrong number of operands!"); 791 EVT EltVT = N->getValueType(0).getVectorElementType(); 792 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 793 assert((I->getValueType() == EltVT || 794 (EltVT.isInteger() && I->getValueType().isInteger() && 795 EltVT.bitsLE(I->getValueType()))) && 796 "Wrong operand type!"); 797 assert(I->getValueType() == N->getOperand(0).getValueType() && 798 "Operands must all have the same type"); 799 } 800 break; 801 } 802 } 803} 804 805/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 806static void VerifySDNode(SDNode *N) { 807 // The SDNode allocators cannot be used to allocate nodes with fields that are 808 // not present in an SDNode! 809 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 810 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 811 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 812 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 813 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 814 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 815 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 816 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 817 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 818 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 819 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 820 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 821 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 822 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 823 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 824 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 825 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 826 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 827 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 828 829 VerifyNodeCommon(N); 830} 831 832/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 833/// invalid. 834static void VerifyMachineNode(SDNode *N) { 835 // The MachineNode allocators cannot be used to allocate nodes with fields 836 // that are not present in a MachineNode! 837 // Currently there are no such nodes. 838 839 VerifyNodeCommon(N); 840} 841#endif // NDEBUG 842 843/// getEVTAlignment - Compute the default alignment value for the 844/// given type. 845/// 846unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 847 Type *Ty = VT == MVT::iPTR ? 848 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 849 VT.getTypeForEVT(*getContext()); 850 851 return TLI.getTargetData()->getABITypeAlignment(Ty); 852} 853 854// EntryNode could meaningfully have debug info if we can find it... 855SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL) 856 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 857 OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 858 Root(getEntryNode()), Ordering(0) { 859 AllNodes.push_back(&EntryNode); 860 Ordering = new SDNodeOrdering(); 861 DbgInfo = new SDDbgInfo(); 862} 863 864void SelectionDAG::init(MachineFunction &mf) { 865 MF = &mf; 866 Context = &mf.getFunction()->getContext(); 867} 868 869SelectionDAG::~SelectionDAG() { 870 allnodes_clear(); 871 delete Ordering; 872 delete DbgInfo; 873} 874 875void SelectionDAG::allnodes_clear() { 876 assert(&*AllNodes.begin() == &EntryNode); 877 AllNodes.remove(AllNodes.begin()); 878 while (!AllNodes.empty()) 879 DeallocateNode(AllNodes.begin()); 880} 881 882void SelectionDAG::clear() { 883 allnodes_clear(); 884 OperandAllocator.Reset(); 885 CSEMap.clear(); 886 887 ExtendedValueTypeNodes.clear(); 888 ExternalSymbols.clear(); 889 TargetExternalSymbols.clear(); 890 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 891 static_cast<CondCodeSDNode*>(0)); 892 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 893 static_cast<SDNode*>(0)); 894 895 EntryNode.UseList = 0; 896 AllNodes.push_back(&EntryNode); 897 Root = getEntryNode(); 898 Ordering->clear(); 899 DbgInfo->clear(); 900} 901 902SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 903 return VT.bitsGT(Op.getValueType()) ? 904 getNode(ISD::ANY_EXTEND, DL, VT, Op) : 905 getNode(ISD::TRUNCATE, DL, VT, Op); 906} 907 908SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 909 return VT.bitsGT(Op.getValueType()) ? 910 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 911 getNode(ISD::TRUNCATE, DL, VT, Op); 912} 913 914SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 915 return VT.bitsGT(Op.getValueType()) ? 916 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 917 getNode(ISD::TRUNCATE, DL, VT, Op); 918} 919 920SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 921 assert(!VT.isVector() && 922 "getZeroExtendInReg should use the vector element type instead of " 923 "the vector type!"); 924 if (Op.getValueType() == VT) return Op; 925 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 926 APInt Imm = APInt::getLowBitsSet(BitWidth, 927 VT.getSizeInBits()); 928 return getNode(ISD::AND, DL, Op.getValueType(), Op, 929 getConstant(Imm, Op.getValueType())); 930} 931 932/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 933/// 934SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 935 EVT EltVT = VT.getScalarType(); 936 SDValue NegOne = 937 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 938 return getNode(ISD::XOR, DL, VT, Val, NegOne); 939} 940 941SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 942 EVT EltVT = VT.getScalarType(); 943 assert((EltVT.getSizeInBits() >= 64 || 944 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 945 "getConstant with a uint64_t value that doesn't fit in the type!"); 946 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 947} 948 949SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 950 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 951} 952 953SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 954 assert(VT.isInteger() && "Cannot create FP integer constant!"); 955 956 EVT EltVT = VT.getScalarType(); 957 const ConstantInt *Elt = &Val; 958 959 // In some cases the vector type is legal but the element type is illegal and 960 // needs to be promoted, for example v8i8 on ARM. In this case, promote the 961 // inserted value (the type does not need to match the vector element type). 962 // Any extra bits introduced will be truncated away. 963 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) == 964 TargetLowering::TypePromoteInteger) { 965 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT); 966 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits()); 967 Elt = ConstantInt::get(*getContext(), NewVal); 968 } 969 970 assert(Elt->getBitWidth() == EltVT.getSizeInBits() && 971 "APInt size does not match type size!"); 972 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 973 FoldingSetNodeID ID; 974 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 975 ID.AddPointer(Elt); 976 void *IP = 0; 977 SDNode *N = NULL; 978 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 979 if (!VT.isVector()) 980 return SDValue(N, 0); 981 982 if (!N) { 983 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT); 984 CSEMap.InsertNode(N, IP); 985 AllNodes.push_back(N); 986 } 987 988 SDValue Result(N, 0); 989 if (VT.isVector()) { 990 SmallVector<SDValue, 8> Ops; 991 Ops.assign(VT.getVectorNumElements(), Result); 992 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 993 } 994 return Result; 995} 996 997SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 998 return getConstant(Val, TLI.getPointerTy(), isTarget); 999} 1000 1001 1002SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 1003 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 1004} 1005 1006SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 1007 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 1008 1009 EVT EltVT = VT.getScalarType(); 1010 1011 // Do the map lookup using the actual bit pattern for the floating point 1012 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 1013 // we don't have issues with SNANs. 1014 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 1015 FoldingSetNodeID ID; 1016 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1017 ID.AddPointer(&V); 1018 void *IP = 0; 1019 SDNode *N = NULL; 1020 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1021 if (!VT.isVector()) 1022 return SDValue(N, 0); 1023 1024 if (!N) { 1025 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 1026 CSEMap.InsertNode(N, IP); 1027 AllNodes.push_back(N); 1028 } 1029 1030 SDValue Result(N, 0); 1031 if (VT.isVector()) { 1032 SmallVector<SDValue, 8> Ops; 1033 Ops.assign(VT.getVectorNumElements(), Result); 1034 // FIXME DebugLoc info might be appropriate here 1035 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 1036 } 1037 return Result; 1038} 1039 1040SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1041 EVT EltVT = VT.getScalarType(); 1042 if (EltVT==MVT::f32) 1043 return getConstantFP(APFloat((float)Val), VT, isTarget); 1044 else if (EltVT==MVT::f64) 1045 return getConstantFP(APFloat(Val), VT, isTarget); 1046 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::f16) { 1047 bool ignored; 1048 APFloat apf = APFloat(Val); 1049 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1050 &ignored); 1051 return getConstantFP(apf, VT, isTarget); 1052 } else 1053 llvm_unreachable("Unsupported type in getConstantFP"); 1054} 1055 1056SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, 1057 EVT VT, int64_t Offset, 1058 bool isTargetGA, 1059 unsigned char TargetFlags) { 1060 assert((TargetFlags == 0 || isTargetGA) && 1061 "Cannot set target flags on target-independent globals"); 1062 1063 // Truncate (with sign-extension) the offset value to the pointer size. 1064 EVT PTy = TLI.getPointerTy(); 1065 unsigned BitWidth = PTy.getSizeInBits(); 1066 if (BitWidth < 64) 1067 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 1068 1069 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1070 if (!GVar) { 1071 // If GV is an alias then use the aliasee for determining thread-localness. 1072 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1073 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1074 } 1075 1076 unsigned Opc; 1077 if (GVar && GVar->isThreadLocal()) 1078 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1079 else 1080 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1081 1082 FoldingSetNodeID ID; 1083 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1084 ID.AddPointer(GV); 1085 ID.AddInteger(Offset); 1086 ID.AddInteger(TargetFlags); 1087 void *IP = 0; 1088 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1089 return SDValue(E, 0); 1090 1091 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, 1092 Offset, TargetFlags); 1093 CSEMap.InsertNode(N, IP); 1094 AllNodes.push_back(N); 1095 return SDValue(N, 0); 1096} 1097 1098SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1099 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1100 FoldingSetNodeID ID; 1101 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1102 ID.AddInteger(FI); 1103 void *IP = 0; 1104 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1105 return SDValue(E, 0); 1106 1107 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1108 CSEMap.InsertNode(N, IP); 1109 AllNodes.push_back(N); 1110 return SDValue(N, 0); 1111} 1112 1113SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1114 unsigned char TargetFlags) { 1115 assert((TargetFlags == 0 || isTarget) && 1116 "Cannot set target flags on target-independent jump tables"); 1117 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1118 FoldingSetNodeID ID; 1119 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1120 ID.AddInteger(JTI); 1121 ID.AddInteger(TargetFlags); 1122 void *IP = 0; 1123 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1124 return SDValue(E, 0); 1125 1126 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1127 TargetFlags); 1128 CSEMap.InsertNode(N, IP); 1129 AllNodes.push_back(N); 1130 return SDValue(N, 0); 1131} 1132 1133SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1134 unsigned Alignment, int Offset, 1135 bool isTarget, 1136 unsigned char TargetFlags) { 1137 assert((TargetFlags == 0 || isTarget) && 1138 "Cannot set target flags on target-independent globals"); 1139 if (Alignment == 0) 1140 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1141 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1142 FoldingSetNodeID ID; 1143 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1144 ID.AddInteger(Alignment); 1145 ID.AddInteger(Offset); 1146 ID.AddPointer(C); 1147 ID.AddInteger(TargetFlags); 1148 void *IP = 0; 1149 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1150 return SDValue(E, 0); 1151 1152 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1153 Alignment, TargetFlags); 1154 CSEMap.InsertNode(N, IP); 1155 AllNodes.push_back(N); 1156 return SDValue(N, 0); 1157} 1158 1159 1160SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1161 unsigned Alignment, int Offset, 1162 bool isTarget, 1163 unsigned char TargetFlags) { 1164 assert((TargetFlags == 0 || isTarget) && 1165 "Cannot set target flags on target-independent globals"); 1166 if (Alignment == 0) 1167 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1168 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1169 FoldingSetNodeID ID; 1170 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1171 ID.AddInteger(Alignment); 1172 ID.AddInteger(Offset); 1173 C->addSelectionDAGCSEId(ID); 1174 ID.AddInteger(TargetFlags); 1175 void *IP = 0; 1176 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1177 return SDValue(E, 0); 1178 1179 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1180 Alignment, TargetFlags); 1181 CSEMap.InsertNode(N, IP); 1182 AllNodes.push_back(N); 1183 return SDValue(N, 0); 1184} 1185 1186SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1187 FoldingSetNodeID ID; 1188 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1189 ID.AddPointer(MBB); 1190 void *IP = 0; 1191 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1192 return SDValue(E, 0); 1193 1194 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1195 CSEMap.InsertNode(N, IP); 1196 AllNodes.push_back(N); 1197 return SDValue(N, 0); 1198} 1199 1200SDValue SelectionDAG::getValueType(EVT VT) { 1201 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1202 ValueTypeNodes.size()) 1203 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1204 1205 SDNode *&N = VT.isExtended() ? 1206 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1207 1208 if (N) return SDValue(N, 0); 1209 N = new (NodeAllocator) VTSDNode(VT); 1210 AllNodes.push_back(N); 1211 return SDValue(N, 0); 1212} 1213 1214SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1215 SDNode *&N = ExternalSymbols[Sym]; 1216 if (N) return SDValue(N, 0); 1217 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1218 AllNodes.push_back(N); 1219 return SDValue(N, 0); 1220} 1221 1222SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1223 unsigned char TargetFlags) { 1224 SDNode *&N = 1225 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1226 TargetFlags)]; 1227 if (N) return SDValue(N, 0); 1228 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1229 AllNodes.push_back(N); 1230 return SDValue(N, 0); 1231} 1232 1233SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1234 if ((unsigned)Cond >= CondCodeNodes.size()) 1235 CondCodeNodes.resize(Cond+1); 1236 1237 if (CondCodeNodes[Cond] == 0) { 1238 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1239 CondCodeNodes[Cond] = N; 1240 AllNodes.push_back(N); 1241 } 1242 1243 return SDValue(CondCodeNodes[Cond], 0); 1244} 1245 1246// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1247// the shuffle mask M that point at N1 to point at N2, and indices that point 1248// N2 to point at N1. 1249static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1250 std::swap(N1, N2); 1251 int NElts = M.size(); 1252 for (int i = 0; i != NElts; ++i) { 1253 if (M[i] >= NElts) 1254 M[i] -= NElts; 1255 else if (M[i] >= 0) 1256 M[i] += NElts; 1257 } 1258} 1259 1260SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1261 SDValue N2, const int *Mask) { 1262 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1263 assert(VT.isVector() && N1.getValueType().isVector() && 1264 "Vector Shuffle VTs must be a vectors"); 1265 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1266 && "Vector Shuffle VTs must have same element type"); 1267 1268 // Canonicalize shuffle undef, undef -> undef 1269 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1270 return getUNDEF(VT); 1271 1272 // Validate that all indices in Mask are within the range of the elements 1273 // input to the shuffle. 1274 unsigned NElts = VT.getVectorNumElements(); 1275 SmallVector<int, 8> MaskVec; 1276 for (unsigned i = 0; i != NElts; ++i) { 1277 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1278 MaskVec.push_back(Mask[i]); 1279 } 1280 1281 // Canonicalize shuffle v, v -> v, undef 1282 if (N1 == N2) { 1283 N2 = getUNDEF(VT); 1284 for (unsigned i = 0; i != NElts; ++i) 1285 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1286 } 1287 1288 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1289 if (N1.getOpcode() == ISD::UNDEF) 1290 commuteShuffle(N1, N2, MaskVec); 1291 1292 // Canonicalize all index into lhs, -> shuffle lhs, undef 1293 // Canonicalize all index into rhs, -> shuffle rhs, undef 1294 bool AllLHS = true, AllRHS = true; 1295 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1296 for (unsigned i = 0; i != NElts; ++i) { 1297 if (MaskVec[i] >= (int)NElts) { 1298 if (N2Undef) 1299 MaskVec[i] = -1; 1300 else 1301 AllLHS = false; 1302 } else if (MaskVec[i] >= 0) { 1303 AllRHS = false; 1304 } 1305 } 1306 if (AllLHS && AllRHS) 1307 return getUNDEF(VT); 1308 if (AllLHS && !N2Undef) 1309 N2 = getUNDEF(VT); 1310 if (AllRHS) { 1311 N1 = getUNDEF(VT); 1312 commuteShuffle(N1, N2, MaskVec); 1313 } 1314 1315 // If Identity shuffle, or all shuffle in to undef, return that node. 1316 bool AllUndef = true; 1317 bool Identity = true; 1318 for (unsigned i = 0; i != NElts; ++i) { 1319 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1320 if (MaskVec[i] >= 0) AllUndef = false; 1321 } 1322 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1323 return N1; 1324 if (AllUndef) 1325 return getUNDEF(VT); 1326 1327 FoldingSetNodeID ID; 1328 SDValue Ops[2] = { N1, N2 }; 1329 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1330 for (unsigned i = 0; i != NElts; ++i) 1331 ID.AddInteger(MaskVec[i]); 1332 1333 void* IP = 0; 1334 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1335 return SDValue(E, 0); 1336 1337 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1338 // SDNode doesn't have access to it. This memory will be "leaked" when 1339 // the node is deallocated, but recovered when the NodeAllocator is released. 1340 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1341 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1342 1343 ShuffleVectorSDNode *N = 1344 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1345 CSEMap.InsertNode(N, IP); 1346 AllNodes.push_back(N); 1347 return SDValue(N, 0); 1348} 1349 1350SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1351 SDValue Val, SDValue DTy, 1352 SDValue STy, SDValue Rnd, SDValue Sat, 1353 ISD::CvtCode Code) { 1354 // If the src and dest types are the same and the conversion is between 1355 // integer types of the same sign or two floats, no conversion is necessary. 1356 if (DTy == STy && 1357 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1358 return Val; 1359 1360 FoldingSetNodeID ID; 1361 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1362 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1363 void* IP = 0; 1364 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1365 return SDValue(E, 0); 1366 1367 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1368 Code); 1369 CSEMap.InsertNode(N, IP); 1370 AllNodes.push_back(N); 1371 return SDValue(N, 0); 1372} 1373 1374SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1375 FoldingSetNodeID ID; 1376 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1377 ID.AddInteger(RegNo); 1378 void *IP = 0; 1379 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1380 return SDValue(E, 0); 1381 1382 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1383 CSEMap.InsertNode(N, IP); 1384 AllNodes.push_back(N); 1385 return SDValue(N, 0); 1386} 1387 1388SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) { 1389 FoldingSetNodeID ID; 1390 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0); 1391 ID.AddPointer(RegMask); 1392 void *IP = 0; 1393 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1394 return SDValue(E, 0); 1395 1396 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask); 1397 CSEMap.InsertNode(N, IP); 1398 AllNodes.push_back(N); 1399 return SDValue(N, 0); 1400} 1401 1402SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1403 FoldingSetNodeID ID; 1404 SDValue Ops[] = { Root }; 1405 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1406 ID.AddPointer(Label); 1407 void *IP = 0; 1408 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1409 return SDValue(E, 0); 1410 1411 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1412 CSEMap.InsertNode(N, IP); 1413 AllNodes.push_back(N); 1414 return SDValue(N, 0); 1415} 1416 1417 1418SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1419 bool isTarget, 1420 unsigned char TargetFlags) { 1421 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1422 1423 FoldingSetNodeID ID; 1424 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1425 ID.AddPointer(BA); 1426 ID.AddInteger(TargetFlags); 1427 void *IP = 0; 1428 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1429 return SDValue(E, 0); 1430 1431 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1432 CSEMap.InsertNode(N, IP); 1433 AllNodes.push_back(N); 1434 return SDValue(N, 0); 1435} 1436 1437SDValue SelectionDAG::getSrcValue(const Value *V) { 1438 assert((!V || V->getType()->isPointerTy()) && 1439 "SrcValue is not a pointer?"); 1440 1441 FoldingSetNodeID ID; 1442 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1443 ID.AddPointer(V); 1444 1445 void *IP = 0; 1446 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1447 return SDValue(E, 0); 1448 1449 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1450 CSEMap.InsertNode(N, IP); 1451 AllNodes.push_back(N); 1452 return SDValue(N, 0); 1453} 1454 1455/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1456SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1457 FoldingSetNodeID ID; 1458 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1459 ID.AddPointer(MD); 1460 1461 void *IP = 0; 1462 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1463 return SDValue(E, 0); 1464 1465 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1466 CSEMap.InsertNode(N, IP); 1467 AllNodes.push_back(N); 1468 return SDValue(N, 0); 1469} 1470 1471 1472/// getShiftAmountOperand - Return the specified value casted to 1473/// the target's desired shift amount type. 1474SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) { 1475 EVT OpTy = Op.getValueType(); 1476 MVT ShTy = TLI.getShiftAmountTy(LHSTy); 1477 if (OpTy == ShTy || OpTy.isVector()) return Op; 1478 1479 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1480 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1481} 1482 1483/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1484/// specified value type. 1485SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1486 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1487 unsigned ByteSize = VT.getStoreSize(); 1488 Type *Ty = VT.getTypeForEVT(*getContext()); 1489 unsigned StackAlign = 1490 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1491 1492 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1493 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1494} 1495 1496/// CreateStackTemporary - Create a stack temporary suitable for holding 1497/// either of the specified value types. 1498SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1499 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1500 VT2.getStoreSizeInBits())/8; 1501 Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1502 Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1503 const TargetData *TD = TLI.getTargetData(); 1504 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1505 TD->getPrefTypeAlignment(Ty2)); 1506 1507 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1508 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1509 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1510} 1511 1512SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1513 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1514 // These setcc operations always fold. 1515 switch (Cond) { 1516 default: break; 1517 case ISD::SETFALSE: 1518 case ISD::SETFALSE2: return getConstant(0, VT); 1519 case ISD::SETTRUE: 1520 case ISD::SETTRUE2: return getConstant(1, VT); 1521 1522 case ISD::SETOEQ: 1523 case ISD::SETOGT: 1524 case ISD::SETOGE: 1525 case ISD::SETOLT: 1526 case ISD::SETOLE: 1527 case ISD::SETONE: 1528 case ISD::SETO: 1529 case ISD::SETUO: 1530 case ISD::SETUEQ: 1531 case ISD::SETUNE: 1532 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1533 break; 1534 } 1535 1536 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1537 const APInt &C2 = N2C->getAPIntValue(); 1538 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1539 const APInt &C1 = N1C->getAPIntValue(); 1540 1541 switch (Cond) { 1542 default: llvm_unreachable("Unknown integer setcc!"); 1543 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1544 case ISD::SETNE: return getConstant(C1 != C2, VT); 1545 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1546 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1547 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1548 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1549 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1550 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1551 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1552 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1553 } 1554 } 1555 } 1556 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1557 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1558 // No compile time operations on this type yet. 1559 if (N1C->getValueType(0) == MVT::ppcf128) 1560 return SDValue(); 1561 1562 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1563 switch (Cond) { 1564 default: break; 1565 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1566 return getUNDEF(VT); 1567 // fall through 1568 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1569 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1570 return getUNDEF(VT); 1571 // fall through 1572 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1573 R==APFloat::cmpLessThan, VT); 1574 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1575 return getUNDEF(VT); 1576 // fall through 1577 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1578 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1579 return getUNDEF(VT); 1580 // fall through 1581 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1582 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1583 return getUNDEF(VT); 1584 // fall through 1585 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1586 R==APFloat::cmpEqual, VT); 1587 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1588 return getUNDEF(VT); 1589 // fall through 1590 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1591 R==APFloat::cmpEqual, VT); 1592 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1593 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1594 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1595 R==APFloat::cmpEqual, VT); 1596 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1597 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1598 R==APFloat::cmpLessThan, VT); 1599 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1600 R==APFloat::cmpUnordered, VT); 1601 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1602 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1603 } 1604 } else { 1605 // Ensure that the constant occurs on the RHS. 1606 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1607 } 1608 } 1609 1610 // Could not fold it. 1611 return SDValue(); 1612} 1613 1614/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1615/// use this predicate to simplify operations downstream. 1616bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1617 // This predicate is not safe for vector operations. 1618 if (Op.getValueType().isVector()) 1619 return false; 1620 1621 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1622 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1623} 1624 1625/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1626/// this predicate to simplify operations downstream. Mask is known to be zero 1627/// for bits that V cannot have. 1628bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1629 unsigned Depth) const { 1630 APInt KnownZero, KnownOne; 1631 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 1632 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1633 return (KnownZero & Mask) == Mask; 1634} 1635 1636/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1637/// known to be either zero or one and return them in the KnownZero/KnownOne 1638/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1639/// processing. 1640void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero, 1641 APInt &KnownOne, unsigned Depth) const { 1642 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1643 1644 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1645 if (Depth == 6) 1646 return; // Limit search depth. 1647 1648 APInt KnownZero2, KnownOne2; 1649 1650 switch (Op.getOpcode()) { 1651 case ISD::Constant: 1652 // We know all of the bits for a constant! 1653 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue(); 1654 KnownZero = ~KnownOne; 1655 return; 1656 case ISD::AND: 1657 // If either the LHS or the RHS are Zero, the result is zero. 1658 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1659 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1660 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1661 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1662 1663 // Output known-1 bits are only known if set in both the LHS & RHS. 1664 KnownOne &= KnownOne2; 1665 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1666 KnownZero |= KnownZero2; 1667 return; 1668 case ISD::OR: 1669 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1670 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1671 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1672 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1673 1674 // Output known-0 bits are only known if clear in both the LHS & RHS. 1675 KnownZero &= KnownZero2; 1676 // Output known-1 are known to be set if set in either the LHS | RHS. 1677 KnownOne |= KnownOne2; 1678 return; 1679 case ISD::XOR: { 1680 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1681 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1682 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1683 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1684 1685 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1686 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1687 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1688 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1689 KnownZero = KnownZeroOut; 1690 return; 1691 } 1692 case ISD::MUL: { 1693 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1694 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1695 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1696 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1697 1698 // If low bits are zero in either operand, output low known-0 bits. 1699 // Also compute a conserative estimate for high known-0 bits. 1700 // More trickiness is possible, but this is sufficient for the 1701 // interesting case of alignment computation. 1702 KnownOne.clearAllBits(); 1703 unsigned TrailZ = KnownZero.countTrailingOnes() + 1704 KnownZero2.countTrailingOnes(); 1705 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1706 KnownZero2.countLeadingOnes(), 1707 BitWidth) - BitWidth; 1708 1709 TrailZ = std::min(TrailZ, BitWidth); 1710 LeadZ = std::min(LeadZ, BitWidth); 1711 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1712 APInt::getHighBitsSet(BitWidth, LeadZ); 1713 return; 1714 } 1715 case ISD::UDIV: { 1716 // For the purposes of computing leading zeros we can conservatively 1717 // treat a udiv as a logical right shift by the power of 2 known to 1718 // be less than the denominator. 1719 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1720 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1721 1722 KnownOne2.clearAllBits(); 1723 KnownZero2.clearAllBits(); 1724 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1725 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1726 if (RHSUnknownLeadingOnes != BitWidth) 1727 LeadZ = std::min(BitWidth, 1728 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1729 1730 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ); 1731 return; 1732 } 1733 case ISD::SELECT: 1734 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1); 1735 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1736 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1737 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1738 1739 // Only known if known in both the LHS and RHS. 1740 KnownOne &= KnownOne2; 1741 KnownZero &= KnownZero2; 1742 return; 1743 case ISD::SELECT_CC: 1744 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1); 1745 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1); 1746 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1747 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1748 1749 // Only known if known in both the LHS and RHS. 1750 KnownOne &= KnownOne2; 1751 KnownZero &= KnownZero2; 1752 return; 1753 case ISD::SADDO: 1754 case ISD::UADDO: 1755 case ISD::SSUBO: 1756 case ISD::USUBO: 1757 case ISD::SMULO: 1758 case ISD::UMULO: 1759 if (Op.getResNo() != 1) 1760 return; 1761 // The boolean result conforms to getBooleanContents. Fall through. 1762 case ISD::SETCC: 1763 // If we know the result of a setcc has the top bits zero, use this info. 1764 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 1765 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1) 1766 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1767 return; 1768 case ISD::SHL: 1769 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1770 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1771 unsigned ShAmt = SA->getZExtValue(); 1772 1773 // If the shift count is an invalid immediate, don't do anything. 1774 if (ShAmt >= BitWidth) 1775 return; 1776 1777 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1778 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1779 KnownZero <<= ShAmt; 1780 KnownOne <<= ShAmt; 1781 // low bits known zero. 1782 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1783 } 1784 return; 1785 case ISD::SRL: 1786 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1787 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1788 unsigned ShAmt = SA->getZExtValue(); 1789 1790 // If the shift count is an invalid immediate, don't do anything. 1791 if (ShAmt >= BitWidth) 1792 return; 1793 1794 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1795 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1796 KnownZero = KnownZero.lshr(ShAmt); 1797 KnownOne = KnownOne.lshr(ShAmt); 1798 1799 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1800 KnownZero |= HighBits; // High bits known zero. 1801 } 1802 return; 1803 case ISD::SRA: 1804 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1805 unsigned ShAmt = SA->getZExtValue(); 1806 1807 // If the shift count is an invalid immediate, don't do anything. 1808 if (ShAmt >= BitWidth) 1809 return; 1810 1811 // If any of the demanded bits are produced by the sign extension, we also 1812 // demand the input sign bit. 1813 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1814 1815 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1816 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1817 KnownZero = KnownZero.lshr(ShAmt); 1818 KnownOne = KnownOne.lshr(ShAmt); 1819 1820 // Handle the sign bits. 1821 APInt SignBit = APInt::getSignBit(BitWidth); 1822 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1823 1824 if (KnownZero.intersects(SignBit)) { 1825 KnownZero |= HighBits; // New bits are known zero. 1826 } else if (KnownOne.intersects(SignBit)) { 1827 KnownOne |= HighBits; // New bits are known one. 1828 } 1829 } 1830 return; 1831 case ISD::SIGN_EXTEND_INREG: { 1832 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1833 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1834 1835 // Sign extension. Compute the demanded bits in the result that are not 1836 // present in the input. 1837 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits); 1838 1839 APInt InSignBit = APInt::getSignBit(EBits); 1840 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits); 1841 1842 // If the sign extended bits are demanded, we know that the sign 1843 // bit is demanded. 1844 InSignBit = InSignBit.zext(BitWidth); 1845 if (NewBits.getBoolValue()) 1846 InputDemandedBits |= InSignBit; 1847 1848 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1849 KnownOne &= InputDemandedBits; 1850 KnownZero &= InputDemandedBits; 1851 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1852 1853 // If the sign bit of the input is known set or clear, then we know the 1854 // top bits of the result. 1855 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1856 KnownZero |= NewBits; 1857 KnownOne &= ~NewBits; 1858 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1859 KnownOne |= NewBits; 1860 KnownZero &= ~NewBits; 1861 } else { // Input sign bit unknown 1862 KnownZero &= ~NewBits; 1863 KnownOne &= ~NewBits; 1864 } 1865 return; 1866 } 1867 case ISD::CTTZ: 1868 case ISD::CTTZ_ZERO_UNDEF: 1869 case ISD::CTLZ: 1870 case ISD::CTLZ_ZERO_UNDEF: 1871 case ISD::CTPOP: { 1872 unsigned LowBits = Log2_32(BitWidth)+1; 1873 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1874 KnownOne.clearAllBits(); 1875 return; 1876 } 1877 case ISD::LOAD: { 1878 LoadSDNode *LD = cast<LoadSDNode>(Op); 1879 if (ISD::isZEXTLoad(Op.getNode())) { 1880 EVT VT = LD->getMemoryVT(); 1881 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1882 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits); 1883 } else if (const MDNode *Ranges = LD->getRanges()) { 1884 computeMaskedBitsLoad(*Ranges, KnownZero); 1885 } 1886 return; 1887 } 1888 case ISD::ZERO_EXTEND: { 1889 EVT InVT = Op.getOperand(0).getValueType(); 1890 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1891 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1892 KnownZero = KnownZero.trunc(InBits); 1893 KnownOne = KnownOne.trunc(InBits); 1894 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1895 KnownZero = KnownZero.zext(BitWidth); 1896 KnownOne = KnownOne.zext(BitWidth); 1897 KnownZero |= NewBits; 1898 return; 1899 } 1900 case ISD::SIGN_EXTEND: { 1901 EVT InVT = Op.getOperand(0).getValueType(); 1902 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1903 APInt InSignBit = APInt::getSignBit(InBits); 1904 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1905 1906 KnownZero = KnownZero.trunc(InBits); 1907 KnownOne = KnownOne.trunc(InBits); 1908 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1909 1910 // Note if the sign bit is known to be zero or one. 1911 bool SignBitKnownZero = KnownZero.isNegative(); 1912 bool SignBitKnownOne = KnownOne.isNegative(); 1913 assert(!(SignBitKnownZero && SignBitKnownOne) && 1914 "Sign bit can't be known to be both zero and one!"); 1915 1916 KnownZero = KnownZero.zext(BitWidth); 1917 KnownOne = KnownOne.zext(BitWidth); 1918 1919 // If the sign bit is known zero or one, the top bits match. 1920 if (SignBitKnownZero) 1921 KnownZero |= NewBits; 1922 else if (SignBitKnownOne) 1923 KnownOne |= NewBits; 1924 return; 1925 } 1926 case ISD::ANY_EXTEND: { 1927 EVT InVT = Op.getOperand(0).getValueType(); 1928 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1929 KnownZero = KnownZero.trunc(InBits); 1930 KnownOne = KnownOne.trunc(InBits); 1931 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1932 KnownZero = KnownZero.zext(BitWidth); 1933 KnownOne = KnownOne.zext(BitWidth); 1934 return; 1935 } 1936 case ISD::TRUNCATE: { 1937 EVT InVT = Op.getOperand(0).getValueType(); 1938 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1939 KnownZero = KnownZero.zext(InBits); 1940 KnownOne = KnownOne.zext(InBits); 1941 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1942 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1943 KnownZero = KnownZero.trunc(BitWidth); 1944 KnownOne = KnownOne.trunc(BitWidth); 1945 break; 1946 } 1947 case ISD::AssertZext: { 1948 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1949 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1950 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1951 KnownZero |= (~InMask); 1952 return; 1953 } 1954 case ISD::FGETSIGN: 1955 // All bits are zero except the low bit. 1956 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1957 return; 1958 1959 case ISD::SUB: { 1960 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1961 // We know that the top bits of C-X are clear if X contains less bits 1962 // than C (i.e. no wrap-around can happen). For example, 20-X is 1963 // positive if we can prove that X is >= 0 and < 16. 1964 if (CLHS->getAPIntValue().isNonNegative()) { 1965 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1966 // NLZ can't be BitWidth with no sign bit 1967 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1968 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1969 1970 // If all of the MaskV bits are known to be zero, then we know the 1971 // output top bits are zero, because we now know that the output is 1972 // from [0-C]. 1973 if ((KnownZero2 & MaskV) == MaskV) { 1974 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1975 // Top bits known zero. 1976 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2); 1977 } 1978 } 1979 } 1980 } 1981 // fall through 1982 case ISD::ADD: 1983 case ISD::ADDE: { 1984 // Output known-0 bits are known if clear or set in both the low clear bits 1985 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1986 // low 3 bits clear. 1987 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1988 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1989 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1990 1991 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1992 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1993 KnownZeroOut = std::min(KnownZeroOut, 1994 KnownZero2.countTrailingOnes()); 1995 1996 if (Op.getOpcode() == ISD::ADD) { 1997 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1998 return; 1999 } 2000 2001 // With ADDE, a carry bit may be added in, so we can only use this 2002 // information if we know (at least) that the low two bits are clear. We 2003 // then return to the caller that the low bit is unknown but that other bits 2004 // are known zero. 2005 if (KnownZeroOut >= 2) // ADDE 2006 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 2007 return; 2008 } 2009 case ISD::SREM: 2010 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2011 const APInt &RA = Rem->getAPIntValue().abs(); 2012 if (RA.isPowerOf2()) { 2013 APInt LowBits = RA - 1; 2014 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 2015 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1); 2016 2017 // The low bits of the first operand are unchanged by the srem. 2018 KnownZero = KnownZero2 & LowBits; 2019 KnownOne = KnownOne2 & LowBits; 2020 2021 // If the first operand is non-negative or has all low bits zero, then 2022 // the upper bits are all zero. 2023 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2024 KnownZero |= ~LowBits; 2025 2026 // If the first operand is negative and not all low bits are zero, then 2027 // the upper bits are all one. 2028 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2029 KnownOne |= ~LowBits; 2030 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2031 } 2032 } 2033 return; 2034 case ISD::UREM: { 2035 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2036 const APInt &RA = Rem->getAPIntValue(); 2037 if (RA.isPowerOf2()) { 2038 APInt LowBits = (RA - 1); 2039 KnownZero |= ~LowBits; 2040 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1); 2041 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2042 break; 2043 } 2044 } 2045 2046 // Since the result is less than or equal to either operand, any leading 2047 // zero bits in either operand must also exist in the result. 2048 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2049 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2050 2051 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2052 KnownZero2.countLeadingOnes()); 2053 KnownOne.clearAllBits(); 2054 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders); 2055 return; 2056 } 2057 case ISD::FrameIndex: 2058 case ISD::TargetFrameIndex: 2059 if (unsigned Align = InferPtrAlignment(Op)) { 2060 // The low bits are known zero if the pointer is aligned. 2061 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); 2062 return; 2063 } 2064 break; 2065 2066 default: 2067 if (Op.getOpcode() < ISD::BUILTIN_OP_END) 2068 break; 2069 // Fallthrough 2070 case ISD::INTRINSIC_WO_CHAIN: 2071 case ISD::INTRINSIC_W_CHAIN: 2072 case ISD::INTRINSIC_VOID: 2073 // Allow the target to implement this method for its nodes. 2074 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth); 2075 return; 2076 } 2077} 2078 2079/// ComputeNumSignBits - Return the number of times the sign bit of the 2080/// register is replicated into the other bits. We know that at least 1 bit 2081/// is always equal to the sign bit (itself), but other cases can give us 2082/// information. For example, immediately after an "SRA X, 2", we know that 2083/// the top 3 bits are all equal to each other, so we return 3. 2084unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2085 EVT VT = Op.getValueType(); 2086 assert(VT.isInteger() && "Invalid VT!"); 2087 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2088 unsigned Tmp, Tmp2; 2089 unsigned FirstAnswer = 1; 2090 2091 if (Depth == 6) 2092 return 1; // Limit search depth. 2093 2094 switch (Op.getOpcode()) { 2095 default: break; 2096 case ISD::AssertSext: 2097 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2098 return VTBits-Tmp+1; 2099 case ISD::AssertZext: 2100 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2101 return VTBits-Tmp; 2102 2103 case ISD::Constant: { 2104 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2105 return Val.getNumSignBits(); 2106 } 2107 2108 case ISD::SIGN_EXTEND: 2109 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2110 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2111 2112 case ISD::SIGN_EXTEND_INREG: 2113 // Max of the input and what this extends. 2114 Tmp = 2115 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2116 Tmp = VTBits-Tmp+1; 2117 2118 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2119 return std::max(Tmp, Tmp2); 2120 2121 case ISD::SRA: 2122 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2123 // SRA X, C -> adds C sign bits. 2124 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2125 Tmp += C->getZExtValue(); 2126 if (Tmp > VTBits) Tmp = VTBits; 2127 } 2128 return Tmp; 2129 case ISD::SHL: 2130 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2131 // shl destroys sign bits. 2132 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2133 if (C->getZExtValue() >= VTBits || // Bad shift. 2134 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2135 return Tmp - C->getZExtValue(); 2136 } 2137 break; 2138 case ISD::AND: 2139 case ISD::OR: 2140 case ISD::XOR: // NOT is handled here. 2141 // Logical binary ops preserve the number of sign bits at the worst. 2142 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2143 if (Tmp != 1) { 2144 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2145 FirstAnswer = std::min(Tmp, Tmp2); 2146 // We computed what we know about the sign bits as our first 2147 // answer. Now proceed to the generic code that uses 2148 // ComputeMaskedBits, and pick whichever answer is better. 2149 } 2150 break; 2151 2152 case ISD::SELECT: 2153 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2154 if (Tmp == 1) return 1; // Early out. 2155 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2156 return std::min(Tmp, Tmp2); 2157 2158 case ISD::SADDO: 2159 case ISD::UADDO: 2160 case ISD::SSUBO: 2161 case ISD::USUBO: 2162 case ISD::SMULO: 2163 case ISD::UMULO: 2164 if (Op.getResNo() != 1) 2165 break; 2166 // The boolean result conforms to getBooleanContents. Fall through. 2167 case ISD::SETCC: 2168 // If setcc returns 0/-1, all bits are sign bits. 2169 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 2170 TargetLowering::ZeroOrNegativeOneBooleanContent) 2171 return VTBits; 2172 break; 2173 case ISD::ROTL: 2174 case ISD::ROTR: 2175 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2176 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2177 2178 // Handle rotate right by N like a rotate left by 32-N. 2179 if (Op.getOpcode() == ISD::ROTR) 2180 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2181 2182 // If we aren't rotating out all of the known-in sign bits, return the 2183 // number that are left. This handles rotl(sext(x), 1) for example. 2184 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2185 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2186 } 2187 break; 2188 case ISD::ADD: 2189 // Add can have at most one carry bit. Thus we know that the output 2190 // is, at worst, one more bit than the inputs. 2191 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2192 if (Tmp == 1) return 1; // Early out. 2193 2194 // Special case decrementing a value (ADD X, -1): 2195 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2196 if (CRHS->isAllOnesValue()) { 2197 APInt KnownZero, KnownOne; 2198 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2199 2200 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2201 // sign bits set. 2202 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2203 return VTBits; 2204 2205 // If we are subtracting one from a positive number, there is no carry 2206 // out of the result. 2207 if (KnownZero.isNegative()) 2208 return Tmp; 2209 } 2210 2211 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2212 if (Tmp2 == 1) return 1; 2213 return std::min(Tmp, Tmp2)-1; 2214 2215 case ISD::SUB: 2216 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2217 if (Tmp2 == 1) return 1; 2218 2219 // Handle NEG. 2220 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2221 if (CLHS->isNullValue()) { 2222 APInt KnownZero, KnownOne; 2223 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 2224 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2225 // sign bits set. 2226 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2227 return VTBits; 2228 2229 // If the input is known to be positive (the sign bit is known clear), 2230 // the output of the NEG has the same number of sign bits as the input. 2231 if (KnownZero.isNegative()) 2232 return Tmp2; 2233 2234 // Otherwise, we treat this like a SUB. 2235 } 2236 2237 // Sub can have at most one carry bit. Thus we know that the output 2238 // is, at worst, one more bit than the inputs. 2239 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2240 if (Tmp == 1) return 1; // Early out. 2241 return std::min(Tmp, Tmp2)-1; 2242 case ISD::TRUNCATE: 2243 // FIXME: it's tricky to do anything useful for this, but it is an important 2244 // case for targets like X86. 2245 break; 2246 } 2247 2248 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2249 if (Op.getOpcode() == ISD::LOAD) { 2250 LoadSDNode *LD = cast<LoadSDNode>(Op); 2251 unsigned ExtType = LD->getExtensionType(); 2252 switch (ExtType) { 2253 default: break; 2254 case ISD::SEXTLOAD: // '17' bits known 2255 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2256 return VTBits-Tmp+1; 2257 case ISD::ZEXTLOAD: // '16' bits known 2258 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2259 return VTBits-Tmp; 2260 } 2261 } 2262 2263 // Allow the target to implement this method for its nodes. 2264 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2265 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2266 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2267 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2268 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2269 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2270 } 2271 2272 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2273 // use this information. 2274 APInt KnownZero, KnownOne; 2275 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 2276 2277 APInt Mask; 2278 if (KnownZero.isNegative()) { // sign bit is 0 2279 Mask = KnownZero; 2280 } else if (KnownOne.isNegative()) { // sign bit is 1; 2281 Mask = KnownOne; 2282 } else { 2283 // Nothing known. 2284 return FirstAnswer; 2285 } 2286 2287 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2288 // the number of identical bits in the top of the input value. 2289 Mask = ~Mask; 2290 Mask <<= Mask.getBitWidth()-VTBits; 2291 // Return # leading zeros. We use 'min' here in case Val was zero before 2292 // shifting. We don't want to return '64' as for an i32 "0". 2293 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2294} 2295 2296/// isBaseWithConstantOffset - Return true if the specified operand is an 2297/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an 2298/// ISD::OR with a ConstantSDNode that is guaranteed to have the same 2299/// semantics as an ADD. This handles the equivalence: 2300/// X|Cst == X+Cst iff X&Cst = 0. 2301bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { 2302 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || 2303 !isa<ConstantSDNode>(Op.getOperand(1))) 2304 return false; 2305 2306 if (Op.getOpcode() == ISD::OR && 2307 !MaskedValueIsZero(Op.getOperand(0), 2308 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue())) 2309 return false; 2310 2311 return true; 2312} 2313 2314 2315bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2316 // If we're told that NaNs won't happen, assume they won't. 2317 if (getTarget().Options.NoNaNsFPMath) 2318 return true; 2319 2320 // If the value is a constant, we can obviously see if it is a NaN or not. 2321 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2322 return !C->getValueAPF().isNaN(); 2323 2324 // TODO: Recognize more cases here. 2325 2326 return false; 2327} 2328 2329bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2330 // If the value is a constant, we can obviously see if it is a zero or not. 2331 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2332 return !C->isZero(); 2333 2334 // TODO: Recognize more cases here. 2335 switch (Op.getOpcode()) { 2336 default: break; 2337 case ISD::OR: 2338 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2339 return !C->isNullValue(); 2340 break; 2341 } 2342 2343 return false; 2344} 2345 2346bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2347 // Check the obvious case. 2348 if (A == B) return true; 2349 2350 // For for negative and positive zero. 2351 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2352 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2353 if (CA->isZero() && CB->isZero()) return true; 2354 2355 // Otherwise they may not be equal. 2356 return false; 2357} 2358 2359/// getNode - Gets or creates the specified node. 2360/// 2361SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2362 FoldingSetNodeID ID; 2363 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2364 void *IP = 0; 2365 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2366 return SDValue(E, 0); 2367 2368 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2369 CSEMap.InsertNode(N, IP); 2370 2371 AllNodes.push_back(N); 2372#ifndef NDEBUG 2373 VerifySDNode(N); 2374#endif 2375 return SDValue(N, 0); 2376} 2377 2378SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2379 EVT VT, SDValue Operand) { 2380 // Constant fold unary operations with an integer constant operand. 2381 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2382 const APInt &Val = C->getAPIntValue(); 2383 switch (Opcode) { 2384 default: break; 2385 case ISD::SIGN_EXTEND: 2386 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT); 2387 case ISD::ANY_EXTEND: 2388 case ISD::ZERO_EXTEND: 2389 case ISD::TRUNCATE: 2390 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT); 2391 case ISD::UINT_TO_FP: 2392 case ISD::SINT_TO_FP: { 2393 // No compile time operations on ppcf128. 2394 if (VT == MVT::ppcf128) break; 2395 APFloat apf(APInt::getNullValue(VT.getSizeInBits())); 2396 (void)apf.convertFromAPInt(Val, 2397 Opcode==ISD::SINT_TO_FP, 2398 APFloat::rmNearestTiesToEven); 2399 return getConstantFP(apf, VT); 2400 } 2401 case ISD::BITCAST: 2402 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2403 return getConstantFP(Val.bitsToFloat(), VT); 2404 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2405 return getConstantFP(Val.bitsToDouble(), VT); 2406 break; 2407 case ISD::BSWAP: 2408 return getConstant(Val.byteSwap(), VT); 2409 case ISD::CTPOP: 2410 return getConstant(Val.countPopulation(), VT); 2411 case ISD::CTLZ: 2412 case ISD::CTLZ_ZERO_UNDEF: 2413 return getConstant(Val.countLeadingZeros(), VT); 2414 case ISD::CTTZ: 2415 case ISD::CTTZ_ZERO_UNDEF: 2416 return getConstant(Val.countTrailingZeros(), VT); 2417 } 2418 } 2419 2420 // Constant fold unary operations with a floating point constant operand. 2421 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2422 APFloat V = C->getValueAPF(); // make copy 2423 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2424 switch (Opcode) { 2425 case ISD::FNEG: 2426 V.changeSign(); 2427 return getConstantFP(V, VT); 2428 case ISD::FABS: 2429 V.clearSign(); 2430 return getConstantFP(V, VT); 2431 case ISD::FP_ROUND: 2432 case ISD::FP_EXTEND: { 2433 bool ignored; 2434 // This can return overflow, underflow, or inexact; we don't care. 2435 // FIXME need to be more flexible about rounding mode. 2436 (void)V.convert(*EVTToAPFloatSemantics(VT), 2437 APFloat::rmNearestTiesToEven, &ignored); 2438 return getConstantFP(V, VT); 2439 } 2440 case ISD::FP_TO_SINT: 2441 case ISD::FP_TO_UINT: { 2442 integerPart x[2]; 2443 bool ignored; 2444 assert(integerPartWidth >= 64); 2445 // FIXME need to be more flexible about rounding mode. 2446 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2447 Opcode==ISD::FP_TO_SINT, 2448 APFloat::rmTowardZero, &ignored); 2449 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2450 break; 2451 APInt api(VT.getSizeInBits(), x); 2452 return getConstant(api, VT); 2453 } 2454 case ISD::BITCAST: 2455 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2456 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2457 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2458 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2459 break; 2460 } 2461 } 2462 } 2463 2464 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2465 switch (Opcode) { 2466 case ISD::TokenFactor: 2467 case ISD::MERGE_VALUES: 2468 case ISD::CONCAT_VECTORS: 2469 return Operand; // Factor, merge or concat of one node? No need. 2470 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2471 case ISD::FP_EXTEND: 2472 assert(VT.isFloatingPoint() && 2473 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2474 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2475 assert((!VT.isVector() || 2476 VT.getVectorNumElements() == 2477 Operand.getValueType().getVectorNumElements()) && 2478 "Vector element count mismatch!"); 2479 if (Operand.getOpcode() == ISD::UNDEF) 2480 return getUNDEF(VT); 2481 break; 2482 case ISD::SIGN_EXTEND: 2483 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2484 "Invalid SIGN_EXTEND!"); 2485 if (Operand.getValueType() == VT) return Operand; // noop extension 2486 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2487 "Invalid sext node, dst < src!"); 2488 assert((!VT.isVector() || 2489 VT.getVectorNumElements() == 2490 Operand.getValueType().getVectorNumElements()) && 2491 "Vector element count mismatch!"); 2492 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2493 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2494 else if (OpOpcode == ISD::UNDEF) 2495 // sext(undef) = 0, because the top bits will all be the same. 2496 return getConstant(0, VT); 2497 break; 2498 case ISD::ZERO_EXTEND: 2499 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2500 "Invalid ZERO_EXTEND!"); 2501 if (Operand.getValueType() == VT) return Operand; // noop extension 2502 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2503 "Invalid zext node, dst < src!"); 2504 assert((!VT.isVector() || 2505 VT.getVectorNumElements() == 2506 Operand.getValueType().getVectorNumElements()) && 2507 "Vector element count mismatch!"); 2508 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2509 return getNode(ISD::ZERO_EXTEND, DL, VT, 2510 Operand.getNode()->getOperand(0)); 2511 else if (OpOpcode == ISD::UNDEF) 2512 // zext(undef) = 0, because the top bits will be zero. 2513 return getConstant(0, VT); 2514 break; 2515 case ISD::ANY_EXTEND: 2516 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2517 "Invalid ANY_EXTEND!"); 2518 if (Operand.getValueType() == VT) return Operand; // noop extension 2519 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2520 "Invalid anyext node, dst < src!"); 2521 assert((!VT.isVector() || 2522 VT.getVectorNumElements() == 2523 Operand.getValueType().getVectorNumElements()) && 2524 "Vector element count mismatch!"); 2525 2526 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2527 OpOpcode == ISD::ANY_EXTEND) 2528 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2529 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2530 else if (OpOpcode == ISD::UNDEF) 2531 return getUNDEF(VT); 2532 2533 // (ext (trunx x)) -> x 2534 if (OpOpcode == ISD::TRUNCATE) { 2535 SDValue OpOp = Operand.getNode()->getOperand(0); 2536 if (OpOp.getValueType() == VT) 2537 return OpOp; 2538 } 2539 break; 2540 case ISD::TRUNCATE: 2541 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2542 "Invalid TRUNCATE!"); 2543 if (Operand.getValueType() == VT) return Operand; // noop truncate 2544 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2545 "Invalid truncate node, src < dst!"); 2546 assert((!VT.isVector() || 2547 VT.getVectorNumElements() == 2548 Operand.getValueType().getVectorNumElements()) && 2549 "Vector element count mismatch!"); 2550 if (OpOpcode == ISD::TRUNCATE) 2551 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2552 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2553 OpOpcode == ISD::ANY_EXTEND) { 2554 // If the source is smaller than the dest, we still need an extend. 2555 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2556 .bitsLT(VT.getScalarType())) 2557 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2558 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2559 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2560 return Operand.getNode()->getOperand(0); 2561 } 2562 if (OpOpcode == ISD::UNDEF) 2563 return getUNDEF(VT); 2564 break; 2565 case ISD::BITCAST: 2566 // Basic sanity checking. 2567 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2568 && "Cannot BITCAST between types of different sizes!"); 2569 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2570 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2571 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2572 if (OpOpcode == ISD::UNDEF) 2573 return getUNDEF(VT); 2574 break; 2575 case ISD::SCALAR_TO_VECTOR: 2576 assert(VT.isVector() && !Operand.getValueType().isVector() && 2577 (VT.getVectorElementType() == Operand.getValueType() || 2578 (VT.getVectorElementType().isInteger() && 2579 Operand.getValueType().isInteger() && 2580 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2581 "Illegal SCALAR_TO_VECTOR node!"); 2582 if (OpOpcode == ISD::UNDEF) 2583 return getUNDEF(VT); 2584 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2585 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2586 isa<ConstantSDNode>(Operand.getOperand(1)) && 2587 Operand.getConstantOperandVal(1) == 0 && 2588 Operand.getOperand(0).getValueType() == VT) 2589 return Operand.getOperand(0); 2590 break; 2591 case ISD::FNEG: 2592 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2593 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB) 2594 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2595 Operand.getNode()->getOperand(0)); 2596 if (OpOpcode == ISD::FNEG) // --X -> X 2597 return Operand.getNode()->getOperand(0); 2598 break; 2599 case ISD::FABS: 2600 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2601 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2602 break; 2603 } 2604 2605 SDNode *N; 2606 SDVTList VTs = getVTList(VT); 2607 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2608 FoldingSetNodeID ID; 2609 SDValue Ops[1] = { Operand }; 2610 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2611 void *IP = 0; 2612 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2613 return SDValue(E, 0); 2614 2615 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2616 CSEMap.InsertNode(N, IP); 2617 } else { 2618 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2619 } 2620 2621 AllNodes.push_back(N); 2622#ifndef NDEBUG 2623 VerifySDNode(N); 2624#endif 2625 return SDValue(N, 0); 2626} 2627 2628SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2629 EVT VT, 2630 ConstantSDNode *Cst1, 2631 ConstantSDNode *Cst2) { 2632 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2633 2634 switch (Opcode) { 2635 case ISD::ADD: return getConstant(C1 + C2, VT); 2636 case ISD::SUB: return getConstant(C1 - C2, VT); 2637 case ISD::MUL: return getConstant(C1 * C2, VT); 2638 case ISD::UDIV: 2639 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2640 break; 2641 case ISD::UREM: 2642 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2643 break; 2644 case ISD::SDIV: 2645 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2646 break; 2647 case ISD::SREM: 2648 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2649 break; 2650 case ISD::AND: return getConstant(C1 & C2, VT); 2651 case ISD::OR: return getConstant(C1 | C2, VT); 2652 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2653 case ISD::SHL: return getConstant(C1 << C2, VT); 2654 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2655 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2656 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2657 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2658 default: break; 2659 } 2660 2661 return SDValue(); 2662} 2663 2664SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2665 SDValue N1, SDValue N2) { 2666 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2667 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2668 switch (Opcode) { 2669 default: break; 2670 case ISD::TokenFactor: 2671 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2672 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2673 // Fold trivial token factors. 2674 if (N1.getOpcode() == ISD::EntryToken) return N2; 2675 if (N2.getOpcode() == ISD::EntryToken) return N1; 2676 if (N1 == N2) return N1; 2677 break; 2678 case ISD::CONCAT_VECTORS: 2679 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2680 // one big BUILD_VECTOR. 2681 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2682 N2.getOpcode() == ISD::BUILD_VECTOR) { 2683 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2684 N1.getNode()->op_end()); 2685 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2686 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2687 } 2688 break; 2689 case ISD::AND: 2690 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2691 assert(N1.getValueType() == N2.getValueType() && 2692 N1.getValueType() == VT && "Binary operator types must match!"); 2693 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2694 // worth handling here. 2695 if (N2C && N2C->isNullValue()) 2696 return N2; 2697 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2698 return N1; 2699 break; 2700 case ISD::OR: 2701 case ISD::XOR: 2702 case ISD::ADD: 2703 case ISD::SUB: 2704 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2705 assert(N1.getValueType() == N2.getValueType() && 2706 N1.getValueType() == VT && "Binary operator types must match!"); 2707 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2708 // it's worth handling here. 2709 if (N2C && N2C->isNullValue()) 2710 return N1; 2711 break; 2712 case ISD::UDIV: 2713 case ISD::UREM: 2714 case ISD::MULHU: 2715 case ISD::MULHS: 2716 case ISD::MUL: 2717 case ISD::SDIV: 2718 case ISD::SREM: 2719 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2720 assert(N1.getValueType() == N2.getValueType() && 2721 N1.getValueType() == VT && "Binary operator types must match!"); 2722 break; 2723 case ISD::FADD: 2724 case ISD::FSUB: 2725 case ISD::FMUL: 2726 case ISD::FDIV: 2727 case ISD::FREM: 2728 if (getTarget().Options.UnsafeFPMath) { 2729 if (Opcode == ISD::FADD) { 2730 // 0+x --> x 2731 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2732 if (CFP->getValueAPF().isZero()) 2733 return N2; 2734 // x+0 --> x 2735 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2736 if (CFP->getValueAPF().isZero()) 2737 return N1; 2738 } else if (Opcode == ISD::FSUB) { 2739 // x-0 --> x 2740 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2741 if (CFP->getValueAPF().isZero()) 2742 return N1; 2743 } 2744 } 2745 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2746 assert(N1.getValueType() == N2.getValueType() && 2747 N1.getValueType() == VT && "Binary operator types must match!"); 2748 break; 2749 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2750 assert(N1.getValueType() == VT && 2751 N1.getValueType().isFloatingPoint() && 2752 N2.getValueType().isFloatingPoint() && 2753 "Invalid FCOPYSIGN!"); 2754 break; 2755 case ISD::SHL: 2756 case ISD::SRA: 2757 case ISD::SRL: 2758 case ISD::ROTL: 2759 case ISD::ROTR: 2760 assert(VT == N1.getValueType() && 2761 "Shift operators return type must be the same as their first arg"); 2762 assert(VT.isInteger() && N2.getValueType().isInteger() && 2763 "Shifts only work on integers"); 2764 // Verify that the shift amount VT is bit enough to hold valid shift 2765 // amounts. This catches things like trying to shift an i1024 value by an 2766 // i8, which is easy to fall into in generic code that uses 2767 // TLI.getShiftAmount(). 2768 assert(N2.getValueType().getSizeInBits() >= 2769 Log2_32_Ceil(N1.getValueType().getSizeInBits()) && 2770 "Invalid use of small shift amount with oversized value!"); 2771 2772 // Always fold shifts of i1 values so the code generator doesn't need to 2773 // handle them. Since we know the size of the shift has to be less than the 2774 // size of the value, the shift/rotate count is guaranteed to be zero. 2775 if (VT == MVT::i1) 2776 return N1; 2777 if (N2C && N2C->isNullValue()) 2778 return N1; 2779 break; 2780 case ISD::FP_ROUND_INREG: { 2781 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2782 assert(VT == N1.getValueType() && "Not an inreg round!"); 2783 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2784 "Cannot FP_ROUND_INREG integer types"); 2785 assert(EVT.isVector() == VT.isVector() && 2786 "FP_ROUND_INREG type should be vector iff the operand " 2787 "type is vector!"); 2788 assert((!EVT.isVector() || 2789 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2790 "Vector element counts must match in FP_ROUND_INREG"); 2791 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2792 (void)EVT; 2793 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2794 break; 2795 } 2796 case ISD::FP_ROUND: 2797 assert(VT.isFloatingPoint() && 2798 N1.getValueType().isFloatingPoint() && 2799 VT.bitsLE(N1.getValueType()) && 2800 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2801 if (N1.getValueType() == VT) return N1; // noop conversion. 2802 break; 2803 case ISD::AssertSext: 2804 case ISD::AssertZext: { 2805 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2806 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2807 assert(VT.isInteger() && EVT.isInteger() && 2808 "Cannot *_EXTEND_INREG FP types"); 2809 assert(!EVT.isVector() && 2810 "AssertSExt/AssertZExt type should be the vector element type " 2811 "rather than the vector type!"); 2812 assert(EVT.bitsLE(VT) && "Not extending!"); 2813 if (VT == EVT) return N1; // noop assertion. 2814 break; 2815 } 2816 case ISD::SIGN_EXTEND_INREG: { 2817 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2818 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2819 assert(VT.isInteger() && EVT.isInteger() && 2820 "Cannot *_EXTEND_INREG FP types"); 2821 assert(EVT.isVector() == VT.isVector() && 2822 "SIGN_EXTEND_INREG type should be vector iff the operand " 2823 "type is vector!"); 2824 assert((!EVT.isVector() || 2825 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2826 "Vector element counts must match in SIGN_EXTEND_INREG"); 2827 assert(EVT.bitsLE(VT) && "Not extending!"); 2828 if (EVT == VT) return N1; // Not actually extending 2829 2830 if (N1C) { 2831 APInt Val = N1C->getAPIntValue(); 2832 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2833 Val <<= Val.getBitWidth()-FromBits; 2834 Val = Val.ashr(Val.getBitWidth()-FromBits); 2835 return getConstant(Val, VT); 2836 } 2837 break; 2838 } 2839 case ISD::EXTRACT_VECTOR_ELT: 2840 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2841 if (N1.getOpcode() == ISD::UNDEF) 2842 return getUNDEF(VT); 2843 2844 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2845 // expanding copies of large vectors from registers. 2846 if (N2C && 2847 N1.getOpcode() == ISD::CONCAT_VECTORS && 2848 N1.getNumOperands() > 0) { 2849 unsigned Factor = 2850 N1.getOperand(0).getValueType().getVectorNumElements(); 2851 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2852 N1.getOperand(N2C->getZExtValue() / Factor), 2853 getConstant(N2C->getZExtValue() % Factor, 2854 N2.getValueType())); 2855 } 2856 2857 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2858 // expanding large vector constants. 2859 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2860 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2861 EVT VEltTy = N1.getValueType().getVectorElementType(); 2862 if (Elt.getValueType() != VEltTy) { 2863 // If the vector element type is not legal, the BUILD_VECTOR operands 2864 // are promoted and implicitly truncated. Make that explicit here. 2865 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2866 } 2867 if (VT != VEltTy) { 2868 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2869 // result is implicitly extended. 2870 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2871 } 2872 return Elt; 2873 } 2874 2875 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2876 // operations are lowered to scalars. 2877 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2878 // If the indices are the same, return the inserted element else 2879 // if the indices are known different, extract the element from 2880 // the original vector. 2881 SDValue N1Op2 = N1.getOperand(2); 2882 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2883 2884 if (N1Op2C && N2C) { 2885 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2886 if (VT == N1.getOperand(1).getValueType()) 2887 return N1.getOperand(1); 2888 else 2889 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2890 } 2891 2892 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2893 } 2894 } 2895 break; 2896 case ISD::EXTRACT_ELEMENT: 2897 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2898 assert(!N1.getValueType().isVector() && !VT.isVector() && 2899 (N1.getValueType().isInteger() == VT.isInteger()) && 2900 N1.getValueType() != VT && 2901 "Wrong types for EXTRACT_ELEMENT!"); 2902 2903 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2904 // 64-bit integers into 32-bit parts. Instead of building the extract of 2905 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2906 if (N1.getOpcode() == ISD::BUILD_PAIR) 2907 return N1.getOperand(N2C->getZExtValue()); 2908 2909 // EXTRACT_ELEMENT of a constant int is also very common. 2910 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2911 unsigned ElementSize = VT.getSizeInBits(); 2912 unsigned Shift = ElementSize * N2C->getZExtValue(); 2913 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2914 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2915 } 2916 break; 2917 case ISD::EXTRACT_SUBVECTOR: { 2918 SDValue Index = N2; 2919 if (VT.isSimple() && N1.getValueType().isSimple()) { 2920 assert(VT.isVector() && N1.getValueType().isVector() && 2921 "Extract subvector VTs must be a vectors!"); 2922 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() && 2923 "Extract subvector VTs must have the same element type!"); 2924 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() && 2925 "Extract subvector must be from larger vector to smaller vector!"); 2926 2927 if (isa<ConstantSDNode>(Index.getNode())) { 2928 assert((VT.getVectorNumElements() + 2929 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 2930 <= N1.getValueType().getVectorNumElements()) 2931 && "Extract subvector overflow!"); 2932 } 2933 2934 // Trivial extraction. 2935 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT()) 2936 return N1; 2937 } 2938 break; 2939 } 2940 } 2941 2942 if (N1C) { 2943 if (N2C) { 2944 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2945 if (SV.getNode()) return SV; 2946 } else { // Cannonicalize constant to RHS if commutative 2947 if (isCommutativeBinOp(Opcode)) { 2948 std::swap(N1C, N2C); 2949 std::swap(N1, N2); 2950 } 2951 } 2952 } 2953 2954 // Constant fold FP operations. 2955 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2956 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2957 if (N1CFP) { 2958 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2959 // Cannonicalize constant to RHS if commutative 2960 std::swap(N1CFP, N2CFP); 2961 std::swap(N1, N2); 2962 } else if (N2CFP && VT != MVT::ppcf128) { 2963 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2964 APFloat::opStatus s; 2965 switch (Opcode) { 2966 case ISD::FADD: 2967 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2968 if (s != APFloat::opInvalidOp) 2969 return getConstantFP(V1, VT); 2970 break; 2971 case ISD::FSUB: 2972 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2973 if (s!=APFloat::opInvalidOp) 2974 return getConstantFP(V1, VT); 2975 break; 2976 case ISD::FMUL: 2977 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2978 if (s!=APFloat::opInvalidOp) 2979 return getConstantFP(V1, VT); 2980 break; 2981 case ISD::FDIV: 2982 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2983 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2984 return getConstantFP(V1, VT); 2985 break; 2986 case ISD::FREM : 2987 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2988 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2989 return getConstantFP(V1, VT); 2990 break; 2991 case ISD::FCOPYSIGN: 2992 V1.copySign(V2); 2993 return getConstantFP(V1, VT); 2994 default: break; 2995 } 2996 } 2997 } 2998 2999 // Canonicalize an UNDEF to the RHS, even over a constant. 3000 if (N1.getOpcode() == ISD::UNDEF) { 3001 if (isCommutativeBinOp(Opcode)) { 3002 std::swap(N1, N2); 3003 } else { 3004 switch (Opcode) { 3005 case ISD::FP_ROUND_INREG: 3006 case ISD::SIGN_EXTEND_INREG: 3007 case ISD::SUB: 3008 case ISD::FSUB: 3009 case ISD::FDIV: 3010 case ISD::FREM: 3011 case ISD::SRA: 3012 return N1; // fold op(undef, arg2) -> undef 3013 case ISD::UDIV: 3014 case ISD::SDIV: 3015 case ISD::UREM: 3016 case ISD::SREM: 3017 case ISD::SRL: 3018 case ISD::SHL: 3019 if (!VT.isVector()) 3020 return getConstant(0, VT); // fold op(undef, arg2) -> 0 3021 // For vectors, we can't easily build an all zero vector, just return 3022 // the LHS. 3023 return N2; 3024 } 3025 } 3026 } 3027 3028 // Fold a bunch of operators when the RHS is undef. 3029 if (N2.getOpcode() == ISD::UNDEF) { 3030 switch (Opcode) { 3031 case ISD::XOR: 3032 if (N1.getOpcode() == ISD::UNDEF) 3033 // Handle undef ^ undef -> 0 special case. This is a common 3034 // idiom (misuse). 3035 return getConstant(0, VT); 3036 // fallthrough 3037 case ISD::ADD: 3038 case ISD::ADDC: 3039 case ISD::ADDE: 3040 case ISD::SUB: 3041 case ISD::UDIV: 3042 case ISD::SDIV: 3043 case ISD::UREM: 3044 case ISD::SREM: 3045 return N2; // fold op(arg1, undef) -> undef 3046 case ISD::FADD: 3047 case ISD::FSUB: 3048 case ISD::FMUL: 3049 case ISD::FDIV: 3050 case ISD::FREM: 3051 if (getTarget().Options.UnsafeFPMath) 3052 return N2; 3053 break; 3054 case ISD::MUL: 3055 case ISD::AND: 3056 case ISD::SRL: 3057 case ISD::SHL: 3058 if (!VT.isVector()) 3059 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3060 // For vectors, we can't easily build an all zero vector, just return 3061 // the LHS. 3062 return N1; 3063 case ISD::OR: 3064 if (!VT.isVector()) 3065 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3066 // For vectors, we can't easily build an all one vector, just return 3067 // the LHS. 3068 return N1; 3069 case ISD::SRA: 3070 return N1; 3071 } 3072 } 3073 3074 // Memoize this node if possible. 3075 SDNode *N; 3076 SDVTList VTs = getVTList(VT); 3077 if (VT != MVT::Glue) { 3078 SDValue Ops[] = { N1, N2 }; 3079 FoldingSetNodeID ID; 3080 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3081 void *IP = 0; 3082 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3083 return SDValue(E, 0); 3084 3085 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3086 CSEMap.InsertNode(N, IP); 3087 } else { 3088 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3089 } 3090 3091 AllNodes.push_back(N); 3092#ifndef NDEBUG 3093 VerifySDNode(N); 3094#endif 3095 return SDValue(N, 0); 3096} 3097 3098SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3099 SDValue N1, SDValue N2, SDValue N3) { 3100 // Perform various simplifications. 3101 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3102 switch (Opcode) { 3103 case ISD::CONCAT_VECTORS: 3104 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3105 // one big BUILD_VECTOR. 3106 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3107 N2.getOpcode() == ISD::BUILD_VECTOR && 3108 N3.getOpcode() == ISD::BUILD_VECTOR) { 3109 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3110 N1.getNode()->op_end()); 3111 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3112 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3113 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3114 } 3115 break; 3116 case ISD::SETCC: { 3117 // Use FoldSetCC to simplify SETCC's. 3118 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3119 if (Simp.getNode()) return Simp; 3120 break; 3121 } 3122 case ISD::SELECT: 3123 if (N1C) { 3124 if (N1C->getZExtValue()) 3125 return N2; // select true, X, Y -> X 3126 return N3; // select false, X, Y -> Y 3127 } 3128 3129 if (N2 == N3) return N2; // select C, X, X -> X 3130 break; 3131 case ISD::VECTOR_SHUFFLE: 3132 llvm_unreachable("should use getVectorShuffle constructor!"); 3133 case ISD::INSERT_SUBVECTOR: { 3134 SDValue Index = N3; 3135 if (VT.isSimple() && N1.getValueType().isSimple() 3136 && N2.getValueType().isSimple()) { 3137 assert(VT.isVector() && N1.getValueType().isVector() && 3138 N2.getValueType().isVector() && 3139 "Insert subvector VTs must be a vectors"); 3140 assert(VT == N1.getValueType() && 3141 "Dest and insert subvector source types must match!"); 3142 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && 3143 "Insert subvector must be from smaller vector to larger vector!"); 3144 if (isa<ConstantSDNode>(Index.getNode())) { 3145 assert((N2.getValueType().getVectorNumElements() + 3146 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3147 <= VT.getVectorNumElements()) 3148 && "Insert subvector overflow!"); 3149 } 3150 3151 // Trivial insertion. 3152 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT()) 3153 return N2; 3154 } 3155 break; 3156 } 3157 case ISD::BITCAST: 3158 // Fold bit_convert nodes from a type to themselves. 3159 if (N1.getValueType() == VT) 3160 return N1; 3161 break; 3162 } 3163 3164 // Memoize node if it doesn't produce a flag. 3165 SDNode *N; 3166 SDVTList VTs = getVTList(VT); 3167 if (VT != MVT::Glue) { 3168 SDValue Ops[] = { N1, N2, N3 }; 3169 FoldingSetNodeID ID; 3170 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3171 void *IP = 0; 3172 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3173 return SDValue(E, 0); 3174 3175 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3176 CSEMap.InsertNode(N, IP); 3177 } else { 3178 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3179 } 3180 3181 AllNodes.push_back(N); 3182#ifndef NDEBUG 3183 VerifySDNode(N); 3184#endif 3185 return SDValue(N, 0); 3186} 3187 3188SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3189 SDValue N1, SDValue N2, SDValue N3, 3190 SDValue N4) { 3191 SDValue Ops[] = { N1, N2, N3, N4 }; 3192 return getNode(Opcode, DL, VT, Ops, 4); 3193} 3194 3195SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3196 SDValue N1, SDValue N2, SDValue N3, 3197 SDValue N4, SDValue N5) { 3198 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3199 return getNode(Opcode, DL, VT, Ops, 5); 3200} 3201 3202/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3203/// the incoming stack arguments to be loaded from the stack. 3204SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3205 SmallVector<SDValue, 8> ArgChains; 3206 3207 // Include the original chain at the beginning of the list. When this is 3208 // used by target LowerCall hooks, this helps legalize find the 3209 // CALLSEQ_BEGIN node. 3210 ArgChains.push_back(Chain); 3211 3212 // Add a chain value for each stack argument. 3213 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3214 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3215 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3216 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3217 if (FI->getIndex() < 0) 3218 ArgChains.push_back(SDValue(L, 1)); 3219 3220 // Build a tokenfactor for all the chains. 3221 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3222 &ArgChains[0], ArgChains.size()); 3223} 3224 3225/// SplatByte - Distribute ByteVal over NumBits bits. 3226static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) { 3227 APInt Val = APInt(NumBits, ByteVal); 3228 unsigned Shift = 8; 3229 for (unsigned i = NumBits; i > 8; i >>= 1) { 3230 Val = (Val << Shift) | Val; 3231 Shift <<= 1; 3232 } 3233 return Val; 3234} 3235 3236/// getMemsetValue - Vectorized representation of the memset value 3237/// operand. 3238static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3239 DebugLoc dl) { 3240 assert(Value.getOpcode() != ISD::UNDEF); 3241 3242 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3243 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3244 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255); 3245 if (VT.isInteger()) 3246 return DAG.getConstant(Val, VT); 3247 return DAG.getConstantFP(APFloat(Val), VT); 3248 } 3249 3250 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3251 if (NumBits > 8) { 3252 // Use a multiplication with 0x010101... to extend the input to the 3253 // required length. 3254 APInt Magic = SplatByte(NumBits, 0x01); 3255 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3256 } 3257 3258 return Value; 3259} 3260 3261/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3262/// used when a memcpy is turned into a memset when the source is a constant 3263/// string ptr. 3264static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3265 const TargetLowering &TLI, StringRef Str) { 3266 // Handle vector with all elements zero. 3267 if (Str.empty()) { 3268 if (VT.isInteger()) 3269 return DAG.getConstant(0, VT); 3270 else if (VT == MVT::f32 || VT == MVT::f64) 3271 return DAG.getConstantFP(0.0, VT); 3272 else if (VT.isVector()) { 3273 unsigned NumElts = VT.getVectorNumElements(); 3274 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3275 return DAG.getNode(ISD::BITCAST, dl, VT, 3276 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3277 EltVT, NumElts))); 3278 } else 3279 llvm_unreachable("Expected type!"); 3280 } 3281 3282 assert(!VT.isVector() && "Can't handle vector type here!"); 3283 unsigned NumVTBytes = VT.getSizeInBits() / 8; 3284 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size())); 3285 3286 uint64_t Val = 0; 3287 if (TLI.isLittleEndian()) { 3288 for (unsigned i = 0; i != NumBytes; ++i) 3289 Val |= (uint64_t)(unsigned char)Str[i] << i*8; 3290 } else { 3291 for (unsigned i = 0; i != NumBytes; ++i) 3292 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8; 3293 } 3294 3295 return DAG.getConstant(Val, VT); 3296} 3297 3298/// getMemBasePlusOffset - Returns base and offset node for the 3299/// 3300static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3301 SelectionDAG &DAG) { 3302 EVT VT = Base.getValueType(); 3303 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3304 VT, Base, DAG.getConstant(Offset, VT)); 3305} 3306 3307/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3308/// 3309static bool isMemSrcFromString(SDValue Src, StringRef &Str) { 3310 unsigned SrcDelta = 0; 3311 GlobalAddressSDNode *G = NULL; 3312 if (Src.getOpcode() == ISD::GlobalAddress) 3313 G = cast<GlobalAddressSDNode>(Src); 3314 else if (Src.getOpcode() == ISD::ADD && 3315 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3316 Src.getOperand(1).getOpcode() == ISD::Constant) { 3317 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3318 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3319 } 3320 if (!G) 3321 return false; 3322 3323 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false); 3324} 3325 3326/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3327/// to replace the memset / memcpy. Return true if the number of memory ops 3328/// is below the threshold. It returns the types of the sequence of 3329/// memory ops to perform memset / memcpy by reference. 3330static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3331 unsigned Limit, uint64_t Size, 3332 unsigned DstAlign, unsigned SrcAlign, 3333 bool IsZeroVal, 3334 bool MemcpyStrSrc, 3335 SelectionDAG &DAG, 3336 const TargetLowering &TLI) { 3337 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3338 "Expecting memcpy / memset source to meet alignment requirement!"); 3339 // If 'SrcAlign' is zero, that means the memory operation does not need to 3340 // load the value, i.e. memset or memcpy from constant string. Otherwise, 3341 // it's the inferred alignment of the source. 'DstAlign', on the other hand, 3342 // is the specified alignment of the memory operation. If it is zero, that 3343 // means it's possible to change the alignment of the destination. 3344 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does 3345 // not need to be loaded. 3346 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3347 IsZeroVal, MemcpyStrSrc, 3348 DAG.getMachineFunction()); 3349 3350 if (VT == MVT::Other) { 3351 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3352 TLI.allowsUnalignedMemoryAccesses(VT)) { 3353 VT = TLI.getPointerTy(); 3354 } else { 3355 switch (DstAlign & 7) { 3356 case 0: VT = MVT::i64; break; 3357 case 4: VT = MVT::i32; break; 3358 case 2: VT = MVT::i16; break; 3359 default: VT = MVT::i8; break; 3360 } 3361 } 3362 3363 MVT LVT = MVT::i64; 3364 while (!TLI.isTypeLegal(LVT)) 3365 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3366 assert(LVT.isInteger()); 3367 3368 if (VT.bitsGT(LVT)) 3369 VT = LVT; 3370 } 3371 3372 unsigned NumMemOps = 0; 3373 while (Size != 0) { 3374 unsigned VTSize = VT.getSizeInBits() / 8; 3375 while (VTSize > Size) { 3376 // For now, only use non-vector load / store's for the left-over pieces. 3377 if (VT.isVector() || VT.isFloatingPoint()) { 3378 VT = MVT::i64; 3379 while (!TLI.isTypeLegal(VT)) 3380 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3381 VTSize = VT.getSizeInBits() / 8; 3382 } else { 3383 // This can result in a type that is not legal on the target, e.g. 3384 // 1 or 2 bytes on PPC. 3385 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3386 VTSize >>= 1; 3387 } 3388 } 3389 3390 if (++NumMemOps > Limit) 3391 return false; 3392 MemOps.push_back(VT); 3393 Size -= VTSize; 3394 } 3395 3396 return true; 3397} 3398 3399static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3400 SDValue Chain, SDValue Dst, 3401 SDValue Src, uint64_t Size, 3402 unsigned Align, bool isVol, 3403 bool AlwaysInline, 3404 MachinePointerInfo DstPtrInfo, 3405 MachinePointerInfo SrcPtrInfo) { 3406 // Turn a memcpy of undef to nop. 3407 if (Src.getOpcode() == ISD::UNDEF) 3408 return Chain; 3409 3410 // Expand memcpy to a series of load and store ops if the size operand falls 3411 // below a certain threshold. 3412 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3413 // rather than maybe a humongous number of loads and stores. 3414 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3415 std::vector<EVT> MemOps; 3416 bool DstAlignCanChange = false; 3417 MachineFunction &MF = DAG.getMachineFunction(); 3418 MachineFrameInfo *MFI = MF.getFrameInfo(); 3419 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3420 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3421 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3422 DstAlignCanChange = true; 3423 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3424 if (Align > SrcAlign) 3425 SrcAlign = Align; 3426 StringRef Str; 3427 bool CopyFromStr = isMemSrcFromString(Src, Str); 3428 bool isZeroStr = CopyFromStr && Str.empty(); 3429 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3430 3431 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3432 (DstAlignCanChange ? 0 : Align), 3433 (isZeroStr ? 0 : SrcAlign), 3434 true, CopyFromStr, DAG, TLI)) 3435 return SDValue(); 3436 3437 if (DstAlignCanChange) { 3438 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3439 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3440 if (NewAlign > Align) { 3441 // Give the stack frame object a larger alignment if needed. 3442 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3443 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3444 Align = NewAlign; 3445 } 3446 } 3447 3448 SmallVector<SDValue, 8> OutChains; 3449 unsigned NumMemOps = MemOps.size(); 3450 uint64_t SrcOff = 0, DstOff = 0; 3451 for (unsigned i = 0; i != NumMemOps; ++i) { 3452 EVT VT = MemOps[i]; 3453 unsigned VTSize = VT.getSizeInBits() / 8; 3454 SDValue Value, Store; 3455 3456 if (CopyFromStr && 3457 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3458 // It's unlikely a store of a vector immediate can be done in a single 3459 // instruction. It would require a load from a constantpool first. 3460 // We only handle zero vectors here. 3461 // FIXME: Handle other cases where store of vector immediate is done in 3462 // a single instruction. 3463 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff)); 3464 Store = DAG.getStore(Chain, dl, Value, 3465 getMemBasePlusOffset(Dst, DstOff, DAG), 3466 DstPtrInfo.getWithOffset(DstOff), isVol, 3467 false, Align); 3468 } else { 3469 // The type might not be legal for the target. This should only happen 3470 // if the type is smaller than a legal type, as on PPC, so the right 3471 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3472 // to Load/Store if NVT==VT. 3473 // FIXME does the case above also need this? 3474 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3475 assert(NVT.bitsGE(VT)); 3476 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3477 getMemBasePlusOffset(Src, SrcOff, DAG), 3478 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3479 MinAlign(SrcAlign, SrcOff)); 3480 Store = DAG.getTruncStore(Chain, dl, Value, 3481 getMemBasePlusOffset(Dst, DstOff, DAG), 3482 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3483 false, Align); 3484 } 3485 OutChains.push_back(Store); 3486 SrcOff += VTSize; 3487 DstOff += VTSize; 3488 } 3489 3490 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3491 &OutChains[0], OutChains.size()); 3492} 3493 3494static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3495 SDValue Chain, SDValue Dst, 3496 SDValue Src, uint64_t Size, 3497 unsigned Align, bool isVol, 3498 bool AlwaysInline, 3499 MachinePointerInfo DstPtrInfo, 3500 MachinePointerInfo SrcPtrInfo) { 3501 // Turn a memmove of undef to nop. 3502 if (Src.getOpcode() == ISD::UNDEF) 3503 return Chain; 3504 3505 // Expand memmove to a series of load and store ops if the size operand falls 3506 // below a certain threshold. 3507 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3508 std::vector<EVT> MemOps; 3509 bool DstAlignCanChange = false; 3510 MachineFunction &MF = DAG.getMachineFunction(); 3511 MachineFrameInfo *MFI = MF.getFrameInfo(); 3512 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3513 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3514 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3515 DstAlignCanChange = true; 3516 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3517 if (Align > SrcAlign) 3518 SrcAlign = Align; 3519 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3520 3521 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3522 (DstAlignCanChange ? 0 : Align), 3523 SrcAlign, true, false, DAG, TLI)) 3524 return SDValue(); 3525 3526 if (DstAlignCanChange) { 3527 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3528 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3529 if (NewAlign > Align) { 3530 // Give the stack frame object a larger alignment if needed. 3531 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3532 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3533 Align = NewAlign; 3534 } 3535 } 3536 3537 uint64_t SrcOff = 0, DstOff = 0; 3538 SmallVector<SDValue, 8> LoadValues; 3539 SmallVector<SDValue, 8> LoadChains; 3540 SmallVector<SDValue, 8> OutChains; 3541 unsigned NumMemOps = MemOps.size(); 3542 for (unsigned i = 0; i < NumMemOps; i++) { 3543 EVT VT = MemOps[i]; 3544 unsigned VTSize = VT.getSizeInBits() / 8; 3545 SDValue Value, Store; 3546 3547 Value = DAG.getLoad(VT, dl, Chain, 3548 getMemBasePlusOffset(Src, SrcOff, DAG), 3549 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3550 false, false, SrcAlign); 3551 LoadValues.push_back(Value); 3552 LoadChains.push_back(Value.getValue(1)); 3553 SrcOff += VTSize; 3554 } 3555 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3556 &LoadChains[0], LoadChains.size()); 3557 OutChains.clear(); 3558 for (unsigned i = 0; i < NumMemOps; i++) { 3559 EVT VT = MemOps[i]; 3560 unsigned VTSize = VT.getSizeInBits() / 8; 3561 SDValue Value, Store; 3562 3563 Store = DAG.getStore(Chain, dl, LoadValues[i], 3564 getMemBasePlusOffset(Dst, DstOff, DAG), 3565 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3566 OutChains.push_back(Store); 3567 DstOff += VTSize; 3568 } 3569 3570 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3571 &OutChains[0], OutChains.size()); 3572} 3573 3574static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3575 SDValue Chain, SDValue Dst, 3576 SDValue Src, uint64_t Size, 3577 unsigned Align, bool isVol, 3578 MachinePointerInfo DstPtrInfo) { 3579 // Turn a memset of undef to nop. 3580 if (Src.getOpcode() == ISD::UNDEF) 3581 return Chain; 3582 3583 // Expand memset to a series of load/store ops if the size operand 3584 // falls below a certain threshold. 3585 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3586 std::vector<EVT> MemOps; 3587 bool DstAlignCanChange = false; 3588 MachineFunction &MF = DAG.getMachineFunction(); 3589 MachineFrameInfo *MFI = MF.getFrameInfo(); 3590 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3591 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3592 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3593 DstAlignCanChange = true; 3594 bool IsZeroVal = 3595 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3596 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3597 Size, (DstAlignCanChange ? 0 : Align), 0, 3598 IsZeroVal, false, DAG, TLI)) 3599 return SDValue(); 3600 3601 if (DstAlignCanChange) { 3602 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3603 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3604 if (NewAlign > Align) { 3605 // Give the stack frame object a larger alignment if needed. 3606 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3607 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3608 Align = NewAlign; 3609 } 3610 } 3611 3612 SmallVector<SDValue, 8> OutChains; 3613 uint64_t DstOff = 0; 3614 unsigned NumMemOps = MemOps.size(); 3615 3616 // Find the largest store and generate the bit pattern for it. 3617 EVT LargestVT = MemOps[0]; 3618 for (unsigned i = 1; i < NumMemOps; i++) 3619 if (MemOps[i].bitsGT(LargestVT)) 3620 LargestVT = MemOps[i]; 3621 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 3622 3623 for (unsigned i = 0; i < NumMemOps; i++) { 3624 EVT VT = MemOps[i]; 3625 3626 // If this store is smaller than the largest store see whether we can get 3627 // the smaller value for free with a truncate. 3628 SDValue Value = MemSetValue; 3629 if (VT.bitsLT(LargestVT)) { 3630 if (!LargestVT.isVector() && !VT.isVector() && 3631 TLI.isTruncateFree(LargestVT, VT)) 3632 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 3633 else 3634 Value = getMemsetValue(Src, VT, DAG, dl); 3635 } 3636 assert(Value.getValueType() == VT && "Value with wrong type."); 3637 SDValue Store = DAG.getStore(Chain, dl, Value, 3638 getMemBasePlusOffset(Dst, DstOff, DAG), 3639 DstPtrInfo.getWithOffset(DstOff), 3640 isVol, false, Align); 3641 OutChains.push_back(Store); 3642 DstOff += VT.getSizeInBits() / 8; 3643 } 3644 3645 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3646 &OutChains[0], OutChains.size()); 3647} 3648 3649SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3650 SDValue Src, SDValue Size, 3651 unsigned Align, bool isVol, bool AlwaysInline, 3652 MachinePointerInfo DstPtrInfo, 3653 MachinePointerInfo SrcPtrInfo) { 3654 3655 // Check to see if we should lower the memcpy to loads and stores first. 3656 // For cases within the target-specified limits, this is the best choice. 3657 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3658 if (ConstantSize) { 3659 // Memcpy with size zero? Just return the original chain. 3660 if (ConstantSize->isNullValue()) 3661 return Chain; 3662 3663 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3664 ConstantSize->getZExtValue(),Align, 3665 isVol, false, DstPtrInfo, SrcPtrInfo); 3666 if (Result.getNode()) 3667 return Result; 3668 } 3669 3670 // Then check to see if we should lower the memcpy with target-specific 3671 // code. If the target chooses to do this, this is the next best. 3672 SDValue Result = 3673 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3674 isVol, AlwaysInline, 3675 DstPtrInfo, SrcPtrInfo); 3676 if (Result.getNode()) 3677 return Result; 3678 3679 // If we really need inline code and the target declined to provide it, 3680 // use a (potentially long) sequence of loads and stores. 3681 if (AlwaysInline) { 3682 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3683 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3684 ConstantSize->getZExtValue(), Align, isVol, 3685 true, DstPtrInfo, SrcPtrInfo); 3686 } 3687 3688 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3689 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3690 // respect volatile, so they may do things like read or write memory 3691 // beyond the given memory regions. But fixing this isn't easy, and most 3692 // people don't care. 3693 3694 // Emit a library call. 3695 TargetLowering::ArgListTy Args; 3696 TargetLowering::ArgListEntry Entry; 3697 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3698 Entry.Node = Dst; Args.push_back(Entry); 3699 Entry.Node = Src; Args.push_back(Entry); 3700 Entry.Node = Size; Args.push_back(Entry); 3701 // FIXME: pass in DebugLoc 3702 std::pair<SDValue,SDValue> CallResult = 3703 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3704 false, false, false, false, 0, 3705 TLI.getLibcallCallingConv(RTLIB::MEMCPY), 3706 /*isTailCall=*/false, 3707 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 3708 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3709 TLI.getPointerTy()), 3710 Args, *this, dl); 3711 return CallResult.second; 3712} 3713 3714SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3715 SDValue Src, SDValue Size, 3716 unsigned Align, bool isVol, 3717 MachinePointerInfo DstPtrInfo, 3718 MachinePointerInfo SrcPtrInfo) { 3719 3720 // Check to see if we should lower the memmove to loads and stores first. 3721 // For cases within the target-specified limits, this is the best choice. 3722 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3723 if (ConstantSize) { 3724 // Memmove with size zero? Just return the original chain. 3725 if (ConstantSize->isNullValue()) 3726 return Chain; 3727 3728 SDValue Result = 3729 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3730 ConstantSize->getZExtValue(), Align, isVol, 3731 false, DstPtrInfo, SrcPtrInfo); 3732 if (Result.getNode()) 3733 return Result; 3734 } 3735 3736 // Then check to see if we should lower the memmove with target-specific 3737 // code. If the target chooses to do this, this is the next best. 3738 SDValue Result = 3739 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3740 DstPtrInfo, SrcPtrInfo); 3741 if (Result.getNode()) 3742 return Result; 3743 3744 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3745 // not be safe. See memcpy above for more details. 3746 3747 // Emit a library call. 3748 TargetLowering::ArgListTy Args; 3749 TargetLowering::ArgListEntry Entry; 3750 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3751 Entry.Node = Dst; Args.push_back(Entry); 3752 Entry.Node = Src; Args.push_back(Entry); 3753 Entry.Node = Size; Args.push_back(Entry); 3754 // FIXME: pass in DebugLoc 3755 std::pair<SDValue,SDValue> CallResult = 3756 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3757 false, false, false, false, 0, 3758 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), 3759 /*isTailCall=*/false, 3760 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 3761 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3762 TLI.getPointerTy()), 3763 Args, *this, dl); 3764 return CallResult.second; 3765} 3766 3767SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3768 SDValue Src, SDValue Size, 3769 unsigned Align, bool isVol, 3770 MachinePointerInfo DstPtrInfo) { 3771 3772 // Check to see if we should lower the memset to stores first. 3773 // For cases within the target-specified limits, this is the best choice. 3774 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3775 if (ConstantSize) { 3776 // Memset with size zero? Just return the original chain. 3777 if (ConstantSize->isNullValue()) 3778 return Chain; 3779 3780 SDValue Result = 3781 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3782 Align, isVol, DstPtrInfo); 3783 3784 if (Result.getNode()) 3785 return Result; 3786 } 3787 3788 // Then check to see if we should lower the memset with target-specific 3789 // code. If the target chooses to do this, this is the next best. 3790 SDValue Result = 3791 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3792 DstPtrInfo); 3793 if (Result.getNode()) 3794 return Result; 3795 3796 // Emit a library call. 3797 Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3798 TargetLowering::ArgListTy Args; 3799 TargetLowering::ArgListEntry Entry; 3800 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3801 Args.push_back(Entry); 3802 // Extend or truncate the argument to be an i32 value for the call. 3803 if (Src.getValueType().bitsGT(MVT::i32)) 3804 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3805 else 3806 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3807 Entry.Node = Src; 3808 Entry.Ty = Type::getInt32Ty(*getContext()); 3809 Entry.isSExt = true; 3810 Args.push_back(Entry); 3811 Entry.Node = Size; 3812 Entry.Ty = IntPtrTy; 3813 Entry.isSExt = false; 3814 Args.push_back(Entry); 3815 // FIXME: pass in DebugLoc 3816 std::pair<SDValue,SDValue> CallResult = 3817 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3818 false, false, false, false, 0, 3819 TLI.getLibcallCallingConv(RTLIB::MEMSET), 3820 /*isTailCall=*/false, 3821 /*doesNotReturn*/false, /*isReturnValueUsed=*/false, 3822 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3823 TLI.getPointerTy()), 3824 Args, *this, dl); 3825 return CallResult.second; 3826} 3827 3828SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3829 SDValue Chain, SDValue Ptr, SDValue Cmp, 3830 SDValue Swp, MachinePointerInfo PtrInfo, 3831 unsigned Alignment, 3832 AtomicOrdering Ordering, 3833 SynchronizationScope SynchScope) { 3834 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3835 Alignment = getEVTAlignment(MemVT); 3836 3837 MachineFunction &MF = getMachineFunction(); 3838 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3839 3840 // For now, atomics are considered to be volatile always. 3841 // FIXME: Volatile isn't really correct; we should keep track of atomic 3842 // orderings in the memoperand. 3843 Flags |= MachineMemOperand::MOVolatile; 3844 3845 MachineMemOperand *MMO = 3846 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 3847 3848 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO, 3849 Ordering, SynchScope); 3850} 3851 3852SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3853 SDValue Chain, 3854 SDValue Ptr, SDValue Cmp, 3855 SDValue Swp, MachineMemOperand *MMO, 3856 AtomicOrdering Ordering, 3857 SynchronizationScope SynchScope) { 3858 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3859 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3860 3861 EVT VT = Cmp.getValueType(); 3862 3863 SDVTList VTs = getVTList(VT, MVT::Other); 3864 FoldingSetNodeID ID; 3865 ID.AddInteger(MemVT.getRawBits()); 3866 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3867 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3868 void* IP = 0; 3869 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3870 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3871 return SDValue(E, 0); 3872 } 3873 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3874 Ptr, Cmp, Swp, MMO, Ordering, 3875 SynchScope); 3876 CSEMap.InsertNode(N, IP); 3877 AllNodes.push_back(N); 3878 return SDValue(N, 0); 3879} 3880 3881SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3882 SDValue Chain, 3883 SDValue Ptr, SDValue Val, 3884 const Value* PtrVal, 3885 unsigned Alignment, 3886 AtomicOrdering Ordering, 3887 SynchronizationScope SynchScope) { 3888 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3889 Alignment = getEVTAlignment(MemVT); 3890 3891 MachineFunction &MF = getMachineFunction(); 3892 // A monotonic store does not load; a release store "loads" in the sense 3893 // that other stores cannot be sunk past it. 3894 // (An atomicrmw obviously both loads and stores.) 3895 unsigned Flags = MachineMemOperand::MOStore; 3896 if (Opcode != ISD::ATOMIC_STORE || Ordering > Monotonic) 3897 Flags |= MachineMemOperand::MOLoad; 3898 3899 // For now, atomics are considered to be volatile always. 3900 // FIXME: Volatile isn't really correct; we should keep track of atomic 3901 // orderings in the memoperand. 3902 Flags |= MachineMemOperand::MOVolatile; 3903 3904 MachineMemOperand *MMO = 3905 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 3906 MemVT.getStoreSize(), Alignment); 3907 3908 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO, 3909 Ordering, SynchScope); 3910} 3911 3912SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3913 SDValue Chain, 3914 SDValue Ptr, SDValue Val, 3915 MachineMemOperand *MMO, 3916 AtomicOrdering Ordering, 3917 SynchronizationScope SynchScope) { 3918 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3919 Opcode == ISD::ATOMIC_LOAD_SUB || 3920 Opcode == ISD::ATOMIC_LOAD_AND || 3921 Opcode == ISD::ATOMIC_LOAD_OR || 3922 Opcode == ISD::ATOMIC_LOAD_XOR || 3923 Opcode == ISD::ATOMIC_LOAD_NAND || 3924 Opcode == ISD::ATOMIC_LOAD_MIN || 3925 Opcode == ISD::ATOMIC_LOAD_MAX || 3926 Opcode == ISD::ATOMIC_LOAD_UMIN || 3927 Opcode == ISD::ATOMIC_LOAD_UMAX || 3928 Opcode == ISD::ATOMIC_SWAP || 3929 Opcode == ISD::ATOMIC_STORE) && 3930 "Invalid Atomic Op"); 3931 3932 EVT VT = Val.getValueType(); 3933 3934 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) : 3935 getVTList(VT, MVT::Other); 3936 FoldingSetNodeID ID; 3937 ID.AddInteger(MemVT.getRawBits()); 3938 SDValue Ops[] = {Chain, Ptr, Val}; 3939 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3940 void* IP = 0; 3941 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3942 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3943 return SDValue(E, 0); 3944 } 3945 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3946 Ptr, Val, MMO, 3947 Ordering, SynchScope); 3948 CSEMap.InsertNode(N, IP); 3949 AllNodes.push_back(N); 3950 return SDValue(N, 0); 3951} 3952 3953SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3954 EVT VT, SDValue Chain, 3955 SDValue Ptr, 3956 const Value* PtrVal, 3957 unsigned Alignment, 3958 AtomicOrdering Ordering, 3959 SynchronizationScope SynchScope) { 3960 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3961 Alignment = getEVTAlignment(MemVT); 3962 3963 MachineFunction &MF = getMachineFunction(); 3964 // A monotonic load does not store; an acquire load "stores" in the sense 3965 // that other loads cannot be hoisted past it. 3966 unsigned Flags = MachineMemOperand::MOLoad; 3967 if (Ordering > Monotonic) 3968 Flags |= MachineMemOperand::MOStore; 3969 3970 // For now, atomics are considered to be volatile always. 3971 // FIXME: Volatile isn't really correct; we should keep track of atomic 3972 // orderings in the memoperand. 3973 Flags |= MachineMemOperand::MOVolatile; 3974 3975 MachineMemOperand *MMO = 3976 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 3977 MemVT.getStoreSize(), Alignment); 3978 3979 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO, 3980 Ordering, SynchScope); 3981} 3982 3983SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3984 EVT VT, SDValue Chain, 3985 SDValue Ptr, 3986 MachineMemOperand *MMO, 3987 AtomicOrdering Ordering, 3988 SynchronizationScope SynchScope) { 3989 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op"); 3990 3991 SDVTList VTs = getVTList(VT, MVT::Other); 3992 FoldingSetNodeID ID; 3993 ID.AddInteger(MemVT.getRawBits()); 3994 SDValue Ops[] = {Chain, Ptr}; 3995 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3996 void* IP = 0; 3997 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3998 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3999 return SDValue(E, 0); 4000 } 4001 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4002 Ptr, MMO, Ordering, SynchScope); 4003 CSEMap.InsertNode(N, IP); 4004 AllNodes.push_back(N); 4005 return SDValue(N, 0); 4006} 4007 4008/// getMergeValues - Create a MERGE_VALUES node from the given operands. 4009SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 4010 DebugLoc dl) { 4011 if (NumOps == 1) 4012 return Ops[0]; 4013 4014 SmallVector<EVT, 4> VTs; 4015 VTs.reserve(NumOps); 4016 for (unsigned i = 0; i < NumOps; ++i) 4017 VTs.push_back(Ops[i].getValueType()); 4018 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 4019 Ops, NumOps); 4020} 4021 4022SDValue 4023SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 4024 const EVT *VTs, unsigned NumVTs, 4025 const SDValue *Ops, unsigned NumOps, 4026 EVT MemVT, MachinePointerInfo PtrInfo, 4027 unsigned Align, bool Vol, 4028 bool ReadMem, bool WriteMem) { 4029 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 4030 MemVT, PtrInfo, Align, Vol, 4031 ReadMem, WriteMem); 4032} 4033 4034SDValue 4035SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4036 const SDValue *Ops, unsigned NumOps, 4037 EVT MemVT, MachinePointerInfo PtrInfo, 4038 unsigned Align, bool Vol, 4039 bool ReadMem, bool WriteMem) { 4040 if (Align == 0) // Ensure that codegen never sees alignment 0 4041 Align = getEVTAlignment(MemVT); 4042 4043 MachineFunction &MF = getMachineFunction(); 4044 unsigned Flags = 0; 4045 if (WriteMem) 4046 Flags |= MachineMemOperand::MOStore; 4047 if (ReadMem) 4048 Flags |= MachineMemOperand::MOLoad; 4049 if (Vol) 4050 Flags |= MachineMemOperand::MOVolatile; 4051 MachineMemOperand *MMO = 4052 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 4053 4054 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 4055} 4056 4057SDValue 4058SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4059 const SDValue *Ops, unsigned NumOps, 4060 EVT MemVT, MachineMemOperand *MMO) { 4061 assert((Opcode == ISD::INTRINSIC_VOID || 4062 Opcode == ISD::INTRINSIC_W_CHAIN || 4063 Opcode == ISD::PREFETCH || 4064 (Opcode <= INT_MAX && 4065 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 4066 "Opcode is not a memory-accessing opcode!"); 4067 4068 // Memoize the node unless it returns a flag. 4069 MemIntrinsicSDNode *N; 4070 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4071 FoldingSetNodeID ID; 4072 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4073 void *IP = 0; 4074 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4075 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 4076 return SDValue(E, 0); 4077 } 4078 4079 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4080 MemVT, MMO); 4081 CSEMap.InsertNode(N, IP); 4082 } else { 4083 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4084 MemVT, MMO); 4085 } 4086 AllNodes.push_back(N); 4087 return SDValue(N, 0); 4088} 4089 4090/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4091/// MachinePointerInfo record from it. This is particularly useful because the 4092/// code generator has many cases where it doesn't bother passing in a 4093/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4094static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 4095 // If this is FI+Offset, we can model it. 4096 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 4097 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 4098 4099 // If this is (FI+Offset1)+Offset2, we can model it. 4100 if (Ptr.getOpcode() != ISD::ADD || 4101 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 4102 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 4103 return MachinePointerInfo(); 4104 4105 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 4106 return MachinePointerInfo::getFixedStack(FI, Offset+ 4107 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 4108} 4109 4110/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4111/// MachinePointerInfo record from it. This is particularly useful because the 4112/// code generator has many cases where it doesn't bother passing in a 4113/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4114static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 4115 // If the 'Offset' value isn't a constant, we can't handle this. 4116 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 4117 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 4118 if (OffsetOp.getOpcode() == ISD::UNDEF) 4119 return InferPointerInfo(Ptr); 4120 return MachinePointerInfo(); 4121} 4122 4123 4124SDValue 4125SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4126 EVT VT, DebugLoc dl, SDValue Chain, 4127 SDValue Ptr, SDValue Offset, 4128 MachinePointerInfo PtrInfo, EVT MemVT, 4129 bool isVolatile, bool isNonTemporal, bool isInvariant, 4130 unsigned Alignment, const MDNode *TBAAInfo, 4131 const MDNode *Ranges) { 4132 assert(Chain.getValueType() == MVT::Other && 4133 "Invalid chain type"); 4134 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4135 Alignment = getEVTAlignment(VT); 4136 4137 unsigned Flags = MachineMemOperand::MOLoad; 4138 if (isVolatile) 4139 Flags |= MachineMemOperand::MOVolatile; 4140 if (isNonTemporal) 4141 Flags |= MachineMemOperand::MONonTemporal; 4142 if (isInvariant) 4143 Flags |= MachineMemOperand::MOInvariant; 4144 4145 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4146 // clients. 4147 if (PtrInfo.V == 0) 4148 PtrInfo = InferPointerInfo(Ptr, Offset); 4149 4150 MachineFunction &MF = getMachineFunction(); 4151 MachineMemOperand *MMO = 4152 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4153 TBAAInfo, Ranges); 4154 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4155} 4156 4157SDValue 4158SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4159 EVT VT, DebugLoc dl, SDValue Chain, 4160 SDValue Ptr, SDValue Offset, EVT MemVT, 4161 MachineMemOperand *MMO) { 4162 if (VT == MemVT) { 4163 ExtType = ISD::NON_EXTLOAD; 4164 } else if (ExtType == ISD::NON_EXTLOAD) { 4165 assert(VT == MemVT && "Non-extending load from different memory type!"); 4166 } else { 4167 // Extending load. 4168 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4169 "Should only be an extending load, not truncating!"); 4170 assert(VT.isInteger() == MemVT.isInteger() && 4171 "Cannot convert from FP to Int or Int -> FP!"); 4172 assert(VT.isVector() == MemVT.isVector() && 4173 "Cannot use trunc store to convert to or from a vector!"); 4174 assert((!VT.isVector() || 4175 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4176 "Cannot use trunc store to change the number of vector elements!"); 4177 } 4178 4179 bool Indexed = AM != ISD::UNINDEXED; 4180 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4181 "Unindexed load with an offset!"); 4182 4183 SDVTList VTs = Indexed ? 4184 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4185 SDValue Ops[] = { Chain, Ptr, Offset }; 4186 FoldingSetNodeID ID; 4187 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4188 ID.AddInteger(MemVT.getRawBits()); 4189 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4190 MMO->isNonTemporal(), 4191 MMO->isInvariant())); 4192 void *IP = 0; 4193 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4194 cast<LoadSDNode>(E)->refineAlignment(MMO); 4195 return SDValue(E, 0); 4196 } 4197 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 4198 MemVT, MMO); 4199 CSEMap.InsertNode(N, IP); 4200 AllNodes.push_back(N); 4201 return SDValue(N, 0); 4202} 4203 4204SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 4205 SDValue Chain, SDValue Ptr, 4206 MachinePointerInfo PtrInfo, 4207 bool isVolatile, bool isNonTemporal, 4208 bool isInvariant, unsigned Alignment, 4209 const MDNode *TBAAInfo, 4210 const MDNode *Ranges) { 4211 SDValue Undef = getUNDEF(Ptr.getValueType()); 4212 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4213 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment, 4214 TBAAInfo, Ranges); 4215} 4216 4217SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 4218 SDValue Chain, SDValue Ptr, 4219 MachinePointerInfo PtrInfo, EVT MemVT, 4220 bool isVolatile, bool isNonTemporal, 4221 unsigned Alignment, const MDNode *TBAAInfo) { 4222 SDValue Undef = getUNDEF(Ptr.getValueType()); 4223 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4224 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment, 4225 TBAAInfo); 4226} 4227 4228 4229SDValue 4230SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 4231 SDValue Offset, ISD::MemIndexedMode AM) { 4232 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4233 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4234 "Load is already a indexed load!"); 4235 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4236 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4237 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(), 4238 false, LD->getAlignment()); 4239} 4240 4241SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4242 SDValue Ptr, MachinePointerInfo PtrInfo, 4243 bool isVolatile, bool isNonTemporal, 4244 unsigned Alignment, const MDNode *TBAAInfo) { 4245 assert(Chain.getValueType() == MVT::Other && 4246 "Invalid chain type"); 4247 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4248 Alignment = getEVTAlignment(Val.getValueType()); 4249 4250 unsigned Flags = MachineMemOperand::MOStore; 4251 if (isVolatile) 4252 Flags |= MachineMemOperand::MOVolatile; 4253 if (isNonTemporal) 4254 Flags |= MachineMemOperand::MONonTemporal; 4255 4256 if (PtrInfo.V == 0) 4257 PtrInfo = InferPointerInfo(Ptr); 4258 4259 MachineFunction &MF = getMachineFunction(); 4260 MachineMemOperand *MMO = 4261 MF.getMachineMemOperand(PtrInfo, Flags, 4262 Val.getValueType().getStoreSize(), Alignment, 4263 TBAAInfo); 4264 4265 return getStore(Chain, dl, Val, Ptr, MMO); 4266} 4267 4268SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4269 SDValue Ptr, MachineMemOperand *MMO) { 4270 assert(Chain.getValueType() == MVT::Other && 4271 "Invalid chain type"); 4272 EVT VT = Val.getValueType(); 4273 SDVTList VTs = getVTList(MVT::Other); 4274 SDValue Undef = getUNDEF(Ptr.getValueType()); 4275 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4276 FoldingSetNodeID ID; 4277 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4278 ID.AddInteger(VT.getRawBits()); 4279 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4280 MMO->isNonTemporal(), MMO->isInvariant())); 4281 void *IP = 0; 4282 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4283 cast<StoreSDNode>(E)->refineAlignment(MMO); 4284 return SDValue(E, 0); 4285 } 4286 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4287 false, VT, MMO); 4288 CSEMap.InsertNode(N, IP); 4289 AllNodes.push_back(N); 4290 return SDValue(N, 0); 4291} 4292 4293SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4294 SDValue Ptr, MachinePointerInfo PtrInfo, 4295 EVT SVT,bool isVolatile, bool isNonTemporal, 4296 unsigned Alignment, 4297 const MDNode *TBAAInfo) { 4298 assert(Chain.getValueType() == MVT::Other && 4299 "Invalid chain type"); 4300 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4301 Alignment = getEVTAlignment(SVT); 4302 4303 unsigned Flags = MachineMemOperand::MOStore; 4304 if (isVolatile) 4305 Flags |= MachineMemOperand::MOVolatile; 4306 if (isNonTemporal) 4307 Flags |= MachineMemOperand::MONonTemporal; 4308 4309 if (PtrInfo.V == 0) 4310 PtrInfo = InferPointerInfo(Ptr); 4311 4312 MachineFunction &MF = getMachineFunction(); 4313 MachineMemOperand *MMO = 4314 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4315 TBAAInfo); 4316 4317 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4318} 4319 4320SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4321 SDValue Ptr, EVT SVT, 4322 MachineMemOperand *MMO) { 4323 EVT VT = Val.getValueType(); 4324 4325 assert(Chain.getValueType() == MVT::Other && 4326 "Invalid chain type"); 4327 if (VT == SVT) 4328 return getStore(Chain, dl, Val, Ptr, MMO); 4329 4330 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4331 "Should only be a truncating store, not extending!"); 4332 assert(VT.isInteger() == SVT.isInteger() && 4333 "Can't do FP-INT conversion!"); 4334 assert(VT.isVector() == SVT.isVector() && 4335 "Cannot use trunc store to convert to or from a vector!"); 4336 assert((!VT.isVector() || 4337 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4338 "Cannot use trunc store to change the number of vector elements!"); 4339 4340 SDVTList VTs = getVTList(MVT::Other); 4341 SDValue Undef = getUNDEF(Ptr.getValueType()); 4342 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4343 FoldingSetNodeID ID; 4344 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4345 ID.AddInteger(SVT.getRawBits()); 4346 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4347 MMO->isNonTemporal(), MMO->isInvariant())); 4348 void *IP = 0; 4349 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4350 cast<StoreSDNode>(E)->refineAlignment(MMO); 4351 return SDValue(E, 0); 4352 } 4353 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4354 true, SVT, MMO); 4355 CSEMap.InsertNode(N, IP); 4356 AllNodes.push_back(N); 4357 return SDValue(N, 0); 4358} 4359 4360SDValue 4361SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4362 SDValue Offset, ISD::MemIndexedMode AM) { 4363 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4364 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4365 "Store is already a indexed store!"); 4366 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4367 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4368 FoldingSetNodeID ID; 4369 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4370 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4371 ID.AddInteger(ST->getRawSubclassData()); 4372 void *IP = 0; 4373 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4374 return SDValue(E, 0); 4375 4376 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4377 ST->isTruncatingStore(), 4378 ST->getMemoryVT(), 4379 ST->getMemOperand()); 4380 CSEMap.InsertNode(N, IP); 4381 AllNodes.push_back(N); 4382 return SDValue(N, 0); 4383} 4384 4385SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4386 SDValue Chain, SDValue Ptr, 4387 SDValue SV, 4388 unsigned Align) { 4389 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4390 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4391} 4392 4393SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4394 const SDUse *Ops, unsigned NumOps) { 4395 switch (NumOps) { 4396 case 0: return getNode(Opcode, DL, VT); 4397 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4398 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4399 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4400 default: break; 4401 } 4402 4403 // Copy from an SDUse array into an SDValue array for use with 4404 // the regular getNode logic. 4405 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4406 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4407} 4408 4409SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4410 const SDValue *Ops, unsigned NumOps) { 4411 switch (NumOps) { 4412 case 0: return getNode(Opcode, DL, VT); 4413 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4414 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4415 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4416 default: break; 4417 } 4418 4419 switch (Opcode) { 4420 default: break; 4421 case ISD::SELECT_CC: { 4422 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4423 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4424 "LHS and RHS of condition must have same type!"); 4425 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4426 "True and False arms of SelectCC must have same type!"); 4427 assert(Ops[2].getValueType() == VT && 4428 "select_cc node must be of same type as true and false value!"); 4429 break; 4430 } 4431 case ISD::BR_CC: { 4432 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4433 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4434 "LHS/RHS of comparison should match types!"); 4435 break; 4436 } 4437 } 4438 4439 // Memoize nodes. 4440 SDNode *N; 4441 SDVTList VTs = getVTList(VT); 4442 4443 if (VT != MVT::Glue) { 4444 FoldingSetNodeID ID; 4445 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4446 void *IP = 0; 4447 4448 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4449 return SDValue(E, 0); 4450 4451 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4452 CSEMap.InsertNode(N, IP); 4453 } else { 4454 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4455 } 4456 4457 AllNodes.push_back(N); 4458#ifndef NDEBUG 4459 VerifySDNode(N); 4460#endif 4461 return SDValue(N, 0); 4462} 4463 4464SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4465 const std::vector<EVT> &ResultTys, 4466 const SDValue *Ops, unsigned NumOps) { 4467 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4468 Ops, NumOps); 4469} 4470 4471SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4472 const EVT *VTs, unsigned NumVTs, 4473 const SDValue *Ops, unsigned NumOps) { 4474 if (NumVTs == 1) 4475 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4476 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4477} 4478 4479SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4480 const SDValue *Ops, unsigned NumOps) { 4481 if (VTList.NumVTs == 1) 4482 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4483 4484#if 0 4485 switch (Opcode) { 4486 // FIXME: figure out how to safely handle things like 4487 // int foo(int x) { return 1 << (x & 255); } 4488 // int bar() { return foo(256); } 4489 case ISD::SRA_PARTS: 4490 case ISD::SRL_PARTS: 4491 case ISD::SHL_PARTS: 4492 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4493 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4494 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4495 else if (N3.getOpcode() == ISD::AND) 4496 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4497 // If the and is only masking out bits that cannot effect the shift, 4498 // eliminate the and. 4499 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4500 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4501 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4502 } 4503 break; 4504 } 4505#endif 4506 4507 // Memoize the node unless it returns a flag. 4508 SDNode *N; 4509 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4510 FoldingSetNodeID ID; 4511 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4512 void *IP = 0; 4513 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4514 return SDValue(E, 0); 4515 4516 if (NumOps == 1) { 4517 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4518 } else if (NumOps == 2) { 4519 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4520 } else if (NumOps == 3) { 4521 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4522 Ops[2]); 4523 } else { 4524 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4525 } 4526 CSEMap.InsertNode(N, IP); 4527 } else { 4528 if (NumOps == 1) { 4529 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4530 } else if (NumOps == 2) { 4531 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4532 } else if (NumOps == 3) { 4533 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4534 Ops[2]); 4535 } else { 4536 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4537 } 4538 } 4539 AllNodes.push_back(N); 4540#ifndef NDEBUG 4541 VerifySDNode(N); 4542#endif 4543 return SDValue(N, 0); 4544} 4545 4546SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4547 return getNode(Opcode, DL, VTList, 0, 0); 4548} 4549 4550SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4551 SDValue N1) { 4552 SDValue Ops[] = { N1 }; 4553 return getNode(Opcode, DL, VTList, Ops, 1); 4554} 4555 4556SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4557 SDValue N1, SDValue N2) { 4558 SDValue Ops[] = { N1, N2 }; 4559 return getNode(Opcode, DL, VTList, Ops, 2); 4560} 4561 4562SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4563 SDValue N1, SDValue N2, SDValue N3) { 4564 SDValue Ops[] = { N1, N2, N3 }; 4565 return getNode(Opcode, DL, VTList, Ops, 3); 4566} 4567 4568SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4569 SDValue N1, SDValue N2, SDValue N3, 4570 SDValue N4) { 4571 SDValue Ops[] = { N1, N2, N3, N4 }; 4572 return getNode(Opcode, DL, VTList, Ops, 4); 4573} 4574 4575SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4576 SDValue N1, SDValue N2, SDValue N3, 4577 SDValue N4, SDValue N5) { 4578 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4579 return getNode(Opcode, DL, VTList, Ops, 5); 4580} 4581 4582SDVTList SelectionDAG::getVTList(EVT VT) { 4583 return makeVTList(SDNode::getValueTypeList(VT), 1); 4584} 4585 4586SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4587 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4588 E = VTList.rend(); I != E; ++I) 4589 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4590 return *I; 4591 4592 EVT *Array = Allocator.Allocate<EVT>(2); 4593 Array[0] = VT1; 4594 Array[1] = VT2; 4595 SDVTList Result = makeVTList(Array, 2); 4596 VTList.push_back(Result); 4597 return Result; 4598} 4599 4600SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4601 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4602 E = VTList.rend(); I != E; ++I) 4603 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4604 I->VTs[2] == VT3) 4605 return *I; 4606 4607 EVT *Array = Allocator.Allocate<EVT>(3); 4608 Array[0] = VT1; 4609 Array[1] = VT2; 4610 Array[2] = VT3; 4611 SDVTList Result = makeVTList(Array, 3); 4612 VTList.push_back(Result); 4613 return Result; 4614} 4615 4616SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4617 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4618 E = VTList.rend(); I != E; ++I) 4619 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4620 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4621 return *I; 4622 4623 EVT *Array = Allocator.Allocate<EVT>(4); 4624 Array[0] = VT1; 4625 Array[1] = VT2; 4626 Array[2] = VT3; 4627 Array[3] = VT4; 4628 SDVTList Result = makeVTList(Array, 4); 4629 VTList.push_back(Result); 4630 return Result; 4631} 4632 4633SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4634 switch (NumVTs) { 4635 case 0: llvm_unreachable("Cannot have nodes without results!"); 4636 case 1: return getVTList(VTs[0]); 4637 case 2: return getVTList(VTs[0], VTs[1]); 4638 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4639 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4640 default: break; 4641 } 4642 4643 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4644 E = VTList.rend(); I != E; ++I) { 4645 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4646 continue; 4647 4648 bool NoMatch = false; 4649 for (unsigned i = 2; i != NumVTs; ++i) 4650 if (VTs[i] != I->VTs[i]) { 4651 NoMatch = true; 4652 break; 4653 } 4654 if (!NoMatch) 4655 return *I; 4656 } 4657 4658 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4659 std::copy(VTs, VTs+NumVTs, Array); 4660 SDVTList Result = makeVTList(Array, NumVTs); 4661 VTList.push_back(Result); 4662 return Result; 4663} 4664 4665 4666/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4667/// specified operands. If the resultant node already exists in the DAG, 4668/// this does not modify the specified node, instead it returns the node that 4669/// already exists. If the resultant node does not exist in the DAG, the 4670/// input node is returned. As a degenerate case, if you specify the same 4671/// input operands as the node already has, the input node is returned. 4672SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4673 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4674 4675 // Check to see if there is no change. 4676 if (Op == N->getOperand(0)) return N; 4677 4678 // See if the modified node already exists. 4679 void *InsertPos = 0; 4680 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4681 return Existing; 4682 4683 // Nope it doesn't. Remove the node from its current place in the maps. 4684 if (InsertPos) 4685 if (!RemoveNodeFromCSEMaps(N)) 4686 InsertPos = 0; 4687 4688 // Now we update the operands. 4689 N->OperandList[0].set(Op); 4690 4691 // If this gets put into a CSE map, add it. 4692 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4693 return N; 4694} 4695 4696SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4697 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4698 4699 // Check to see if there is no change. 4700 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4701 return N; // No operands changed, just return the input node. 4702 4703 // See if the modified node already exists. 4704 void *InsertPos = 0; 4705 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4706 return Existing; 4707 4708 // Nope it doesn't. Remove the node from its current place in the maps. 4709 if (InsertPos) 4710 if (!RemoveNodeFromCSEMaps(N)) 4711 InsertPos = 0; 4712 4713 // Now we update the operands. 4714 if (N->OperandList[0] != Op1) 4715 N->OperandList[0].set(Op1); 4716 if (N->OperandList[1] != Op2) 4717 N->OperandList[1].set(Op2); 4718 4719 // If this gets put into a CSE map, add it. 4720 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4721 return N; 4722} 4723 4724SDNode *SelectionDAG:: 4725UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4726 SDValue Ops[] = { Op1, Op2, Op3 }; 4727 return UpdateNodeOperands(N, Ops, 3); 4728} 4729 4730SDNode *SelectionDAG:: 4731UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4732 SDValue Op3, SDValue Op4) { 4733 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4734 return UpdateNodeOperands(N, Ops, 4); 4735} 4736 4737SDNode *SelectionDAG:: 4738UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4739 SDValue Op3, SDValue Op4, SDValue Op5) { 4740 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4741 return UpdateNodeOperands(N, Ops, 5); 4742} 4743 4744SDNode *SelectionDAG:: 4745UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4746 assert(N->getNumOperands() == NumOps && 4747 "Update with wrong number of operands"); 4748 4749 // Check to see if there is no change. 4750 bool AnyChange = false; 4751 for (unsigned i = 0; i != NumOps; ++i) { 4752 if (Ops[i] != N->getOperand(i)) { 4753 AnyChange = true; 4754 break; 4755 } 4756 } 4757 4758 // No operands changed, just return the input node. 4759 if (!AnyChange) return N; 4760 4761 // See if the modified node already exists. 4762 void *InsertPos = 0; 4763 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4764 return Existing; 4765 4766 // Nope it doesn't. Remove the node from its current place in the maps. 4767 if (InsertPos) 4768 if (!RemoveNodeFromCSEMaps(N)) 4769 InsertPos = 0; 4770 4771 // Now we update the operands. 4772 for (unsigned i = 0; i != NumOps; ++i) 4773 if (N->OperandList[i] != Ops[i]) 4774 N->OperandList[i].set(Ops[i]); 4775 4776 // If this gets put into a CSE map, add it. 4777 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4778 return N; 4779} 4780 4781/// DropOperands - Release the operands and set this node to have 4782/// zero operands. 4783void SDNode::DropOperands() { 4784 // Unlike the code in MorphNodeTo that does this, we don't need to 4785 // watch for dead nodes here. 4786 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4787 SDUse &Use = *I++; 4788 Use.set(SDValue()); 4789 } 4790} 4791 4792/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4793/// machine opcode. 4794/// 4795SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4796 EVT VT) { 4797 SDVTList VTs = getVTList(VT); 4798 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4799} 4800 4801SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4802 EVT VT, SDValue Op1) { 4803 SDVTList VTs = getVTList(VT); 4804 SDValue Ops[] = { Op1 }; 4805 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4806} 4807 4808SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4809 EVT VT, SDValue Op1, 4810 SDValue Op2) { 4811 SDVTList VTs = getVTList(VT); 4812 SDValue Ops[] = { Op1, Op2 }; 4813 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4814} 4815 4816SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4817 EVT VT, SDValue Op1, 4818 SDValue Op2, SDValue Op3) { 4819 SDVTList VTs = getVTList(VT); 4820 SDValue Ops[] = { Op1, Op2, Op3 }; 4821 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4822} 4823 4824SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4825 EVT VT, const SDValue *Ops, 4826 unsigned NumOps) { 4827 SDVTList VTs = getVTList(VT); 4828 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4829} 4830 4831SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4832 EVT VT1, EVT VT2, const SDValue *Ops, 4833 unsigned NumOps) { 4834 SDVTList VTs = getVTList(VT1, VT2); 4835 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4836} 4837 4838SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4839 EVT VT1, EVT VT2) { 4840 SDVTList VTs = getVTList(VT1, VT2); 4841 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4842} 4843 4844SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4845 EVT VT1, EVT VT2, EVT VT3, 4846 const SDValue *Ops, unsigned NumOps) { 4847 SDVTList VTs = getVTList(VT1, VT2, VT3); 4848 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4849} 4850 4851SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4852 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4853 const SDValue *Ops, unsigned NumOps) { 4854 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4855 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4856} 4857 4858SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4859 EVT VT1, EVT VT2, 4860 SDValue Op1) { 4861 SDVTList VTs = getVTList(VT1, VT2); 4862 SDValue Ops[] = { Op1 }; 4863 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4864} 4865 4866SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4867 EVT VT1, EVT VT2, 4868 SDValue Op1, SDValue Op2) { 4869 SDVTList VTs = getVTList(VT1, VT2); 4870 SDValue Ops[] = { Op1, Op2 }; 4871 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4872} 4873 4874SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4875 EVT VT1, EVT VT2, 4876 SDValue Op1, SDValue Op2, 4877 SDValue Op3) { 4878 SDVTList VTs = getVTList(VT1, VT2); 4879 SDValue Ops[] = { Op1, Op2, Op3 }; 4880 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4881} 4882 4883SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4884 EVT VT1, EVT VT2, EVT VT3, 4885 SDValue Op1, SDValue Op2, 4886 SDValue Op3) { 4887 SDVTList VTs = getVTList(VT1, VT2, VT3); 4888 SDValue Ops[] = { Op1, Op2, Op3 }; 4889 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4890} 4891 4892SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4893 SDVTList VTs, const SDValue *Ops, 4894 unsigned NumOps) { 4895 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4896 // Reset the NodeID to -1. 4897 N->setNodeId(-1); 4898 return N; 4899} 4900 4901/// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away 4902/// the line number information on the merged node since it is not possible to 4903/// preserve the information that operation is associated with multiple lines. 4904/// This will make the debugger working better at -O0, were there is a higher 4905/// probability having other instructions associated with that line. 4906/// 4907SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) { 4908 DebugLoc NLoc = N->getDebugLoc(); 4909 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) { 4910 N->setDebugLoc(DebugLoc()); 4911 } 4912 return N; 4913} 4914 4915/// MorphNodeTo - This *mutates* the specified node to have the specified 4916/// return type, opcode, and operands. 4917/// 4918/// Note that MorphNodeTo returns the resultant node. If there is already a 4919/// node of the specified opcode and operands, it returns that node instead of 4920/// the current one. Note that the DebugLoc need not be the same. 4921/// 4922/// Using MorphNodeTo is faster than creating a new node and swapping it in 4923/// with ReplaceAllUsesWith both because it often avoids allocating a new 4924/// node, and because it doesn't require CSE recalculation for any of 4925/// the node's users. 4926/// 4927SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4928 SDVTList VTs, const SDValue *Ops, 4929 unsigned NumOps) { 4930 // If an identical node already exists, use it. 4931 void *IP = 0; 4932 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 4933 FoldingSetNodeID ID; 4934 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4935 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4936 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc()); 4937 } 4938 4939 if (!RemoveNodeFromCSEMaps(N)) 4940 IP = 0; 4941 4942 // Start the morphing. 4943 N->NodeType = Opc; 4944 N->ValueList = VTs.VTs; 4945 N->NumValues = VTs.NumVTs; 4946 4947 // Clear the operands list, updating used nodes to remove this from their 4948 // use list. Keep track of any operands that become dead as a result. 4949 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4950 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4951 SDUse &Use = *I++; 4952 SDNode *Used = Use.getNode(); 4953 Use.set(SDValue()); 4954 if (Used->use_empty()) 4955 DeadNodeSet.insert(Used); 4956 } 4957 4958 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4959 // Initialize the memory references information. 4960 MN->setMemRefs(0, 0); 4961 // If NumOps is larger than the # of operands we can have in a 4962 // MachineSDNode, reallocate the operand list. 4963 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4964 if (MN->OperandsNeedDelete) 4965 delete[] MN->OperandList; 4966 if (NumOps > array_lengthof(MN->LocalOperands)) 4967 // We're creating a final node that will live unmorphed for the 4968 // remainder of the current SelectionDAG iteration, so we can allocate 4969 // the operands directly out of a pool with no recycling metadata. 4970 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4971 Ops, NumOps); 4972 else 4973 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4974 MN->OperandsNeedDelete = false; 4975 } else 4976 MN->InitOperands(MN->OperandList, Ops, NumOps); 4977 } else { 4978 // If NumOps is larger than the # of operands we currently have, reallocate 4979 // the operand list. 4980 if (NumOps > N->NumOperands) { 4981 if (N->OperandsNeedDelete) 4982 delete[] N->OperandList; 4983 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4984 N->OperandsNeedDelete = true; 4985 } else 4986 N->InitOperands(N->OperandList, Ops, NumOps); 4987 } 4988 4989 // Delete any nodes that are still dead after adding the uses for the 4990 // new operands. 4991 if (!DeadNodeSet.empty()) { 4992 SmallVector<SDNode *, 16> DeadNodes; 4993 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4994 E = DeadNodeSet.end(); I != E; ++I) 4995 if ((*I)->use_empty()) 4996 DeadNodes.push_back(*I); 4997 RemoveDeadNodes(DeadNodes); 4998 } 4999 5000 if (IP) 5001 CSEMap.InsertNode(N, IP); // Memoize the new node. 5002 return N; 5003} 5004 5005 5006/// getMachineNode - These are used for target selectors to create a new node 5007/// with specified return type(s), MachineInstr opcode, and operands. 5008/// 5009/// Note that getMachineNode returns the resultant node. If there is already a 5010/// node of the specified opcode and operands, it returns that node instead of 5011/// the current one. 5012MachineSDNode * 5013SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 5014 SDVTList VTs = getVTList(VT); 5015 return getMachineNode(Opcode, dl, VTs, 0, 0); 5016} 5017 5018MachineSDNode * 5019SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 5020 SDVTList VTs = getVTList(VT); 5021 SDValue Ops[] = { Op1 }; 5022 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5023} 5024 5025MachineSDNode * 5026SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5027 SDValue Op1, SDValue Op2) { 5028 SDVTList VTs = getVTList(VT); 5029 SDValue Ops[] = { Op1, Op2 }; 5030 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5031} 5032 5033MachineSDNode * 5034SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5035 SDValue Op1, SDValue Op2, SDValue Op3) { 5036 SDVTList VTs = getVTList(VT); 5037 SDValue Ops[] = { Op1, Op2, Op3 }; 5038 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5039} 5040 5041MachineSDNode * 5042SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5043 const SDValue *Ops, unsigned NumOps) { 5044 SDVTList VTs = getVTList(VT); 5045 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5046} 5047 5048MachineSDNode * 5049SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 5050 SDVTList VTs = getVTList(VT1, VT2); 5051 return getMachineNode(Opcode, dl, VTs, 0, 0); 5052} 5053 5054MachineSDNode * 5055SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5056 EVT VT1, EVT VT2, SDValue Op1) { 5057 SDVTList VTs = getVTList(VT1, VT2); 5058 SDValue Ops[] = { Op1 }; 5059 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5060} 5061 5062MachineSDNode * 5063SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5064 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 5065 SDVTList VTs = getVTList(VT1, VT2); 5066 SDValue Ops[] = { Op1, Op2 }; 5067 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5068} 5069 5070MachineSDNode * 5071SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5072 EVT VT1, EVT VT2, SDValue Op1, 5073 SDValue Op2, SDValue Op3) { 5074 SDVTList VTs = getVTList(VT1, VT2); 5075 SDValue Ops[] = { Op1, Op2, Op3 }; 5076 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5077} 5078 5079MachineSDNode * 5080SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5081 EVT VT1, EVT VT2, 5082 const SDValue *Ops, unsigned NumOps) { 5083 SDVTList VTs = getVTList(VT1, VT2); 5084 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5085} 5086 5087MachineSDNode * 5088SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5089 EVT VT1, EVT VT2, EVT VT3, 5090 SDValue Op1, SDValue Op2) { 5091 SDVTList VTs = getVTList(VT1, VT2, VT3); 5092 SDValue Ops[] = { Op1, Op2 }; 5093 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5094} 5095 5096MachineSDNode * 5097SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5098 EVT VT1, EVT VT2, EVT VT3, 5099 SDValue Op1, SDValue Op2, SDValue Op3) { 5100 SDVTList VTs = getVTList(VT1, VT2, VT3); 5101 SDValue Ops[] = { Op1, Op2, Op3 }; 5102 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5103} 5104 5105MachineSDNode * 5106SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5107 EVT VT1, EVT VT2, EVT VT3, 5108 const SDValue *Ops, unsigned NumOps) { 5109 SDVTList VTs = getVTList(VT1, VT2, VT3); 5110 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5111} 5112 5113MachineSDNode * 5114SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 5115 EVT VT2, EVT VT3, EVT VT4, 5116 const SDValue *Ops, unsigned NumOps) { 5117 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5118 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5119} 5120 5121MachineSDNode * 5122SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5123 const std::vector<EVT> &ResultTys, 5124 const SDValue *Ops, unsigned NumOps) { 5125 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 5126 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5127} 5128 5129MachineSDNode * 5130SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 5131 const SDValue *Ops, unsigned NumOps) { 5132 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 5133 MachineSDNode *N; 5134 void *IP = 0; 5135 5136 if (DoCSE) { 5137 FoldingSetNodeID ID; 5138 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 5139 IP = 0; 5140 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 5141 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL)); 5142 } 5143 } 5144 5145 // Allocate a new MachineSDNode. 5146 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 5147 5148 // Initialize the operands list. 5149 if (NumOps > array_lengthof(N->LocalOperands)) 5150 // We're creating a final node that will live unmorphed for the 5151 // remainder of the current SelectionDAG iteration, so we can allocate 5152 // the operands directly out of a pool with no recycling metadata. 5153 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5154 Ops, NumOps); 5155 else 5156 N->InitOperands(N->LocalOperands, Ops, NumOps); 5157 N->OperandsNeedDelete = false; 5158 5159 if (DoCSE) 5160 CSEMap.InsertNode(N, IP); 5161 5162 AllNodes.push_back(N); 5163#ifndef NDEBUG 5164 VerifyMachineNode(N); 5165#endif 5166 return N; 5167} 5168 5169/// getTargetExtractSubreg - A convenience function for creating 5170/// TargetOpcode::EXTRACT_SUBREG nodes. 5171SDValue 5172SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 5173 SDValue Operand) { 5174 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5175 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5176 VT, Operand, SRIdxVal); 5177 return SDValue(Subreg, 0); 5178} 5179 5180/// getTargetInsertSubreg - A convenience function for creating 5181/// TargetOpcode::INSERT_SUBREG nodes. 5182SDValue 5183SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 5184 SDValue Operand, SDValue Subreg) { 5185 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5186 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5187 VT, Operand, Subreg, SRIdxVal); 5188 return SDValue(Result, 0); 5189} 5190 5191/// getNodeIfExists - Get the specified node if it's already available, or 5192/// else return NULL. 5193SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5194 const SDValue *Ops, unsigned NumOps) { 5195 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5196 FoldingSetNodeID ID; 5197 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5198 void *IP = 0; 5199 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5200 return E; 5201 } 5202 return NULL; 5203} 5204 5205/// getDbgValue - Creates a SDDbgValue node. 5206/// 5207SDDbgValue * 5208SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5209 DebugLoc DL, unsigned O) { 5210 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5211} 5212 5213SDDbgValue * 5214SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5215 DebugLoc DL, unsigned O) { 5216 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5217} 5218 5219SDDbgValue * 5220SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5221 DebugLoc DL, unsigned O) { 5222 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5223} 5224 5225namespace { 5226 5227/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5228/// pointed to by a use iterator is deleted, increment the use iterator 5229/// so that it doesn't dangle. 5230/// 5231/// This class also manages a "downlink" DAGUpdateListener, to forward 5232/// messages to ReplaceAllUsesWith's callers. 5233/// 5234class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5235 SelectionDAG::DAGUpdateListener *DownLink; 5236 SDNode::use_iterator &UI; 5237 SDNode::use_iterator &UE; 5238 5239 virtual void NodeDeleted(SDNode *N, SDNode *E) { 5240 // Increment the iterator as needed. 5241 while (UI != UE && N == *UI) 5242 ++UI; 5243 5244 // Then forward the message. 5245 if (DownLink) DownLink->NodeDeleted(N, E); 5246 } 5247 5248 virtual void NodeUpdated(SDNode *N) { 5249 // Just forward the message. 5250 if (DownLink) DownLink->NodeUpdated(N); 5251 } 5252 5253public: 5254 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 5255 SDNode::use_iterator &ui, 5256 SDNode::use_iterator &ue) 5257 : DownLink(dl), UI(ui), UE(ue) {} 5258}; 5259 5260} 5261 5262/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5263/// This can cause recursive merging of nodes in the DAG. 5264/// 5265/// This version assumes From has a single result value. 5266/// 5267void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 5268 DAGUpdateListener *UpdateListener) { 5269 SDNode *From = FromN.getNode(); 5270 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5271 "Cannot replace with this method!"); 5272 assert(From != To.getNode() && "Cannot replace uses of with self"); 5273 5274 // Iterate over all the existing uses of From. New uses will be added 5275 // to the beginning of the use list, which we avoid visiting. 5276 // This specifically avoids visiting uses of From that arise while the 5277 // replacement is happening, because any such uses would be the result 5278 // of CSE: If an existing node looks like From after one of its operands 5279 // is replaced by To, we don't want to replace of all its users with To 5280 // too. See PR3018 for more info. 5281 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5282 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5283 while (UI != UE) { 5284 SDNode *User = *UI; 5285 5286 // This node is about to morph, remove its old self from the CSE maps. 5287 RemoveNodeFromCSEMaps(User); 5288 5289 // A user can appear in a use list multiple times, and when this 5290 // happens the uses are usually next to each other in the list. 5291 // To help reduce the number of CSE recomputations, process all 5292 // the uses of this user that we can find this way. 5293 do { 5294 SDUse &Use = UI.getUse(); 5295 ++UI; 5296 Use.set(To); 5297 } while (UI != UE && *UI == User); 5298 5299 // Now that we have modified User, add it back to the CSE maps. If it 5300 // already exists there, recursively merge the results together. 5301 AddModifiedNodeToCSEMaps(User, &Listener); 5302 } 5303 5304 // If we just RAUW'd the root, take note. 5305 if (FromN == getRoot()) 5306 setRoot(To); 5307} 5308 5309/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5310/// This can cause recursive merging of nodes in the DAG. 5311/// 5312/// This version assumes that for each value of From, there is a 5313/// corresponding value in To in the same position with the same type. 5314/// 5315void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5316 DAGUpdateListener *UpdateListener) { 5317#ifndef NDEBUG 5318 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5319 assert((!From->hasAnyUseOfValue(i) || 5320 From->getValueType(i) == To->getValueType(i)) && 5321 "Cannot use this version of ReplaceAllUsesWith!"); 5322#endif 5323 5324 // Handle the trivial case. 5325 if (From == To) 5326 return; 5327 5328 // Iterate over just the existing users of From. See the comments in 5329 // the ReplaceAllUsesWith above. 5330 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5331 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5332 while (UI != UE) { 5333 SDNode *User = *UI; 5334 5335 // This node is about to morph, remove its old self from the CSE maps. 5336 RemoveNodeFromCSEMaps(User); 5337 5338 // A user can appear in a use list multiple times, and when this 5339 // happens the uses are usually next to each other in the list. 5340 // To help reduce the number of CSE recomputations, process all 5341 // the uses of this user that we can find this way. 5342 do { 5343 SDUse &Use = UI.getUse(); 5344 ++UI; 5345 Use.setNode(To); 5346 } while (UI != UE && *UI == User); 5347 5348 // Now that we have modified User, add it back to the CSE maps. If it 5349 // already exists there, recursively merge the results together. 5350 AddModifiedNodeToCSEMaps(User, &Listener); 5351 } 5352 5353 // If we just RAUW'd the root, take note. 5354 if (From == getRoot().getNode()) 5355 setRoot(SDValue(To, getRoot().getResNo())); 5356} 5357 5358/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5359/// This can cause recursive merging of nodes in the DAG. 5360/// 5361/// This version can replace From with any result values. To must match the 5362/// number and types of values returned by From. 5363void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5364 const SDValue *To, 5365 DAGUpdateListener *UpdateListener) { 5366 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5367 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5368 5369 // Iterate over just the existing users of From. See the comments in 5370 // the ReplaceAllUsesWith above. 5371 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5372 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5373 while (UI != UE) { 5374 SDNode *User = *UI; 5375 5376 // This node is about to morph, remove its old self from the CSE maps. 5377 RemoveNodeFromCSEMaps(User); 5378 5379 // A user can appear in a use list multiple times, and when this 5380 // happens the uses are usually next to each other in the list. 5381 // To help reduce the number of CSE recomputations, process all 5382 // the uses of this user that we can find this way. 5383 do { 5384 SDUse &Use = UI.getUse(); 5385 const SDValue &ToOp = To[Use.getResNo()]; 5386 ++UI; 5387 Use.set(ToOp); 5388 } while (UI != UE && *UI == User); 5389 5390 // Now that we have modified User, add it back to the CSE maps. If it 5391 // already exists there, recursively merge the results together. 5392 AddModifiedNodeToCSEMaps(User, &Listener); 5393 } 5394 5395 // If we just RAUW'd the root, take note. 5396 if (From == getRoot().getNode()) 5397 setRoot(SDValue(To[getRoot().getResNo()])); 5398} 5399 5400/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5401/// uses of other values produced by From.getNode() alone. The Deleted 5402/// vector is handled the same way as for ReplaceAllUsesWith. 5403void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5404 DAGUpdateListener *UpdateListener){ 5405 // Handle the really simple, really trivial case efficiently. 5406 if (From == To) return; 5407 5408 // Handle the simple, trivial, case efficiently. 5409 if (From.getNode()->getNumValues() == 1) { 5410 ReplaceAllUsesWith(From, To, UpdateListener); 5411 return; 5412 } 5413 5414 // Iterate over just the existing users of From. See the comments in 5415 // the ReplaceAllUsesWith above. 5416 SDNode::use_iterator UI = From.getNode()->use_begin(), 5417 UE = From.getNode()->use_end(); 5418 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5419 while (UI != UE) { 5420 SDNode *User = *UI; 5421 bool UserRemovedFromCSEMaps = false; 5422 5423 // A user can appear in a use list multiple times, and when this 5424 // happens the uses are usually next to each other in the list. 5425 // To help reduce the number of CSE recomputations, process all 5426 // the uses of this user that we can find this way. 5427 do { 5428 SDUse &Use = UI.getUse(); 5429 5430 // Skip uses of different values from the same node. 5431 if (Use.getResNo() != From.getResNo()) { 5432 ++UI; 5433 continue; 5434 } 5435 5436 // If this node hasn't been modified yet, it's still in the CSE maps, 5437 // so remove its old self from the CSE maps. 5438 if (!UserRemovedFromCSEMaps) { 5439 RemoveNodeFromCSEMaps(User); 5440 UserRemovedFromCSEMaps = true; 5441 } 5442 5443 ++UI; 5444 Use.set(To); 5445 } while (UI != UE && *UI == User); 5446 5447 // We are iterating over all uses of the From node, so if a use 5448 // doesn't use the specific value, no changes are made. 5449 if (!UserRemovedFromCSEMaps) 5450 continue; 5451 5452 // Now that we have modified User, add it back to the CSE maps. If it 5453 // already exists there, recursively merge the results together. 5454 AddModifiedNodeToCSEMaps(User, &Listener); 5455 } 5456 5457 // If we just RAUW'd the root, take note. 5458 if (From == getRoot()) 5459 setRoot(To); 5460} 5461 5462namespace { 5463 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5464 /// to record information about a use. 5465 struct UseMemo { 5466 SDNode *User; 5467 unsigned Index; 5468 SDUse *Use; 5469 }; 5470 5471 /// operator< - Sort Memos by User. 5472 bool operator<(const UseMemo &L, const UseMemo &R) { 5473 return (intptr_t)L.User < (intptr_t)R.User; 5474 } 5475} 5476 5477/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5478/// uses of other values produced by From.getNode() alone. The same value 5479/// may appear in both the From and To list. The Deleted vector is 5480/// handled the same way as for ReplaceAllUsesWith. 5481void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5482 const SDValue *To, 5483 unsigned Num, 5484 DAGUpdateListener *UpdateListener){ 5485 // Handle the simple, trivial case efficiently. 5486 if (Num == 1) 5487 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5488 5489 // Read up all the uses and make records of them. This helps 5490 // processing new uses that are introduced during the 5491 // replacement process. 5492 SmallVector<UseMemo, 4> Uses; 5493 for (unsigned i = 0; i != Num; ++i) { 5494 unsigned FromResNo = From[i].getResNo(); 5495 SDNode *FromNode = From[i].getNode(); 5496 for (SDNode::use_iterator UI = FromNode->use_begin(), 5497 E = FromNode->use_end(); UI != E; ++UI) { 5498 SDUse &Use = UI.getUse(); 5499 if (Use.getResNo() == FromResNo) { 5500 UseMemo Memo = { *UI, i, &Use }; 5501 Uses.push_back(Memo); 5502 } 5503 } 5504 } 5505 5506 // Sort the uses, so that all the uses from a given User are together. 5507 std::sort(Uses.begin(), Uses.end()); 5508 5509 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5510 UseIndex != UseIndexEnd; ) { 5511 // We know that this user uses some value of From. If it is the right 5512 // value, update it. 5513 SDNode *User = Uses[UseIndex].User; 5514 5515 // This node is about to morph, remove its old self from the CSE maps. 5516 RemoveNodeFromCSEMaps(User); 5517 5518 // The Uses array is sorted, so all the uses for a given User 5519 // are next to each other in the list. 5520 // To help reduce the number of CSE recomputations, process all 5521 // the uses of this user that we can find this way. 5522 do { 5523 unsigned i = Uses[UseIndex].Index; 5524 SDUse &Use = *Uses[UseIndex].Use; 5525 ++UseIndex; 5526 5527 Use.set(To[i]); 5528 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5529 5530 // Now that we have modified User, add it back to the CSE maps. If it 5531 // already exists there, recursively merge the results together. 5532 AddModifiedNodeToCSEMaps(User, UpdateListener); 5533 } 5534} 5535 5536/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5537/// based on their topological order. It returns the maximum id and a vector 5538/// of the SDNodes* in assigned order by reference. 5539unsigned SelectionDAG::AssignTopologicalOrder() { 5540 5541 unsigned DAGSize = 0; 5542 5543 // SortedPos tracks the progress of the algorithm. Nodes before it are 5544 // sorted, nodes after it are unsorted. When the algorithm completes 5545 // it is at the end of the list. 5546 allnodes_iterator SortedPos = allnodes_begin(); 5547 5548 // Visit all the nodes. Move nodes with no operands to the front of 5549 // the list immediately. Annotate nodes that do have operands with their 5550 // operand count. Before we do this, the Node Id fields of the nodes 5551 // may contain arbitrary values. After, the Node Id fields for nodes 5552 // before SortedPos will contain the topological sort index, and the 5553 // Node Id fields for nodes At SortedPos and after will contain the 5554 // count of outstanding operands. 5555 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5556 SDNode *N = I++; 5557 checkForCycles(N); 5558 unsigned Degree = N->getNumOperands(); 5559 if (Degree == 0) { 5560 // A node with no uses, add it to the result array immediately. 5561 N->setNodeId(DAGSize++); 5562 allnodes_iterator Q = N; 5563 if (Q != SortedPos) 5564 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5565 assert(SortedPos != AllNodes.end() && "Overran node list"); 5566 ++SortedPos; 5567 } else { 5568 // Temporarily use the Node Id as scratch space for the degree count. 5569 N->setNodeId(Degree); 5570 } 5571 } 5572 5573 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5574 // such that by the time the end is reached all nodes will be sorted. 5575 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5576 SDNode *N = I; 5577 checkForCycles(N); 5578 // N is in sorted position, so all its uses have one less operand 5579 // that needs to be sorted. 5580 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5581 UI != UE; ++UI) { 5582 SDNode *P = *UI; 5583 unsigned Degree = P->getNodeId(); 5584 assert(Degree != 0 && "Invalid node degree"); 5585 --Degree; 5586 if (Degree == 0) { 5587 // All of P's operands are sorted, so P may sorted now. 5588 P->setNodeId(DAGSize++); 5589 if (P != SortedPos) 5590 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5591 assert(SortedPos != AllNodes.end() && "Overran node list"); 5592 ++SortedPos; 5593 } else { 5594 // Update P's outstanding operand count. 5595 P->setNodeId(Degree); 5596 } 5597 } 5598 if (I == SortedPos) { 5599#ifndef NDEBUG 5600 SDNode *S = ++I; 5601 dbgs() << "Overran sorted position:\n"; 5602 S->dumprFull(); 5603#endif 5604 llvm_unreachable(0); 5605 } 5606 } 5607 5608 assert(SortedPos == AllNodes.end() && 5609 "Topological sort incomplete!"); 5610 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5611 "First node in topological sort is not the entry token!"); 5612 assert(AllNodes.front().getNodeId() == 0 && 5613 "First node in topological sort has non-zero id!"); 5614 assert(AllNodes.front().getNumOperands() == 0 && 5615 "First node in topological sort has operands!"); 5616 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5617 "Last node in topologic sort has unexpected id!"); 5618 assert(AllNodes.back().use_empty() && 5619 "Last node in topologic sort has users!"); 5620 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5621 return DAGSize; 5622} 5623 5624/// AssignOrdering - Assign an order to the SDNode. 5625void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5626 assert(SD && "Trying to assign an order to a null node!"); 5627 Ordering->add(SD, Order); 5628} 5629 5630/// GetOrdering - Get the order for the SDNode. 5631unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5632 assert(SD && "Trying to get the order of a null node!"); 5633 return Ordering->getOrder(SD); 5634} 5635 5636/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5637/// value is produced by SD. 5638void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5639 DbgInfo->add(DB, SD, isParameter); 5640 if (SD) 5641 SD->setHasDebugValue(true); 5642} 5643 5644/// TransferDbgValues - Transfer SDDbgValues. 5645void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 5646 if (From == To || !From.getNode()->getHasDebugValue()) 5647 return; 5648 SDNode *FromNode = From.getNode(); 5649 SDNode *ToNode = To.getNode(); 5650 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode); 5651 SmallVector<SDDbgValue *, 2> ClonedDVs; 5652 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end(); 5653 I != E; ++I) { 5654 SDDbgValue *Dbg = *I; 5655 if (Dbg->getKind() == SDDbgValue::SDNODE) { 5656 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(), 5657 Dbg->getOffset(), Dbg->getDebugLoc(), 5658 Dbg->getOrder()); 5659 ClonedDVs.push_back(Clone); 5660 } 5661 } 5662 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(), 5663 E = ClonedDVs.end(); I != E; ++I) 5664 AddDbgValue(*I, ToNode, false); 5665} 5666 5667//===----------------------------------------------------------------------===// 5668// SDNode Class 5669//===----------------------------------------------------------------------===// 5670 5671HandleSDNode::~HandleSDNode() { 5672 DropOperands(); 5673} 5674 5675GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL, 5676 const GlobalValue *GA, 5677 EVT VT, int64_t o, unsigned char TF) 5678 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5679 TheGlobal = GA; 5680} 5681 5682MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5683 MachineMemOperand *mmo) 5684 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5685 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5686 MMO->isNonTemporal(), MMO->isInvariant()); 5687 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5688 assert(isNonTemporal() == MMO->isNonTemporal() && 5689 "Non-temporal encoding error!"); 5690 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5691} 5692 5693MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5694 const SDValue *Ops, unsigned NumOps, EVT memvt, 5695 MachineMemOperand *mmo) 5696 : SDNode(Opc, dl, VTs, Ops, NumOps), 5697 MemoryVT(memvt), MMO(mmo) { 5698 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5699 MMO->isNonTemporal(), MMO->isInvariant()); 5700 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5701 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5702} 5703 5704/// Profile - Gather unique data for the node. 5705/// 5706void SDNode::Profile(FoldingSetNodeID &ID) const { 5707 AddNodeIDNode(ID, this); 5708} 5709 5710namespace { 5711 struct EVTArray { 5712 std::vector<EVT> VTs; 5713 5714 EVTArray() { 5715 VTs.reserve(MVT::LAST_VALUETYPE); 5716 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5717 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5718 } 5719 }; 5720} 5721 5722static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5723static ManagedStatic<EVTArray> SimpleVTArray; 5724static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5725 5726/// getValueTypeList - Return a pointer to the specified value type. 5727/// 5728const EVT *SDNode::getValueTypeList(EVT VT) { 5729 if (VT.isExtended()) { 5730 sys::SmartScopedLock<true> Lock(*VTMutex); 5731 return &(*EVTs->insert(VT).first); 5732 } else { 5733 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 5734 "Value type out of range!"); 5735 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5736 } 5737} 5738 5739/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5740/// indicated value. This method ignores uses of other values defined by this 5741/// operation. 5742bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5743 assert(Value < getNumValues() && "Bad value!"); 5744 5745 // TODO: Only iterate over uses of a given value of the node 5746 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5747 if (UI.getUse().getResNo() == Value) { 5748 if (NUses == 0) 5749 return false; 5750 --NUses; 5751 } 5752 } 5753 5754 // Found exactly the right number of uses? 5755 return NUses == 0; 5756} 5757 5758 5759/// hasAnyUseOfValue - Return true if there are any use of the indicated 5760/// value. This method ignores uses of other values defined by this operation. 5761bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5762 assert(Value < getNumValues() && "Bad value!"); 5763 5764 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5765 if (UI.getUse().getResNo() == Value) 5766 return true; 5767 5768 return false; 5769} 5770 5771 5772/// isOnlyUserOf - Return true if this node is the only use of N. 5773/// 5774bool SDNode::isOnlyUserOf(SDNode *N) const { 5775 bool Seen = false; 5776 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5777 SDNode *User = *I; 5778 if (User == this) 5779 Seen = true; 5780 else 5781 return false; 5782 } 5783 5784 return Seen; 5785} 5786 5787/// isOperand - Return true if this node is an operand of N. 5788/// 5789bool SDValue::isOperandOf(SDNode *N) const { 5790 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5791 if (*this == N->getOperand(i)) 5792 return true; 5793 return false; 5794} 5795 5796bool SDNode::isOperandOf(SDNode *N) const { 5797 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5798 if (this == N->OperandList[i].getNode()) 5799 return true; 5800 return false; 5801} 5802 5803/// reachesChainWithoutSideEffects - Return true if this operand (which must 5804/// be a chain) reaches the specified operand without crossing any 5805/// side-effecting instructions on any chain path. In practice, this looks 5806/// through token factors and non-volatile loads. In order to remain efficient, 5807/// this only looks a couple of nodes in, it does not do an exhaustive search. 5808bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5809 unsigned Depth) const { 5810 if (*this == Dest) return true; 5811 5812 // Don't search too deeply, we just want to be able to see through 5813 // TokenFactor's etc. 5814 if (Depth == 0) return false; 5815 5816 // If this is a token factor, all inputs to the TF happen in parallel. If any 5817 // of the operands of the TF does not reach dest, then we cannot do the xform. 5818 if (getOpcode() == ISD::TokenFactor) { 5819 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5820 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5821 return false; 5822 return true; 5823 } 5824 5825 // Loads don't have side effects, look through them. 5826 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5827 if (!Ld->isVolatile()) 5828 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5829 } 5830 return false; 5831} 5832 5833/// hasPredecessor - Return true if N is a predecessor of this node. 5834/// N is either an operand of this node, or can be reached by recursively 5835/// traversing up the operands. 5836/// NOTE: This is an expensive method. Use it carefully. 5837bool SDNode::hasPredecessor(const SDNode *N) const { 5838 SmallPtrSet<const SDNode *, 32> Visited; 5839 SmallVector<const SDNode *, 16> Worklist; 5840 return hasPredecessorHelper(N, Visited, Worklist); 5841} 5842 5843bool SDNode::hasPredecessorHelper(const SDNode *N, 5844 SmallPtrSet<const SDNode *, 32> &Visited, 5845 SmallVector<const SDNode *, 16> &Worklist) const { 5846 if (Visited.empty()) { 5847 Worklist.push_back(this); 5848 } else { 5849 // Take a look in the visited set. If we've already encountered this node 5850 // we needn't search further. 5851 if (Visited.count(N)) 5852 return true; 5853 } 5854 5855 // Haven't visited N yet. Continue the search. 5856 while (!Worklist.empty()) { 5857 const SDNode *M = Worklist.pop_back_val(); 5858 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) { 5859 SDNode *Op = M->getOperand(i).getNode(); 5860 if (Visited.insert(Op)) 5861 Worklist.push_back(Op); 5862 if (Op == N) 5863 return true; 5864 } 5865 } 5866 5867 return false; 5868} 5869 5870uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5871 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5872 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5873} 5874 5875SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 5876 assert(N->getNumValues() == 1 && 5877 "Can't unroll a vector with multiple results!"); 5878 5879 EVT VT = N->getValueType(0); 5880 unsigned NE = VT.getVectorNumElements(); 5881 EVT EltVT = VT.getVectorElementType(); 5882 DebugLoc dl = N->getDebugLoc(); 5883 5884 SmallVector<SDValue, 8> Scalars; 5885 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 5886 5887 // If ResNE is 0, fully unroll the vector op. 5888 if (ResNE == 0) 5889 ResNE = NE; 5890 else if (NE > ResNE) 5891 NE = ResNE; 5892 5893 unsigned i; 5894 for (i= 0; i != NE; ++i) { 5895 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 5896 SDValue Operand = N->getOperand(j); 5897 EVT OperandVT = Operand.getValueType(); 5898 if (OperandVT.isVector()) { 5899 // A vector operand; extract a single element. 5900 EVT OperandEltVT = OperandVT.getVectorElementType(); 5901 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 5902 OperandEltVT, 5903 Operand, 5904 getConstant(i, TLI.getPointerTy())); 5905 } else { 5906 // A scalar operand; just use it as is. 5907 Operands[j] = Operand; 5908 } 5909 } 5910 5911 switch (N->getOpcode()) { 5912 default: 5913 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 5914 &Operands[0], Operands.size())); 5915 break; 5916 case ISD::VSELECT: 5917 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, 5918 &Operands[0], Operands.size())); 5919 break; 5920 case ISD::SHL: 5921 case ISD::SRA: 5922 case ISD::SRL: 5923 case ISD::ROTL: 5924 case ISD::ROTR: 5925 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 5926 getShiftAmountOperand(Operands[0].getValueType(), 5927 Operands[1]))); 5928 break; 5929 case ISD::SIGN_EXTEND_INREG: 5930 case ISD::FP_ROUND_INREG: { 5931 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 5932 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 5933 Operands[0], 5934 getValueType(ExtVT))); 5935 } 5936 } 5937 } 5938 5939 for (; i < ResNE; ++i) 5940 Scalars.push_back(getUNDEF(EltVT)); 5941 5942 return getNode(ISD::BUILD_VECTOR, dl, 5943 EVT::getVectorVT(*getContext(), EltVT, ResNE), 5944 &Scalars[0], Scalars.size()); 5945} 5946 5947 5948/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 5949/// location that is 'Dist' units away from the location that the 'Base' load 5950/// is loading from. 5951bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 5952 unsigned Bytes, int Dist) const { 5953 if (LD->getChain() != Base->getChain()) 5954 return false; 5955 EVT VT = LD->getValueType(0); 5956 if (VT.getSizeInBits() / 8 != Bytes) 5957 return false; 5958 5959 SDValue Loc = LD->getOperand(1); 5960 SDValue BaseLoc = Base->getOperand(1); 5961 if (Loc.getOpcode() == ISD::FrameIndex) { 5962 if (BaseLoc.getOpcode() != ISD::FrameIndex) 5963 return false; 5964 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 5965 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 5966 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 5967 int FS = MFI->getObjectSize(FI); 5968 int BFS = MFI->getObjectSize(BFI); 5969 if (FS != BFS || FS != (int)Bytes) return false; 5970 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 5971 } 5972 5973 // Handle X+C 5974 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && 5975 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) 5976 return true; 5977 5978 const GlobalValue *GV1 = NULL; 5979 const GlobalValue *GV2 = NULL; 5980 int64_t Offset1 = 0; 5981 int64_t Offset2 = 0; 5982 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 5983 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 5984 if (isGA1 && isGA2 && GV1 == GV2) 5985 return Offset1 == (Offset2 + Dist*Bytes); 5986 return false; 5987} 5988 5989 5990/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 5991/// it cannot be inferred. 5992unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 5993 // If this is a GlobalAddress + cst, return the alignment. 5994 const GlobalValue *GV; 5995 int64_t GVOffset = 0; 5996 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 5997 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits(); 5998 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0); 5999 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne, 6000 TLI.getTargetData()); 6001 unsigned AlignBits = KnownZero.countTrailingOnes(); 6002 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0; 6003 if (Align) 6004 return MinAlign(Align, GVOffset); 6005 } 6006 6007 // If this is a direct reference to a stack slot, use information about the 6008 // stack slot's alignment. 6009 int FrameIdx = 1 << 31; 6010 int64_t FrameOffset = 0; 6011 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6012 FrameIdx = FI->getIndex(); 6013 } else if (isBaseWithConstantOffset(Ptr) && 6014 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6015 // Handle FI+Cst 6016 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6017 FrameOffset = Ptr.getConstantOperandVal(1); 6018 } 6019 6020 if (FrameIdx != (1 << 31)) { 6021 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6022 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6023 FrameOffset); 6024 return FIInfoAlign; 6025 } 6026 6027 return 0; 6028} 6029 6030// getAddressSpace - Return the address space this GlobalAddress belongs to. 6031unsigned GlobalAddressSDNode::getAddressSpace() const { 6032 return getGlobal()->getType()->getAddressSpace(); 6033} 6034 6035 6036Type *ConstantPoolSDNode::getType() const { 6037 if (isMachineConstantPoolEntry()) 6038 return Val.MachineCPVal->getType(); 6039 return Val.ConstVal->getType(); 6040} 6041 6042bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6043 APInt &SplatUndef, 6044 unsigned &SplatBitSize, 6045 bool &HasAnyUndefs, 6046 unsigned MinSplatBits, 6047 bool isBigEndian) { 6048 EVT VT = getValueType(0); 6049 assert(VT.isVector() && "Expected a vector type"); 6050 unsigned sz = VT.getSizeInBits(); 6051 if (MinSplatBits > sz) 6052 return false; 6053 6054 SplatValue = APInt(sz, 0); 6055 SplatUndef = APInt(sz, 0); 6056 6057 // Get the bits. Bits with undefined values (when the corresponding element 6058 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6059 // in SplatValue. If any of the values are not constant, give up and return 6060 // false. 6061 unsigned int nOps = getNumOperands(); 6062 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6063 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6064 6065 for (unsigned j = 0; j < nOps; ++j) { 6066 unsigned i = isBigEndian ? nOps-1-j : j; 6067 SDValue OpVal = getOperand(i); 6068 unsigned BitPos = j * EltBitSize; 6069 6070 if (OpVal.getOpcode() == ISD::UNDEF) 6071 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6072 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6073 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6074 zextOrTrunc(sz) << BitPos; 6075 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6076 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6077 else 6078 return false; 6079 } 6080 6081 // The build_vector is all constants or undefs. Find the smallest element 6082 // size that splats the vector. 6083 6084 HasAnyUndefs = (SplatUndef != 0); 6085 while (sz > 8) { 6086 6087 unsigned HalfSize = sz / 2; 6088 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6089 APInt LowValue = SplatValue.trunc(HalfSize); 6090 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6091 APInt LowUndef = SplatUndef.trunc(HalfSize); 6092 6093 // If the two halves do not match (ignoring undef bits), stop here. 6094 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6095 MinSplatBits > HalfSize) 6096 break; 6097 6098 SplatValue = HighValue | LowValue; 6099 SplatUndef = HighUndef & LowUndef; 6100 6101 sz = HalfSize; 6102 } 6103 6104 SplatBitSize = sz; 6105 return true; 6106} 6107 6108bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6109 // Find the first non-undef value in the shuffle mask. 6110 unsigned i, e; 6111 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6112 /* search */; 6113 6114 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6115 6116 // Make sure all remaining elements are either undef or the same as the first 6117 // non-undef value. 6118 for (int Idx = Mask[i]; i != e; ++i) 6119 if (Mask[i] >= 0 && Mask[i] != Idx) 6120 return false; 6121 return true; 6122} 6123 6124#ifdef XDEBUG 6125static void checkForCyclesHelper(const SDNode *N, 6126 SmallPtrSet<const SDNode*, 32> &Visited, 6127 SmallPtrSet<const SDNode*, 32> &Checked) { 6128 // If this node has already been checked, don't check it again. 6129 if (Checked.count(N)) 6130 return; 6131 6132 // If a node has already been visited on this depth-first walk, reject it as 6133 // a cycle. 6134 if (!Visited.insert(N)) { 6135 dbgs() << "Offending node:\n"; 6136 N->dumprFull(); 6137 errs() << "Detected cycle in SelectionDAG\n"; 6138 abort(); 6139 } 6140 6141 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6142 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6143 6144 Checked.insert(N); 6145 Visited.erase(N); 6146} 6147#endif 6148 6149void llvm::checkForCycles(const llvm::SDNode *N) { 6150#ifdef XDEBUG 6151 assert(N && "Checking nonexistant SDNode"); 6152 SmallPtrSet<const SDNode*, 32> visited; 6153 SmallPtrSet<const SDNode*, 32> checked; 6154 checkForCyclesHelper(N, visited, checked); 6155#endif 6156} 6157 6158void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6159 checkForCycles(DAG->getRoot().getNode()); 6160} 6161