SelectionDAG.cpp revision decc2671516e6c52ee2f29f7746f8d02753845ea
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/ValueTracking.h" 19#include "llvm/Function.h" 20#include "llvm/GlobalAlias.h" 21#include "llvm/GlobalVariable.h" 22#include "llvm/Intrinsics.h" 23#include "llvm/DerivedTypes.h" 24#include "llvm/Assembly/Writer.h" 25#include "llvm/CallingConv.h" 26#include "llvm/CodeGen/MachineBasicBlock.h" 27#include "llvm/CodeGen/MachineConstantPool.h" 28#include "llvm/CodeGen/MachineFrameInfo.h" 29#include "llvm/CodeGen/MachineModuleInfo.h" 30#include "llvm/CodeGen/PseudoSourceValue.h" 31#include "llvm/Target/TargetRegisterInfo.h" 32#include "llvm/Target/TargetData.h" 33#include "llvm/Target/TargetFrameInfo.h" 34#include "llvm/Target/TargetLowering.h" 35#include "llvm/Target/TargetOptions.h" 36#include "llvm/Target/TargetInstrInfo.h" 37#include "llvm/Target/TargetIntrinsicInfo.h" 38#include "llvm/Target/TargetMachine.h" 39#include "llvm/Support/CommandLine.h" 40#include "llvm/Support/Debug.h" 41#include "llvm/Support/ErrorHandling.h" 42#include "llvm/Support/ManagedStatic.h" 43#include "llvm/Support/MathExtras.h" 44#include "llvm/Support/raw_ostream.h" 45#include "llvm/System/Mutex.h" 46#include "llvm/ADT/SetVector.h" 47#include "llvm/ADT/SmallPtrSet.h" 48#include "llvm/ADT/SmallSet.h" 49#include "llvm/ADT/SmallVector.h" 50#include "llvm/ADT/StringExtras.h" 51#include <algorithm> 52#include <cmath> 53using namespace llvm; 54 55/// makeVTList - Return an instance of the SDVTList struct initialized with the 56/// specified members. 57static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 58 SDVTList Res = {VTs, NumVTs}; 59 return Res; 60} 61 62static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 63 switch (VT.getSimpleVT().SimpleTy) { 64 default: llvm_unreachable("Unknown FP format"); 65 case MVT::f32: return &APFloat::IEEEsingle; 66 case MVT::f64: return &APFloat::IEEEdouble; 67 case MVT::f80: return &APFloat::x87DoubleExtended; 68 case MVT::f128: return &APFloat::IEEEquad; 69 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 70 } 71} 72 73SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 74 75//===----------------------------------------------------------------------===// 76// ConstantFPSDNode Class 77//===----------------------------------------------------------------------===// 78 79/// isExactlyValue - We don't rely on operator== working on double values, as 80/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 81/// As such, this method can be used to do an exact bit-for-bit comparison of 82/// two floating point values. 83bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 84 return getValueAPF().bitwiseIsEqual(V); 85} 86 87bool ConstantFPSDNode::isValueValidForType(EVT VT, 88 const APFloat& Val) { 89 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 90 91 // PPC long double cannot be converted to any other type. 92 if (VT == MVT::ppcf128 || 93 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 94 return false; 95 96 // convert modifies in place, so make a copy. 97 APFloat Val2 = APFloat(Val); 98 bool losesInfo; 99 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 100 &losesInfo); 101 return !losesInfo; 102} 103 104//===----------------------------------------------------------------------===// 105// ISD Namespace 106//===----------------------------------------------------------------------===// 107 108/// isBuildVectorAllOnes - Return true if the specified node is a 109/// BUILD_VECTOR where all of the elements are ~0 or undef. 110bool ISD::isBuildVectorAllOnes(const SDNode *N) { 111 // Look through a bit convert. 112 if (N->getOpcode() == ISD::BIT_CONVERT) 113 N = N->getOperand(0).getNode(); 114 115 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 116 117 unsigned i = 0, e = N->getNumOperands(); 118 119 // Skip over all of the undef values. 120 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 121 ++i; 122 123 // Do not accept an all-undef vector. 124 if (i == e) return false; 125 126 // Do not accept build_vectors that aren't all constants or which have non-~0 127 // elements. 128 SDValue NotZero = N->getOperand(i); 129 if (isa<ConstantSDNode>(NotZero)) { 130 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 131 return false; 132 } else if (isa<ConstantFPSDNode>(NotZero)) { 133 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 134 bitcastToAPInt().isAllOnesValue()) 135 return false; 136 } else 137 return false; 138 139 // Okay, we have at least one ~0 value, check to see if the rest match or are 140 // undefs. 141 for (++i; i != e; ++i) 142 if (N->getOperand(i) != NotZero && 143 N->getOperand(i).getOpcode() != ISD::UNDEF) 144 return false; 145 return true; 146} 147 148 149/// isBuildVectorAllZeros - Return true if the specified node is a 150/// BUILD_VECTOR where all of the elements are 0 or undef. 151bool ISD::isBuildVectorAllZeros(const SDNode *N) { 152 // Look through a bit convert. 153 if (N->getOpcode() == ISD::BIT_CONVERT) 154 N = N->getOperand(0).getNode(); 155 156 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 157 158 unsigned i = 0, e = N->getNumOperands(); 159 160 // Skip over all of the undef values. 161 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 162 ++i; 163 164 // Do not accept an all-undef vector. 165 if (i == e) return false; 166 167 // Do not accept build_vectors that aren't all constants or which have non-0 168 // elements. 169 SDValue Zero = N->getOperand(i); 170 if (isa<ConstantSDNode>(Zero)) { 171 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 172 return false; 173 } else if (isa<ConstantFPSDNode>(Zero)) { 174 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 175 return false; 176 } else 177 return false; 178 179 // Okay, we have at least one 0 value, check to see if the rest match or are 180 // undefs. 181 for (++i; i != e; ++i) 182 if (N->getOperand(i) != Zero && 183 N->getOperand(i).getOpcode() != ISD::UNDEF) 184 return false; 185 return true; 186} 187 188/// isScalarToVector - Return true if the specified node is a 189/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 190/// element is not an undef. 191bool ISD::isScalarToVector(const SDNode *N) { 192 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 193 return true; 194 195 if (N->getOpcode() != ISD::BUILD_VECTOR) 196 return false; 197 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 198 return false; 199 unsigned NumElems = N->getNumOperands(); 200 for (unsigned i = 1; i < NumElems; ++i) { 201 SDValue V = N->getOperand(i); 202 if (V.getOpcode() != ISD::UNDEF) 203 return false; 204 } 205 return true; 206} 207 208/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 209/// when given the operation for (X op Y). 210ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 211 // To perform this operation, we just need to swap the L and G bits of the 212 // operation. 213 unsigned OldL = (Operation >> 2) & 1; 214 unsigned OldG = (Operation >> 1) & 1; 215 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 216 (OldL << 1) | // New G bit 217 (OldG << 2)); // New L bit. 218} 219 220/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 221/// 'op' is a valid SetCC operation. 222ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 223 unsigned Operation = Op; 224 if (isInteger) 225 Operation ^= 7; // Flip L, G, E bits, but not U. 226 else 227 Operation ^= 15; // Flip all of the condition bits. 228 229 if (Operation > ISD::SETTRUE2) 230 Operation &= ~8; // Don't let N and U bits get set. 231 232 return ISD::CondCode(Operation); 233} 234 235 236/// isSignedOp - For an integer comparison, return 1 if the comparison is a 237/// signed operation and 2 if the result is an unsigned comparison. Return zero 238/// if the operation does not depend on the sign of the input (setne and seteq). 239static int isSignedOp(ISD::CondCode Opcode) { 240 switch (Opcode) { 241 default: llvm_unreachable("Illegal integer setcc operation!"); 242 case ISD::SETEQ: 243 case ISD::SETNE: return 0; 244 case ISD::SETLT: 245 case ISD::SETLE: 246 case ISD::SETGT: 247 case ISD::SETGE: return 1; 248 case ISD::SETULT: 249 case ISD::SETULE: 250 case ISD::SETUGT: 251 case ISD::SETUGE: return 2; 252 } 253} 254 255/// getSetCCOrOperation - Return the result of a logical OR between different 256/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 257/// returns SETCC_INVALID if it is not possible to represent the resultant 258/// comparison. 259ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 260 bool isInteger) { 261 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 262 // Cannot fold a signed integer setcc with an unsigned integer setcc. 263 return ISD::SETCC_INVALID; 264 265 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 266 267 // If the N and U bits get set then the resultant comparison DOES suddenly 268 // care about orderedness, and is true when ordered. 269 if (Op > ISD::SETTRUE2) 270 Op &= ~16; // Clear the U bit if the N bit is set. 271 272 // Canonicalize illegal integer setcc's. 273 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 274 Op = ISD::SETNE; 275 276 return ISD::CondCode(Op); 277} 278 279/// getSetCCAndOperation - Return the result of a logical AND between different 280/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 281/// function returns zero if it is not possible to represent the resultant 282/// comparison. 283ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 284 bool isInteger) { 285 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 286 // Cannot fold a signed setcc with an unsigned setcc. 287 return ISD::SETCC_INVALID; 288 289 // Combine all of the condition bits. 290 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 291 292 // Canonicalize illegal integer setcc's. 293 if (isInteger) { 294 switch (Result) { 295 default: break; 296 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 297 case ISD::SETOEQ: // SETEQ & SETU[LG]E 298 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 299 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 300 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 301 } 302 } 303 304 return Result; 305} 306 307const TargetMachine &SelectionDAG::getTarget() const { 308 return MF->getTarget(); 309} 310 311//===----------------------------------------------------------------------===// 312// SDNode Profile Support 313//===----------------------------------------------------------------------===// 314 315/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 316/// 317static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 318 ID.AddInteger(OpC); 319} 320 321/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 322/// solely with their pointer. 323static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 324 ID.AddPointer(VTList.VTs); 325} 326 327/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 328/// 329static void AddNodeIDOperands(FoldingSetNodeID &ID, 330 const SDValue *Ops, unsigned NumOps) { 331 for (; NumOps; --NumOps, ++Ops) { 332 ID.AddPointer(Ops->getNode()); 333 ID.AddInteger(Ops->getResNo()); 334 } 335} 336 337/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 338/// 339static void AddNodeIDOperands(FoldingSetNodeID &ID, 340 const SDUse *Ops, unsigned NumOps) { 341 for (; NumOps; --NumOps, ++Ops) { 342 ID.AddPointer(Ops->getNode()); 343 ID.AddInteger(Ops->getResNo()); 344 } 345} 346 347static void AddNodeIDNode(FoldingSetNodeID &ID, 348 unsigned short OpC, SDVTList VTList, 349 const SDValue *OpList, unsigned N) { 350 AddNodeIDOpcode(ID, OpC); 351 AddNodeIDValueTypes(ID, VTList); 352 AddNodeIDOperands(ID, OpList, N); 353} 354 355/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 356/// the NodeID data. 357static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 358 switch (N->getOpcode()) { 359 case ISD::TargetExternalSymbol: 360 case ISD::ExternalSymbol: 361 llvm_unreachable("Should only be used on nodes with operands"); 362 default: break; // Normal nodes don't need extra info. 363 case ISD::TargetConstant: 364 case ISD::Constant: 365 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 366 break; 367 case ISD::TargetConstantFP: 368 case ISD::ConstantFP: { 369 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 370 break; 371 } 372 case ISD::TargetGlobalAddress: 373 case ISD::GlobalAddress: 374 case ISD::TargetGlobalTLSAddress: 375 case ISD::GlobalTLSAddress: { 376 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 377 ID.AddPointer(GA->getGlobal()); 378 ID.AddInteger(GA->getOffset()); 379 ID.AddInteger(GA->getTargetFlags()); 380 break; 381 } 382 case ISD::BasicBlock: 383 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 384 break; 385 case ISD::Register: 386 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 387 break; 388 389 case ISD::SRCVALUE: 390 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 391 break; 392 case ISD::FrameIndex: 393 case ISD::TargetFrameIndex: 394 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 395 break; 396 case ISD::JumpTable: 397 case ISD::TargetJumpTable: 398 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 399 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 400 break; 401 case ISD::ConstantPool: 402 case ISD::TargetConstantPool: { 403 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 404 ID.AddInteger(CP->getAlignment()); 405 ID.AddInteger(CP->getOffset()); 406 if (CP->isMachineConstantPoolEntry()) 407 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 408 else 409 ID.AddPointer(CP->getConstVal()); 410 ID.AddInteger(CP->getTargetFlags()); 411 break; 412 } 413 case ISD::LOAD: { 414 const LoadSDNode *LD = cast<LoadSDNode>(N); 415 ID.AddInteger(LD->getMemoryVT().getRawBits()); 416 ID.AddInteger(LD->getRawSubclassData()); 417 break; 418 } 419 case ISD::STORE: { 420 const StoreSDNode *ST = cast<StoreSDNode>(N); 421 ID.AddInteger(ST->getMemoryVT().getRawBits()); 422 ID.AddInteger(ST->getRawSubclassData()); 423 break; 424 } 425 case ISD::ATOMIC_CMP_SWAP: 426 case ISD::ATOMIC_SWAP: 427 case ISD::ATOMIC_LOAD_ADD: 428 case ISD::ATOMIC_LOAD_SUB: 429 case ISD::ATOMIC_LOAD_AND: 430 case ISD::ATOMIC_LOAD_OR: 431 case ISD::ATOMIC_LOAD_XOR: 432 case ISD::ATOMIC_LOAD_NAND: 433 case ISD::ATOMIC_LOAD_MIN: 434 case ISD::ATOMIC_LOAD_MAX: 435 case ISD::ATOMIC_LOAD_UMIN: 436 case ISD::ATOMIC_LOAD_UMAX: { 437 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 438 ID.AddInteger(AT->getMemoryVT().getRawBits()); 439 ID.AddInteger(AT->getRawSubclassData()); 440 break; 441 } 442 case ISD::VECTOR_SHUFFLE: { 443 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 444 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 445 i != e; ++i) 446 ID.AddInteger(SVN->getMaskElt(i)); 447 break; 448 } 449 case ISD::TargetBlockAddress: 450 case ISD::BlockAddress: { 451 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 452 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 453 break; 454 } 455 } // end switch (N->getOpcode()) 456} 457 458/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 459/// data. 460static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 461 AddNodeIDOpcode(ID, N->getOpcode()); 462 // Add the return value info. 463 AddNodeIDValueTypes(ID, N->getVTList()); 464 // Add the operand info. 465 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 466 467 // Handle SDNode leafs with special info. 468 AddNodeIDCustom(ID, N); 469} 470 471/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 472/// the CSE map that carries volatility, temporalness, indexing mode, and 473/// extension/truncation information. 474/// 475static inline unsigned 476encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 477 bool isNonTemporal) { 478 assert((ConvType & 3) == ConvType && 479 "ConvType may not require more than 2 bits!"); 480 assert((AM & 7) == AM && 481 "AM may not require more than 3 bits!"); 482 return ConvType | 483 (AM << 2) | 484 (isVolatile << 5) | 485 (isNonTemporal << 6); 486} 487 488//===----------------------------------------------------------------------===// 489// SelectionDAG Class 490//===----------------------------------------------------------------------===// 491 492/// doNotCSE - Return true if CSE should not be performed for this node. 493static bool doNotCSE(SDNode *N) { 494 if (N->getValueType(0) == MVT::Flag) 495 return true; // Never CSE anything that produces a flag. 496 497 switch (N->getOpcode()) { 498 default: break; 499 case ISD::HANDLENODE: 500 case ISD::EH_LABEL: 501 return true; // Never CSE these nodes. 502 } 503 504 // Check that remaining values produced are not flags. 505 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 506 if (N->getValueType(i) == MVT::Flag) 507 return true; // Never CSE anything that produces a flag. 508 509 return false; 510} 511 512/// RemoveDeadNodes - This method deletes all unreachable nodes in the 513/// SelectionDAG. 514void SelectionDAG::RemoveDeadNodes() { 515 // Create a dummy node (which is not added to allnodes), that adds a reference 516 // to the root node, preventing it from being deleted. 517 HandleSDNode Dummy(getRoot()); 518 519 SmallVector<SDNode*, 128> DeadNodes; 520 521 // Add all obviously-dead nodes to the DeadNodes worklist. 522 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 523 if (I->use_empty()) 524 DeadNodes.push_back(I); 525 526 RemoveDeadNodes(DeadNodes); 527 528 // If the root changed (e.g. it was a dead load, update the root). 529 setRoot(Dummy.getValue()); 530} 531 532/// RemoveDeadNodes - This method deletes the unreachable nodes in the 533/// given list, and any nodes that become unreachable as a result. 534void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 535 DAGUpdateListener *UpdateListener) { 536 537 // Process the worklist, deleting the nodes and adding their uses to the 538 // worklist. 539 while (!DeadNodes.empty()) { 540 SDNode *N = DeadNodes.pop_back_val(); 541 542 if (UpdateListener) 543 UpdateListener->NodeDeleted(N, 0); 544 545 // Take the node out of the appropriate CSE map. 546 RemoveNodeFromCSEMaps(N); 547 548 // Next, brutally remove the operand list. This is safe to do, as there are 549 // no cycles in the graph. 550 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 551 SDUse &Use = *I++; 552 SDNode *Operand = Use.getNode(); 553 Use.set(SDValue()); 554 555 // Now that we removed this operand, see if there are no uses of it left. 556 if (Operand->use_empty()) 557 DeadNodes.push_back(Operand); 558 } 559 560 DeallocateNode(N); 561 } 562} 563 564void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 565 SmallVector<SDNode*, 16> DeadNodes(1, N); 566 RemoveDeadNodes(DeadNodes, UpdateListener); 567} 568 569void SelectionDAG::DeleteNode(SDNode *N) { 570 // First take this out of the appropriate CSE map. 571 RemoveNodeFromCSEMaps(N); 572 573 // Finally, remove uses due to operands of this node, remove from the 574 // AllNodes list, and delete the node. 575 DeleteNodeNotInCSEMaps(N); 576} 577 578void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 579 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 580 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 581 582 // Drop all of the operands and decrement used node's use counts. 583 N->DropOperands(); 584 585 DeallocateNode(N); 586} 587 588void SelectionDAG::DeallocateNode(SDNode *N) { 589 if (N->OperandsNeedDelete) 590 delete[] N->OperandList; 591 592 // Set the opcode to DELETED_NODE to help catch bugs when node 593 // memory is reallocated. 594 N->NodeType = ISD::DELETED_NODE; 595 596 NodeAllocator.Deallocate(AllNodes.remove(N)); 597 598 // Remove the ordering of this node. 599 Ordering->remove(N); 600 601 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 602 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N); 603 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 604 DbgVals[i]->setIsInvalidated(); 605} 606 607/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 608/// correspond to it. This is useful when we're about to delete or repurpose 609/// the node. We don't want future request for structurally identical nodes 610/// to return N anymore. 611bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 612 bool Erased = false; 613 switch (N->getOpcode()) { 614 case ISD::EntryToken: 615 llvm_unreachable("EntryToken should not be in CSEMaps!"); 616 return false; 617 case ISD::HANDLENODE: return false; // noop. 618 case ISD::CONDCODE: 619 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 620 "Cond code doesn't exist!"); 621 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 622 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 623 break; 624 case ISD::ExternalSymbol: 625 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 626 break; 627 case ISD::TargetExternalSymbol: { 628 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 629 Erased = TargetExternalSymbols.erase( 630 std::pair<std::string,unsigned char>(ESN->getSymbol(), 631 ESN->getTargetFlags())); 632 break; 633 } 634 case ISD::VALUETYPE: { 635 EVT VT = cast<VTSDNode>(N)->getVT(); 636 if (VT.isExtended()) { 637 Erased = ExtendedValueTypeNodes.erase(VT); 638 } else { 639 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 640 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 641 } 642 break; 643 } 644 default: 645 // Remove it from the CSE Map. 646 Erased = CSEMap.RemoveNode(N); 647 break; 648 } 649#ifndef NDEBUG 650 // Verify that the node was actually in one of the CSE maps, unless it has a 651 // flag result (which cannot be CSE'd) or is one of the special cases that are 652 // not subject to CSE. 653 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 654 !N->isMachineOpcode() && !doNotCSE(N)) { 655 N->dump(this); 656 dbgs() << "\n"; 657 llvm_unreachable("Node is not in map!"); 658 } 659#endif 660 return Erased; 661} 662 663/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 664/// maps and modified in place. Add it back to the CSE maps, unless an identical 665/// node already exists, in which case transfer all its users to the existing 666/// node. This transfer can potentially trigger recursive merging. 667/// 668void 669SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 670 DAGUpdateListener *UpdateListener) { 671 // For node types that aren't CSE'd, just act as if no identical node 672 // already exists. 673 if (!doNotCSE(N)) { 674 SDNode *Existing = CSEMap.GetOrInsertNode(N); 675 if (Existing != N) { 676 // If there was already an existing matching node, use ReplaceAllUsesWith 677 // to replace the dead one with the existing one. This can cause 678 // recursive merging of other unrelated nodes down the line. 679 ReplaceAllUsesWith(N, Existing, UpdateListener); 680 681 // N is now dead. Inform the listener if it exists and delete it. 682 if (UpdateListener) 683 UpdateListener->NodeDeleted(N, Existing); 684 DeleteNodeNotInCSEMaps(N); 685 return; 686 } 687 } 688 689 // If the node doesn't already exist, we updated it. Inform a listener if 690 // it exists. 691 if (UpdateListener) 692 UpdateListener->NodeUpdated(N); 693} 694 695/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 696/// were replaced with those specified. If this node is never memoized, 697/// return null, otherwise return a pointer to the slot it would take. If a 698/// node already exists with these operands, the slot will be non-null. 699SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 700 void *&InsertPos) { 701 if (doNotCSE(N)) 702 return 0; 703 704 SDValue Ops[] = { Op }; 705 FoldingSetNodeID ID; 706 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 707 AddNodeIDCustom(ID, N); 708 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 709 return Node; 710} 711 712/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 713/// were replaced with those specified. If this node is never memoized, 714/// return null, otherwise return a pointer to the slot it would take. If a 715/// node already exists with these operands, the slot will be non-null. 716SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 717 SDValue Op1, SDValue Op2, 718 void *&InsertPos) { 719 if (doNotCSE(N)) 720 return 0; 721 722 SDValue Ops[] = { Op1, Op2 }; 723 FoldingSetNodeID ID; 724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 725 AddNodeIDCustom(ID, N); 726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 727 return Node; 728} 729 730 731/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 732/// were replaced with those specified. If this node is never memoized, 733/// return null, otherwise return a pointer to the slot it would take. If a 734/// node already exists with these operands, the slot will be non-null. 735SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 736 const SDValue *Ops,unsigned NumOps, 737 void *&InsertPos) { 738 if (doNotCSE(N)) 739 return 0; 740 741 FoldingSetNodeID ID; 742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 743 AddNodeIDCustom(ID, N); 744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 745 return Node; 746} 747 748/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 749void SelectionDAG::VerifyNode(SDNode *N) { 750 switch (N->getOpcode()) { 751 default: 752 break; 753 case ISD::BUILD_PAIR: { 754 EVT VT = N->getValueType(0); 755 assert(N->getNumValues() == 1 && "Too many results!"); 756 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 757 "Wrong return type!"); 758 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 759 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 760 "Mismatched operand types!"); 761 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 762 "Wrong operand type!"); 763 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 764 "Wrong return type size"); 765 break; 766 } 767 case ISD::BUILD_VECTOR: { 768 assert(N->getNumValues() == 1 && "Too many results!"); 769 assert(N->getValueType(0).isVector() && "Wrong return type!"); 770 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 771 "Wrong number of operands!"); 772 EVT EltVT = N->getValueType(0).getVectorElementType(); 773 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 774 assert((I->getValueType() == EltVT || 775 (EltVT.isInteger() && I->getValueType().isInteger() && 776 EltVT.bitsLE(I->getValueType()))) && 777 "Wrong operand type!"); 778 break; 779 } 780 } 781} 782 783/// getEVTAlignment - Compute the default alignment value for the 784/// given type. 785/// 786unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 787 const Type *Ty = VT == MVT::iPTR ? 788 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 789 VT.getTypeForEVT(*getContext()); 790 791 return TLI.getTargetData()->getABITypeAlignment(Ty); 792} 793 794// EntryNode could meaningfully have debug info if we can find it... 795SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 796 : TLI(tli), FLI(fli), 797 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 798 Root(getEntryNode()), Ordering(0) { 799 AllNodes.push_back(&EntryNode); 800 Ordering = new SDNodeOrdering(); 801 DbgInfo = new SDDbgInfo(); 802} 803 804void SelectionDAG::init(MachineFunction &mf) { 805 MF = &mf; 806 Context = &mf.getFunction()->getContext(); 807} 808 809SelectionDAG::~SelectionDAG() { 810 allnodes_clear(); 811 delete Ordering; 812 DbgInfo->clear(); 813 delete DbgInfo; 814} 815 816void SelectionDAG::allnodes_clear() { 817 assert(&*AllNodes.begin() == &EntryNode); 818 AllNodes.remove(AllNodes.begin()); 819 while (!AllNodes.empty()) 820 DeallocateNode(AllNodes.begin()); 821} 822 823void SelectionDAG::clear() { 824 allnodes_clear(); 825 OperandAllocator.Reset(); 826 CSEMap.clear(); 827 828 ExtendedValueTypeNodes.clear(); 829 ExternalSymbols.clear(); 830 TargetExternalSymbols.clear(); 831 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 832 static_cast<CondCodeSDNode*>(0)); 833 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 834 static_cast<SDNode*>(0)); 835 836 EntryNode.UseList = 0; 837 AllNodes.push_back(&EntryNode); 838 Root = getEntryNode(); 839 delete Ordering; 840 Ordering = new SDNodeOrdering(); 841 DbgInfo->clear(); 842 delete DbgInfo; 843 DbgInfo = new SDDbgInfo(); 844} 845 846SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 847 return VT.bitsGT(Op.getValueType()) ? 848 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 849 getNode(ISD::TRUNCATE, DL, VT, Op); 850} 851 852SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 853 return VT.bitsGT(Op.getValueType()) ? 854 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 855 getNode(ISD::TRUNCATE, DL, VT, Op); 856} 857 858SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 859 assert(!VT.isVector() && 860 "getZeroExtendInReg should use the vector element type instead of " 861 "the vector type!"); 862 if (Op.getValueType() == VT) return Op; 863 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 864 APInt Imm = APInt::getLowBitsSet(BitWidth, 865 VT.getSizeInBits()); 866 return getNode(ISD::AND, DL, Op.getValueType(), Op, 867 getConstant(Imm, Op.getValueType())); 868} 869 870/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 871/// 872SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 873 EVT EltVT = VT.getScalarType(); 874 SDValue NegOne = 875 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 876 return getNode(ISD::XOR, DL, VT, Val, NegOne); 877} 878 879SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 880 EVT EltVT = VT.getScalarType(); 881 assert((EltVT.getSizeInBits() >= 64 || 882 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 883 "getConstant with a uint64_t value that doesn't fit in the type!"); 884 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 885} 886 887SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 888 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 889} 890 891SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 892 assert(VT.isInteger() && "Cannot create FP integer constant!"); 893 894 EVT EltVT = VT.getScalarType(); 895 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 896 "APInt size does not match type size!"); 897 898 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 899 FoldingSetNodeID ID; 900 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 901 ID.AddPointer(&Val); 902 void *IP = 0; 903 SDNode *N = NULL; 904 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 905 if (!VT.isVector()) 906 return SDValue(N, 0); 907 908 if (!N) { 909 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 910 CSEMap.InsertNode(N, IP); 911 AllNodes.push_back(N); 912 } 913 914 SDValue Result(N, 0); 915 if (VT.isVector()) { 916 SmallVector<SDValue, 8> Ops; 917 Ops.assign(VT.getVectorNumElements(), Result); 918 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 919 } 920 return Result; 921} 922 923SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 924 return getConstant(Val, TLI.getPointerTy(), isTarget); 925} 926 927 928SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 929 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 930} 931 932SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 933 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 934 935 EVT EltVT = VT.getScalarType(); 936 937 // Do the map lookup using the actual bit pattern for the floating point 938 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 939 // we don't have issues with SNANs. 940 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 941 FoldingSetNodeID ID; 942 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 943 ID.AddPointer(&V); 944 void *IP = 0; 945 SDNode *N = NULL; 946 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 947 if (!VT.isVector()) 948 return SDValue(N, 0); 949 950 if (!N) { 951 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 952 CSEMap.InsertNode(N, IP); 953 AllNodes.push_back(N); 954 } 955 956 SDValue Result(N, 0); 957 if (VT.isVector()) { 958 SmallVector<SDValue, 8> Ops; 959 Ops.assign(VT.getVectorNumElements(), Result); 960 // FIXME DebugLoc info might be appropriate here 961 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 962 } 963 return Result; 964} 965 966SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 967 EVT EltVT = VT.getScalarType(); 968 if (EltVT==MVT::f32) 969 return getConstantFP(APFloat((float)Val), VT, isTarget); 970 else 971 return getConstantFP(APFloat(Val), VT, isTarget); 972} 973 974SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 975 EVT VT, int64_t Offset, 976 bool isTargetGA, 977 unsigned char TargetFlags) { 978 assert((TargetFlags == 0 || isTargetGA) && 979 "Cannot set target flags on target-independent globals"); 980 981 // Truncate (with sign-extension) the offset value to the pointer size. 982 EVT PTy = TLI.getPointerTy(); 983 unsigned BitWidth = PTy.getSizeInBits(); 984 if (BitWidth < 64) 985 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 986 987 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 988 if (!GVar) { 989 // If GV is an alias then use the aliasee for determining thread-localness. 990 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 991 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 992 } 993 994 unsigned Opc; 995 if (GVar && GVar->isThreadLocal()) 996 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 997 else 998 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 999 1000 FoldingSetNodeID ID; 1001 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1002 ID.AddPointer(GV); 1003 ID.AddInteger(Offset); 1004 ID.AddInteger(TargetFlags); 1005 void *IP = 0; 1006 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1007 return SDValue(E, 0); 1008 1009 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, GV, VT, 1010 Offset, TargetFlags); 1011 CSEMap.InsertNode(N, IP); 1012 AllNodes.push_back(N); 1013 return SDValue(N, 0); 1014} 1015 1016SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1017 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1018 FoldingSetNodeID ID; 1019 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1020 ID.AddInteger(FI); 1021 void *IP = 0; 1022 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1023 return SDValue(E, 0); 1024 1025 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1026 CSEMap.InsertNode(N, IP); 1027 AllNodes.push_back(N); 1028 return SDValue(N, 0); 1029} 1030 1031SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1032 unsigned char TargetFlags) { 1033 assert((TargetFlags == 0 || isTarget) && 1034 "Cannot set target flags on target-independent jump tables"); 1035 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1036 FoldingSetNodeID ID; 1037 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1038 ID.AddInteger(JTI); 1039 ID.AddInteger(TargetFlags); 1040 void *IP = 0; 1041 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1042 return SDValue(E, 0); 1043 1044 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1045 TargetFlags); 1046 CSEMap.InsertNode(N, IP); 1047 AllNodes.push_back(N); 1048 return SDValue(N, 0); 1049} 1050 1051SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT, 1052 unsigned Alignment, int Offset, 1053 bool isTarget, 1054 unsigned char TargetFlags) { 1055 assert((TargetFlags == 0 || isTarget) && 1056 "Cannot set target flags on target-independent globals"); 1057 if (Alignment == 0) 1058 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1059 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1060 FoldingSetNodeID ID; 1061 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1062 ID.AddInteger(Alignment); 1063 ID.AddInteger(Offset); 1064 ID.AddPointer(C); 1065 ID.AddInteger(TargetFlags); 1066 void *IP = 0; 1067 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1068 return SDValue(E, 0); 1069 1070 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1071 Alignment, TargetFlags); 1072 CSEMap.InsertNode(N, IP); 1073 AllNodes.push_back(N); 1074 return SDValue(N, 0); 1075} 1076 1077 1078SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1079 unsigned Alignment, int Offset, 1080 bool isTarget, 1081 unsigned char TargetFlags) { 1082 assert((TargetFlags == 0 || isTarget) && 1083 "Cannot set target flags on target-independent globals"); 1084 if (Alignment == 0) 1085 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1086 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1087 FoldingSetNodeID ID; 1088 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1089 ID.AddInteger(Alignment); 1090 ID.AddInteger(Offset); 1091 C->AddSelectionDAGCSEId(ID); 1092 ID.AddInteger(TargetFlags); 1093 void *IP = 0; 1094 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1095 return SDValue(E, 0); 1096 1097 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1098 Alignment, TargetFlags); 1099 CSEMap.InsertNode(N, IP); 1100 AllNodes.push_back(N); 1101 return SDValue(N, 0); 1102} 1103 1104SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1105 FoldingSetNodeID ID; 1106 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1107 ID.AddPointer(MBB); 1108 void *IP = 0; 1109 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1110 return SDValue(E, 0); 1111 1112 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1113 CSEMap.InsertNode(N, IP); 1114 AllNodes.push_back(N); 1115 return SDValue(N, 0); 1116} 1117 1118SDValue SelectionDAG::getValueType(EVT VT) { 1119 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1120 ValueTypeNodes.size()) 1121 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1122 1123 SDNode *&N = VT.isExtended() ? 1124 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1125 1126 if (N) return SDValue(N, 0); 1127 N = new (NodeAllocator) VTSDNode(VT); 1128 AllNodes.push_back(N); 1129 return SDValue(N, 0); 1130} 1131 1132SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1133 SDNode *&N = ExternalSymbols[Sym]; 1134 if (N) return SDValue(N, 0); 1135 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1136 AllNodes.push_back(N); 1137 return SDValue(N, 0); 1138} 1139 1140SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1141 unsigned char TargetFlags) { 1142 SDNode *&N = 1143 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1144 TargetFlags)]; 1145 if (N) return SDValue(N, 0); 1146 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1147 AllNodes.push_back(N); 1148 return SDValue(N, 0); 1149} 1150 1151SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1152 if ((unsigned)Cond >= CondCodeNodes.size()) 1153 CondCodeNodes.resize(Cond+1); 1154 1155 if (CondCodeNodes[Cond] == 0) { 1156 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1157 CondCodeNodes[Cond] = N; 1158 AllNodes.push_back(N); 1159 } 1160 1161 return SDValue(CondCodeNodes[Cond], 0); 1162} 1163 1164// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1165// the shuffle mask M that point at N1 to point at N2, and indices that point 1166// N2 to point at N1. 1167static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1168 std::swap(N1, N2); 1169 int NElts = M.size(); 1170 for (int i = 0; i != NElts; ++i) { 1171 if (M[i] >= NElts) 1172 M[i] -= NElts; 1173 else if (M[i] >= 0) 1174 M[i] += NElts; 1175 } 1176} 1177 1178SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1179 SDValue N2, const int *Mask) { 1180 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1181 assert(VT.isVector() && N1.getValueType().isVector() && 1182 "Vector Shuffle VTs must be a vectors"); 1183 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1184 && "Vector Shuffle VTs must have same element type"); 1185 1186 // Canonicalize shuffle undef, undef -> undef 1187 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1188 return getUNDEF(VT); 1189 1190 // Validate that all indices in Mask are within the range of the elements 1191 // input to the shuffle. 1192 unsigned NElts = VT.getVectorNumElements(); 1193 SmallVector<int, 8> MaskVec; 1194 for (unsigned i = 0; i != NElts; ++i) { 1195 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1196 MaskVec.push_back(Mask[i]); 1197 } 1198 1199 // Canonicalize shuffle v, v -> v, undef 1200 if (N1 == N2) { 1201 N2 = getUNDEF(VT); 1202 for (unsigned i = 0; i != NElts; ++i) 1203 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1204 } 1205 1206 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1207 if (N1.getOpcode() == ISD::UNDEF) 1208 commuteShuffle(N1, N2, MaskVec); 1209 1210 // Canonicalize all index into lhs, -> shuffle lhs, undef 1211 // Canonicalize all index into rhs, -> shuffle rhs, undef 1212 bool AllLHS = true, AllRHS = true; 1213 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1214 for (unsigned i = 0; i != NElts; ++i) { 1215 if (MaskVec[i] >= (int)NElts) { 1216 if (N2Undef) 1217 MaskVec[i] = -1; 1218 else 1219 AllLHS = false; 1220 } else if (MaskVec[i] >= 0) { 1221 AllRHS = false; 1222 } 1223 } 1224 if (AllLHS && AllRHS) 1225 return getUNDEF(VT); 1226 if (AllLHS && !N2Undef) 1227 N2 = getUNDEF(VT); 1228 if (AllRHS) { 1229 N1 = getUNDEF(VT); 1230 commuteShuffle(N1, N2, MaskVec); 1231 } 1232 1233 // If Identity shuffle, or all shuffle in to undef, return that node. 1234 bool AllUndef = true; 1235 bool Identity = true; 1236 for (unsigned i = 0; i != NElts; ++i) { 1237 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1238 if (MaskVec[i] >= 0) AllUndef = false; 1239 } 1240 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1241 return N1; 1242 if (AllUndef) 1243 return getUNDEF(VT); 1244 1245 FoldingSetNodeID ID; 1246 SDValue Ops[2] = { N1, N2 }; 1247 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1248 for (unsigned i = 0; i != NElts; ++i) 1249 ID.AddInteger(MaskVec[i]); 1250 1251 void* IP = 0; 1252 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1253 return SDValue(E, 0); 1254 1255 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1256 // SDNode doesn't have access to it. This memory will be "leaked" when 1257 // the node is deallocated, but recovered when the NodeAllocator is released. 1258 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1259 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1260 1261 ShuffleVectorSDNode *N = 1262 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1263 CSEMap.InsertNode(N, IP); 1264 AllNodes.push_back(N); 1265 return SDValue(N, 0); 1266} 1267 1268SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1269 SDValue Val, SDValue DTy, 1270 SDValue STy, SDValue Rnd, SDValue Sat, 1271 ISD::CvtCode Code) { 1272 // If the src and dest types are the same and the conversion is between 1273 // integer types of the same sign or two floats, no conversion is necessary. 1274 if (DTy == STy && 1275 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1276 return Val; 1277 1278 FoldingSetNodeID ID; 1279 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1280 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1281 void* IP = 0; 1282 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1283 return SDValue(E, 0); 1284 1285 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1286 Code); 1287 CSEMap.InsertNode(N, IP); 1288 AllNodes.push_back(N); 1289 return SDValue(N, 0); 1290} 1291 1292SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1293 FoldingSetNodeID ID; 1294 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1295 ID.AddInteger(RegNo); 1296 void *IP = 0; 1297 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1298 return SDValue(E, 0); 1299 1300 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1301 CSEMap.InsertNode(N, IP); 1302 AllNodes.push_back(N); 1303 return SDValue(N, 0); 1304} 1305 1306SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1307 FoldingSetNodeID ID; 1308 SDValue Ops[] = { Root }; 1309 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1310 ID.AddPointer(Label); 1311 void *IP = 0; 1312 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1313 return SDValue(E, 0); 1314 1315 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1316 CSEMap.InsertNode(N, IP); 1317 AllNodes.push_back(N); 1318 return SDValue(N, 0); 1319} 1320 1321 1322SDValue SelectionDAG::getBlockAddress(BlockAddress *BA, EVT VT, 1323 bool isTarget, 1324 unsigned char TargetFlags) { 1325 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1326 1327 FoldingSetNodeID ID; 1328 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1329 ID.AddPointer(BA); 1330 ID.AddInteger(TargetFlags); 1331 void *IP = 0; 1332 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1333 return SDValue(E, 0); 1334 1335 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1336 CSEMap.InsertNode(N, IP); 1337 AllNodes.push_back(N); 1338 return SDValue(N, 0); 1339} 1340 1341SDValue SelectionDAG::getSrcValue(const Value *V) { 1342 assert((!V || V->getType()->isPointerTy()) && 1343 "SrcValue is not a pointer?"); 1344 1345 FoldingSetNodeID ID; 1346 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1347 ID.AddPointer(V); 1348 1349 void *IP = 0; 1350 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1351 return SDValue(E, 0); 1352 1353 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1354 CSEMap.InsertNode(N, IP); 1355 AllNodes.push_back(N); 1356 return SDValue(N, 0); 1357} 1358 1359/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1360SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1361 FoldingSetNodeID ID; 1362 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1363 ID.AddPointer(MD); 1364 1365 void *IP = 0; 1366 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1367 return SDValue(E, 0); 1368 1369 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1370 CSEMap.InsertNode(N, IP); 1371 AllNodes.push_back(N); 1372 return SDValue(N, 0); 1373} 1374 1375 1376/// getShiftAmountOperand - Return the specified value casted to 1377/// the target's desired shift amount type. 1378SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1379 EVT OpTy = Op.getValueType(); 1380 MVT ShTy = TLI.getShiftAmountTy(); 1381 if (OpTy == ShTy || OpTy.isVector()) return Op; 1382 1383 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1384 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1385} 1386 1387/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1388/// specified value type. 1389SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1390 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1391 unsigned ByteSize = VT.getStoreSize(); 1392 const Type *Ty = VT.getTypeForEVT(*getContext()); 1393 unsigned StackAlign = 1394 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1395 1396 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1397 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1398} 1399 1400/// CreateStackTemporary - Create a stack temporary suitable for holding 1401/// either of the specified value types. 1402SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1403 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1404 VT2.getStoreSizeInBits())/8; 1405 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1406 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1407 const TargetData *TD = TLI.getTargetData(); 1408 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1409 TD->getPrefTypeAlignment(Ty2)); 1410 1411 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1412 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1413 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1414} 1415 1416SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1417 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1418 // These setcc operations always fold. 1419 switch (Cond) { 1420 default: break; 1421 case ISD::SETFALSE: 1422 case ISD::SETFALSE2: return getConstant(0, VT); 1423 case ISD::SETTRUE: 1424 case ISD::SETTRUE2: return getConstant(1, VT); 1425 1426 case ISD::SETOEQ: 1427 case ISD::SETOGT: 1428 case ISD::SETOGE: 1429 case ISD::SETOLT: 1430 case ISD::SETOLE: 1431 case ISD::SETONE: 1432 case ISD::SETO: 1433 case ISD::SETUO: 1434 case ISD::SETUEQ: 1435 case ISD::SETUNE: 1436 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1437 break; 1438 } 1439 1440 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1441 const APInt &C2 = N2C->getAPIntValue(); 1442 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1443 const APInt &C1 = N1C->getAPIntValue(); 1444 1445 switch (Cond) { 1446 default: llvm_unreachable("Unknown integer setcc!"); 1447 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1448 case ISD::SETNE: return getConstant(C1 != C2, VT); 1449 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1450 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1451 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1452 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1453 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1454 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1455 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1456 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1457 } 1458 } 1459 } 1460 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1461 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1462 // No compile time operations on this type yet. 1463 if (N1C->getValueType(0) == MVT::ppcf128) 1464 return SDValue(); 1465 1466 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1467 switch (Cond) { 1468 default: break; 1469 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1470 return getUNDEF(VT); 1471 // fall through 1472 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1473 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1474 return getUNDEF(VT); 1475 // fall through 1476 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1477 R==APFloat::cmpLessThan, VT); 1478 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1479 return getUNDEF(VT); 1480 // fall through 1481 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1482 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1483 return getUNDEF(VT); 1484 // fall through 1485 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1486 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1487 return getUNDEF(VT); 1488 // fall through 1489 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1490 R==APFloat::cmpEqual, VT); 1491 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1492 return getUNDEF(VT); 1493 // fall through 1494 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1495 R==APFloat::cmpEqual, VT); 1496 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1497 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1498 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1499 R==APFloat::cmpEqual, VT); 1500 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1501 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1502 R==APFloat::cmpLessThan, VT); 1503 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1504 R==APFloat::cmpUnordered, VT); 1505 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1506 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1507 } 1508 } else { 1509 // Ensure that the constant occurs on the RHS. 1510 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1511 } 1512 } 1513 1514 // Could not fold it. 1515 return SDValue(); 1516} 1517 1518/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1519/// use this predicate to simplify operations downstream. 1520bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1521 // This predicate is not safe for vector operations. 1522 if (Op.getValueType().isVector()) 1523 return false; 1524 1525 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1526 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1527} 1528 1529/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1530/// this predicate to simplify operations downstream. Mask is known to be zero 1531/// for bits that V cannot have. 1532bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1533 unsigned Depth) const { 1534 APInt KnownZero, KnownOne; 1535 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1536 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1537 return (KnownZero & Mask) == Mask; 1538} 1539 1540/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1541/// known to be either zero or one and return them in the KnownZero/KnownOne 1542/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1543/// processing. 1544void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1545 APInt &KnownZero, APInt &KnownOne, 1546 unsigned Depth) const { 1547 unsigned BitWidth = Mask.getBitWidth(); 1548 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1549 "Mask size mismatches value type size!"); 1550 1551 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1552 if (Depth == 6 || Mask == 0) 1553 return; // Limit search depth. 1554 1555 APInt KnownZero2, KnownOne2; 1556 1557 switch (Op.getOpcode()) { 1558 case ISD::Constant: 1559 // We know all of the bits for a constant! 1560 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1561 KnownZero = ~KnownOne & Mask; 1562 return; 1563 case ISD::AND: 1564 // If either the LHS or the RHS are Zero, the result is zero. 1565 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1566 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1567 KnownZero2, KnownOne2, Depth+1); 1568 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1569 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1570 1571 // Output known-1 bits are only known if set in both the LHS & RHS. 1572 KnownOne &= KnownOne2; 1573 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1574 KnownZero |= KnownZero2; 1575 return; 1576 case ISD::OR: 1577 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1578 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1579 KnownZero2, KnownOne2, Depth+1); 1580 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1581 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1582 1583 // Output known-0 bits are only known if clear in both the LHS & RHS. 1584 KnownZero &= KnownZero2; 1585 // Output known-1 are known to be set if set in either the LHS | RHS. 1586 KnownOne |= KnownOne2; 1587 return; 1588 case ISD::XOR: { 1589 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1590 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1591 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1592 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1593 1594 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1595 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1596 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1597 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1598 KnownZero = KnownZeroOut; 1599 return; 1600 } 1601 case ISD::MUL: { 1602 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1603 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1604 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1605 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1606 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1607 1608 // If low bits are zero in either operand, output low known-0 bits. 1609 // Also compute a conserative estimate for high known-0 bits. 1610 // More trickiness is possible, but this is sufficient for the 1611 // interesting case of alignment computation. 1612 KnownOne.clear(); 1613 unsigned TrailZ = KnownZero.countTrailingOnes() + 1614 KnownZero2.countTrailingOnes(); 1615 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1616 KnownZero2.countLeadingOnes(), 1617 BitWidth) - BitWidth; 1618 1619 TrailZ = std::min(TrailZ, BitWidth); 1620 LeadZ = std::min(LeadZ, BitWidth); 1621 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1622 APInt::getHighBitsSet(BitWidth, LeadZ); 1623 KnownZero &= Mask; 1624 return; 1625 } 1626 case ISD::UDIV: { 1627 // For the purposes of computing leading zeros we can conservatively 1628 // treat a udiv as a logical right shift by the power of 2 known to 1629 // be less than the denominator. 1630 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1631 ComputeMaskedBits(Op.getOperand(0), 1632 AllOnes, KnownZero2, KnownOne2, Depth+1); 1633 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1634 1635 KnownOne2.clear(); 1636 KnownZero2.clear(); 1637 ComputeMaskedBits(Op.getOperand(1), 1638 AllOnes, KnownZero2, KnownOne2, Depth+1); 1639 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1640 if (RHSUnknownLeadingOnes != BitWidth) 1641 LeadZ = std::min(BitWidth, 1642 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1643 1644 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1645 return; 1646 } 1647 case ISD::SELECT: 1648 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1649 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1650 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1651 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1652 1653 // Only known if known in both the LHS and RHS. 1654 KnownOne &= KnownOne2; 1655 KnownZero &= KnownZero2; 1656 return; 1657 case ISD::SELECT_CC: 1658 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1659 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1660 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1661 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1662 1663 // Only known if known in both the LHS and RHS. 1664 KnownOne &= KnownOne2; 1665 KnownZero &= KnownZero2; 1666 return; 1667 case ISD::SADDO: 1668 case ISD::UADDO: 1669 case ISD::SSUBO: 1670 case ISD::USUBO: 1671 case ISD::SMULO: 1672 case ISD::UMULO: 1673 if (Op.getResNo() != 1) 1674 return; 1675 // The boolean result conforms to getBooleanContents. Fall through. 1676 case ISD::SETCC: 1677 // If we know the result of a setcc has the top bits zero, use this info. 1678 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1679 BitWidth > 1) 1680 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1681 return; 1682 case ISD::SHL: 1683 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1684 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1685 unsigned ShAmt = SA->getZExtValue(); 1686 1687 // If the shift count is an invalid immediate, don't do anything. 1688 if (ShAmt >= BitWidth) 1689 return; 1690 1691 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1692 KnownZero, KnownOne, Depth+1); 1693 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1694 KnownZero <<= ShAmt; 1695 KnownOne <<= ShAmt; 1696 // low bits known zero. 1697 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1698 } 1699 return; 1700 case ISD::SRL: 1701 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1702 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1703 unsigned ShAmt = SA->getZExtValue(); 1704 1705 // If the shift count is an invalid immediate, don't do anything. 1706 if (ShAmt >= BitWidth) 1707 return; 1708 1709 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1710 KnownZero, KnownOne, Depth+1); 1711 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1712 KnownZero = KnownZero.lshr(ShAmt); 1713 KnownOne = KnownOne.lshr(ShAmt); 1714 1715 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1716 KnownZero |= HighBits; // High bits known zero. 1717 } 1718 return; 1719 case ISD::SRA: 1720 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1721 unsigned ShAmt = SA->getZExtValue(); 1722 1723 // If the shift count is an invalid immediate, don't do anything. 1724 if (ShAmt >= BitWidth) 1725 return; 1726 1727 APInt InDemandedMask = (Mask << ShAmt); 1728 // If any of the demanded bits are produced by the sign extension, we also 1729 // demand the input sign bit. 1730 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1731 if (HighBits.getBoolValue()) 1732 InDemandedMask |= APInt::getSignBit(BitWidth); 1733 1734 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1735 Depth+1); 1736 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1737 KnownZero = KnownZero.lshr(ShAmt); 1738 KnownOne = KnownOne.lshr(ShAmt); 1739 1740 // Handle the sign bits. 1741 APInt SignBit = APInt::getSignBit(BitWidth); 1742 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1743 1744 if (KnownZero.intersects(SignBit)) { 1745 KnownZero |= HighBits; // New bits are known zero. 1746 } else if (KnownOne.intersects(SignBit)) { 1747 KnownOne |= HighBits; // New bits are known one. 1748 } 1749 } 1750 return; 1751 case ISD::SIGN_EXTEND_INREG: { 1752 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1753 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1754 1755 // Sign extension. Compute the demanded bits in the result that are not 1756 // present in the input. 1757 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1758 1759 APInt InSignBit = APInt::getSignBit(EBits); 1760 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1761 1762 // If the sign extended bits are demanded, we know that the sign 1763 // bit is demanded. 1764 InSignBit.zext(BitWidth); 1765 if (NewBits.getBoolValue()) 1766 InputDemandedBits |= InSignBit; 1767 1768 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1769 KnownZero, KnownOne, Depth+1); 1770 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1771 1772 // If the sign bit of the input is known set or clear, then we know the 1773 // top bits of the result. 1774 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1775 KnownZero |= NewBits; 1776 KnownOne &= ~NewBits; 1777 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1778 KnownOne |= NewBits; 1779 KnownZero &= ~NewBits; 1780 } else { // Input sign bit unknown 1781 KnownZero &= ~NewBits; 1782 KnownOne &= ~NewBits; 1783 } 1784 return; 1785 } 1786 case ISD::CTTZ: 1787 case ISD::CTLZ: 1788 case ISD::CTPOP: { 1789 unsigned LowBits = Log2_32(BitWidth)+1; 1790 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1791 KnownOne.clear(); 1792 return; 1793 } 1794 case ISD::LOAD: { 1795 if (ISD::isZEXTLoad(Op.getNode())) { 1796 LoadSDNode *LD = cast<LoadSDNode>(Op); 1797 EVT VT = LD->getMemoryVT(); 1798 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1799 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1800 } 1801 return; 1802 } 1803 case ISD::ZERO_EXTEND: { 1804 EVT InVT = Op.getOperand(0).getValueType(); 1805 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1806 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1807 APInt InMask = Mask; 1808 InMask.trunc(InBits); 1809 KnownZero.trunc(InBits); 1810 KnownOne.trunc(InBits); 1811 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1812 KnownZero.zext(BitWidth); 1813 KnownOne.zext(BitWidth); 1814 KnownZero |= NewBits; 1815 return; 1816 } 1817 case ISD::SIGN_EXTEND: { 1818 EVT InVT = Op.getOperand(0).getValueType(); 1819 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1820 APInt InSignBit = APInt::getSignBit(InBits); 1821 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1822 APInt InMask = Mask; 1823 InMask.trunc(InBits); 1824 1825 // If any of the sign extended bits are demanded, we know that the sign 1826 // bit is demanded. Temporarily set this bit in the mask for our callee. 1827 if (NewBits.getBoolValue()) 1828 InMask |= InSignBit; 1829 1830 KnownZero.trunc(InBits); 1831 KnownOne.trunc(InBits); 1832 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1833 1834 // Note if the sign bit is known to be zero or one. 1835 bool SignBitKnownZero = KnownZero.isNegative(); 1836 bool SignBitKnownOne = KnownOne.isNegative(); 1837 assert(!(SignBitKnownZero && SignBitKnownOne) && 1838 "Sign bit can't be known to be both zero and one!"); 1839 1840 // If the sign bit wasn't actually demanded by our caller, we don't 1841 // want it set in the KnownZero and KnownOne result values. Reset the 1842 // mask and reapply it to the result values. 1843 InMask = Mask; 1844 InMask.trunc(InBits); 1845 KnownZero &= InMask; 1846 KnownOne &= InMask; 1847 1848 KnownZero.zext(BitWidth); 1849 KnownOne.zext(BitWidth); 1850 1851 // If the sign bit is known zero or one, the top bits match. 1852 if (SignBitKnownZero) 1853 KnownZero |= NewBits; 1854 else if (SignBitKnownOne) 1855 KnownOne |= NewBits; 1856 return; 1857 } 1858 case ISD::ANY_EXTEND: { 1859 EVT InVT = Op.getOperand(0).getValueType(); 1860 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1861 APInt InMask = Mask; 1862 InMask.trunc(InBits); 1863 KnownZero.trunc(InBits); 1864 KnownOne.trunc(InBits); 1865 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1866 KnownZero.zext(BitWidth); 1867 KnownOne.zext(BitWidth); 1868 return; 1869 } 1870 case ISD::TRUNCATE: { 1871 EVT InVT = Op.getOperand(0).getValueType(); 1872 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1873 APInt InMask = Mask; 1874 InMask.zext(InBits); 1875 KnownZero.zext(InBits); 1876 KnownOne.zext(InBits); 1877 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1878 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1879 KnownZero.trunc(BitWidth); 1880 KnownOne.trunc(BitWidth); 1881 break; 1882 } 1883 case ISD::AssertZext: { 1884 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1885 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1886 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1887 KnownOne, Depth+1); 1888 KnownZero |= (~InMask) & Mask; 1889 return; 1890 } 1891 case ISD::FGETSIGN: 1892 // All bits are zero except the low bit. 1893 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1894 return; 1895 1896 case ISD::SUB: { 1897 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1898 // We know that the top bits of C-X are clear if X contains less bits 1899 // than C (i.e. no wrap-around can happen). For example, 20-X is 1900 // positive if we can prove that X is >= 0 and < 16. 1901 if (CLHS->getAPIntValue().isNonNegative()) { 1902 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1903 // NLZ can't be BitWidth with no sign bit 1904 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1905 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1906 Depth+1); 1907 1908 // If all of the MaskV bits are known to be zero, then we know the 1909 // output top bits are zero, because we now know that the output is 1910 // from [0-C]. 1911 if ((KnownZero2 & MaskV) == MaskV) { 1912 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1913 // Top bits known zero. 1914 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1915 } 1916 } 1917 } 1918 } 1919 // fall through 1920 case ISD::ADD: { 1921 // Output known-0 bits are known if clear or set in both the low clear bits 1922 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1923 // low 3 bits clear. 1924 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1925 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1926 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1927 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1928 1929 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1930 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1931 KnownZeroOut = std::min(KnownZeroOut, 1932 KnownZero2.countTrailingOnes()); 1933 1934 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1935 return; 1936 } 1937 case ISD::SREM: 1938 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1939 const APInt &RA = Rem->getAPIntValue().abs(); 1940 if (RA.isPowerOf2()) { 1941 APInt LowBits = RA - 1; 1942 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1943 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1944 1945 // The low bits of the first operand are unchanged by the srem. 1946 KnownZero = KnownZero2 & LowBits; 1947 KnownOne = KnownOne2 & LowBits; 1948 1949 // If the first operand is non-negative or has all low bits zero, then 1950 // the upper bits are all zero. 1951 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1952 KnownZero |= ~LowBits; 1953 1954 // If the first operand is negative and not all low bits are zero, then 1955 // the upper bits are all one. 1956 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 1957 KnownOne |= ~LowBits; 1958 1959 KnownZero &= Mask; 1960 KnownOne &= Mask; 1961 1962 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1963 } 1964 } 1965 return; 1966 case ISD::UREM: { 1967 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1968 const APInt &RA = Rem->getAPIntValue(); 1969 if (RA.isPowerOf2()) { 1970 APInt LowBits = (RA - 1); 1971 APInt Mask2 = LowBits & Mask; 1972 KnownZero |= ~LowBits & Mask; 1973 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1974 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1975 break; 1976 } 1977 } 1978 1979 // Since the result is less than or equal to either operand, any leading 1980 // zero bits in either operand must also exist in the result. 1981 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1982 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1983 Depth+1); 1984 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1985 Depth+1); 1986 1987 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1988 KnownZero2.countLeadingOnes()); 1989 KnownOne.clear(); 1990 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1991 return; 1992 } 1993 default: 1994 // Allow the target to implement this method for its nodes. 1995 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1996 case ISD::INTRINSIC_WO_CHAIN: 1997 case ISD::INTRINSIC_W_CHAIN: 1998 case ISD::INTRINSIC_VOID: 1999 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 2000 Depth); 2001 } 2002 return; 2003 } 2004} 2005 2006/// ComputeNumSignBits - Return the number of times the sign bit of the 2007/// register is replicated into the other bits. We know that at least 1 bit 2008/// is always equal to the sign bit (itself), but other cases can give us 2009/// information. For example, immediately after an "SRA X, 2", we know that 2010/// the top 3 bits are all equal to each other, so we return 3. 2011unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2012 EVT VT = Op.getValueType(); 2013 assert(VT.isInteger() && "Invalid VT!"); 2014 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2015 unsigned Tmp, Tmp2; 2016 unsigned FirstAnswer = 1; 2017 2018 if (Depth == 6) 2019 return 1; // Limit search depth. 2020 2021 switch (Op.getOpcode()) { 2022 default: break; 2023 case ISD::AssertSext: 2024 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2025 return VTBits-Tmp+1; 2026 case ISD::AssertZext: 2027 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2028 return VTBits-Tmp; 2029 2030 case ISD::Constant: { 2031 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2032 // If negative, return # leading ones. 2033 if (Val.isNegative()) 2034 return Val.countLeadingOnes(); 2035 2036 // Return # leading zeros. 2037 return Val.countLeadingZeros(); 2038 } 2039 2040 case ISD::SIGN_EXTEND: 2041 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2042 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2043 2044 case ISD::SIGN_EXTEND_INREG: 2045 // Max of the input and what this extends. 2046 Tmp = 2047 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2048 Tmp = VTBits-Tmp+1; 2049 2050 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2051 return std::max(Tmp, Tmp2); 2052 2053 case ISD::SRA: 2054 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2055 // SRA X, C -> adds C sign bits. 2056 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2057 Tmp += C->getZExtValue(); 2058 if (Tmp > VTBits) Tmp = VTBits; 2059 } 2060 return Tmp; 2061 case ISD::SHL: 2062 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2063 // shl destroys sign bits. 2064 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2065 if (C->getZExtValue() >= VTBits || // Bad shift. 2066 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2067 return Tmp - C->getZExtValue(); 2068 } 2069 break; 2070 case ISD::AND: 2071 case ISD::OR: 2072 case ISD::XOR: // NOT is handled here. 2073 // Logical binary ops preserve the number of sign bits at the worst. 2074 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2075 if (Tmp != 1) { 2076 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2077 FirstAnswer = std::min(Tmp, Tmp2); 2078 // We computed what we know about the sign bits as our first 2079 // answer. Now proceed to the generic code that uses 2080 // ComputeMaskedBits, and pick whichever answer is better. 2081 } 2082 break; 2083 2084 case ISD::SELECT: 2085 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2086 if (Tmp == 1) return 1; // Early out. 2087 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2088 return std::min(Tmp, Tmp2); 2089 2090 case ISD::SADDO: 2091 case ISD::UADDO: 2092 case ISD::SSUBO: 2093 case ISD::USUBO: 2094 case ISD::SMULO: 2095 case ISD::UMULO: 2096 if (Op.getResNo() != 1) 2097 break; 2098 // The boolean result conforms to getBooleanContents. Fall through. 2099 case ISD::SETCC: 2100 // If setcc returns 0/-1, all bits are sign bits. 2101 if (TLI.getBooleanContents() == 2102 TargetLowering::ZeroOrNegativeOneBooleanContent) 2103 return VTBits; 2104 break; 2105 case ISD::ROTL: 2106 case ISD::ROTR: 2107 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2108 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2109 2110 // Handle rotate right by N like a rotate left by 32-N. 2111 if (Op.getOpcode() == ISD::ROTR) 2112 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2113 2114 // If we aren't rotating out all of the known-in sign bits, return the 2115 // number that are left. This handles rotl(sext(x), 1) for example. 2116 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2117 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2118 } 2119 break; 2120 case ISD::ADD: 2121 // Add can have at most one carry bit. Thus we know that the output 2122 // is, at worst, one more bit than the inputs. 2123 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2124 if (Tmp == 1) return 1; // Early out. 2125 2126 // Special case decrementing a value (ADD X, -1): 2127 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2128 if (CRHS->isAllOnesValue()) { 2129 APInt KnownZero, KnownOne; 2130 APInt Mask = APInt::getAllOnesValue(VTBits); 2131 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2132 2133 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2134 // sign bits set. 2135 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2136 return VTBits; 2137 2138 // If we are subtracting one from a positive number, there is no carry 2139 // out of the result. 2140 if (KnownZero.isNegative()) 2141 return Tmp; 2142 } 2143 2144 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2145 if (Tmp2 == 1) return 1; 2146 return std::min(Tmp, Tmp2)-1; 2147 break; 2148 2149 case ISD::SUB: 2150 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2151 if (Tmp2 == 1) return 1; 2152 2153 // Handle NEG. 2154 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2155 if (CLHS->isNullValue()) { 2156 APInt KnownZero, KnownOne; 2157 APInt Mask = APInt::getAllOnesValue(VTBits); 2158 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2159 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2160 // sign bits set. 2161 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2162 return VTBits; 2163 2164 // If the input is known to be positive (the sign bit is known clear), 2165 // the output of the NEG has the same number of sign bits as the input. 2166 if (KnownZero.isNegative()) 2167 return Tmp2; 2168 2169 // Otherwise, we treat this like a SUB. 2170 } 2171 2172 // Sub can have at most one carry bit. Thus we know that the output 2173 // is, at worst, one more bit than the inputs. 2174 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2175 if (Tmp == 1) return 1; // Early out. 2176 return std::min(Tmp, Tmp2)-1; 2177 break; 2178 case ISD::TRUNCATE: 2179 // FIXME: it's tricky to do anything useful for this, but it is an important 2180 // case for targets like X86. 2181 break; 2182 } 2183 2184 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2185 if (Op.getOpcode() == ISD::LOAD) { 2186 LoadSDNode *LD = cast<LoadSDNode>(Op); 2187 unsigned ExtType = LD->getExtensionType(); 2188 switch (ExtType) { 2189 default: break; 2190 case ISD::SEXTLOAD: // '17' bits known 2191 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2192 return VTBits-Tmp+1; 2193 case ISD::ZEXTLOAD: // '16' bits known 2194 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2195 return VTBits-Tmp; 2196 } 2197 } 2198 2199 // Allow the target to implement this method for its nodes. 2200 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2201 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2202 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2203 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2204 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2205 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2206 } 2207 2208 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2209 // use this information. 2210 APInt KnownZero, KnownOne; 2211 APInt Mask = APInt::getAllOnesValue(VTBits); 2212 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2213 2214 if (KnownZero.isNegative()) { // sign bit is 0 2215 Mask = KnownZero; 2216 } else if (KnownOne.isNegative()) { // sign bit is 1; 2217 Mask = KnownOne; 2218 } else { 2219 // Nothing known. 2220 return FirstAnswer; 2221 } 2222 2223 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2224 // the number of identical bits in the top of the input value. 2225 Mask = ~Mask; 2226 Mask <<= Mask.getBitWidth()-VTBits; 2227 // Return # leading zeros. We use 'min' here in case Val was zero before 2228 // shifting. We don't want to return '64' as for an i32 "0". 2229 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2230} 2231 2232bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2233 // If we're told that NaNs won't happen, assume they won't. 2234 if (FiniteOnlyFPMath()) 2235 return true; 2236 2237 // If the value is a constant, we can obviously see if it is a NaN or not. 2238 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2239 return !C->getValueAPF().isNaN(); 2240 2241 // TODO: Recognize more cases here. 2242 2243 return false; 2244} 2245 2246bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2247 // If the value is a constant, we can obviously see if it is a zero or not. 2248 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2249 return !C->isZero(); 2250 2251 // TODO: Recognize more cases here. 2252 2253 return false; 2254} 2255 2256bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2257 // Check the obvious case. 2258 if (A == B) return true; 2259 2260 // For for negative and positive zero. 2261 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2262 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2263 if (CA->isZero() && CB->isZero()) return true; 2264 2265 // Otherwise they may not be equal. 2266 return false; 2267} 2268 2269bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2270 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2271 if (!GA) return false; 2272 if (GA->getOffset() != 0) return false; 2273 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2274 if (!GV) return false; 2275 return MF->getMMI().hasDebugInfo(); 2276} 2277 2278 2279/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2280/// element of the result of the vector shuffle. 2281SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2282 unsigned i) { 2283 EVT VT = N->getValueType(0); 2284 DebugLoc dl = N->getDebugLoc(); 2285 if (N->getMaskElt(i) < 0) 2286 return getUNDEF(VT.getVectorElementType()); 2287 unsigned Index = N->getMaskElt(i); 2288 unsigned NumElems = VT.getVectorNumElements(); 2289 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2290 Index %= NumElems; 2291 2292 if (V.getOpcode() == ISD::BIT_CONVERT) { 2293 V = V.getOperand(0); 2294 EVT VVT = V.getValueType(); 2295 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2296 return SDValue(); 2297 } 2298 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2299 return (Index == 0) ? V.getOperand(0) 2300 : getUNDEF(VT.getVectorElementType()); 2301 if (V.getOpcode() == ISD::BUILD_VECTOR) 2302 return V.getOperand(Index); 2303 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2304 return getShuffleScalarElt(SVN, Index); 2305 return SDValue(); 2306} 2307 2308 2309/// getNode - Gets or creates the specified node. 2310/// 2311SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2312 FoldingSetNodeID ID; 2313 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2314 void *IP = 0; 2315 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2316 return SDValue(E, 0); 2317 2318 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2319 CSEMap.InsertNode(N, IP); 2320 2321 AllNodes.push_back(N); 2322#ifndef NDEBUG 2323 VerifyNode(N); 2324#endif 2325 return SDValue(N, 0); 2326} 2327 2328SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2329 EVT VT, SDValue Operand) { 2330 // Constant fold unary operations with an integer constant operand. 2331 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2332 const APInt &Val = C->getAPIntValue(); 2333 switch (Opcode) { 2334 default: break; 2335 case ISD::SIGN_EXTEND: 2336 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT); 2337 case ISD::ANY_EXTEND: 2338 case ISD::ZERO_EXTEND: 2339 case ISD::TRUNCATE: 2340 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT); 2341 case ISD::UINT_TO_FP: 2342 case ISD::SINT_TO_FP: { 2343 const uint64_t zero[] = {0, 0}; 2344 // No compile time operations on ppcf128. 2345 if (VT == MVT::ppcf128) break; 2346 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero)); 2347 (void)apf.convertFromAPInt(Val, 2348 Opcode==ISD::SINT_TO_FP, 2349 APFloat::rmNearestTiesToEven); 2350 return getConstantFP(apf, VT); 2351 } 2352 case ISD::BIT_CONVERT: 2353 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2354 return getConstantFP(Val.bitsToFloat(), VT); 2355 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2356 return getConstantFP(Val.bitsToDouble(), VT); 2357 break; 2358 case ISD::BSWAP: 2359 return getConstant(Val.byteSwap(), VT); 2360 case ISD::CTPOP: 2361 return getConstant(Val.countPopulation(), VT); 2362 case ISD::CTLZ: 2363 return getConstant(Val.countLeadingZeros(), VT); 2364 case ISD::CTTZ: 2365 return getConstant(Val.countTrailingZeros(), VT); 2366 } 2367 } 2368 2369 // Constant fold unary operations with a floating point constant operand. 2370 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2371 APFloat V = C->getValueAPF(); // make copy 2372 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2373 switch (Opcode) { 2374 case ISD::FNEG: 2375 V.changeSign(); 2376 return getConstantFP(V, VT); 2377 case ISD::FABS: 2378 V.clearSign(); 2379 return getConstantFP(V, VT); 2380 case ISD::FP_ROUND: 2381 case ISD::FP_EXTEND: { 2382 bool ignored; 2383 // This can return overflow, underflow, or inexact; we don't care. 2384 // FIXME need to be more flexible about rounding mode. 2385 (void)V.convert(*EVTToAPFloatSemantics(VT), 2386 APFloat::rmNearestTiesToEven, &ignored); 2387 return getConstantFP(V, VT); 2388 } 2389 case ISD::FP_TO_SINT: 2390 case ISD::FP_TO_UINT: { 2391 integerPart x[2]; 2392 bool ignored; 2393 assert(integerPartWidth >= 64); 2394 // FIXME need to be more flexible about rounding mode. 2395 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2396 Opcode==ISD::FP_TO_SINT, 2397 APFloat::rmTowardZero, &ignored); 2398 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2399 break; 2400 APInt api(VT.getSizeInBits(), 2, x); 2401 return getConstant(api, VT); 2402 } 2403 case ISD::BIT_CONVERT: 2404 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2405 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2406 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2407 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2408 break; 2409 } 2410 } 2411 } 2412 2413 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2414 switch (Opcode) { 2415 case ISD::TokenFactor: 2416 case ISD::MERGE_VALUES: 2417 case ISD::CONCAT_VECTORS: 2418 return Operand; // Factor, merge or concat of one node? No need. 2419 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2420 case ISD::FP_EXTEND: 2421 assert(VT.isFloatingPoint() && 2422 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2423 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2424 assert((!VT.isVector() || 2425 VT.getVectorNumElements() == 2426 Operand.getValueType().getVectorNumElements()) && 2427 "Vector element count mismatch!"); 2428 if (Operand.getOpcode() == ISD::UNDEF) 2429 return getUNDEF(VT); 2430 break; 2431 case ISD::SIGN_EXTEND: 2432 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2433 "Invalid SIGN_EXTEND!"); 2434 if (Operand.getValueType() == VT) return Operand; // noop extension 2435 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2436 "Invalid sext node, dst < src!"); 2437 assert((!VT.isVector() || 2438 VT.getVectorNumElements() == 2439 Operand.getValueType().getVectorNumElements()) && 2440 "Vector element count mismatch!"); 2441 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2442 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2443 break; 2444 case ISD::ZERO_EXTEND: 2445 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2446 "Invalid ZERO_EXTEND!"); 2447 if (Operand.getValueType() == VT) return Operand; // noop extension 2448 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2449 "Invalid zext node, dst < src!"); 2450 assert((!VT.isVector() || 2451 VT.getVectorNumElements() == 2452 Operand.getValueType().getVectorNumElements()) && 2453 "Vector element count mismatch!"); 2454 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2455 return getNode(ISD::ZERO_EXTEND, DL, VT, 2456 Operand.getNode()->getOperand(0)); 2457 break; 2458 case ISD::ANY_EXTEND: 2459 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2460 "Invalid ANY_EXTEND!"); 2461 if (Operand.getValueType() == VT) return Operand; // noop extension 2462 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2463 "Invalid anyext node, dst < src!"); 2464 assert((!VT.isVector() || 2465 VT.getVectorNumElements() == 2466 Operand.getValueType().getVectorNumElements()) && 2467 "Vector element count mismatch!"); 2468 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2469 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2470 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2471 break; 2472 case ISD::TRUNCATE: 2473 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2474 "Invalid TRUNCATE!"); 2475 if (Operand.getValueType() == VT) return Operand; // noop truncate 2476 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2477 "Invalid truncate node, src < dst!"); 2478 assert((!VT.isVector() || 2479 VT.getVectorNumElements() == 2480 Operand.getValueType().getVectorNumElements()) && 2481 "Vector element count mismatch!"); 2482 if (OpOpcode == ISD::TRUNCATE) 2483 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2484 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2485 OpOpcode == ISD::ANY_EXTEND) { 2486 // If the source is smaller than the dest, we still need an extend. 2487 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2488 .bitsLT(VT.getScalarType())) 2489 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2490 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2491 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2492 else 2493 return Operand.getNode()->getOperand(0); 2494 } 2495 break; 2496 case ISD::BIT_CONVERT: 2497 // Basic sanity checking. 2498 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2499 && "Cannot BIT_CONVERT between types of different sizes!"); 2500 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2501 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2502 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2503 if (OpOpcode == ISD::UNDEF) 2504 return getUNDEF(VT); 2505 break; 2506 case ISD::SCALAR_TO_VECTOR: 2507 assert(VT.isVector() && !Operand.getValueType().isVector() && 2508 (VT.getVectorElementType() == Operand.getValueType() || 2509 (VT.getVectorElementType().isInteger() && 2510 Operand.getValueType().isInteger() && 2511 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2512 "Illegal SCALAR_TO_VECTOR node!"); 2513 if (OpOpcode == ISD::UNDEF) 2514 return getUNDEF(VT); 2515 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2516 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2517 isa<ConstantSDNode>(Operand.getOperand(1)) && 2518 Operand.getConstantOperandVal(1) == 0 && 2519 Operand.getOperand(0).getValueType() == VT) 2520 return Operand.getOperand(0); 2521 break; 2522 case ISD::FNEG: 2523 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2524 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2525 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2526 Operand.getNode()->getOperand(0)); 2527 if (OpOpcode == ISD::FNEG) // --X -> X 2528 return Operand.getNode()->getOperand(0); 2529 break; 2530 case ISD::FABS: 2531 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2532 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2533 break; 2534 } 2535 2536 SDNode *N; 2537 SDVTList VTs = getVTList(VT); 2538 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2539 FoldingSetNodeID ID; 2540 SDValue Ops[1] = { Operand }; 2541 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2542 void *IP = 0; 2543 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2544 return SDValue(E, 0); 2545 2546 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2547 CSEMap.InsertNode(N, IP); 2548 } else { 2549 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2550 } 2551 2552 AllNodes.push_back(N); 2553#ifndef NDEBUG 2554 VerifyNode(N); 2555#endif 2556 return SDValue(N, 0); 2557} 2558 2559SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2560 EVT VT, 2561 ConstantSDNode *Cst1, 2562 ConstantSDNode *Cst2) { 2563 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2564 2565 switch (Opcode) { 2566 case ISD::ADD: return getConstant(C1 + C2, VT); 2567 case ISD::SUB: return getConstant(C1 - C2, VT); 2568 case ISD::MUL: return getConstant(C1 * C2, VT); 2569 case ISD::UDIV: 2570 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2571 break; 2572 case ISD::UREM: 2573 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2574 break; 2575 case ISD::SDIV: 2576 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2577 break; 2578 case ISD::SREM: 2579 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2580 break; 2581 case ISD::AND: return getConstant(C1 & C2, VT); 2582 case ISD::OR: return getConstant(C1 | C2, VT); 2583 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2584 case ISD::SHL: return getConstant(C1 << C2, VT); 2585 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2586 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2587 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2588 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2589 default: break; 2590 } 2591 2592 return SDValue(); 2593} 2594 2595SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2596 SDValue N1, SDValue N2) { 2597 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2598 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2599 switch (Opcode) { 2600 default: break; 2601 case ISD::TokenFactor: 2602 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2603 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2604 // Fold trivial token factors. 2605 if (N1.getOpcode() == ISD::EntryToken) return N2; 2606 if (N2.getOpcode() == ISD::EntryToken) return N1; 2607 if (N1 == N2) return N1; 2608 break; 2609 case ISD::CONCAT_VECTORS: 2610 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2611 // one big BUILD_VECTOR. 2612 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2613 N2.getOpcode() == ISD::BUILD_VECTOR) { 2614 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2615 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2616 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2617 } 2618 break; 2619 case ISD::AND: 2620 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2621 N1.getValueType() == VT && "Binary operator types must match!"); 2622 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2623 // worth handling here. 2624 if (N2C && N2C->isNullValue()) 2625 return N2; 2626 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2627 return N1; 2628 break; 2629 case ISD::OR: 2630 case ISD::XOR: 2631 case ISD::ADD: 2632 case ISD::SUB: 2633 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2634 N1.getValueType() == VT && "Binary operator types must match!"); 2635 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2636 // it's worth handling here. 2637 if (N2C && N2C->isNullValue()) 2638 return N1; 2639 break; 2640 case ISD::UDIV: 2641 case ISD::UREM: 2642 case ISD::MULHU: 2643 case ISD::MULHS: 2644 case ISD::MUL: 2645 case ISD::SDIV: 2646 case ISD::SREM: 2647 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2648 // fall through 2649 case ISD::FADD: 2650 case ISD::FSUB: 2651 case ISD::FMUL: 2652 case ISD::FDIV: 2653 case ISD::FREM: 2654 if (UnsafeFPMath) { 2655 if (Opcode == ISD::FADD) { 2656 // 0+x --> x 2657 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2658 if (CFP->getValueAPF().isZero()) 2659 return N2; 2660 // x+0 --> x 2661 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2662 if (CFP->getValueAPF().isZero()) 2663 return N1; 2664 } else if (Opcode == ISD::FSUB) { 2665 // x-0 --> x 2666 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2667 if (CFP->getValueAPF().isZero()) 2668 return N1; 2669 } 2670 } 2671 assert(N1.getValueType() == N2.getValueType() && 2672 N1.getValueType() == VT && "Binary operator types must match!"); 2673 break; 2674 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2675 assert(N1.getValueType() == VT && 2676 N1.getValueType().isFloatingPoint() && 2677 N2.getValueType().isFloatingPoint() && 2678 "Invalid FCOPYSIGN!"); 2679 break; 2680 case ISD::SHL: 2681 case ISD::SRA: 2682 case ISD::SRL: 2683 case ISD::ROTL: 2684 case ISD::ROTR: 2685 assert(VT == N1.getValueType() && 2686 "Shift operators return type must be the same as their first arg"); 2687 assert(VT.isInteger() && N2.getValueType().isInteger() && 2688 "Shifts only work on integers"); 2689 2690 // Always fold shifts of i1 values so the code generator doesn't need to 2691 // handle them. Since we know the size of the shift has to be less than the 2692 // size of the value, the shift/rotate count is guaranteed to be zero. 2693 if (VT == MVT::i1) 2694 return N1; 2695 if (N2C && N2C->isNullValue()) 2696 return N1; 2697 break; 2698 case ISD::FP_ROUND_INREG: { 2699 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2700 assert(VT == N1.getValueType() && "Not an inreg round!"); 2701 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2702 "Cannot FP_ROUND_INREG integer types"); 2703 assert(EVT.isVector() == VT.isVector() && 2704 "FP_ROUND_INREG type should be vector iff the operand " 2705 "type is vector!"); 2706 assert((!EVT.isVector() || 2707 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2708 "Vector element counts must match in FP_ROUND_INREG"); 2709 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2710 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2711 break; 2712 } 2713 case ISD::FP_ROUND: 2714 assert(VT.isFloatingPoint() && 2715 N1.getValueType().isFloatingPoint() && 2716 VT.bitsLE(N1.getValueType()) && 2717 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2718 if (N1.getValueType() == VT) return N1; // noop conversion. 2719 break; 2720 case ISD::AssertSext: 2721 case ISD::AssertZext: { 2722 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2723 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2724 assert(VT.isInteger() && EVT.isInteger() && 2725 "Cannot *_EXTEND_INREG FP types"); 2726 assert(!EVT.isVector() && 2727 "AssertSExt/AssertZExt type should be the vector element type " 2728 "rather than the vector type!"); 2729 assert(EVT.bitsLE(VT) && "Not extending!"); 2730 if (VT == EVT) return N1; // noop assertion. 2731 break; 2732 } 2733 case ISD::SIGN_EXTEND_INREG: { 2734 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2735 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2736 assert(VT.isInteger() && EVT.isInteger() && 2737 "Cannot *_EXTEND_INREG FP types"); 2738 assert(EVT.isVector() == VT.isVector() && 2739 "SIGN_EXTEND_INREG type should be vector iff the operand " 2740 "type is vector!"); 2741 assert((!EVT.isVector() || 2742 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2743 "Vector element counts must match in SIGN_EXTEND_INREG"); 2744 assert(EVT.bitsLE(VT) && "Not extending!"); 2745 if (EVT == VT) return N1; // Not actually extending 2746 2747 if (N1C) { 2748 APInt Val = N1C->getAPIntValue(); 2749 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2750 Val <<= Val.getBitWidth()-FromBits; 2751 Val = Val.ashr(Val.getBitWidth()-FromBits); 2752 return getConstant(Val, VT); 2753 } 2754 break; 2755 } 2756 case ISD::EXTRACT_VECTOR_ELT: 2757 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2758 if (N1.getOpcode() == ISD::UNDEF) 2759 return getUNDEF(VT); 2760 2761 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2762 // expanding copies of large vectors from registers. 2763 if (N2C && 2764 N1.getOpcode() == ISD::CONCAT_VECTORS && 2765 N1.getNumOperands() > 0) { 2766 unsigned Factor = 2767 N1.getOperand(0).getValueType().getVectorNumElements(); 2768 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2769 N1.getOperand(N2C->getZExtValue() / Factor), 2770 getConstant(N2C->getZExtValue() % Factor, 2771 N2.getValueType())); 2772 } 2773 2774 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2775 // expanding large vector constants. 2776 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2777 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2778 EVT VEltTy = N1.getValueType().getVectorElementType(); 2779 if (Elt.getValueType() != VEltTy) { 2780 // If the vector element type is not legal, the BUILD_VECTOR operands 2781 // are promoted and implicitly truncated. Make that explicit here. 2782 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2783 } 2784 if (VT != VEltTy) { 2785 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2786 // result is implicitly extended. 2787 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2788 } 2789 return Elt; 2790 } 2791 2792 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2793 // operations are lowered to scalars. 2794 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2795 // If the indices are the same, return the inserted element else 2796 // if the indices are known different, extract the element from 2797 // the original vector. 2798 if (N1.getOperand(2) == N2) { 2799 if (VT == N1.getOperand(1).getValueType()) 2800 return N1.getOperand(1); 2801 else 2802 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2803 } else if (isa<ConstantSDNode>(N1.getOperand(2)) && 2804 isa<ConstantSDNode>(N2)) 2805 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2806 } 2807 break; 2808 case ISD::EXTRACT_ELEMENT: 2809 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2810 assert(!N1.getValueType().isVector() && !VT.isVector() && 2811 (N1.getValueType().isInteger() == VT.isInteger()) && 2812 "Wrong types for EXTRACT_ELEMENT!"); 2813 2814 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2815 // 64-bit integers into 32-bit parts. Instead of building the extract of 2816 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2817 if (N1.getOpcode() == ISD::BUILD_PAIR) 2818 return N1.getOperand(N2C->getZExtValue()); 2819 2820 // EXTRACT_ELEMENT of a constant int is also very common. 2821 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2822 unsigned ElementSize = VT.getSizeInBits(); 2823 unsigned Shift = ElementSize * N2C->getZExtValue(); 2824 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2825 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2826 } 2827 break; 2828 case ISD::EXTRACT_SUBVECTOR: 2829 if (N1.getValueType() == VT) // Trivial extraction. 2830 return N1; 2831 break; 2832 } 2833 2834 if (N1C) { 2835 if (N2C) { 2836 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2837 if (SV.getNode()) return SV; 2838 } else { // Cannonicalize constant to RHS if commutative 2839 if (isCommutativeBinOp(Opcode)) { 2840 std::swap(N1C, N2C); 2841 std::swap(N1, N2); 2842 } 2843 } 2844 } 2845 2846 // Constant fold FP operations. 2847 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2848 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2849 if (N1CFP) { 2850 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2851 // Cannonicalize constant to RHS if commutative 2852 std::swap(N1CFP, N2CFP); 2853 std::swap(N1, N2); 2854 } else if (N2CFP && VT != MVT::ppcf128) { 2855 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2856 APFloat::opStatus s; 2857 switch (Opcode) { 2858 case ISD::FADD: 2859 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2860 if (s != APFloat::opInvalidOp) 2861 return getConstantFP(V1, VT); 2862 break; 2863 case ISD::FSUB: 2864 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2865 if (s!=APFloat::opInvalidOp) 2866 return getConstantFP(V1, VT); 2867 break; 2868 case ISD::FMUL: 2869 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2870 if (s!=APFloat::opInvalidOp) 2871 return getConstantFP(V1, VT); 2872 break; 2873 case ISD::FDIV: 2874 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2875 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2876 return getConstantFP(V1, VT); 2877 break; 2878 case ISD::FREM : 2879 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2880 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2881 return getConstantFP(V1, VT); 2882 break; 2883 case ISD::FCOPYSIGN: 2884 V1.copySign(V2); 2885 return getConstantFP(V1, VT); 2886 default: break; 2887 } 2888 } 2889 } 2890 2891 // Canonicalize an UNDEF to the RHS, even over a constant. 2892 if (N1.getOpcode() == ISD::UNDEF) { 2893 if (isCommutativeBinOp(Opcode)) { 2894 std::swap(N1, N2); 2895 } else { 2896 switch (Opcode) { 2897 case ISD::FP_ROUND_INREG: 2898 case ISD::SIGN_EXTEND_INREG: 2899 case ISD::SUB: 2900 case ISD::FSUB: 2901 case ISD::FDIV: 2902 case ISD::FREM: 2903 case ISD::SRA: 2904 return N1; // fold op(undef, arg2) -> undef 2905 case ISD::UDIV: 2906 case ISD::SDIV: 2907 case ISD::UREM: 2908 case ISD::SREM: 2909 case ISD::SRL: 2910 case ISD::SHL: 2911 if (!VT.isVector()) 2912 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2913 // For vectors, we can't easily build an all zero vector, just return 2914 // the LHS. 2915 return N2; 2916 } 2917 } 2918 } 2919 2920 // Fold a bunch of operators when the RHS is undef. 2921 if (N2.getOpcode() == ISD::UNDEF) { 2922 switch (Opcode) { 2923 case ISD::XOR: 2924 if (N1.getOpcode() == ISD::UNDEF) 2925 // Handle undef ^ undef -> 0 special case. This is a common 2926 // idiom (misuse). 2927 return getConstant(0, VT); 2928 // fallthrough 2929 case ISD::ADD: 2930 case ISD::ADDC: 2931 case ISD::ADDE: 2932 case ISD::SUB: 2933 case ISD::UDIV: 2934 case ISD::SDIV: 2935 case ISD::UREM: 2936 case ISD::SREM: 2937 return N2; // fold op(arg1, undef) -> undef 2938 case ISD::FADD: 2939 case ISD::FSUB: 2940 case ISD::FMUL: 2941 case ISD::FDIV: 2942 case ISD::FREM: 2943 if (UnsafeFPMath) 2944 return N2; 2945 break; 2946 case ISD::MUL: 2947 case ISD::AND: 2948 case ISD::SRL: 2949 case ISD::SHL: 2950 if (!VT.isVector()) 2951 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2952 // For vectors, we can't easily build an all zero vector, just return 2953 // the LHS. 2954 return N1; 2955 case ISD::OR: 2956 if (!VT.isVector()) 2957 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2958 // For vectors, we can't easily build an all one vector, just return 2959 // the LHS. 2960 return N1; 2961 case ISD::SRA: 2962 return N1; 2963 } 2964 } 2965 2966 // Memoize this node if possible. 2967 SDNode *N; 2968 SDVTList VTs = getVTList(VT); 2969 if (VT != MVT::Flag) { 2970 SDValue Ops[] = { N1, N2 }; 2971 FoldingSetNodeID ID; 2972 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2973 void *IP = 0; 2974 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2975 return SDValue(E, 0); 2976 2977 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2978 CSEMap.InsertNode(N, IP); 2979 } else { 2980 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2981 } 2982 2983 AllNodes.push_back(N); 2984#ifndef NDEBUG 2985 VerifyNode(N); 2986#endif 2987 return SDValue(N, 0); 2988} 2989 2990SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2991 SDValue N1, SDValue N2, SDValue N3) { 2992 // Perform various simplifications. 2993 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2994 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2995 switch (Opcode) { 2996 case ISD::CONCAT_VECTORS: 2997 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2998 // one big BUILD_VECTOR. 2999 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3000 N2.getOpcode() == ISD::BUILD_VECTOR && 3001 N3.getOpcode() == ISD::BUILD_VECTOR) { 3002 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 3003 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 3004 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 3005 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3006 } 3007 break; 3008 case ISD::SETCC: { 3009 // Use FoldSetCC to simplify SETCC's. 3010 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3011 if (Simp.getNode()) return Simp; 3012 break; 3013 } 3014 case ISD::SELECT: 3015 if (N1C) { 3016 if (N1C->getZExtValue()) 3017 return N2; // select true, X, Y -> X 3018 else 3019 return N3; // select false, X, Y -> Y 3020 } 3021 3022 if (N2 == N3) return N2; // select C, X, X -> X 3023 break; 3024 case ISD::BRCOND: 3025 if (N2C) { 3026 if (N2C->getZExtValue()) // Unconditional branch 3027 return getNode(ISD::BR, DL, MVT::Other, N1, N3); 3028 else 3029 return N1; // Never-taken branch 3030 } 3031 break; 3032 case ISD::VECTOR_SHUFFLE: 3033 llvm_unreachable("should use getVectorShuffle constructor!"); 3034 break; 3035 case ISD::BIT_CONVERT: 3036 // Fold bit_convert nodes from a type to themselves. 3037 if (N1.getValueType() == VT) 3038 return N1; 3039 break; 3040 } 3041 3042 // Memoize node if it doesn't produce a flag. 3043 SDNode *N; 3044 SDVTList VTs = getVTList(VT); 3045 if (VT != MVT::Flag) { 3046 SDValue Ops[] = { N1, N2, N3 }; 3047 FoldingSetNodeID ID; 3048 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3049 void *IP = 0; 3050 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3051 return SDValue(E, 0); 3052 3053 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3054 CSEMap.InsertNode(N, IP); 3055 } else { 3056 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3057 } 3058 3059 AllNodes.push_back(N); 3060#ifndef NDEBUG 3061 VerifyNode(N); 3062#endif 3063 return SDValue(N, 0); 3064} 3065 3066SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3067 SDValue N1, SDValue N2, SDValue N3, 3068 SDValue N4) { 3069 SDValue Ops[] = { N1, N2, N3, N4 }; 3070 return getNode(Opcode, DL, VT, Ops, 4); 3071} 3072 3073SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3074 SDValue N1, SDValue N2, SDValue N3, 3075 SDValue N4, SDValue N5) { 3076 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3077 return getNode(Opcode, DL, VT, Ops, 5); 3078} 3079 3080/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3081/// the incoming stack arguments to be loaded from the stack. 3082SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3083 SmallVector<SDValue, 8> ArgChains; 3084 3085 // Include the original chain at the beginning of the list. When this is 3086 // used by target LowerCall hooks, this helps legalize find the 3087 // CALLSEQ_BEGIN node. 3088 ArgChains.push_back(Chain); 3089 3090 // Add a chain value for each stack argument. 3091 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3092 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3093 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3094 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3095 if (FI->getIndex() < 0) 3096 ArgChains.push_back(SDValue(L, 1)); 3097 3098 // Build a tokenfactor for all the chains. 3099 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3100 &ArgChains[0], ArgChains.size()); 3101} 3102 3103/// getMemsetValue - Vectorized representation of the memset value 3104/// operand. 3105static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3106 DebugLoc dl) { 3107 assert(Value.getOpcode() != ISD::UNDEF); 3108 3109 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3110 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3111 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3112 unsigned Shift = 8; 3113 for (unsigned i = NumBits; i > 8; i >>= 1) { 3114 Val = (Val << Shift) | Val; 3115 Shift <<= 1; 3116 } 3117 if (VT.isInteger()) 3118 return DAG.getConstant(Val, VT); 3119 return DAG.getConstantFP(APFloat(Val), VT); 3120 } 3121 3122 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3123 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3124 unsigned Shift = 8; 3125 for (unsigned i = NumBits; i > 8; i >>= 1) { 3126 Value = DAG.getNode(ISD::OR, dl, VT, 3127 DAG.getNode(ISD::SHL, dl, VT, Value, 3128 DAG.getConstant(Shift, 3129 TLI.getShiftAmountTy())), 3130 Value); 3131 Shift <<= 1; 3132 } 3133 3134 return Value; 3135} 3136 3137/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3138/// used when a memcpy is turned into a memset when the source is a constant 3139/// string ptr. 3140static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3141 const TargetLowering &TLI, 3142 std::string &Str, unsigned Offset) { 3143 // Handle vector with all elements zero. 3144 if (Str.empty()) { 3145 if (VT.isInteger()) 3146 return DAG.getConstant(0, VT); 3147 else if (VT.getSimpleVT().SimpleTy == MVT::f32 || 3148 VT.getSimpleVT().SimpleTy == MVT::f64) 3149 return DAG.getConstantFP(0.0, VT); 3150 else if (VT.isVector()) { 3151 unsigned NumElts = VT.getVectorNumElements(); 3152 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3153 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3154 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3155 EltVT, NumElts))); 3156 } else 3157 llvm_unreachable("Expected type!"); 3158 } 3159 3160 assert(!VT.isVector() && "Can't handle vector type here!"); 3161 unsigned NumBits = VT.getSizeInBits(); 3162 unsigned MSB = NumBits / 8; 3163 uint64_t Val = 0; 3164 if (TLI.isLittleEndian()) 3165 Offset = Offset + MSB - 1; 3166 for (unsigned i = 0; i != MSB; ++i) { 3167 Val = (Val << 8) | (unsigned char)Str[Offset]; 3168 Offset += TLI.isLittleEndian() ? -1 : 1; 3169 } 3170 return DAG.getConstant(Val, VT); 3171} 3172 3173/// getMemBasePlusOffset - Returns base and offset node for the 3174/// 3175static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3176 SelectionDAG &DAG) { 3177 EVT VT = Base.getValueType(); 3178 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3179 VT, Base, DAG.getConstant(Offset, VT)); 3180} 3181 3182/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3183/// 3184static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3185 unsigned SrcDelta = 0; 3186 GlobalAddressSDNode *G = NULL; 3187 if (Src.getOpcode() == ISD::GlobalAddress) 3188 G = cast<GlobalAddressSDNode>(Src); 3189 else if (Src.getOpcode() == ISD::ADD && 3190 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3191 Src.getOperand(1).getOpcode() == ISD::Constant) { 3192 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3193 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3194 } 3195 if (!G) 3196 return false; 3197 3198 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3199 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3200 return true; 3201 3202 return false; 3203} 3204 3205/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3206/// to replace the memset / memcpy. Return true if the number of memory ops 3207/// is below the threshold. It returns the types of the sequence of 3208/// memory ops to perform memset / memcpy by reference. 3209static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3210 unsigned Limit, uint64_t Size, 3211 unsigned DstAlign, unsigned SrcAlign, 3212 bool NonScalarIntSafe, 3213 SelectionDAG &DAG, 3214 const TargetLowering &TLI) { 3215 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3216 "Expecting memcpy / memset source to meet alignment requirement!"); 3217 // If 'SrcAlign' is zero, that means the memory operation does not need load 3218 // the value, i.e. memset or memcpy from constant string. Otherwise, it's 3219 // the inferred alignment of the source. 'DstAlign', on the other hand, is the 3220 // specified alignment of the memory operation. If it is zero, that means 3221 // it's possible to change the alignment of the destination. 3222 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3223 NonScalarIntSafe, DAG); 3224 3225 if (VT == MVT::Other) { 3226 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3227 TLI.allowsUnalignedMemoryAccesses(VT)) { 3228 VT = TLI.getPointerTy(); 3229 } else { 3230 switch (DstAlign & 7) { 3231 case 0: VT = MVT::i64; break; 3232 case 4: VT = MVT::i32; break; 3233 case 2: VT = MVT::i16; break; 3234 default: VT = MVT::i8; break; 3235 } 3236 } 3237 3238 MVT LVT = MVT::i64; 3239 while (!TLI.isTypeLegal(LVT)) 3240 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3241 assert(LVT.isInteger()); 3242 3243 if (VT.bitsGT(LVT)) 3244 VT = LVT; 3245 } 3246 3247 unsigned NumMemOps = 0; 3248 while (Size != 0) { 3249 unsigned VTSize = VT.getSizeInBits() / 8; 3250 while (VTSize > Size) { 3251 // For now, only use non-vector load / store's for the left-over pieces. 3252 if (VT.isVector() || VT.isFloatingPoint()) { 3253 VT = MVT::i64; 3254 while (!TLI.isTypeLegal(VT)) 3255 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3256 VTSize = VT.getSizeInBits() / 8; 3257 } else { 3258 // This can result in a type that is not legal on the target, e.g. 3259 // 1 or 2 bytes on PPC. 3260 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3261 VTSize >>= 1; 3262 } 3263 } 3264 3265 if (++NumMemOps > Limit) 3266 return false; 3267 MemOps.push_back(VT); 3268 Size -= VTSize; 3269 } 3270 3271 return true; 3272} 3273 3274static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3275 SDValue Chain, SDValue Dst, 3276 SDValue Src, uint64_t Size, 3277 unsigned Align, bool isVol, 3278 bool AlwaysInline, 3279 const Value *DstSV, uint64_t DstSVOff, 3280 const Value *SrcSV, uint64_t SrcSVOff) { 3281 // Turn a memcpy of undef to nop. 3282 if (Src.getOpcode() == ISD::UNDEF) 3283 return Chain; 3284 3285 // Expand memcpy to a series of load and store ops if the size operand falls 3286 // below a certain threshold. 3287 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3288 std::vector<EVT> MemOps; 3289 uint64_t Limit = -1ULL; 3290 if (!AlwaysInline) 3291 Limit = TLI.getMaxStoresPerMemcpy(); 3292 bool DstAlignCanChange = false; 3293 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3294 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3295 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3296 DstAlignCanChange = true; 3297 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3298 if (Align > SrcAlign) 3299 SrcAlign = Align; 3300 std::string Str; 3301 bool CopyFromStr = isMemSrcFromString(Src, Str); 3302 bool isZeroStr = CopyFromStr && Str.empty(); 3303 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3304 (DstAlignCanChange ? 0 : Align), 3305 (isZeroStr ? 0 : SrcAlign), true, DAG, TLI)) 3306 return SDValue(); 3307 3308 if (DstAlignCanChange) { 3309 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3310 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3311 if (NewAlign > Align) { 3312 // Give the stack frame object a larger alignment if needed. 3313 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3314 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3315 Align = NewAlign; 3316 } 3317 } 3318 3319 SmallVector<SDValue, 8> OutChains; 3320 unsigned NumMemOps = MemOps.size(); 3321 uint64_t SrcOff = 0, DstOff = 0; 3322 for (unsigned i = 0; i != NumMemOps; ++i) { 3323 EVT VT = MemOps[i]; 3324 unsigned VTSize = VT.getSizeInBits() / 8; 3325 SDValue Value, Store; 3326 3327 if (CopyFromStr && 3328 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3329 // It's unlikely a store of a vector immediate can be done in a single 3330 // instruction. It would require a load from a constantpool first. 3331 // We only handle zero vectors here. 3332 // FIXME: Handle other cases where store of vector immediate is done in 3333 // a single instruction. 3334 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3335 Store = DAG.getStore(Chain, dl, Value, 3336 getMemBasePlusOffset(Dst, DstOff, DAG), 3337 DstSV, DstSVOff + DstOff, isVol, false, Align); 3338 } else { 3339 // The type might not be legal for the target. This should only happen 3340 // if the type is smaller than a legal type, as on PPC, so the right 3341 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3342 // to Load/Store if NVT==VT. 3343 // FIXME does the case above also need this? 3344 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3345 assert(NVT.bitsGE(VT)); 3346 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3347 getMemBasePlusOffset(Src, SrcOff, DAG), 3348 SrcSV, SrcSVOff + SrcOff, VT, isVol, false, 3349 MinAlign(SrcAlign, SrcOff)); 3350 Store = DAG.getTruncStore(Chain, dl, Value, 3351 getMemBasePlusOffset(Dst, DstOff, DAG), 3352 DstSV, DstSVOff + DstOff, VT, isVol, false, 3353 Align); 3354 } 3355 OutChains.push_back(Store); 3356 SrcOff += VTSize; 3357 DstOff += VTSize; 3358 } 3359 3360 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3361 &OutChains[0], OutChains.size()); 3362} 3363 3364static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3365 SDValue Chain, SDValue Dst, 3366 SDValue Src, uint64_t Size, 3367 unsigned Align, bool isVol, 3368 bool AlwaysInline, 3369 const Value *DstSV, uint64_t DstSVOff, 3370 const Value *SrcSV, uint64_t SrcSVOff) { 3371 // Turn a memmove of undef to nop. 3372 if (Src.getOpcode() == ISD::UNDEF) 3373 return Chain; 3374 3375 // Expand memmove to a series of load and store ops if the size operand falls 3376 // below a certain threshold. 3377 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3378 std::vector<EVT> MemOps; 3379 uint64_t Limit = -1ULL; 3380 if (!AlwaysInline) 3381 Limit = TLI.getMaxStoresPerMemmove(); 3382 bool DstAlignCanChange = false; 3383 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3384 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3385 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3386 DstAlignCanChange = true; 3387 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3388 if (Align > SrcAlign) 3389 SrcAlign = Align; 3390 3391 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3392 (DstAlignCanChange ? 0 : Align), 3393 SrcAlign, true, DAG, TLI)) 3394 return SDValue(); 3395 3396 if (DstAlignCanChange) { 3397 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3398 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3399 if (NewAlign > Align) { 3400 // Give the stack frame object a larger alignment if needed. 3401 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3402 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3403 Align = NewAlign; 3404 } 3405 } 3406 3407 uint64_t SrcOff = 0, DstOff = 0; 3408 SmallVector<SDValue, 8> LoadValues; 3409 SmallVector<SDValue, 8> LoadChains; 3410 SmallVector<SDValue, 8> OutChains; 3411 unsigned NumMemOps = MemOps.size(); 3412 for (unsigned i = 0; i < NumMemOps; i++) { 3413 EVT VT = MemOps[i]; 3414 unsigned VTSize = VT.getSizeInBits() / 8; 3415 SDValue Value, Store; 3416 3417 Value = DAG.getLoad(VT, dl, Chain, 3418 getMemBasePlusOffset(Src, SrcOff, DAG), 3419 SrcSV, SrcSVOff + SrcOff, isVol, false, SrcAlign); 3420 LoadValues.push_back(Value); 3421 LoadChains.push_back(Value.getValue(1)); 3422 SrcOff += VTSize; 3423 } 3424 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3425 &LoadChains[0], LoadChains.size()); 3426 OutChains.clear(); 3427 for (unsigned i = 0; i < NumMemOps; i++) { 3428 EVT VT = MemOps[i]; 3429 unsigned VTSize = VT.getSizeInBits() / 8; 3430 SDValue Value, Store; 3431 3432 Store = DAG.getStore(Chain, dl, LoadValues[i], 3433 getMemBasePlusOffset(Dst, DstOff, DAG), 3434 DstSV, DstSVOff + DstOff, isVol, false, Align); 3435 OutChains.push_back(Store); 3436 DstOff += VTSize; 3437 } 3438 3439 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3440 &OutChains[0], OutChains.size()); 3441} 3442 3443static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3444 SDValue Chain, SDValue Dst, 3445 SDValue Src, uint64_t Size, 3446 unsigned Align, bool isVol, 3447 const Value *DstSV, uint64_t DstSVOff) { 3448 // Turn a memset of undef to nop. 3449 if (Src.getOpcode() == ISD::UNDEF) 3450 return Chain; 3451 3452 // Expand memset to a series of load/store ops if the size operand 3453 // falls below a certain threshold. 3454 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3455 std::vector<EVT> MemOps; 3456 bool DstAlignCanChange = false; 3457 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3458 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3459 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3460 DstAlignCanChange = true; 3461 bool NonScalarIntSafe = 3462 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3463 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(), 3464 Size, (DstAlignCanChange ? 0 : Align), 0, 3465 NonScalarIntSafe, DAG, TLI)) 3466 return SDValue(); 3467 3468 if (DstAlignCanChange) { 3469 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3470 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3471 if (NewAlign > Align) { 3472 // Give the stack frame object a larger alignment if needed. 3473 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3474 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3475 Align = NewAlign; 3476 } 3477 } 3478 3479 SmallVector<SDValue, 8> OutChains; 3480 uint64_t DstOff = 0; 3481 unsigned NumMemOps = MemOps.size(); 3482 for (unsigned i = 0; i < NumMemOps; i++) { 3483 EVT VT = MemOps[i]; 3484 unsigned VTSize = VT.getSizeInBits() / 8; 3485 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3486 SDValue Store = DAG.getStore(Chain, dl, Value, 3487 getMemBasePlusOffset(Dst, DstOff, DAG), 3488 DstSV, DstSVOff + DstOff, isVol, false, 0); 3489 OutChains.push_back(Store); 3490 DstOff += VTSize; 3491 } 3492 3493 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3494 &OutChains[0], OutChains.size()); 3495} 3496 3497SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3498 SDValue Src, SDValue Size, 3499 unsigned Align, bool isVol, bool AlwaysInline, 3500 const Value *DstSV, uint64_t DstSVOff, 3501 const Value *SrcSV, uint64_t SrcSVOff) { 3502 3503 // Check to see if we should lower the memcpy to loads and stores first. 3504 // For cases within the target-specified limits, this is the best choice. 3505 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3506 if (ConstantSize) { 3507 // Memcpy with size zero? Just return the original chain. 3508 if (ConstantSize->isNullValue()) 3509 return Chain; 3510 3511 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3512 ConstantSize->getZExtValue(),Align, 3513 isVol, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3514 if (Result.getNode()) 3515 return Result; 3516 } 3517 3518 // Then check to see if we should lower the memcpy with target-specific 3519 // code. If the target chooses to do this, this is the next best. 3520 SDValue Result = 3521 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3522 isVol, AlwaysInline, 3523 DstSV, DstSVOff, SrcSV, SrcSVOff); 3524 if (Result.getNode()) 3525 return Result; 3526 3527 // If we really need inline code and the target declined to provide it, 3528 // use a (potentially long) sequence of loads and stores. 3529 if (AlwaysInline) { 3530 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3531 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3532 ConstantSize->getZExtValue(), Align, isVol, 3533 true, DstSV, DstSVOff, SrcSV, SrcSVOff); 3534 } 3535 3536 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3537 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3538 // respect volatile, so they may do things like read or write memory 3539 // beyond the given memory regions. But fixing this isn't easy, and most 3540 // people don't care. 3541 3542 // Emit a library call. 3543 TargetLowering::ArgListTy Args; 3544 TargetLowering::ArgListEntry Entry; 3545 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3546 Entry.Node = Dst; Args.push_back(Entry); 3547 Entry.Node = Src; Args.push_back(Entry); 3548 Entry.Node = Size; Args.push_back(Entry); 3549 // FIXME: pass in DebugLoc 3550 std::pair<SDValue,SDValue> CallResult = 3551 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3552 false, false, false, false, 0, 3553 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3554 /*isReturnValueUsed=*/false, 3555 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3556 TLI.getPointerTy()), 3557 Args, *this, dl); 3558 return CallResult.second; 3559} 3560 3561SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3562 SDValue Src, SDValue Size, 3563 unsigned Align, bool isVol, 3564 const Value *DstSV, uint64_t DstSVOff, 3565 const Value *SrcSV, uint64_t SrcSVOff) { 3566 3567 // Check to see if we should lower the memmove to loads and stores first. 3568 // For cases within the target-specified limits, this is the best choice. 3569 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3570 if (ConstantSize) { 3571 // Memmove with size zero? Just return the original chain. 3572 if (ConstantSize->isNullValue()) 3573 return Chain; 3574 3575 SDValue Result = 3576 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3577 ConstantSize->getZExtValue(), Align, isVol, 3578 false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3579 if (Result.getNode()) 3580 return Result; 3581 } 3582 3583 // Then check to see if we should lower the memmove with target-specific 3584 // code. If the target chooses to do this, this is the next best. 3585 SDValue Result = 3586 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3587 DstSV, DstSVOff, SrcSV, SrcSVOff); 3588 if (Result.getNode()) 3589 return Result; 3590 3591 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3592 // not be safe. See memcpy above for more details. 3593 3594 // Emit a library call. 3595 TargetLowering::ArgListTy Args; 3596 TargetLowering::ArgListEntry Entry; 3597 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3598 Entry.Node = Dst; Args.push_back(Entry); 3599 Entry.Node = Src; Args.push_back(Entry); 3600 Entry.Node = Size; Args.push_back(Entry); 3601 // FIXME: pass in DebugLoc 3602 std::pair<SDValue,SDValue> CallResult = 3603 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3604 false, false, false, false, 0, 3605 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3606 /*isReturnValueUsed=*/false, 3607 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3608 TLI.getPointerTy()), 3609 Args, *this, dl); 3610 return CallResult.second; 3611} 3612 3613SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3614 SDValue Src, SDValue Size, 3615 unsigned Align, bool isVol, 3616 const Value *DstSV, uint64_t DstSVOff) { 3617 3618 // Check to see if we should lower the memset to stores first. 3619 // For cases within the target-specified limits, this is the best choice. 3620 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3621 if (ConstantSize) { 3622 // Memset with size zero? Just return the original chain. 3623 if (ConstantSize->isNullValue()) 3624 return Chain; 3625 3626 SDValue Result = 3627 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3628 Align, isVol, DstSV, DstSVOff); 3629 3630 if (Result.getNode()) 3631 return Result; 3632 } 3633 3634 // Then check to see if we should lower the memset with target-specific 3635 // code. If the target chooses to do this, this is the next best. 3636 SDValue Result = 3637 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3638 DstSV, DstSVOff); 3639 if (Result.getNode()) 3640 return Result; 3641 3642 // Emit a library call. 3643 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3644 TargetLowering::ArgListTy Args; 3645 TargetLowering::ArgListEntry Entry; 3646 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3647 Args.push_back(Entry); 3648 // Extend or truncate the argument to be an i32 value for the call. 3649 if (Src.getValueType().bitsGT(MVT::i32)) 3650 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3651 else 3652 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3653 Entry.Node = Src; 3654 Entry.Ty = Type::getInt32Ty(*getContext()); 3655 Entry.isSExt = true; 3656 Args.push_back(Entry); 3657 Entry.Node = Size; 3658 Entry.Ty = IntPtrTy; 3659 Entry.isSExt = false; 3660 Args.push_back(Entry); 3661 // FIXME: pass in DebugLoc 3662 std::pair<SDValue,SDValue> CallResult = 3663 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3664 false, false, false, false, 0, 3665 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3666 /*isReturnValueUsed=*/false, 3667 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3668 TLI.getPointerTy()), 3669 Args, *this, dl); 3670 return CallResult.second; 3671} 3672 3673SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3674 SDValue Chain, 3675 SDValue Ptr, SDValue Cmp, 3676 SDValue Swp, const Value* PtrVal, 3677 unsigned Alignment) { 3678 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3679 Alignment = getEVTAlignment(MemVT); 3680 3681 // Check if the memory reference references a frame index 3682 if (!PtrVal) 3683 if (const FrameIndexSDNode *FI = 3684 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3685 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3686 3687 MachineFunction &MF = getMachineFunction(); 3688 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3689 3690 // For now, atomics are considered to be volatile always. 3691 Flags |= MachineMemOperand::MOVolatile; 3692 3693 MachineMemOperand *MMO = 3694 MF.getMachineMemOperand(PtrVal, Flags, 0, 3695 MemVT.getStoreSize(), Alignment); 3696 3697 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3698} 3699 3700SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3701 SDValue Chain, 3702 SDValue Ptr, SDValue Cmp, 3703 SDValue Swp, MachineMemOperand *MMO) { 3704 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3705 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3706 3707 EVT VT = Cmp.getValueType(); 3708 3709 SDVTList VTs = getVTList(VT, MVT::Other); 3710 FoldingSetNodeID ID; 3711 ID.AddInteger(MemVT.getRawBits()); 3712 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3713 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3714 void* IP = 0; 3715 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3716 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3717 return SDValue(E, 0); 3718 } 3719 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3720 Ptr, Cmp, Swp, MMO); 3721 CSEMap.InsertNode(N, IP); 3722 AllNodes.push_back(N); 3723 return SDValue(N, 0); 3724} 3725 3726SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3727 SDValue Chain, 3728 SDValue Ptr, SDValue Val, 3729 const Value* PtrVal, 3730 unsigned Alignment) { 3731 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3732 Alignment = getEVTAlignment(MemVT); 3733 3734 // Check if the memory reference references a frame index 3735 if (!PtrVal) 3736 if (const FrameIndexSDNode *FI = 3737 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3738 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3739 3740 MachineFunction &MF = getMachineFunction(); 3741 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3742 3743 // For now, atomics are considered to be volatile always. 3744 Flags |= MachineMemOperand::MOVolatile; 3745 3746 MachineMemOperand *MMO = 3747 MF.getMachineMemOperand(PtrVal, Flags, 0, 3748 MemVT.getStoreSize(), Alignment); 3749 3750 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3751} 3752 3753SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3754 SDValue Chain, 3755 SDValue Ptr, SDValue Val, 3756 MachineMemOperand *MMO) { 3757 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3758 Opcode == ISD::ATOMIC_LOAD_SUB || 3759 Opcode == ISD::ATOMIC_LOAD_AND || 3760 Opcode == ISD::ATOMIC_LOAD_OR || 3761 Opcode == ISD::ATOMIC_LOAD_XOR || 3762 Opcode == ISD::ATOMIC_LOAD_NAND || 3763 Opcode == ISD::ATOMIC_LOAD_MIN || 3764 Opcode == ISD::ATOMIC_LOAD_MAX || 3765 Opcode == ISD::ATOMIC_LOAD_UMIN || 3766 Opcode == ISD::ATOMIC_LOAD_UMAX || 3767 Opcode == ISD::ATOMIC_SWAP) && 3768 "Invalid Atomic Op"); 3769 3770 EVT VT = Val.getValueType(); 3771 3772 SDVTList VTs = getVTList(VT, MVT::Other); 3773 FoldingSetNodeID ID; 3774 ID.AddInteger(MemVT.getRawBits()); 3775 SDValue Ops[] = {Chain, Ptr, Val}; 3776 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3777 void* IP = 0; 3778 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3779 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3780 return SDValue(E, 0); 3781 } 3782 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3783 Ptr, Val, MMO); 3784 CSEMap.InsertNode(N, IP); 3785 AllNodes.push_back(N); 3786 return SDValue(N, 0); 3787} 3788 3789/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3790/// Allowed to return something different (and simpler) if Simplify is true. 3791SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3792 DebugLoc dl) { 3793 if (NumOps == 1) 3794 return Ops[0]; 3795 3796 SmallVector<EVT, 4> VTs; 3797 VTs.reserve(NumOps); 3798 for (unsigned i = 0; i < NumOps; ++i) 3799 VTs.push_back(Ops[i].getValueType()); 3800 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3801 Ops, NumOps); 3802} 3803 3804SDValue 3805SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3806 const EVT *VTs, unsigned NumVTs, 3807 const SDValue *Ops, unsigned NumOps, 3808 EVT MemVT, const Value *srcValue, int SVOff, 3809 unsigned Align, bool Vol, 3810 bool ReadMem, bool WriteMem) { 3811 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3812 MemVT, srcValue, SVOff, Align, Vol, 3813 ReadMem, WriteMem); 3814} 3815 3816SDValue 3817SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3818 const SDValue *Ops, unsigned NumOps, 3819 EVT MemVT, const Value *srcValue, int SVOff, 3820 unsigned Align, bool Vol, 3821 bool ReadMem, bool WriteMem) { 3822 if (Align == 0) // Ensure that codegen never sees alignment 0 3823 Align = getEVTAlignment(MemVT); 3824 3825 MachineFunction &MF = getMachineFunction(); 3826 unsigned Flags = 0; 3827 if (WriteMem) 3828 Flags |= MachineMemOperand::MOStore; 3829 if (ReadMem) 3830 Flags |= MachineMemOperand::MOLoad; 3831 if (Vol) 3832 Flags |= MachineMemOperand::MOVolatile; 3833 MachineMemOperand *MMO = 3834 MF.getMachineMemOperand(srcValue, Flags, SVOff, 3835 MemVT.getStoreSize(), Align); 3836 3837 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3838} 3839 3840SDValue 3841SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3842 const SDValue *Ops, unsigned NumOps, 3843 EVT MemVT, MachineMemOperand *MMO) { 3844 assert((Opcode == ISD::INTRINSIC_VOID || 3845 Opcode == ISD::INTRINSIC_W_CHAIN || 3846 (Opcode <= INT_MAX && 3847 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3848 "Opcode is not a memory-accessing opcode!"); 3849 3850 // Memoize the node unless it returns a flag. 3851 MemIntrinsicSDNode *N; 3852 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3853 FoldingSetNodeID ID; 3854 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3855 void *IP = 0; 3856 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3857 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3858 return SDValue(E, 0); 3859 } 3860 3861 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3862 MemVT, MMO); 3863 CSEMap.InsertNode(N, IP); 3864 } else { 3865 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3866 MemVT, MMO); 3867 } 3868 AllNodes.push_back(N); 3869 return SDValue(N, 0); 3870} 3871 3872SDValue 3873SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3874 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3875 SDValue Ptr, SDValue Offset, 3876 const Value *SV, int SVOffset, EVT MemVT, 3877 bool isVolatile, bool isNonTemporal, 3878 unsigned Alignment) { 3879 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3880 Alignment = getEVTAlignment(VT); 3881 3882 // Check if the memory reference references a frame index 3883 if (!SV) 3884 if (const FrameIndexSDNode *FI = 3885 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3886 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3887 3888 MachineFunction &MF = getMachineFunction(); 3889 unsigned Flags = MachineMemOperand::MOLoad; 3890 if (isVolatile) 3891 Flags |= MachineMemOperand::MOVolatile; 3892 if (isNonTemporal) 3893 Flags |= MachineMemOperand::MONonTemporal; 3894 MachineMemOperand *MMO = 3895 MF.getMachineMemOperand(SV, Flags, SVOffset, 3896 MemVT.getStoreSize(), Alignment); 3897 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO); 3898} 3899 3900SDValue 3901SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3902 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3903 SDValue Ptr, SDValue Offset, EVT MemVT, 3904 MachineMemOperand *MMO) { 3905 if (VT == MemVT) { 3906 ExtType = ISD::NON_EXTLOAD; 3907 } else if (ExtType == ISD::NON_EXTLOAD) { 3908 assert(VT == MemVT && "Non-extending load from different memory type!"); 3909 } else { 3910 // Extending load. 3911 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 3912 "Should only be an extending load, not truncating!"); 3913 assert(VT.isInteger() == MemVT.isInteger() && 3914 "Cannot convert from FP to Int or Int -> FP!"); 3915 assert(VT.isVector() == MemVT.isVector() && 3916 "Cannot use trunc store to convert to or from a vector!"); 3917 assert((!VT.isVector() || 3918 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 3919 "Cannot use trunc store to change the number of vector elements!"); 3920 } 3921 3922 bool Indexed = AM != ISD::UNINDEXED; 3923 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3924 "Unindexed load with an offset!"); 3925 3926 SDVTList VTs = Indexed ? 3927 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3928 SDValue Ops[] = { Chain, Ptr, Offset }; 3929 FoldingSetNodeID ID; 3930 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3931 ID.AddInteger(MemVT.getRawBits()); 3932 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 3933 MMO->isNonTemporal())); 3934 void *IP = 0; 3935 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3936 cast<LoadSDNode>(E)->refineAlignment(MMO); 3937 return SDValue(E, 0); 3938 } 3939 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 3940 MemVT, MMO); 3941 CSEMap.InsertNode(N, IP); 3942 AllNodes.push_back(N); 3943 return SDValue(N, 0); 3944} 3945 3946SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3947 SDValue Chain, SDValue Ptr, 3948 const Value *SV, int SVOffset, 3949 bool isVolatile, bool isNonTemporal, 3950 unsigned Alignment) { 3951 SDValue Undef = getUNDEF(Ptr.getValueType()); 3952 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3953 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment); 3954} 3955 3956SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3957 SDValue Chain, SDValue Ptr, 3958 const Value *SV, 3959 int SVOffset, EVT MemVT, 3960 bool isVolatile, bool isNonTemporal, 3961 unsigned Alignment) { 3962 SDValue Undef = getUNDEF(Ptr.getValueType()); 3963 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3964 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment); 3965} 3966 3967SDValue 3968SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3969 SDValue Offset, ISD::MemIndexedMode AM) { 3970 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3971 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3972 "Load is already a indexed load!"); 3973 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3974 LD->getChain(), Base, Offset, LD->getSrcValue(), 3975 LD->getSrcValueOffset(), LD->getMemoryVT(), 3976 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 3977} 3978 3979SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3980 SDValue Ptr, const Value *SV, int SVOffset, 3981 bool isVolatile, bool isNonTemporal, 3982 unsigned Alignment) { 3983 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3984 Alignment = getEVTAlignment(Val.getValueType()); 3985 3986 // Check if the memory reference references a frame index 3987 if (!SV) 3988 if (const FrameIndexSDNode *FI = 3989 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3990 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3991 3992 MachineFunction &MF = getMachineFunction(); 3993 unsigned Flags = MachineMemOperand::MOStore; 3994 if (isVolatile) 3995 Flags |= MachineMemOperand::MOVolatile; 3996 if (isNonTemporal) 3997 Flags |= MachineMemOperand::MONonTemporal; 3998 MachineMemOperand *MMO = 3999 MF.getMachineMemOperand(SV, Flags, SVOffset, 4000 Val.getValueType().getStoreSize(), Alignment); 4001 4002 return getStore(Chain, dl, Val, Ptr, MMO); 4003} 4004 4005SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4006 SDValue Ptr, MachineMemOperand *MMO) { 4007 EVT VT = Val.getValueType(); 4008 SDVTList VTs = getVTList(MVT::Other); 4009 SDValue Undef = getUNDEF(Ptr.getValueType()); 4010 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4011 FoldingSetNodeID ID; 4012 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4013 ID.AddInteger(VT.getRawBits()); 4014 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4015 MMO->isNonTemporal())); 4016 void *IP = 0; 4017 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4018 cast<StoreSDNode>(E)->refineAlignment(MMO); 4019 return SDValue(E, 0); 4020 } 4021 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4022 false, VT, MMO); 4023 CSEMap.InsertNode(N, IP); 4024 AllNodes.push_back(N); 4025 return SDValue(N, 0); 4026} 4027 4028SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4029 SDValue Ptr, const Value *SV, 4030 int SVOffset, EVT SVT, 4031 bool isVolatile, bool isNonTemporal, 4032 unsigned Alignment) { 4033 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4034 Alignment = getEVTAlignment(SVT); 4035 4036 // Check if the memory reference references a frame index 4037 if (!SV) 4038 if (const FrameIndexSDNode *FI = 4039 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 4040 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 4041 4042 MachineFunction &MF = getMachineFunction(); 4043 unsigned Flags = MachineMemOperand::MOStore; 4044 if (isVolatile) 4045 Flags |= MachineMemOperand::MOVolatile; 4046 if (isNonTemporal) 4047 Flags |= MachineMemOperand::MONonTemporal; 4048 MachineMemOperand *MMO = 4049 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment); 4050 4051 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4052} 4053 4054SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4055 SDValue Ptr, EVT SVT, 4056 MachineMemOperand *MMO) { 4057 EVT VT = Val.getValueType(); 4058 4059 if (VT == SVT) 4060 return getStore(Chain, dl, Val, Ptr, MMO); 4061 4062 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4063 "Should only be a truncating store, not extending!"); 4064 assert(VT.isInteger() == SVT.isInteger() && 4065 "Can't do FP-INT conversion!"); 4066 assert(VT.isVector() == SVT.isVector() && 4067 "Cannot use trunc store to convert to or from a vector!"); 4068 assert((!VT.isVector() || 4069 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4070 "Cannot use trunc store to change the number of vector elements!"); 4071 4072 SDVTList VTs = getVTList(MVT::Other); 4073 SDValue Undef = getUNDEF(Ptr.getValueType()); 4074 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4075 FoldingSetNodeID ID; 4076 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4077 ID.AddInteger(SVT.getRawBits()); 4078 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4079 MMO->isNonTemporal())); 4080 void *IP = 0; 4081 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4082 cast<StoreSDNode>(E)->refineAlignment(MMO); 4083 return SDValue(E, 0); 4084 } 4085 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4086 true, SVT, MMO); 4087 CSEMap.InsertNode(N, IP); 4088 AllNodes.push_back(N); 4089 return SDValue(N, 0); 4090} 4091 4092SDValue 4093SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4094 SDValue Offset, ISD::MemIndexedMode AM) { 4095 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4096 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4097 "Store is already a indexed store!"); 4098 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4099 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4100 FoldingSetNodeID ID; 4101 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4102 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4103 ID.AddInteger(ST->getRawSubclassData()); 4104 void *IP = 0; 4105 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4106 return SDValue(E, 0); 4107 4108 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4109 ST->isTruncatingStore(), 4110 ST->getMemoryVT(), 4111 ST->getMemOperand()); 4112 CSEMap.InsertNode(N, IP); 4113 AllNodes.push_back(N); 4114 return SDValue(N, 0); 4115} 4116 4117SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4118 SDValue Chain, SDValue Ptr, 4119 SDValue SV) { 4120 SDValue Ops[] = { Chain, Ptr, SV }; 4121 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 4122} 4123 4124SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4125 const SDUse *Ops, unsigned NumOps) { 4126 switch (NumOps) { 4127 case 0: return getNode(Opcode, DL, VT); 4128 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4129 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4130 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4131 default: break; 4132 } 4133 4134 // Copy from an SDUse array into an SDValue array for use with 4135 // the regular getNode logic. 4136 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4137 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4138} 4139 4140SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4141 const SDValue *Ops, unsigned NumOps) { 4142 switch (NumOps) { 4143 case 0: return getNode(Opcode, DL, VT); 4144 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4145 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4146 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4147 default: break; 4148 } 4149 4150 switch (Opcode) { 4151 default: break; 4152 case ISD::SELECT_CC: { 4153 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4154 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4155 "LHS and RHS of condition must have same type!"); 4156 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4157 "True and False arms of SelectCC must have same type!"); 4158 assert(Ops[2].getValueType() == VT && 4159 "select_cc node must be of same type as true and false value!"); 4160 break; 4161 } 4162 case ISD::BR_CC: { 4163 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4164 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4165 "LHS/RHS of comparison should match types!"); 4166 break; 4167 } 4168 } 4169 4170 // Memoize nodes. 4171 SDNode *N; 4172 SDVTList VTs = getVTList(VT); 4173 4174 if (VT != MVT::Flag) { 4175 FoldingSetNodeID ID; 4176 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4177 void *IP = 0; 4178 4179 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4180 return SDValue(E, 0); 4181 4182 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4183 CSEMap.InsertNode(N, IP); 4184 } else { 4185 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4186 } 4187 4188 AllNodes.push_back(N); 4189#ifndef NDEBUG 4190 VerifyNode(N); 4191#endif 4192 return SDValue(N, 0); 4193} 4194 4195SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4196 const std::vector<EVT> &ResultTys, 4197 const SDValue *Ops, unsigned NumOps) { 4198 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4199 Ops, NumOps); 4200} 4201 4202SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4203 const EVT *VTs, unsigned NumVTs, 4204 const SDValue *Ops, unsigned NumOps) { 4205 if (NumVTs == 1) 4206 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4207 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4208} 4209 4210SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4211 const SDValue *Ops, unsigned NumOps) { 4212 if (VTList.NumVTs == 1) 4213 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4214 4215#if 0 4216 switch (Opcode) { 4217 // FIXME: figure out how to safely handle things like 4218 // int foo(int x) { return 1 << (x & 255); } 4219 // int bar() { return foo(256); } 4220 case ISD::SRA_PARTS: 4221 case ISD::SRL_PARTS: 4222 case ISD::SHL_PARTS: 4223 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4224 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4225 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4226 else if (N3.getOpcode() == ISD::AND) 4227 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4228 // If the and is only masking out bits that cannot effect the shift, 4229 // eliminate the and. 4230 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4231 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4232 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4233 } 4234 break; 4235 } 4236#endif 4237 4238 // Memoize the node unless it returns a flag. 4239 SDNode *N; 4240 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4241 FoldingSetNodeID ID; 4242 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4243 void *IP = 0; 4244 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4245 return SDValue(E, 0); 4246 4247 if (NumOps == 1) { 4248 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4249 } else if (NumOps == 2) { 4250 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4251 } else if (NumOps == 3) { 4252 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4253 Ops[2]); 4254 } else { 4255 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4256 } 4257 CSEMap.InsertNode(N, IP); 4258 } else { 4259 if (NumOps == 1) { 4260 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4261 } else if (NumOps == 2) { 4262 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4263 } else if (NumOps == 3) { 4264 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4265 Ops[2]); 4266 } else { 4267 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4268 } 4269 } 4270 AllNodes.push_back(N); 4271#ifndef NDEBUG 4272 VerifyNode(N); 4273#endif 4274 return SDValue(N, 0); 4275} 4276 4277SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4278 return getNode(Opcode, DL, VTList, 0, 0); 4279} 4280 4281SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4282 SDValue N1) { 4283 SDValue Ops[] = { N1 }; 4284 return getNode(Opcode, DL, VTList, Ops, 1); 4285} 4286 4287SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4288 SDValue N1, SDValue N2) { 4289 SDValue Ops[] = { N1, N2 }; 4290 return getNode(Opcode, DL, VTList, Ops, 2); 4291} 4292 4293SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4294 SDValue N1, SDValue N2, SDValue N3) { 4295 SDValue Ops[] = { N1, N2, N3 }; 4296 return getNode(Opcode, DL, VTList, Ops, 3); 4297} 4298 4299SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4300 SDValue N1, SDValue N2, SDValue N3, 4301 SDValue N4) { 4302 SDValue Ops[] = { N1, N2, N3, N4 }; 4303 return getNode(Opcode, DL, VTList, Ops, 4); 4304} 4305 4306SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4307 SDValue N1, SDValue N2, SDValue N3, 4308 SDValue N4, SDValue N5) { 4309 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4310 return getNode(Opcode, DL, VTList, Ops, 5); 4311} 4312 4313SDVTList SelectionDAG::getVTList(EVT VT) { 4314 return makeVTList(SDNode::getValueTypeList(VT), 1); 4315} 4316 4317SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4318 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4319 E = VTList.rend(); I != E; ++I) 4320 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4321 return *I; 4322 4323 EVT *Array = Allocator.Allocate<EVT>(2); 4324 Array[0] = VT1; 4325 Array[1] = VT2; 4326 SDVTList Result = makeVTList(Array, 2); 4327 VTList.push_back(Result); 4328 return Result; 4329} 4330 4331SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4332 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4333 E = VTList.rend(); I != E; ++I) 4334 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4335 I->VTs[2] == VT3) 4336 return *I; 4337 4338 EVT *Array = Allocator.Allocate<EVT>(3); 4339 Array[0] = VT1; 4340 Array[1] = VT2; 4341 Array[2] = VT3; 4342 SDVTList Result = makeVTList(Array, 3); 4343 VTList.push_back(Result); 4344 return Result; 4345} 4346 4347SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4348 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4349 E = VTList.rend(); I != E; ++I) 4350 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4351 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4352 return *I; 4353 4354 EVT *Array = Allocator.Allocate<EVT>(4); 4355 Array[0] = VT1; 4356 Array[1] = VT2; 4357 Array[2] = VT3; 4358 Array[3] = VT4; 4359 SDVTList Result = makeVTList(Array, 4); 4360 VTList.push_back(Result); 4361 return Result; 4362} 4363 4364SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4365 switch (NumVTs) { 4366 case 0: llvm_unreachable("Cannot have nodes without results!"); 4367 case 1: return getVTList(VTs[0]); 4368 case 2: return getVTList(VTs[0], VTs[1]); 4369 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4370 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4371 default: break; 4372 } 4373 4374 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4375 E = VTList.rend(); I != E; ++I) { 4376 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4377 continue; 4378 4379 bool NoMatch = false; 4380 for (unsigned i = 2; i != NumVTs; ++i) 4381 if (VTs[i] != I->VTs[i]) { 4382 NoMatch = true; 4383 break; 4384 } 4385 if (!NoMatch) 4386 return *I; 4387 } 4388 4389 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4390 std::copy(VTs, VTs+NumVTs, Array); 4391 SDVTList Result = makeVTList(Array, NumVTs); 4392 VTList.push_back(Result); 4393 return Result; 4394} 4395 4396 4397/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4398/// specified operands. If the resultant node already exists in the DAG, 4399/// this does not modify the specified node, instead it returns the node that 4400/// already exists. If the resultant node does not exist in the DAG, the 4401/// input node is returned. As a degenerate case, if you specify the same 4402/// input operands as the node already has, the input node is returned. 4403SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4404 SDNode *N = InN.getNode(); 4405 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4406 4407 // Check to see if there is no change. 4408 if (Op == N->getOperand(0)) return InN; 4409 4410 // See if the modified node already exists. 4411 void *InsertPos = 0; 4412 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4413 return SDValue(Existing, InN.getResNo()); 4414 4415 // Nope it doesn't. Remove the node from its current place in the maps. 4416 if (InsertPos) 4417 if (!RemoveNodeFromCSEMaps(N)) 4418 InsertPos = 0; 4419 4420 // Now we update the operands. 4421 N->OperandList[0].set(Op); 4422 4423 // If this gets put into a CSE map, add it. 4424 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4425 return InN; 4426} 4427 4428SDValue SelectionDAG:: 4429UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4430 SDNode *N = InN.getNode(); 4431 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4432 4433 // Check to see if there is no change. 4434 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4435 return InN; // No operands changed, just return the input node. 4436 4437 // See if the modified node already exists. 4438 void *InsertPos = 0; 4439 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4440 return SDValue(Existing, InN.getResNo()); 4441 4442 // Nope it doesn't. Remove the node from its current place in the maps. 4443 if (InsertPos) 4444 if (!RemoveNodeFromCSEMaps(N)) 4445 InsertPos = 0; 4446 4447 // Now we update the operands. 4448 if (N->OperandList[0] != Op1) 4449 N->OperandList[0].set(Op1); 4450 if (N->OperandList[1] != Op2) 4451 N->OperandList[1].set(Op2); 4452 4453 // If this gets put into a CSE map, add it. 4454 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4455 return InN; 4456} 4457 4458SDValue SelectionDAG:: 4459UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4460 SDValue Ops[] = { Op1, Op2, Op3 }; 4461 return UpdateNodeOperands(N, Ops, 3); 4462} 4463 4464SDValue SelectionDAG:: 4465UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4466 SDValue Op3, SDValue Op4) { 4467 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4468 return UpdateNodeOperands(N, Ops, 4); 4469} 4470 4471SDValue SelectionDAG:: 4472UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4473 SDValue Op3, SDValue Op4, SDValue Op5) { 4474 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4475 return UpdateNodeOperands(N, Ops, 5); 4476} 4477 4478SDValue SelectionDAG:: 4479UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4480 SDNode *N = InN.getNode(); 4481 assert(N->getNumOperands() == NumOps && 4482 "Update with wrong number of operands"); 4483 4484 // Check to see if there is no change. 4485 bool AnyChange = false; 4486 for (unsigned i = 0; i != NumOps; ++i) { 4487 if (Ops[i] != N->getOperand(i)) { 4488 AnyChange = true; 4489 break; 4490 } 4491 } 4492 4493 // No operands changed, just return the input node. 4494 if (!AnyChange) return InN; 4495 4496 // See if the modified node already exists. 4497 void *InsertPos = 0; 4498 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4499 return SDValue(Existing, InN.getResNo()); 4500 4501 // Nope it doesn't. Remove the node from its current place in the maps. 4502 if (InsertPos) 4503 if (!RemoveNodeFromCSEMaps(N)) 4504 InsertPos = 0; 4505 4506 // Now we update the operands. 4507 for (unsigned i = 0; i != NumOps; ++i) 4508 if (N->OperandList[i] != Ops[i]) 4509 N->OperandList[i].set(Ops[i]); 4510 4511 // If this gets put into a CSE map, add it. 4512 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4513 return InN; 4514} 4515 4516/// DropOperands - Release the operands and set this node to have 4517/// zero operands. 4518void SDNode::DropOperands() { 4519 // Unlike the code in MorphNodeTo that does this, we don't need to 4520 // watch for dead nodes here. 4521 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4522 SDUse &Use = *I++; 4523 Use.set(SDValue()); 4524 } 4525} 4526 4527/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4528/// machine opcode. 4529/// 4530SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4531 EVT VT) { 4532 SDVTList VTs = getVTList(VT); 4533 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4534} 4535 4536SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4537 EVT VT, SDValue Op1) { 4538 SDVTList VTs = getVTList(VT); 4539 SDValue Ops[] = { Op1 }; 4540 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4541} 4542 4543SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4544 EVT VT, SDValue Op1, 4545 SDValue Op2) { 4546 SDVTList VTs = getVTList(VT); 4547 SDValue Ops[] = { Op1, Op2 }; 4548 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4549} 4550 4551SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4552 EVT VT, SDValue Op1, 4553 SDValue Op2, SDValue Op3) { 4554 SDVTList VTs = getVTList(VT); 4555 SDValue Ops[] = { Op1, Op2, Op3 }; 4556 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4557} 4558 4559SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4560 EVT VT, const SDValue *Ops, 4561 unsigned NumOps) { 4562 SDVTList VTs = getVTList(VT); 4563 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4564} 4565 4566SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4567 EVT VT1, EVT VT2, const SDValue *Ops, 4568 unsigned NumOps) { 4569 SDVTList VTs = getVTList(VT1, VT2); 4570 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4571} 4572 4573SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4574 EVT VT1, EVT VT2) { 4575 SDVTList VTs = getVTList(VT1, VT2); 4576 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4577} 4578 4579SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4580 EVT VT1, EVT VT2, EVT VT3, 4581 const SDValue *Ops, unsigned NumOps) { 4582 SDVTList VTs = getVTList(VT1, VT2, VT3); 4583 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4584} 4585 4586SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4587 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4588 const SDValue *Ops, unsigned NumOps) { 4589 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4590 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4591} 4592 4593SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4594 EVT VT1, EVT VT2, 4595 SDValue Op1) { 4596 SDVTList VTs = getVTList(VT1, VT2); 4597 SDValue Ops[] = { Op1 }; 4598 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4599} 4600 4601SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4602 EVT VT1, EVT VT2, 4603 SDValue Op1, SDValue Op2) { 4604 SDVTList VTs = getVTList(VT1, VT2); 4605 SDValue Ops[] = { Op1, Op2 }; 4606 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4607} 4608 4609SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4610 EVT VT1, EVT VT2, 4611 SDValue Op1, SDValue Op2, 4612 SDValue Op3) { 4613 SDVTList VTs = getVTList(VT1, VT2); 4614 SDValue Ops[] = { Op1, Op2, Op3 }; 4615 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4616} 4617 4618SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4619 EVT VT1, EVT VT2, EVT VT3, 4620 SDValue Op1, SDValue Op2, 4621 SDValue Op3) { 4622 SDVTList VTs = getVTList(VT1, VT2, VT3); 4623 SDValue Ops[] = { Op1, Op2, Op3 }; 4624 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4625} 4626 4627SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4628 SDVTList VTs, const SDValue *Ops, 4629 unsigned NumOps) { 4630 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4631 // Reset the NodeID to -1. 4632 N->setNodeId(-1); 4633 return N; 4634} 4635 4636/// MorphNodeTo - This *mutates* the specified node to have the specified 4637/// return type, opcode, and operands. 4638/// 4639/// Note that MorphNodeTo returns the resultant node. If there is already a 4640/// node of the specified opcode and operands, it returns that node instead of 4641/// the current one. Note that the DebugLoc need not be the same. 4642/// 4643/// Using MorphNodeTo is faster than creating a new node and swapping it in 4644/// with ReplaceAllUsesWith both because it often avoids allocating a new 4645/// node, and because it doesn't require CSE recalculation for any of 4646/// the node's users. 4647/// 4648SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4649 SDVTList VTs, const SDValue *Ops, 4650 unsigned NumOps) { 4651 // If an identical node already exists, use it. 4652 void *IP = 0; 4653 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4654 FoldingSetNodeID ID; 4655 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4656 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4657 return ON; 4658 } 4659 4660 if (!RemoveNodeFromCSEMaps(N)) 4661 IP = 0; 4662 4663 // Start the morphing. 4664 N->NodeType = Opc; 4665 N->ValueList = VTs.VTs; 4666 N->NumValues = VTs.NumVTs; 4667 4668 // Clear the operands list, updating used nodes to remove this from their 4669 // use list. Keep track of any operands that become dead as a result. 4670 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4671 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4672 SDUse &Use = *I++; 4673 SDNode *Used = Use.getNode(); 4674 Use.set(SDValue()); 4675 if (Used->use_empty()) 4676 DeadNodeSet.insert(Used); 4677 } 4678 4679 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4680 // Initialize the memory references information. 4681 MN->setMemRefs(0, 0); 4682 // If NumOps is larger than the # of operands we can have in a 4683 // MachineSDNode, reallocate the operand list. 4684 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4685 if (MN->OperandsNeedDelete) 4686 delete[] MN->OperandList; 4687 if (NumOps > array_lengthof(MN->LocalOperands)) 4688 // We're creating a final node that will live unmorphed for the 4689 // remainder of the current SelectionDAG iteration, so we can allocate 4690 // the operands directly out of a pool with no recycling metadata. 4691 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4692 Ops, NumOps); 4693 else 4694 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4695 MN->OperandsNeedDelete = false; 4696 } else 4697 MN->InitOperands(MN->OperandList, Ops, NumOps); 4698 } else { 4699 // If NumOps is larger than the # of operands we currently have, reallocate 4700 // the operand list. 4701 if (NumOps > N->NumOperands) { 4702 if (N->OperandsNeedDelete) 4703 delete[] N->OperandList; 4704 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4705 N->OperandsNeedDelete = true; 4706 } else 4707 N->InitOperands(N->OperandList, Ops, NumOps); 4708 } 4709 4710 // Delete any nodes that are still dead after adding the uses for the 4711 // new operands. 4712 if (!DeadNodeSet.empty()) { 4713 SmallVector<SDNode *, 16> DeadNodes; 4714 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4715 E = DeadNodeSet.end(); I != E; ++I) 4716 if ((*I)->use_empty()) 4717 DeadNodes.push_back(*I); 4718 RemoveDeadNodes(DeadNodes); 4719 } 4720 4721 if (IP) 4722 CSEMap.InsertNode(N, IP); // Memoize the new node. 4723 return N; 4724} 4725 4726 4727/// getMachineNode - These are used for target selectors to create a new node 4728/// with specified return type(s), MachineInstr opcode, and operands. 4729/// 4730/// Note that getMachineNode returns the resultant node. If there is already a 4731/// node of the specified opcode and operands, it returns that node instead of 4732/// the current one. 4733MachineSDNode * 4734SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4735 SDVTList VTs = getVTList(VT); 4736 return getMachineNode(Opcode, dl, VTs, 0, 0); 4737} 4738 4739MachineSDNode * 4740SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4741 SDVTList VTs = getVTList(VT); 4742 SDValue Ops[] = { Op1 }; 4743 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4744} 4745 4746MachineSDNode * 4747SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4748 SDValue Op1, SDValue Op2) { 4749 SDVTList VTs = getVTList(VT); 4750 SDValue Ops[] = { Op1, Op2 }; 4751 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4752} 4753 4754MachineSDNode * 4755SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4756 SDValue Op1, SDValue Op2, SDValue Op3) { 4757 SDVTList VTs = getVTList(VT); 4758 SDValue Ops[] = { Op1, Op2, Op3 }; 4759 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4760} 4761 4762MachineSDNode * 4763SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4764 const SDValue *Ops, unsigned NumOps) { 4765 SDVTList VTs = getVTList(VT); 4766 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4767} 4768 4769MachineSDNode * 4770SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4771 SDVTList VTs = getVTList(VT1, VT2); 4772 return getMachineNode(Opcode, dl, VTs, 0, 0); 4773} 4774 4775MachineSDNode * 4776SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4777 EVT VT1, EVT VT2, SDValue Op1) { 4778 SDVTList VTs = getVTList(VT1, VT2); 4779 SDValue Ops[] = { Op1 }; 4780 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4781} 4782 4783MachineSDNode * 4784SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4785 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4786 SDVTList VTs = getVTList(VT1, VT2); 4787 SDValue Ops[] = { Op1, Op2 }; 4788 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4789} 4790 4791MachineSDNode * 4792SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4793 EVT VT1, EVT VT2, SDValue Op1, 4794 SDValue Op2, SDValue Op3) { 4795 SDVTList VTs = getVTList(VT1, VT2); 4796 SDValue Ops[] = { Op1, Op2, Op3 }; 4797 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4798} 4799 4800MachineSDNode * 4801SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4802 EVT VT1, EVT VT2, 4803 const SDValue *Ops, unsigned NumOps) { 4804 SDVTList VTs = getVTList(VT1, VT2); 4805 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4806} 4807 4808MachineSDNode * 4809SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4810 EVT VT1, EVT VT2, EVT VT3, 4811 SDValue Op1, SDValue Op2) { 4812 SDVTList VTs = getVTList(VT1, VT2, VT3); 4813 SDValue Ops[] = { Op1, Op2 }; 4814 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4815} 4816 4817MachineSDNode * 4818SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4819 EVT VT1, EVT VT2, EVT VT3, 4820 SDValue Op1, SDValue Op2, SDValue Op3) { 4821 SDVTList VTs = getVTList(VT1, VT2, VT3); 4822 SDValue Ops[] = { Op1, Op2, Op3 }; 4823 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4824} 4825 4826MachineSDNode * 4827SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4828 EVT VT1, EVT VT2, EVT VT3, 4829 const SDValue *Ops, unsigned NumOps) { 4830 SDVTList VTs = getVTList(VT1, VT2, VT3); 4831 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4832} 4833 4834MachineSDNode * 4835SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4836 EVT VT2, EVT VT3, EVT VT4, 4837 const SDValue *Ops, unsigned NumOps) { 4838 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4839 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4840} 4841 4842MachineSDNode * 4843SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4844 const std::vector<EVT> &ResultTys, 4845 const SDValue *Ops, unsigned NumOps) { 4846 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4847 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4848} 4849 4850MachineSDNode * 4851SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4852 const SDValue *Ops, unsigned NumOps) { 4853 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4854 MachineSDNode *N; 4855 void *IP; 4856 4857 if (DoCSE) { 4858 FoldingSetNodeID ID; 4859 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4860 IP = 0; 4861 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4862 return cast<MachineSDNode>(E); 4863 } 4864 4865 // Allocate a new MachineSDNode. 4866 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 4867 4868 // Initialize the operands list. 4869 if (NumOps > array_lengthof(N->LocalOperands)) 4870 // We're creating a final node that will live unmorphed for the 4871 // remainder of the current SelectionDAG iteration, so we can allocate 4872 // the operands directly out of a pool with no recycling metadata. 4873 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4874 Ops, NumOps); 4875 else 4876 N->InitOperands(N->LocalOperands, Ops, NumOps); 4877 N->OperandsNeedDelete = false; 4878 4879 if (DoCSE) 4880 CSEMap.InsertNode(N, IP); 4881 4882 AllNodes.push_back(N); 4883#ifndef NDEBUG 4884 VerifyNode(N); 4885#endif 4886 return N; 4887} 4888 4889/// getTargetExtractSubreg - A convenience function for creating 4890/// TargetOpcode::EXTRACT_SUBREG nodes. 4891SDValue 4892SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4893 SDValue Operand) { 4894 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4895 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 4896 VT, Operand, SRIdxVal); 4897 return SDValue(Subreg, 0); 4898} 4899 4900/// getTargetInsertSubreg - A convenience function for creating 4901/// TargetOpcode::INSERT_SUBREG nodes. 4902SDValue 4903SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4904 SDValue Operand, SDValue Subreg) { 4905 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4906 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 4907 VT, Operand, Subreg, SRIdxVal); 4908 return SDValue(Result, 0); 4909} 4910 4911/// getNodeIfExists - Get the specified node if it's already available, or 4912/// else return NULL. 4913SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4914 const SDValue *Ops, unsigned NumOps) { 4915 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4916 FoldingSetNodeID ID; 4917 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4918 void *IP = 0; 4919 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4920 return E; 4921 } 4922 return NULL; 4923} 4924 4925/// getDbgValue - Creates a SDDbgValue node. 4926/// 4927SDDbgValue * 4928SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 4929 DebugLoc DL, unsigned O) { 4930 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 4931} 4932 4933SDDbgValue * 4934SelectionDAG::getDbgValue(MDNode *MDPtr, Value *C, uint64_t Off, 4935 DebugLoc DL, unsigned O) { 4936 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 4937} 4938 4939SDDbgValue * 4940SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 4941 DebugLoc DL, unsigned O) { 4942 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 4943} 4944 4945namespace { 4946 4947/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 4948/// pointed to by a use iterator is deleted, increment the use iterator 4949/// so that it doesn't dangle. 4950/// 4951/// This class also manages a "downlink" DAGUpdateListener, to forward 4952/// messages to ReplaceAllUsesWith's callers. 4953/// 4954class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 4955 SelectionDAG::DAGUpdateListener *DownLink; 4956 SDNode::use_iterator &UI; 4957 SDNode::use_iterator &UE; 4958 4959 virtual void NodeDeleted(SDNode *N, SDNode *E) { 4960 // Increment the iterator as needed. 4961 while (UI != UE && N == *UI) 4962 ++UI; 4963 4964 // Then forward the message. 4965 if (DownLink) DownLink->NodeDeleted(N, E); 4966 } 4967 4968 virtual void NodeUpdated(SDNode *N) { 4969 // Just forward the message. 4970 if (DownLink) DownLink->NodeUpdated(N); 4971 } 4972 4973public: 4974 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 4975 SDNode::use_iterator &ui, 4976 SDNode::use_iterator &ue) 4977 : DownLink(dl), UI(ui), UE(ue) {} 4978}; 4979 4980} 4981 4982/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4983/// This can cause recursive merging of nodes in the DAG. 4984/// 4985/// This version assumes From has a single result value. 4986/// 4987void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4988 DAGUpdateListener *UpdateListener) { 4989 SDNode *From = FromN.getNode(); 4990 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4991 "Cannot replace with this method!"); 4992 assert(From != To.getNode() && "Cannot replace uses of with self"); 4993 4994 // Iterate over all the existing uses of From. New uses will be added 4995 // to the beginning of the use list, which we avoid visiting. 4996 // This specifically avoids visiting uses of From that arise while the 4997 // replacement is happening, because any such uses would be the result 4998 // of CSE: If an existing node looks like From after one of its operands 4999 // is replaced by To, we don't want to replace of all its users with To 5000 // too. See PR3018 for more info. 5001 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5002 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5003 while (UI != UE) { 5004 SDNode *User = *UI; 5005 5006 // This node is about to morph, remove its old self from the CSE maps. 5007 RemoveNodeFromCSEMaps(User); 5008 5009 // A user can appear in a use list multiple times, and when this 5010 // happens the uses are usually next to each other in the list. 5011 // To help reduce the number of CSE recomputations, process all 5012 // the uses of this user that we can find this way. 5013 do { 5014 SDUse &Use = UI.getUse(); 5015 ++UI; 5016 Use.set(To); 5017 } while (UI != UE && *UI == User); 5018 5019 // Now that we have modified User, add it back to the CSE maps. If it 5020 // already exists there, recursively merge the results together. 5021 AddModifiedNodeToCSEMaps(User, &Listener); 5022 } 5023} 5024 5025/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5026/// This can cause recursive merging of nodes in the DAG. 5027/// 5028/// This version assumes that for each value of From, there is a 5029/// corresponding value in To in the same position with the same type. 5030/// 5031void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5032 DAGUpdateListener *UpdateListener) { 5033#ifndef NDEBUG 5034 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5035 assert((!From->hasAnyUseOfValue(i) || 5036 From->getValueType(i) == To->getValueType(i)) && 5037 "Cannot use this version of ReplaceAllUsesWith!"); 5038#endif 5039 5040 // Handle the trivial case. 5041 if (From == To) 5042 return; 5043 5044 // Iterate over just the existing users of From. See the comments in 5045 // the ReplaceAllUsesWith above. 5046 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5047 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5048 while (UI != UE) { 5049 SDNode *User = *UI; 5050 5051 // This node is about to morph, remove its old self from the CSE maps. 5052 RemoveNodeFromCSEMaps(User); 5053 5054 // A user can appear in a use list multiple times, and when this 5055 // happens the uses are usually next to each other in the list. 5056 // To help reduce the number of CSE recomputations, process all 5057 // the uses of this user that we can find this way. 5058 do { 5059 SDUse &Use = UI.getUse(); 5060 ++UI; 5061 Use.setNode(To); 5062 } while (UI != UE && *UI == User); 5063 5064 // Now that we have modified User, add it back to the CSE maps. If it 5065 // already exists there, recursively merge the results together. 5066 AddModifiedNodeToCSEMaps(User, &Listener); 5067 } 5068} 5069 5070/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5071/// This can cause recursive merging of nodes in the DAG. 5072/// 5073/// This version can replace From with any result values. To must match the 5074/// number and types of values returned by From. 5075void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5076 const SDValue *To, 5077 DAGUpdateListener *UpdateListener) { 5078 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5079 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5080 5081 // Iterate over just the existing users of From. See the comments in 5082 // the ReplaceAllUsesWith above. 5083 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5084 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5085 while (UI != UE) { 5086 SDNode *User = *UI; 5087 5088 // This node is about to morph, remove its old self from the CSE maps. 5089 RemoveNodeFromCSEMaps(User); 5090 5091 // A user can appear in a use list multiple times, and when this 5092 // happens the uses are usually next to each other in the list. 5093 // To help reduce the number of CSE recomputations, process all 5094 // the uses of this user that we can find this way. 5095 do { 5096 SDUse &Use = UI.getUse(); 5097 const SDValue &ToOp = To[Use.getResNo()]; 5098 ++UI; 5099 Use.set(ToOp); 5100 } while (UI != UE && *UI == User); 5101 5102 // Now that we have modified User, add it back to the CSE maps. If it 5103 // already exists there, recursively merge the results together. 5104 AddModifiedNodeToCSEMaps(User, &Listener); 5105 } 5106} 5107 5108/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5109/// uses of other values produced by From.getNode() alone. The Deleted 5110/// vector is handled the same way as for ReplaceAllUsesWith. 5111void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5112 DAGUpdateListener *UpdateListener){ 5113 // Handle the really simple, really trivial case efficiently. 5114 if (From == To) return; 5115 5116 // Handle the simple, trivial, case efficiently. 5117 if (From.getNode()->getNumValues() == 1) { 5118 ReplaceAllUsesWith(From, To, UpdateListener); 5119 return; 5120 } 5121 5122 // Iterate over just the existing users of From. See the comments in 5123 // the ReplaceAllUsesWith above. 5124 SDNode::use_iterator UI = From.getNode()->use_begin(), 5125 UE = From.getNode()->use_end(); 5126 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5127 while (UI != UE) { 5128 SDNode *User = *UI; 5129 bool UserRemovedFromCSEMaps = false; 5130 5131 // A user can appear in a use list multiple times, and when this 5132 // happens the uses are usually next to each other in the list. 5133 // To help reduce the number of CSE recomputations, process all 5134 // the uses of this user that we can find this way. 5135 do { 5136 SDUse &Use = UI.getUse(); 5137 5138 // Skip uses of different values from the same node. 5139 if (Use.getResNo() != From.getResNo()) { 5140 ++UI; 5141 continue; 5142 } 5143 5144 // If this node hasn't been modified yet, it's still in the CSE maps, 5145 // so remove its old self from the CSE maps. 5146 if (!UserRemovedFromCSEMaps) { 5147 RemoveNodeFromCSEMaps(User); 5148 UserRemovedFromCSEMaps = true; 5149 } 5150 5151 ++UI; 5152 Use.set(To); 5153 } while (UI != UE && *UI == User); 5154 5155 // We are iterating over all uses of the From node, so if a use 5156 // doesn't use the specific value, no changes are made. 5157 if (!UserRemovedFromCSEMaps) 5158 continue; 5159 5160 // Now that we have modified User, add it back to the CSE maps. If it 5161 // already exists there, recursively merge the results together. 5162 AddModifiedNodeToCSEMaps(User, &Listener); 5163 } 5164} 5165 5166namespace { 5167 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5168 /// to record information about a use. 5169 struct UseMemo { 5170 SDNode *User; 5171 unsigned Index; 5172 SDUse *Use; 5173 }; 5174 5175 /// operator< - Sort Memos by User. 5176 bool operator<(const UseMemo &L, const UseMemo &R) { 5177 return (intptr_t)L.User < (intptr_t)R.User; 5178 } 5179} 5180 5181/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5182/// uses of other values produced by From.getNode() alone. The same value 5183/// may appear in both the From and To list. The Deleted vector is 5184/// handled the same way as for ReplaceAllUsesWith. 5185void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5186 const SDValue *To, 5187 unsigned Num, 5188 DAGUpdateListener *UpdateListener){ 5189 // Handle the simple, trivial case efficiently. 5190 if (Num == 1) 5191 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5192 5193 // Read up all the uses and make records of them. This helps 5194 // processing new uses that are introduced during the 5195 // replacement process. 5196 SmallVector<UseMemo, 4> Uses; 5197 for (unsigned i = 0; i != Num; ++i) { 5198 unsigned FromResNo = From[i].getResNo(); 5199 SDNode *FromNode = From[i].getNode(); 5200 for (SDNode::use_iterator UI = FromNode->use_begin(), 5201 E = FromNode->use_end(); UI != E; ++UI) { 5202 SDUse &Use = UI.getUse(); 5203 if (Use.getResNo() == FromResNo) { 5204 UseMemo Memo = { *UI, i, &Use }; 5205 Uses.push_back(Memo); 5206 } 5207 } 5208 } 5209 5210 // Sort the uses, so that all the uses from a given User are together. 5211 std::sort(Uses.begin(), Uses.end()); 5212 5213 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5214 UseIndex != UseIndexEnd; ) { 5215 // We know that this user uses some value of From. If it is the right 5216 // value, update it. 5217 SDNode *User = Uses[UseIndex].User; 5218 5219 // This node is about to morph, remove its old self from the CSE maps. 5220 RemoveNodeFromCSEMaps(User); 5221 5222 // The Uses array is sorted, so all the uses for a given User 5223 // are next to each other in the list. 5224 // To help reduce the number of CSE recomputations, process all 5225 // the uses of this user that we can find this way. 5226 do { 5227 unsigned i = Uses[UseIndex].Index; 5228 SDUse &Use = *Uses[UseIndex].Use; 5229 ++UseIndex; 5230 5231 Use.set(To[i]); 5232 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5233 5234 // Now that we have modified User, add it back to the CSE maps. If it 5235 // already exists there, recursively merge the results together. 5236 AddModifiedNodeToCSEMaps(User, UpdateListener); 5237 } 5238} 5239 5240/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5241/// based on their topological order. It returns the maximum id and a vector 5242/// of the SDNodes* in assigned order by reference. 5243unsigned SelectionDAG::AssignTopologicalOrder() { 5244 5245 unsigned DAGSize = 0; 5246 5247 // SortedPos tracks the progress of the algorithm. Nodes before it are 5248 // sorted, nodes after it are unsorted. When the algorithm completes 5249 // it is at the end of the list. 5250 allnodes_iterator SortedPos = allnodes_begin(); 5251 5252 // Visit all the nodes. Move nodes with no operands to the front of 5253 // the list immediately. Annotate nodes that do have operands with their 5254 // operand count. Before we do this, the Node Id fields of the nodes 5255 // may contain arbitrary values. After, the Node Id fields for nodes 5256 // before SortedPos will contain the topological sort index, and the 5257 // Node Id fields for nodes At SortedPos and after will contain the 5258 // count of outstanding operands. 5259 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5260 SDNode *N = I++; 5261 checkForCycles(N); 5262 unsigned Degree = N->getNumOperands(); 5263 if (Degree == 0) { 5264 // A node with no uses, add it to the result array immediately. 5265 N->setNodeId(DAGSize++); 5266 allnodes_iterator Q = N; 5267 if (Q != SortedPos) 5268 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5269 assert(SortedPos != AllNodes.end() && "Overran node list"); 5270 ++SortedPos; 5271 } else { 5272 // Temporarily use the Node Id as scratch space for the degree count. 5273 N->setNodeId(Degree); 5274 } 5275 } 5276 5277 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5278 // such that by the time the end is reached all nodes will be sorted. 5279 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5280 SDNode *N = I; 5281 checkForCycles(N); 5282 // N is in sorted position, so all its uses have one less operand 5283 // that needs to be sorted. 5284 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5285 UI != UE; ++UI) { 5286 SDNode *P = *UI; 5287 unsigned Degree = P->getNodeId(); 5288 assert(Degree != 0 && "Invalid node degree"); 5289 --Degree; 5290 if (Degree == 0) { 5291 // All of P's operands are sorted, so P may sorted now. 5292 P->setNodeId(DAGSize++); 5293 if (P != SortedPos) 5294 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5295 assert(SortedPos != AllNodes.end() && "Overran node list"); 5296 ++SortedPos; 5297 } else { 5298 // Update P's outstanding operand count. 5299 P->setNodeId(Degree); 5300 } 5301 } 5302 if (I == SortedPos) { 5303#ifndef NDEBUG 5304 SDNode *S = ++I; 5305 dbgs() << "Overran sorted position:\n"; 5306 S->dumprFull(); 5307#endif 5308 llvm_unreachable(0); 5309 } 5310 } 5311 5312 assert(SortedPos == AllNodes.end() && 5313 "Topological sort incomplete!"); 5314 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5315 "First node in topological sort is not the entry token!"); 5316 assert(AllNodes.front().getNodeId() == 0 && 5317 "First node in topological sort has non-zero id!"); 5318 assert(AllNodes.front().getNumOperands() == 0 && 5319 "First node in topological sort has operands!"); 5320 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5321 "Last node in topologic sort has unexpected id!"); 5322 assert(AllNodes.back().use_empty() && 5323 "Last node in topologic sort has users!"); 5324 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5325 return DAGSize; 5326} 5327 5328/// AssignOrdering - Assign an order to the SDNode. 5329void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5330 assert(SD && "Trying to assign an order to a null node!"); 5331 Ordering->add(SD, Order); 5332} 5333 5334/// GetOrdering - Get the order for the SDNode. 5335unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5336 assert(SD && "Trying to get the order of a null node!"); 5337 return Ordering->getOrder(SD); 5338} 5339 5340/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5341/// value is produced by SD. 5342void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD) { 5343 DbgInfo->add(DB, SD); 5344 if (SD) 5345 SD->setHasDebugValue(true); 5346} 5347 5348//===----------------------------------------------------------------------===// 5349// SDNode Class 5350//===----------------------------------------------------------------------===// 5351 5352HandleSDNode::~HandleSDNode() { 5353 DropOperands(); 5354} 5355 5356GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 5357 EVT VT, int64_t o, unsigned char TF) 5358 : SDNode(Opc, DebugLoc(), getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5359 TheGlobal = const_cast<GlobalValue*>(GA); 5360} 5361 5362MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5363 MachineMemOperand *mmo) 5364 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5365 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5366 MMO->isNonTemporal()); 5367 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5368 assert(isNonTemporal() == MMO->isNonTemporal() && 5369 "Non-temporal encoding error!"); 5370 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5371} 5372 5373MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5374 const SDValue *Ops, unsigned NumOps, EVT memvt, 5375 MachineMemOperand *mmo) 5376 : SDNode(Opc, dl, VTs, Ops, NumOps), 5377 MemoryVT(memvt), MMO(mmo) { 5378 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5379 MMO->isNonTemporal()); 5380 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5381 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5382} 5383 5384/// Profile - Gather unique data for the node. 5385/// 5386void SDNode::Profile(FoldingSetNodeID &ID) const { 5387 AddNodeIDNode(ID, this); 5388} 5389 5390namespace { 5391 struct EVTArray { 5392 std::vector<EVT> VTs; 5393 5394 EVTArray() { 5395 VTs.reserve(MVT::LAST_VALUETYPE); 5396 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5397 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5398 } 5399 }; 5400} 5401 5402static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5403static ManagedStatic<EVTArray> SimpleVTArray; 5404static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5405 5406/// getValueTypeList - Return a pointer to the specified value type. 5407/// 5408const EVT *SDNode::getValueTypeList(EVT VT) { 5409 if (VT.isExtended()) { 5410 sys::SmartScopedLock<true> Lock(*VTMutex); 5411 return &(*EVTs->insert(VT).first); 5412 } else { 5413 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5414 } 5415} 5416 5417/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5418/// indicated value. This method ignores uses of other values defined by this 5419/// operation. 5420bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5421 assert(Value < getNumValues() && "Bad value!"); 5422 5423 // TODO: Only iterate over uses of a given value of the node 5424 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5425 if (UI.getUse().getResNo() == Value) { 5426 if (NUses == 0) 5427 return false; 5428 --NUses; 5429 } 5430 } 5431 5432 // Found exactly the right number of uses? 5433 return NUses == 0; 5434} 5435 5436 5437/// hasAnyUseOfValue - Return true if there are any use of the indicated 5438/// value. This method ignores uses of other values defined by this operation. 5439bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5440 assert(Value < getNumValues() && "Bad value!"); 5441 5442 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5443 if (UI.getUse().getResNo() == Value) 5444 return true; 5445 5446 return false; 5447} 5448 5449 5450/// isOnlyUserOf - Return true if this node is the only use of N. 5451/// 5452bool SDNode::isOnlyUserOf(SDNode *N) const { 5453 bool Seen = false; 5454 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5455 SDNode *User = *I; 5456 if (User == this) 5457 Seen = true; 5458 else 5459 return false; 5460 } 5461 5462 return Seen; 5463} 5464 5465/// isOperand - Return true if this node is an operand of N. 5466/// 5467bool SDValue::isOperandOf(SDNode *N) const { 5468 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5469 if (*this == N->getOperand(i)) 5470 return true; 5471 return false; 5472} 5473 5474bool SDNode::isOperandOf(SDNode *N) const { 5475 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5476 if (this == N->OperandList[i].getNode()) 5477 return true; 5478 return false; 5479} 5480 5481/// reachesChainWithoutSideEffects - Return true if this operand (which must 5482/// be a chain) reaches the specified operand without crossing any 5483/// side-effecting instructions. In practice, this looks through token 5484/// factors and non-volatile loads. In order to remain efficient, this only 5485/// looks a couple of nodes in, it does not do an exhaustive search. 5486bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5487 unsigned Depth) const { 5488 if (*this == Dest) return true; 5489 5490 // Don't search too deeply, we just want to be able to see through 5491 // TokenFactor's etc. 5492 if (Depth == 0) return false; 5493 5494 // If this is a token factor, all inputs to the TF happen in parallel. If any 5495 // of the operands of the TF reach dest, then we can do the xform. 5496 if (getOpcode() == ISD::TokenFactor) { 5497 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5498 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5499 return true; 5500 return false; 5501 } 5502 5503 // Loads don't have side effects, look through them. 5504 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5505 if (!Ld->isVolatile()) 5506 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5507 } 5508 return false; 5509} 5510 5511/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5512/// is either an operand of N or it can be reached by traversing up the operands. 5513/// NOTE: this is an expensive method. Use it carefully. 5514bool SDNode::isPredecessorOf(SDNode *N) const { 5515 SmallPtrSet<SDNode *, 32> Visited; 5516 SmallVector<SDNode *, 16> Worklist; 5517 Worklist.push_back(N); 5518 5519 do { 5520 N = Worklist.pop_back_val(); 5521 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5522 SDNode *Op = N->getOperand(i).getNode(); 5523 if (Op == this) 5524 return true; 5525 if (Visited.insert(Op)) 5526 Worklist.push_back(Op); 5527 } 5528 } while (!Worklist.empty()); 5529 5530 return false; 5531} 5532 5533uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5534 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5535 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5536} 5537 5538std::string SDNode::getOperationName(const SelectionDAG *G) const { 5539 switch (getOpcode()) { 5540 default: 5541 if (getOpcode() < ISD::BUILTIN_OP_END) 5542 return "<<Unknown DAG Node>>"; 5543 if (isMachineOpcode()) { 5544 if (G) 5545 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5546 if (getMachineOpcode() < TII->getNumOpcodes()) 5547 return TII->get(getMachineOpcode()).getName(); 5548 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5549 } 5550 if (G) { 5551 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5552 const char *Name = TLI.getTargetNodeName(getOpcode()); 5553 if (Name) return Name; 5554 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5555 } 5556 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5557 5558#ifndef NDEBUG 5559 case ISD::DELETED_NODE: 5560 return "<<Deleted Node!>>"; 5561#endif 5562 case ISD::PREFETCH: return "Prefetch"; 5563 case ISD::MEMBARRIER: return "MemBarrier"; 5564 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5565 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5566 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5567 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5568 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5569 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5570 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5571 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5572 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5573 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5574 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5575 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5576 case ISD::PCMARKER: return "PCMarker"; 5577 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5578 case ISD::SRCVALUE: return "SrcValue"; 5579 case ISD::MDNODE_SDNODE: return "MDNode"; 5580 case ISD::EntryToken: return "EntryToken"; 5581 case ISD::TokenFactor: return "TokenFactor"; 5582 case ISD::AssertSext: return "AssertSext"; 5583 case ISD::AssertZext: return "AssertZext"; 5584 5585 case ISD::BasicBlock: return "BasicBlock"; 5586 case ISD::VALUETYPE: return "ValueType"; 5587 case ISD::Register: return "Register"; 5588 5589 case ISD::Constant: return "Constant"; 5590 case ISD::ConstantFP: return "ConstantFP"; 5591 case ISD::GlobalAddress: return "GlobalAddress"; 5592 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5593 case ISD::FrameIndex: return "FrameIndex"; 5594 case ISD::JumpTable: return "JumpTable"; 5595 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5596 case ISD::RETURNADDR: return "RETURNADDR"; 5597 case ISD::FRAMEADDR: return "FRAMEADDR"; 5598 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5599 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5600 case ISD::LSDAADDR: return "LSDAADDR"; 5601 case ISD::EHSELECTION: return "EHSELECTION"; 5602 case ISD::EH_RETURN: return "EH_RETURN"; 5603 case ISD::ConstantPool: return "ConstantPool"; 5604 case ISD::ExternalSymbol: return "ExternalSymbol"; 5605 case ISD::BlockAddress: return "BlockAddress"; 5606 case ISD::INTRINSIC_WO_CHAIN: 5607 case ISD::INTRINSIC_VOID: 5608 case ISD::INTRINSIC_W_CHAIN: { 5609 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5610 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5611 if (IID < Intrinsic::num_intrinsics) 5612 return Intrinsic::getName((Intrinsic::ID)IID); 5613 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5614 return TII->getName(IID); 5615 llvm_unreachable("Invalid intrinsic ID"); 5616 } 5617 5618 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5619 case ISD::TargetConstant: return "TargetConstant"; 5620 case ISD::TargetConstantFP:return "TargetConstantFP"; 5621 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5622 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5623 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5624 case ISD::TargetJumpTable: return "TargetJumpTable"; 5625 case ISD::TargetConstantPool: return "TargetConstantPool"; 5626 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5627 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5628 5629 case ISD::CopyToReg: return "CopyToReg"; 5630 case ISD::CopyFromReg: return "CopyFromReg"; 5631 case ISD::UNDEF: return "undef"; 5632 case ISD::MERGE_VALUES: return "merge_values"; 5633 case ISD::INLINEASM: return "inlineasm"; 5634 case ISD::EH_LABEL: return "eh_label"; 5635 case ISD::HANDLENODE: return "handlenode"; 5636 5637 // Unary operators 5638 case ISD::FABS: return "fabs"; 5639 case ISD::FNEG: return "fneg"; 5640 case ISD::FSQRT: return "fsqrt"; 5641 case ISD::FSIN: return "fsin"; 5642 case ISD::FCOS: return "fcos"; 5643 case ISD::FPOWI: return "fpowi"; 5644 case ISD::FPOW: return "fpow"; 5645 case ISD::FTRUNC: return "ftrunc"; 5646 case ISD::FFLOOR: return "ffloor"; 5647 case ISD::FCEIL: return "fceil"; 5648 case ISD::FRINT: return "frint"; 5649 case ISD::FNEARBYINT: return "fnearbyint"; 5650 5651 // Binary operators 5652 case ISD::ADD: return "add"; 5653 case ISD::SUB: return "sub"; 5654 case ISD::MUL: return "mul"; 5655 case ISD::MULHU: return "mulhu"; 5656 case ISD::MULHS: return "mulhs"; 5657 case ISD::SDIV: return "sdiv"; 5658 case ISD::UDIV: return "udiv"; 5659 case ISD::SREM: return "srem"; 5660 case ISD::UREM: return "urem"; 5661 case ISD::SMUL_LOHI: return "smul_lohi"; 5662 case ISD::UMUL_LOHI: return "umul_lohi"; 5663 case ISD::SDIVREM: return "sdivrem"; 5664 case ISD::UDIVREM: return "udivrem"; 5665 case ISD::AND: return "and"; 5666 case ISD::OR: return "or"; 5667 case ISD::XOR: return "xor"; 5668 case ISD::SHL: return "shl"; 5669 case ISD::SRA: return "sra"; 5670 case ISD::SRL: return "srl"; 5671 case ISD::ROTL: return "rotl"; 5672 case ISD::ROTR: return "rotr"; 5673 case ISD::FADD: return "fadd"; 5674 case ISD::FSUB: return "fsub"; 5675 case ISD::FMUL: return "fmul"; 5676 case ISD::FDIV: return "fdiv"; 5677 case ISD::FREM: return "frem"; 5678 case ISD::FCOPYSIGN: return "fcopysign"; 5679 case ISD::FGETSIGN: return "fgetsign"; 5680 5681 case ISD::SETCC: return "setcc"; 5682 case ISD::VSETCC: return "vsetcc"; 5683 case ISD::SELECT: return "select"; 5684 case ISD::SELECT_CC: return "select_cc"; 5685 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5686 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5687 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5688 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5689 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5690 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5691 case ISD::CARRY_FALSE: return "carry_false"; 5692 case ISD::ADDC: return "addc"; 5693 case ISD::ADDE: return "adde"; 5694 case ISD::SADDO: return "saddo"; 5695 case ISD::UADDO: return "uaddo"; 5696 case ISD::SSUBO: return "ssubo"; 5697 case ISD::USUBO: return "usubo"; 5698 case ISD::SMULO: return "smulo"; 5699 case ISD::UMULO: return "umulo"; 5700 case ISD::SUBC: return "subc"; 5701 case ISD::SUBE: return "sube"; 5702 case ISD::SHL_PARTS: return "shl_parts"; 5703 case ISD::SRA_PARTS: return "sra_parts"; 5704 case ISD::SRL_PARTS: return "srl_parts"; 5705 5706 // Conversion operators. 5707 case ISD::SIGN_EXTEND: return "sign_extend"; 5708 case ISD::ZERO_EXTEND: return "zero_extend"; 5709 case ISD::ANY_EXTEND: return "any_extend"; 5710 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5711 case ISD::TRUNCATE: return "truncate"; 5712 case ISD::FP_ROUND: return "fp_round"; 5713 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5714 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5715 case ISD::FP_EXTEND: return "fp_extend"; 5716 5717 case ISD::SINT_TO_FP: return "sint_to_fp"; 5718 case ISD::UINT_TO_FP: return "uint_to_fp"; 5719 case ISD::FP_TO_SINT: return "fp_to_sint"; 5720 case ISD::FP_TO_UINT: return "fp_to_uint"; 5721 case ISD::BIT_CONVERT: return "bit_convert"; 5722 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5723 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5724 5725 case ISD::CONVERT_RNDSAT: { 5726 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5727 default: llvm_unreachable("Unknown cvt code!"); 5728 case ISD::CVT_FF: return "cvt_ff"; 5729 case ISD::CVT_FS: return "cvt_fs"; 5730 case ISD::CVT_FU: return "cvt_fu"; 5731 case ISD::CVT_SF: return "cvt_sf"; 5732 case ISD::CVT_UF: return "cvt_uf"; 5733 case ISD::CVT_SS: return "cvt_ss"; 5734 case ISD::CVT_SU: return "cvt_su"; 5735 case ISD::CVT_US: return "cvt_us"; 5736 case ISD::CVT_UU: return "cvt_uu"; 5737 } 5738 } 5739 5740 // Control flow instructions 5741 case ISD::BR: return "br"; 5742 case ISD::BRIND: return "brind"; 5743 case ISD::BR_JT: return "br_jt"; 5744 case ISD::BRCOND: return "brcond"; 5745 case ISD::BR_CC: return "br_cc"; 5746 case ISD::CALLSEQ_START: return "callseq_start"; 5747 case ISD::CALLSEQ_END: return "callseq_end"; 5748 5749 // Other operators 5750 case ISD::LOAD: return "load"; 5751 case ISD::STORE: return "store"; 5752 case ISD::VAARG: return "vaarg"; 5753 case ISD::VACOPY: return "vacopy"; 5754 case ISD::VAEND: return "vaend"; 5755 case ISD::VASTART: return "vastart"; 5756 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5757 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5758 case ISD::BUILD_PAIR: return "build_pair"; 5759 case ISD::STACKSAVE: return "stacksave"; 5760 case ISD::STACKRESTORE: return "stackrestore"; 5761 case ISD::TRAP: return "trap"; 5762 5763 // Bit manipulation 5764 case ISD::BSWAP: return "bswap"; 5765 case ISD::CTPOP: return "ctpop"; 5766 case ISD::CTTZ: return "cttz"; 5767 case ISD::CTLZ: return "ctlz"; 5768 5769 // Trampolines 5770 case ISD::TRAMPOLINE: return "trampoline"; 5771 5772 case ISD::CONDCODE: 5773 switch (cast<CondCodeSDNode>(this)->get()) { 5774 default: llvm_unreachable("Unknown setcc condition!"); 5775 case ISD::SETOEQ: return "setoeq"; 5776 case ISD::SETOGT: return "setogt"; 5777 case ISD::SETOGE: return "setoge"; 5778 case ISD::SETOLT: return "setolt"; 5779 case ISD::SETOLE: return "setole"; 5780 case ISD::SETONE: return "setone"; 5781 5782 case ISD::SETO: return "seto"; 5783 case ISD::SETUO: return "setuo"; 5784 case ISD::SETUEQ: return "setue"; 5785 case ISD::SETUGT: return "setugt"; 5786 case ISD::SETUGE: return "setuge"; 5787 case ISD::SETULT: return "setult"; 5788 case ISD::SETULE: return "setule"; 5789 case ISD::SETUNE: return "setune"; 5790 5791 case ISD::SETEQ: return "seteq"; 5792 case ISD::SETGT: return "setgt"; 5793 case ISD::SETGE: return "setge"; 5794 case ISD::SETLT: return "setlt"; 5795 case ISD::SETLE: return "setle"; 5796 case ISD::SETNE: return "setne"; 5797 } 5798 } 5799} 5800 5801const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5802 switch (AM) { 5803 default: 5804 return ""; 5805 case ISD::PRE_INC: 5806 return "<pre-inc>"; 5807 case ISD::PRE_DEC: 5808 return "<pre-dec>"; 5809 case ISD::POST_INC: 5810 return "<post-inc>"; 5811 case ISD::POST_DEC: 5812 return "<post-dec>"; 5813 } 5814} 5815 5816std::string ISD::ArgFlagsTy::getArgFlagsString() { 5817 std::string S = "< "; 5818 5819 if (isZExt()) 5820 S += "zext "; 5821 if (isSExt()) 5822 S += "sext "; 5823 if (isInReg()) 5824 S += "inreg "; 5825 if (isSRet()) 5826 S += "sret "; 5827 if (isByVal()) 5828 S += "byval "; 5829 if (isNest()) 5830 S += "nest "; 5831 if (getByValAlign()) 5832 S += "byval-align:" + utostr(getByValAlign()) + " "; 5833 if (getOrigAlign()) 5834 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5835 if (getByValSize()) 5836 S += "byval-size:" + utostr(getByValSize()) + " "; 5837 return S + ">"; 5838} 5839 5840void SDNode::dump() const { dump(0); } 5841void SDNode::dump(const SelectionDAG *G) const { 5842 print(dbgs(), G); 5843} 5844 5845void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5846 OS << (void*)this << ": "; 5847 5848 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5849 if (i) OS << ","; 5850 if (getValueType(i) == MVT::Other) 5851 OS << "ch"; 5852 else 5853 OS << getValueType(i).getEVTString(); 5854 } 5855 OS << " = " << getOperationName(G); 5856} 5857 5858void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5859 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5860 if (!MN->memoperands_empty()) { 5861 OS << "<"; 5862 OS << "Mem:"; 5863 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5864 e = MN->memoperands_end(); i != e; ++i) { 5865 OS << **i; 5866 if (next(i) != e) 5867 OS << " "; 5868 } 5869 OS << ">"; 5870 } 5871 } else if (const ShuffleVectorSDNode *SVN = 5872 dyn_cast<ShuffleVectorSDNode>(this)) { 5873 OS << "<"; 5874 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5875 int Idx = SVN->getMaskElt(i); 5876 if (i) OS << ","; 5877 if (Idx < 0) 5878 OS << "u"; 5879 else 5880 OS << Idx; 5881 } 5882 OS << ">"; 5883 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5884 OS << '<' << CSDN->getAPIntValue() << '>'; 5885 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5886 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5887 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5888 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5889 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5890 else { 5891 OS << "<APFloat("; 5892 CSDN->getValueAPF().bitcastToAPInt().dump(); 5893 OS << ")>"; 5894 } 5895 } else if (const GlobalAddressSDNode *GADN = 5896 dyn_cast<GlobalAddressSDNode>(this)) { 5897 int64_t offset = GADN->getOffset(); 5898 OS << '<'; 5899 WriteAsOperand(OS, GADN->getGlobal()); 5900 OS << '>'; 5901 if (offset > 0) 5902 OS << " + " << offset; 5903 else 5904 OS << " " << offset; 5905 if (unsigned int TF = GADN->getTargetFlags()) 5906 OS << " [TF=" << TF << ']'; 5907 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5908 OS << "<" << FIDN->getIndex() << ">"; 5909 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5910 OS << "<" << JTDN->getIndex() << ">"; 5911 if (unsigned int TF = JTDN->getTargetFlags()) 5912 OS << " [TF=" << TF << ']'; 5913 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5914 int offset = CP->getOffset(); 5915 if (CP->isMachineConstantPoolEntry()) 5916 OS << "<" << *CP->getMachineCPVal() << ">"; 5917 else 5918 OS << "<" << *CP->getConstVal() << ">"; 5919 if (offset > 0) 5920 OS << " + " << offset; 5921 else 5922 OS << " " << offset; 5923 if (unsigned int TF = CP->getTargetFlags()) 5924 OS << " [TF=" << TF << ']'; 5925 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5926 OS << "<"; 5927 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5928 if (LBB) 5929 OS << LBB->getName() << " "; 5930 OS << (const void*)BBDN->getBasicBlock() << ">"; 5931 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5932 if (G && R->getReg() && 5933 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5934 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5935 } else { 5936 OS << " %reg" << R->getReg(); 5937 } 5938 } else if (const ExternalSymbolSDNode *ES = 5939 dyn_cast<ExternalSymbolSDNode>(this)) { 5940 OS << "'" << ES->getSymbol() << "'"; 5941 if (unsigned int TF = ES->getTargetFlags()) 5942 OS << " [TF=" << TF << ']'; 5943 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5944 if (M->getValue()) 5945 OS << "<" << M->getValue() << ">"; 5946 else 5947 OS << "<null>"; 5948 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 5949 if (MD->getMD()) 5950 OS << "<" << MD->getMD() << ">"; 5951 else 5952 OS << "<null>"; 5953 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5954 OS << ":" << N->getVT().getEVTString(); 5955 } 5956 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5957 OS << "<" << *LD->getMemOperand(); 5958 5959 bool doExt = true; 5960 switch (LD->getExtensionType()) { 5961 default: doExt = false; break; 5962 case ISD::EXTLOAD: OS << ", anyext"; break; 5963 case ISD::SEXTLOAD: OS << ", sext"; break; 5964 case ISD::ZEXTLOAD: OS << ", zext"; break; 5965 } 5966 if (doExt) 5967 OS << " from " << LD->getMemoryVT().getEVTString(); 5968 5969 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5970 if (*AM) 5971 OS << ", " << AM; 5972 5973 OS << ">"; 5974 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5975 OS << "<" << *ST->getMemOperand(); 5976 5977 if (ST->isTruncatingStore()) 5978 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 5979 5980 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5981 if (*AM) 5982 OS << ", " << AM; 5983 5984 OS << ">"; 5985 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 5986 OS << "<" << *M->getMemOperand() << ">"; 5987 } else if (const BlockAddressSDNode *BA = 5988 dyn_cast<BlockAddressSDNode>(this)) { 5989 OS << "<"; 5990 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 5991 OS << ", "; 5992 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 5993 OS << ">"; 5994 if (unsigned int TF = BA->getTargetFlags()) 5995 OS << " [TF=" << TF << ']'; 5996 } 5997 5998 if (G) 5999 if (unsigned Order = G->GetOrdering(this)) 6000 OS << " [ORD=" << Order << ']'; 6001 6002 if (getNodeId() != -1) 6003 OS << " [ID=" << getNodeId() << ']'; 6004} 6005 6006void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6007 print_types(OS, G); 6008 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6009 if (i) OS << ", "; else OS << " "; 6010 OS << (void*)getOperand(i).getNode(); 6011 if (unsigned RN = getOperand(i).getResNo()) 6012 OS << ":" << RN; 6013 } 6014 print_details(OS, G); 6015} 6016 6017static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6018 const SelectionDAG *G, unsigned depth, 6019 unsigned indent) 6020{ 6021 if (depth == 0) 6022 return; 6023 6024 OS.indent(indent); 6025 6026 N->print(OS, G); 6027 6028 if (depth < 1) 6029 return; 6030 6031 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6032 OS << '\n'; 6033 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6034 } 6035} 6036 6037void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6038 unsigned depth) const { 6039 printrWithDepthHelper(OS, this, G, depth, 0); 6040} 6041 6042void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6043 // Don't print impossibly deep things. 6044 printrWithDepth(OS, G, 100); 6045} 6046 6047void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6048 printrWithDepth(dbgs(), G, depth); 6049} 6050 6051void SDNode::dumprFull(const SelectionDAG *G) const { 6052 // Don't print impossibly deep things. 6053 dumprWithDepth(G, 100); 6054} 6055 6056static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6057 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6058 if (N->getOperand(i).getNode()->hasOneUse()) 6059 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6060 else 6061 dbgs() << "\n" << std::string(indent+2, ' ') 6062 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6063 6064 6065 dbgs() << "\n"; 6066 dbgs().indent(indent); 6067 N->dump(G); 6068} 6069 6070SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6071 assert(N->getNumValues() == 1 && 6072 "Can't unroll a vector with multiple results!"); 6073 6074 EVT VT = N->getValueType(0); 6075 unsigned NE = VT.getVectorNumElements(); 6076 EVT EltVT = VT.getVectorElementType(); 6077 DebugLoc dl = N->getDebugLoc(); 6078 6079 SmallVector<SDValue, 8> Scalars; 6080 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6081 6082 // If ResNE is 0, fully unroll the vector op. 6083 if (ResNE == 0) 6084 ResNE = NE; 6085 else if (NE > ResNE) 6086 NE = ResNE; 6087 6088 unsigned i; 6089 for (i= 0; i != NE; ++i) { 6090 for (unsigned j = 0; j != N->getNumOperands(); ++j) { 6091 SDValue Operand = N->getOperand(j); 6092 EVT OperandVT = Operand.getValueType(); 6093 if (OperandVT.isVector()) { 6094 // A vector operand; extract a single element. 6095 EVT OperandEltVT = OperandVT.getVectorElementType(); 6096 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6097 OperandEltVT, 6098 Operand, 6099 getConstant(i, MVT::i32)); 6100 } else { 6101 // A scalar operand; just use it as is. 6102 Operands[j] = Operand; 6103 } 6104 } 6105 6106 switch (N->getOpcode()) { 6107 default: 6108 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6109 &Operands[0], Operands.size())); 6110 break; 6111 case ISD::SHL: 6112 case ISD::SRA: 6113 case ISD::SRL: 6114 case ISD::ROTL: 6115 case ISD::ROTR: 6116 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6117 getShiftAmountOperand(Operands[1]))); 6118 break; 6119 case ISD::SIGN_EXTEND_INREG: 6120 case ISD::FP_ROUND_INREG: { 6121 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6122 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6123 Operands[0], 6124 getValueType(ExtVT))); 6125 } 6126 } 6127 } 6128 6129 for (; i < ResNE; ++i) 6130 Scalars.push_back(getUNDEF(EltVT)); 6131 6132 return getNode(ISD::BUILD_VECTOR, dl, 6133 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6134 &Scalars[0], Scalars.size()); 6135} 6136 6137 6138/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6139/// location that is 'Dist' units away from the location that the 'Base' load 6140/// is loading from. 6141bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6142 unsigned Bytes, int Dist) const { 6143 if (LD->getChain() != Base->getChain()) 6144 return false; 6145 EVT VT = LD->getValueType(0); 6146 if (VT.getSizeInBits() / 8 != Bytes) 6147 return false; 6148 6149 SDValue Loc = LD->getOperand(1); 6150 SDValue BaseLoc = Base->getOperand(1); 6151 if (Loc.getOpcode() == ISD::FrameIndex) { 6152 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6153 return false; 6154 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6155 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6156 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6157 int FS = MFI->getObjectSize(FI); 6158 int BFS = MFI->getObjectSize(BFI); 6159 if (FS != BFS || FS != (int)Bytes) return false; 6160 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6161 } 6162 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6163 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6164 if (V && (V->getSExtValue() == Dist*Bytes)) 6165 return true; 6166 } 6167 6168 GlobalValue *GV1 = NULL; 6169 GlobalValue *GV2 = NULL; 6170 int64_t Offset1 = 0; 6171 int64_t Offset2 = 0; 6172 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6173 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6174 if (isGA1 && isGA2 && GV1 == GV2) 6175 return Offset1 == (Offset2 + Dist*Bytes); 6176 return false; 6177} 6178 6179 6180/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6181/// it cannot be inferred. 6182unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6183 // If this is a GlobalAddress + cst, return the alignment. 6184 GlobalValue *GV; 6185 int64_t GVOffset = 0; 6186 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6187 // If GV has specified alignment, then use it. Otherwise, use the preferred 6188 // alignment. 6189 unsigned Align = GV->getAlignment(); 6190 if (!Align) { 6191 if (GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6192 if (GVar->hasInitializer()) { 6193 const TargetData *TD = TLI.getTargetData(); 6194 Align = TD->getPreferredAlignment(GVar); 6195 } 6196 } 6197 } 6198 return MinAlign(Align, GVOffset); 6199 } 6200 6201 // If this is a direct reference to a stack slot, use information about the 6202 // stack slot's alignment. 6203 int FrameIdx = 1 << 31; 6204 int64_t FrameOffset = 0; 6205 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6206 FrameIdx = FI->getIndex(); 6207 } else if (Ptr.getOpcode() == ISD::ADD && 6208 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6209 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6210 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6211 FrameOffset = Ptr.getConstantOperandVal(1); 6212 } 6213 6214 if (FrameIdx != (1 << 31)) { 6215 // FIXME: Handle FI+CST. 6216 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6217 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6218 FrameOffset); 6219 if (MFI.isFixedObjectIndex(FrameIdx)) { 6220 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset; 6221 6222 // The alignment of the frame index can be determined from its offset from 6223 // the incoming frame position. If the frame object is at offset 32 and 6224 // the stack is guaranteed to be 16-byte aligned, then we know that the 6225 // object is 16-byte aligned. 6226 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment(); 6227 unsigned Align = MinAlign(ObjectOffset, StackAlign); 6228 6229 // Finally, the frame object itself may have a known alignment. Factor 6230 // the alignment + offset into a new alignment. For example, if we know 6231 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a 6232 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte 6233 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc. 6234 return std::max(Align, FIInfoAlign); 6235 } 6236 return FIInfoAlign; 6237 } 6238 6239 return 0; 6240} 6241 6242void SelectionDAG::dump() const { 6243 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6244 6245 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6246 I != E; ++I) { 6247 const SDNode *N = I; 6248 if (!N->hasOneUse() && N != getRoot().getNode()) 6249 DumpNodes(N, 2, this); 6250 } 6251 6252 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6253 6254 dbgs() << "\n\n"; 6255} 6256 6257void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6258 print_types(OS, G); 6259 print_details(OS, G); 6260} 6261 6262typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6263static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6264 const SelectionDAG *G, VisitedSDNodeSet &once) { 6265 if (!once.insert(N)) // If we've been here before, return now. 6266 return; 6267 6268 // Dump the current SDNode, but don't end the line yet. 6269 OS << std::string(indent, ' '); 6270 N->printr(OS, G); 6271 6272 // Having printed this SDNode, walk the children: 6273 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6274 const SDNode *child = N->getOperand(i).getNode(); 6275 6276 if (i) OS << ","; 6277 OS << " "; 6278 6279 if (child->getNumOperands() == 0) { 6280 // This child has no grandchildren; print it inline right here. 6281 child->printr(OS, G); 6282 once.insert(child); 6283 } else { // Just the address. FIXME: also print the child's opcode. 6284 OS << (void*)child; 6285 if (unsigned RN = N->getOperand(i).getResNo()) 6286 OS << ":" << RN; 6287 } 6288 } 6289 6290 OS << "\n"; 6291 6292 // Dump children that have grandchildren on their own line(s). 6293 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6294 const SDNode *child = N->getOperand(i).getNode(); 6295 DumpNodesr(OS, child, indent+2, G, once); 6296 } 6297} 6298 6299void SDNode::dumpr() const { 6300 VisitedSDNodeSet once; 6301 DumpNodesr(dbgs(), this, 0, 0, once); 6302} 6303 6304void SDNode::dumpr(const SelectionDAG *G) const { 6305 VisitedSDNodeSet once; 6306 DumpNodesr(dbgs(), this, 0, G, once); 6307} 6308 6309 6310// getAddressSpace - Return the address space this GlobalAddress belongs to. 6311unsigned GlobalAddressSDNode::getAddressSpace() const { 6312 return getGlobal()->getType()->getAddressSpace(); 6313} 6314 6315 6316const Type *ConstantPoolSDNode::getType() const { 6317 if (isMachineConstantPoolEntry()) 6318 return Val.MachineCPVal->getType(); 6319 return Val.ConstVal->getType(); 6320} 6321 6322bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6323 APInt &SplatUndef, 6324 unsigned &SplatBitSize, 6325 bool &HasAnyUndefs, 6326 unsigned MinSplatBits, 6327 bool isBigEndian) { 6328 EVT VT = getValueType(0); 6329 assert(VT.isVector() && "Expected a vector type"); 6330 unsigned sz = VT.getSizeInBits(); 6331 if (MinSplatBits > sz) 6332 return false; 6333 6334 SplatValue = APInt(sz, 0); 6335 SplatUndef = APInt(sz, 0); 6336 6337 // Get the bits. Bits with undefined values (when the corresponding element 6338 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6339 // in SplatValue. If any of the values are not constant, give up and return 6340 // false. 6341 unsigned int nOps = getNumOperands(); 6342 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6343 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6344 6345 for (unsigned j = 0; j < nOps; ++j) { 6346 unsigned i = isBigEndian ? nOps-1-j : j; 6347 SDValue OpVal = getOperand(i); 6348 unsigned BitPos = j * EltBitSize; 6349 6350 if (OpVal.getOpcode() == ISD::UNDEF) 6351 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6352 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6353 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 6354 zextOrTrunc(sz) << BitPos); 6355 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6356 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6357 else 6358 return false; 6359 } 6360 6361 // The build_vector is all constants or undefs. Find the smallest element 6362 // size that splats the vector. 6363 6364 HasAnyUndefs = (SplatUndef != 0); 6365 while (sz > 8) { 6366 6367 unsigned HalfSize = sz / 2; 6368 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 6369 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 6370 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 6371 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 6372 6373 // If the two halves do not match (ignoring undef bits), stop here. 6374 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6375 MinSplatBits > HalfSize) 6376 break; 6377 6378 SplatValue = HighValue | LowValue; 6379 SplatUndef = HighUndef & LowUndef; 6380 6381 sz = HalfSize; 6382 } 6383 6384 SplatBitSize = sz; 6385 return true; 6386} 6387 6388bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6389 // Find the first non-undef value in the shuffle mask. 6390 unsigned i, e; 6391 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6392 /* search */; 6393 6394 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6395 6396 // Make sure all remaining elements are either undef or the same as the first 6397 // non-undef value. 6398 for (int Idx = Mask[i]; i != e; ++i) 6399 if (Mask[i] >= 0 && Mask[i] != Idx) 6400 return false; 6401 return true; 6402} 6403 6404#ifdef XDEBUG 6405static void checkForCyclesHelper(const SDNode *N, 6406 SmallPtrSet<const SDNode*, 32> &Visited, 6407 SmallPtrSet<const SDNode*, 32> &Checked) { 6408 // If this node has already been checked, don't check it again. 6409 if (Checked.count(N)) 6410 return; 6411 6412 // If a node has already been visited on this depth-first walk, reject it as 6413 // a cycle. 6414 if (!Visited.insert(N)) { 6415 dbgs() << "Offending node:\n"; 6416 N->dumprFull(); 6417 errs() << "Detected cycle in SelectionDAG\n"; 6418 abort(); 6419 } 6420 6421 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6422 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6423 6424 Checked.insert(N); 6425 Visited.erase(N); 6426} 6427#endif 6428 6429void llvm::checkForCycles(const llvm::SDNode *N) { 6430#ifdef XDEBUG 6431 assert(N && "Checking nonexistant SDNode"); 6432 SmallPtrSet<const SDNode*, 32> visited; 6433 SmallPtrSet<const SDNode*, 32> checked; 6434 checkForCyclesHelper(N, visited, checked); 6435#endif 6436} 6437 6438void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6439 checkForCycles(DAG->getRoot().getNode()); 6440} 6441