SelectionDAG.cpp revision e8c17335c53f0f37262ee342f46b0d00ac0c1493
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13#include "llvm/CodeGen/SelectionDAG.h" 14#include "llvm/Constants.h" 15#include "llvm/Analysis/ValueTracking.h" 16#include "llvm/GlobalAlias.h" 17#include "llvm/GlobalVariable.h" 18#include "llvm/Intrinsics.h" 19#include "llvm/DerivedTypes.h" 20#include "llvm/Assembly/Writer.h" 21#include "llvm/CallingConv.h" 22#include "llvm/CodeGen/MachineBasicBlock.h" 23#include "llvm/CodeGen/MachineConstantPool.h" 24#include "llvm/CodeGen/MachineFrameInfo.h" 25#include "llvm/CodeGen/MachineModuleInfo.h" 26#include "llvm/CodeGen/PseudoSourceValue.h" 27#include "llvm/Target/TargetRegisterInfo.h" 28#include "llvm/Target/TargetData.h" 29#include "llvm/Target/TargetLowering.h" 30#include "llvm/Target/TargetOptions.h" 31#include "llvm/Target/TargetInstrInfo.h" 32#include "llvm/Target/TargetMachine.h" 33#include "llvm/Support/CommandLine.h" 34#include "llvm/Support/MathExtras.h" 35#include "llvm/Support/raw_ostream.h" 36#include "llvm/ADT/SetVector.h" 37#include "llvm/ADT/SmallPtrSet.h" 38#include "llvm/ADT/SmallSet.h" 39#include "llvm/ADT/SmallVector.h" 40#include "llvm/ADT/StringExtras.h" 41#include <algorithm> 42#include <cmath> 43using namespace llvm; 44 45/// makeVTList - Return an instance of the SDVTList struct initialized with the 46/// specified members. 47static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) { 48 SDVTList Res = {VTs, NumVTs}; 49 return Res; 50} 51 52static const fltSemantics *MVTToAPFloatSemantics(MVT VT) { 53 switch (VT.getSimpleVT()) { 54 default: assert(0 && "Unknown FP format"); 55 case MVT::f32: return &APFloat::IEEEsingle; 56 case MVT::f64: return &APFloat::IEEEdouble; 57 case MVT::f80: return &APFloat::x87DoubleExtended; 58 case MVT::f128: return &APFloat::IEEEquad; 59 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 60 } 61} 62 63SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 64 65//===----------------------------------------------------------------------===// 66// ConstantFPSDNode Class 67//===----------------------------------------------------------------------===// 68 69/// isExactlyValue - We don't rely on operator== working on double values, as 70/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 71/// As such, this method can be used to do an exact bit-for-bit comparison of 72/// two floating point values. 73bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 74 return getValueAPF().bitwiseIsEqual(V); 75} 76 77bool ConstantFPSDNode::isValueValidForType(MVT VT, 78 const APFloat& Val) { 79 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 80 81 // PPC long double cannot be converted to any other type. 82 if (VT == MVT::ppcf128 || 83 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 84 return false; 85 86 // convert modifies in place, so make a copy. 87 APFloat Val2 = APFloat(Val); 88 bool losesInfo; 89 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 90 &losesInfo); 91 return !losesInfo; 92} 93 94//===----------------------------------------------------------------------===// 95// ISD Namespace 96//===----------------------------------------------------------------------===// 97 98/// isBuildVectorAllOnes - Return true if the specified node is a 99/// BUILD_VECTOR where all of the elements are ~0 or undef. 100bool ISD::isBuildVectorAllOnes(const SDNode *N) { 101 // Look through a bit convert. 102 if (N->getOpcode() == ISD::BIT_CONVERT) 103 N = N->getOperand(0).getNode(); 104 105 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 106 107 unsigned i = 0, e = N->getNumOperands(); 108 109 // Skip over all of the undef values. 110 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 111 ++i; 112 113 // Do not accept an all-undef vector. 114 if (i == e) return false; 115 116 // Do not accept build_vectors that aren't all constants or which have non-~0 117 // elements. 118 SDValue NotZero = N->getOperand(i); 119 if (isa<ConstantSDNode>(NotZero)) { 120 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 121 return false; 122 } else if (isa<ConstantFPSDNode>(NotZero)) { 123 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 124 bitcastToAPInt().isAllOnesValue()) 125 return false; 126 } else 127 return false; 128 129 // Okay, we have at least one ~0 value, check to see if the rest match or are 130 // undefs. 131 for (++i; i != e; ++i) 132 if (N->getOperand(i) != NotZero && 133 N->getOperand(i).getOpcode() != ISD::UNDEF) 134 return false; 135 return true; 136} 137 138 139/// isBuildVectorAllZeros - Return true if the specified node is a 140/// BUILD_VECTOR where all of the elements are 0 or undef. 141bool ISD::isBuildVectorAllZeros(const SDNode *N) { 142 // Look through a bit convert. 143 if (N->getOpcode() == ISD::BIT_CONVERT) 144 N = N->getOperand(0).getNode(); 145 146 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 147 148 unsigned i = 0, e = N->getNumOperands(); 149 150 // Skip over all of the undef values. 151 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 152 ++i; 153 154 // Do not accept an all-undef vector. 155 if (i == e) return false; 156 157 // Do not accept build_vectors that aren't all constants or which have non-~0 158 // elements. 159 SDValue Zero = N->getOperand(i); 160 if (isa<ConstantSDNode>(Zero)) { 161 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 162 return false; 163 } else if (isa<ConstantFPSDNode>(Zero)) { 164 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 165 return false; 166 } else 167 return false; 168 169 // Okay, we have at least one ~0 value, check to see if the rest match or are 170 // undefs. 171 for (++i; i != e; ++i) 172 if (N->getOperand(i) != Zero && 173 N->getOperand(i).getOpcode() != ISD::UNDEF) 174 return false; 175 return true; 176} 177 178/// isScalarToVector - Return true if the specified node is a 179/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 180/// element is not an undef. 181bool ISD::isScalarToVector(const SDNode *N) { 182 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 183 return true; 184 185 if (N->getOpcode() != ISD::BUILD_VECTOR) 186 return false; 187 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 188 return false; 189 unsigned NumElems = N->getNumOperands(); 190 for (unsigned i = 1; i < NumElems; ++i) { 191 SDValue V = N->getOperand(i); 192 if (V.getOpcode() != ISD::UNDEF) 193 return false; 194 } 195 return true; 196} 197 198 199/// isDebugLabel - Return true if the specified node represents a debug 200/// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node). 201bool ISD::isDebugLabel(const SDNode *N) { 202 SDValue Zero; 203 if (N->getOpcode() == ISD::DBG_LABEL) 204 return true; 205 if (N->isMachineOpcode() && 206 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL) 207 return true; 208 return false; 209} 210 211/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 212/// when given the operation for (X op Y). 213ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 214 // To perform this operation, we just need to swap the L and G bits of the 215 // operation. 216 unsigned OldL = (Operation >> 2) & 1; 217 unsigned OldG = (Operation >> 1) & 1; 218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 219 (OldL << 1) | // New G bit 220 (OldG << 2)); // New L bit. 221} 222 223/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 224/// 'op' is a valid SetCC operation. 225ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 226 unsigned Operation = Op; 227 if (isInteger) 228 Operation ^= 7; // Flip L, G, E bits, but not U. 229 else 230 Operation ^= 15; // Flip all of the condition bits. 231 232 if (Operation > ISD::SETTRUE2) 233 Operation &= ~8; // Don't let N and U bits get set. 234 235 return ISD::CondCode(Operation); 236} 237 238 239/// isSignedOp - For an integer comparison, return 1 if the comparison is a 240/// signed operation and 2 if the result is an unsigned comparison. Return zero 241/// if the operation does not depend on the sign of the input (setne and seteq). 242static int isSignedOp(ISD::CondCode Opcode) { 243 switch (Opcode) { 244 default: assert(0 && "Illegal integer setcc operation!"); 245 case ISD::SETEQ: 246 case ISD::SETNE: return 0; 247 case ISD::SETLT: 248 case ISD::SETLE: 249 case ISD::SETGT: 250 case ISD::SETGE: return 1; 251 case ISD::SETULT: 252 case ISD::SETULE: 253 case ISD::SETUGT: 254 case ISD::SETUGE: return 2; 255 } 256} 257 258/// getSetCCOrOperation - Return the result of a logical OR between different 259/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 260/// returns SETCC_INVALID if it is not possible to represent the resultant 261/// comparison. 262ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 263 bool isInteger) { 264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 265 // Cannot fold a signed integer setcc with an unsigned integer setcc. 266 return ISD::SETCC_INVALID; 267 268 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 269 270 // If the N and U bits get set then the resultant comparison DOES suddenly 271 // care about orderedness, and is true when ordered. 272 if (Op > ISD::SETTRUE2) 273 Op &= ~16; // Clear the U bit if the N bit is set. 274 275 // Canonicalize illegal integer setcc's. 276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 277 Op = ISD::SETNE; 278 279 return ISD::CondCode(Op); 280} 281 282/// getSetCCAndOperation - Return the result of a logical AND between different 283/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 284/// function returns zero if it is not possible to represent the resultant 285/// comparison. 286ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 287 bool isInteger) { 288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 289 // Cannot fold a signed setcc with an unsigned setcc. 290 return ISD::SETCC_INVALID; 291 292 // Combine all of the condition bits. 293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 294 295 // Canonicalize illegal integer setcc's. 296 if (isInteger) { 297 switch (Result) { 298 default: break; 299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 300 case ISD::SETOEQ: // SETEQ & SETU[LG]E 301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 304 } 305 } 306 307 return Result; 308} 309 310const TargetMachine &SelectionDAG::getTarget() const { 311 return MF->getTarget(); 312} 313 314//===----------------------------------------------------------------------===// 315// SDNode Profile Support 316//===----------------------------------------------------------------------===// 317 318/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 319/// 320static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 321 ID.AddInteger(OpC); 322} 323 324/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 325/// solely with their pointer. 326static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 327 ID.AddPointer(VTList.VTs); 328} 329 330/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 331/// 332static void AddNodeIDOperands(FoldingSetNodeID &ID, 333 const SDValue *Ops, unsigned NumOps) { 334 for (; NumOps; --NumOps, ++Ops) { 335 ID.AddPointer(Ops->getNode()); 336 ID.AddInteger(Ops->getResNo()); 337 } 338} 339 340/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 341/// 342static void AddNodeIDOperands(FoldingSetNodeID &ID, 343 const SDUse *Ops, unsigned NumOps) { 344 for (; NumOps; --NumOps, ++Ops) { 345 ID.AddPointer(Ops->getNode()); 346 ID.AddInteger(Ops->getResNo()); 347 } 348} 349 350static void AddNodeIDNode(FoldingSetNodeID &ID, 351 unsigned short OpC, SDVTList VTList, 352 const SDValue *OpList, unsigned N) { 353 AddNodeIDOpcode(ID, OpC); 354 AddNodeIDValueTypes(ID, VTList); 355 AddNodeIDOperands(ID, OpList, N); 356} 357 358/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 359/// the NodeID data. 360static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 361 switch (N->getOpcode()) { 362 default: break; // Normal nodes don't need extra info. 363 case ISD::ARG_FLAGS: 364 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits()); 365 break; 366 case ISD::TargetConstant: 367 case ISD::Constant: 368 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 369 break; 370 case ISD::TargetConstantFP: 371 case ISD::ConstantFP: { 372 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 373 break; 374 } 375 case ISD::TargetGlobalAddress: 376 case ISD::GlobalAddress: 377 case ISD::TargetGlobalTLSAddress: 378 case ISD::GlobalTLSAddress: { 379 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 380 ID.AddPointer(GA->getGlobal()); 381 ID.AddInteger(GA->getOffset()); 382 break; 383 } 384 case ISD::BasicBlock: 385 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 386 break; 387 case ISD::Register: 388 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 389 break; 390 case ISD::DBG_STOPPOINT: { 391 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N); 392 ID.AddInteger(DSP->getLine()); 393 ID.AddInteger(DSP->getColumn()); 394 ID.AddPointer(DSP->getCompileUnit()); 395 break; 396 } 397 case ISD::SRCVALUE: 398 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 399 break; 400 case ISD::MEMOPERAND: { 401 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO; 402 MO.Profile(ID); 403 break; 404 } 405 case ISD::FrameIndex: 406 case ISD::TargetFrameIndex: 407 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 408 break; 409 case ISD::JumpTable: 410 case ISD::TargetJumpTable: 411 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 412 break; 413 case ISD::ConstantPool: 414 case ISD::TargetConstantPool: { 415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 416 ID.AddInteger(CP->getAlignment()); 417 ID.AddInteger(CP->getOffset()); 418 if (CP->isMachineConstantPoolEntry()) 419 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 420 else 421 ID.AddPointer(CP->getConstVal()); 422 break; 423 } 424 case ISD::CALL: { 425 const CallSDNode *Call = cast<CallSDNode>(N); 426 ID.AddInteger(Call->getCallingConv()); 427 ID.AddInteger(Call->isVarArg()); 428 break; 429 } 430 case ISD::LOAD: { 431 const LoadSDNode *LD = cast<LoadSDNode>(N); 432 ID.AddInteger(LD->getAddressingMode()); 433 ID.AddInteger(LD->getExtensionType()); 434 ID.AddInteger(LD->getMemoryVT().getRawBits()); 435 ID.AddInteger(LD->getRawFlags()); 436 break; 437 } 438 case ISD::STORE: { 439 const StoreSDNode *ST = cast<StoreSDNode>(N); 440 ID.AddInteger(ST->getAddressingMode()); 441 ID.AddInteger(ST->isTruncatingStore()); 442 ID.AddInteger(ST->getMemoryVT().getRawBits()); 443 ID.AddInteger(ST->getRawFlags()); 444 break; 445 } 446 case ISD::ATOMIC_CMP_SWAP: 447 case ISD::ATOMIC_SWAP: 448 case ISD::ATOMIC_LOAD_ADD: 449 case ISD::ATOMIC_LOAD_SUB: 450 case ISD::ATOMIC_LOAD_AND: 451 case ISD::ATOMIC_LOAD_OR: 452 case ISD::ATOMIC_LOAD_XOR: 453 case ISD::ATOMIC_LOAD_NAND: 454 case ISD::ATOMIC_LOAD_MIN: 455 case ISD::ATOMIC_LOAD_MAX: 456 case ISD::ATOMIC_LOAD_UMIN: 457 case ISD::ATOMIC_LOAD_UMAX: { 458 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 459 ID.AddInteger(AT->getRawFlags()); 460 break; 461 } 462 } // end switch (N->getOpcode()) 463} 464 465/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 466/// data. 467static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 468 AddNodeIDOpcode(ID, N->getOpcode()); 469 // Add the return value info. 470 AddNodeIDValueTypes(ID, N->getVTList()); 471 // Add the operand info. 472 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 473 474 // Handle SDNode leafs with special info. 475 AddNodeIDCustom(ID, N); 476} 477 478/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 479/// the CSE map that carries both alignment and volatility information. 480/// 481static inline unsigned 482encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) { 483 return isVolatile | ((Log2_32(Alignment) + 1) << 1); 484} 485 486//===----------------------------------------------------------------------===// 487// SelectionDAG Class 488//===----------------------------------------------------------------------===// 489 490/// doNotCSE - Return true if CSE should not be performed for this node. 491static bool doNotCSE(SDNode *N) { 492 if (N->getValueType(0) == MVT::Flag) 493 return true; // Never CSE anything that produces a flag. 494 495 switch (N->getOpcode()) { 496 default: break; 497 case ISD::HANDLENODE: 498 case ISD::DBG_LABEL: 499 case ISD::DBG_STOPPOINT: 500 case ISD::EH_LABEL: 501 case ISD::DECLARE: 502 return true; // Never CSE these nodes. 503 } 504 505 // Check that remaining values produced are not flags. 506 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 507 if (N->getValueType(i) == MVT::Flag) 508 return true; // Never CSE anything that produces a flag. 509 510 return false; 511} 512 513/// RemoveDeadNodes - This method deletes all unreachable nodes in the 514/// SelectionDAG. 515void SelectionDAG::RemoveDeadNodes() { 516 // Create a dummy node (which is not added to allnodes), that adds a reference 517 // to the root node, preventing it from being deleted. 518 HandleSDNode Dummy(getRoot()); 519 520 SmallVector<SDNode*, 128> DeadNodes; 521 522 // Add all obviously-dead nodes to the DeadNodes worklist. 523 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 524 if (I->use_empty()) 525 DeadNodes.push_back(I); 526 527 RemoveDeadNodes(DeadNodes); 528 529 // If the root changed (e.g. it was a dead load, update the root). 530 setRoot(Dummy.getValue()); 531} 532 533/// RemoveDeadNodes - This method deletes the unreachable nodes in the 534/// given list, and any nodes that become unreachable as a result. 535void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 536 DAGUpdateListener *UpdateListener) { 537 538 // Process the worklist, deleting the nodes and adding their uses to the 539 // worklist. 540 while (!DeadNodes.empty()) { 541 SDNode *N = DeadNodes.pop_back_val(); 542 543 if (UpdateListener) 544 UpdateListener->NodeDeleted(N, 0); 545 546 // Take the node out of the appropriate CSE map. 547 RemoveNodeFromCSEMaps(N); 548 549 // Next, brutally remove the operand list. This is safe to do, as there are 550 // no cycles in the graph. 551 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 552 SDUse &Use = *I++; 553 SDNode *Operand = Use.getNode(); 554 Use.set(SDValue()); 555 556 // Now that we removed this operand, see if there are no uses of it left. 557 if (Operand->use_empty()) 558 DeadNodes.push_back(Operand); 559 } 560 561 DeallocateNode(N); 562 } 563} 564 565void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 566 SmallVector<SDNode*, 16> DeadNodes(1, N); 567 RemoveDeadNodes(DeadNodes, UpdateListener); 568} 569 570void SelectionDAG::DeleteNode(SDNode *N) { 571 // First take this out of the appropriate CSE map. 572 RemoveNodeFromCSEMaps(N); 573 574 // Finally, remove uses due to operands of this node, remove from the 575 // AllNodes list, and delete the node. 576 DeleteNodeNotInCSEMaps(N); 577} 578 579void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 580 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 581 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 582 583 // Drop all of the operands and decrement used node's use counts. 584 N->DropOperands(); 585 586 DeallocateNode(N); 587} 588 589void SelectionDAG::DeallocateNode(SDNode *N) { 590 if (N->OperandsNeedDelete) 591 delete[] N->OperandList; 592 593 // Set the opcode to DELETED_NODE to help catch bugs when node 594 // memory is reallocated. 595 N->NodeType = ISD::DELETED_NODE; 596 597 NodeAllocator.Deallocate(AllNodes.remove(N)); 598} 599 600/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 601/// correspond to it. This is useful when we're about to delete or repurpose 602/// the node. We don't want future request for structurally identical nodes 603/// to return N anymore. 604bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 605 bool Erased = false; 606 switch (N->getOpcode()) { 607 case ISD::EntryToken: 608 assert(0 && "EntryToken should not be in CSEMaps!"); 609 return false; 610 case ISD::HANDLENODE: return false; // noop. 611 case ISD::CONDCODE: 612 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 613 "Cond code doesn't exist!"); 614 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 615 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 616 break; 617 case ISD::ExternalSymbol: 618 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 619 break; 620 case ISD::TargetExternalSymbol: 621 Erased = 622 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 623 break; 624 case ISD::VALUETYPE: { 625 MVT VT = cast<VTSDNode>(N)->getVT(); 626 if (VT.isExtended()) { 627 Erased = ExtendedValueTypeNodes.erase(VT); 628 } else { 629 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0; 630 ValueTypeNodes[VT.getSimpleVT()] = 0; 631 } 632 break; 633 } 634 default: 635 // Remove it from the CSE Map. 636 Erased = CSEMap.RemoveNode(N); 637 break; 638 } 639#ifndef NDEBUG 640 // Verify that the node was actually in one of the CSE maps, unless it has a 641 // flag result (which cannot be CSE'd) or is one of the special cases that are 642 // not subject to CSE. 643 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 644 !N->isMachineOpcode() && !doNotCSE(N)) { 645 N->dump(this); 646 cerr << "\n"; 647 assert(0 && "Node is not in map!"); 648 } 649#endif 650 return Erased; 651} 652 653/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 654/// maps and modified in place. Add it back to the CSE maps, unless an identical 655/// node already exists, in which case transfer all its users to the existing 656/// node. This transfer can potentially trigger recursive merging. 657/// 658void 659SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 660 DAGUpdateListener *UpdateListener) { 661 // For node types that aren't CSE'd, just act as if no identical node 662 // already exists. 663 if (!doNotCSE(N)) { 664 SDNode *Existing = CSEMap.GetOrInsertNode(N); 665 if (Existing != N) { 666 // If there was already an existing matching node, use ReplaceAllUsesWith 667 // to replace the dead one with the existing one. This can cause 668 // recursive merging of other unrelated nodes down the line. 669 ReplaceAllUsesWith(N, Existing, UpdateListener); 670 671 // N is now dead. Inform the listener if it exists and delete it. 672 if (UpdateListener) 673 UpdateListener->NodeDeleted(N, Existing); 674 DeleteNodeNotInCSEMaps(N); 675 return; 676 } 677 } 678 679 // If the node doesn't already exist, we updated it. Inform a listener if 680 // it exists. 681 if (UpdateListener) 682 UpdateListener->NodeUpdated(N); 683} 684 685/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 686/// were replaced with those specified. If this node is never memoized, 687/// return null, otherwise return a pointer to the slot it would take. If a 688/// node already exists with these operands, the slot will be non-null. 689SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 690 void *&InsertPos) { 691 if (doNotCSE(N)) 692 return 0; 693 694 SDValue Ops[] = { Op }; 695 FoldingSetNodeID ID; 696 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 697 AddNodeIDCustom(ID, N); 698 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 699} 700 701/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 702/// were replaced with those specified. If this node is never memoized, 703/// return null, otherwise return a pointer to the slot it would take. If a 704/// node already exists with these operands, the slot will be non-null. 705SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 706 SDValue Op1, SDValue Op2, 707 void *&InsertPos) { 708 if (doNotCSE(N)) 709 return 0; 710 711 SDValue Ops[] = { Op1, Op2 }; 712 FoldingSetNodeID ID; 713 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 714 AddNodeIDCustom(ID, N); 715 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 716} 717 718 719/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 720/// were replaced with those specified. If this node is never memoized, 721/// return null, otherwise return a pointer to the slot it would take. If a 722/// node already exists with these operands, the slot will be non-null. 723SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 724 const SDValue *Ops,unsigned NumOps, 725 void *&InsertPos) { 726 if (doNotCSE(N)) 727 return 0; 728 729 FoldingSetNodeID ID; 730 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 731 AddNodeIDCustom(ID, N); 732 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 733} 734 735/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 736void SelectionDAG::VerifyNode(SDNode *N) { 737 switch (N->getOpcode()) { 738 default: 739 break; 740 case ISD::BUILD_PAIR: { 741 MVT VT = N->getValueType(0); 742 assert(N->getNumValues() == 1 && "Too many results!"); 743 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 744 "Wrong return type!"); 745 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 746 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 747 "Mismatched operand types!"); 748 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 749 "Wrong operand type!"); 750 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 751 "Wrong return type size"); 752 break; 753 } 754 case ISD::BUILD_VECTOR: { 755 assert(N->getNumValues() == 1 && "Too many results!"); 756 assert(N->getValueType(0).isVector() && "Wrong return type!"); 757 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 758 "Wrong number of operands!"); 759 // FIXME: Change vector_shuffle to a variadic node with mask elements being 760 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an 761 // operand, and it is not always possible to legalize it. Turning off the 762 // following checks at least makes it possible to legalize most of the time. 763// MVT EltVT = N->getValueType(0).getVectorElementType(); 764// for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 765// assert(I->getValueType() == EltVT && 766// "Wrong operand type!"); 767 break; 768 } 769 } 770} 771 772/// getMVTAlignment - Compute the default alignment value for the 773/// given type. 774/// 775unsigned SelectionDAG::getMVTAlignment(MVT VT) const { 776 const Type *Ty = VT == MVT::iPTR ? 777 PointerType::get(Type::Int8Ty, 0) : 778 VT.getTypeForMVT(); 779 780 return TLI.getTargetData()->getABITypeAlignment(Ty); 781} 782 783SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 784 : TLI(tli), FLI(fli), 785 EntryNode(ISD::EntryToken, getVTList(MVT::Other)), 786 Root(getEntryNode()) { 787 AllNodes.push_back(&EntryNode); 788} 789 790void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi, 791 DwarfWriter *dw) { 792 MF = &mf; 793 MMI = mmi; 794 DW = dw; 795} 796 797SelectionDAG::~SelectionDAG() { 798 allnodes_clear(); 799} 800 801void SelectionDAG::allnodes_clear() { 802 assert(&*AllNodes.begin() == &EntryNode); 803 AllNodes.remove(AllNodes.begin()); 804 while (!AllNodes.empty()) 805 DeallocateNode(AllNodes.begin()); 806} 807 808void SelectionDAG::clear() { 809 allnodes_clear(); 810 OperandAllocator.Reset(); 811 CSEMap.clear(); 812 813 ExtendedValueTypeNodes.clear(); 814 ExternalSymbols.clear(); 815 TargetExternalSymbols.clear(); 816 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 817 static_cast<CondCodeSDNode*>(0)); 818 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 819 static_cast<SDNode*>(0)); 820 821 EntryNode.UseList = 0; 822 AllNodes.push_back(&EntryNode); 823 Root = getEntryNode(); 824} 825 826SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) { 827 if (Op.getValueType() == VT) return Op; 828 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 829 VT.getSizeInBits()); 830 return getNode(ISD::AND, Op.getValueType(), Op, 831 getConstant(Imm, Op.getValueType())); 832} 833 834/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 835/// 836SDValue SelectionDAG::getNOT(SDValue Val, MVT VT) { 837 SDValue NegOne; 838 if (VT.isVector()) { 839 MVT EltVT = VT.getVectorElementType(); 840 SDValue NegOneElt = getConstant(EltVT.getIntegerVTBitMask(), EltVT); 841 std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOneElt); 842 NegOne = getNode(ISD::BUILD_VECTOR, VT, &NegOnes[0], NegOnes.size()); 843 } else 844 NegOne = getConstant(VT.getIntegerVTBitMask(), VT); 845 846 return getNode(ISD::XOR, VT, Val, NegOne); 847} 848 849SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) { 850 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 851 assert((EltVT.getSizeInBits() >= 64 || 852 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 853 "getConstant with a uint64_t value that doesn't fit in the type!"); 854 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 855} 856 857SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) { 858 return getConstant(*ConstantInt::get(Val), VT, isT); 859} 860 861SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) { 862 assert(VT.isInteger() && "Cannot create FP integer constant!"); 863 864 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 865 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 866 "APInt size does not match type size!"); 867 868 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 869 FoldingSetNodeID ID; 870 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 871 ID.AddPointer(&Val); 872 void *IP = 0; 873 SDNode *N = NULL; 874 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 875 if (!VT.isVector()) 876 return SDValue(N, 0); 877 if (!N) { 878 N = NodeAllocator.Allocate<ConstantSDNode>(); 879 new (N) ConstantSDNode(isT, &Val, EltVT); 880 CSEMap.InsertNode(N, IP); 881 AllNodes.push_back(N); 882 } 883 884 SDValue Result(N, 0); 885 if (VT.isVector()) { 886 SmallVector<SDValue, 8> Ops; 887 Ops.assign(VT.getVectorNumElements(), Result); 888 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 889 } 890 return Result; 891} 892 893SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 894 return getConstant(Val, TLI.getPointerTy(), isTarget); 895} 896 897 898SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) { 899 return getConstantFP(*ConstantFP::get(V), VT, isTarget); 900} 901 902SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){ 903 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 904 905 MVT EltVT = 906 VT.isVector() ? VT.getVectorElementType() : VT; 907 908 // Do the map lookup using the actual bit pattern for the floating point 909 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 910 // we don't have issues with SNANs. 911 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 912 FoldingSetNodeID ID; 913 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 914 ID.AddPointer(&V); 915 void *IP = 0; 916 SDNode *N = NULL; 917 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 918 if (!VT.isVector()) 919 return SDValue(N, 0); 920 if (!N) { 921 N = NodeAllocator.Allocate<ConstantFPSDNode>(); 922 new (N) ConstantFPSDNode(isTarget, &V, EltVT); 923 CSEMap.InsertNode(N, IP); 924 AllNodes.push_back(N); 925 } 926 927 SDValue Result(N, 0); 928 if (VT.isVector()) { 929 SmallVector<SDValue, 8> Ops; 930 Ops.assign(VT.getVectorNumElements(), Result); 931 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 932 } 933 return Result; 934} 935 936SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) { 937 MVT EltVT = 938 VT.isVector() ? VT.getVectorElementType() : VT; 939 if (EltVT==MVT::f32) 940 return getConstantFP(APFloat((float)Val), VT, isTarget); 941 else 942 return getConstantFP(APFloat(Val), VT, isTarget); 943} 944 945SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 946 MVT VT, int64_t Offset, 947 bool isTargetGA) { 948 unsigned Opc; 949 950 // Truncate (with sign-extension) the offset value to the pointer size. 951 unsigned BitWidth = TLI.getPointerTy().getSizeInBits(); 952 if (BitWidth < 64) 953 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 954 955 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 956 if (!GVar) { 957 // If GV is an alias then use the aliasee for determining thread-localness. 958 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 959 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 960 } 961 962 if (GVar && GVar->isThreadLocal()) 963 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 964 else 965 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 966 967 FoldingSetNodeID ID; 968 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 969 ID.AddPointer(GV); 970 ID.AddInteger(Offset); 971 void *IP = 0; 972 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 973 return SDValue(E, 0); 974 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>(); 975 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset); 976 CSEMap.InsertNode(N, IP); 977 AllNodes.push_back(N); 978 return SDValue(N, 0); 979} 980 981SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) { 982 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 983 FoldingSetNodeID ID; 984 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 985 ID.AddInteger(FI); 986 void *IP = 0; 987 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 988 return SDValue(E, 0); 989 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>(); 990 new (N) FrameIndexSDNode(FI, VT, isTarget); 991 CSEMap.InsertNode(N, IP); 992 AllNodes.push_back(N); 993 return SDValue(N, 0); 994} 995 996SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){ 997 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 998 FoldingSetNodeID ID; 999 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1000 ID.AddInteger(JTI); 1001 void *IP = 0; 1002 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1003 return SDValue(E, 0); 1004 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>(); 1005 new (N) JumpTableSDNode(JTI, VT, isTarget); 1006 CSEMap.InsertNode(N, IP); 1007 AllNodes.push_back(N); 1008 return SDValue(N, 0); 1009} 1010 1011SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT, 1012 unsigned Alignment, int Offset, 1013 bool isTarget) { 1014 if (Alignment == 0) 1015 Alignment = 1016 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType()); 1017 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1018 FoldingSetNodeID ID; 1019 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1020 ID.AddInteger(Alignment); 1021 ID.AddInteger(Offset); 1022 ID.AddPointer(C); 1023 void *IP = 0; 1024 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1025 return SDValue(E, 0); 1026 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1027 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 1028 CSEMap.InsertNode(N, IP); 1029 AllNodes.push_back(N); 1030 return SDValue(N, 0); 1031} 1032 1033 1034SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT, 1035 unsigned Alignment, int Offset, 1036 bool isTarget) { 1037 if (Alignment == 0) 1038 Alignment = 1039 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType()); 1040 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1041 FoldingSetNodeID ID; 1042 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1043 ID.AddInteger(Alignment); 1044 ID.AddInteger(Offset); 1045 C->AddSelectionDAGCSEId(ID); 1046 void *IP = 0; 1047 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1048 return SDValue(E, 0); 1049 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1050 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 1051 CSEMap.InsertNode(N, IP); 1052 AllNodes.push_back(N); 1053 return SDValue(N, 0); 1054} 1055 1056 1057SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1058 FoldingSetNodeID ID; 1059 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1060 ID.AddPointer(MBB); 1061 void *IP = 0; 1062 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1063 return SDValue(E, 0); 1064 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1065 new (N) BasicBlockSDNode(MBB); 1066 CSEMap.InsertNode(N, IP); 1067 AllNodes.push_back(N); 1068 return SDValue(N, 0); 1069} 1070 1071SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB, DebugLoc dl) { 1072 FoldingSetNodeID ID; 1073 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1074 ID.AddPointer(MBB); 1075 void *IP = 0; 1076 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1077 return SDValue(E, 0); 1078 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1079 new (N) BasicBlockSDNode(MBB, dl); 1080 CSEMap.InsertNode(N, IP); 1081 AllNodes.push_back(N); 1082 return SDValue(N, 0); 1083} 1084 1085SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) { 1086 FoldingSetNodeID ID; 1087 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0); 1088 ID.AddInteger(Flags.getRawBits()); 1089 void *IP = 0; 1090 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1091 return SDValue(E, 0); 1092 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>(); 1093 new (N) ARG_FLAGSSDNode(Flags); 1094 CSEMap.InsertNode(N, IP); 1095 AllNodes.push_back(N); 1096 return SDValue(N, 0); 1097} 1098 1099SDValue SelectionDAG::getValueType(MVT VT) { 1100 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size()) 1101 ValueTypeNodes.resize(VT.getSimpleVT()+1); 1102 1103 SDNode *&N = VT.isExtended() ? 1104 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()]; 1105 1106 if (N) return SDValue(N, 0); 1107 N = NodeAllocator.Allocate<VTSDNode>(); 1108 new (N) VTSDNode(VT); 1109 AllNodes.push_back(N); 1110 return SDValue(N, 0); 1111} 1112 1113SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) { 1114 SDNode *&N = ExternalSymbols[Sym]; 1115 if (N) return SDValue(N, 0); 1116 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1117 new (N) ExternalSymbolSDNode(false, Sym, VT); 1118 AllNodes.push_back(N); 1119 return SDValue(N, 0); 1120} 1121 1122SDValue SelectionDAG::getExternalSymbol(const char *Sym, DebugLoc dl, MVT VT) { 1123 SDNode *&N = ExternalSymbols[Sym]; 1124 if (N) return SDValue(N, 0); 1125 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1126 new (N) ExternalSymbolSDNode(false, dl, Sym, VT); 1127 AllNodes.push_back(N); 1128 return SDValue(N, 0); 1129} 1130 1131SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) { 1132 SDNode *&N = TargetExternalSymbols[Sym]; 1133 if (N) return SDValue(N, 0); 1134 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1135 new (N) ExternalSymbolSDNode(true, Sym, VT); 1136 AllNodes.push_back(N); 1137 return SDValue(N, 0); 1138} 1139 1140SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, DebugLoc dl, 1141 MVT VT) { 1142 SDNode *&N = TargetExternalSymbols[Sym]; 1143 if (N) return SDValue(N, 0); 1144 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1145 new (N) ExternalSymbolSDNode(true, dl, Sym, VT); 1146 AllNodes.push_back(N); 1147 return SDValue(N, 0); 1148} 1149 1150SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1151 if ((unsigned)Cond >= CondCodeNodes.size()) 1152 CondCodeNodes.resize(Cond+1); 1153 1154 if (CondCodeNodes[Cond] == 0) { 1155 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>(); 1156 new (N) CondCodeSDNode(Cond); 1157 CondCodeNodes[Cond] = N; 1158 AllNodes.push_back(N); 1159 } 1160 return SDValue(CondCodeNodes[Cond], 0); 1161} 1162 1163SDValue SelectionDAG::getConvertRndSat(MVT VT, SDValue Val, SDValue DTy, 1164 SDValue STy, SDValue Rnd, SDValue Sat, 1165 ISD::CvtCode Code) { 1166 // If the src and dest types are the same, no conversion is necessary. 1167 if (DTy == STy) 1168 return Val; 1169 1170 FoldingSetNodeID ID; 1171 void* IP = 0; 1172 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1173 return SDValue(E, 0); 1174 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>(); 1175 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1176 new (N) CvtRndSatSDNode(VT, Ops, 5, Code); 1177 CSEMap.InsertNode(N, IP); 1178 AllNodes.push_back(N); 1179 return SDValue(N, 0); 1180} 1181 1182SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) { 1183 FoldingSetNodeID ID; 1184 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1185 ID.AddInteger(RegNo); 1186 void *IP = 0; 1187 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1188 return SDValue(E, 0); 1189 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>(); 1190 new (N) RegisterSDNode(RegNo, VT); 1191 CSEMap.InsertNode(N, IP); 1192 AllNodes.push_back(N); 1193 return SDValue(N, 0); 1194} 1195 1196SDValue SelectionDAG::getDbgStopPoint(SDValue Root, 1197 unsigned Line, unsigned Col, 1198 Value *CU) { 1199 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>(); 1200 new (N) DbgStopPointSDNode(Root, Line, Col, CU); 1201 AllNodes.push_back(N); 1202 return SDValue(N, 0); 1203} 1204 1205SDValue SelectionDAG::getLabel(unsigned Opcode, 1206 SDValue Root, 1207 unsigned LabelID) { 1208 FoldingSetNodeID ID; 1209 SDValue Ops[] = { Root }; 1210 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1211 ID.AddInteger(LabelID); 1212 void *IP = 0; 1213 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1214 return SDValue(E, 0); 1215 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1216 new (N) LabelSDNode(Opcode, Root, LabelID); 1217 CSEMap.InsertNode(N, IP); 1218 AllNodes.push_back(N); 1219 return SDValue(N, 0); 1220} 1221 1222SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl, 1223 SDValue Root, 1224 unsigned LabelID) { 1225 FoldingSetNodeID ID; 1226 SDValue Ops[] = { Root }; 1227 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1228 ID.AddInteger(LabelID); 1229 void *IP = 0; 1230 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1231 return SDValue(E, 0); 1232 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1233 new (N) LabelSDNode(Opcode, dl, Root, LabelID); 1234 CSEMap.InsertNode(N, IP); 1235 AllNodes.push_back(N); 1236 return SDValue(N, 0); 1237} 1238 1239SDValue SelectionDAG::getSrcValue(const Value *V) { 1240 assert((!V || isa<PointerType>(V->getType())) && 1241 "SrcValue is not a pointer?"); 1242 1243 FoldingSetNodeID ID; 1244 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1245 ID.AddPointer(V); 1246 1247 void *IP = 0; 1248 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1249 return SDValue(E, 0); 1250 1251 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>(); 1252 new (N) SrcValueSDNode(V); 1253 CSEMap.InsertNode(N, IP); 1254 AllNodes.push_back(N); 1255 return SDValue(N, 0); 1256} 1257 1258SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) { 1259#ifndef NDEBUG 1260 const Value *v = MO.getValue(); 1261 assert((!v || isa<PointerType>(v->getType())) && 1262 "SrcValue is not a pointer?"); 1263#endif 1264 1265 FoldingSetNodeID ID; 1266 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0); 1267 MO.Profile(ID); 1268 1269 void *IP = 0; 1270 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1271 return SDValue(E, 0); 1272 1273 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>(); 1274 new (N) MemOperandSDNode(MO); 1275 CSEMap.InsertNode(N, IP); 1276 AllNodes.push_back(N); 1277 return SDValue(N, 0); 1278} 1279 1280/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1281/// specified value type. 1282SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) { 1283 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1284 unsigned ByteSize = VT.getStoreSizeInBits()/8; 1285 const Type *Ty = VT.getTypeForMVT(); 1286 unsigned StackAlign = 1287 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1288 1289 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign); 1290 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1291} 1292 1293/// CreateStackTemporary - Create a stack temporary suitable for holding 1294/// either of the specified value types. 1295SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) { 1296 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1297 VT2.getStoreSizeInBits())/8; 1298 const Type *Ty1 = VT1.getTypeForMVT(); 1299 const Type *Ty2 = VT2.getTypeForMVT(); 1300 const TargetData *TD = TLI.getTargetData(); 1301 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1302 TD->getPrefTypeAlignment(Ty2)); 1303 1304 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1305 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align); 1306 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1307} 1308 1309SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1, 1310 SDValue N2, ISD::CondCode Cond) { 1311 // These setcc operations always fold. 1312 switch (Cond) { 1313 default: break; 1314 case ISD::SETFALSE: 1315 case ISD::SETFALSE2: return getConstant(0, VT); 1316 case ISD::SETTRUE: 1317 case ISD::SETTRUE2: return getConstant(1, VT); 1318 1319 case ISD::SETOEQ: 1320 case ISD::SETOGT: 1321 case ISD::SETOGE: 1322 case ISD::SETOLT: 1323 case ISD::SETOLE: 1324 case ISD::SETONE: 1325 case ISD::SETO: 1326 case ISD::SETUO: 1327 case ISD::SETUEQ: 1328 case ISD::SETUNE: 1329 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1330 break; 1331 } 1332 1333 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1334 const APInt &C2 = N2C->getAPIntValue(); 1335 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1336 const APInt &C1 = N1C->getAPIntValue(); 1337 1338 switch (Cond) { 1339 default: assert(0 && "Unknown integer setcc!"); 1340 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1341 case ISD::SETNE: return getConstant(C1 != C2, VT); 1342 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1343 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1344 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1345 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1346 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1347 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1348 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1349 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1350 } 1351 } 1352 } 1353 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1354 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1355 // No compile time operations on this type yet. 1356 if (N1C->getValueType(0) == MVT::ppcf128) 1357 return SDValue(); 1358 1359 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1360 switch (Cond) { 1361 default: break; 1362 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1363 return getNode(ISD::UNDEF, VT); 1364 // fall through 1365 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1366 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1367 return getNode(ISD::UNDEF, VT); 1368 // fall through 1369 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1370 R==APFloat::cmpLessThan, VT); 1371 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1372 return getNode(ISD::UNDEF, VT); 1373 // fall through 1374 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1375 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1376 return getNode(ISD::UNDEF, VT); 1377 // fall through 1378 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1379 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1380 return getNode(ISD::UNDEF, VT); 1381 // fall through 1382 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1383 R==APFloat::cmpEqual, VT); 1384 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1385 return getNode(ISD::UNDEF, VT); 1386 // fall through 1387 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1388 R==APFloat::cmpEqual, VT); 1389 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1390 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1391 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1392 R==APFloat::cmpEqual, VT); 1393 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1394 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1395 R==APFloat::cmpLessThan, VT); 1396 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1397 R==APFloat::cmpUnordered, VT); 1398 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1399 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1400 } 1401 } else { 1402 // Ensure that the constant occurs on the RHS. 1403 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1404 } 1405 } 1406 1407 // Could not fold it. 1408 return SDValue(); 1409} 1410 1411/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1412/// use this predicate to simplify operations downstream. 1413bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1414 unsigned BitWidth = Op.getValueSizeInBits(); 1415 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1416} 1417 1418/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1419/// this predicate to simplify operations downstream. Mask is known to be zero 1420/// for bits that V cannot have. 1421bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1422 unsigned Depth) const { 1423 APInt KnownZero, KnownOne; 1424 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1425 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1426 return (KnownZero & Mask) == Mask; 1427} 1428 1429/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1430/// known to be either zero or one and return them in the KnownZero/KnownOne 1431/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1432/// processing. 1433void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1434 APInt &KnownZero, APInt &KnownOne, 1435 unsigned Depth) const { 1436 unsigned BitWidth = Mask.getBitWidth(); 1437 assert(BitWidth == Op.getValueType().getSizeInBits() && 1438 "Mask size mismatches value type size!"); 1439 1440 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1441 if (Depth == 6 || Mask == 0) 1442 return; // Limit search depth. 1443 1444 APInt KnownZero2, KnownOne2; 1445 1446 switch (Op.getOpcode()) { 1447 case ISD::Constant: 1448 // We know all of the bits for a constant! 1449 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1450 KnownZero = ~KnownOne & Mask; 1451 return; 1452 case ISD::AND: 1453 // If either the LHS or the RHS are Zero, the result is zero. 1454 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1455 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1456 KnownZero2, KnownOne2, Depth+1); 1457 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1458 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1459 1460 // Output known-1 bits are only known if set in both the LHS & RHS. 1461 KnownOne &= KnownOne2; 1462 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1463 KnownZero |= KnownZero2; 1464 return; 1465 case ISD::OR: 1466 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1467 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1468 KnownZero2, KnownOne2, Depth+1); 1469 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1470 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1471 1472 // Output known-0 bits are only known if clear in both the LHS & RHS. 1473 KnownZero &= KnownZero2; 1474 // Output known-1 are known to be set if set in either the LHS | RHS. 1475 KnownOne |= KnownOne2; 1476 return; 1477 case ISD::XOR: { 1478 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1479 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1480 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1481 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1482 1483 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1484 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1485 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1486 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1487 KnownZero = KnownZeroOut; 1488 return; 1489 } 1490 case ISD::MUL: { 1491 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1492 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1493 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1494 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1495 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1496 1497 // If low bits are zero in either operand, output low known-0 bits. 1498 // Also compute a conserative estimate for high known-0 bits. 1499 // More trickiness is possible, but this is sufficient for the 1500 // interesting case of alignment computation. 1501 KnownOne.clear(); 1502 unsigned TrailZ = KnownZero.countTrailingOnes() + 1503 KnownZero2.countTrailingOnes(); 1504 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1505 KnownZero2.countLeadingOnes(), 1506 BitWidth) - BitWidth; 1507 1508 TrailZ = std::min(TrailZ, BitWidth); 1509 LeadZ = std::min(LeadZ, BitWidth); 1510 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1511 APInt::getHighBitsSet(BitWidth, LeadZ); 1512 KnownZero &= Mask; 1513 return; 1514 } 1515 case ISD::UDIV: { 1516 // For the purposes of computing leading zeros we can conservatively 1517 // treat a udiv as a logical right shift by the power of 2 known to 1518 // be less than the denominator. 1519 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1520 ComputeMaskedBits(Op.getOperand(0), 1521 AllOnes, KnownZero2, KnownOne2, Depth+1); 1522 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1523 1524 KnownOne2.clear(); 1525 KnownZero2.clear(); 1526 ComputeMaskedBits(Op.getOperand(1), 1527 AllOnes, KnownZero2, KnownOne2, Depth+1); 1528 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1529 if (RHSUnknownLeadingOnes != BitWidth) 1530 LeadZ = std::min(BitWidth, 1531 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1532 1533 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1534 return; 1535 } 1536 case ISD::SELECT: 1537 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1538 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1539 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1540 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1541 1542 // Only known if known in both the LHS and RHS. 1543 KnownOne &= KnownOne2; 1544 KnownZero &= KnownZero2; 1545 return; 1546 case ISD::SELECT_CC: 1547 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1548 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1549 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1550 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1551 1552 // Only known if known in both the LHS and RHS. 1553 KnownOne &= KnownOne2; 1554 KnownZero &= KnownZero2; 1555 return; 1556 case ISD::SADDO: 1557 case ISD::UADDO: 1558 case ISD::SSUBO: 1559 case ISD::USUBO: 1560 case ISD::SMULO: 1561 case ISD::UMULO: 1562 if (Op.getResNo() != 1) 1563 return; 1564 // The boolean result conforms to getBooleanContents. Fall through. 1565 case ISD::SETCC: 1566 // If we know the result of a setcc has the top bits zero, use this info. 1567 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1568 BitWidth > 1) 1569 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1570 return; 1571 case ISD::SHL: 1572 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1573 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1574 unsigned ShAmt = SA->getZExtValue(); 1575 1576 // If the shift count is an invalid immediate, don't do anything. 1577 if (ShAmt >= BitWidth) 1578 return; 1579 1580 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1581 KnownZero, KnownOne, Depth+1); 1582 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1583 KnownZero <<= ShAmt; 1584 KnownOne <<= ShAmt; 1585 // low bits known zero. 1586 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1587 } 1588 return; 1589 case ISD::SRL: 1590 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1591 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1592 unsigned ShAmt = SA->getZExtValue(); 1593 1594 // If the shift count is an invalid immediate, don't do anything. 1595 if (ShAmt >= BitWidth) 1596 return; 1597 1598 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1599 KnownZero, KnownOne, Depth+1); 1600 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1601 KnownZero = KnownZero.lshr(ShAmt); 1602 KnownOne = KnownOne.lshr(ShAmt); 1603 1604 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1605 KnownZero |= HighBits; // High bits known zero. 1606 } 1607 return; 1608 case ISD::SRA: 1609 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1610 unsigned ShAmt = SA->getZExtValue(); 1611 1612 // If the shift count is an invalid immediate, don't do anything. 1613 if (ShAmt >= BitWidth) 1614 return; 1615 1616 APInt InDemandedMask = (Mask << ShAmt); 1617 // If any of the demanded bits are produced by the sign extension, we also 1618 // demand the input sign bit. 1619 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1620 if (HighBits.getBoolValue()) 1621 InDemandedMask |= APInt::getSignBit(BitWidth); 1622 1623 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1624 Depth+1); 1625 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1626 KnownZero = KnownZero.lshr(ShAmt); 1627 KnownOne = KnownOne.lshr(ShAmt); 1628 1629 // Handle the sign bits. 1630 APInt SignBit = APInt::getSignBit(BitWidth); 1631 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1632 1633 if (KnownZero.intersects(SignBit)) { 1634 KnownZero |= HighBits; // New bits are known zero. 1635 } else if (KnownOne.intersects(SignBit)) { 1636 KnownOne |= HighBits; // New bits are known one. 1637 } 1638 } 1639 return; 1640 case ISD::SIGN_EXTEND_INREG: { 1641 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1642 unsigned EBits = EVT.getSizeInBits(); 1643 1644 // Sign extension. Compute the demanded bits in the result that are not 1645 // present in the input. 1646 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1647 1648 APInt InSignBit = APInt::getSignBit(EBits); 1649 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1650 1651 // If the sign extended bits are demanded, we know that the sign 1652 // bit is demanded. 1653 InSignBit.zext(BitWidth); 1654 if (NewBits.getBoolValue()) 1655 InputDemandedBits |= InSignBit; 1656 1657 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1658 KnownZero, KnownOne, Depth+1); 1659 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1660 1661 // If the sign bit of the input is known set or clear, then we know the 1662 // top bits of the result. 1663 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1664 KnownZero |= NewBits; 1665 KnownOne &= ~NewBits; 1666 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1667 KnownOne |= NewBits; 1668 KnownZero &= ~NewBits; 1669 } else { // Input sign bit unknown 1670 KnownZero &= ~NewBits; 1671 KnownOne &= ~NewBits; 1672 } 1673 return; 1674 } 1675 case ISD::CTTZ: 1676 case ISD::CTLZ: 1677 case ISD::CTPOP: { 1678 unsigned LowBits = Log2_32(BitWidth)+1; 1679 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1680 KnownOne.clear(); 1681 return; 1682 } 1683 case ISD::LOAD: { 1684 if (ISD::isZEXTLoad(Op.getNode())) { 1685 LoadSDNode *LD = cast<LoadSDNode>(Op); 1686 MVT VT = LD->getMemoryVT(); 1687 unsigned MemBits = VT.getSizeInBits(); 1688 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1689 } 1690 return; 1691 } 1692 case ISD::ZERO_EXTEND: { 1693 MVT InVT = Op.getOperand(0).getValueType(); 1694 unsigned InBits = InVT.getSizeInBits(); 1695 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1696 APInt InMask = Mask; 1697 InMask.trunc(InBits); 1698 KnownZero.trunc(InBits); 1699 KnownOne.trunc(InBits); 1700 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1701 KnownZero.zext(BitWidth); 1702 KnownOne.zext(BitWidth); 1703 KnownZero |= NewBits; 1704 return; 1705 } 1706 case ISD::SIGN_EXTEND: { 1707 MVT InVT = Op.getOperand(0).getValueType(); 1708 unsigned InBits = InVT.getSizeInBits(); 1709 APInt InSignBit = APInt::getSignBit(InBits); 1710 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1711 APInt InMask = Mask; 1712 InMask.trunc(InBits); 1713 1714 // If any of the sign extended bits are demanded, we know that the sign 1715 // bit is demanded. Temporarily set this bit in the mask for our callee. 1716 if (NewBits.getBoolValue()) 1717 InMask |= InSignBit; 1718 1719 KnownZero.trunc(InBits); 1720 KnownOne.trunc(InBits); 1721 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1722 1723 // Note if the sign bit is known to be zero or one. 1724 bool SignBitKnownZero = KnownZero.isNegative(); 1725 bool SignBitKnownOne = KnownOne.isNegative(); 1726 assert(!(SignBitKnownZero && SignBitKnownOne) && 1727 "Sign bit can't be known to be both zero and one!"); 1728 1729 // If the sign bit wasn't actually demanded by our caller, we don't 1730 // want it set in the KnownZero and KnownOne result values. Reset the 1731 // mask and reapply it to the result values. 1732 InMask = Mask; 1733 InMask.trunc(InBits); 1734 KnownZero &= InMask; 1735 KnownOne &= InMask; 1736 1737 KnownZero.zext(BitWidth); 1738 KnownOne.zext(BitWidth); 1739 1740 // If the sign bit is known zero or one, the top bits match. 1741 if (SignBitKnownZero) 1742 KnownZero |= NewBits; 1743 else if (SignBitKnownOne) 1744 KnownOne |= NewBits; 1745 return; 1746 } 1747 case ISD::ANY_EXTEND: { 1748 MVT InVT = Op.getOperand(0).getValueType(); 1749 unsigned InBits = InVT.getSizeInBits(); 1750 APInt InMask = Mask; 1751 InMask.trunc(InBits); 1752 KnownZero.trunc(InBits); 1753 KnownOne.trunc(InBits); 1754 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1755 KnownZero.zext(BitWidth); 1756 KnownOne.zext(BitWidth); 1757 return; 1758 } 1759 case ISD::TRUNCATE: { 1760 MVT InVT = Op.getOperand(0).getValueType(); 1761 unsigned InBits = InVT.getSizeInBits(); 1762 APInt InMask = Mask; 1763 InMask.zext(InBits); 1764 KnownZero.zext(InBits); 1765 KnownOne.zext(InBits); 1766 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1767 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1768 KnownZero.trunc(BitWidth); 1769 KnownOne.trunc(BitWidth); 1770 break; 1771 } 1772 case ISD::AssertZext: { 1773 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1774 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1775 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1776 KnownOne, Depth+1); 1777 KnownZero |= (~InMask) & Mask; 1778 return; 1779 } 1780 case ISD::FGETSIGN: 1781 // All bits are zero except the low bit. 1782 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1783 return; 1784 1785 case ISD::SUB: { 1786 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1787 // We know that the top bits of C-X are clear if X contains less bits 1788 // than C (i.e. no wrap-around can happen). For example, 20-X is 1789 // positive if we can prove that X is >= 0 and < 16. 1790 if (CLHS->getAPIntValue().isNonNegative()) { 1791 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1792 // NLZ can't be BitWidth with no sign bit 1793 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1794 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1795 Depth+1); 1796 1797 // If all of the MaskV bits are known to be zero, then we know the 1798 // output top bits are zero, because we now know that the output is 1799 // from [0-C]. 1800 if ((KnownZero2 & MaskV) == MaskV) { 1801 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1802 // Top bits known zero. 1803 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1804 } 1805 } 1806 } 1807 } 1808 // fall through 1809 case ISD::ADD: { 1810 // Output known-0 bits are known if clear or set in both the low clear bits 1811 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1812 // low 3 bits clear. 1813 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1814 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1815 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1816 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1817 1818 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1819 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1820 KnownZeroOut = std::min(KnownZeroOut, 1821 KnownZero2.countTrailingOnes()); 1822 1823 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1824 return; 1825 } 1826 case ISD::SREM: 1827 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1828 const APInt &RA = Rem->getAPIntValue(); 1829 if (RA.isPowerOf2() || (-RA).isPowerOf2()) { 1830 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA; 1831 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1832 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1833 1834 // If the sign bit of the first operand is zero, the sign bit of 1835 // the result is zero. If the first operand has no one bits below 1836 // the second operand's single 1 bit, its sign will be zero. 1837 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1838 KnownZero2 |= ~LowBits; 1839 1840 KnownZero |= KnownZero2 & Mask; 1841 1842 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1843 } 1844 } 1845 return; 1846 case ISD::UREM: { 1847 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1848 const APInt &RA = Rem->getAPIntValue(); 1849 if (RA.isPowerOf2()) { 1850 APInt LowBits = (RA - 1); 1851 APInt Mask2 = LowBits & Mask; 1852 KnownZero |= ~LowBits & Mask; 1853 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1854 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1855 break; 1856 } 1857 } 1858 1859 // Since the result is less than or equal to either operand, any leading 1860 // zero bits in either operand must also exist in the result. 1861 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1862 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1863 Depth+1); 1864 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1865 Depth+1); 1866 1867 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1868 KnownZero2.countLeadingOnes()); 1869 KnownOne.clear(); 1870 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1871 return; 1872 } 1873 default: 1874 // Allow the target to implement this method for its nodes. 1875 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1876 case ISD::INTRINSIC_WO_CHAIN: 1877 case ISD::INTRINSIC_W_CHAIN: 1878 case ISD::INTRINSIC_VOID: 1879 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this); 1880 } 1881 return; 1882 } 1883} 1884 1885/// ComputeNumSignBits - Return the number of times the sign bit of the 1886/// register is replicated into the other bits. We know that at least 1 bit 1887/// is always equal to the sign bit (itself), but other cases can give us 1888/// information. For example, immediately after an "SRA X, 2", we know that 1889/// the top 3 bits are all equal to each other, so we return 3. 1890unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 1891 MVT VT = Op.getValueType(); 1892 assert(VT.isInteger() && "Invalid VT!"); 1893 unsigned VTBits = VT.getSizeInBits(); 1894 unsigned Tmp, Tmp2; 1895 unsigned FirstAnswer = 1; 1896 1897 if (Depth == 6) 1898 return 1; // Limit search depth. 1899 1900 switch (Op.getOpcode()) { 1901 default: break; 1902 case ISD::AssertSext: 1903 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1904 return VTBits-Tmp+1; 1905 case ISD::AssertZext: 1906 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1907 return VTBits-Tmp; 1908 1909 case ISD::Constant: { 1910 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 1911 // If negative, return # leading ones. 1912 if (Val.isNegative()) 1913 return Val.countLeadingOnes(); 1914 1915 // Return # leading zeros. 1916 return Val.countLeadingZeros(); 1917 } 1918 1919 case ISD::SIGN_EXTEND: 1920 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits(); 1921 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 1922 1923 case ISD::SIGN_EXTEND_INREG: 1924 // Max of the input and what this extends. 1925 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1926 Tmp = VTBits-Tmp+1; 1927 1928 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1929 return std::max(Tmp, Tmp2); 1930 1931 case ISD::SRA: 1932 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1933 // SRA X, C -> adds C sign bits. 1934 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1935 Tmp += C->getZExtValue(); 1936 if (Tmp > VTBits) Tmp = VTBits; 1937 } 1938 return Tmp; 1939 case ISD::SHL: 1940 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1941 // shl destroys sign bits. 1942 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1943 if (C->getZExtValue() >= VTBits || // Bad shift. 1944 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 1945 return Tmp - C->getZExtValue(); 1946 } 1947 break; 1948 case ISD::AND: 1949 case ISD::OR: 1950 case ISD::XOR: // NOT is handled here. 1951 // Logical binary ops preserve the number of sign bits at the worst. 1952 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1953 if (Tmp != 1) { 1954 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1955 FirstAnswer = std::min(Tmp, Tmp2); 1956 // We computed what we know about the sign bits as our first 1957 // answer. Now proceed to the generic code that uses 1958 // ComputeMaskedBits, and pick whichever answer is better. 1959 } 1960 break; 1961 1962 case ISD::SELECT: 1963 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1964 if (Tmp == 1) return 1; // Early out. 1965 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 1966 return std::min(Tmp, Tmp2); 1967 1968 case ISD::SADDO: 1969 case ISD::UADDO: 1970 case ISD::SSUBO: 1971 case ISD::USUBO: 1972 case ISD::SMULO: 1973 case ISD::UMULO: 1974 if (Op.getResNo() != 1) 1975 break; 1976 // The boolean result conforms to getBooleanContents. Fall through. 1977 case ISD::SETCC: 1978 // If setcc returns 0/-1, all bits are sign bits. 1979 if (TLI.getBooleanContents() == 1980 TargetLowering::ZeroOrNegativeOneBooleanContent) 1981 return VTBits; 1982 break; 1983 case ISD::ROTL: 1984 case ISD::ROTR: 1985 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1986 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 1987 1988 // Handle rotate right by N like a rotate left by 32-N. 1989 if (Op.getOpcode() == ISD::ROTR) 1990 RotAmt = (VTBits-RotAmt) & (VTBits-1); 1991 1992 // If we aren't rotating out all of the known-in sign bits, return the 1993 // number that are left. This handles rotl(sext(x), 1) for example. 1994 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1995 if (Tmp > RotAmt+1) return Tmp-RotAmt; 1996 } 1997 break; 1998 case ISD::ADD: 1999 // Add can have at most one carry bit. Thus we know that the output 2000 // is, at worst, one more bit than the inputs. 2001 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2002 if (Tmp == 1) return 1; // Early out. 2003 2004 // Special case decrementing a value (ADD X, -1): 2005 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2006 if (CRHS->isAllOnesValue()) { 2007 APInt KnownZero, KnownOne; 2008 APInt Mask = APInt::getAllOnesValue(VTBits); 2009 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2010 2011 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2012 // sign bits set. 2013 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2014 return VTBits; 2015 2016 // If we are subtracting one from a positive number, there is no carry 2017 // out of the result. 2018 if (KnownZero.isNegative()) 2019 return Tmp; 2020 } 2021 2022 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2023 if (Tmp2 == 1) return 1; 2024 return std::min(Tmp, Tmp2)-1; 2025 break; 2026 2027 case ISD::SUB: 2028 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2029 if (Tmp2 == 1) return 1; 2030 2031 // Handle NEG. 2032 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2033 if (CLHS->isNullValue()) { 2034 APInt KnownZero, KnownOne; 2035 APInt Mask = APInt::getAllOnesValue(VTBits); 2036 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2037 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2038 // sign bits set. 2039 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2040 return VTBits; 2041 2042 // If the input is known to be positive (the sign bit is known clear), 2043 // the output of the NEG has the same number of sign bits as the input. 2044 if (KnownZero.isNegative()) 2045 return Tmp2; 2046 2047 // Otherwise, we treat this like a SUB. 2048 } 2049 2050 // Sub can have at most one carry bit. Thus we know that the output 2051 // is, at worst, one more bit than the inputs. 2052 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2053 if (Tmp == 1) return 1; // Early out. 2054 return std::min(Tmp, Tmp2)-1; 2055 break; 2056 case ISD::TRUNCATE: 2057 // FIXME: it's tricky to do anything useful for this, but it is an important 2058 // case for targets like X86. 2059 break; 2060 } 2061 2062 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2063 if (Op.getOpcode() == ISD::LOAD) { 2064 LoadSDNode *LD = cast<LoadSDNode>(Op); 2065 unsigned ExtType = LD->getExtensionType(); 2066 switch (ExtType) { 2067 default: break; 2068 case ISD::SEXTLOAD: // '17' bits known 2069 Tmp = LD->getMemoryVT().getSizeInBits(); 2070 return VTBits-Tmp+1; 2071 case ISD::ZEXTLOAD: // '16' bits known 2072 Tmp = LD->getMemoryVT().getSizeInBits(); 2073 return VTBits-Tmp; 2074 } 2075 } 2076 2077 // Allow the target to implement this method for its nodes. 2078 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2079 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2080 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2081 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2082 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2083 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2084 } 2085 2086 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2087 // use this information. 2088 APInt KnownZero, KnownOne; 2089 APInt Mask = APInt::getAllOnesValue(VTBits); 2090 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2091 2092 if (KnownZero.isNegative()) { // sign bit is 0 2093 Mask = KnownZero; 2094 } else if (KnownOne.isNegative()) { // sign bit is 1; 2095 Mask = KnownOne; 2096 } else { 2097 // Nothing known. 2098 return FirstAnswer; 2099 } 2100 2101 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2102 // the number of identical bits in the top of the input value. 2103 Mask = ~Mask; 2104 Mask <<= Mask.getBitWidth()-VTBits; 2105 // Return # leading zeros. We use 'min' here in case Val was zero before 2106 // shifting. We don't want to return '64' as for an i32 "0". 2107 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2108} 2109 2110 2111bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2112 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2113 if (!GA) return false; 2114 if (GA->getOffset() != 0) return false; 2115 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2116 if (!GV) return false; 2117 MachineModuleInfo *MMI = getMachineModuleInfo(); 2118 return MMI && MMI->hasDebugInfo(); 2119} 2120 2121 2122/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2123/// element of the result of the vector shuffle. 2124SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) { 2125 MVT VT = N->getValueType(0); 2126 SDValue PermMask = N->getOperand(2); 2127 SDValue Idx = PermMask.getOperand(i); 2128 if (Idx.getOpcode() == ISD::UNDEF) 2129 return getNode(ISD::UNDEF, VT.getVectorElementType()); 2130 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue(); 2131 unsigned NumElems = PermMask.getNumOperands(); 2132 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2133 Index %= NumElems; 2134 2135 if (V.getOpcode() == ISD::BIT_CONVERT) { 2136 V = V.getOperand(0); 2137 MVT VVT = V.getValueType(); 2138 if (!VVT.isVector() || VVT.getVectorNumElements() != NumElems) 2139 return SDValue(); 2140 } 2141 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2142 return (Index == 0) ? V.getOperand(0) 2143 : getNode(ISD::UNDEF, VT.getVectorElementType()); 2144 if (V.getOpcode() == ISD::BUILD_VECTOR) 2145 return V.getOperand(Index); 2146 if (V.getOpcode() == ISD::VECTOR_SHUFFLE) 2147 return getShuffleScalarElt(V.getNode(), Index); 2148 return SDValue(); 2149} 2150 2151 2152/// getNode - Gets or creates the specified node. 2153/// 2154SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) { 2155 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT); 2156} 2157 2158SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT) { 2159 FoldingSetNodeID ID; 2160 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2161 void *IP = 0; 2162 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2163 return SDValue(E, 0); 2164 SDNode *N = NodeAllocator.Allocate<SDNode>(); 2165 new (N) SDNode(Opcode, DL, SDNode::getSDVTList(VT)); 2166 CSEMap.InsertNode(N, IP); 2167 2168 AllNodes.push_back(N); 2169#ifndef NDEBUG 2170 VerifyNode(N); 2171#endif 2172 return SDValue(N, 0); 2173} 2174 2175SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { 2176 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Operand); 2177} 2178 2179SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2180 MVT VT, SDValue Operand) { 2181 // Constant fold unary operations with an integer constant operand. 2182 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2183 const APInt &Val = C->getAPIntValue(); 2184 unsigned BitWidth = VT.getSizeInBits(); 2185 switch (Opcode) { 2186 default: break; 2187 case ISD::SIGN_EXTEND: 2188 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 2189 case ISD::ANY_EXTEND: 2190 case ISD::ZERO_EXTEND: 2191 case ISD::TRUNCATE: 2192 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 2193 case ISD::UINT_TO_FP: 2194 case ISD::SINT_TO_FP: { 2195 const uint64_t zero[] = {0, 0}; 2196 // No compile time operations on this type. 2197 if (VT==MVT::ppcf128) 2198 break; 2199 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 2200 (void)apf.convertFromAPInt(Val, 2201 Opcode==ISD::SINT_TO_FP, 2202 APFloat::rmNearestTiesToEven); 2203 return getConstantFP(apf, VT); 2204 } 2205 case ISD::BIT_CONVERT: 2206 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2207 return getConstantFP(Val.bitsToFloat(), VT); 2208 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2209 return getConstantFP(Val.bitsToDouble(), VT); 2210 break; 2211 case ISD::BSWAP: 2212 return getConstant(Val.byteSwap(), VT); 2213 case ISD::CTPOP: 2214 return getConstant(Val.countPopulation(), VT); 2215 case ISD::CTLZ: 2216 return getConstant(Val.countLeadingZeros(), VT); 2217 case ISD::CTTZ: 2218 return getConstant(Val.countTrailingZeros(), VT); 2219 } 2220 } 2221 2222 // Constant fold unary operations with a floating point constant operand. 2223 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2224 APFloat V = C->getValueAPF(); // make copy 2225 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2226 switch (Opcode) { 2227 case ISD::FNEG: 2228 V.changeSign(); 2229 return getConstantFP(V, VT); 2230 case ISD::FABS: 2231 V.clearSign(); 2232 return getConstantFP(V, VT); 2233 case ISD::FP_ROUND: 2234 case ISD::FP_EXTEND: { 2235 bool ignored; 2236 // This can return overflow, underflow, or inexact; we don't care. 2237 // FIXME need to be more flexible about rounding mode. 2238 (void)V.convert(*MVTToAPFloatSemantics(VT), 2239 APFloat::rmNearestTiesToEven, &ignored); 2240 return getConstantFP(V, VT); 2241 } 2242 case ISD::FP_TO_SINT: 2243 case ISD::FP_TO_UINT: { 2244 integerPart x; 2245 bool ignored; 2246 assert(integerPartWidth >= 64); 2247 // FIXME need to be more flexible about rounding mode. 2248 APFloat::opStatus s = V.convertToInteger(&x, 64U, 2249 Opcode==ISD::FP_TO_SINT, 2250 APFloat::rmTowardZero, &ignored); 2251 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2252 break; 2253 return getConstant(x, VT); 2254 } 2255 case ISD::BIT_CONVERT: 2256 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2257 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2258 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2259 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2260 break; 2261 } 2262 } 2263 } 2264 2265 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2266 switch (Opcode) { 2267 case ISD::TokenFactor: 2268 case ISD::MERGE_VALUES: 2269 case ISD::CONCAT_VECTORS: 2270 return Operand; // Factor, merge or concat of one node? No need. 2271 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node"); 2272 case ISD::FP_EXTEND: 2273 assert(VT.isFloatingPoint() && 2274 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2275 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2276 if (Operand.getOpcode() == ISD::UNDEF) 2277 return getNode(ISD::UNDEF, VT); 2278 break; 2279 case ISD::SIGN_EXTEND: 2280 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2281 "Invalid SIGN_EXTEND!"); 2282 if (Operand.getValueType() == VT) return Operand; // noop extension 2283 assert(Operand.getValueType().bitsLT(VT) 2284 && "Invalid sext node, dst < src!"); 2285 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2286 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2287 break; 2288 case ISD::ZERO_EXTEND: 2289 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2290 "Invalid ZERO_EXTEND!"); 2291 if (Operand.getValueType() == VT) return Operand; // noop extension 2292 assert(Operand.getValueType().bitsLT(VT) 2293 && "Invalid zext node, dst < src!"); 2294 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2295 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0)); 2296 break; 2297 case ISD::ANY_EXTEND: 2298 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2299 "Invalid ANY_EXTEND!"); 2300 if (Operand.getValueType() == VT) return Operand; // noop extension 2301 assert(Operand.getValueType().bitsLT(VT) 2302 && "Invalid anyext node, dst < src!"); 2303 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2304 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2305 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2306 break; 2307 case ISD::TRUNCATE: 2308 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2309 "Invalid TRUNCATE!"); 2310 if (Operand.getValueType() == VT) return Operand; // noop truncate 2311 assert(Operand.getValueType().bitsGT(VT) 2312 && "Invalid truncate node, src < dst!"); 2313 if (OpOpcode == ISD::TRUNCATE) 2314 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); 2315 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2316 OpOpcode == ISD::ANY_EXTEND) { 2317 // If the source is smaller than the dest, we still need an extend. 2318 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT)) 2319 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2320 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2321 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); 2322 else 2323 return Operand.getNode()->getOperand(0); 2324 } 2325 break; 2326 case ISD::BIT_CONVERT: 2327 // Basic sanity checking. 2328 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2329 && "Cannot BIT_CONVERT between types of different sizes!"); 2330 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2331 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2332 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0)); 2333 if (OpOpcode == ISD::UNDEF) 2334 return getNode(ISD::UNDEF, VT); 2335 break; 2336 case ISD::SCALAR_TO_VECTOR: 2337 assert(VT.isVector() && !Operand.getValueType().isVector() && 2338 VT.getVectorElementType() == Operand.getValueType() && 2339 "Illegal SCALAR_TO_VECTOR node!"); 2340 if (OpOpcode == ISD::UNDEF) 2341 return getNode(ISD::UNDEF, VT); 2342 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2343 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2344 isa<ConstantSDNode>(Operand.getOperand(1)) && 2345 Operand.getConstantOperandVal(1) == 0 && 2346 Operand.getOperand(0).getValueType() == VT) 2347 return Operand.getOperand(0); 2348 break; 2349 case ISD::FNEG: 2350 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X) 2351 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1), 2352 Operand.getNode()->getOperand(0)); 2353 if (OpOpcode == ISD::FNEG) // --X -> X 2354 return Operand.getNode()->getOperand(0); 2355 break; 2356 case ISD::FABS: 2357 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2358 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0)); 2359 break; 2360 } 2361 2362 SDNode *N; 2363 SDVTList VTs = getVTList(VT); 2364 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2365 FoldingSetNodeID ID; 2366 SDValue Ops[1] = { Operand }; 2367 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2368 void *IP = 0; 2369 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2370 return SDValue(E, 0); 2371 N = NodeAllocator.Allocate<UnarySDNode>(); 2372 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2373 CSEMap.InsertNode(N, IP); 2374 } else { 2375 N = NodeAllocator.Allocate<UnarySDNode>(); 2376 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2377 } 2378 2379 AllNodes.push_back(N); 2380#ifndef NDEBUG 2381 VerifyNode(N); 2382#endif 2383 return SDValue(N, 0); 2384} 2385 2386SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2387 MVT VT, 2388 ConstantSDNode *Cst1, 2389 ConstantSDNode *Cst2) { 2390 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2391 2392 switch (Opcode) { 2393 case ISD::ADD: return getConstant(C1 + C2, VT); 2394 case ISD::SUB: return getConstant(C1 - C2, VT); 2395 case ISD::MUL: return getConstant(C1 * C2, VT); 2396 case ISD::UDIV: 2397 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2398 break; 2399 case ISD::UREM: 2400 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2401 break; 2402 case ISD::SDIV: 2403 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2404 break; 2405 case ISD::SREM: 2406 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2407 break; 2408 case ISD::AND: return getConstant(C1 & C2, VT); 2409 case ISD::OR: return getConstant(C1 | C2, VT); 2410 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2411 case ISD::SHL: return getConstant(C1 << C2, VT); 2412 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2413 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2414 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2415 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2416 default: break; 2417 } 2418 2419 return SDValue(); 2420} 2421 2422SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2423 SDValue N1, SDValue N2) { 2424 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2); 2425} 2426 2427SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 2428 SDValue N1, SDValue N2) { 2429 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2430 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2431 switch (Opcode) { 2432 default: break; 2433 case ISD::TokenFactor: 2434 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2435 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2436 // Fold trivial token factors. 2437 if (N1.getOpcode() == ISD::EntryToken) return N2; 2438 if (N2.getOpcode() == ISD::EntryToken) return N1; 2439 if (N1 == N2) return N1; 2440 break; 2441 case ISD::CONCAT_VECTORS: 2442 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2443 // one big BUILD_VECTOR. 2444 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2445 N2.getOpcode() == ISD::BUILD_VECTOR) { 2446 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2447 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2448 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2449 } 2450 break; 2451 case ISD::AND: 2452 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2453 N1.getValueType() == VT && "Binary operator types must match!"); 2454 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2455 // worth handling here. 2456 if (N2C && N2C->isNullValue()) 2457 return N2; 2458 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2459 return N1; 2460 break; 2461 case ISD::OR: 2462 case ISD::XOR: 2463 case ISD::ADD: 2464 case ISD::SUB: 2465 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2466 N1.getValueType() == VT && "Binary operator types must match!"); 2467 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2468 // it's worth handling here. 2469 if (N2C && N2C->isNullValue()) 2470 return N1; 2471 break; 2472 case ISD::UDIV: 2473 case ISD::UREM: 2474 case ISD::MULHU: 2475 case ISD::MULHS: 2476 case ISD::MUL: 2477 case ISD::SDIV: 2478 case ISD::SREM: 2479 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2480 // fall through 2481 case ISD::FADD: 2482 case ISD::FSUB: 2483 case ISD::FMUL: 2484 case ISD::FDIV: 2485 case ISD::FREM: 2486 if (UnsafeFPMath) { 2487 if (Opcode == ISD::FADD) { 2488 // 0+x --> x 2489 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2490 if (CFP->getValueAPF().isZero()) 2491 return N2; 2492 // x+0 --> x 2493 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2494 if (CFP->getValueAPF().isZero()) 2495 return N1; 2496 } else if (Opcode == ISD::FSUB) { 2497 // x-0 --> x 2498 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2499 if (CFP->getValueAPF().isZero()) 2500 return N1; 2501 } 2502 } 2503 assert(N1.getValueType() == N2.getValueType() && 2504 N1.getValueType() == VT && "Binary operator types must match!"); 2505 break; 2506 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2507 assert(N1.getValueType() == VT && 2508 N1.getValueType().isFloatingPoint() && 2509 N2.getValueType().isFloatingPoint() && 2510 "Invalid FCOPYSIGN!"); 2511 break; 2512 case ISD::SHL: 2513 case ISD::SRA: 2514 case ISD::SRL: 2515 case ISD::ROTL: 2516 case ISD::ROTR: 2517 assert(VT == N1.getValueType() && 2518 "Shift operators return type must be the same as their first arg"); 2519 assert(VT.isInteger() && N2.getValueType().isInteger() && 2520 "Shifts only work on integers"); 2521 assert((N2.getValueType() == TLI.getShiftAmountTy() || 2522 (N2.getValueType().isVector() && N2.getValueType().isInteger())) && 2523 "Wrong type for shift amount"); 2524 2525 // Always fold shifts of i1 values so the code generator doesn't need to 2526 // handle them. Since we know the size of the shift has to be less than the 2527 // size of the value, the shift/rotate count is guaranteed to be zero. 2528 if (VT == MVT::i1) 2529 return N1; 2530 break; 2531 case ISD::FP_ROUND_INREG: { 2532 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2533 assert(VT == N1.getValueType() && "Not an inreg round!"); 2534 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2535 "Cannot FP_ROUND_INREG integer types"); 2536 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2537 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2538 break; 2539 } 2540 case ISD::FP_ROUND: 2541 assert(VT.isFloatingPoint() && 2542 N1.getValueType().isFloatingPoint() && 2543 VT.bitsLE(N1.getValueType()) && 2544 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2545 if (N1.getValueType() == VT) return N1; // noop conversion. 2546 break; 2547 case ISD::AssertSext: 2548 case ISD::AssertZext: { 2549 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2550 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2551 assert(VT.isInteger() && EVT.isInteger() && 2552 "Cannot *_EXTEND_INREG FP types"); 2553 assert(EVT.bitsLE(VT) && "Not extending!"); 2554 if (VT == EVT) return N1; // noop assertion. 2555 break; 2556 } 2557 case ISD::SIGN_EXTEND_INREG: { 2558 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2559 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2560 assert(VT.isInteger() && EVT.isInteger() && 2561 "Cannot *_EXTEND_INREG FP types"); 2562 assert(EVT.bitsLE(VT) && "Not extending!"); 2563 if (EVT == VT) return N1; // Not actually extending 2564 2565 if (N1C) { 2566 APInt Val = N1C->getAPIntValue(); 2567 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits(); 2568 Val <<= Val.getBitWidth()-FromBits; 2569 Val = Val.ashr(Val.getBitWidth()-FromBits); 2570 return getConstant(Val, VT); 2571 } 2572 break; 2573 } 2574 case ISD::EXTRACT_VECTOR_ELT: 2575 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2576 if (N1.getOpcode() == ISD::UNDEF) 2577 return getNode(ISD::UNDEF, VT); 2578 2579 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2580 // expanding copies of large vectors from registers. 2581 if (N2C && 2582 N1.getOpcode() == ISD::CONCAT_VECTORS && 2583 N1.getNumOperands() > 0) { 2584 unsigned Factor = 2585 N1.getOperand(0).getValueType().getVectorNumElements(); 2586 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, 2587 N1.getOperand(N2C->getZExtValue() / Factor), 2588 getConstant(N2C->getZExtValue() % Factor, 2589 N2.getValueType())); 2590 } 2591 2592 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2593 // expanding large vector constants. 2594 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) 2595 return N1.getOperand(N2C->getZExtValue()); 2596 2597 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2598 // operations are lowered to scalars. 2599 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2600 if (N1.getOperand(2) == N2) 2601 return N1.getOperand(1); 2602 else 2603 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2); 2604 } 2605 break; 2606 case ISD::EXTRACT_ELEMENT: 2607 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2608 assert(!N1.getValueType().isVector() && !VT.isVector() && 2609 (N1.getValueType().isInteger() == VT.isInteger()) && 2610 "Wrong types for EXTRACT_ELEMENT!"); 2611 2612 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2613 // 64-bit integers into 32-bit parts. Instead of building the extract of 2614 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2615 if (N1.getOpcode() == ISD::BUILD_PAIR) 2616 return N1.getOperand(N2C->getZExtValue()); 2617 2618 // EXTRACT_ELEMENT of a constant int is also very common. 2619 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2620 unsigned ElementSize = VT.getSizeInBits(); 2621 unsigned Shift = ElementSize * N2C->getZExtValue(); 2622 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2623 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2624 } 2625 break; 2626 case ISD::EXTRACT_SUBVECTOR: 2627 if (N1.getValueType() == VT) // Trivial extraction. 2628 return N1; 2629 break; 2630 } 2631 2632 if (N1C) { 2633 if (N2C) { 2634 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2635 if (SV.getNode()) return SV; 2636 } else { // Cannonicalize constant to RHS if commutative 2637 if (isCommutativeBinOp(Opcode)) { 2638 std::swap(N1C, N2C); 2639 std::swap(N1, N2); 2640 } 2641 } 2642 } 2643 2644 // Constant fold FP operations. 2645 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2646 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2647 if (N1CFP) { 2648 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2649 // Cannonicalize constant to RHS if commutative 2650 std::swap(N1CFP, N2CFP); 2651 std::swap(N1, N2); 2652 } else if (N2CFP && VT != MVT::ppcf128) { 2653 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2654 APFloat::opStatus s; 2655 switch (Opcode) { 2656 case ISD::FADD: 2657 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2658 if (s != APFloat::opInvalidOp) 2659 return getConstantFP(V1, VT); 2660 break; 2661 case ISD::FSUB: 2662 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2663 if (s!=APFloat::opInvalidOp) 2664 return getConstantFP(V1, VT); 2665 break; 2666 case ISD::FMUL: 2667 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2668 if (s!=APFloat::opInvalidOp) 2669 return getConstantFP(V1, VT); 2670 break; 2671 case ISD::FDIV: 2672 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2673 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2674 return getConstantFP(V1, VT); 2675 break; 2676 case ISD::FREM : 2677 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2678 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2679 return getConstantFP(V1, VT); 2680 break; 2681 case ISD::FCOPYSIGN: 2682 V1.copySign(V2); 2683 return getConstantFP(V1, VT); 2684 default: break; 2685 } 2686 } 2687 } 2688 2689 // Canonicalize an UNDEF to the RHS, even over a constant. 2690 if (N1.getOpcode() == ISD::UNDEF) { 2691 if (isCommutativeBinOp(Opcode)) { 2692 std::swap(N1, N2); 2693 } else { 2694 switch (Opcode) { 2695 case ISD::FP_ROUND_INREG: 2696 case ISD::SIGN_EXTEND_INREG: 2697 case ISD::SUB: 2698 case ISD::FSUB: 2699 case ISD::FDIV: 2700 case ISD::FREM: 2701 case ISD::SRA: 2702 return N1; // fold op(undef, arg2) -> undef 2703 case ISD::UDIV: 2704 case ISD::SDIV: 2705 case ISD::UREM: 2706 case ISD::SREM: 2707 case ISD::SRL: 2708 case ISD::SHL: 2709 if (!VT.isVector()) 2710 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2711 // For vectors, we can't easily build an all zero vector, just return 2712 // the LHS. 2713 return N2; 2714 } 2715 } 2716 } 2717 2718 // Fold a bunch of operators when the RHS is undef. 2719 if (N2.getOpcode() == ISD::UNDEF) { 2720 switch (Opcode) { 2721 case ISD::XOR: 2722 if (N1.getOpcode() == ISD::UNDEF) 2723 // Handle undef ^ undef -> 0 special case. This is a common 2724 // idiom (misuse). 2725 return getConstant(0, VT); 2726 // fallthrough 2727 case ISD::ADD: 2728 case ISD::ADDC: 2729 case ISD::ADDE: 2730 case ISD::SUB: 2731 case ISD::FADD: 2732 case ISD::FSUB: 2733 case ISD::FMUL: 2734 case ISD::FDIV: 2735 case ISD::FREM: 2736 case ISD::UDIV: 2737 case ISD::SDIV: 2738 case ISD::UREM: 2739 case ISD::SREM: 2740 return N2; // fold op(arg1, undef) -> undef 2741 case ISD::MUL: 2742 case ISD::AND: 2743 case ISD::SRL: 2744 case ISD::SHL: 2745 if (!VT.isVector()) 2746 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2747 // For vectors, we can't easily build an all zero vector, just return 2748 // the LHS. 2749 return N1; 2750 case ISD::OR: 2751 if (!VT.isVector()) 2752 return getConstant(VT.getIntegerVTBitMask(), VT); 2753 // For vectors, we can't easily build an all one vector, just return 2754 // the LHS. 2755 return N1; 2756 case ISD::SRA: 2757 return N1; 2758 } 2759 } 2760 2761 // Memoize this node if possible. 2762 SDNode *N; 2763 SDVTList VTs = getVTList(VT); 2764 if (VT != MVT::Flag) { 2765 SDValue Ops[] = { N1, N2 }; 2766 FoldingSetNodeID ID; 2767 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2768 void *IP = 0; 2769 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2770 return SDValue(E, 0); 2771 N = NodeAllocator.Allocate<BinarySDNode>(); 2772 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2773 CSEMap.InsertNode(N, IP); 2774 } else { 2775 N = NodeAllocator.Allocate<BinarySDNode>(); 2776 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2777 } 2778 2779 AllNodes.push_back(N); 2780#ifndef NDEBUG 2781 VerifyNode(N); 2782#endif 2783 return SDValue(N, 0); 2784} 2785 2786SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2787 SDValue N1, SDValue N2, SDValue N3) { 2788 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3); 2789} 2790 2791SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 2792 SDValue N1, SDValue N2, SDValue N3) { 2793 // Perform various simplifications. 2794 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2795 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2796 switch (Opcode) { 2797 case ISD::CONCAT_VECTORS: 2798 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2799 // one big BUILD_VECTOR. 2800 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2801 N2.getOpcode() == ISD::BUILD_VECTOR && 2802 N3.getOpcode() == ISD::BUILD_VECTOR) { 2803 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2804 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2805 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2806 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2807 } 2808 break; 2809 case ISD::SETCC: { 2810 // Use FoldSetCC to simplify SETCC's. 2811 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 2812 if (Simp.getNode()) return Simp; 2813 break; 2814 } 2815 case ISD::SELECT: 2816 if (N1C) { 2817 if (N1C->getZExtValue()) 2818 return N2; // select true, X, Y -> X 2819 else 2820 return N3; // select false, X, Y -> Y 2821 } 2822 2823 if (N2 == N3) return N2; // select C, X, X -> X 2824 break; 2825 case ISD::BRCOND: 2826 if (N2C) { 2827 if (N2C->getZExtValue()) // Unconditional branch 2828 return getNode(ISD::BR, MVT::Other, N1, N3); 2829 else 2830 return N1; // Never-taken branch 2831 } 2832 break; 2833 case ISD::VECTOR_SHUFFLE: 2834 assert(N1.getValueType() == N2.getValueType() && 2835 N1.getValueType().isVector() && 2836 VT.isVector() && N3.getValueType().isVector() && 2837 N3.getOpcode() == ISD::BUILD_VECTOR && 2838 VT.getVectorNumElements() == N3.getNumOperands() && 2839 "Illegal VECTOR_SHUFFLE node!"); 2840 break; 2841 case ISD::BIT_CONVERT: 2842 // Fold bit_convert nodes from a type to themselves. 2843 if (N1.getValueType() == VT) 2844 return N1; 2845 break; 2846 } 2847 2848 // Memoize node if it doesn't produce a flag. 2849 SDNode *N; 2850 SDVTList VTs = getVTList(VT); 2851 if (VT != MVT::Flag) { 2852 SDValue Ops[] = { N1, N2, N3 }; 2853 FoldingSetNodeID ID; 2854 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 2855 void *IP = 0; 2856 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2857 return SDValue(E, 0); 2858 N = NodeAllocator.Allocate<TernarySDNode>(); 2859 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 2860 CSEMap.InsertNode(N, IP); 2861 } else { 2862 N = NodeAllocator.Allocate<TernarySDNode>(); 2863 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 2864 } 2865 AllNodes.push_back(N); 2866#ifndef NDEBUG 2867 VerifyNode(N); 2868#endif 2869 return SDValue(N, 0); 2870} 2871 2872SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2873 SDValue N1, SDValue N2, SDValue N3, 2874 SDValue N4) { 2875 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4); 2876} 2877 2878SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 2879 SDValue N1, SDValue N2, SDValue N3, 2880 SDValue N4) { 2881 SDValue Ops[] = { N1, N2, N3, N4 }; 2882 return getNode(Opcode, DL, VT, Ops, 4); 2883} 2884 2885SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2886 SDValue N1, SDValue N2, SDValue N3, 2887 SDValue N4, SDValue N5) { 2888 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4, N5); 2889} 2890 2891SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 2892 SDValue N1, SDValue N2, SDValue N3, 2893 SDValue N4, SDValue N5) { 2894 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 2895 return getNode(Opcode, DL, VT, Ops, 5); 2896} 2897 2898/// getMemsetValue - Vectorized representation of the memset value 2899/// operand. 2900static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) { 2901 unsigned NumBits = VT.isVector() ? 2902 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 2903 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 2904 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 2905 unsigned Shift = 8; 2906 for (unsigned i = NumBits; i > 8; i >>= 1) { 2907 Val = (Val << Shift) | Val; 2908 Shift <<= 1; 2909 } 2910 if (VT.isInteger()) 2911 return DAG.getConstant(Val, VT); 2912 return DAG.getConstantFP(APFloat(Val), VT); 2913 } 2914 2915 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2916 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value); 2917 unsigned Shift = 8; 2918 for (unsigned i = NumBits; i > 8; i >>= 1) { 2919 Value = DAG.getNode(ISD::OR, VT, 2920 DAG.getNode(ISD::SHL, VT, Value, 2921 DAG.getConstant(Shift, 2922 TLI.getShiftAmountTy())), 2923 Value); 2924 Shift <<= 1; 2925 } 2926 2927 return Value; 2928} 2929 2930/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 2931/// used when a memcpy is turned into a memset when the source is a constant 2932/// string ptr. 2933static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG, 2934 const TargetLowering &TLI, 2935 std::string &Str, unsigned Offset) { 2936 // Handle vector with all elements zero. 2937 if (Str.empty()) { 2938 if (VT.isInteger()) 2939 return DAG.getConstant(0, VT); 2940 unsigned NumElts = VT.getVectorNumElements(); 2941 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 2942 return DAG.getNode(ISD::BIT_CONVERT, VT, 2943 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts))); 2944 } 2945 2946 assert(!VT.isVector() && "Can't handle vector type here!"); 2947 unsigned NumBits = VT.getSizeInBits(); 2948 unsigned MSB = NumBits / 8; 2949 uint64_t Val = 0; 2950 if (TLI.isLittleEndian()) 2951 Offset = Offset + MSB - 1; 2952 for (unsigned i = 0; i != MSB; ++i) { 2953 Val = (Val << 8) | (unsigned char)Str[Offset]; 2954 Offset += TLI.isLittleEndian() ? -1 : 1; 2955 } 2956 return DAG.getConstant(Val, VT); 2957} 2958 2959/// getMemBasePlusOffset - Returns base and offset node for the 2960/// 2961static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 2962 SelectionDAG &DAG) { 2963 MVT VT = Base.getValueType(); 2964 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT)); 2965} 2966 2967/// isMemSrcFromString - Returns true if memcpy source is a string constant. 2968/// 2969static bool isMemSrcFromString(SDValue Src, std::string &Str) { 2970 unsigned SrcDelta = 0; 2971 GlobalAddressSDNode *G = NULL; 2972 if (Src.getOpcode() == ISD::GlobalAddress) 2973 G = cast<GlobalAddressSDNode>(Src); 2974 else if (Src.getOpcode() == ISD::ADD && 2975 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 2976 Src.getOperand(1).getOpcode() == ISD::Constant) { 2977 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 2978 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 2979 } 2980 if (!G) 2981 return false; 2982 2983 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 2984 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 2985 return true; 2986 2987 return false; 2988} 2989 2990/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 2991/// to replace the memset / memcpy is below the threshold. It also returns the 2992/// types of the sequence of memory ops to perform memset / memcpy. 2993static 2994bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps, 2995 SDValue Dst, SDValue Src, 2996 unsigned Limit, uint64_t Size, unsigned &Align, 2997 std::string &Str, bool &isSrcStr, 2998 SelectionDAG &DAG, 2999 const TargetLowering &TLI) { 3000 isSrcStr = isMemSrcFromString(Src, Str); 3001 bool isSrcConst = isa<ConstantSDNode>(Src); 3002 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(); 3003 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr); 3004 if (VT != MVT::iAny) { 3005 unsigned NewAlign = (unsigned) 3006 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT()); 3007 // If source is a string constant, this will require an unaligned load. 3008 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 3009 if (Dst.getOpcode() != ISD::FrameIndex) { 3010 // Can't change destination alignment. It requires a unaligned store. 3011 if (AllowUnalign) 3012 VT = MVT::iAny; 3013 } else { 3014 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 3015 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3016 if (MFI->isFixedObjectIndex(FI)) { 3017 // Can't change destination alignment. It requires a unaligned store. 3018 if (AllowUnalign) 3019 VT = MVT::iAny; 3020 } else { 3021 // Give the stack frame object a larger alignment if needed. 3022 if (MFI->getObjectAlignment(FI) < NewAlign) 3023 MFI->setObjectAlignment(FI, NewAlign); 3024 Align = NewAlign; 3025 } 3026 } 3027 } 3028 } 3029 3030 if (VT == MVT::iAny) { 3031 if (AllowUnalign) { 3032 VT = MVT::i64; 3033 } else { 3034 switch (Align & 7) { 3035 case 0: VT = MVT::i64; break; 3036 case 4: VT = MVT::i32; break; 3037 case 2: VT = MVT::i16; break; 3038 default: VT = MVT::i8; break; 3039 } 3040 } 3041 3042 MVT LVT = MVT::i64; 3043 while (!TLI.isTypeLegal(LVT)) 3044 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1); 3045 assert(LVT.isInteger()); 3046 3047 if (VT.bitsGT(LVT)) 3048 VT = LVT; 3049 } 3050 3051 unsigned NumMemOps = 0; 3052 while (Size != 0) { 3053 unsigned VTSize = VT.getSizeInBits() / 8; 3054 while (VTSize > Size) { 3055 // For now, only use non-vector load / store's for the left-over pieces. 3056 if (VT.isVector()) { 3057 VT = MVT::i64; 3058 while (!TLI.isTypeLegal(VT)) 3059 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 3060 VTSize = VT.getSizeInBits() / 8; 3061 } else { 3062 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 3063 VTSize >>= 1; 3064 } 3065 } 3066 3067 if (++NumMemOps > Limit) 3068 return false; 3069 MemOps.push_back(VT); 3070 Size -= VTSize; 3071 } 3072 3073 return true; 3074} 3075 3076static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, 3077 SDValue Chain, SDValue Dst, 3078 SDValue Src, uint64_t Size, 3079 unsigned Align, bool AlwaysInline, 3080 const Value *DstSV, uint64_t DstSVOff, 3081 const Value *SrcSV, uint64_t SrcSVOff){ 3082 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3083 3084 // Expand memcpy to a series of load and store ops if the size operand falls 3085 // below a certain threshold. 3086 std::vector<MVT> MemOps; 3087 uint64_t Limit = -1ULL; 3088 if (!AlwaysInline) 3089 Limit = TLI.getMaxStoresPerMemcpy(); 3090 unsigned DstAlign = Align; // Destination alignment can change. 3091 std::string Str; 3092 bool CopyFromStr; 3093 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3094 Str, CopyFromStr, DAG, TLI)) 3095 return SDValue(); 3096 3097 3098 bool isZeroStr = CopyFromStr && Str.empty(); 3099 SmallVector<SDValue, 8> OutChains; 3100 unsigned NumMemOps = MemOps.size(); 3101 uint64_t SrcOff = 0, DstOff = 0; 3102 for (unsigned i = 0; i < NumMemOps; i++) { 3103 MVT VT = MemOps[i]; 3104 unsigned VTSize = VT.getSizeInBits() / 8; 3105 SDValue Value, Store; 3106 3107 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 3108 // It's unlikely a store of a vector immediate can be done in a single 3109 // instruction. It would require a load from a constantpool first. 3110 // We also handle store a vector with all zero's. 3111 // FIXME: Handle other cases where store of vector immediate is done in 3112 // a single instruction. 3113 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff); 3114 Store = DAG.getStore(Chain, Value, 3115 getMemBasePlusOffset(Dst, DstOff, DAG), 3116 DstSV, DstSVOff + DstOff, false, DstAlign); 3117 } else { 3118 Value = DAG.getLoad(VT, Chain, 3119 getMemBasePlusOffset(Src, SrcOff, DAG), 3120 SrcSV, SrcSVOff + SrcOff, false, Align); 3121 Store = DAG.getStore(Chain, Value, 3122 getMemBasePlusOffset(Dst, DstOff, DAG), 3123 DstSV, DstSVOff + DstOff, false, DstAlign); 3124 } 3125 OutChains.push_back(Store); 3126 SrcOff += VTSize; 3127 DstOff += VTSize; 3128 } 3129 3130 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3131 &OutChains[0], OutChains.size()); 3132} 3133 3134static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, 3135 SDValue Chain, SDValue Dst, 3136 SDValue Src, uint64_t Size, 3137 unsigned Align, bool AlwaysInline, 3138 const Value *DstSV, uint64_t DstSVOff, 3139 const Value *SrcSV, uint64_t SrcSVOff){ 3140 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3141 3142 // Expand memmove to a series of load and store ops if the size operand falls 3143 // below a certain threshold. 3144 std::vector<MVT> MemOps; 3145 uint64_t Limit = -1ULL; 3146 if (!AlwaysInline) 3147 Limit = TLI.getMaxStoresPerMemmove(); 3148 unsigned DstAlign = Align; // Destination alignment can change. 3149 std::string Str; 3150 bool CopyFromStr; 3151 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3152 Str, CopyFromStr, DAG, TLI)) 3153 return SDValue(); 3154 3155 uint64_t SrcOff = 0, DstOff = 0; 3156 3157 SmallVector<SDValue, 8> LoadValues; 3158 SmallVector<SDValue, 8> LoadChains; 3159 SmallVector<SDValue, 8> OutChains; 3160 unsigned NumMemOps = MemOps.size(); 3161 for (unsigned i = 0; i < NumMemOps; i++) { 3162 MVT VT = MemOps[i]; 3163 unsigned VTSize = VT.getSizeInBits() / 8; 3164 SDValue Value, Store; 3165 3166 Value = DAG.getLoad(VT, Chain, 3167 getMemBasePlusOffset(Src, SrcOff, DAG), 3168 SrcSV, SrcSVOff + SrcOff, false, Align); 3169 LoadValues.push_back(Value); 3170 LoadChains.push_back(Value.getValue(1)); 3171 SrcOff += VTSize; 3172 } 3173 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, 3174 &LoadChains[0], LoadChains.size()); 3175 OutChains.clear(); 3176 for (unsigned i = 0; i < NumMemOps; i++) { 3177 MVT VT = MemOps[i]; 3178 unsigned VTSize = VT.getSizeInBits() / 8; 3179 SDValue Value, Store; 3180 3181 Store = DAG.getStore(Chain, LoadValues[i], 3182 getMemBasePlusOffset(Dst, DstOff, DAG), 3183 DstSV, DstSVOff + DstOff, false, DstAlign); 3184 OutChains.push_back(Store); 3185 DstOff += VTSize; 3186 } 3187 3188 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3189 &OutChains[0], OutChains.size()); 3190} 3191 3192static SDValue getMemsetStores(SelectionDAG &DAG, 3193 SDValue Chain, SDValue Dst, 3194 SDValue Src, uint64_t Size, 3195 unsigned Align, 3196 const Value *DstSV, uint64_t DstSVOff) { 3197 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3198 3199 // Expand memset to a series of load/store ops if the size operand 3200 // falls below a certain threshold. 3201 std::vector<MVT> MemOps; 3202 std::string Str; 3203 bool CopyFromStr; 3204 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 3205 Size, Align, Str, CopyFromStr, DAG, TLI)) 3206 return SDValue(); 3207 3208 SmallVector<SDValue, 8> OutChains; 3209 uint64_t DstOff = 0; 3210 3211 unsigned NumMemOps = MemOps.size(); 3212 for (unsigned i = 0; i < NumMemOps; i++) { 3213 MVT VT = MemOps[i]; 3214 unsigned VTSize = VT.getSizeInBits() / 8; 3215 SDValue Value = getMemsetValue(Src, VT, DAG); 3216 SDValue Store = DAG.getStore(Chain, Value, 3217 getMemBasePlusOffset(Dst, DstOff, DAG), 3218 DstSV, DstSVOff + DstOff); 3219 OutChains.push_back(Store); 3220 DstOff += VTSize; 3221 } 3222 3223 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3224 &OutChains[0], OutChains.size()); 3225} 3226 3227SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst, 3228 SDValue Src, SDValue Size, 3229 unsigned Align, bool AlwaysInline, 3230 const Value *DstSV, uint64_t DstSVOff, 3231 const Value *SrcSV, uint64_t SrcSVOff) { 3232 3233 // Check to see if we should lower the memcpy to loads and stores first. 3234 // For cases within the target-specified limits, this is the best choice. 3235 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3236 if (ConstantSize) { 3237 // Memcpy with size zero? Just return the original chain. 3238 if (ConstantSize->isNullValue()) 3239 return Chain; 3240 3241 SDValue Result = 3242 getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 3243 ConstantSize->getZExtValue(), 3244 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3245 if (Result.getNode()) 3246 return Result; 3247 } 3248 3249 // Then check to see if we should lower the memcpy with target-specific 3250 // code. If the target chooses to do this, this is the next best. 3251 SDValue Result = 3252 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align, 3253 AlwaysInline, 3254 DstSV, DstSVOff, SrcSV, SrcSVOff); 3255 if (Result.getNode()) 3256 return Result; 3257 3258 // If we really need inline code and the target declined to provide it, 3259 // use a (potentially long) sequence of loads and stores. 3260 if (AlwaysInline) { 3261 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3262 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 3263 ConstantSize->getZExtValue(), Align, true, 3264 DstSV, DstSVOff, SrcSV, SrcSVOff); 3265 } 3266 3267 // Emit a library call. 3268 TargetLowering::ArgListTy Args; 3269 TargetLowering::ArgListEntry Entry; 3270 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3271 Entry.Node = Dst; Args.push_back(Entry); 3272 Entry.Node = Src; Args.push_back(Entry); 3273 Entry.Node = Size; Args.push_back(Entry); 3274 std::pair<SDValue,SDValue> CallResult = 3275 TLI.LowerCallTo(Chain, Type::VoidTy, 3276 false, false, false, false, CallingConv::C, false, 3277 getExternalSymbol("memcpy", TLI.getPointerTy()), 3278 Args, *this); 3279 return CallResult.second; 3280} 3281 3282SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst, 3283 SDValue Src, SDValue Size, 3284 unsigned Align, 3285 const Value *DstSV, uint64_t DstSVOff, 3286 const Value *SrcSV, uint64_t SrcSVOff) { 3287 3288 // Check to see if we should lower the memmove to loads and stores first. 3289 // For cases within the target-specified limits, this is the best choice. 3290 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3291 if (ConstantSize) { 3292 // Memmove with size zero? Just return the original chain. 3293 if (ConstantSize->isNullValue()) 3294 return Chain; 3295 3296 SDValue Result = 3297 getMemmoveLoadsAndStores(*this, Chain, Dst, Src, 3298 ConstantSize->getZExtValue(), 3299 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3300 if (Result.getNode()) 3301 return Result; 3302 } 3303 3304 // Then check to see if we should lower the memmove with target-specific 3305 // code. If the target chooses to do this, this is the next best. 3306 SDValue Result = 3307 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align, 3308 DstSV, DstSVOff, SrcSV, SrcSVOff); 3309 if (Result.getNode()) 3310 return Result; 3311 3312 // Emit a library call. 3313 TargetLowering::ArgListTy Args; 3314 TargetLowering::ArgListEntry Entry; 3315 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3316 Entry.Node = Dst; Args.push_back(Entry); 3317 Entry.Node = Src; Args.push_back(Entry); 3318 Entry.Node = Size; Args.push_back(Entry); 3319 std::pair<SDValue,SDValue> CallResult = 3320 TLI.LowerCallTo(Chain, Type::VoidTy, 3321 false, false, false, false, CallingConv::C, false, 3322 getExternalSymbol("memmove", TLI.getPointerTy()), 3323 Args, *this); 3324 return CallResult.second; 3325} 3326 3327SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst, 3328 SDValue Src, SDValue Size, 3329 unsigned Align, 3330 const Value *DstSV, uint64_t DstSVOff) { 3331 3332 // Check to see if we should lower the memset to stores first. 3333 // For cases within the target-specified limits, this is the best choice. 3334 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3335 if (ConstantSize) { 3336 // Memset with size zero? Just return the original chain. 3337 if (ConstantSize->isNullValue()) 3338 return Chain; 3339 3340 SDValue Result = 3341 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(), 3342 Align, DstSV, DstSVOff); 3343 if (Result.getNode()) 3344 return Result; 3345 } 3346 3347 // Then check to see if we should lower the memset with target-specific 3348 // code. If the target chooses to do this, this is the next best. 3349 SDValue Result = 3350 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align, 3351 DstSV, DstSVOff); 3352 if (Result.getNode()) 3353 return Result; 3354 3355 // Emit a library call. 3356 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(); 3357 TargetLowering::ArgListTy Args; 3358 TargetLowering::ArgListEntry Entry; 3359 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3360 Args.push_back(Entry); 3361 // Extend or truncate the argument to be an i32 value for the call. 3362 if (Src.getValueType().bitsGT(MVT::i32)) 3363 Src = getNode(ISD::TRUNCATE, MVT::i32, Src); 3364 else 3365 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src); 3366 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true; 3367 Args.push_back(Entry); 3368 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false; 3369 Args.push_back(Entry); 3370 std::pair<SDValue,SDValue> CallResult = 3371 TLI.LowerCallTo(Chain, Type::VoidTy, 3372 false, false, false, false, CallingConv::C, false, 3373 getExternalSymbol("memset", TLI.getPointerTy()), 3374 Args, *this); 3375 return CallResult.second; 3376} 3377 3378SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT, 3379 SDValue Chain, 3380 SDValue Ptr, SDValue Cmp, 3381 SDValue Swp, const Value* PtrVal, 3382 unsigned Alignment) { 3383 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3384 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3385 3386 MVT VT = Cmp.getValueType(); 3387 3388 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3389 Alignment = getMVTAlignment(MemVT); 3390 3391 SDVTList VTs = getVTList(VT, MVT::Other); 3392 FoldingSetNodeID ID; 3393 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3394 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3395 void* IP = 0; 3396 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3397 return SDValue(E, 0); 3398 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3399 new (N) AtomicSDNode(Opcode, VTs, MemVT, 3400 Chain, Ptr, Cmp, Swp, PtrVal, Alignment); 3401 CSEMap.InsertNode(N, IP); 3402 AllNodes.push_back(N); 3403 return SDValue(N, 0); 3404} 3405 3406SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT, 3407 SDValue Chain, 3408 SDValue Ptr, SDValue Cmp, 3409 SDValue Swp, const Value* PtrVal, 3410 unsigned Alignment) { 3411 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3412 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3413 3414 MVT VT = Cmp.getValueType(); 3415 3416 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3417 Alignment = getMVTAlignment(MemVT); 3418 3419 SDVTList VTs = getVTList(VT, MVT::Other); 3420 FoldingSetNodeID ID; 3421 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3422 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3423 void* IP = 0; 3424 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3425 return SDValue(E, 0); 3426 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3427 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, 3428 Chain, Ptr, Cmp, Swp, PtrVal, Alignment); 3429 CSEMap.InsertNode(N, IP); 3430 AllNodes.push_back(N); 3431 return SDValue(N, 0); 3432} 3433 3434SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT, 3435 SDValue Chain, 3436 SDValue Ptr, SDValue Val, 3437 const Value* PtrVal, 3438 unsigned Alignment) { 3439 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3440 Opcode == ISD::ATOMIC_LOAD_SUB || 3441 Opcode == ISD::ATOMIC_LOAD_AND || 3442 Opcode == ISD::ATOMIC_LOAD_OR || 3443 Opcode == ISD::ATOMIC_LOAD_XOR || 3444 Opcode == ISD::ATOMIC_LOAD_NAND || 3445 Opcode == ISD::ATOMIC_LOAD_MIN || 3446 Opcode == ISD::ATOMIC_LOAD_MAX || 3447 Opcode == ISD::ATOMIC_LOAD_UMIN || 3448 Opcode == ISD::ATOMIC_LOAD_UMAX || 3449 Opcode == ISD::ATOMIC_SWAP) && 3450 "Invalid Atomic Op"); 3451 3452 MVT VT = Val.getValueType(); 3453 3454 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3455 Alignment = getMVTAlignment(MemVT); 3456 3457 SDVTList VTs = getVTList(VT, MVT::Other); 3458 FoldingSetNodeID ID; 3459 SDValue Ops[] = {Chain, Ptr, Val}; 3460 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3461 void* IP = 0; 3462 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3463 return SDValue(E, 0); 3464 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3465 new (N) AtomicSDNode(Opcode, VTs, MemVT, 3466 Chain, Ptr, Val, PtrVal, Alignment); 3467 CSEMap.InsertNode(N, IP); 3468 AllNodes.push_back(N); 3469 return SDValue(N, 0); 3470} 3471 3472SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT, 3473 SDValue Chain, 3474 SDValue Ptr, SDValue Val, 3475 const Value* PtrVal, 3476 unsigned Alignment) { 3477 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3478 Opcode == ISD::ATOMIC_LOAD_SUB || 3479 Opcode == ISD::ATOMIC_LOAD_AND || 3480 Opcode == ISD::ATOMIC_LOAD_OR || 3481 Opcode == ISD::ATOMIC_LOAD_XOR || 3482 Opcode == ISD::ATOMIC_LOAD_NAND || 3483 Opcode == ISD::ATOMIC_LOAD_MIN || 3484 Opcode == ISD::ATOMIC_LOAD_MAX || 3485 Opcode == ISD::ATOMIC_LOAD_UMIN || 3486 Opcode == ISD::ATOMIC_LOAD_UMAX || 3487 Opcode == ISD::ATOMIC_SWAP) && 3488 "Invalid Atomic Op"); 3489 3490 MVT VT = Val.getValueType(); 3491 3492 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3493 Alignment = getMVTAlignment(MemVT); 3494 3495 SDVTList VTs = getVTList(VT, MVT::Other); 3496 FoldingSetNodeID ID; 3497 SDValue Ops[] = {Chain, Ptr, Val}; 3498 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3499 void* IP = 0; 3500 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3501 return SDValue(E, 0); 3502 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3503 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, 3504 Chain, Ptr, Val, PtrVal, Alignment); 3505 CSEMap.InsertNode(N, IP); 3506 AllNodes.push_back(N); 3507 return SDValue(N, 0); 3508} 3509 3510/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3511/// Allowed to return something different (and simpler) if Simplify is true. 3512SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps) { 3513 if (NumOps == 1) 3514 return Ops[0]; 3515 3516 SmallVector<MVT, 4> VTs; 3517 VTs.reserve(NumOps); 3518 for (unsigned i = 0; i < NumOps; ++i) 3519 VTs.push_back(Ops[i].getValueType()); 3520 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps); 3521} 3522 3523SDValue 3524SelectionDAG::getMemIntrinsicNode(unsigned Opcode, 3525 const MVT *VTs, unsigned NumVTs, 3526 const SDValue *Ops, unsigned NumOps, 3527 MVT MemVT, const Value *srcValue, int SVOff, 3528 unsigned Align, bool Vol, 3529 bool ReadMem, bool WriteMem) { 3530 return getMemIntrinsicNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps, 3531 MemVT, srcValue, SVOff, Align, Vol, 3532 ReadMem, WriteMem); 3533} 3534 3535SDValue 3536SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3537 const MVT *VTs, unsigned NumVTs, 3538 const SDValue *Ops, unsigned NumOps, 3539 MVT MemVT, const Value *srcValue, int SVOff, 3540 unsigned Align, bool Vol, 3541 bool ReadMem, bool WriteMem) { 3542 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3543 MemVT, srcValue, SVOff, Align, Vol, 3544 ReadMem, WriteMem); 3545} 3546 3547SDValue 3548SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDVTList VTList, 3549 const SDValue *Ops, unsigned NumOps, 3550 MVT MemVT, const Value *srcValue, int SVOff, 3551 unsigned Align, bool Vol, 3552 bool ReadMem, bool WriteMem) { 3553 // Memoize the node unless it returns a flag. 3554 MemIntrinsicSDNode *N; 3555 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3556 FoldingSetNodeID ID; 3557 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3558 void *IP = 0; 3559 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3560 return SDValue(E, 0); 3561 3562 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3563 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT, 3564 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3565 CSEMap.InsertNode(N, IP); 3566 } else { 3567 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3568 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT, 3569 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3570 } 3571 AllNodes.push_back(N); 3572 return SDValue(N, 0); 3573} 3574 3575SDValue 3576SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3577 const SDValue *Ops, unsigned NumOps, 3578 MVT MemVT, const Value *srcValue, int SVOff, 3579 unsigned Align, bool Vol, 3580 bool ReadMem, bool WriteMem) { 3581 // Memoize the node unless it returns a flag. 3582 MemIntrinsicSDNode *N; 3583 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3584 FoldingSetNodeID ID; 3585 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3586 void *IP = 0; 3587 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3588 return SDValue(E, 0); 3589 3590 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3591 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, 3592 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3593 CSEMap.InsertNode(N, IP); 3594 } else { 3595 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3596 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, 3597 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3598 } 3599 AllNodes.push_back(N); 3600 return SDValue(N, 0); 3601} 3602 3603SDValue 3604SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall, 3605 bool IsInreg, SDVTList VTs, 3606 const SDValue *Operands, unsigned NumOperands) { 3607 // Do not include isTailCall in the folding set profile. 3608 FoldingSetNodeID ID; 3609 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands); 3610 ID.AddInteger(CallingConv); 3611 ID.AddInteger(IsVarArgs); 3612 void *IP = 0; 3613 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3614 // Instead of including isTailCall in the folding set, we just 3615 // set the flag of the existing node. 3616 if (!IsTailCall) 3617 cast<CallSDNode>(E)->setNotTailCall(); 3618 return SDValue(E, 0); 3619 } 3620 SDNode *N = NodeAllocator.Allocate<CallSDNode>(); 3621 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg, 3622 VTs, Operands, NumOperands); 3623 CSEMap.InsertNode(N, IP); 3624 AllNodes.push_back(N); 3625 return SDValue(N, 0); 3626} 3627 3628SDValue 3629SelectionDAG::getCall(unsigned CallingConv, DebugLoc dl, bool IsVarArgs, 3630 bool IsTailCall, bool IsInreg, SDVTList VTs, 3631 const SDValue *Operands, unsigned NumOperands) { 3632 // Do not include isTailCall in the folding set profile. 3633 FoldingSetNodeID ID; 3634 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands); 3635 ID.AddInteger(CallingConv); 3636 ID.AddInteger(IsVarArgs); 3637 void *IP = 0; 3638 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3639 // Instead of including isTailCall in the folding set, we just 3640 // set the flag of the existing node. 3641 if (!IsTailCall) 3642 cast<CallSDNode>(E)->setNotTailCall(); 3643 return SDValue(E, 0); 3644 } 3645 SDNode *N = NodeAllocator.Allocate<CallSDNode>(); 3646 new (N) CallSDNode(CallingConv, dl, IsVarArgs, IsTailCall, IsInreg, 3647 VTs, Operands, NumOperands); 3648 CSEMap.InsertNode(N, IP); 3649 AllNodes.push_back(N); 3650 return SDValue(N, 0); 3651} 3652 3653SDValue 3654SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3655 MVT VT, SDValue Chain, 3656 SDValue Ptr, SDValue Offset, 3657 const Value *SV, int SVOffset, MVT EVT, 3658 bool isVolatile, unsigned Alignment) { 3659 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3660 Alignment = getMVTAlignment(VT); 3661 3662 if (VT == EVT) { 3663 ExtType = ISD::NON_EXTLOAD; 3664 } else if (ExtType == ISD::NON_EXTLOAD) { 3665 assert(VT == EVT && "Non-extending load from different memory type!"); 3666 } else { 3667 // Extending load. 3668 if (VT.isVector()) 3669 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() && 3670 "Invalid vector extload!"); 3671 else 3672 assert(EVT.bitsLT(VT) && 3673 "Should only be an extending load, not truncating!"); 3674 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3675 "Cannot sign/zero extend a FP/Vector load!"); 3676 assert(VT.isInteger() == EVT.isInteger() && 3677 "Cannot convert from FP to Int or Int -> FP!"); 3678 } 3679 3680 bool Indexed = AM != ISD::UNINDEXED; 3681 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3682 "Unindexed load with an offset!"); 3683 3684 SDVTList VTs = Indexed ? 3685 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3686 SDValue Ops[] = { Chain, Ptr, Offset }; 3687 FoldingSetNodeID ID; 3688 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3689 ID.AddInteger(AM); 3690 ID.AddInteger(ExtType); 3691 ID.AddInteger(EVT.getRawBits()); 3692 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3693 void *IP = 0; 3694 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3695 return SDValue(E, 0); 3696 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3697 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset, 3698 Alignment, isVolatile); 3699 CSEMap.InsertNode(N, IP); 3700 AllNodes.push_back(N); 3701 return SDValue(N, 0); 3702} 3703 3704SDValue 3705SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3706 ISD::LoadExtType ExtType, MVT VT, SDValue Chain, 3707 SDValue Ptr, SDValue Offset, 3708 const Value *SV, int SVOffset, MVT EVT, 3709 bool isVolatile, unsigned Alignment) { 3710 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3711 Alignment = getMVTAlignment(VT); 3712 3713 if (VT == EVT) { 3714 ExtType = ISD::NON_EXTLOAD; 3715 } else if (ExtType == ISD::NON_EXTLOAD) { 3716 assert(VT == EVT && "Non-extending load from different memory type!"); 3717 } else { 3718 // Extending load. 3719 if (VT.isVector()) 3720 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() && 3721 "Invalid vector extload!"); 3722 else 3723 assert(EVT.bitsLT(VT) && 3724 "Should only be an extending load, not truncating!"); 3725 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3726 "Cannot sign/zero extend a FP/Vector load!"); 3727 assert(VT.isInteger() == EVT.isInteger() && 3728 "Cannot convert from FP to Int or Int -> FP!"); 3729 } 3730 3731 bool Indexed = AM != ISD::UNINDEXED; 3732 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3733 "Unindexed load with an offset!"); 3734 3735 SDVTList VTs = Indexed ? 3736 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3737 SDValue Ops[] = { Chain, Ptr, Offset }; 3738 FoldingSetNodeID ID; 3739 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3740 ID.AddInteger(AM); 3741 ID.AddInteger(ExtType); 3742 ID.AddInteger(EVT.getRawBits()); 3743 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3744 void *IP = 0; 3745 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3746 return SDValue(E, 0); 3747 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3748 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset, 3749 Alignment, isVolatile); 3750 CSEMap.InsertNode(N, IP); 3751 AllNodes.push_back(N); 3752 return SDValue(N, 0); 3753} 3754 3755SDValue SelectionDAG::getLoad(MVT VT, 3756 SDValue Chain, SDValue Ptr, 3757 const Value *SV, int SVOffset, 3758 bool isVolatile, unsigned Alignment) { 3759 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3760 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3761 SV, SVOffset, VT, isVolatile, Alignment); 3762} 3763 3764SDValue SelectionDAG::getLoad(MVT VT, DebugLoc dl, 3765 SDValue Chain, SDValue Ptr, 3766 const Value *SV, int SVOffset, 3767 bool isVolatile, unsigned Alignment) { 3768 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3769 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3770 SV, SVOffset, VT, isVolatile, Alignment); 3771} 3772 3773SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT, 3774 SDValue Chain, SDValue Ptr, 3775 const Value *SV, 3776 int SVOffset, MVT EVT, 3777 bool isVolatile, unsigned Alignment) { 3778 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3779 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef, 3780 SV, SVOffset, EVT, isVolatile, Alignment); 3781} 3782 3783SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, MVT VT, 3784 SDValue Chain, SDValue Ptr, 3785 const Value *SV, 3786 int SVOffset, MVT EVT, 3787 bool isVolatile, unsigned Alignment) { 3788 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3789 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3790 SV, SVOffset, EVT, isVolatile, Alignment); 3791} 3792 3793SDValue 3794SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base, 3795 SDValue Offset, ISD::MemIndexedMode AM) { 3796 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3797 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3798 "Load is already a indexed load!"); 3799 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), 3800 LD->getChain(), Base, Offset, LD->getSrcValue(), 3801 LD->getSrcValueOffset(), LD->getMemoryVT(), 3802 LD->isVolatile(), LD->getAlignment()); 3803} 3804 3805SDValue 3806SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3807 SDValue Offset, ISD::MemIndexedMode AM) { 3808 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3809 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3810 "Load is already a indexed load!"); 3811 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3812 LD->getChain(), Base, Offset, LD->getSrcValue(), 3813 LD->getSrcValueOffset(), LD->getMemoryVT(), 3814 LD->isVolatile(), LD->getAlignment()); 3815} 3816 3817SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val, 3818 SDValue Ptr, const Value *SV, int SVOffset, 3819 bool isVolatile, unsigned Alignment) { 3820 MVT VT = Val.getValueType(); 3821 3822 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3823 Alignment = getMVTAlignment(VT); 3824 3825 SDVTList VTs = getVTList(MVT::Other); 3826 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3827 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3828 FoldingSetNodeID ID; 3829 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3830 ID.AddInteger(ISD::UNINDEXED); 3831 ID.AddInteger(false); 3832 ID.AddInteger(VT.getRawBits()); 3833 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3834 void *IP = 0; 3835 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3836 return SDValue(E, 0); 3837 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3838 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false, 3839 VT, SV, SVOffset, Alignment, isVolatile); 3840 CSEMap.InsertNode(N, IP); 3841 AllNodes.push_back(N); 3842 return SDValue(N, 0); 3843} 3844 3845SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3846 SDValue Ptr, const Value *SV, int SVOffset, 3847 bool isVolatile, unsigned Alignment) { 3848 MVT VT = Val.getValueType(); 3849 3850 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3851 Alignment = getMVTAlignment(VT); 3852 3853 SDVTList VTs = getVTList(MVT::Other); 3854 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3855 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3856 FoldingSetNodeID ID; 3857 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3858 ID.AddInteger(ISD::UNINDEXED); 3859 ID.AddInteger(false); 3860 ID.AddInteger(VT.getRawBits()); 3861 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3862 void *IP = 0; 3863 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3864 return SDValue(E, 0); 3865 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3866 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false, 3867 VT, SV, SVOffset, Alignment, isVolatile); 3868 CSEMap.InsertNode(N, IP); 3869 AllNodes.push_back(N); 3870 return SDValue(N, 0); 3871} 3872 3873SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val, 3874 SDValue Ptr, const Value *SV, 3875 int SVOffset, MVT SVT, 3876 bool isVolatile, unsigned Alignment) { 3877 MVT VT = Val.getValueType(); 3878 3879 if (VT == SVT) 3880 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3881 3882 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3883 assert(VT.isInteger() == SVT.isInteger() && 3884 "Can't do FP-INT conversion!"); 3885 3886 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3887 Alignment = getMVTAlignment(VT); 3888 3889 SDVTList VTs = getVTList(MVT::Other); 3890 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3891 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3892 FoldingSetNodeID ID; 3893 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3894 ID.AddInteger(ISD::UNINDEXED); 3895 ID.AddInteger(1); 3896 ID.AddInteger(SVT.getRawBits()); 3897 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3898 void *IP = 0; 3899 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3900 return SDValue(E, 0); 3901 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3902 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true, 3903 SVT, SV, SVOffset, Alignment, isVolatile); 3904 CSEMap.InsertNode(N, IP); 3905 AllNodes.push_back(N); 3906 return SDValue(N, 0); 3907} 3908 3909SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3910 SDValue Ptr, const Value *SV, 3911 int SVOffset, MVT SVT, 3912 bool isVolatile, unsigned Alignment) { 3913 MVT VT = Val.getValueType(); 3914 3915 if (VT == SVT) 3916 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3917 3918 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3919 assert(VT.isInteger() == SVT.isInteger() && 3920 "Can't do FP-INT conversion!"); 3921 3922 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3923 Alignment = getMVTAlignment(VT); 3924 3925 SDVTList VTs = getVTList(MVT::Other); 3926 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3927 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3928 FoldingSetNodeID ID; 3929 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3930 ID.AddInteger(ISD::UNINDEXED); 3931 ID.AddInteger(1); 3932 ID.AddInteger(SVT.getRawBits()); 3933 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3934 void *IP = 0; 3935 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3936 return SDValue(E, 0); 3937 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3938 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true, 3939 SVT, SV, SVOffset, Alignment, isVolatile); 3940 CSEMap.InsertNode(N, IP); 3941 AllNodes.push_back(N); 3942 return SDValue(N, 0); 3943} 3944 3945SDValue 3946SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base, 3947 SDValue Offset, ISD::MemIndexedMode AM) { 3948 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3949 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3950 "Store is already a indexed store!"); 3951 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 3952 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3953 FoldingSetNodeID ID; 3954 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3955 ID.AddInteger(AM); 3956 ID.AddInteger(ST->isTruncatingStore()); 3957 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3958 ID.AddInteger(ST->getRawFlags()); 3959 void *IP = 0; 3960 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3961 return SDValue(E, 0); 3962 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3963 new (N) StoreSDNode(Ops, VTs, AM, 3964 ST->isTruncatingStore(), ST->getMemoryVT(), 3965 ST->getSrcValue(), ST->getSrcValueOffset(), 3966 ST->getAlignment(), ST->isVolatile()); 3967 CSEMap.InsertNode(N, IP); 3968 AllNodes.push_back(N); 3969 return SDValue(N, 0); 3970} 3971 3972SDValue 3973SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 3974 SDValue Offset, ISD::MemIndexedMode AM) { 3975 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3976 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3977 "Store is already a indexed store!"); 3978 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 3979 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3980 FoldingSetNodeID ID; 3981 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3982 ID.AddInteger(AM); 3983 ID.AddInteger(ST->isTruncatingStore()); 3984 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3985 ID.AddInteger(ST->getRawFlags()); 3986 void *IP = 0; 3987 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3988 return SDValue(E, 0); 3989 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3990 new (N) StoreSDNode(Ops, dl, VTs, AM, 3991 ST->isTruncatingStore(), ST->getMemoryVT(), 3992 ST->getSrcValue(), ST->getSrcValueOffset(), 3993 ST->getAlignment(), ST->isVolatile()); 3994 CSEMap.InsertNode(N, IP); 3995 AllNodes.push_back(N); 3996 return SDValue(N, 0); 3997} 3998 3999SDValue SelectionDAG::getVAArg(MVT VT, 4000 SDValue Chain, SDValue Ptr, 4001 SDValue SV) { 4002 SDValue Ops[] = { Chain, Ptr, SV }; 4003 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3); 4004} 4005 4006SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 4007 const SDUse *Ops, unsigned NumOps) { 4008 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps); 4009} 4010 4011SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 4012 const SDUse *Ops, unsigned NumOps) { 4013 switch (NumOps) { 4014 case 0: return getNode(Opcode, DL, VT); 4015 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4016 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4017 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4018 default: break; 4019 } 4020 4021 // Copy from an SDUse array into an SDValue array for use with 4022 // the regular getNode logic. 4023 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4024 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4025} 4026 4027SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 4028 const SDValue *Ops, unsigned NumOps) { 4029 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps); 4030} 4031 4032SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 4033 const SDValue *Ops, unsigned NumOps) { 4034 switch (NumOps) { 4035 case 0: return getNode(Opcode, DL, VT); 4036 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4037 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4038 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4039 default: break; 4040 } 4041 4042 switch (Opcode) { 4043 default: break; 4044 case ISD::SELECT_CC: { 4045 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4046 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4047 "LHS and RHS of condition must have same type!"); 4048 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4049 "True and False arms of SelectCC must have same type!"); 4050 assert(Ops[2].getValueType() == VT && 4051 "select_cc node must be of same type as true and false value!"); 4052 break; 4053 } 4054 case ISD::BR_CC: { 4055 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4056 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4057 "LHS/RHS of comparison should match types!"); 4058 break; 4059 } 4060 } 4061 4062 // Memoize nodes. 4063 SDNode *N; 4064 SDVTList VTs = getVTList(VT); 4065 4066 if (VT != MVT::Flag) { 4067 FoldingSetNodeID ID; 4068 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4069 void *IP = 0; 4070 4071 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4072 return SDValue(E, 0); 4073 4074 N = NodeAllocator.Allocate<SDNode>(); 4075 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 4076 CSEMap.InsertNode(N, IP); 4077 } else { 4078 N = NodeAllocator.Allocate<SDNode>(); 4079 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 4080 } 4081 4082 AllNodes.push_back(N); 4083#ifndef NDEBUG 4084 VerifyNode(N); 4085#endif 4086 return SDValue(N, 0); 4087} 4088 4089SDValue SelectionDAG::getNode(unsigned Opcode, 4090 const std::vector<MVT> &ResultTys, 4091 const SDValue *Ops, unsigned NumOps) { 4092 return getNode(Opcode, DebugLoc::getUnknownLoc(), ResultTys, Ops, NumOps); 4093} 4094 4095SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4096 const std::vector<MVT> &ResultTys, 4097 const SDValue *Ops, unsigned NumOps) { 4098 return getNode(Opcode, DL, getNodeValueTypes(ResultTys), ResultTys.size(), 4099 Ops, NumOps); 4100} 4101 4102SDValue SelectionDAG::getNode(unsigned Opcode, 4103 const MVT *VTs, unsigned NumVTs, 4104 const SDValue *Ops, unsigned NumOps) { 4105 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTs, NumVTs, Ops, NumOps); 4106} 4107 4108SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4109 const MVT *VTs, unsigned NumVTs, 4110 const SDValue *Ops, unsigned NumOps) { 4111 if (NumVTs == 1) 4112 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4113 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4114} 4115 4116SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4117 const SDValue *Ops, unsigned NumOps) { 4118 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, Ops, NumOps); 4119} 4120 4121SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4122 const SDValue *Ops, unsigned NumOps) { 4123 if (VTList.NumVTs == 1) 4124 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4125 4126 switch (Opcode) { 4127 // FIXME: figure out how to safely handle things like 4128 // int foo(int x) { return 1 << (x & 255); } 4129 // int bar() { return foo(256); } 4130#if 0 4131 case ISD::SRA_PARTS: 4132 case ISD::SRL_PARTS: 4133 case ISD::SHL_PARTS: 4134 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4135 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4136 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4137 else if (N3.getOpcode() == ISD::AND) 4138 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4139 // If the and is only masking out bits that cannot effect the shift, 4140 // eliminate the and. 4141 unsigned NumBits = VT.getSizeInBits()*2; 4142 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4143 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4144 } 4145 break; 4146#endif 4147 } 4148 4149 // Memoize the node unless it returns a flag. 4150 SDNode *N; 4151 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4152 FoldingSetNodeID ID; 4153 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4154 void *IP = 0; 4155 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4156 return SDValue(E, 0); 4157 if (NumOps == 1) { 4158 N = NodeAllocator.Allocate<UnarySDNode>(); 4159 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4160 } else if (NumOps == 2) { 4161 N = NodeAllocator.Allocate<BinarySDNode>(); 4162 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4163 } else if (NumOps == 3) { 4164 N = NodeAllocator.Allocate<TernarySDNode>(); 4165 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 4166 } else { 4167 N = NodeAllocator.Allocate<SDNode>(); 4168 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 4169 } 4170 CSEMap.InsertNode(N, IP); 4171 } else { 4172 if (NumOps == 1) { 4173 N = NodeAllocator.Allocate<UnarySDNode>(); 4174 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4175 } else if (NumOps == 2) { 4176 N = NodeAllocator.Allocate<BinarySDNode>(); 4177 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4178 } else if (NumOps == 3) { 4179 N = NodeAllocator.Allocate<TernarySDNode>(); 4180 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 4181 } else { 4182 N = NodeAllocator.Allocate<SDNode>(); 4183 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 4184 } 4185 } 4186 AllNodes.push_back(N); 4187#ifndef NDEBUG 4188 VerifyNode(N); 4189#endif 4190 return SDValue(N, 0); 4191} 4192 4193SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) { 4194 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList); 4195} 4196 4197SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4198 return getNode(Opcode, DL, VTList, 0, 0); 4199} 4200 4201SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4202 SDValue N1) { 4203 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1); 4204} 4205 4206SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4207 SDValue N1) { 4208 SDValue Ops[] = { N1 }; 4209 return getNode(Opcode, DL, VTList, Ops, 1); 4210} 4211 4212SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4213 SDValue N1, SDValue N2) { 4214 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2); 4215} 4216 4217SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4218 SDValue N1, SDValue N2) { 4219 SDValue Ops[] = { N1, N2 }; 4220 return getNode(Opcode, DL, VTList, Ops, 2); 4221} 4222 4223SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4224 SDValue N1, SDValue N2, SDValue N3) { 4225 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3); 4226} 4227 4228SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4229 SDValue N1, SDValue N2, SDValue N3) { 4230 SDValue Ops[] = { N1, N2, N3 }; 4231 return getNode(Opcode, DL, VTList, Ops, 3); 4232} 4233 4234SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4235 SDValue N1, SDValue N2, SDValue N3, 4236 SDValue N4) { 4237 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3, N4); 4238} 4239 4240SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4241 SDValue N1, SDValue N2, SDValue N3, 4242 SDValue N4) { 4243 SDValue Ops[] = { N1, N2, N3, N4 }; 4244 return getNode(Opcode, DL, VTList, Ops, 4); 4245} 4246 4247SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4248 SDValue N1, SDValue N2, SDValue N3, 4249 SDValue N4, SDValue N5) { 4250 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3, N4, N5); 4251} 4252 4253SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4254 SDValue N1, SDValue N2, SDValue N3, 4255 SDValue N4, SDValue N5) { 4256 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4257 return getNode(Opcode, DL, VTList, Ops, 5); 4258} 4259 4260SDVTList SelectionDAG::getVTList(MVT VT) { 4261 return makeVTList(SDNode::getValueTypeList(VT), 1); 4262} 4263 4264SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) { 4265 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4266 E = VTList.rend(); I != E; ++I) 4267 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4268 return *I; 4269 4270 MVT *Array = Allocator.Allocate<MVT>(2); 4271 Array[0] = VT1; 4272 Array[1] = VT2; 4273 SDVTList Result = makeVTList(Array, 2); 4274 VTList.push_back(Result); 4275 return Result; 4276} 4277 4278SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) { 4279 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4280 E = VTList.rend(); I != E; ++I) 4281 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4282 I->VTs[2] == VT3) 4283 return *I; 4284 4285 MVT *Array = Allocator.Allocate<MVT>(3); 4286 Array[0] = VT1; 4287 Array[1] = VT2; 4288 Array[2] = VT3; 4289 SDVTList Result = makeVTList(Array, 3); 4290 VTList.push_back(Result); 4291 return Result; 4292} 4293 4294SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) { 4295 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4296 E = VTList.rend(); I != E; ++I) 4297 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4298 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4299 return *I; 4300 4301 MVT *Array = Allocator.Allocate<MVT>(3); 4302 Array[0] = VT1; 4303 Array[1] = VT2; 4304 Array[2] = VT3; 4305 Array[3] = VT4; 4306 SDVTList Result = makeVTList(Array, 4); 4307 VTList.push_back(Result); 4308 return Result; 4309} 4310 4311SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) { 4312 switch (NumVTs) { 4313 case 0: assert(0 && "Cannot have nodes without results!"); 4314 case 1: return getVTList(VTs[0]); 4315 case 2: return getVTList(VTs[0], VTs[1]); 4316 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4317 default: break; 4318 } 4319 4320 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4321 E = VTList.rend(); I != E; ++I) { 4322 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4323 continue; 4324 4325 bool NoMatch = false; 4326 for (unsigned i = 2; i != NumVTs; ++i) 4327 if (VTs[i] != I->VTs[i]) { 4328 NoMatch = true; 4329 break; 4330 } 4331 if (!NoMatch) 4332 return *I; 4333 } 4334 4335 MVT *Array = Allocator.Allocate<MVT>(NumVTs); 4336 std::copy(VTs, VTs+NumVTs, Array); 4337 SDVTList Result = makeVTList(Array, NumVTs); 4338 VTList.push_back(Result); 4339 return Result; 4340} 4341 4342 4343/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4344/// specified operands. If the resultant node already exists in the DAG, 4345/// this does not modify the specified node, instead it returns the node that 4346/// already exists. If the resultant node does not exist in the DAG, the 4347/// input node is returned. As a degenerate case, if you specify the same 4348/// input operands as the node already has, the input node is returned. 4349SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4350 SDNode *N = InN.getNode(); 4351 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4352 4353 // Check to see if there is no change. 4354 if (Op == N->getOperand(0)) return InN; 4355 4356 // See if the modified node already exists. 4357 void *InsertPos = 0; 4358 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4359 return SDValue(Existing, InN.getResNo()); 4360 4361 // Nope it doesn't. Remove the node from its current place in the maps. 4362 if (InsertPos) 4363 if (!RemoveNodeFromCSEMaps(N)) 4364 InsertPos = 0; 4365 4366 // Now we update the operands. 4367 N->OperandList[0].set(Op); 4368 4369 // If this gets put into a CSE map, add it. 4370 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4371 return InN; 4372} 4373 4374SDValue SelectionDAG:: 4375UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4376 SDNode *N = InN.getNode(); 4377 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4378 4379 // Check to see if there is no change. 4380 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4381 return InN; // No operands changed, just return the input node. 4382 4383 // See if the modified node already exists. 4384 void *InsertPos = 0; 4385 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4386 return SDValue(Existing, InN.getResNo()); 4387 4388 // Nope it doesn't. Remove the node from its current place in the maps. 4389 if (InsertPos) 4390 if (!RemoveNodeFromCSEMaps(N)) 4391 InsertPos = 0; 4392 4393 // Now we update the operands. 4394 if (N->OperandList[0] != Op1) 4395 N->OperandList[0].set(Op1); 4396 if (N->OperandList[1] != Op2) 4397 N->OperandList[1].set(Op2); 4398 4399 // If this gets put into a CSE map, add it. 4400 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4401 return InN; 4402} 4403 4404SDValue SelectionDAG:: 4405UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4406 SDValue Ops[] = { Op1, Op2, Op3 }; 4407 return UpdateNodeOperands(N, Ops, 3); 4408} 4409 4410SDValue SelectionDAG:: 4411UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4412 SDValue Op3, SDValue Op4) { 4413 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4414 return UpdateNodeOperands(N, Ops, 4); 4415} 4416 4417SDValue SelectionDAG:: 4418UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4419 SDValue Op3, SDValue Op4, SDValue Op5) { 4420 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4421 return UpdateNodeOperands(N, Ops, 5); 4422} 4423 4424SDValue SelectionDAG:: 4425UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4426 SDNode *N = InN.getNode(); 4427 assert(N->getNumOperands() == NumOps && 4428 "Update with wrong number of operands"); 4429 4430 // Check to see if there is no change. 4431 bool AnyChange = false; 4432 for (unsigned i = 0; i != NumOps; ++i) { 4433 if (Ops[i] != N->getOperand(i)) { 4434 AnyChange = true; 4435 break; 4436 } 4437 } 4438 4439 // No operands changed, just return the input node. 4440 if (!AnyChange) return InN; 4441 4442 // See if the modified node already exists. 4443 void *InsertPos = 0; 4444 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4445 return SDValue(Existing, InN.getResNo()); 4446 4447 // Nope it doesn't. Remove the node from its current place in the maps. 4448 if (InsertPos) 4449 if (!RemoveNodeFromCSEMaps(N)) 4450 InsertPos = 0; 4451 4452 // Now we update the operands. 4453 for (unsigned i = 0; i != NumOps; ++i) 4454 if (N->OperandList[i] != Ops[i]) 4455 N->OperandList[i].set(Ops[i]); 4456 4457 // If this gets put into a CSE map, add it. 4458 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4459 return InN; 4460} 4461 4462/// DropOperands - Release the operands and set this node to have 4463/// zero operands. 4464void SDNode::DropOperands() { 4465 // Unlike the code in MorphNodeTo that does this, we don't need to 4466 // watch for dead nodes here. 4467 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4468 SDUse &Use = *I++; 4469 Use.set(SDValue()); 4470 } 4471} 4472 4473/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4474/// machine opcode. 4475/// 4476SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4477 MVT VT) { 4478 SDVTList VTs = getVTList(VT); 4479 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4480} 4481 4482SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4483 MVT VT, SDValue Op1) { 4484 SDVTList VTs = getVTList(VT); 4485 SDValue Ops[] = { Op1 }; 4486 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4487} 4488 4489SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4490 MVT VT, SDValue Op1, 4491 SDValue Op2) { 4492 SDVTList VTs = getVTList(VT); 4493 SDValue Ops[] = { Op1, Op2 }; 4494 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4495} 4496 4497SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4498 MVT VT, SDValue Op1, 4499 SDValue Op2, SDValue Op3) { 4500 SDVTList VTs = getVTList(VT); 4501 SDValue Ops[] = { Op1, Op2, Op3 }; 4502 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4503} 4504 4505SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4506 MVT VT, const SDValue *Ops, 4507 unsigned NumOps) { 4508 SDVTList VTs = getVTList(VT); 4509 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4510} 4511 4512SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4513 MVT VT1, MVT VT2, const SDValue *Ops, 4514 unsigned NumOps) { 4515 SDVTList VTs = getVTList(VT1, VT2); 4516 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4517} 4518 4519SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4520 MVT VT1, MVT VT2) { 4521 SDVTList VTs = getVTList(VT1, VT2); 4522 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4523} 4524 4525SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4526 MVT VT1, MVT VT2, MVT VT3, 4527 const SDValue *Ops, unsigned NumOps) { 4528 SDVTList VTs = getVTList(VT1, VT2, VT3); 4529 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4530} 4531 4532SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4533 MVT VT1, MVT VT2, MVT VT3, MVT VT4, 4534 const SDValue *Ops, unsigned NumOps) { 4535 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4536 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4537} 4538 4539SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4540 MVT VT1, MVT VT2, 4541 SDValue Op1) { 4542 SDVTList VTs = getVTList(VT1, VT2); 4543 SDValue Ops[] = { Op1 }; 4544 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4545} 4546 4547SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4548 MVT VT1, MVT VT2, 4549 SDValue Op1, SDValue Op2) { 4550 SDVTList VTs = getVTList(VT1, VT2); 4551 SDValue Ops[] = { Op1, Op2 }; 4552 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4553} 4554 4555SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4556 MVT VT1, MVT VT2, 4557 SDValue Op1, SDValue Op2, 4558 SDValue Op3) { 4559 SDVTList VTs = getVTList(VT1, VT2); 4560 SDValue Ops[] = { Op1, Op2, Op3 }; 4561 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4562} 4563 4564SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4565 MVT VT1, MVT VT2, MVT VT3, 4566 SDValue Op1, SDValue Op2, 4567 SDValue Op3) { 4568 SDVTList VTs = getVTList(VT1, VT2, VT3); 4569 SDValue Ops[] = { Op1, Op2, Op3 }; 4570 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4571} 4572 4573SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4574 SDVTList VTs, const SDValue *Ops, 4575 unsigned NumOps) { 4576 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4577} 4578 4579SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4580 MVT VT) { 4581 SDVTList VTs = getVTList(VT); 4582 return MorphNodeTo(N, Opc, VTs, 0, 0); 4583} 4584 4585SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4586 MVT VT, SDValue Op1) { 4587 SDVTList VTs = getVTList(VT); 4588 SDValue Ops[] = { Op1 }; 4589 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4590} 4591 4592SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4593 MVT VT, SDValue Op1, 4594 SDValue Op2) { 4595 SDVTList VTs = getVTList(VT); 4596 SDValue Ops[] = { Op1, Op2 }; 4597 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4598} 4599 4600SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4601 MVT VT, SDValue Op1, 4602 SDValue Op2, SDValue Op3) { 4603 SDVTList VTs = getVTList(VT); 4604 SDValue Ops[] = { Op1, Op2, Op3 }; 4605 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4606} 4607 4608SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4609 MVT VT, const SDValue *Ops, 4610 unsigned NumOps) { 4611 SDVTList VTs = getVTList(VT); 4612 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4613} 4614 4615SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4616 MVT VT1, MVT VT2, const SDValue *Ops, 4617 unsigned NumOps) { 4618 SDVTList VTs = getVTList(VT1, VT2); 4619 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4620} 4621 4622SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4623 MVT VT1, MVT VT2) { 4624 SDVTList VTs = getVTList(VT1, VT2); 4625 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0); 4626} 4627 4628SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4629 MVT VT1, MVT VT2, MVT VT3, 4630 const SDValue *Ops, unsigned NumOps) { 4631 SDVTList VTs = getVTList(VT1, VT2, VT3); 4632 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4633} 4634 4635SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4636 MVT VT1, MVT VT2, 4637 SDValue Op1) { 4638 SDVTList VTs = getVTList(VT1, VT2); 4639 SDValue Ops[] = { Op1 }; 4640 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4641} 4642 4643SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4644 MVT VT1, MVT VT2, 4645 SDValue Op1, SDValue Op2) { 4646 SDVTList VTs = getVTList(VT1, VT2); 4647 SDValue Ops[] = { Op1, Op2 }; 4648 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4649} 4650 4651SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4652 MVT VT1, MVT VT2, 4653 SDValue Op1, SDValue Op2, 4654 SDValue Op3) { 4655 SDVTList VTs = getVTList(VT1, VT2); 4656 SDValue Ops[] = { Op1, Op2, Op3 }; 4657 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4658} 4659 4660/// MorphNodeTo - These *mutate* the specified node to have the specified 4661/// return type, opcode, and operands. 4662/// 4663/// Note that MorphNodeTo returns the resultant node. If there is already a 4664/// node of the specified opcode and operands, it returns that node instead of 4665/// the current one. 4666/// 4667/// Using MorphNodeTo is faster than creating a new node and swapping it in 4668/// with ReplaceAllUsesWith both because it often avoids allocating a new 4669/// node, and because it doesn't require CSE recalculation for any of 4670/// the node's users. 4671/// 4672SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4673 SDVTList VTs, const SDValue *Ops, 4674 unsigned NumOps) { 4675 // If an identical node already exists, use it. 4676 void *IP = 0; 4677 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4678 FoldingSetNodeID ID; 4679 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4680 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4681 return ON; 4682 } 4683 4684 if (!RemoveNodeFromCSEMaps(N)) 4685 IP = 0; 4686 4687 // Start the morphing. 4688 N->NodeType = Opc; 4689 N->ValueList = VTs.VTs; 4690 N->NumValues = VTs.NumVTs; 4691 4692 // Clear the operands list, updating used nodes to remove this from their 4693 // use list. Keep track of any operands that become dead as a result. 4694 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4695 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4696 SDUse &Use = *I++; 4697 SDNode *Used = Use.getNode(); 4698 Use.set(SDValue()); 4699 if (Used->use_empty()) 4700 DeadNodeSet.insert(Used); 4701 } 4702 4703 // If NumOps is larger than the # of operands we currently have, reallocate 4704 // the operand list. 4705 if (NumOps > N->NumOperands) { 4706 if (N->OperandsNeedDelete) 4707 delete[] N->OperandList; 4708 4709 if (N->isMachineOpcode()) { 4710 // We're creating a final node that will live unmorphed for the 4711 // remainder of the current SelectionDAG iteration, so we can allocate 4712 // the operands directly out of a pool with no recycling metadata. 4713 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps); 4714 N->OperandsNeedDelete = false; 4715 } else { 4716 N->OperandList = new SDUse[NumOps]; 4717 N->OperandsNeedDelete = true; 4718 } 4719 } 4720 4721 // Assign the new operands. 4722 N->NumOperands = NumOps; 4723 for (unsigned i = 0, e = NumOps; i != e; ++i) { 4724 N->OperandList[i].setUser(N); 4725 N->OperandList[i].setInitial(Ops[i]); 4726 } 4727 4728 // Delete any nodes that are still dead after adding the uses for the 4729 // new operands. 4730 SmallVector<SDNode *, 16> DeadNodes; 4731 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4732 E = DeadNodeSet.end(); I != E; ++I) 4733 if ((*I)->use_empty()) 4734 DeadNodes.push_back(*I); 4735 RemoveDeadNodes(DeadNodes); 4736 4737 if (IP) 4738 CSEMap.InsertNode(N, IP); // Memoize the new node. 4739 return N; 4740} 4741 4742 4743/// getTargetNode - These are used for target selectors to create a new node 4744/// with specified return type(s), target opcode, and operands. 4745/// 4746/// Note that getTargetNode returns the resultant node. If there is already a 4747/// node of the specified opcode and operands, it returns that node instead of 4748/// the current one. 4749SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) { 4750 return getNode(~Opcode, VT).getNode(); 4751} 4752SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT) { 4753 return getNode(~Opcode, dl, VT).getNode(); 4754} 4755 4756SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) { 4757 return getNode(~Opcode, VT, Op1).getNode(); 4758} 4759SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, 4760 SDValue Op1) { 4761 return getNode(~Opcode, dl, VT, Op1).getNode(); 4762} 4763 4764SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4765 SDValue Op1, SDValue Op2) { 4766 return getNode(~Opcode, VT, Op1, Op2).getNode(); 4767} 4768SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, 4769 SDValue Op1, SDValue Op2) { 4770 return getNode(~Opcode, dl, VT, Op1, Op2).getNode(); 4771} 4772 4773SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4774 SDValue Op1, SDValue Op2, 4775 SDValue Op3) { 4776 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode(); 4777} 4778SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, 4779 SDValue Op1, SDValue Op2, 4780 SDValue Op3) { 4781 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode(); 4782} 4783 4784SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4785 const SDValue *Ops, unsigned NumOps) { 4786 return getNode(~Opcode, VT, Ops, NumOps).getNode(); 4787} 4788SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, 4789 const SDValue *Ops, unsigned NumOps) { 4790 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode(); 4791} 4792 4793SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) { 4794 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4795 SDValue Op; 4796 return getNode(~Opcode, VTs, 2, &Op, 0).getNode(); 4797} 4798SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4799 MVT VT1, MVT VT2) { 4800 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4801 SDValue Op; 4802 return getNode(~Opcode, dl, VTs, 2, &Op, 0).getNode(); 4803} 4804 4805SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4806 MVT VT2, SDValue Op1) { 4807 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4808 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode(); 4809} 4810SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, 4811 MVT VT2, SDValue Op1) { 4812 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4813 return getNode(~Opcode, dl, VTs, 2, &Op1, 1).getNode(); 4814} 4815 4816SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4817 MVT VT2, SDValue Op1, 4818 SDValue Op2) { 4819 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4820 SDValue Ops[] = { Op1, Op2 }; 4821 return getNode(~Opcode, VTs, 2, Ops, 2).getNode(); 4822} 4823SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, 4824 MVT VT2, SDValue Op1, 4825 SDValue Op2) { 4826 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4827 SDValue Ops[] = { Op1, Op2 }; 4828 return getNode(~Opcode, dl, VTs, 2, Ops, 2).getNode(); 4829} 4830 4831SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4832 MVT VT2, SDValue Op1, 4833 SDValue Op2, SDValue Op3) { 4834 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4835 SDValue Ops[] = { Op1, Op2, Op3 }; 4836 return getNode(~Opcode, VTs, 2, Ops, 3).getNode(); 4837} 4838SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, 4839 MVT VT2, SDValue Op1, 4840 SDValue Op2, SDValue Op3) { 4841 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4842 SDValue Ops[] = { Op1, Op2, Op3 }; 4843 return getNode(~Opcode, dl, VTs, 2, Ops, 3).getNode(); 4844} 4845 4846SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, 4847 const SDValue *Ops, unsigned NumOps) { 4848 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4849 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode(); 4850} 4851SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4852 MVT VT1, MVT VT2, 4853 const SDValue *Ops, unsigned NumOps) { 4854 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4855 return getNode(~Opcode, dl, VTs, 2, Ops, NumOps).getNode(); 4856} 4857 4858SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4859 SDValue Op1, SDValue Op2) { 4860 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4861 SDValue Ops[] = { Op1, Op2 }; 4862 return getNode(~Opcode, VTs, 3, Ops, 2).getNode(); 4863} 4864SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4865 MVT VT1, MVT VT2, MVT VT3, 4866 SDValue Op1, SDValue Op2) { 4867 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4868 SDValue Ops[] = { Op1, Op2 }; 4869 return getNode(~Opcode, dl, VTs, 3, Ops, 2).getNode(); 4870} 4871 4872SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4873 SDValue Op1, SDValue Op2, 4874 SDValue Op3) { 4875 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4876 SDValue Ops[] = { Op1, Op2, Op3 }; 4877 return getNode(~Opcode, VTs, 3, Ops, 3).getNode(); 4878} 4879SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4880 MVT VT1, MVT VT2, MVT VT3, 4881 SDValue Op1, SDValue Op2, 4882 SDValue Op3) { 4883 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4884 SDValue Ops[] = { Op1, Op2, Op3 }; 4885 return getNode(~Opcode, dl, VTs, 3, Ops, 3).getNode(); 4886} 4887 4888SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4889 const SDValue *Ops, unsigned NumOps) { 4890 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4891 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode(); 4892} 4893SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4894 MVT VT1, MVT VT2, MVT VT3, 4895 const SDValue *Ops, unsigned NumOps) { 4896 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4897 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode(); 4898} 4899 4900SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4901 MVT VT2, MVT VT3, MVT VT4, 4902 const SDValue *Ops, unsigned NumOps) { 4903 std::vector<MVT> VTList; 4904 VTList.push_back(VT1); 4905 VTList.push_back(VT2); 4906 VTList.push_back(VT3); 4907 VTList.push_back(VT4); 4908 const MVT *VTs = getNodeValueTypes(VTList); 4909 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode(); 4910} 4911SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, 4912 MVT VT2, MVT VT3, MVT VT4, 4913 const SDValue *Ops, unsigned NumOps) { 4914 std::vector<MVT> VTList; 4915 VTList.push_back(VT1); 4916 VTList.push_back(VT2); 4917 VTList.push_back(VT3); 4918 VTList.push_back(VT4); 4919 const MVT *VTs = getNodeValueTypes(VTList); 4920 return getNode(~Opcode, dl, VTs, 4, Ops, NumOps).getNode(); 4921} 4922 4923SDNode *SelectionDAG::getTargetNode(unsigned Opcode, 4924 const std::vector<MVT> &ResultTys, 4925 const SDValue *Ops, unsigned NumOps) { 4926 const MVT *VTs = getNodeValueTypes(ResultTys); 4927 return getNode(~Opcode, VTs, ResultTys.size(), 4928 Ops, NumOps).getNode(); 4929} 4930SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4931 const std::vector<MVT> &ResultTys, 4932 const SDValue *Ops, unsigned NumOps) { 4933 const MVT *VTs = getNodeValueTypes(ResultTys); 4934 return getNode(~Opcode, dl, VTs, ResultTys.size(), 4935 Ops, NumOps).getNode(); 4936} 4937 4938/// getNodeIfExists - Get the specified node if it's already available, or 4939/// else return NULL. 4940SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4941 const SDValue *Ops, unsigned NumOps) { 4942 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4943 FoldingSetNodeID ID; 4944 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4945 void *IP = 0; 4946 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4947 return E; 4948 } 4949 return NULL; 4950} 4951 4952/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4953/// This can cause recursive merging of nodes in the DAG. 4954/// 4955/// This version assumes From has a single result value. 4956/// 4957void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4958 DAGUpdateListener *UpdateListener) { 4959 SDNode *From = FromN.getNode(); 4960 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4961 "Cannot replace with this method!"); 4962 assert(From != To.getNode() && "Cannot replace uses of with self"); 4963 4964 // Iterate over all the existing uses of From. New uses will be added 4965 // to the beginning of the use list, which we avoid visiting. 4966 // This specifically avoids visiting uses of From that arise while the 4967 // replacement is happening, because any such uses would be the result 4968 // of CSE: If an existing node looks like From after one of its operands 4969 // is replaced by To, we don't want to replace of all its users with To 4970 // too. See PR3018 for more info. 4971 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4972 while (UI != UE) { 4973 SDNode *User = *UI; 4974 4975 // This node is about to morph, remove its old self from the CSE maps. 4976 RemoveNodeFromCSEMaps(User); 4977 4978 // A user can appear in a use list multiple times, and when this 4979 // happens the uses are usually next to each other in the list. 4980 // To help reduce the number of CSE recomputations, process all 4981 // the uses of this user that we can find this way. 4982 do { 4983 SDUse &Use = UI.getUse(); 4984 ++UI; 4985 Use.set(To); 4986 } while (UI != UE && *UI == User); 4987 4988 // Now that we have modified User, add it back to the CSE maps. If it 4989 // already exists there, recursively merge the results together. 4990 AddModifiedNodeToCSEMaps(User, UpdateListener); 4991 } 4992} 4993 4994/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4995/// This can cause recursive merging of nodes in the DAG. 4996/// 4997/// This version assumes From/To have matching types and numbers of result 4998/// values. 4999/// 5000void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5001 DAGUpdateListener *UpdateListener) { 5002 assert(From->getVTList().VTs == To->getVTList().VTs && 5003 From->getNumValues() == To->getNumValues() && 5004 "Cannot use this version of ReplaceAllUsesWith!"); 5005 5006 // Handle the trivial case. 5007 if (From == To) 5008 return; 5009 5010 // Iterate over just the existing users of From. See the comments in 5011 // the ReplaceAllUsesWith above. 5012 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5013 while (UI != UE) { 5014 SDNode *User = *UI; 5015 5016 // This node is about to morph, remove its old self from the CSE maps. 5017 RemoveNodeFromCSEMaps(User); 5018 5019 // A user can appear in a use list multiple times, and when this 5020 // happens the uses are usually next to each other in the list. 5021 // To help reduce the number of CSE recomputations, process all 5022 // the uses of this user that we can find this way. 5023 do { 5024 SDUse &Use = UI.getUse(); 5025 ++UI; 5026 Use.setNode(To); 5027 } while (UI != UE && *UI == User); 5028 5029 // Now that we have modified User, add it back to the CSE maps. If it 5030 // already exists there, recursively merge the results together. 5031 AddModifiedNodeToCSEMaps(User, UpdateListener); 5032 } 5033} 5034 5035/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5036/// This can cause recursive merging of nodes in the DAG. 5037/// 5038/// This version can replace From with any result values. To must match the 5039/// number and types of values returned by From. 5040void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5041 const SDValue *To, 5042 DAGUpdateListener *UpdateListener) { 5043 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5044 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5045 5046 // Iterate over just the existing users of From. See the comments in 5047 // the ReplaceAllUsesWith above. 5048 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5049 while (UI != UE) { 5050 SDNode *User = *UI; 5051 5052 // This node is about to morph, remove its old self from the CSE maps. 5053 RemoveNodeFromCSEMaps(User); 5054 5055 // A user can appear in a use list multiple times, and when this 5056 // happens the uses are usually next to each other in the list. 5057 // To help reduce the number of CSE recomputations, process all 5058 // the uses of this user that we can find this way. 5059 do { 5060 SDUse &Use = UI.getUse(); 5061 const SDValue &ToOp = To[Use.getResNo()]; 5062 ++UI; 5063 Use.set(ToOp); 5064 } while (UI != UE && *UI == User); 5065 5066 // Now that we have modified User, add it back to the CSE maps. If it 5067 // already exists there, recursively merge the results together. 5068 AddModifiedNodeToCSEMaps(User, UpdateListener); 5069 } 5070} 5071 5072/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5073/// uses of other values produced by From.getNode() alone. The Deleted 5074/// vector is handled the same way as for ReplaceAllUsesWith. 5075void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5076 DAGUpdateListener *UpdateListener){ 5077 // Handle the really simple, really trivial case efficiently. 5078 if (From == To) return; 5079 5080 // Handle the simple, trivial, case efficiently. 5081 if (From.getNode()->getNumValues() == 1) { 5082 ReplaceAllUsesWith(From, To, UpdateListener); 5083 return; 5084 } 5085 5086 // Iterate over just the existing users of From. See the comments in 5087 // the ReplaceAllUsesWith above. 5088 SDNode::use_iterator UI = From.getNode()->use_begin(), 5089 UE = From.getNode()->use_end(); 5090 while (UI != UE) { 5091 SDNode *User = *UI; 5092 bool UserRemovedFromCSEMaps = false; 5093 5094 // A user can appear in a use list multiple times, and when this 5095 // happens the uses are usually next to each other in the list. 5096 // To help reduce the number of CSE recomputations, process all 5097 // the uses of this user that we can find this way. 5098 do { 5099 SDUse &Use = UI.getUse(); 5100 5101 // Skip uses of different values from the same node. 5102 if (Use.getResNo() != From.getResNo()) { 5103 ++UI; 5104 continue; 5105 } 5106 5107 // If this node hasn't been modified yet, it's still in the CSE maps, 5108 // so remove its old self from the CSE maps. 5109 if (!UserRemovedFromCSEMaps) { 5110 RemoveNodeFromCSEMaps(User); 5111 UserRemovedFromCSEMaps = true; 5112 } 5113 5114 ++UI; 5115 Use.set(To); 5116 } while (UI != UE && *UI == User); 5117 5118 // We are iterating over all uses of the From node, so if a use 5119 // doesn't use the specific value, no changes are made. 5120 if (!UserRemovedFromCSEMaps) 5121 continue; 5122 5123 // Now that we have modified User, add it back to the CSE maps. If it 5124 // already exists there, recursively merge the results together. 5125 AddModifiedNodeToCSEMaps(User, UpdateListener); 5126 } 5127} 5128 5129namespace { 5130 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5131 /// to record information about a use. 5132 struct UseMemo { 5133 SDNode *User; 5134 unsigned Index; 5135 SDUse *Use; 5136 }; 5137 5138 /// operator< - Sort Memos by User. 5139 bool operator<(const UseMemo &L, const UseMemo &R) { 5140 return (intptr_t)L.User < (intptr_t)R.User; 5141 } 5142} 5143 5144/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5145/// uses of other values produced by From.getNode() alone. The same value 5146/// may appear in both the From and To list. The Deleted vector is 5147/// handled the same way as for ReplaceAllUsesWith. 5148void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5149 const SDValue *To, 5150 unsigned Num, 5151 DAGUpdateListener *UpdateListener){ 5152 // Handle the simple, trivial case efficiently. 5153 if (Num == 1) 5154 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5155 5156 // Read up all the uses and make records of them. This helps 5157 // processing new uses that are introduced during the 5158 // replacement process. 5159 SmallVector<UseMemo, 4> Uses; 5160 for (unsigned i = 0; i != Num; ++i) { 5161 unsigned FromResNo = From[i].getResNo(); 5162 SDNode *FromNode = From[i].getNode(); 5163 for (SDNode::use_iterator UI = FromNode->use_begin(), 5164 E = FromNode->use_end(); UI != E; ++UI) { 5165 SDUse &Use = UI.getUse(); 5166 if (Use.getResNo() == FromResNo) { 5167 UseMemo Memo = { *UI, i, &Use }; 5168 Uses.push_back(Memo); 5169 } 5170 } 5171 } 5172 5173 // Sort the uses, so that all the uses from a given User are together. 5174 std::sort(Uses.begin(), Uses.end()); 5175 5176 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5177 UseIndex != UseIndexEnd; ) { 5178 // We know that this user uses some value of From. If it is the right 5179 // value, update it. 5180 SDNode *User = Uses[UseIndex].User; 5181 5182 // This node is about to morph, remove its old self from the CSE maps. 5183 RemoveNodeFromCSEMaps(User); 5184 5185 // The Uses array is sorted, so all the uses for a given User 5186 // are next to each other in the list. 5187 // To help reduce the number of CSE recomputations, process all 5188 // the uses of this user that we can find this way. 5189 do { 5190 unsigned i = Uses[UseIndex].Index; 5191 SDUse &Use = *Uses[UseIndex].Use; 5192 ++UseIndex; 5193 5194 Use.set(To[i]); 5195 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5196 5197 // Now that we have modified User, add it back to the CSE maps. If it 5198 // already exists there, recursively merge the results together. 5199 AddModifiedNodeToCSEMaps(User, UpdateListener); 5200 } 5201} 5202 5203/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5204/// based on their topological order. It returns the maximum id and a vector 5205/// of the SDNodes* in assigned order by reference. 5206unsigned SelectionDAG::AssignTopologicalOrder() { 5207 5208 unsigned DAGSize = 0; 5209 5210 // SortedPos tracks the progress of the algorithm. Nodes before it are 5211 // sorted, nodes after it are unsorted. When the algorithm completes 5212 // it is at the end of the list. 5213 allnodes_iterator SortedPos = allnodes_begin(); 5214 5215 // Visit all the nodes. Move nodes with no operands to the front of 5216 // the list immediately. Annotate nodes that do have operands with their 5217 // operand count. Before we do this, the Node Id fields of the nodes 5218 // may contain arbitrary values. After, the Node Id fields for nodes 5219 // before SortedPos will contain the topological sort index, and the 5220 // Node Id fields for nodes At SortedPos and after will contain the 5221 // count of outstanding operands. 5222 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5223 SDNode *N = I++; 5224 unsigned Degree = N->getNumOperands(); 5225 if (Degree == 0) { 5226 // A node with no uses, add it to the result array immediately. 5227 N->setNodeId(DAGSize++); 5228 allnodes_iterator Q = N; 5229 if (Q != SortedPos) 5230 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5231 ++SortedPos; 5232 } else { 5233 // Temporarily use the Node Id as scratch space for the degree count. 5234 N->setNodeId(Degree); 5235 } 5236 } 5237 5238 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5239 // such that by the time the end is reached all nodes will be sorted. 5240 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5241 SDNode *N = I; 5242 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5243 UI != UE; ++UI) { 5244 SDNode *P = *UI; 5245 unsigned Degree = P->getNodeId(); 5246 --Degree; 5247 if (Degree == 0) { 5248 // All of P's operands are sorted, so P may sorted now. 5249 P->setNodeId(DAGSize++); 5250 if (P != SortedPos) 5251 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5252 ++SortedPos; 5253 } else { 5254 // Update P's outstanding operand count. 5255 P->setNodeId(Degree); 5256 } 5257 } 5258 } 5259 5260 assert(SortedPos == AllNodes.end() && 5261 "Topological sort incomplete!"); 5262 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5263 "First node in topological sort is not the entry token!"); 5264 assert(AllNodes.front().getNodeId() == 0 && 5265 "First node in topological sort has non-zero id!"); 5266 assert(AllNodes.front().getNumOperands() == 0 && 5267 "First node in topological sort has operands!"); 5268 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5269 "Last node in topologic sort has unexpected id!"); 5270 assert(AllNodes.back().use_empty() && 5271 "Last node in topologic sort has users!"); 5272 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5273 return DAGSize; 5274} 5275 5276 5277 5278//===----------------------------------------------------------------------===// 5279// SDNode Class 5280//===----------------------------------------------------------------------===// 5281 5282HandleSDNode::~HandleSDNode() { 5283 DropOperands(); 5284} 5285 5286GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA, 5287 MVT VT, int64_t o) 5288 : SDNode(isa<GlobalVariable>(GA) && 5289 cast<GlobalVariable>(GA)->isThreadLocal() ? 5290 // Thread Local 5291 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) : 5292 // Non Thread Local 5293 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress), 5294 getSDVTList(VT)), Offset(o) { 5295 TheGlobal = const_cast<GlobalValue*>(GA); 5296} 5297 5298MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt, 5299 const Value *srcValue, int SVO, 5300 unsigned alignment, bool vol) 5301 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 5302 Flags(encodeMemSDNodeFlags(vol, alignment)) { 5303 5304 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 5305 assert(getAlignment() == alignment && "Alignment representation error!"); 5306 assert(isVolatile() == vol && "Volatile representation error!"); 5307} 5308 5309MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops, 5310 unsigned NumOps, MVT memvt, const Value *srcValue, 5311 int SVO, unsigned alignment, bool vol) 5312 : SDNode(Opc, VTs, Ops, NumOps), 5313 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 5314 Flags(vol | ((Log2_32(alignment) + 1) << 1)) { 5315 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 5316 assert(getAlignment() == alignment && "Alignment representation error!"); 5317 assert(isVolatile() == vol && "Volatile representation error!"); 5318} 5319 5320MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT memvt, 5321 const Value *srcValue, int SVO, 5322 unsigned alignment, bool vol) 5323 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 5324 Flags(encodeMemSDNodeFlags(vol, alignment)) { 5325 5326 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 5327 assert(getAlignment() == alignment && "Alignment representation error!"); 5328 assert(isVolatile() == vol && "Volatile representation error!"); 5329} 5330 5331MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5332 const SDValue *Ops, 5333 unsigned NumOps, MVT memvt, const Value *srcValue, 5334 int SVO, unsigned alignment, bool vol) 5335 : SDNode(Opc, dl, VTs, Ops, NumOps), 5336 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 5337 Flags(vol | ((Log2_32(alignment) + 1) << 1)) { 5338 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 5339 assert(getAlignment() == alignment && "Alignment representation error!"); 5340 assert(isVolatile() == vol && "Volatile representation error!"); 5341} 5342 5343/// getMemOperand - Return a MachineMemOperand object describing the memory 5344/// reference performed by this memory reference. 5345MachineMemOperand MemSDNode::getMemOperand() const { 5346 int Flags = 0; 5347 if (isa<LoadSDNode>(this)) 5348 Flags = MachineMemOperand::MOLoad; 5349 else if (isa<StoreSDNode>(this)) 5350 Flags = MachineMemOperand::MOStore; 5351 else if (isa<AtomicSDNode>(this)) { 5352 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 5353 } 5354 else { 5355 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this); 5356 assert(MemIntrinNode && "Unknown MemSDNode opcode!"); 5357 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad; 5358 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore; 5359 } 5360 5361 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3; 5362 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 5363 5364 // Check if the memory reference references a frame index 5365 const FrameIndexSDNode *FI = 5366 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode()); 5367 if (!getSrcValue() && FI) 5368 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()), 5369 Flags, 0, Size, getAlignment()); 5370 else 5371 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(), 5372 Size, getAlignment()); 5373} 5374 5375/// Profile - Gather unique data for the node. 5376/// 5377void SDNode::Profile(FoldingSetNodeID &ID) const { 5378 AddNodeIDNode(ID, this); 5379} 5380 5381/// getValueTypeList - Return a pointer to the specified value type. 5382/// 5383const MVT *SDNode::getValueTypeList(MVT VT) { 5384 if (VT.isExtended()) { 5385 static std::set<MVT, MVT::compareRawBits> EVTs; 5386 return &(*EVTs.insert(VT).first); 5387 } else { 5388 static MVT VTs[MVT::LAST_VALUETYPE]; 5389 VTs[VT.getSimpleVT()] = VT; 5390 return &VTs[VT.getSimpleVT()]; 5391 } 5392} 5393 5394/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5395/// indicated value. This method ignores uses of other values defined by this 5396/// operation. 5397bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5398 assert(Value < getNumValues() && "Bad value!"); 5399 5400 // TODO: Only iterate over uses of a given value of the node 5401 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5402 if (UI.getUse().getResNo() == Value) { 5403 if (NUses == 0) 5404 return false; 5405 --NUses; 5406 } 5407 } 5408 5409 // Found exactly the right number of uses? 5410 return NUses == 0; 5411} 5412 5413 5414/// hasAnyUseOfValue - Return true if there are any use of the indicated 5415/// value. This method ignores uses of other values defined by this operation. 5416bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5417 assert(Value < getNumValues() && "Bad value!"); 5418 5419 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5420 if (UI.getUse().getResNo() == Value) 5421 return true; 5422 5423 return false; 5424} 5425 5426 5427/// isOnlyUserOf - Return true if this node is the only use of N. 5428/// 5429bool SDNode::isOnlyUserOf(SDNode *N) const { 5430 bool Seen = false; 5431 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5432 SDNode *User = *I; 5433 if (User == this) 5434 Seen = true; 5435 else 5436 return false; 5437 } 5438 5439 return Seen; 5440} 5441 5442/// isOperand - Return true if this node is an operand of N. 5443/// 5444bool SDValue::isOperandOf(SDNode *N) const { 5445 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5446 if (*this == N->getOperand(i)) 5447 return true; 5448 return false; 5449} 5450 5451bool SDNode::isOperandOf(SDNode *N) const { 5452 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5453 if (this == N->OperandList[i].getNode()) 5454 return true; 5455 return false; 5456} 5457 5458/// reachesChainWithoutSideEffects - Return true if this operand (which must 5459/// be a chain) reaches the specified operand without crossing any 5460/// side-effecting instructions. In practice, this looks through token 5461/// factors and non-volatile loads. In order to remain efficient, this only 5462/// looks a couple of nodes in, it does not do an exhaustive search. 5463bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5464 unsigned Depth) const { 5465 if (*this == Dest) return true; 5466 5467 // Don't search too deeply, we just want to be able to see through 5468 // TokenFactor's etc. 5469 if (Depth == 0) return false; 5470 5471 // If this is a token factor, all inputs to the TF happen in parallel. If any 5472 // of the operands of the TF reach dest, then we can do the xform. 5473 if (getOpcode() == ISD::TokenFactor) { 5474 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5475 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5476 return true; 5477 return false; 5478 } 5479 5480 // Loads don't have side effects, look through them. 5481 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5482 if (!Ld->isVolatile()) 5483 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5484 } 5485 return false; 5486} 5487 5488 5489static void findPredecessor(SDNode *N, const SDNode *P, bool &found, 5490 SmallPtrSet<SDNode *, 32> &Visited) { 5491 if (found || !Visited.insert(N)) 5492 return; 5493 5494 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) { 5495 SDNode *Op = N->getOperand(i).getNode(); 5496 if (Op == P) { 5497 found = true; 5498 return; 5499 } 5500 findPredecessor(Op, P, found, Visited); 5501 } 5502} 5503 5504/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5505/// is either an operand of N or it can be reached by recursively traversing 5506/// up the operands. 5507/// NOTE: this is an expensive method. Use it carefully. 5508bool SDNode::isPredecessorOf(SDNode *N) const { 5509 SmallPtrSet<SDNode *, 32> Visited; 5510 bool found = false; 5511 findPredecessor(N, this, found, Visited); 5512 return found; 5513} 5514 5515uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5516 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5517 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5518} 5519 5520std::string SDNode::getOperationName(const SelectionDAG *G) const { 5521 switch (getOpcode()) { 5522 default: 5523 if (getOpcode() < ISD::BUILTIN_OP_END) 5524 return "<<Unknown DAG Node>>"; 5525 if (isMachineOpcode()) { 5526 if (G) 5527 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5528 if (getMachineOpcode() < TII->getNumOpcodes()) 5529 return TII->get(getMachineOpcode()).getName(); 5530 return "<<Unknown Machine Node>>"; 5531 } 5532 if (G) { 5533 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5534 const char *Name = TLI.getTargetNodeName(getOpcode()); 5535 if (Name) return Name; 5536 return "<<Unknown Target Node>>"; 5537 } 5538 return "<<Unknown Node>>"; 5539 5540#ifndef NDEBUG 5541 case ISD::DELETED_NODE: 5542 return "<<Deleted Node!>>"; 5543#endif 5544 case ISD::PREFETCH: return "Prefetch"; 5545 case ISD::MEMBARRIER: return "MemBarrier"; 5546 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5547 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5548 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5549 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5550 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5551 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5552 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5553 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5554 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5555 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5556 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5557 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5558 case ISD::PCMARKER: return "PCMarker"; 5559 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5560 case ISD::SRCVALUE: return "SrcValue"; 5561 case ISD::MEMOPERAND: return "MemOperand"; 5562 case ISD::EntryToken: return "EntryToken"; 5563 case ISD::TokenFactor: return "TokenFactor"; 5564 case ISD::AssertSext: return "AssertSext"; 5565 case ISD::AssertZext: return "AssertZext"; 5566 5567 case ISD::BasicBlock: return "BasicBlock"; 5568 case ISD::ARG_FLAGS: return "ArgFlags"; 5569 case ISD::VALUETYPE: return "ValueType"; 5570 case ISD::Register: return "Register"; 5571 5572 case ISD::Constant: return "Constant"; 5573 case ISD::ConstantFP: return "ConstantFP"; 5574 case ISD::GlobalAddress: return "GlobalAddress"; 5575 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5576 case ISD::FrameIndex: return "FrameIndex"; 5577 case ISD::JumpTable: return "JumpTable"; 5578 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5579 case ISD::RETURNADDR: return "RETURNADDR"; 5580 case ISD::FRAMEADDR: return "FRAMEADDR"; 5581 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5582 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5583 case ISD::EHSELECTION: return "EHSELECTION"; 5584 case ISD::EH_RETURN: return "EH_RETURN"; 5585 case ISD::ConstantPool: return "ConstantPool"; 5586 case ISD::ExternalSymbol: return "ExternalSymbol"; 5587 case ISD::INTRINSIC_WO_CHAIN: { 5588 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue(); 5589 return Intrinsic::getName((Intrinsic::ID)IID); 5590 } 5591 case ISD::INTRINSIC_VOID: 5592 case ISD::INTRINSIC_W_CHAIN: { 5593 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue(); 5594 return Intrinsic::getName((Intrinsic::ID)IID); 5595 } 5596 5597 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5598 case ISD::TargetConstant: return "TargetConstant"; 5599 case ISD::TargetConstantFP:return "TargetConstantFP"; 5600 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5601 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5602 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5603 case ISD::TargetJumpTable: return "TargetJumpTable"; 5604 case ISD::TargetConstantPool: return "TargetConstantPool"; 5605 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5606 5607 case ISD::CopyToReg: return "CopyToReg"; 5608 case ISD::CopyFromReg: return "CopyFromReg"; 5609 case ISD::UNDEF: return "undef"; 5610 case ISD::MERGE_VALUES: return "merge_values"; 5611 case ISD::INLINEASM: return "inlineasm"; 5612 case ISD::DBG_LABEL: return "dbg_label"; 5613 case ISD::EH_LABEL: return "eh_label"; 5614 case ISD::DECLARE: return "declare"; 5615 case ISD::HANDLENODE: return "handlenode"; 5616 case ISD::FORMAL_ARGUMENTS: return "formal_arguments"; 5617 case ISD::CALL: return "call"; 5618 5619 // Unary operators 5620 case ISD::FABS: return "fabs"; 5621 case ISD::FNEG: return "fneg"; 5622 case ISD::FSQRT: return "fsqrt"; 5623 case ISD::FSIN: return "fsin"; 5624 case ISD::FCOS: return "fcos"; 5625 case ISD::FPOWI: return "fpowi"; 5626 case ISD::FPOW: return "fpow"; 5627 case ISD::FTRUNC: return "ftrunc"; 5628 case ISD::FFLOOR: return "ffloor"; 5629 case ISD::FCEIL: return "fceil"; 5630 case ISD::FRINT: return "frint"; 5631 case ISD::FNEARBYINT: return "fnearbyint"; 5632 5633 // Binary operators 5634 case ISD::ADD: return "add"; 5635 case ISD::SUB: return "sub"; 5636 case ISD::MUL: return "mul"; 5637 case ISD::MULHU: return "mulhu"; 5638 case ISD::MULHS: return "mulhs"; 5639 case ISD::SDIV: return "sdiv"; 5640 case ISD::UDIV: return "udiv"; 5641 case ISD::SREM: return "srem"; 5642 case ISD::UREM: return "urem"; 5643 case ISD::SMUL_LOHI: return "smul_lohi"; 5644 case ISD::UMUL_LOHI: return "umul_lohi"; 5645 case ISD::SDIVREM: return "sdivrem"; 5646 case ISD::UDIVREM: return "udivrem"; 5647 case ISD::AND: return "and"; 5648 case ISD::OR: return "or"; 5649 case ISD::XOR: return "xor"; 5650 case ISD::SHL: return "shl"; 5651 case ISD::SRA: return "sra"; 5652 case ISD::SRL: return "srl"; 5653 case ISD::ROTL: return "rotl"; 5654 case ISD::ROTR: return "rotr"; 5655 case ISD::FADD: return "fadd"; 5656 case ISD::FSUB: return "fsub"; 5657 case ISD::FMUL: return "fmul"; 5658 case ISD::FDIV: return "fdiv"; 5659 case ISD::FREM: return "frem"; 5660 case ISD::FCOPYSIGN: return "fcopysign"; 5661 case ISD::FGETSIGN: return "fgetsign"; 5662 5663 case ISD::SETCC: return "setcc"; 5664 case ISD::VSETCC: return "vsetcc"; 5665 case ISD::SELECT: return "select"; 5666 case ISD::SELECT_CC: return "select_cc"; 5667 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5668 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5669 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5670 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5671 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5672 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5673 case ISD::CARRY_FALSE: return "carry_false"; 5674 case ISD::ADDC: return "addc"; 5675 case ISD::ADDE: return "adde"; 5676 case ISD::SADDO: return "saddo"; 5677 case ISD::UADDO: return "uaddo"; 5678 case ISD::SSUBO: return "ssubo"; 5679 case ISD::USUBO: return "usubo"; 5680 case ISD::SMULO: return "smulo"; 5681 case ISD::UMULO: return "umulo"; 5682 case ISD::SUBC: return "subc"; 5683 case ISD::SUBE: return "sube"; 5684 case ISD::SHL_PARTS: return "shl_parts"; 5685 case ISD::SRA_PARTS: return "sra_parts"; 5686 case ISD::SRL_PARTS: return "srl_parts"; 5687 5688 case ISD::EXTRACT_SUBREG: return "extract_subreg"; 5689 case ISD::INSERT_SUBREG: return "insert_subreg"; 5690 5691 // Conversion operators. 5692 case ISD::SIGN_EXTEND: return "sign_extend"; 5693 case ISD::ZERO_EXTEND: return "zero_extend"; 5694 case ISD::ANY_EXTEND: return "any_extend"; 5695 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5696 case ISD::TRUNCATE: return "truncate"; 5697 case ISD::FP_ROUND: return "fp_round"; 5698 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5699 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5700 case ISD::FP_EXTEND: return "fp_extend"; 5701 5702 case ISD::SINT_TO_FP: return "sint_to_fp"; 5703 case ISD::UINT_TO_FP: return "uint_to_fp"; 5704 case ISD::FP_TO_SINT: return "fp_to_sint"; 5705 case ISD::FP_TO_UINT: return "fp_to_uint"; 5706 case ISD::BIT_CONVERT: return "bit_convert"; 5707 5708 case ISD::CONVERT_RNDSAT: { 5709 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5710 default: assert(0 && "Unknown cvt code!"); 5711 case ISD::CVT_FF: return "cvt_ff"; 5712 case ISD::CVT_FS: return "cvt_fs"; 5713 case ISD::CVT_FU: return "cvt_fu"; 5714 case ISD::CVT_SF: return "cvt_sf"; 5715 case ISD::CVT_UF: return "cvt_uf"; 5716 case ISD::CVT_SS: return "cvt_ss"; 5717 case ISD::CVT_SU: return "cvt_su"; 5718 case ISD::CVT_US: return "cvt_us"; 5719 case ISD::CVT_UU: return "cvt_uu"; 5720 } 5721 } 5722 5723 // Control flow instructions 5724 case ISD::BR: return "br"; 5725 case ISD::BRIND: return "brind"; 5726 case ISD::BR_JT: return "br_jt"; 5727 case ISD::BRCOND: return "brcond"; 5728 case ISD::BR_CC: return "br_cc"; 5729 case ISD::RET: return "ret"; 5730 case ISD::CALLSEQ_START: return "callseq_start"; 5731 case ISD::CALLSEQ_END: return "callseq_end"; 5732 5733 // Other operators 5734 case ISD::LOAD: return "load"; 5735 case ISD::STORE: return "store"; 5736 case ISD::VAARG: return "vaarg"; 5737 case ISD::VACOPY: return "vacopy"; 5738 case ISD::VAEND: return "vaend"; 5739 case ISD::VASTART: return "vastart"; 5740 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5741 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5742 case ISD::BUILD_PAIR: return "build_pair"; 5743 case ISD::STACKSAVE: return "stacksave"; 5744 case ISD::STACKRESTORE: return "stackrestore"; 5745 case ISD::TRAP: return "trap"; 5746 5747 // Bit manipulation 5748 case ISD::BSWAP: return "bswap"; 5749 case ISD::CTPOP: return "ctpop"; 5750 case ISD::CTTZ: return "cttz"; 5751 case ISD::CTLZ: return "ctlz"; 5752 5753 // Debug info 5754 case ISD::DBG_STOPPOINT: return "dbg_stoppoint"; 5755 case ISD::DEBUG_LOC: return "debug_loc"; 5756 5757 // Trampolines 5758 case ISD::TRAMPOLINE: return "trampoline"; 5759 5760 case ISD::CONDCODE: 5761 switch (cast<CondCodeSDNode>(this)->get()) { 5762 default: assert(0 && "Unknown setcc condition!"); 5763 case ISD::SETOEQ: return "setoeq"; 5764 case ISD::SETOGT: return "setogt"; 5765 case ISD::SETOGE: return "setoge"; 5766 case ISD::SETOLT: return "setolt"; 5767 case ISD::SETOLE: return "setole"; 5768 case ISD::SETONE: return "setone"; 5769 5770 case ISD::SETO: return "seto"; 5771 case ISD::SETUO: return "setuo"; 5772 case ISD::SETUEQ: return "setue"; 5773 case ISD::SETUGT: return "setugt"; 5774 case ISD::SETUGE: return "setuge"; 5775 case ISD::SETULT: return "setult"; 5776 case ISD::SETULE: return "setule"; 5777 case ISD::SETUNE: return "setune"; 5778 5779 case ISD::SETEQ: return "seteq"; 5780 case ISD::SETGT: return "setgt"; 5781 case ISD::SETGE: return "setge"; 5782 case ISD::SETLT: return "setlt"; 5783 case ISD::SETLE: return "setle"; 5784 case ISD::SETNE: return "setne"; 5785 } 5786 } 5787} 5788 5789const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5790 switch (AM) { 5791 default: 5792 return ""; 5793 case ISD::PRE_INC: 5794 return "<pre-inc>"; 5795 case ISD::PRE_DEC: 5796 return "<pre-dec>"; 5797 case ISD::POST_INC: 5798 return "<post-inc>"; 5799 case ISD::POST_DEC: 5800 return "<post-dec>"; 5801 } 5802} 5803 5804std::string ISD::ArgFlagsTy::getArgFlagsString() { 5805 std::string S = "< "; 5806 5807 if (isZExt()) 5808 S += "zext "; 5809 if (isSExt()) 5810 S += "sext "; 5811 if (isInReg()) 5812 S += "inreg "; 5813 if (isSRet()) 5814 S += "sret "; 5815 if (isByVal()) 5816 S += "byval "; 5817 if (isNest()) 5818 S += "nest "; 5819 if (getByValAlign()) 5820 S += "byval-align:" + utostr(getByValAlign()) + " "; 5821 if (getOrigAlign()) 5822 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5823 if (getByValSize()) 5824 S += "byval-size:" + utostr(getByValSize()) + " "; 5825 return S + ">"; 5826} 5827 5828void SDNode::dump() const { dump(0); } 5829void SDNode::dump(const SelectionDAG *G) const { 5830 print(errs(), G); 5831 errs().flush(); 5832} 5833 5834void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5835 OS << (void*)this << ": "; 5836 5837 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5838 if (i) OS << ","; 5839 if (getValueType(i) == MVT::Other) 5840 OS << "ch"; 5841 else 5842 OS << getValueType(i).getMVTString(); 5843 } 5844 OS << " = " << getOperationName(G); 5845 5846 OS << " "; 5847 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5848 if (i) OS << ", "; 5849 OS << (void*)getOperand(i).getNode(); 5850 if (unsigned RN = getOperand(i).getResNo()) 5851 OS << ":" << RN; 5852 } 5853 5854 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) { 5855 SDNode *Mask = getOperand(2).getNode(); 5856 OS << "<"; 5857 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) { 5858 if (i) OS << ","; 5859 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF) 5860 OS << "u"; 5861 else 5862 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue(); 5863 } 5864 OS << ">"; 5865 } 5866 5867 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5868 OS << '<' << CSDN->getAPIntValue() << '>'; 5869 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5870 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5871 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5872 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5873 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5874 else { 5875 OS << "<APFloat("; 5876 CSDN->getValueAPF().bitcastToAPInt().dump(); 5877 OS << ")>"; 5878 } 5879 } else if (const GlobalAddressSDNode *GADN = 5880 dyn_cast<GlobalAddressSDNode>(this)) { 5881 int64_t offset = GADN->getOffset(); 5882 OS << '<'; 5883 WriteAsOperand(OS, GADN->getGlobal()); 5884 OS << '>'; 5885 if (offset > 0) 5886 OS << " + " << offset; 5887 else 5888 OS << " " << offset; 5889 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5890 OS << "<" << FIDN->getIndex() << ">"; 5891 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5892 OS << "<" << JTDN->getIndex() << ">"; 5893 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5894 int offset = CP->getOffset(); 5895 if (CP->isMachineConstantPoolEntry()) 5896 OS << "<" << *CP->getMachineCPVal() << ">"; 5897 else 5898 OS << "<" << *CP->getConstVal() << ">"; 5899 if (offset > 0) 5900 OS << " + " << offset; 5901 else 5902 OS << " " << offset; 5903 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5904 OS << "<"; 5905 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5906 if (LBB) 5907 OS << LBB->getName() << " "; 5908 OS << (const void*)BBDN->getBasicBlock() << ">"; 5909 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5910 if (G && R->getReg() && 5911 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5912 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5913 } else { 5914 OS << " #" << R->getReg(); 5915 } 5916 } else if (const ExternalSymbolSDNode *ES = 5917 dyn_cast<ExternalSymbolSDNode>(this)) { 5918 OS << "'" << ES->getSymbol() << "'"; 5919 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5920 if (M->getValue()) 5921 OS << "<" << M->getValue() << ">"; 5922 else 5923 OS << "<null>"; 5924 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) { 5925 if (M->MO.getValue()) 5926 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">"; 5927 else 5928 OS << "<null:" << M->MO.getOffset() << ">"; 5929 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) { 5930 OS << N->getArgFlags().getArgFlagsString(); 5931 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5932 OS << ":" << N->getVT().getMVTString(); 5933 } 5934 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5935 const Value *SrcValue = LD->getSrcValue(); 5936 int SrcOffset = LD->getSrcValueOffset(); 5937 OS << " <"; 5938 if (SrcValue) 5939 OS << SrcValue; 5940 else 5941 OS << "null"; 5942 OS << ":" << SrcOffset << ">"; 5943 5944 bool doExt = true; 5945 switch (LD->getExtensionType()) { 5946 default: doExt = false; break; 5947 case ISD::EXTLOAD: OS << " <anyext "; break; 5948 case ISD::SEXTLOAD: OS << " <sext "; break; 5949 case ISD::ZEXTLOAD: OS << " <zext "; break; 5950 } 5951 if (doExt) 5952 OS << LD->getMemoryVT().getMVTString() << ">"; 5953 5954 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5955 if (*AM) 5956 OS << " " << AM; 5957 if (LD->isVolatile()) 5958 OS << " <volatile>"; 5959 OS << " alignment=" << LD->getAlignment(); 5960 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5961 const Value *SrcValue = ST->getSrcValue(); 5962 int SrcOffset = ST->getSrcValueOffset(); 5963 OS << " <"; 5964 if (SrcValue) 5965 OS << SrcValue; 5966 else 5967 OS << "null"; 5968 OS << ":" << SrcOffset << ">"; 5969 5970 if (ST->isTruncatingStore()) 5971 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">"; 5972 5973 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5974 if (*AM) 5975 OS << " " << AM; 5976 if (ST->isVolatile()) 5977 OS << " <volatile>"; 5978 OS << " alignment=" << ST->getAlignment(); 5979 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) { 5980 const Value *SrcValue = AT->getSrcValue(); 5981 int SrcOffset = AT->getSrcValueOffset(); 5982 OS << " <"; 5983 if (SrcValue) 5984 OS << SrcValue; 5985 else 5986 OS << "null"; 5987 OS << ":" << SrcOffset << ">"; 5988 if (AT->isVolatile()) 5989 OS << " <volatile>"; 5990 OS << " alignment=" << AT->getAlignment(); 5991 } 5992} 5993 5994static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 5995 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5996 if (N->getOperand(i).getNode()->hasOneUse()) 5997 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 5998 else 5999 cerr << "\n" << std::string(indent+2, ' ') 6000 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6001 6002 6003 cerr << "\n" << std::string(indent, ' '); 6004 N->dump(G); 6005} 6006 6007void SelectionDAG::dump() const { 6008 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6009 6010 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6011 I != E; ++I) { 6012 const SDNode *N = I; 6013 if (!N->hasOneUse() && N != getRoot().getNode()) 6014 DumpNodes(N, 2, this); 6015 } 6016 6017 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6018 6019 cerr << "\n\n"; 6020} 6021 6022const Type *ConstantPoolSDNode::getType() const { 6023 if (isMachineConstantPoolEntry()) 6024 return Val.MachineCPVal->getType(); 6025 return Val.ConstVal->getType(); 6026} 6027