SelectionDAG.cpp revision edf128a7fa90f2b0b7ee24741a04a7ae1ecd6f7e
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "llvm/Constants.h" 16#include "llvm/GlobalValue.h" 17#include "llvm/Assembly/Writer.h" 18#include "llvm/CodeGen/MachineBasicBlock.h" 19#include "llvm/Target/TargetLowering.h" 20#include <iostream> 21#include <set> 22#include <cmath> 23#include <algorithm> 24using namespace llvm; 25 26static bool isCommutativeBinOp(unsigned Opcode) { 27 switch (Opcode) { 28 case ISD::ADD: 29 case ISD::MUL: 30 case ISD::AND: 31 case ISD::OR: 32 case ISD::XOR: return true; 33 default: return false; // FIXME: Need commutative info for user ops! 34 } 35} 36 37static bool isAssociativeBinOp(unsigned Opcode) { 38 switch (Opcode) { 39 case ISD::ADD: 40 case ISD::MUL: 41 case ISD::AND: 42 case ISD::OR: 43 case ISD::XOR: return true; 44 default: return false; // FIXME: Need associative info for user ops! 45 } 46} 47 48static unsigned ExactLog2(uint64_t Val) { 49 unsigned Count = 0; 50 while (Val != 1) { 51 Val >>= 1; 52 ++Count; 53 } 54 return Count; 55} 56 57// isInvertibleForFree - Return true if there is no cost to emitting the logical 58// inverse of this node. 59static bool isInvertibleForFree(SDOperand N) { 60 if (isa<ConstantSDNode>(N.Val)) return true; 61 if (isa<SetCCSDNode>(N.Val) && N.Val->hasOneUse()) 62 return true; 63 return false; 64} 65 66 67/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 68/// when given the operation for (X op Y). 69ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 70 // To perform this operation, we just need to swap the L and G bits of the 71 // operation. 72 unsigned OldL = (Operation >> 2) & 1; 73 unsigned OldG = (Operation >> 1) & 1; 74 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 75 (OldL << 1) | // New G bit 76 (OldG << 2)); // New L bit. 77} 78 79/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 80/// 'op' is a valid SetCC operation. 81ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 82 unsigned Operation = Op; 83 if (isInteger) 84 Operation ^= 7; // Flip L, G, E bits, but not U. 85 else 86 Operation ^= 15; // Flip all of the condition bits. 87 if (Operation > ISD::SETTRUE2) 88 Operation &= ~8; // Don't let N and U bits get set. 89 return ISD::CondCode(Operation); 90} 91 92 93/// isSignedOp - For an integer comparison, return 1 if the comparison is a 94/// signed operation and 2 if the result is an unsigned comparison. Return zero 95/// if the operation does not depend on the sign of the input (setne and seteq). 96static int isSignedOp(ISD::CondCode Opcode) { 97 switch (Opcode) { 98 default: assert(0 && "Illegal integer setcc operation!"); 99 case ISD::SETEQ: 100 case ISD::SETNE: return 0; 101 case ISD::SETLT: 102 case ISD::SETLE: 103 case ISD::SETGT: 104 case ISD::SETGE: return 1; 105 case ISD::SETULT: 106 case ISD::SETULE: 107 case ISD::SETUGT: 108 case ISD::SETUGE: return 2; 109 } 110} 111 112/// getSetCCOrOperation - Return the result of a logical OR between different 113/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 114/// returns SETCC_INVALID if it is not possible to represent the resultant 115/// comparison. 116ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 117 bool isInteger) { 118 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 119 // Cannot fold a signed integer setcc with an unsigned integer setcc. 120 return ISD::SETCC_INVALID; 121 122 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 123 124 // If the N and U bits get set then the resultant comparison DOES suddenly 125 // care about orderedness, and is true when ordered. 126 if (Op > ISD::SETTRUE2) 127 Op &= ~16; // Clear the N bit. 128 return ISD::CondCode(Op); 129} 130 131/// getSetCCAndOperation - Return the result of a logical AND between different 132/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 133/// function returns zero if it is not possible to represent the resultant 134/// comparison. 135ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 136 bool isInteger) { 137 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 138 // Cannot fold a signed setcc with an unsigned setcc. 139 return ISD::SETCC_INVALID; 140 141 // Combine all of the condition bits. 142 return ISD::CondCode(Op1 & Op2); 143} 144 145const TargetMachine &SelectionDAG::getTarget() const { 146 return TLI.getTargetMachine(); 147} 148 149 150/// RemoveDeadNodes - This method deletes all unreachable nodes in the 151/// SelectionDAG, including nodes (like loads) that have uses of their token 152/// chain but no other uses and no side effect. If a node is passed in as an 153/// argument, it is used as the seed for node deletion. 154void SelectionDAG::RemoveDeadNodes(SDNode *N) { 155 std::set<SDNode*> AllNodeSet(AllNodes.begin(), AllNodes.end()); 156 157 // Create a dummy node (which is not added to allnodes), that adds a reference 158 // to the root node, preventing it from being deleted. 159 SDNode *DummyNode = new SDNode(ISD::EntryToken, getRoot()); 160 161 DeleteNodeIfDead(N, &AllNodeSet); 162 163 Restart: 164 unsigned NumNodes = AllNodeSet.size(); 165 for (std::set<SDNode*>::iterator I = AllNodeSet.begin(), E = AllNodeSet.end(); 166 I != E; ++I) { 167 // Try to delete this node. 168 DeleteNodeIfDead(*I, &AllNodeSet); 169 170 // If we actually deleted any nodes, do not use invalid iterators in 171 // AllNodeSet. 172 if (AllNodeSet.size() != NumNodes) 173 goto Restart; 174 } 175 176 // Restore AllNodes. 177 if (AllNodes.size() != NumNodes) 178 AllNodes.assign(AllNodeSet.begin(), AllNodeSet.end()); 179 180 // If the root changed (e.g. it was a dead load, update the root). 181 setRoot(DummyNode->getOperand(0)); 182 183 // Now that we are done with the dummy node, delete it. 184 DummyNode->getOperand(0).Val->removeUser(DummyNode); 185 delete DummyNode; 186} 187 188void SelectionDAG::DeleteNodeIfDead(SDNode *N, void *NodeSet) { 189 if (!N->use_empty()) 190 return; 191 192 // Okay, we really are going to delete this node. First take this out of the 193 // appropriate CSE map. 194 switch (N->getOpcode()) { 195 case ISD::Constant: 196 Constants.erase(std::make_pair(cast<ConstantSDNode>(N)->getValue(), 197 N->getValueType(0))); 198 break; 199 case ISD::ConstantFP: { 200 union { 201 double DV; 202 uint64_t IV; 203 }; 204 DV = cast<ConstantFPSDNode>(N)->getValue(); 205 ConstantFPs.erase(std::make_pair(IV, N->getValueType(0))); 206 break; 207 } 208 case ISD::GlobalAddress: 209 GlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal()); 210 break; 211 case ISD::FrameIndex: 212 FrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex()); 213 break; 214 case ISD::ConstantPool: 215 ConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->getIndex()); 216 break; 217 case ISD::BasicBlock: 218 BBNodes.erase(cast<BasicBlockSDNode>(N)->getBasicBlock()); 219 break; 220 case ISD::ExternalSymbol: 221 ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 222 break; 223 224 case ISD::LOAD: 225 Loads.erase(std::make_pair(N->getOperand(1), 226 std::make_pair(N->getOperand(0), 227 N->getValueType(0)))); 228 break; 229 case ISD::SETCC: 230 SetCCs.erase(std::make_pair(std::make_pair(N->getOperand(0), 231 N->getOperand(1)), 232 std::make_pair( 233 cast<SetCCSDNode>(N)->getCondition(), 234 N->getValueType(0)))); 235 break; 236 case ISD::TRUNCSTORE: 237 case ISD::SIGN_EXTEND_INREG: 238 case ISD::FP_ROUND_INREG: 239 case ISD::EXTLOAD: 240 case ISD::SEXTLOAD: 241 case ISD::ZEXTLOAD: { 242 EVTStruct NN; 243 NN.Opcode = N->getOpcode(); 244 NN.VT = N->getValueType(0); 245 NN.EVT = cast<MVTSDNode>(N)->getExtraValueType(); 246 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 247 NN.Ops.push_back(N->getOperand(i)); 248 MVTSDNodes.erase(NN); 249 break; 250 } 251 default: 252 if (N->getNumOperands() == 1) 253 UnaryOps.erase(std::make_pair(N->getOpcode(), 254 std::make_pair(N->getOperand(0), 255 N->getValueType(0)))); 256 else if (N->getNumOperands() == 2) 257 BinaryOps.erase(std::make_pair(N->getOpcode(), 258 std::make_pair(N->getOperand(0), 259 N->getOperand(1)))); 260 break; 261 } 262 263 // Next, brutally remove the operand list. 264 while (!N->Operands.empty()) { 265 SDNode *O = N->Operands.back().Val; 266 N->Operands.pop_back(); 267 O->removeUser(N); 268 269 // Now that we removed this operand, see if there are no uses of it left. 270 DeleteNodeIfDead(O, NodeSet); 271 } 272 273 // Remove the node from the nodes set and delete it. 274 std::set<SDNode*> &AllNodeSet = *(std::set<SDNode*>*)NodeSet; 275 AllNodeSet.erase(N); 276 277 // Now that the node is gone, check to see if any of the operands of this node 278 // are dead now. 279 delete N; 280} 281 282 283SelectionDAG::~SelectionDAG() { 284 for (unsigned i = 0, e = AllNodes.size(); i != e; ++i) 285 delete AllNodes[i]; 286} 287 288SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) { 289 if (Op.getValueType() == VT) return Op; 290 int64_t Imm = ~0ULL >> 64-MVT::getSizeInBits(VT); 291 return getNode(ISD::AND, Op.getValueType(), Op, 292 getConstant(Imm, Op.getValueType())); 293} 294 295SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT) { 296 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!"); 297 // Mask out any bits that are not valid for this constant. 298 if (VT != MVT::i64) 299 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1; 300 301 SDNode *&N = Constants[std::make_pair(Val, VT)]; 302 if (N) return SDOperand(N, 0); 303 N = new ConstantSDNode(Val, VT); 304 AllNodes.push_back(N); 305 return SDOperand(N, 0); 306} 307 308SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT) { 309 assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!"); 310 if (VT == MVT::f32) 311 Val = (float)Val; // Mask out extra precision. 312 313 // Do the map lookup using the actual bit pattern for the floating point 314 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 315 // we don't have issues with SNANs. 316 union { 317 double DV; 318 uint64_t IV; 319 }; 320 321 DV = Val; 322 323 SDNode *&N = ConstantFPs[std::make_pair(IV, VT)]; 324 if (N) return SDOperand(N, 0); 325 N = new ConstantFPSDNode(Val, VT); 326 AllNodes.push_back(N); 327 return SDOperand(N, 0); 328} 329 330 331 332SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV, 333 MVT::ValueType VT) { 334 SDNode *&N = GlobalValues[GV]; 335 if (N) return SDOperand(N, 0); 336 N = new GlobalAddressSDNode(GV,VT); 337 AllNodes.push_back(N); 338 return SDOperand(N, 0); 339} 340 341SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT) { 342 SDNode *&N = FrameIndices[FI]; 343 if (N) return SDOperand(N, 0); 344 N = new FrameIndexSDNode(FI, VT); 345 AllNodes.push_back(N); 346 return SDOperand(N, 0); 347} 348 349SDOperand SelectionDAG::getConstantPool(unsigned CPIdx, MVT::ValueType VT) { 350 SDNode *N = ConstantPoolIndices[CPIdx]; 351 if (N) return SDOperand(N, 0); 352 N = new ConstantPoolSDNode(CPIdx, VT); 353 AllNodes.push_back(N); 354 return SDOperand(N, 0); 355} 356 357SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 358 SDNode *&N = BBNodes[MBB]; 359 if (N) return SDOperand(N, 0); 360 N = new BasicBlockSDNode(MBB); 361 AllNodes.push_back(N); 362 return SDOperand(N, 0); 363} 364 365SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) { 366 SDNode *&N = ExternalSymbols[Sym]; 367 if (N) return SDOperand(N, 0); 368 N = new ExternalSymbolSDNode(Sym, VT); 369 AllNodes.push_back(N); 370 return SDOperand(N, 0); 371} 372 373SDOperand SelectionDAG::getSetCC(ISD::CondCode Cond, MVT::ValueType VT, 374 SDOperand N1, SDOperand N2) { 375 // These setcc operations always fold. 376 switch (Cond) { 377 default: break; 378 case ISD::SETFALSE: 379 case ISD::SETFALSE2: return getConstant(0, VT); 380 case ISD::SETTRUE: 381 case ISD::SETTRUE2: return getConstant(1, VT); 382 } 383 384 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) { 385 uint64_t C2 = N2C->getValue(); 386 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 387 uint64_t C1 = N1C->getValue(); 388 389 // Sign extend the operands if required 390 if (ISD::isSignedIntSetCC(Cond)) { 391 C1 = N1C->getSignExtended(); 392 C2 = N2C->getSignExtended(); 393 } 394 395 switch (Cond) { 396 default: assert(0 && "Unknown integer setcc!"); 397 case ISD::SETEQ: return getConstant(C1 == C2, VT); 398 case ISD::SETNE: return getConstant(C1 != C2, VT); 399 case ISD::SETULT: return getConstant(C1 < C2, VT); 400 case ISD::SETUGT: return getConstant(C1 > C2, VT); 401 case ISD::SETULE: return getConstant(C1 <= C2, VT); 402 case ISD::SETUGE: return getConstant(C1 >= C2, VT); 403 case ISD::SETLT: return getConstant((int64_t)C1 < (int64_t)C2, VT); 404 case ISD::SETGT: return getConstant((int64_t)C1 > (int64_t)C2, VT); 405 case ISD::SETLE: return getConstant((int64_t)C1 <= (int64_t)C2, VT); 406 case ISD::SETGE: return getConstant((int64_t)C1 >= (int64_t)C2, VT); 407 } 408 } else { 409 // If the LHS is a ZERO_EXTEND and if this is an ==/!= comparison, perform 410 // the comparison on the input. 411 if (N1.getOpcode() == ISD::ZERO_EXTEND) { 412 unsigned InSize = MVT::getSizeInBits(N1.getOperand(0).getValueType()); 413 414 // If the comparison constant has bits in the upper part, the 415 // zero-extended value could never match. 416 if (C2 & (~0ULL << InSize)) { 417 unsigned VSize = MVT::getSizeInBits(N1.getValueType()); 418 switch (Cond) { 419 case ISD::SETUGT: 420 case ISD::SETUGE: 421 case ISD::SETEQ: return getConstant(0, VT); 422 case ISD::SETULT: 423 case ISD::SETULE: 424 case ISD::SETNE: return getConstant(1, VT); 425 case ISD::SETGT: 426 case ISD::SETGE: 427 // True if the sign bit of C2 is set. 428 return getConstant((C2 & (1ULL << VSize)) != 0, VT); 429 case ISD::SETLT: 430 case ISD::SETLE: 431 // True if the sign bit of C2 isn't set. 432 return getConstant((C2 & (1ULL << VSize)) == 0, VT); 433 default: 434 break; 435 } 436 } 437 438 // Otherwise, we can perform the comparison with the low bits. 439 switch (Cond) { 440 case ISD::SETEQ: 441 case ISD::SETNE: 442 case ISD::SETUGT: 443 case ISD::SETUGE: 444 case ISD::SETULT: 445 case ISD::SETULE: 446 return getSetCC(Cond, VT, N1.getOperand(0), 447 getConstant(C2, N1.getOperand(0).getValueType())); 448 default: 449 break; // todo, be more careful with signed comparisons 450 } 451 } 452 453 454 uint64_t MinVal, MaxVal; 455 unsigned OperandBitSize = MVT::getSizeInBits(N2C->getValueType(0)); 456 if (ISD::isSignedIntSetCC(Cond)) { 457 MinVal = 1ULL << (OperandBitSize-1); 458 if (OperandBitSize != 1) // Avoid X >> 64, which is undefined. 459 MaxVal = ~0ULL >> (65-OperandBitSize); 460 else 461 MaxVal = 0; 462 } else { 463 MinVal = 0; 464 MaxVal = ~0ULL >> (64-OperandBitSize); 465 } 466 467 // Canonicalize GE/LE comparisons to use GT/LT comparisons. 468 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) { 469 if (C2 == MinVal) return getConstant(1, VT); // X >= MIN --> true 470 --C2; // X >= C1 --> X > (C1-1) 471 Cond = (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT; 472 N2 = getConstant(C2, N2.getValueType()); 473 N2C = cast<ConstantSDNode>(N2.Val); 474 } 475 476 if (Cond == ISD::SETLE || Cond == ISD::SETULE) { 477 if (C2 == MaxVal) return getConstant(1, VT); // X <= MAX --> true 478 ++C2; // X <= C1 --> X < (C1+1) 479 Cond = (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT; 480 N2 = getConstant(C2, N2.getValueType()); 481 N2C = cast<ConstantSDNode>(N2.Val); 482 } 483 484 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal) 485 return getConstant(0, VT); // X < MIN --> false 486 487 // Canonicalize setgt X, Min --> setne X, Min 488 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MinVal) 489 return getSetCC(ISD::SETNE, VT, N1, N2); 490 491 // If we have setult X, 1, turn it into seteq X, 0 492 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal+1) 493 return getSetCC(ISD::SETEQ, VT, N1, 494 getConstant(MinVal, N1.getValueType())); 495 // If we have setugt X, Max-1, turn it into seteq X, Max 496 else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MaxVal-1) 497 return getSetCC(ISD::SETEQ, VT, N1, 498 getConstant(MaxVal, N1.getValueType())); 499 500 // If we have "setcc X, C1", check to see if we can shrink the immediate 501 // by changing cc. 502 503 // SETUGT X, SINTMAX -> SETLT X, 0 504 if (Cond == ISD::SETUGT && OperandBitSize != 1 && 505 C2 == (~0ULL >> (65-OperandBitSize))) 506 return getSetCC(ISD::SETLT, VT, N1, getConstant(0, N2.getValueType())); 507 508 // FIXME: Implement the rest of these. 509 510 511 // Fold bit comparisons when we can. 512 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && 513 VT == N1.getValueType() && N1.getOpcode() == ISD::AND) 514 if (ConstantSDNode *AndRHS = 515 dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 516 if (Cond == ISD::SETNE && C2 == 0) {// (X & 8) != 0 --> (X & 8) >> 3 517 // Perform the xform if the AND RHS is a single bit. 518 if ((AndRHS->getValue() & (AndRHS->getValue()-1)) == 0) { 519 return getNode(ISD::SRL, VT, N1, 520 getConstant(ExactLog2(AndRHS->getValue()), 521 TLI.getShiftAmountTy())); 522 } 523 } else if (Cond == ISD::SETEQ && C2 == AndRHS->getValue()) { 524 // (X & 8) == 8 --> (X & 8) >> 3 525 // Perform the xform if C2 is a single bit. 526 if ((C2 & (C2-1)) == 0) { 527 return getNode(ISD::SRL, VT, N1, 528 getConstant(ExactLog2(C2),TLI.getShiftAmountTy())); 529 } 530 } 531 } 532 } 533 } else if (isa<ConstantSDNode>(N1.Val)) { 534 // Ensure that the constant occurs on the RHS. 535 return getSetCC(ISD::getSetCCSwappedOperands(Cond), VT, N2, N1); 536 } 537 538 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) 539 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) { 540 double C1 = N1C->getValue(), C2 = N2C->getValue(); 541 542 switch (Cond) { 543 default: break; // FIXME: Implement the rest of these! 544 case ISD::SETEQ: return getConstant(C1 == C2, VT); 545 case ISD::SETNE: return getConstant(C1 != C2, VT); 546 case ISD::SETLT: return getConstant(C1 < C2, VT); 547 case ISD::SETGT: return getConstant(C1 > C2, VT); 548 case ISD::SETLE: return getConstant(C1 <= C2, VT); 549 case ISD::SETGE: return getConstant(C1 >= C2, VT); 550 } 551 } else { 552 // Ensure that the constant occurs on the RHS. 553 Cond = ISD::getSetCCSwappedOperands(Cond); 554 std::swap(N1, N2); 555 } 556 557 if (N1 == N2) { 558 // We can always fold X == Y for integer setcc's. 559 if (MVT::isInteger(N1.getValueType())) 560 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 561 unsigned UOF = ISD::getUnorderedFlavor(Cond); 562 if (UOF == 2) // FP operators that are undefined on NaNs. 563 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 564 if (UOF == ISD::isTrueWhenEqual(Cond)) 565 return getConstant(UOF, VT); 566 // Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO 567 // if it is not already. 568 Cond = UOF == 0 ? ISD::SETUO : ISD::SETO; 569 } 570 571 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && 572 MVT::isInteger(N1.getValueType())) { 573 if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB || 574 N1.getOpcode() == ISD::XOR) { 575 // Simplify (X+Y) == (X+Z) --> Y == Z 576 if (N1.getOpcode() == N2.getOpcode()) { 577 if (N1.getOperand(0) == N2.getOperand(0)) 578 return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(1)); 579 if (N1.getOperand(1) == N2.getOperand(1)) 580 return getSetCC(Cond, VT, N1.getOperand(0), N2.getOperand(0)); 581 if (isCommutativeBinOp(N1.getOpcode())) { 582 // If X op Y == Y op X, try other combinations. 583 if (N1.getOperand(0) == N2.getOperand(1)) 584 return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(0)); 585 if (N1.getOperand(1) == N2.getOperand(0)) 586 return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(1)); 587 } 588 } 589 590 // FIXME: move this stuff to the DAG Combiner when it exists! 591 592 // Simplify (X+Z) == X --> Z == 0 593 if (N1.getOperand(0) == N2) 594 return getSetCC(Cond, VT, N1.getOperand(1), 595 getConstant(0, N1.getValueType())); 596 if (N1.getOperand(1) == N2) { 597 if (isCommutativeBinOp(N1.getOpcode())) 598 return getSetCC(Cond, VT, N1.getOperand(0), 599 getConstant(0, N1.getValueType())); 600 else { 601 assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!"); 602 // (Z-X) == X --> Z == X<<1 603 return getSetCC(Cond, VT, N1.getOperand(0), 604 getNode(ISD::SHL, N2.getValueType(), 605 N2, getConstant(1, TLI.getShiftAmountTy()))); 606 } 607 } 608 } 609 610 if (N2.getOpcode() == ISD::ADD || N2.getOpcode() == ISD::SUB || 611 N2.getOpcode() == ISD::XOR) { 612 // Simplify X == (X+Z) --> Z == 0 613 if (N2.getOperand(0) == N1) 614 return getSetCC(Cond, VT, N2.getOperand(1), 615 getConstant(0, N2.getValueType())); 616 else if (N2.getOperand(1) == N1) 617 return getSetCC(Cond, VT, N2.getOperand(0), 618 getConstant(0, N2.getValueType())); 619 } 620 } 621 622 // Fold away ALL boolean setcc's. 623 if (N1.getValueType() == MVT::i1) { 624 switch (Cond) { 625 default: assert(0 && "Unknown integer setcc!"); 626 case ISD::SETEQ: // X == Y -> (X^Y)^1 627 N1 = getNode(ISD::XOR, MVT::i1, 628 getNode(ISD::XOR, MVT::i1, N1, N2), 629 getConstant(1, MVT::i1)); 630 break; 631 case ISD::SETNE: // X != Y --> (X^Y) 632 N1 = getNode(ISD::XOR, MVT::i1, N1, N2); 633 break; 634 case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> X^1 & Y 635 case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> X^1 & Y 636 N1 = getNode(ISD::AND, MVT::i1, N2, 637 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1))); 638 break; 639 case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> Y^1 & X 640 case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> Y^1 & X 641 N1 = getNode(ISD::AND, MVT::i1, N1, 642 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1))); 643 break; 644 case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> X^1 | Y 645 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> X^1 | Y 646 N1 = getNode(ISD::OR, MVT::i1, N2, 647 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1))); 648 break; 649 case ISD::SETUGE: // X >=u Y --> X == 1 | Y == 0 --> Y^1 | X 650 case ISD::SETLE: // X <=s Y --> X == 1 | Y == 0 --> Y^1 | X 651 N1 = getNode(ISD::OR, MVT::i1, N1, 652 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1))); 653 break; 654 } 655 if (VT != MVT::i1) 656 N1 = getNode(ISD::ZERO_EXTEND, VT, N1); 657 return N1; 658 } 659 660 661 SetCCSDNode *&N = SetCCs[std::make_pair(std::make_pair(N1, N2), 662 std::make_pair(Cond, VT))]; 663 if (N) return SDOperand(N, 0); 664 N = new SetCCSDNode(Cond, N1, N2); 665 N->setValueTypes(VT); 666 AllNodes.push_back(N); 667 return SDOperand(N, 0); 668} 669 670 671 672/// getNode - Gets or creates the specified node. 673/// 674SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) { 675 SDNode *N = new SDNode(Opcode, VT); 676 AllNodes.push_back(N); 677 return SDOperand(N, 0); 678} 679 680SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 681 SDOperand Operand) { 682 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) { 683 uint64_t Val = C->getValue(); 684 switch (Opcode) { 685 default: break; 686 case ISD::SIGN_EXTEND: return getConstant(C->getSignExtended(), VT); 687 case ISD::ZERO_EXTEND: return getConstant(Val, VT); 688 case ISD::TRUNCATE: return getConstant(Val, VT); 689 case ISD::SINT_TO_FP: return getConstantFP(C->getSignExtended(), VT); 690 case ISD::UINT_TO_FP: return getConstantFP(C->getValue(), VT); 691 } 692 } 693 694 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val)) 695 switch (Opcode) { 696 case ISD::FNEG: 697 return getConstantFP(-C->getValue(), VT); 698 case ISD::FP_ROUND: 699 case ISD::FP_EXTEND: 700 return getConstantFP(C->getValue(), VT); 701 case ISD::FP_TO_SINT: 702 return getConstant((int64_t)C->getValue(), VT); 703 case ISD::FP_TO_UINT: 704 return getConstant((uint64_t)C->getValue(), VT); 705 } 706 707 unsigned OpOpcode = Operand.Val->getOpcode(); 708 switch (Opcode) { 709 case ISD::TokenFactor: 710 return Operand; // Factor of one node? No factor. 711 case ISD::SIGN_EXTEND: 712 if (Operand.getValueType() == VT) return Operand; // noop extension 713 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 714 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 715 break; 716 case ISD::ZERO_EXTEND: 717 if (Operand.getValueType() == VT) return Operand; // noop extension 718 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 719 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0)); 720 break; 721 case ISD::TRUNCATE: 722 if (Operand.getValueType() == VT) return Operand; // noop truncate 723 if (OpOpcode == ISD::TRUNCATE) 724 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 725 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) { 726 // If the source is smaller than the dest, we still need an extend. 727 if (Operand.Val->getOperand(0).getValueType() < VT) 728 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 729 else if (Operand.Val->getOperand(0).getValueType() > VT) 730 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 731 else 732 return Operand.Val->getOperand(0); 733 } 734 break; 735 case ISD::FNEG: 736 if (OpOpcode == ISD::SUB) // -(X-Y) -> (Y-X) 737 return getNode(ISD::SUB, VT, Operand.Val->getOperand(1), 738 Operand.Val->getOperand(0)); 739 if (OpOpcode == ISD::FNEG) // --X -> X 740 return Operand.Val->getOperand(0); 741 break; 742 case ISD::FABS: 743 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 744 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0)); 745 break; 746 } 747 748 SDNode *&N = UnaryOps[std::make_pair(Opcode, std::make_pair(Operand, VT))]; 749 if (N) return SDOperand(N, 0); 750 N = new SDNode(Opcode, Operand); 751 N->setValueTypes(VT); 752 AllNodes.push_back(N); 753 return SDOperand(N, 0); 754} 755 756/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 757/// this predicate to simplify operations downstream. V and Mask are known to 758/// be the same type. 759static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask, 760 const TargetLowering &TLI) { 761 unsigned SrcBits; 762 if (Mask == 0) return true; 763 764 // If we know the result of a setcc has the top bits zero, use this info. 765 switch (Op.getOpcode()) { 766 case ISD::UNDEF: 767 return true; 768 case ISD::Constant: 769 return (cast<ConstantSDNode>(Op)->getValue() & Mask) == 0; 770 771 case ISD::SETCC: 772 return ((Mask & 1) == 0) && 773 TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult; 774 775 case ISD::ZEXTLOAD: 776 SrcBits = MVT::getSizeInBits(cast<MVTSDNode>(Op)->getExtraValueType()); 777 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits. 778 case ISD::ZERO_EXTEND: 779 SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType()); 780 return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI); 781 782 case ISD::AND: 783 // (X & C1) & C2 == 0 iff C1 & C2 == 0. 784 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 785 return MaskedValueIsZero(Op.getOperand(0),AndRHS->getValue() & Mask, TLI); 786 787 // FALL THROUGH 788 case ISD::OR: 789 case ISD::XOR: 790 return MaskedValueIsZero(Op.getOperand(0), Mask, TLI) && 791 MaskedValueIsZero(Op.getOperand(1), Mask, TLI); 792 case ISD::SELECT: 793 return MaskedValueIsZero(Op.getOperand(1), Mask, TLI) && 794 MaskedValueIsZero(Op.getOperand(2), Mask, TLI); 795 796 case ISD::SRL: 797 // (ushr X, C1) & C2 == 0 iff X & (C2 << C1) == 0 798 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 799 uint64_t NewVal = Mask << ShAmt->getValue(); 800 SrcBits = MVT::getSizeInBits(Op.getValueType()); 801 if (SrcBits != 64) NewVal &= (1ULL << SrcBits)-1; 802 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI); 803 } 804 return false; 805 case ISD::SHL: 806 // (ushl X, C1) & C2 == 0 iff X & (C2 >> C1) == 0 807 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 808 uint64_t NewVal = Mask >> ShAmt->getValue(); 809 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI); 810 } 811 return false; 812 default: break; 813 } 814 815 return false; 816} 817 818 819 820SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 821 SDOperand N1, SDOperand N2) { 822#ifndef NDEBUG 823 switch (Opcode) { 824 case ISD::TokenFactor: 825 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 826 N2.getValueType() == MVT::Other && "Invalid token factor!"); 827 break; 828 case ISD::AND: 829 case ISD::OR: 830 case ISD::XOR: 831 case ISD::UDIV: 832 case ISD::UREM: 833 assert(MVT::isInteger(VT) && "This operator does not apply to FP types!"); 834 // fall through 835 case ISD::ADD: 836 case ISD::SUB: 837 case ISD::MUL: 838 case ISD::SDIV: 839 case ISD::SREM: 840 assert(N1.getValueType() == N2.getValueType() && 841 N1.getValueType() == VT && "Binary operator types must match!"); 842 break; 843 844 case ISD::SHL: 845 case ISD::SRA: 846 case ISD::SRL: 847 assert(VT == N1.getValueType() && 848 "Shift operators return type must be the same as their first arg"); 849 assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) && 850 VT != MVT::i1 && "Shifts only work on integers"); 851 break; 852 default: break; 853 } 854#endif 855 856 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 857 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 858 if (N1C) { 859 if (N2C) { 860 uint64_t C1 = N1C->getValue(), C2 = N2C->getValue(); 861 switch (Opcode) { 862 case ISD::ADD: return getConstant(C1 + C2, VT); 863 case ISD::SUB: return getConstant(C1 - C2, VT); 864 case ISD::MUL: return getConstant(C1 * C2, VT); 865 case ISD::UDIV: 866 if (C2) return getConstant(C1 / C2, VT); 867 break; 868 case ISD::UREM : 869 if (C2) return getConstant(C1 % C2, VT); 870 break; 871 case ISD::SDIV : 872 if (C2) return getConstant(N1C->getSignExtended() / 873 N2C->getSignExtended(), VT); 874 break; 875 case ISD::SREM : 876 if (C2) return getConstant(N1C->getSignExtended() % 877 N2C->getSignExtended(), VT); 878 break; 879 case ISD::AND : return getConstant(C1 & C2, VT); 880 case ISD::OR : return getConstant(C1 | C2, VT); 881 case ISD::XOR : return getConstant(C1 ^ C2, VT); 882 case ISD::SHL : return getConstant(C1 << (int)C2, VT); 883 case ISD::SRL : return getConstant(C1 >> (unsigned)C2, VT); 884 case ISD::SRA : return getConstant(N1C->getSignExtended() >>(int)C2, VT); 885 default: break; 886 } 887 888 } else { // Cannonicalize constant to RHS if commutative 889 if (isCommutativeBinOp(Opcode)) { 890 std::swap(N1C, N2C); 891 std::swap(N1, N2); 892 } 893 } 894 895 switch (Opcode) { 896 default: break; 897 case ISD::SHL: // shl 0, X -> 0 898 if (N1C->isNullValue()) return N1; 899 break; 900 case ISD::SRL: // srl 0, X -> 0 901 if (N1C->isNullValue()) return N1; 902 break; 903 case ISD::SRA: // sra -1, X -> -1 904 if (N1C->isAllOnesValue()) return N1; 905 break; 906 } 907 } 908 909 if (N2C) { 910 uint64_t C2 = N2C->getValue(); 911 912 switch (Opcode) { 913 case ISD::ADD: 914 if (!C2) return N1; // add X, 0 -> X 915 break; 916 case ISD::SUB: 917 if (!C2) return N1; // sub X, 0 -> X 918 break; 919 case ISD::MUL: 920 if (!C2) return N2; // mul X, 0 -> 0 921 if (N2C->isAllOnesValue()) // mul X, -1 -> 0-X 922 return getNode(ISD::SUB, VT, getConstant(0, VT), N1); 923 924 // FIXME: Move this to the DAG combiner when it exists. 925 if ((C2 & C2-1) == 0) { 926 SDOperand ShAmt = getConstant(ExactLog2(C2), TLI.getShiftAmountTy()); 927 return getNode(ISD::SHL, VT, N1, ShAmt); 928 } 929 break; 930 931 case ISD::UDIV: 932 // FIXME: Move this to the DAG combiner when it exists. 933 if ((C2 & C2-1) == 0 && C2) { 934 SDOperand ShAmt = getConstant(ExactLog2(C2), TLI.getShiftAmountTy()); 935 return getNode(ISD::SRL, VT, N1, ShAmt); 936 } 937 break; 938 939 case ISD::SHL: 940 case ISD::SRL: 941 case ISD::SRA: 942 // If the shift amount is bigger than the size of the data, then all the 943 // bits are shifted out. Simplify to undef. 944 if (C2 >= MVT::getSizeInBits(N1.getValueType())) { 945 return getNode(ISD::UNDEF, N1.getValueType()); 946 } 947 if (C2 == 0) return N1; 948 break; 949 950 case ISD::AND: 951 if (!C2) return N2; // X and 0 -> 0 952 if (N2C->isAllOnesValue()) 953 return N1; // X and -1 -> X 954 955 if (MaskedValueIsZero(N1, C2, TLI)) // X and 0 -> 0 956 return getConstant(0, VT); 957 958 { 959 uint64_t NotC2 = ~C2; 960 if (VT != MVT::i64) 961 NotC2 &= (1ULL << MVT::getSizeInBits(VT))-1; 962 963 if (MaskedValueIsZero(N1, NotC2, TLI)) 964 return N1; // if (X & ~C2) -> 0, the and is redundant 965 } 966 967 // FIXME: Should add a corresponding version of this for 968 // ZERO_EXTEND/SIGN_EXTEND by converting them to an ANY_EXTEND node which 969 // we don't have yet. 970 971 // and (sign_extend_inreg x:16:32), 1 -> and x, 1 972 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) { 973 // If we are masking out the part of our input that was extended, just 974 // mask the input to the extension directly. 975 unsigned ExtendBits = 976 MVT::getSizeInBits(cast<MVTSDNode>(N1)->getExtraValueType()); 977 if ((C2 & (~0ULL << ExtendBits)) == 0) 978 return getNode(ISD::AND, VT, N1.getOperand(0), N2); 979 } 980 break; 981 case ISD::OR: 982 if (!C2)return N1; // X or 0 -> X 983 if (N2C->isAllOnesValue()) 984 return N2; // X or -1 -> -1 985 break; 986 case ISD::XOR: 987 if (!C2) return N1; // X xor 0 -> X 988 if (N2C->isAllOnesValue()) { 989 if (SetCCSDNode *SetCC = dyn_cast<SetCCSDNode>(N1.Val)){ 990 // !(X op Y) -> (X !op Y) 991 bool isInteger = MVT::isInteger(SetCC->getOperand(0).getValueType()); 992 return getSetCC(ISD::getSetCCInverse(SetCC->getCondition(),isInteger), 993 SetCC->getValueType(0), 994 SetCC->getOperand(0), SetCC->getOperand(1)); 995 } else if (N1.getOpcode() == ISD::AND || N1.getOpcode() == ISD::OR) { 996 SDNode *Op = N1.Val; 997 // !(X or Y) -> (!X and !Y) iff X or Y are freely invertible 998 // !(X and Y) -> (!X or !Y) iff X or Y are freely invertible 999 SDOperand LHS = Op->getOperand(0), RHS = Op->getOperand(1); 1000 if (isInvertibleForFree(RHS) || isInvertibleForFree(LHS)) { 1001 LHS = getNode(ISD::XOR, VT, LHS, N2); // RHS = ~LHS 1002 RHS = getNode(ISD::XOR, VT, RHS, N2); // RHS = ~RHS 1003 if (Op->getOpcode() == ISD::AND) 1004 return getNode(ISD::OR, VT, LHS, RHS); 1005 return getNode(ISD::AND, VT, LHS, RHS); 1006 } 1007 } 1008 // X xor -1 -> not(x) ? 1009 } 1010 break; 1011 } 1012 1013 // Reassociate ((X op C1) op C2) if possible. 1014 if (N1.getOpcode() == Opcode && isAssociativeBinOp(Opcode)) 1015 if (ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N1.Val->getOperand(1))) 1016 return getNode(Opcode, VT, N1.Val->getOperand(0), 1017 getNode(Opcode, VT, N2, N1.Val->getOperand(1))); 1018 } 1019 1020 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val); 1021 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val); 1022 if (N1CFP) 1023 if (N2CFP) { 1024 double C1 = N1CFP->getValue(), C2 = N2CFP->getValue(); 1025 switch (Opcode) { 1026 case ISD::ADD: return getConstantFP(C1 + C2, VT); 1027 case ISD::SUB: return getConstantFP(C1 - C2, VT); 1028 case ISD::MUL: return getConstantFP(C1 * C2, VT); 1029 case ISD::SDIV: 1030 if (C2) return getConstantFP(C1 / C2, VT); 1031 break; 1032 case ISD::SREM : 1033 if (C2) return getConstantFP(fmod(C1, C2), VT); 1034 break; 1035 default: break; 1036 } 1037 1038 } else { // Cannonicalize constant to RHS if commutative 1039 if (isCommutativeBinOp(Opcode)) { 1040 std::swap(N1CFP, N2CFP); 1041 std::swap(N1, N2); 1042 } 1043 } 1044 1045 // Finally, fold operations that do not require constants. 1046 switch (Opcode) { 1047 case ISD::TokenFactor: 1048 if (N1.getOpcode() == ISD::EntryToken) 1049 return N2; 1050 if (N2.getOpcode() == ISD::EntryToken) 1051 return N1; 1052 break; 1053 1054 case ISD::AND: 1055 case ISD::OR: 1056 if (SetCCSDNode *LHS = dyn_cast<SetCCSDNode>(N1.Val)) 1057 if (SetCCSDNode *RHS = dyn_cast<SetCCSDNode>(N2.Val)) { 1058 SDOperand LL = LHS->getOperand(0), RL = RHS->getOperand(0); 1059 SDOperand LR = LHS->getOperand(1), RR = RHS->getOperand(1); 1060 ISD::CondCode Op2 = RHS->getCondition(); 1061 1062 // (X != 0) | (Y != 0) -> (X|Y != 0) 1063 // (X == 0) & (Y == 0) -> (X|Y == 0) 1064 if (LR == RR && isa<ConstantSDNode>(LR) && 1065 cast<ConstantSDNode>(LR)->getValue() == 0 && 1066 Op2 == LHS->getCondition() && MVT::isInteger(LL.getValueType())) { 1067 if ((Op2 == ISD::SETEQ && Opcode == ISD::AND) || 1068 (Op2 == ISD::SETNE && Opcode == ISD::OR)) 1069 return getSetCC(Op2, VT, 1070 getNode(ISD::OR, LR.getValueType(), LL, RL), LR); 1071 } 1072 1073 // (X op1 Y) | (Y op2 X) -> (X op1 Y) | (X swapop2 Y) 1074 if (LL == RR && LR == RL) { 1075 Op2 = ISD::getSetCCSwappedOperands(Op2); 1076 goto MatchedBackwards; 1077 } 1078 1079 if (LL == RL && LR == RR) { 1080 MatchedBackwards: 1081 ISD::CondCode Result; 1082 bool isInteger = MVT::isInteger(LL.getValueType()); 1083 if (Opcode == ISD::OR) 1084 Result = ISD::getSetCCOrOperation(LHS->getCondition(), Op2, 1085 isInteger); 1086 else 1087 Result = ISD::getSetCCAndOperation(LHS->getCondition(), Op2, 1088 isInteger); 1089 if (Result != ISD::SETCC_INVALID) 1090 return getSetCC(Result, LHS->getValueType(0), LL, LR); 1091 } 1092 } 1093 1094 // and/or zext(a), zext(b) -> zext(and/or a, b) 1095 if (N1.getOpcode() == ISD::ZERO_EXTEND && 1096 N2.getOpcode() == ISD::ZERO_EXTEND && 1097 N1.getOperand(0).getValueType() == N2.getOperand(0).getValueType()) 1098 return getNode(ISD::ZERO_EXTEND, VT, 1099 getNode(Opcode, N1.getOperand(0).getValueType(), 1100 N1.getOperand(0), N2.getOperand(0))); 1101 break; 1102 case ISD::XOR: 1103 if (N1 == N2) return getConstant(0, VT); // xor X, Y -> 0 1104 break; 1105 case ISD::ADD: 1106 if (N2.getOpcode() == ISD::FNEG) // (A+ (-B) -> A-B 1107 return getNode(ISD::SUB, VT, N1, N2.getOperand(0)); 1108 if (N1.getOpcode() == ISD::FNEG) // ((-A)+B) -> B-A 1109 return getNode(ISD::SUB, VT, N2, N1.getOperand(0)); 1110 if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) && 1111 cast<ConstantSDNode>(N1.getOperand(0))->getValue() == 0) 1112 return getNode(ISD::SUB, VT, N2, N1.getOperand(1)); // (0-A)+B -> B-A 1113 if (N2.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N2.getOperand(0)) && 1114 cast<ConstantSDNode>(N2.getOperand(0))->getValue() == 0) 1115 return getNode(ISD::SUB, VT, N1, N2.getOperand(1)); // A+(0-B) -> A-B 1116 break; 1117 case ISD::SUB: 1118 if (N1.getOpcode() == ISD::ADD) { 1119 if (N1.Val->getOperand(0) == N2) 1120 return N1.Val->getOperand(1); // (A+B)-A == B 1121 if (N1.Val->getOperand(1) == N2) 1122 return N1.Val->getOperand(0); // (A+B)-B == A 1123 } 1124 if (N2.getOpcode() == ISD::FNEG) // (A- (-B) -> A+B 1125 return getNode(ISD::ADD, VT, N1, N2.getOperand(0)); 1126 break; 1127 // FIXME: figure out how to safely handle things like 1128 // int foo(int x) { return 1 << (x & 255); } 1129 // int bar() { return foo(256); } 1130#if 0 1131 case ISD::SHL: 1132 case ISD::SRL: 1133 case ISD::SRA: 1134 if (N2.getOpcode() == ISD::SIGN_EXTEND_INREG && 1135 cast<MVTSDNode>(N2)->getExtraValueType() != MVT::i1) 1136 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1137 else if (N2.getOpcode() == ISD::AND) 1138 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N2.getOperand(1))) { 1139 // If the and is only masking out bits that cannot effect the shift, 1140 // eliminate the and. 1141 unsigned NumBits = MVT::getSizeInBits(VT); 1142 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 1143 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1144 } 1145 break; 1146#endif 1147 } 1148 1149 SDNode *&N = BinaryOps[std::make_pair(Opcode, std::make_pair(N1, N2))]; 1150 if (N) return SDOperand(N, 0); 1151 N = new SDNode(Opcode, N1, N2); 1152 N->setValueTypes(VT); 1153 1154 AllNodes.push_back(N); 1155 return SDOperand(N, 0); 1156} 1157 1158SDOperand SelectionDAG::getLoad(MVT::ValueType VT, 1159 SDOperand Chain, SDOperand Ptr) { 1160 SDNode *&N = Loads[std::make_pair(Ptr, std::make_pair(Chain, VT))]; 1161 if (N) return SDOperand(N, 0); 1162 N = new SDNode(ISD::LOAD, Chain, Ptr); 1163 1164 // Loads have a token chain. 1165 N->setValueTypes(VT, MVT::Other); 1166 AllNodes.push_back(N); 1167 return SDOperand(N, 0); 1168} 1169 1170 1171SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1172 SDOperand N1, SDOperand N2, SDOperand N3) { 1173 // Perform various simplifications. 1174 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 1175 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 1176 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val); 1177 switch (Opcode) { 1178 case ISD::SELECT: 1179 if (N1C) 1180 if (N1C->getValue()) 1181 return N2; // select true, X, Y -> X 1182 else 1183 return N3; // select false, X, Y -> Y 1184 1185 if (N2 == N3) return N2; // select C, X, X -> X 1186 1187 if (VT == MVT::i1) { // Boolean SELECT 1188 if (N2C) { 1189 if (N2C->getValue()) // select C, 1, X -> C | X 1190 return getNode(ISD::OR, VT, N1, N3); 1191 else // select C, 0, X -> ~C & X 1192 return getNode(ISD::AND, VT, 1193 getNode(ISD::XOR, N1.getValueType(), N1, 1194 getConstant(1, N1.getValueType())), N3); 1195 } else if (N3C) { 1196 if (N3C->getValue()) // select C, X, 1 -> ~C | X 1197 return getNode(ISD::OR, VT, 1198 getNode(ISD::XOR, N1.getValueType(), N1, 1199 getConstant(1, N1.getValueType())), N2); 1200 else // select C, X, 0 -> C & X 1201 return getNode(ISD::AND, VT, N1, N2); 1202 } 1203 1204 if (N1 == N2) // X ? X : Y --> X ? 1 : Y --> X | Y 1205 return getNode(ISD::OR, VT, N1, N3); 1206 if (N1 == N3) // X ? Y : X --> X ? Y : 0 --> X & Y 1207 return getNode(ISD::AND, VT, N1, N2); 1208 } 1209 1210 // If this is a selectcc, check to see if we can simplify the result. 1211 if (SetCCSDNode *SetCC = dyn_cast<SetCCSDNode>(N1)) { 1212 if (ConstantFPSDNode *CFP = 1213 dyn_cast<ConstantFPSDNode>(SetCC->getOperand(1))) 1214 if (CFP->getValue() == 0.0) { // Allow either -0.0 or 0.0 1215 // select (setg[te] X, +/-0.0), X, fneg(X) -> fabs 1216 if ((SetCC->getCondition() == ISD::SETGE || 1217 SetCC->getCondition() == ISD::SETGT) && 1218 N2 == SetCC->getOperand(0) && N3.getOpcode() == ISD::FNEG && 1219 N3.getOperand(0) == N2) 1220 return getNode(ISD::FABS, VT, N2); 1221 1222 // select (setl[te] X, +/-0.0), fneg(X), X -> fabs 1223 if ((SetCC->getCondition() == ISD::SETLT || 1224 SetCC->getCondition() == ISD::SETLE) && 1225 N3 == SetCC->getOperand(0) && N2.getOpcode() == ISD::FNEG && 1226 N2.getOperand(0) == N3) 1227 return getNode(ISD::FABS, VT, N3); 1228 } 1229 // select (setlt X, 0), A, 0 -> and (sra X, size(X)-1, A) 1230 if (ConstantSDNode *CN = 1231 dyn_cast<ConstantSDNode>(SetCC->getOperand(1))) 1232 if (CN->getValue() == 0 && N3C && N3C->getValue() == 0) 1233 if (SetCC->getCondition() == ISD::SETLT) { 1234 MVT::ValueType XType = SetCC->getOperand(0).getValueType(); 1235 MVT::ValueType AType = N2.getValueType(); 1236 if (XType >= AType) { 1237 SDOperand Shift = getNode(ISD::SRA, XType, SetCC->getOperand(0), 1238 getConstant(MVT::getSizeInBits(XType)-1, 1239 TLI.getShiftAmountTy())); 1240 if (XType > AType) 1241 Shift = getNode(ISD::TRUNCATE, AType, Shift); 1242 return getNode(ISD::AND, AType, Shift, N2); 1243 } 1244 } 1245 } 1246 break; 1247 case ISD::BRCOND: 1248 if (N2C) 1249 if (N2C->getValue()) // Unconditional branch 1250 return getNode(ISD::BR, MVT::Other, N1, N3); 1251 else 1252 return N1; // Never-taken branch 1253 break; 1254 // FIXME: figure out how to safely handle things like 1255 // int foo(int x) { return 1 << (x & 255); } 1256 // int bar() { return foo(256); } 1257#if 0 1258 case ISD::SRA_PARTS: 1259 case ISD::SRL_PARTS: 1260 case ISD::SHL_PARTS: 1261 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 1262 cast<MVTSDNode>(N3)->getExtraValueType() != MVT::i1) 1263 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 1264 else if (N3.getOpcode() == ISD::AND) 1265 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 1266 // If the and is only masking out bits that cannot effect the shift, 1267 // eliminate the and. 1268 unsigned NumBits = MVT::getSizeInBits(VT)*2; 1269 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 1270 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 1271 } 1272 break; 1273#endif 1274 } 1275 1276 SDNode *N = new SDNode(Opcode, N1, N2, N3); 1277 switch (Opcode) { 1278 default: 1279 N->setValueTypes(VT); 1280 break; 1281 case ISD::DYNAMIC_STACKALLOC: // DYNAMIC_STACKALLOC produces pointer and chain 1282 N->setValueTypes(VT, MVT::Other); 1283 break; 1284 1285 case ISD::SRA_PARTS: 1286 case ISD::SRL_PARTS: 1287 case ISD::SHL_PARTS: { 1288 std::vector<MVT::ValueType> V(N->getNumOperands()-1, VT); 1289 N->setValueTypes(V); 1290 break; 1291 } 1292 } 1293 1294 // FIXME: memoize NODES 1295 AllNodes.push_back(N); 1296 return SDOperand(N, 0); 1297} 1298 1299SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1300 std::vector<SDOperand> &Children) { 1301 switch (Children.size()) { 1302 case 0: return getNode(Opcode, VT); 1303 case 1: return getNode(Opcode, VT, Children[0]); 1304 case 2: return getNode(Opcode, VT, Children[0], Children[1]); 1305 case 3: return getNode(Opcode, VT, Children[0], Children[1], Children[2]); 1306 default: break; 1307 } 1308 1309 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(Children[1].Val); 1310 switch (Opcode) { 1311 default: break; 1312 case ISD::BRCONDTWOWAY: 1313 if (N1C) 1314 if (N1C->getValue()) // Unconditional branch to true dest. 1315 return getNode(ISD::BR, MVT::Other, Children[0], Children[2]); 1316 else // Unconditional branch to false dest. 1317 return getNode(ISD::BR, MVT::Other, Children[0], Children[3]); 1318 break; 1319 } 1320 1321 // FIXME: MEMOIZE!! 1322 SDNode *N = new SDNode(Opcode, Children); 1323 if (Opcode != ISD::ADD_PARTS && Opcode != ISD::SUB_PARTS) { 1324 N->setValueTypes(VT); 1325 } else { 1326 std::vector<MVT::ValueType> V(N->getNumOperands()/2, VT); 1327 N->setValueTypes(V); 1328 } 1329 AllNodes.push_back(N); 1330 return SDOperand(N, 0); 1331} 1332 1333SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1, 1334 MVT::ValueType EVT) { 1335 1336 switch (Opcode) { 1337 default: assert(0 && "Bad opcode for this accessor!"); 1338 case ISD::FP_ROUND_INREG: 1339 assert(VT == N1.getValueType() && "Not an inreg round!"); 1340 assert(MVT::isFloatingPoint(VT) && MVT::isFloatingPoint(EVT) && 1341 "Cannot FP_ROUND_INREG integer types"); 1342 if (EVT == VT) return N1; // Not actually rounding 1343 assert(EVT < VT && "Not rounding down!"); 1344 1345 if (isa<ConstantFPSDNode>(N1)) 1346 return getNode(ISD::FP_EXTEND, VT, getNode(ISD::FP_ROUND, EVT, N1)); 1347 break; 1348 case ISD::SIGN_EXTEND_INREG: 1349 assert(VT == N1.getValueType() && "Not an inreg extend!"); 1350 assert(MVT::isInteger(VT) && MVT::isInteger(EVT) && 1351 "Cannot *_EXTEND_INREG FP types"); 1352 if (EVT == VT) return N1; // Not actually extending 1353 assert(EVT < VT && "Not extending!"); 1354 1355 // Extending a constant? Just return the extended constant. 1356 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 1357 SDOperand Tmp = getNode(ISD::TRUNCATE, EVT, N1); 1358 return getNode(ISD::SIGN_EXTEND, VT, Tmp); 1359 } 1360 1361 // If we are sign extending an extension, use the original source. 1362 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) 1363 if (cast<MVTSDNode>(N1)->getExtraValueType() <= EVT) 1364 return N1; 1365 1366 // If we are sign extending a sextload, return just the load. 1367 if (N1.getOpcode() == ISD::SEXTLOAD && Opcode == ISD::SIGN_EXTEND_INREG) 1368 if (cast<MVTSDNode>(N1)->getExtraValueType() <= EVT) 1369 return N1; 1370 1371 // If we are extending the result of a setcc, and we already know the 1372 // contents of the top bits, eliminate the extension. 1373 if (N1.getOpcode() == ISD::SETCC && 1374 TLI.getSetCCResultContents() == 1375 TargetLowering::ZeroOrNegativeOneSetCCResult) 1376 return N1; 1377 1378 // If we are sign extending the result of an (and X, C) operation, and we 1379 // know the extended bits are zeros already, don't do the extend. 1380 if (N1.getOpcode() == ISD::AND) 1381 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 1382 uint64_t Mask = N1C->getValue(); 1383 unsigned NumBits = MVT::getSizeInBits(EVT); 1384 if ((Mask & (~0ULL << (NumBits-1))) == 0) 1385 return N1; 1386 } 1387 break; 1388 } 1389 1390 EVTStruct NN; 1391 NN.Opcode = Opcode; 1392 NN.VT = VT; 1393 NN.EVT = EVT; 1394 NN.Ops.push_back(N1); 1395 1396 SDNode *&N = MVTSDNodes[NN]; 1397 if (N) return SDOperand(N, 0); 1398 N = new MVTSDNode(Opcode, VT, N1, EVT); 1399 AllNodes.push_back(N); 1400 return SDOperand(N, 0); 1401} 1402 1403SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1, 1404 SDOperand N2, MVT::ValueType EVT) { 1405 switch (Opcode) { 1406 default: assert(0 && "Bad opcode for this accessor!"); 1407 case ISD::EXTLOAD: 1408 case ISD::SEXTLOAD: 1409 case ISD::ZEXTLOAD: 1410 // If they are asking for an extending load from/to the same thing, return a 1411 // normal load. 1412 if (VT == EVT) 1413 return getNode(ISD::LOAD, VT, N1, N2); 1414 assert(EVT < VT && "Should only be an extending load, not truncating!"); 1415 assert((Opcode == ISD::EXTLOAD || MVT::isInteger(VT)) && 1416 "Cannot sign/zero extend a FP load!"); 1417 assert(MVT::isInteger(VT) == MVT::isInteger(EVT) && 1418 "Cannot convert from FP to Int or Int -> FP!"); 1419 break; 1420 } 1421 1422 EVTStruct NN; 1423 NN.Opcode = Opcode; 1424 NN.VT = VT; 1425 NN.EVT = EVT; 1426 NN.Ops.push_back(N1); 1427 NN.Ops.push_back(N2); 1428 1429 SDNode *&N = MVTSDNodes[NN]; 1430 if (N) return SDOperand(N, 0); 1431 N = new MVTSDNode(Opcode, VT, MVT::Other, N1, N2, EVT); 1432 AllNodes.push_back(N); 1433 return SDOperand(N, 0); 1434} 1435 1436SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1, 1437 SDOperand N2, SDOperand N3, MVT::ValueType EVT) { 1438 switch (Opcode) { 1439 default: assert(0 && "Bad opcode for this accessor!"); 1440 case ISD::TRUNCSTORE: 1441#if 0 // FIXME: If the target supports EVT natively, convert to a truncate/store 1442 // If this is a truncating store of a constant, convert to the desired type 1443 // and store it instead. 1444 if (isa<Constant>(N1)) { 1445 SDOperand Op = getNode(ISD::TRUNCATE, EVT, N1); 1446 if (isa<Constant>(Op)) 1447 N1 = Op; 1448 } 1449 // Also for ConstantFP? 1450#endif 1451 if (N1.getValueType() == EVT) // Normal store? 1452 return getNode(ISD::STORE, VT, N1, N2, N3); 1453 assert(N2.getValueType() > EVT && "Not a truncation?"); 1454 assert(MVT::isInteger(N2.getValueType()) == MVT::isInteger(EVT) && 1455 "Can't do FP-INT conversion!"); 1456 break; 1457 } 1458 1459 EVTStruct NN; 1460 NN.Opcode = Opcode; 1461 NN.VT = VT; 1462 NN.EVT = EVT; 1463 NN.Ops.push_back(N1); 1464 NN.Ops.push_back(N2); 1465 NN.Ops.push_back(N3); 1466 1467 SDNode *&N = MVTSDNodes[NN]; 1468 if (N) return SDOperand(N, 0); 1469 N = new MVTSDNode(Opcode, VT, N1, N2, N3, EVT); 1470 AllNodes.push_back(N); 1471 return SDOperand(N, 0); 1472} 1473 1474 1475/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 1476/// indicated value. This method ignores uses of other values defined by this 1477/// operation. 1478bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) { 1479 assert(Value < getNumValues() && "Bad value!"); 1480 1481 // If there is only one value, this is easy. 1482 if (getNumValues() == 1) 1483 return use_size() == NUses; 1484 if (Uses.size() < NUses) return false; 1485 1486 SDOperand TheValue(this, Value); 1487 1488 std::set<SDNode*> UsersHandled; 1489 1490 for (std::vector<SDNode*>::iterator UI = Uses.begin(), E = Uses.end(); 1491 UI != E; ++UI) { 1492 SDNode *User = *UI; 1493 if (User->getNumOperands() == 1 || 1494 UsersHandled.insert(User).second) // First time we've seen this? 1495 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) 1496 if (User->getOperand(i) == TheValue) { 1497 if (NUses == 0) 1498 return false; // too many uses 1499 --NUses; 1500 } 1501 } 1502 1503 // Found exactly the right number of uses? 1504 return NUses == 0; 1505} 1506 1507 1508const char *SDNode::getOperationName() const { 1509 switch (getOpcode()) { 1510 default: return "<<Unknown>>"; 1511 case ISD::PCMARKER: return "PCMarker"; 1512 case ISD::EntryToken: return "EntryToken"; 1513 case ISD::TokenFactor: return "TokenFactor"; 1514 case ISD::Constant: return "Constant"; 1515 case ISD::ConstantFP: return "ConstantFP"; 1516 case ISD::GlobalAddress: return "GlobalAddress"; 1517 case ISD::FrameIndex: return "FrameIndex"; 1518 case ISD::BasicBlock: return "BasicBlock"; 1519 case ISD::ExternalSymbol: return "ExternalSymbol"; 1520 case ISD::ConstantPool: return "ConstantPoolIndex"; 1521 case ISD::CopyToReg: return "CopyToReg"; 1522 case ISD::CopyFromReg: return "CopyFromReg"; 1523 case ISD::ImplicitDef: return "ImplicitDef"; 1524 case ISD::UNDEF: return "undef"; 1525 1526 // Unary operators 1527 case ISD::FABS: return "fabs"; 1528 case ISD::FNEG: return "fneg"; 1529 1530 // Binary operators 1531 case ISD::ADD: return "add"; 1532 case ISD::SUB: return "sub"; 1533 case ISD::MUL: return "mul"; 1534 case ISD::MULHU: return "mulhu"; 1535 case ISD::MULHS: return "mulhs"; 1536 case ISD::SDIV: return "sdiv"; 1537 case ISD::UDIV: return "udiv"; 1538 case ISD::SREM: return "srem"; 1539 case ISD::UREM: return "urem"; 1540 case ISD::AND: return "and"; 1541 case ISD::OR: return "or"; 1542 case ISD::XOR: return "xor"; 1543 case ISD::SHL: return "shl"; 1544 case ISD::SRA: return "sra"; 1545 case ISD::SRL: return "srl"; 1546 1547 case ISD::SELECT: return "select"; 1548 case ISD::ADD_PARTS: return "add_parts"; 1549 case ISD::SUB_PARTS: return "sub_parts"; 1550 case ISD::SHL_PARTS: return "shl_parts"; 1551 case ISD::SRA_PARTS: return "sra_parts"; 1552 case ISD::SRL_PARTS: return "srl_parts"; 1553 1554 // Conversion operators. 1555 case ISD::SIGN_EXTEND: return "sign_extend"; 1556 case ISD::ZERO_EXTEND: return "zero_extend"; 1557 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 1558 case ISD::TRUNCATE: return "truncate"; 1559 case ISD::FP_ROUND: return "fp_round"; 1560 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 1561 case ISD::FP_EXTEND: return "fp_extend"; 1562 1563 case ISD::SINT_TO_FP: return "sint_to_fp"; 1564 case ISD::UINT_TO_FP: return "uint_to_fp"; 1565 case ISD::FP_TO_SINT: return "fp_to_sint"; 1566 case ISD::FP_TO_UINT: return "fp_to_uint"; 1567 1568 // Control flow instructions 1569 case ISD::BR: return "br"; 1570 case ISD::BRCOND: return "brcond"; 1571 case ISD::BRCONDTWOWAY: return "brcondtwoway"; 1572 case ISD::RET: return "ret"; 1573 case ISD::CALL: return "call"; 1574 case ISD::ADJCALLSTACKDOWN: return "adjcallstackdown"; 1575 case ISD::ADJCALLSTACKUP: return "adjcallstackup"; 1576 1577 // Other operators 1578 case ISD::LOAD: return "load"; 1579 case ISD::STORE: return "store"; 1580 case ISD::EXTLOAD: return "extload"; 1581 case ISD::SEXTLOAD: return "sextload"; 1582 case ISD::ZEXTLOAD: return "zextload"; 1583 case ISD::TRUNCSTORE: return "truncstore"; 1584 1585 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 1586 case ISD::EXTRACT_ELEMENT: return "extract_element"; 1587 case ISD::BUILD_PAIR: return "build_pair"; 1588 case ISD::MEMSET: return "memset"; 1589 case ISD::MEMCPY: return "memcpy"; 1590 case ISD::MEMMOVE: return "memmove"; 1591 1592 case ISD::SETCC: 1593 const SetCCSDNode *SetCC = cast<SetCCSDNode>(this); 1594 switch (SetCC->getCondition()) { 1595 default: assert(0 && "Unknown setcc condition!"); 1596 case ISD::SETOEQ: return "setcc:setoeq"; 1597 case ISD::SETOGT: return "setcc:setogt"; 1598 case ISD::SETOGE: return "setcc:setoge"; 1599 case ISD::SETOLT: return "setcc:setolt"; 1600 case ISD::SETOLE: return "setcc:setole"; 1601 case ISD::SETONE: return "setcc:setone"; 1602 1603 case ISD::SETO: return "setcc:seto"; 1604 case ISD::SETUO: return "setcc:setuo"; 1605 case ISD::SETUEQ: return "setcc:setue"; 1606 case ISD::SETUGT: return "setcc:setugt"; 1607 case ISD::SETUGE: return "setcc:setuge"; 1608 case ISD::SETULT: return "setcc:setult"; 1609 case ISD::SETULE: return "setcc:setule"; 1610 case ISD::SETUNE: return "setcc:setune"; 1611 1612 case ISD::SETEQ: return "setcc:seteq"; 1613 case ISD::SETGT: return "setcc:setgt"; 1614 case ISD::SETGE: return "setcc:setge"; 1615 case ISD::SETLT: return "setcc:setlt"; 1616 case ISD::SETLE: return "setcc:setle"; 1617 case ISD::SETNE: return "setcc:setne"; 1618 } 1619 } 1620} 1621 1622void SDNode::dump() const { 1623 std::cerr << (void*)this << ": "; 1624 1625 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 1626 if (i) std::cerr << ","; 1627 if (getValueType(i) == MVT::Other) 1628 std::cerr << "ch"; 1629 else 1630 std::cerr << MVT::getValueTypeString(getValueType(i)); 1631 } 1632 std::cerr << " = " << getOperationName(); 1633 1634 std::cerr << " "; 1635 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1636 if (i) std::cerr << ", "; 1637 std::cerr << (void*)getOperand(i).Val; 1638 if (unsigned RN = getOperand(i).ResNo) 1639 std::cerr << ":" << RN; 1640 } 1641 1642 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 1643 std::cerr << "<" << CSDN->getValue() << ">"; 1644 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 1645 std::cerr << "<" << CSDN->getValue() << ">"; 1646 } else if (const GlobalAddressSDNode *GADN = 1647 dyn_cast<GlobalAddressSDNode>(this)) { 1648 std::cerr << "<"; 1649 WriteAsOperand(std::cerr, GADN->getGlobal()) << ">"; 1650 } else if (const FrameIndexSDNode *FIDN = 1651 dyn_cast<FrameIndexSDNode>(this)) { 1652 std::cerr << "<" << FIDN->getIndex() << ">"; 1653 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 1654 std::cerr << "<" << CP->getIndex() << ">"; 1655 } else if (const BasicBlockSDNode *BBDN = 1656 dyn_cast<BasicBlockSDNode>(this)) { 1657 std::cerr << "<"; 1658 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 1659 if (LBB) 1660 std::cerr << LBB->getName() << " "; 1661 std::cerr << (const void*)BBDN->getBasicBlock() << ">"; 1662 } else if (const RegSDNode *C2V = dyn_cast<RegSDNode>(this)) { 1663 std::cerr << "<reg #" << C2V->getReg() << ">"; 1664 } else if (const ExternalSymbolSDNode *ES = 1665 dyn_cast<ExternalSymbolSDNode>(this)) { 1666 std::cerr << "'" << ES->getSymbol() << "'"; 1667 } else if (const MVTSDNode *M = dyn_cast<MVTSDNode>(this)) { 1668 std::cerr << " - Ty = " << MVT::getValueTypeString(M->getExtraValueType()); 1669 } 1670} 1671 1672static void DumpNodes(SDNode *N, unsigned indent) { 1673 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 1674 if (N->getOperand(i).Val->hasOneUse()) 1675 DumpNodes(N->getOperand(i).Val, indent+2); 1676 else 1677 std::cerr << "\n" << std::string(indent+2, ' ') 1678 << (void*)N->getOperand(i).Val << ": <multiple use>"; 1679 1680 1681 std::cerr << "\n" << std::string(indent, ' '); 1682 N->dump(); 1683} 1684 1685void SelectionDAG::dump() const { 1686 std::cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 1687 std::vector<SDNode*> Nodes(AllNodes); 1688 std::sort(Nodes.begin(), Nodes.end()); 1689 1690 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) { 1691 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val) 1692 DumpNodes(Nodes[i], 2); 1693 } 1694 1695 DumpNodes(getRoot().Val, 2); 1696 1697 std::cerr << "\n\n"; 1698} 1699 1700