VirtRegMap.cpp revision b50bb8cf197709b3f49044740044c06d8f314564
1//===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the VirtRegMap class.
11//
12// It also contains implementations of the the Spiller interface, which, given a
13// virtual register map and a machine function, eliminates all virtual
14// references by replacing them with physical register references - adding spill
15// code as necessary.
16//
17//===----------------------------------------------------------------------===//
18
19#define DEBUG_TYPE "spiller"
20#include "VirtRegMap.h"
21#include "llvm/Function.h"
22#include "llvm/CodeGen/MachineFrameInfo.h"
23#include "llvm/CodeGen/MachineFunction.h"
24#include "llvm/CodeGen/SSARegMap.h"
25#include "llvm/Target/TargetMachine.h"
26#include "llvm/Target/TargetInstrInfo.h"
27#include "llvm/Support/CommandLine.h"
28#include "llvm/Support/Debug.h"
29#include "llvm/Support/Compiler.h"
30#include "llvm/ADT/BitVector.h"
31#include "llvm/ADT/Statistic.h"
32#include "llvm/ADT/STLExtras.h"
33#include "llvm/ADT/SmallSet.h"
34#include <algorithm>
35using namespace llvm;
36
37STATISTIC(NumSpills, "Number of register spills");
38STATISTIC(NumReMats, "Number of re-materialization");
39STATISTIC(NumDRM   , "Number of re-materializable defs elided");
40STATISTIC(NumStores, "Number of stores added");
41STATISTIC(NumLoads , "Number of loads added");
42STATISTIC(NumReused, "Number of values reused");
43STATISTIC(NumDSE   , "Number of dead stores elided");
44STATISTIC(NumDCE   , "Number of copies elided");
45
46namespace {
47  enum SpillerName { simple, local };
48
49  static cl::opt<SpillerName>
50  SpillerOpt("spiller",
51             cl::desc("Spiller to use: (default: local)"),
52             cl::Prefix,
53             cl::values(clEnumVal(simple, "  simple spiller"),
54                        clEnumVal(local,  "  local spiller"),
55                        clEnumValEnd),
56             cl::init(local));
57}
58
59//===----------------------------------------------------------------------===//
60//  VirtRegMap implementation
61//===----------------------------------------------------------------------===//
62
63VirtRegMap::VirtRegMap(MachineFunction &mf)
64  : TII(*mf.getTarget().getInstrInfo()), MF(mf),
65    Virt2PhysMap(NO_PHYS_REG), Virt2StackSlotMap(NO_STACK_SLOT),
66    Virt2ReMatIdMap(NO_STACK_SLOT), Virt2SplitMap(0),
67    ReMatMap(NULL), ReMatId(MAX_STACK_SLOT+1) {
68  grow();
69}
70
71void VirtRegMap::grow() {
72  unsigned LastVirtReg = MF.getSSARegMap()->getLastVirtReg();
73  Virt2PhysMap.grow(LastVirtReg);
74  Virt2StackSlotMap.grow(LastVirtReg);
75  Virt2ReMatIdMap.grow(LastVirtReg);
76  Virt2SplitMap.grow(LastVirtReg);
77  ReMatMap.grow(LastVirtReg);
78}
79
80int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
81  assert(MRegisterInfo::isVirtualRegister(virtReg));
82  assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
83         "attempt to assign stack slot to already spilled register");
84  const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg);
85  int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(),
86                                                        RC->getAlignment());
87  Virt2StackSlotMap[virtReg] = frameIndex;
88  ++NumSpills;
89  return frameIndex;
90}
91
92void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) {
93  assert(MRegisterInfo::isVirtualRegister(virtReg));
94  assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
95         "attempt to assign stack slot to already spilled register");
96  assert((frameIndex >= 0 ||
97          (frameIndex >= MF.getFrameInfo()->getObjectIndexBegin())) &&
98         "illegal fixed frame index");
99  Virt2StackSlotMap[virtReg] = frameIndex;
100}
101
102int VirtRegMap::assignVirtReMatId(unsigned virtReg) {
103  assert(MRegisterInfo::isVirtualRegister(virtReg));
104  assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT &&
105         "attempt to assign re-mat id to already spilled register");
106  Virt2ReMatIdMap[virtReg] = ReMatId;
107  return ReMatId++;
108}
109
110void VirtRegMap::assignVirtReMatId(unsigned virtReg, int id) {
111  assert(MRegisterInfo::isVirtualRegister(virtReg));
112  assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT &&
113         "attempt to assign re-mat id to already spilled register");
114  Virt2ReMatIdMap[virtReg] = id;
115}
116
117void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI,
118                            MachineInstr *NewMI, ModRef MRInfo) {
119  // Move previous memory references folded to new instruction.
120  MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI);
121  for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI),
122         E = MI2VirtMap.end(); I != E && I->first == OldMI; ) {
123    MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second));
124    MI2VirtMap.erase(I++);
125  }
126
127  // add new memory reference
128  MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo)));
129}
130
131void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *MI, ModRef MRInfo) {
132  MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(MI);
133  MI2VirtMap.insert(IP, std::make_pair(MI, std::make_pair(VirtReg, MRInfo)));
134}
135
136void VirtRegMap::print(std::ostream &OS) const {
137  const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo();
138
139  OS << "********** REGISTER MAP **********\n";
140  for (unsigned i = MRegisterInfo::FirstVirtualRegister,
141         e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) {
142    if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG)
143      OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n";
144
145  }
146
147  for (unsigned i = MRegisterInfo::FirstVirtualRegister,
148         e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i)
149    if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT)
150      OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n";
151  OS << '\n';
152}
153
154void VirtRegMap::dump() const {
155  print(DOUT);
156}
157
158
159//===----------------------------------------------------------------------===//
160// Simple Spiller Implementation
161//===----------------------------------------------------------------------===//
162
163Spiller::~Spiller() {}
164
165namespace {
166  struct VISIBILITY_HIDDEN SimpleSpiller : public Spiller {
167    bool runOnMachineFunction(MachineFunction& mf, VirtRegMap &VRM);
168  };
169}
170
171bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
172  DOUT << "********** REWRITE MACHINE CODE **********\n";
173  DOUT << "********** Function: " << MF.getFunction()->getName() << '\n';
174  const TargetMachine &TM = MF.getTarget();
175  const MRegisterInfo &MRI = *TM.getRegisterInfo();
176
177  // LoadedRegs - Keep track of which vregs are loaded, so that we only load
178  // each vreg once (in the case where a spilled vreg is used by multiple
179  // operands).  This is always smaller than the number of operands to the
180  // current machine instr, so it should be small.
181  std::vector<unsigned> LoadedRegs;
182
183  for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
184       MBBI != E; ++MBBI) {
185    DOUT << MBBI->getBasicBlock()->getName() << ":\n";
186    MachineBasicBlock &MBB = *MBBI;
187    for (MachineBasicBlock::iterator MII = MBB.begin(),
188           E = MBB.end(); MII != E; ++MII) {
189      MachineInstr &MI = *MII;
190      for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
191        MachineOperand &MO = MI.getOperand(i);
192        if (MO.isRegister() && MO.getReg())
193          if (MRegisterInfo::isVirtualRegister(MO.getReg())) {
194            unsigned VirtReg = MO.getReg();
195            unsigned PhysReg = VRM.getPhys(VirtReg);
196            if (!VRM.isAssignedReg(VirtReg)) {
197              int StackSlot = VRM.getStackSlot(VirtReg);
198              const TargetRegisterClass* RC =
199                MF.getSSARegMap()->getRegClass(VirtReg);
200
201              if (MO.isUse() &&
202                  std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg)
203                  == LoadedRegs.end()) {
204                MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
205                LoadedRegs.push_back(VirtReg);
206                ++NumLoads;
207                DOUT << '\t' << *prior(MII);
208              }
209
210              if (MO.isDef()) {
211                MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, true,
212                                        StackSlot, RC);
213                ++NumStores;
214              }
215            }
216            MF.setPhysRegUsed(PhysReg);
217            MI.getOperand(i).setReg(PhysReg);
218          } else {
219            MF.setPhysRegUsed(MO.getReg());
220          }
221      }
222
223      DOUT << '\t' << MI;
224      LoadedRegs.clear();
225    }
226  }
227  return true;
228}
229
230//===----------------------------------------------------------------------===//
231//  Local Spiller Implementation
232//===----------------------------------------------------------------------===//
233
234namespace {
235  class AvailableSpills;
236
237  /// LocalSpiller - This spiller does a simple pass over the machine basic
238  /// block to attempt to keep spills in registers as much as possible for
239  /// blocks that have low register pressure (the vreg may be spilled due to
240  /// register pressure in other blocks).
241  class VISIBILITY_HIDDEN LocalSpiller : public Spiller {
242    SSARegMap *RegMap;
243    const MRegisterInfo *MRI;
244    const TargetInstrInfo *TII;
245  public:
246    bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
247      RegMap = MF.getSSARegMap();
248      MRI = MF.getTarget().getRegisterInfo();
249      TII = MF.getTarget().getInstrInfo();
250      DOUT << "\n**** Local spiller rewriting function '"
251           << MF.getFunction()->getName() << "':\n";
252      DOUT << "**** Machine Instrs (NOTE! Does not include spills and reloads!) ****\n";
253      DEBUG(MF.dump());
254
255      for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
256           MBB != E; ++MBB)
257        RewriteMBB(*MBB, VRM);
258
259      DOUT << "**** Post Machine Instrs ****\n";
260      DEBUG(MF.dump());
261
262      return true;
263    }
264  private:
265    bool PrepForUnfoldOpti(MachineBasicBlock &MBB,
266                           MachineBasicBlock::iterator &MII,
267                           std::vector<MachineInstr*> &MaybeDeadStores,
268                           AvailableSpills &Spills, BitVector &RegKills,
269                           std::vector<MachineOperand*> &KillOps,
270                           VirtRegMap &VRM);
271    void SpillRegToStackSlot(MachineBasicBlock &MBB,
272                             MachineBasicBlock::iterator &MII,
273                             int Idx, unsigned PhysReg, int StackSlot,
274                             const TargetRegisterClass *RC,
275                             bool isAvailable, MachineInstr *&LastStore,
276                             AvailableSpills &Spills,
277                             SmallSet<MachineInstr*, 4> &ReMatDefs,
278                             BitVector &RegKills,
279                             std::vector<MachineOperand*> &KillOps,
280                             VirtRegMap &VRM);
281    void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM);
282  };
283}
284
285/// AvailableSpills - As the local spiller is scanning and rewriting an MBB from
286/// top down, keep track of which spills slots or remat are available in each
287/// register.
288///
289/// Note that not all physregs are created equal here.  In particular, some
290/// physregs are reloads that we are allowed to clobber or ignore at any time.
291/// Other physregs are values that the register allocated program is using that
292/// we cannot CHANGE, but we can read if we like.  We keep track of this on a
293/// per-stack-slot / remat id basis as the low bit in the value of the
294/// SpillSlotsAvailable entries.  The predicate 'canClobberPhysReg()' checks
295/// this bit and addAvailable sets it if.
296namespace {
297class VISIBILITY_HIDDEN AvailableSpills {
298  const MRegisterInfo *MRI;
299  const TargetInstrInfo *TII;
300
301  // SpillSlotsOrReMatsAvailable - This map keeps track of all of the spilled
302  // or remat'ed virtual register values that are still available, due to being
303  // loaded or stored to, but not invalidated yet.
304  std::map<int, unsigned> SpillSlotsOrReMatsAvailable;
305
306  // PhysRegsAvailable - This is the inverse of SpillSlotsOrReMatsAvailable,
307  // indicating which stack slot values are currently held by a physreg.  This
308  // is used to invalidate entries in SpillSlotsOrReMatsAvailable when a
309  // physreg is modified.
310  std::multimap<unsigned, int> PhysRegsAvailable;
311
312  void disallowClobberPhysRegOnly(unsigned PhysReg);
313
314  void ClobberPhysRegOnly(unsigned PhysReg);
315public:
316  AvailableSpills(const MRegisterInfo *mri, const TargetInstrInfo *tii)
317    : MRI(mri), TII(tii) {
318  }
319
320  const MRegisterInfo *getRegInfo() const { return MRI; }
321
322  /// getSpillSlotOrReMatPhysReg - If the specified stack slot or remat is
323  /// available in a  physical register, return that PhysReg, otherwise
324  /// return 0.
325  unsigned getSpillSlotOrReMatPhysReg(int Slot) const {
326    std::map<int, unsigned>::const_iterator I =
327      SpillSlotsOrReMatsAvailable.find(Slot);
328    if (I != SpillSlotsOrReMatsAvailable.end()) {
329      return I->second >> 1;  // Remove the CanClobber bit.
330    }
331    return 0;
332  }
333
334  /// addAvailable - Mark that the specified stack slot / remat is available in
335  /// the specified physreg.  If CanClobber is true, the physreg can be modified
336  /// at any time without changing the semantics of the program.
337  void addAvailable(int SlotOrReMat, MachineInstr *MI, unsigned Reg,
338                    bool CanClobber = true) {
339    // If this stack slot is thought to be available in some other physreg,
340    // remove its record.
341    ModifyStackSlotOrReMat(SlotOrReMat);
342
343    PhysRegsAvailable.insert(std::make_pair(Reg, SlotOrReMat));
344    SpillSlotsOrReMatsAvailable[SlotOrReMat]= (Reg << 1) | (unsigned)CanClobber;
345
346    if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT)
347      DOUT << "Remembering RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1;
348    else
349      DOUT << "Remembering SS#" << SlotOrReMat;
350    DOUT << " in physreg " << MRI->getName(Reg) << "\n";
351  }
352
353  /// canClobberPhysReg - Return true if the spiller is allowed to change the
354  /// value of the specified stackslot register if it desires.  The specified
355  /// stack slot must be available in a physreg for this query to make sense.
356  bool canClobberPhysReg(int SlotOrReMat) const {
357    assert(SpillSlotsOrReMatsAvailable.count(SlotOrReMat) &&
358           "Value not available!");
359    return SpillSlotsOrReMatsAvailable.find(SlotOrReMat)->second & 1;
360  }
361
362  /// disallowClobberPhysReg - Unset the CanClobber bit of the specified
363  /// stackslot register. The register is still available but is no longer
364  /// allowed to be modifed.
365  void disallowClobberPhysReg(unsigned PhysReg);
366
367  /// ClobberPhysReg - This is called when the specified physreg changes
368  /// value.  We use this to invalidate any info about stuff that lives in
369  /// it and any of its aliases.
370  void ClobberPhysReg(unsigned PhysReg);
371
372  /// ModifyStackSlotOrReMat - This method is called when the value in a stack
373  /// slot changes.  This removes information about which register the previous
374  /// value for this slot lives in (as the previous value is dead now).
375  void ModifyStackSlotOrReMat(int SlotOrReMat);
376};
377}
378
379/// disallowClobberPhysRegOnly - Unset the CanClobber bit of the specified
380/// stackslot register. The register is still available but is no longer
381/// allowed to be modifed.
382void AvailableSpills::disallowClobberPhysRegOnly(unsigned PhysReg) {
383  std::multimap<unsigned, int>::iterator I =
384    PhysRegsAvailable.lower_bound(PhysReg);
385  while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
386    int SlotOrReMat = I->second;
387    I++;
388    assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg &&
389           "Bidirectional map mismatch!");
390    SpillSlotsOrReMatsAvailable[SlotOrReMat] &= ~1;
391    DOUT << "PhysReg " << MRI->getName(PhysReg)
392         << " copied, it is available for use but can no longer be modified\n";
393  }
394}
395
396/// disallowClobberPhysReg - Unset the CanClobber bit of the specified
397/// stackslot register and its aliases. The register and its aliases may
398/// still available but is no longer allowed to be modifed.
399void AvailableSpills::disallowClobberPhysReg(unsigned PhysReg) {
400  for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
401    disallowClobberPhysRegOnly(*AS);
402  disallowClobberPhysRegOnly(PhysReg);
403}
404
405/// ClobberPhysRegOnly - This is called when the specified physreg changes
406/// value.  We use this to invalidate any info about stuff we thing lives in it.
407void AvailableSpills::ClobberPhysRegOnly(unsigned PhysReg) {
408  std::multimap<unsigned, int>::iterator I =
409    PhysRegsAvailable.lower_bound(PhysReg);
410  while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
411    int SlotOrReMat = I->second;
412    PhysRegsAvailable.erase(I++);
413    assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg &&
414           "Bidirectional map mismatch!");
415    SpillSlotsOrReMatsAvailable.erase(SlotOrReMat);
416    DOUT << "PhysReg " << MRI->getName(PhysReg)
417         << " clobbered, invalidating ";
418    if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT)
419      DOUT << "RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1 << "\n";
420    else
421      DOUT << "SS#" << SlotOrReMat << "\n";
422  }
423}
424
425/// ClobberPhysReg - This is called when the specified physreg changes
426/// value.  We use this to invalidate any info about stuff we thing lives in
427/// it and any of its aliases.
428void AvailableSpills::ClobberPhysReg(unsigned PhysReg) {
429  for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
430    ClobberPhysRegOnly(*AS);
431  ClobberPhysRegOnly(PhysReg);
432}
433
434/// ModifyStackSlotOrReMat - This method is called when the value in a stack
435/// slot changes.  This removes information about which register the previous
436/// value for this slot lives in (as the previous value is dead now).
437void AvailableSpills::ModifyStackSlotOrReMat(int SlotOrReMat) {
438  std::map<int, unsigned>::iterator It =
439    SpillSlotsOrReMatsAvailable.find(SlotOrReMat);
440  if (It == SpillSlotsOrReMatsAvailable.end()) return;
441  unsigned Reg = It->second >> 1;
442  SpillSlotsOrReMatsAvailable.erase(It);
443
444  // This register may hold the value of multiple stack slots, only remove this
445  // stack slot from the set of values the register contains.
446  std::multimap<unsigned, int>::iterator I = PhysRegsAvailable.lower_bound(Reg);
447  for (; ; ++I) {
448    assert(I != PhysRegsAvailable.end() && I->first == Reg &&
449           "Map inverse broken!");
450    if (I->second == SlotOrReMat) break;
451  }
452  PhysRegsAvailable.erase(I);
453}
454
455
456
457/// InvalidateKills - MI is going to be deleted. If any of its operands are
458/// marked kill, then invalidate the information.
459static void InvalidateKills(MachineInstr &MI, BitVector &RegKills,
460                            std::vector<MachineOperand*> &KillOps,
461                            SmallVector<unsigned, 2> *KillRegs = NULL) {
462  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
463    MachineOperand &MO = MI.getOperand(i);
464    if (!MO.isRegister() || !MO.isUse() || !MO.isKill())
465      continue;
466    unsigned Reg = MO.getReg();
467    if (KillRegs)
468      KillRegs->push_back(Reg);
469    if (KillOps[Reg] == &MO) {
470      RegKills.reset(Reg);
471      KillOps[Reg] = NULL;
472    }
473  }
474}
475
476/// InvalidateRegDef - If the def operand of the specified def MI is now dead
477/// (since it's spill instruction is removed), mark it isDead. Also checks if
478/// the def MI has other definition operands that are not dead. Returns it by
479/// reference.
480static bool InvalidateRegDef(MachineBasicBlock::iterator I,
481                             MachineInstr &NewDef, unsigned Reg,
482                             bool &HasLiveDef) {
483  // Due to remat, it's possible this reg isn't being reused. That is,
484  // the def of this reg (by prev MI) is now dead.
485  MachineInstr *DefMI = I;
486  MachineOperand *DefOp = NULL;
487  for (unsigned i = 0, e = DefMI->getNumOperands(); i != e; ++i) {
488    MachineOperand &MO = DefMI->getOperand(i);
489    if (MO.isRegister() && MO.isDef()) {
490      if (MO.getReg() == Reg)
491        DefOp = &MO;
492      else if (!MO.isDead())
493        HasLiveDef = true;
494    }
495  }
496  if (!DefOp)
497    return false;
498
499  bool FoundUse = false, Done = false;
500  MachineBasicBlock::iterator E = NewDef;
501  ++I; ++E;
502  for (; !Done && I != E; ++I) {
503    MachineInstr *NMI = I;
504    for (unsigned j = 0, ee = NMI->getNumOperands(); j != ee; ++j) {
505      MachineOperand &MO = NMI->getOperand(j);
506      if (!MO.isRegister() || MO.getReg() != Reg)
507        continue;
508      if (MO.isUse())
509        FoundUse = true;
510      Done = true; // Stop after scanning all the operands of this MI.
511    }
512  }
513  if (!FoundUse) {
514    // Def is dead!
515    DefOp->setIsDead();
516    return true;
517  }
518  return false;
519}
520
521/// UpdateKills - Track and update kill info. If a MI reads a register that is
522/// marked kill, then it must be due to register reuse. Transfer the kill info
523/// over.
524static void UpdateKills(MachineInstr &MI, BitVector &RegKills,
525                        std::vector<MachineOperand*> &KillOps) {
526  const TargetInstrDescriptor *TID = MI.getInstrDescriptor();
527  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
528    MachineOperand &MO = MI.getOperand(i);
529    if (!MO.isRegister() || !MO.isUse())
530      continue;
531    unsigned Reg = MO.getReg();
532    if (Reg == 0)
533      continue;
534
535    if (RegKills[Reg]) {
536      // That can't be right. Register is killed but not re-defined and it's
537      // being reused. Let's fix that.
538      KillOps[Reg]->unsetIsKill();
539      if (i < TID->numOperands &&
540          TID->getOperandConstraint(i, TOI::TIED_TO) == -1)
541        // Unless it's a two-address operand, this is the new kill.
542        MO.setIsKill();
543    }
544
545    if (MO.isKill()) {
546      RegKills.set(Reg);
547      KillOps[Reg] = &MO;
548    }
549  }
550
551  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
552    const MachineOperand &MO = MI.getOperand(i);
553    if (!MO.isRegister() || !MO.isDef())
554      continue;
555    unsigned Reg = MO.getReg();
556    RegKills.reset(Reg);
557    KillOps[Reg] = NULL;
558  }
559}
560
561
562// ReusedOp - For each reused operand, we keep track of a bit of information, in
563// case we need to rollback upon processing a new operand.  See comments below.
564namespace {
565  struct ReusedOp {
566    // The MachineInstr operand that reused an available value.
567    unsigned Operand;
568
569    // StackSlotOrReMat - The spill slot or remat id of the value being reused.
570    unsigned StackSlotOrReMat;
571
572    // PhysRegReused - The physical register the value was available in.
573    unsigned PhysRegReused;
574
575    // AssignedPhysReg - The physreg that was assigned for use by the reload.
576    unsigned AssignedPhysReg;
577
578    // VirtReg - The virtual register itself.
579    unsigned VirtReg;
580
581    ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr,
582             unsigned vreg)
583      : Operand(o), StackSlotOrReMat(ss), PhysRegReused(prr),
584        AssignedPhysReg(apr), VirtReg(vreg) {}
585  };
586
587  /// ReuseInfo - This maintains a collection of ReuseOp's for each operand that
588  /// is reused instead of reloaded.
589  class VISIBILITY_HIDDEN ReuseInfo {
590    MachineInstr &MI;
591    std::vector<ReusedOp> Reuses;
592    BitVector PhysRegsClobbered;
593  public:
594    ReuseInfo(MachineInstr &mi, const MRegisterInfo *mri) : MI(mi) {
595      PhysRegsClobbered.resize(mri->getNumRegs());
596    }
597
598    bool hasReuses() const {
599      return !Reuses.empty();
600    }
601
602    /// addReuse - If we choose to reuse a virtual register that is already
603    /// available instead of reloading it, remember that we did so.
604    void addReuse(unsigned OpNo, unsigned StackSlotOrReMat,
605                  unsigned PhysRegReused, unsigned AssignedPhysReg,
606                  unsigned VirtReg) {
607      // If the reload is to the assigned register anyway, no undo will be
608      // required.
609      if (PhysRegReused == AssignedPhysReg) return;
610
611      // Otherwise, remember this.
612      Reuses.push_back(ReusedOp(OpNo, StackSlotOrReMat, PhysRegReused,
613                                AssignedPhysReg, VirtReg));
614    }
615
616    void markClobbered(unsigned PhysReg) {
617      PhysRegsClobbered.set(PhysReg);
618    }
619
620    bool isClobbered(unsigned PhysReg) const {
621      return PhysRegsClobbered.test(PhysReg);
622    }
623
624    /// GetRegForReload - We are about to emit a reload into PhysReg.  If there
625    /// is some other operand that is using the specified register, either pick
626    /// a new register to use, or evict the previous reload and use this reg.
627    unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
628                             AvailableSpills &Spills,
629                             std::vector<MachineInstr*> &MaybeDeadStores,
630                             SmallSet<unsigned, 8> &Rejected,
631                             BitVector &RegKills,
632                             std::vector<MachineOperand*> &KillOps,
633                             VirtRegMap &VRM) {
634      if (Reuses.empty()) return PhysReg;  // This is most often empty.
635
636      for (unsigned ro = 0, e = Reuses.size(); ro != e; ++ro) {
637        ReusedOp &Op = Reuses[ro];
638        // If we find some other reuse that was supposed to use this register
639        // exactly for its reload, we can change this reload to use ITS reload
640        // register. That is, unless its reload register has already been
641        // considered and subsequently rejected because it has also been reused
642        // by another operand.
643        if (Op.PhysRegReused == PhysReg &&
644            Rejected.count(Op.AssignedPhysReg) == 0) {
645          // Yup, use the reload register that we didn't use before.
646          unsigned NewReg = Op.AssignedPhysReg;
647          Rejected.insert(PhysReg);
648          return GetRegForReload(NewReg, MI, Spills, MaybeDeadStores, Rejected,
649                                 RegKills, KillOps, VRM);
650        } else {
651          // Otherwise, we might also have a problem if a previously reused
652          // value aliases the new register.  If so, codegen the previous reload
653          // and use this one.
654          unsigned PRRU = Op.PhysRegReused;
655          const MRegisterInfo *MRI = Spills.getRegInfo();
656          if (MRI->areAliases(PRRU, PhysReg)) {
657            // Okay, we found out that an alias of a reused register
658            // was used.  This isn't good because it means we have
659            // to undo a previous reuse.
660            MachineBasicBlock *MBB = MI->getParent();
661            const TargetRegisterClass *AliasRC =
662              MBB->getParent()->getSSARegMap()->getRegClass(Op.VirtReg);
663
664            // Copy Op out of the vector and remove it, we're going to insert an
665            // explicit load for it.
666            ReusedOp NewOp = Op;
667            Reuses.erase(Reuses.begin()+ro);
668
669            // Ok, we're going to try to reload the assigned physreg into the
670            // slot that we were supposed to in the first place.  However, that
671            // register could hold a reuse.  Check to see if it conflicts or
672            // would prefer us to use a different register.
673            unsigned NewPhysReg = GetRegForReload(NewOp.AssignedPhysReg,
674                                                  MI, Spills, MaybeDeadStores,
675                                              Rejected, RegKills, KillOps, VRM);
676
677            if (NewOp.StackSlotOrReMat > VirtRegMap::MAX_STACK_SLOT) {
678              MRI->reMaterialize(*MBB, MI, NewPhysReg,
679                                 VRM.getReMaterializedMI(NewOp.VirtReg));
680              ++NumReMats;
681            } else {
682              MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg,
683                                        NewOp.StackSlotOrReMat, AliasRC);
684              // Any stores to this stack slot are not dead anymore.
685              MaybeDeadStores[NewOp.StackSlotOrReMat] = NULL;
686              ++NumLoads;
687            }
688            Spills.ClobberPhysReg(NewPhysReg);
689            Spills.ClobberPhysReg(NewOp.PhysRegReused);
690
691            MI->getOperand(NewOp.Operand).setReg(NewPhysReg);
692
693            Spills.addAvailable(NewOp.StackSlotOrReMat, MI, NewPhysReg);
694            MachineBasicBlock::iterator MII = MI;
695            --MII;
696            UpdateKills(*MII, RegKills, KillOps);
697            DOUT << '\t' << *MII;
698
699            DOUT << "Reuse undone!\n";
700            --NumReused;
701
702            // Finally, PhysReg is now available, go ahead and use it.
703            return PhysReg;
704          }
705        }
706      }
707      return PhysReg;
708    }
709
710    /// GetRegForReload - Helper for the above GetRegForReload(). Add a
711    /// 'Rejected' set to remember which registers have been considered and
712    /// rejected for the reload. This avoids infinite looping in case like
713    /// this:
714    /// t1 := op t2, t3
715    /// t2 <- assigned r0 for use by the reload but ended up reuse r1
716    /// t3 <- assigned r1 for use by the reload but ended up reuse r0
717    /// t1 <- desires r1
718    ///       sees r1 is taken by t2, tries t2's reload register r0
719    ///       sees r0 is taken by t3, tries t3's reload register r1
720    ///       sees r1 is taken by t2, tries t2's reload register r0 ...
721    unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
722                             AvailableSpills &Spills,
723                             std::vector<MachineInstr*> &MaybeDeadStores,
724                             BitVector &RegKills,
725                             std::vector<MachineOperand*> &KillOps,
726                             VirtRegMap &VRM) {
727      SmallSet<unsigned, 8> Rejected;
728      return GetRegForReload(PhysReg, MI, Spills, MaybeDeadStores, Rejected,
729                             RegKills, KillOps, VRM);
730    }
731  };
732}
733
734/// PrepForUnfoldOpti - Turn a store folding instruction into a load folding
735/// instruction. e.g.
736///     xorl  %edi, %eax
737///     movl  %eax, -32(%ebp)
738///     movl  -36(%ebp), %eax
739///	orl   %eax, -32(%ebp)
740/// ==>
741///     xorl  %edi, %eax
742///     orl   -36(%ebp), %eax
743///     mov   %eax, -32(%ebp)
744/// This enables unfolding optimization for a subsequent instruction which will
745/// also eliminate the newly introduced store instruction.
746bool LocalSpiller::PrepForUnfoldOpti(MachineBasicBlock &MBB,
747                                     MachineBasicBlock::iterator &MII,
748                                    std::vector<MachineInstr*> &MaybeDeadStores,
749                                     AvailableSpills &Spills,
750                                     BitVector &RegKills,
751                                     std::vector<MachineOperand*> &KillOps,
752                                     VirtRegMap &VRM) {
753  MachineFunction &MF = *MBB.getParent();
754  MachineInstr &MI = *MII;
755  unsigned UnfoldedOpc = 0;
756  unsigned UnfoldPR = 0;
757  unsigned UnfoldVR = 0;
758  int FoldedSS = VirtRegMap::NO_STACK_SLOT;
759  VirtRegMap::MI2VirtMapTy::const_iterator I, End;
760  for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) {
761    // Only transform a MI that folds a single register.
762    if (UnfoldedOpc)
763      return false;
764    UnfoldVR = I->second.first;
765    VirtRegMap::ModRef MR = I->second.second;
766    if (VRM.isAssignedReg(UnfoldVR))
767      continue;
768    // If this reference is not a use, any previous store is now dead.
769    // Otherwise, the store to this stack slot is not dead anymore.
770    FoldedSS = VRM.getStackSlot(UnfoldVR);
771    MachineInstr* DeadStore = MaybeDeadStores[FoldedSS];
772    if (DeadStore && (MR & VirtRegMap::isModRef)) {
773      unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(FoldedSS);
774      if (!PhysReg ||
775          DeadStore->findRegisterUseOperandIdx(PhysReg, true) == -1)
776        continue;
777      UnfoldPR = PhysReg;
778      UnfoldedOpc = MRI->getOpcodeAfterMemoryUnfold(MI.getOpcode(),
779                                                    false, true);
780    }
781  }
782
783  if (!UnfoldedOpc)
784    return false;
785
786  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
787    MachineOperand &MO = MI.getOperand(i);
788    if (!MO.isRegister() || MO.getReg() == 0 || !MO.isUse())
789      continue;
790    unsigned VirtReg = MO.getReg();
791    if (MRegisterInfo::isPhysicalRegister(VirtReg) || MO.getSubReg())
792      continue;
793    if (VRM.isAssignedReg(VirtReg)) {
794      unsigned PhysReg = VRM.getPhys(VirtReg);
795      if (PhysReg && MRI->regsOverlap(PhysReg, UnfoldPR))
796        return false;
797    } else if (VRM.isReMaterialized(VirtReg))
798      continue;
799    int SS = VRM.getStackSlot(VirtReg);
800    unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SS);
801    if (PhysReg) {
802      if (MRI->regsOverlap(PhysReg, UnfoldPR))
803        return false;
804      continue;
805    }
806    PhysReg = VRM.getPhys(VirtReg);
807    if (!MRI->regsOverlap(PhysReg, UnfoldPR))
808      continue;
809
810    // Ok, we'll need to reload the value into a register which makes
811    // it impossible to perform the store unfolding optimization later.
812    // Let's see if it is possible to fold the load if the store is
813    // unfolded. This allows us to perform the store unfolding
814    // optimization.
815    SmallVector<MachineInstr*, 4> NewMIs;
816    if (MRI->unfoldMemoryOperand(MF, &MI, UnfoldVR, false, false, NewMIs)) {
817      assert(NewMIs.size() == 1);
818      MachineInstr *NewMI = NewMIs.back();
819      NewMIs.clear();
820      int Idx = NewMI->findRegisterUseOperandIdx(VirtReg);
821      assert(Idx != -1);
822      SmallVector<unsigned, 2> Ops;
823      Ops.push_back(Idx);
824      MachineInstr *FoldedMI = MRI->foldMemoryOperand(NewMI, Ops, SS);
825      if (FoldedMI) {
826        if (!VRM.hasPhys(UnfoldVR))
827          VRM.assignVirt2Phys(UnfoldVR, UnfoldPR);
828        VRM.virtFolded(VirtReg, FoldedMI, VirtRegMap::isRef);
829        MII = MBB.insert(MII, FoldedMI);
830        VRM.RemoveMachineInstrFromMaps(&MI);
831        MBB.erase(&MI);
832        return true;
833      }
834      delete NewMI;
835    }
836  }
837  return false;
838}
839
840/// findSuperReg - Find the SubReg's super-register of given register class
841/// where its SubIdx sub-register is SubReg.
842static unsigned findSuperReg(const TargetRegisterClass *RC, unsigned SubReg,
843                             unsigned SubIdx, const MRegisterInfo *MRI) {
844  for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end();
845       I != E; ++I) {
846    unsigned Reg = *I;
847    if (MRI->getSubReg(Reg, SubIdx) == SubReg)
848      return Reg;
849  }
850  return 0;
851}
852
853/// SpillRegToStackSlot - Spill a register to a specified stack slot. Check if
854/// the last store to the same slot is now dead. If so, remove the last store.
855void LocalSpiller::SpillRegToStackSlot(MachineBasicBlock &MBB,
856                                  MachineBasicBlock::iterator &MII,
857                                  int Idx, unsigned PhysReg, int StackSlot,
858                                  const TargetRegisterClass *RC,
859                                  bool isAvailable, MachineInstr *&LastStore,
860                                  AvailableSpills &Spills,
861                                  SmallSet<MachineInstr*, 4> &ReMatDefs,
862                                  BitVector &RegKills,
863                                  std::vector<MachineOperand*> &KillOps,
864                                  VirtRegMap &VRM) {
865  MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, true, StackSlot, RC);
866  DOUT << "Store:\t" << *next(MII);
867
868  // If there is a dead store to this stack slot, nuke it now.
869  if (LastStore) {
870    DOUT << "Removed dead store:\t" << *LastStore;
871    ++NumDSE;
872    SmallVector<unsigned, 2> KillRegs;
873    InvalidateKills(*LastStore, RegKills, KillOps, &KillRegs);
874    MachineBasicBlock::iterator PrevMII = LastStore;
875    bool CheckDef = PrevMII != MBB.begin();
876    if (CheckDef)
877      --PrevMII;
878    MBB.erase(LastStore);
879    VRM.RemoveMachineInstrFromMaps(LastStore);
880    if (CheckDef) {
881      // Look at defs of killed registers on the store. Mark the defs
882      // as dead since the store has been deleted and they aren't
883      // being reused.
884      for (unsigned j = 0, ee = KillRegs.size(); j != ee; ++j) {
885        bool HasOtherDef = false;
886        if (InvalidateRegDef(PrevMII, *MII, KillRegs[j], HasOtherDef)) {
887          MachineInstr *DeadDef = PrevMII;
888          if (ReMatDefs.count(DeadDef) && !HasOtherDef) {
889            // FIXME: This assumes a remat def does not have side
890            // effects.
891            MBB.erase(DeadDef);
892            VRM.RemoveMachineInstrFromMaps(DeadDef);
893            ++NumDRM;
894          }
895        }
896      }
897    }
898  }
899
900  LastStore = next(MII);
901
902  // If the stack slot value was previously available in some other
903  // register, change it now.  Otherwise, make the register available,
904  // in PhysReg.
905  Spills.ModifyStackSlotOrReMat(StackSlot);
906  Spills.ClobberPhysReg(PhysReg);
907  Spills.addAvailable(StackSlot, LastStore, PhysReg, isAvailable);
908  ++NumStores;
909}
910
911/// rewriteMBB - Keep track of which spills are available even after the
912/// register allocator is done with them.  If possible, avid reloading vregs.
913void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
914  DOUT << MBB.getBasicBlock()->getName() << ":\n";
915
916  MachineFunction &MF = *MBB.getParent();
917
918  // Spills - Keep track of which spilled values are available in physregs so
919  // that we can choose to reuse the physregs instead of emitting reloads.
920  AvailableSpills Spills(MRI, TII);
921
922  // MaybeDeadStores - When we need to write a value back into a stack slot,
923  // keep track of the inserted store.  If the stack slot value is never read
924  // (because the value was used from some available register, for example), and
925  // subsequently stored to, the original store is dead.  This map keeps track
926  // of inserted stores that are not used.  If we see a subsequent store to the
927  // same stack slot, the original store is deleted.
928  std::vector<MachineInstr*> MaybeDeadStores;
929  MaybeDeadStores.resize(MF.getFrameInfo()->getObjectIndexEnd(), NULL);
930
931  // ReMatDefs - These are rematerializable def MIs which are not deleted.
932  SmallSet<MachineInstr*, 4> ReMatDefs;
933
934  // Keep track of kill information.
935  BitVector RegKills(MRI->getNumRegs());
936  std::vector<MachineOperand*>  KillOps;
937  KillOps.resize(MRI->getNumRegs(), NULL);
938
939  for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end();
940       MII != E; ) {
941    MachineBasicBlock::iterator NextMII = MII; ++NextMII;
942
943    VirtRegMap::MI2VirtMapTy::const_iterator I, End;
944    bool Erased = false;
945    bool BackTracked = false;
946    if (PrepForUnfoldOpti(MBB, MII,
947                          MaybeDeadStores, Spills, RegKills, KillOps, VRM))
948      NextMII = next(MII);
949
950    MachineInstr &MI = *MII;
951    const TargetInstrDescriptor *TID = MI.getInstrDescriptor();
952
953    // Insert restores here if asked to.
954    if (VRM.isRestorePt(&MI)) {
955      std::vector<unsigned> &RestoreRegs = VRM.getRestorePtRestores(&MI);
956      for (unsigned i = 0, e = RestoreRegs.size(); i != e; ++i) {
957        unsigned VirtReg = RestoreRegs[i];
958        if (!VRM.getPreSplitReg(VirtReg))
959          continue; // Split interval spilled again.
960        unsigned Phys = VRM.getPhys(VirtReg);
961        MF.setPhysRegUsed(Phys);
962        if (VRM.isReMaterialized(VirtReg)) {
963          MRI->reMaterialize(MBB, &MI, Phys,
964                             VRM.getReMaterializedMI(VirtReg));
965          ++NumReMats;
966        } else {
967          const TargetRegisterClass* RC = RegMap->getRegClass(VirtReg);
968          MRI->loadRegFromStackSlot(MBB, &MI, Phys, VRM.getStackSlot(VirtReg), RC);
969          ++NumLoads;
970        }
971        // This invalidates Phys.
972        Spills.ClobberPhysReg(Phys);
973        UpdateKills(*prior(MII), RegKills, KillOps);
974        DOUT << '\t' << *prior(MII);
975      }
976    }
977
978    // Insert spills here if asked to.
979    if (VRM.isSpillPt(&MI)) {
980      std::vector<std::pair<unsigned,bool> > &SpillRegs =
981        VRM.getSpillPtSpills(&MI);
982      for (unsigned i = 0, e = SpillRegs.size(); i != e; ++i) {
983        unsigned VirtReg = SpillRegs[i].first;
984        bool isKill = SpillRegs[i].second;
985        if (!VRM.getPreSplitReg(VirtReg))
986          continue; // Split interval spilled again.
987        const TargetRegisterClass *RC = RegMap->getRegClass(VirtReg);
988        unsigned Phys = VRM.getPhys(VirtReg);
989        int StackSlot = VRM.getStackSlot(VirtReg);
990        MRI->storeRegToStackSlot(MBB, next(MII), Phys, isKill, StackSlot, RC);
991        MachineInstr *StoreMI = next(MII);
992        DOUT << "Store:\t" << StoreMI;
993        VRM.virtFolded(VirtReg, StoreMI, VirtRegMap::isMod);
994      }
995      NextMII = next(MII);
996    }
997
998    /// ReusedOperands - Keep track of operand reuse in case we need to undo
999    /// reuse.
1000    ReuseInfo ReusedOperands(MI, MRI);
1001    // Process all of the spilled uses and all non spilled reg references.
1002    for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
1003      MachineOperand &MO = MI.getOperand(i);
1004      if (!MO.isRegister() || MO.getReg() == 0)
1005        continue;   // Ignore non-register operands.
1006
1007      unsigned VirtReg = MO.getReg();
1008      if (MRegisterInfo::isPhysicalRegister(VirtReg)) {
1009        // Ignore physregs for spilling, but remember that it is used by this
1010        // function.
1011        MF.setPhysRegUsed(VirtReg);
1012        continue;
1013      }
1014
1015      assert(MRegisterInfo::isVirtualRegister(VirtReg) &&
1016             "Not a virtual or a physical register?");
1017
1018      unsigned SubIdx = MO.getSubReg();
1019      if (VRM.isAssignedReg(VirtReg)) {
1020        // This virtual register was assigned a physreg!
1021        unsigned Phys = VRM.getPhys(VirtReg);
1022        MF.setPhysRegUsed(Phys);
1023        if (MO.isDef())
1024          ReusedOperands.markClobbered(Phys);
1025        unsigned RReg = SubIdx ? MRI->getSubReg(Phys, SubIdx) : Phys;
1026        MI.getOperand(i).setReg(RReg);
1027        continue;
1028      }
1029
1030      // This virtual register is now known to be a spilled value.
1031      if (!MO.isUse())
1032        continue;  // Handle defs in the loop below (handle use&def here though)
1033
1034      bool DoReMat = VRM.isReMaterialized(VirtReg);
1035      int SSorRMId = DoReMat
1036        ? VRM.getReMatId(VirtReg) : VRM.getStackSlot(VirtReg);
1037      int ReuseSlot = SSorRMId;
1038
1039      // Check to see if this stack slot is available.
1040      unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SSorRMId);
1041
1042      // If this is a sub-register use, make sure the reuse register is in the
1043      // right register class. For example, for x86 not all of the 32-bit
1044      // registers have accessible sub-registers.
1045      // Similarly so for EXTRACT_SUBREG. Consider this:
1046      // EDI = op
1047      // MOV32_mr fi#1, EDI
1048      // ...
1049      //       = EXTRACT_SUBREG fi#1
1050      // fi#1 is available in EDI, but it cannot be reused because it's not in
1051      // the right register file.
1052      if (PhysReg &&
1053          (SubIdx || MI.getOpcode() == TargetInstrInfo::EXTRACT_SUBREG)) {
1054        const TargetRegisterClass* RC = RegMap->getRegClass(VirtReg);
1055        if (!RC->contains(PhysReg))
1056          PhysReg = 0;
1057      }
1058
1059      if (PhysReg) {
1060        // This spilled operand might be part of a two-address operand.  If this
1061        // is the case, then changing it will necessarily require changing the
1062        // def part of the instruction as well.  However, in some cases, we
1063        // aren't allowed to modify the reused register.  If none of these cases
1064        // apply, reuse it.
1065        bool CanReuse = true;
1066        int ti = TID->getOperandConstraint(i, TOI::TIED_TO);
1067        if (ti != -1 &&
1068            MI.getOperand(ti).isRegister() &&
1069            MI.getOperand(ti).getReg() == VirtReg) {
1070          // Okay, we have a two address operand.  We can reuse this physreg as
1071          // long as we are allowed to clobber the value and there isn't an
1072          // earlier def that has already clobbered the physreg.
1073          CanReuse = Spills.canClobberPhysReg(ReuseSlot) &&
1074            !ReusedOperands.isClobbered(PhysReg);
1075        }
1076
1077        if (CanReuse) {
1078          // If this stack slot value is already available, reuse it!
1079          if (ReuseSlot > VirtRegMap::MAX_STACK_SLOT)
1080            DOUT << "Reusing RM#" << ReuseSlot-VirtRegMap::MAX_STACK_SLOT-1;
1081          else
1082            DOUT << "Reusing SS#" << ReuseSlot;
1083          DOUT << " from physreg "
1084               << MRI->getName(PhysReg) << " for vreg"
1085               << VirtReg <<" instead of reloading into physreg "
1086               << MRI->getName(VRM.getPhys(VirtReg)) << "\n";
1087          unsigned RReg = SubIdx ? MRI->getSubReg(PhysReg, SubIdx) : PhysReg;
1088          MI.getOperand(i).setReg(RReg);
1089
1090          // The only technical detail we have is that we don't know that
1091          // PhysReg won't be clobbered by a reloaded stack slot that occurs
1092          // later in the instruction.  In particular, consider 'op V1, V2'.
1093          // If V1 is available in physreg R0, we would choose to reuse it
1094          // here, instead of reloading it into the register the allocator
1095          // indicated (say R1).  However, V2 might have to be reloaded
1096          // later, and it might indicate that it needs to live in R0.  When
1097          // this occurs, we need to have information available that
1098          // indicates it is safe to use R1 for the reload instead of R0.
1099          //
1100          // To further complicate matters, we might conflict with an alias,
1101          // or R0 and R1 might not be compatible with each other.  In this
1102          // case, we actually insert a reload for V1 in R1, ensuring that
1103          // we can get at R0 or its alias.
1104          ReusedOperands.addReuse(i, ReuseSlot, PhysReg,
1105                                  VRM.getPhys(VirtReg), VirtReg);
1106          if (ti != -1)
1107            // Only mark it clobbered if this is a use&def operand.
1108            ReusedOperands.markClobbered(PhysReg);
1109          ++NumReused;
1110
1111          if (MI.getOperand(i).isKill() &&
1112              ReuseSlot <= VirtRegMap::MAX_STACK_SLOT) {
1113            // This was the last use and the spilled value is still available
1114            // for reuse. That means the spill was unnecessary!
1115            MachineInstr* DeadStore = MaybeDeadStores[ReuseSlot];
1116            if (DeadStore) {
1117              DOUT << "Removed dead store:\t" << *DeadStore;
1118              InvalidateKills(*DeadStore, RegKills, KillOps);
1119              VRM.RemoveMachineInstrFromMaps(DeadStore);
1120              MBB.erase(DeadStore);
1121              MaybeDeadStores[ReuseSlot] = NULL;
1122              ++NumDSE;
1123            }
1124          }
1125          continue;
1126        }  // CanReuse
1127
1128        // Otherwise we have a situation where we have a two-address instruction
1129        // whose mod/ref operand needs to be reloaded.  This reload is already
1130        // available in some register "PhysReg", but if we used PhysReg as the
1131        // operand to our 2-addr instruction, the instruction would modify
1132        // PhysReg.  This isn't cool if something later uses PhysReg and expects
1133        // to get its initial value.
1134        //
1135        // To avoid this problem, and to avoid doing a load right after a store,
1136        // we emit a copy from PhysReg into the designated register for this
1137        // operand.
1138        unsigned DesignatedReg = VRM.getPhys(VirtReg);
1139        assert(DesignatedReg && "Must map virtreg to physreg!");
1140
1141        // Note that, if we reused a register for a previous operand, the
1142        // register we want to reload into might not actually be
1143        // available.  If this occurs, use the register indicated by the
1144        // reuser.
1145        if (ReusedOperands.hasReuses())
1146          DesignatedReg = ReusedOperands.GetRegForReload(DesignatedReg, &MI,
1147                               Spills, MaybeDeadStores, RegKills, KillOps, VRM);
1148
1149        // If the mapped designated register is actually the physreg we have
1150        // incoming, we don't need to inserted a dead copy.
1151        if (DesignatedReg == PhysReg) {
1152          // If this stack slot value is already available, reuse it!
1153          if (ReuseSlot > VirtRegMap::MAX_STACK_SLOT)
1154            DOUT << "Reusing RM#" << ReuseSlot-VirtRegMap::MAX_STACK_SLOT-1;
1155          else
1156            DOUT << "Reusing SS#" << ReuseSlot;
1157          DOUT << " from physreg " << MRI->getName(PhysReg) << " for vreg"
1158               << VirtReg
1159               << " instead of reloading into same physreg.\n";
1160          unsigned RReg = SubIdx ? MRI->getSubReg(PhysReg, SubIdx) : PhysReg;
1161          MI.getOperand(i).setReg(RReg);
1162          ReusedOperands.markClobbered(RReg);
1163          ++NumReused;
1164          continue;
1165        }
1166
1167        const TargetRegisterClass* RC = RegMap->getRegClass(VirtReg);
1168        MF.setPhysRegUsed(DesignatedReg);
1169        ReusedOperands.markClobbered(DesignatedReg);
1170        MRI->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC, RC);
1171
1172        MachineInstr *CopyMI = prior(MII);
1173        UpdateKills(*CopyMI, RegKills, KillOps);
1174
1175        // This invalidates DesignatedReg.
1176        Spills.ClobberPhysReg(DesignatedReg);
1177
1178        Spills.addAvailable(ReuseSlot, &MI, DesignatedReg);
1179        unsigned RReg =
1180          SubIdx ? MRI->getSubReg(DesignatedReg, SubIdx) : DesignatedReg;
1181        MI.getOperand(i).setReg(RReg);
1182        DOUT << '\t' << *prior(MII);
1183        ++NumReused;
1184        continue;
1185      } // if (PhysReg)
1186
1187      // Otherwise, reload it and remember that we have it.
1188      PhysReg = VRM.getPhys(VirtReg);
1189      assert(PhysReg && "Must map virtreg to physreg!");
1190
1191      // Note that, if we reused a register for a previous operand, the
1192      // register we want to reload into might not actually be
1193      // available.  If this occurs, use the register indicated by the
1194      // reuser.
1195      if (ReusedOperands.hasReuses())
1196        PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
1197                               Spills, MaybeDeadStores, RegKills, KillOps, VRM);
1198
1199      MF.setPhysRegUsed(PhysReg);
1200      ReusedOperands.markClobbered(PhysReg);
1201      if (DoReMat) {
1202        MRI->reMaterialize(MBB, &MI, PhysReg, VRM.getReMaterializedMI(VirtReg));
1203        ++NumReMats;
1204      } else {
1205        const TargetRegisterClass* RC = RegMap->getRegClass(VirtReg);
1206        MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, SSorRMId, RC);
1207        ++NumLoads;
1208      }
1209      // This invalidates PhysReg.
1210      Spills.ClobberPhysReg(PhysReg);
1211
1212      // Any stores to this stack slot are not dead anymore.
1213      if (!DoReMat)
1214        MaybeDeadStores[SSorRMId] = NULL;
1215      Spills.addAvailable(SSorRMId, &MI, PhysReg);
1216      // Assumes this is the last use. IsKill will be unset if reg is reused
1217      // unless it's a two-address operand.
1218      if (TID->getOperandConstraint(i, TOI::TIED_TO) == -1)
1219        MI.getOperand(i).setIsKill();
1220      unsigned RReg = SubIdx ? MRI->getSubReg(PhysReg, SubIdx) : PhysReg;
1221      MI.getOperand(i).setReg(RReg);
1222      UpdateKills(*prior(MII), RegKills, KillOps);
1223      DOUT << '\t' << *prior(MII);
1224    }
1225
1226    DOUT << '\t' << MI;
1227
1228
1229    // If we have folded references to memory operands, make sure we clear all
1230    // physical registers that may contain the value of the spilled virtual
1231    // register
1232    SmallSet<int, 2> FoldedSS;
1233    for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) {
1234      unsigned VirtReg = I->second.first;
1235      VirtRegMap::ModRef MR = I->second.second;
1236      DOUT << "Folded vreg: " << VirtReg << "  MR: " << MR;
1237
1238      int SS = VRM.getStackSlot(VirtReg);
1239      if (SS == VirtRegMap::NO_STACK_SLOT)
1240        continue;
1241      FoldedSS.insert(SS);
1242      DOUT << " - StackSlot: " << SS << "\n";
1243
1244      // If this folded instruction is just a use, check to see if it's a
1245      // straight load from the virt reg slot.
1246      if ((MR & VirtRegMap::isRef) && !(MR & VirtRegMap::isMod)) {
1247        int FrameIdx;
1248        unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx);
1249        if (DestReg && FrameIdx == SS) {
1250          // If this spill slot is available, turn it into a copy (or nothing)
1251          // instead of leaving it as a load!
1252          if (unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SS)) {
1253            DOUT << "Promoted Load To Copy: " << MI;
1254            if (DestReg != InReg) {
1255              const TargetRegisterClass *RC = RegMap->getRegClass(VirtReg);
1256              MRI->copyRegToReg(MBB, &MI, DestReg, InReg, RC, RC);
1257              // Revisit the copy so we make sure to notice the effects of the
1258              // operation on the destreg (either needing to RA it if it's
1259              // virtual or needing to clobber any values if it's physical).
1260              NextMII = &MI;
1261              --NextMII;  // backtrack to the copy.
1262              BackTracked = true;
1263            } else
1264              DOUT << "Removing now-noop copy: " << MI;
1265
1266            VRM.RemoveMachineInstrFromMaps(&MI);
1267            MBB.erase(&MI);
1268            Erased = true;
1269            goto ProcessNextInst;
1270          }
1271        } else {
1272          unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SS);
1273          SmallVector<MachineInstr*, 4> NewMIs;
1274          if (PhysReg &&
1275              MRI->unfoldMemoryOperand(MF, &MI, PhysReg, false, false, NewMIs)) {
1276            MBB.insert(MII, NewMIs[0]);
1277            VRM.RemoveMachineInstrFromMaps(&MI);
1278            MBB.erase(&MI);
1279            Erased = true;
1280            --NextMII;  // backtrack to the unfolded instruction.
1281            BackTracked = true;
1282            goto ProcessNextInst;
1283          }
1284        }
1285      }
1286
1287      // If this reference is not a use, any previous store is now dead.
1288      // Otherwise, the store to this stack slot is not dead anymore.
1289      MachineInstr* DeadStore = MaybeDeadStores[SS];
1290      if (DeadStore) {
1291        bool isDead = !(MR & VirtRegMap::isRef);
1292        MachineInstr *NewStore = NULL;
1293        if (MR & VirtRegMap::isModRef) {
1294          unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SS);
1295          SmallVector<MachineInstr*, 4> NewMIs;
1296          // We can reuse this physreg as long as we are allowed to clobber
1297          // the value and there isn't an earlier def that has already clobbered the
1298          // physreg.
1299          if (PhysReg &&
1300              DeadStore->findRegisterUseOperandIdx(PhysReg, true) != -1 &&
1301              MRI->unfoldMemoryOperand(MF, &MI, PhysReg, false, true, NewMIs)) {
1302            MBB.insert(MII, NewMIs[0]);
1303            NewStore = NewMIs[1];
1304            MBB.insert(MII, NewStore);
1305            VRM.RemoveMachineInstrFromMaps(&MI);
1306            MBB.erase(&MI);
1307            Erased = true;
1308            --NextMII;
1309            --NextMII;  // backtrack to the unfolded instruction.
1310            BackTracked = true;
1311            isDead = true;
1312          }
1313        }
1314
1315        if (isDead) {  // Previous store is dead.
1316          // If we get here, the store is dead, nuke it now.
1317          DOUT << "Removed dead store:\t" << *DeadStore;
1318          InvalidateKills(*DeadStore, RegKills, KillOps);
1319          VRM.RemoveMachineInstrFromMaps(DeadStore);
1320          MBB.erase(DeadStore);
1321          if (!NewStore)
1322            ++NumDSE;
1323        }
1324
1325        MaybeDeadStores[SS] = NULL;
1326        if (NewStore) {
1327          // Treat this store as a spill merged into a copy. That makes the
1328          // stack slot value available.
1329          VRM.virtFolded(VirtReg, NewStore, VirtRegMap::isMod);
1330          goto ProcessNextInst;
1331        }
1332      }
1333
1334      // If the spill slot value is available, and this is a new definition of
1335      // the value, the value is not available anymore.
1336      if (MR & VirtRegMap::isMod) {
1337        // Notice that the value in this stack slot has been modified.
1338        Spills.ModifyStackSlotOrReMat(SS);
1339
1340        // If this is *just* a mod of the value, check to see if this is just a
1341        // store to the spill slot (i.e. the spill got merged into the copy). If
1342        // so, realize that the vreg is available now, and add the store to the
1343        // MaybeDeadStore info.
1344        int StackSlot;
1345        if (!(MR & VirtRegMap::isRef)) {
1346          if (unsigned SrcReg = TII->isStoreToStackSlot(&MI, StackSlot)) {
1347            assert(MRegisterInfo::isPhysicalRegister(SrcReg) &&
1348                   "Src hasn't been allocated yet?");
1349            // Okay, this is certainly a store of SrcReg to [StackSlot].  Mark
1350            // this as a potentially dead store in case there is a subsequent
1351            // store into the stack slot without a read from it.
1352            MaybeDeadStores[StackSlot] = &MI;
1353
1354            // If the stack slot value was previously available in some other
1355            // register, change it now.  Otherwise, make the register available,
1356            // in PhysReg.
1357            Spills.addAvailable(StackSlot, &MI, SrcReg, false/*don't clobber*/);
1358          }
1359        }
1360      }
1361    }
1362
1363    // Process all of the spilled defs.
1364    for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
1365      MachineOperand &MO = MI.getOperand(i);
1366      if (!(MO.isRegister() && MO.getReg() && MO.isDef()))
1367        continue;
1368
1369      unsigned VirtReg = MO.getReg();
1370      if (!MRegisterInfo::isVirtualRegister(VirtReg)) {
1371        // Check to see if this is a noop copy.  If so, eliminate the
1372        // instruction before considering the dest reg to be changed.
1373        unsigned Src, Dst;
1374        if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
1375          ++NumDCE;
1376          DOUT << "Removing now-noop copy: " << MI;
1377          MBB.erase(&MI);
1378          Erased = true;
1379          VRM.RemoveMachineInstrFromMaps(&MI);
1380          Spills.disallowClobberPhysReg(VirtReg);
1381          goto ProcessNextInst;
1382        }
1383
1384        // If it's not a no-op copy, it clobbers the value in the destreg.
1385        Spills.ClobberPhysReg(VirtReg);
1386        ReusedOperands.markClobbered(VirtReg);
1387
1388        // Check to see if this instruction is a load from a stack slot into
1389        // a register.  If so, this provides the stack slot value in the reg.
1390        int FrameIdx;
1391        if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) {
1392          assert(DestReg == VirtReg && "Unknown load situation!");
1393
1394          // If it is a folded reference, then it's not safe to clobber.
1395          bool Folded = FoldedSS.count(FrameIdx);
1396          // Otherwise, if it wasn't available, remember that it is now!
1397          Spills.addAvailable(FrameIdx, &MI, DestReg, !Folded);
1398          goto ProcessNextInst;
1399        }
1400
1401        continue;
1402      }
1403
1404      unsigned SubIdx = MO.getSubReg();
1405      bool DoReMat = VRM.isReMaterialized(VirtReg);
1406      if (DoReMat)
1407        ReMatDefs.insert(&MI);
1408
1409      // The only vregs left are stack slot definitions.
1410      int StackSlot = VRM.getStackSlot(VirtReg);
1411      const TargetRegisterClass *RC = RegMap->getRegClass(VirtReg);
1412
1413      // If this def is part of a two-address operand, make sure to execute
1414      // the store from the correct physical register.
1415      unsigned PhysReg;
1416      int TiedOp = MI.getInstrDescriptor()->findTiedToSrcOperand(i);
1417      if (TiedOp != -1) {
1418        PhysReg = MI.getOperand(TiedOp).getReg();
1419        if (SubIdx) {
1420          unsigned SuperReg = findSuperReg(RC, PhysReg, SubIdx, MRI);
1421          assert(SuperReg && MRI->getSubReg(SuperReg, SubIdx) == PhysReg &&
1422                 "Can't find corresponding super-register!");
1423          PhysReg = SuperReg;
1424        }
1425      } else {
1426        PhysReg = VRM.getPhys(VirtReg);
1427        if (ReusedOperands.isClobbered(PhysReg)) {
1428          // Another def has taken the assigned physreg. It must have been a
1429          // use&def which got it due to reuse. Undo the reuse!
1430          PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
1431                               Spills, MaybeDeadStores, RegKills, KillOps, VRM);
1432        }
1433      }
1434
1435      MF.setPhysRegUsed(PhysReg);
1436      unsigned RReg = SubIdx ? MRI->getSubReg(PhysReg, SubIdx) : PhysReg;
1437      ReusedOperands.markClobbered(RReg);
1438      MI.getOperand(i).setReg(RReg);
1439
1440      if (!MO.isDead()) {
1441        MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
1442        SpillRegToStackSlot(MBB, MII, -1, PhysReg, StackSlot, RC, true,
1443                          LastStore, Spills, ReMatDefs, RegKills, KillOps, VRM);
1444        NextMII = next(MII);
1445
1446        // Check to see if this is a noop copy.  If so, eliminate the
1447        // instruction before considering the dest reg to be changed.
1448        {
1449          unsigned Src, Dst;
1450          if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
1451            ++NumDCE;
1452            DOUT << "Removing now-noop copy: " << MI;
1453            MBB.erase(&MI);
1454            Erased = true;
1455            VRM.RemoveMachineInstrFromMaps(&MI);
1456            UpdateKills(*LastStore, RegKills, KillOps);
1457            goto ProcessNextInst;
1458          }
1459        }
1460      }
1461    }
1462  ProcessNextInst:
1463    if (!Erased && !BackTracked) {
1464      for (MachineBasicBlock::iterator II = MI; II != NextMII; ++II)
1465        UpdateKills(*II, RegKills, KillOps);
1466    }
1467    MII = NextMII;
1468  }
1469}
1470
1471llvm::Spiller* llvm::createSpiller() {
1472  switch (SpillerOpt) {
1473  default: assert(0 && "Unreachable!");
1474  case local:
1475    return new LocalSpiller();
1476  case simple:
1477    return new SimpleSpiller();
1478  }
1479}
1480