VirtRegMap.cpp revision e6ae14e1f413987f3de31a7cad1b20a7893f8cae
1//===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements the VirtRegMap class. 11// 12// It also contains implementations of the the Spiller interface, which, given a 13// virtual register map and a machine function, eliminates all virtual 14// references by replacing them with physical register references - adding spill 15// code as necessary. 16// 17//===----------------------------------------------------------------------===// 18 19#define DEBUG_TYPE "spiller" 20#include "VirtRegMap.h" 21#include "llvm/Function.h" 22#include "llvm/CodeGen/MachineFrameInfo.h" 23#include "llvm/CodeGen/MachineFunction.h" 24#include "llvm/CodeGen/SSARegMap.h" 25#include "llvm/Target/TargetMachine.h" 26#include "llvm/Target/TargetInstrInfo.h" 27#include "llvm/Support/CommandLine.h" 28#include "llvm/Support/Debug.h" 29#include "llvm/Support/Compiler.h" 30#include "llvm/ADT/Statistic.h" 31#include "llvm/ADT/STLExtras.h" 32#include <algorithm> 33#include <iostream> 34using namespace llvm; 35 36namespace { 37 static Statistic<> NumSpills("spiller", "Number of register spills"); 38 static Statistic<> NumStores("spiller", "Number of stores added"); 39 static Statistic<> NumLoads ("spiller", "Number of loads added"); 40 static Statistic<> NumReused("spiller", "Number of values reused"); 41 static Statistic<> NumDSE ("spiller", "Number of dead stores elided"); 42 static Statistic<> NumDCE ("spiller", "Number of copies elided"); 43 44 enum SpillerName { simple, local }; 45 46 static cl::opt<SpillerName> 47 SpillerOpt("spiller", 48 cl::desc("Spiller to use: (default: local)"), 49 cl::Prefix, 50 cl::values(clEnumVal(simple, " simple spiller"), 51 clEnumVal(local, " local spiller"), 52 clEnumValEnd), 53 cl::init(local)); 54} 55 56//===----------------------------------------------------------------------===// 57// VirtRegMap implementation 58//===----------------------------------------------------------------------===// 59 60VirtRegMap::VirtRegMap(MachineFunction &mf) 61 : TII(*mf.getTarget().getInstrInfo()), MF(mf), 62 Virt2PhysMap(NO_PHYS_REG), Virt2StackSlotMap(NO_STACK_SLOT) { 63 grow(); 64} 65 66void VirtRegMap::grow() { 67 Virt2PhysMap.grow(MF.getSSARegMap()->getLastVirtReg()); 68 Virt2StackSlotMap.grow(MF.getSSARegMap()->getLastVirtReg()); 69} 70 71int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { 72 assert(MRegisterInfo::isVirtualRegister(virtReg)); 73 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && 74 "attempt to assign stack slot to already spilled register"); 75 const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg); 76 int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(), 77 RC->getAlignment()); 78 Virt2StackSlotMap[virtReg] = frameIndex; 79 ++NumSpills; 80 return frameIndex; 81} 82 83void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) { 84 assert(MRegisterInfo::isVirtualRegister(virtReg)); 85 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && 86 "attempt to assign stack slot to already spilled register"); 87 Virt2StackSlotMap[virtReg] = frameIndex; 88} 89 90void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI, 91 unsigned OpNo, MachineInstr *NewMI) { 92 // Move previous memory references folded to new instruction. 93 MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI); 94 for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI), 95 E = MI2VirtMap.end(); I != E && I->first == OldMI; ) { 96 MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second)); 97 MI2VirtMap.erase(I++); 98 } 99 100 ModRef MRInfo; 101 if (TII.getOperandConstraint(OldMI->getOpcode(), OpNo, 102 TargetInstrInfo::TIED_TO)) { 103 // Folded a two-address operand. 104 MRInfo = isModRef; 105 } else if (OldMI->getOperand(OpNo).isDef()) { 106 MRInfo = isMod; 107 } else { 108 MRInfo = isRef; 109 } 110 111 // add new memory reference 112 MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo))); 113} 114 115void VirtRegMap::print(std::ostream &OS) const { 116 const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo(); 117 118 OS << "********** REGISTER MAP **********\n"; 119 for (unsigned i = MRegisterInfo::FirstVirtualRegister, 120 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) { 121 if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG) 122 OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n"; 123 124 } 125 126 for (unsigned i = MRegisterInfo::FirstVirtualRegister, 127 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) 128 if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT) 129 OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n"; 130 OS << '\n'; 131} 132 133void VirtRegMap::dump() const { print(std::cerr); } 134 135 136//===----------------------------------------------------------------------===// 137// Simple Spiller Implementation 138//===----------------------------------------------------------------------===// 139 140Spiller::~Spiller() {} 141 142namespace { 143 struct VISIBILITY_HIDDEN SimpleSpiller : public Spiller { 144 bool runOnMachineFunction(MachineFunction& mf, VirtRegMap &VRM); 145 }; 146} 147 148bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) { 149 DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n"); 150 DEBUG(std::cerr << "********** Function: " 151 << MF.getFunction()->getName() << '\n'); 152 const TargetMachine &TM = MF.getTarget(); 153 const MRegisterInfo &MRI = *TM.getRegisterInfo(); 154 bool *PhysRegsUsed = MF.getUsedPhysregs(); 155 156 // LoadedRegs - Keep track of which vregs are loaded, so that we only load 157 // each vreg once (in the case where a spilled vreg is used by multiple 158 // operands). This is always smaller than the number of operands to the 159 // current machine instr, so it should be small. 160 std::vector<unsigned> LoadedRegs; 161 162 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end(); 163 MBBI != E; ++MBBI) { 164 DEBUG(std::cerr << MBBI->getBasicBlock()->getName() << ":\n"); 165 MachineBasicBlock &MBB = *MBBI; 166 for (MachineBasicBlock::iterator MII = MBB.begin(), 167 E = MBB.end(); MII != E; ++MII) { 168 MachineInstr &MI = *MII; 169 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 170 MachineOperand &MO = MI.getOperand(i); 171 if (MO.isRegister() && MO.getReg()) 172 if (MRegisterInfo::isVirtualRegister(MO.getReg())) { 173 unsigned VirtReg = MO.getReg(); 174 unsigned PhysReg = VRM.getPhys(VirtReg); 175 if (VRM.hasStackSlot(VirtReg)) { 176 int StackSlot = VRM.getStackSlot(VirtReg); 177 const TargetRegisterClass* RC = 178 MF.getSSARegMap()->getRegClass(VirtReg); 179 180 if (MO.isUse() && 181 std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg) 182 == LoadedRegs.end()) { 183 MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC); 184 LoadedRegs.push_back(VirtReg); 185 ++NumLoads; 186 DEBUG(std::cerr << '\t' << *prior(MII)); 187 } 188 189 if (MO.isDef()) { 190 MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC); 191 ++NumStores; 192 } 193 } 194 PhysRegsUsed[PhysReg] = true; 195 MI.getOperand(i).setReg(PhysReg); 196 } else { 197 PhysRegsUsed[MO.getReg()] = true; 198 } 199 } 200 201 DEBUG(std::cerr << '\t' << MI); 202 LoadedRegs.clear(); 203 } 204 } 205 return true; 206} 207 208//===----------------------------------------------------------------------===// 209// Local Spiller Implementation 210//===----------------------------------------------------------------------===// 211 212namespace { 213 /// LocalSpiller - This spiller does a simple pass over the machine basic 214 /// block to attempt to keep spills in registers as much as possible for 215 /// blocks that have low register pressure (the vreg may be spilled due to 216 /// register pressure in other blocks). 217 class VISIBILITY_HIDDEN LocalSpiller : public Spiller { 218 const MRegisterInfo *MRI; 219 const TargetInstrInfo *TII; 220 public: 221 bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) { 222 MRI = MF.getTarget().getRegisterInfo(); 223 TII = MF.getTarget().getInstrInfo(); 224 DEBUG(std::cerr << "\n**** Local spiller rewriting function '" 225 << MF.getFunction()->getName() << "':\n"); 226 227 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end(); 228 MBB != E; ++MBB) 229 RewriteMBB(*MBB, VRM); 230 return true; 231 } 232 private: 233 void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM); 234 void ClobberPhysReg(unsigned PR, std::map<int, unsigned> &SpillSlots, 235 std::multimap<unsigned, int> &PhysRegs); 236 void ClobberPhysRegOnly(unsigned PR, std::map<int, unsigned> &SpillSlots, 237 std::multimap<unsigned, int> &PhysRegs); 238 void ModifyStackSlot(int Slot, std::map<int, unsigned> &SpillSlots, 239 std::multimap<unsigned, int> &PhysRegs); 240 }; 241} 242 243/// AvailableSpills - As the local spiller is scanning and rewriting an MBB from 244/// top down, keep track of which spills slots are available in each register. 245/// 246/// Note that not all physregs are created equal here. In particular, some 247/// physregs are reloads that we are allowed to clobber or ignore at any time. 248/// Other physregs are values that the register allocated program is using that 249/// we cannot CHANGE, but we can read if we like. We keep track of this on a 250/// per-stack-slot basis as the low bit in the value of the SpillSlotsAvailable 251/// entries. The predicate 'canClobberPhysReg()' checks this bit and 252/// addAvailable sets it if. 253namespace { 254class VISIBILITY_HIDDEN AvailableSpills { 255 const MRegisterInfo *MRI; 256 const TargetInstrInfo *TII; 257 258 // SpillSlotsAvailable - This map keeps track of all of the spilled virtual 259 // register values that are still available, due to being loaded or stored to, 260 // but not invalidated yet. 261 std::map<int, unsigned> SpillSlotsAvailable; 262 263 // PhysRegsAvailable - This is the inverse of SpillSlotsAvailable, indicating 264 // which stack slot values are currently held by a physreg. This is used to 265 // invalidate entries in SpillSlotsAvailable when a physreg is modified. 266 std::multimap<unsigned, int> PhysRegsAvailable; 267 268 void ClobberPhysRegOnly(unsigned PhysReg); 269public: 270 AvailableSpills(const MRegisterInfo *mri, const TargetInstrInfo *tii) 271 : MRI(mri), TII(tii) { 272 } 273 274 /// getSpillSlotPhysReg - If the specified stack slot is available in a 275 /// physical register, return that PhysReg, otherwise return 0. 276 unsigned getSpillSlotPhysReg(int Slot) const { 277 std::map<int, unsigned>::const_iterator I = SpillSlotsAvailable.find(Slot); 278 if (I != SpillSlotsAvailable.end()) 279 return I->second >> 1; // Remove the CanClobber bit. 280 return 0; 281 } 282 283 const MRegisterInfo *getRegInfo() const { return MRI; } 284 285 /// addAvailable - Mark that the specified stack slot is available in the 286 /// specified physreg. If CanClobber is true, the physreg can be modified at 287 /// any time without changing the semantics of the program. 288 void addAvailable(int Slot, unsigned Reg, bool CanClobber = true) { 289 // If this stack slot is thought to be available in some other physreg, 290 // remove its record. 291 ModifyStackSlot(Slot); 292 293 PhysRegsAvailable.insert(std::make_pair(Reg, Slot)); 294 SpillSlotsAvailable[Slot] = (Reg << 1) | (unsigned)CanClobber; 295 296 DEBUG(std::cerr << "Remembering SS#" << Slot << " in physreg " 297 << MRI->getName(Reg) << "\n"); 298 } 299 300 /// canClobberPhysReg - Return true if the spiller is allowed to change the 301 /// value of the specified stackslot register if it desires. The specified 302 /// stack slot must be available in a physreg for this query to make sense. 303 bool canClobberPhysReg(int Slot) const { 304 assert(SpillSlotsAvailable.count(Slot) && "Slot not available!"); 305 return SpillSlotsAvailable.find(Slot)->second & 1; 306 } 307 308 /// ClobberPhysReg - This is called when the specified physreg changes 309 /// value. We use this to invalidate any info about stuff we thing lives in 310 /// it and any of its aliases. 311 void ClobberPhysReg(unsigned PhysReg); 312 313 /// ModifyStackSlot - This method is called when the value in a stack slot 314 /// changes. This removes information about which register the previous value 315 /// for this slot lives in (as the previous value is dead now). 316 void ModifyStackSlot(int Slot); 317}; 318} 319 320/// ClobberPhysRegOnly - This is called when the specified physreg changes 321/// value. We use this to invalidate any info about stuff we thing lives in it. 322void AvailableSpills::ClobberPhysRegOnly(unsigned PhysReg) { 323 std::multimap<unsigned, int>::iterator I = 324 PhysRegsAvailable.lower_bound(PhysReg); 325 while (I != PhysRegsAvailable.end() && I->first == PhysReg) { 326 int Slot = I->second; 327 PhysRegsAvailable.erase(I++); 328 assert((SpillSlotsAvailable[Slot] >> 1) == PhysReg && 329 "Bidirectional map mismatch!"); 330 SpillSlotsAvailable.erase(Slot); 331 DEBUG(std::cerr << "PhysReg " << MRI->getName(PhysReg) 332 << " clobbered, invalidating SS#" << Slot << "\n"); 333 } 334} 335 336/// ClobberPhysReg - This is called when the specified physreg changes 337/// value. We use this to invalidate any info about stuff we thing lives in 338/// it and any of its aliases. 339void AvailableSpills::ClobberPhysReg(unsigned PhysReg) { 340 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS) 341 ClobberPhysRegOnly(*AS); 342 ClobberPhysRegOnly(PhysReg); 343} 344 345/// ModifyStackSlot - This method is called when the value in a stack slot 346/// changes. This removes information about which register the previous value 347/// for this slot lives in (as the previous value is dead now). 348void AvailableSpills::ModifyStackSlot(int Slot) { 349 std::map<int, unsigned>::iterator It = SpillSlotsAvailable.find(Slot); 350 if (It == SpillSlotsAvailable.end()) return; 351 unsigned Reg = It->second >> 1; 352 SpillSlotsAvailable.erase(It); 353 354 // This register may hold the value of multiple stack slots, only remove this 355 // stack slot from the set of values the register contains. 356 std::multimap<unsigned, int>::iterator I = PhysRegsAvailable.lower_bound(Reg); 357 for (; ; ++I) { 358 assert(I != PhysRegsAvailable.end() && I->first == Reg && 359 "Map inverse broken!"); 360 if (I->second == Slot) break; 361 } 362 PhysRegsAvailable.erase(I); 363} 364 365 366 367// ReusedOp - For each reused operand, we keep track of a bit of information, in 368// case we need to rollback upon processing a new operand. See comments below. 369namespace { 370 struct ReusedOp { 371 // The MachineInstr operand that reused an available value. 372 unsigned Operand; 373 374 // StackSlot - The spill slot of the value being reused. 375 unsigned StackSlot; 376 377 // PhysRegReused - The physical register the value was available in. 378 unsigned PhysRegReused; 379 380 // AssignedPhysReg - The physreg that was assigned for use by the reload. 381 unsigned AssignedPhysReg; 382 383 // VirtReg - The virtual register itself. 384 unsigned VirtReg; 385 386 ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr, 387 unsigned vreg) 388 : Operand(o), StackSlot(ss), PhysRegReused(prr), AssignedPhysReg(apr), 389 VirtReg(vreg) {} 390 }; 391 392 /// ReuseInfo - This maintains a collection of ReuseOp's for each operand that 393 /// is reused instead of reloaded. 394 class VISIBILITY_HIDDEN ReuseInfo { 395 MachineInstr &MI; 396 std::vector<ReusedOp> Reuses; 397 public: 398 ReuseInfo(MachineInstr &mi) : MI(mi) {} 399 400 bool hasReuses() const { 401 return !Reuses.empty(); 402 } 403 404 /// addReuse - If we choose to reuse a virtual register that is already 405 /// available instead of reloading it, remember that we did so. 406 void addReuse(unsigned OpNo, unsigned StackSlot, 407 unsigned PhysRegReused, unsigned AssignedPhysReg, 408 unsigned VirtReg) { 409 // If the reload is to the assigned register anyway, no undo will be 410 // required. 411 if (PhysRegReused == AssignedPhysReg) return; 412 413 // Otherwise, remember this. 414 Reuses.push_back(ReusedOp(OpNo, StackSlot, PhysRegReused, 415 AssignedPhysReg, VirtReg)); 416 } 417 418 /// GetRegForReload - We are about to emit a reload into PhysReg. If there 419 /// is some other operand that is using the specified register, either pick 420 /// a new register to use, or evict the previous reload and use this reg. 421 unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI, 422 AvailableSpills &Spills, 423 std::map<int, MachineInstr*> &MaybeDeadStores) { 424 if (Reuses.empty()) return PhysReg; // This is most often empty. 425 426 for (unsigned ro = 0, e = Reuses.size(); ro != e; ++ro) { 427 ReusedOp &Op = Reuses[ro]; 428 // If we find some other reuse that was supposed to use this register 429 // exactly for its reload, we can change this reload to use ITS reload 430 // register. 431 if (Op.PhysRegReused == PhysReg) { 432 // Yup, use the reload register that we didn't use before. 433 unsigned NewReg = Op.AssignedPhysReg; 434 435 // Remove the record for the previous reuse. We know it can never be 436 // invalidated now. 437 Reuses.erase(Reuses.begin()+ro); 438 return GetRegForReload(NewReg, MI, Spills, MaybeDeadStores); 439 } else { 440 // Otherwise, we might also have a problem if a previously reused 441 // value aliases the new register. If so, codegen the previous reload 442 // and use this one. 443 unsigned PRRU = Op.PhysRegReused; 444 const MRegisterInfo *MRI = Spills.getRegInfo(); 445 if (MRI->areAliases(PRRU, PhysReg)) { 446 // Okay, we found out that an alias of a reused register 447 // was used. This isn't good because it means we have 448 // to undo a previous reuse. 449 MachineBasicBlock *MBB = MI->getParent(); 450 const TargetRegisterClass *AliasRC = 451 MBB->getParent()->getSSARegMap()->getRegClass(Op.VirtReg); 452 453 // Copy Op out of the vector and remove it, we're going to insert an 454 // explicit load for it. 455 ReusedOp NewOp = Op; 456 Reuses.erase(Reuses.begin()+ro); 457 458 // Ok, we're going to try to reload the assigned physreg into the 459 // slot that we were supposed to in the first place. However, that 460 // register could hold a reuse. Check to see if it conflicts or 461 // would prefer us to use a different register. 462 unsigned NewPhysReg = GetRegForReload(NewOp.AssignedPhysReg, 463 MI, Spills, MaybeDeadStores); 464 465 MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg, 466 NewOp.StackSlot, AliasRC); 467 Spills.ClobberPhysReg(NewPhysReg); 468 Spills.ClobberPhysReg(NewOp.PhysRegReused); 469 470 // Any stores to this stack slot are not dead anymore. 471 MaybeDeadStores.erase(NewOp.StackSlot); 472 473 MI->getOperand(NewOp.Operand).setReg(NewPhysReg); 474 475 Spills.addAvailable(NewOp.StackSlot, NewPhysReg); 476 ++NumLoads; 477 DEBUG(MachineBasicBlock::iterator MII = MI; 478 std::cerr << '\t' << *prior(MII)); 479 480 DEBUG(std::cerr << "Reuse undone!\n"); 481 --NumReused; 482 483 // Finally, PhysReg is now available, go ahead and use it. 484 return PhysReg; 485 } 486 } 487 } 488 return PhysReg; 489 } 490 }; 491} 492 493 494/// rewriteMBB - Keep track of which spills are available even after the 495/// register allocator is done with them. If possible, avoid reloading vregs. 496void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) { 497 498 DEBUG(std::cerr << MBB.getBasicBlock()->getName() << ":\n"); 499 500 // Spills - Keep track of which spilled values are available in physregs so 501 // that we can choose to reuse the physregs instead of emitting reloads. 502 AvailableSpills Spills(MRI, TII); 503 504 // MaybeDeadStores - When we need to write a value back into a stack slot, 505 // keep track of the inserted store. If the stack slot value is never read 506 // (because the value was used from some available register, for example), and 507 // subsequently stored to, the original store is dead. This map keeps track 508 // of inserted stores that are not used. If we see a subsequent store to the 509 // same stack slot, the original store is deleted. 510 std::map<int, MachineInstr*> MaybeDeadStores; 511 512 bool *PhysRegsUsed = MBB.getParent()->getUsedPhysregs(); 513 514 for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end(); 515 MII != E; ) { 516 MachineInstr &MI = *MII; 517 MachineBasicBlock::iterator NextMII = MII; ++NextMII; 518 519 /// ReusedOperands - Keep track of operand reuse in case we need to undo 520 /// reuse. 521 ReuseInfo ReusedOperands(MI); 522 523 // Process all of the spilled uses and all non spilled reg references. 524 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 525 MachineOperand &MO = MI.getOperand(i); 526 if (!MO.isRegister() || MO.getReg() == 0) 527 continue; // Ignore non-register operands. 528 529 if (MRegisterInfo::isPhysicalRegister(MO.getReg())) { 530 // Ignore physregs for spilling, but remember that it is used by this 531 // function. 532 PhysRegsUsed[MO.getReg()] = true; 533 continue; 534 } 535 536 assert(MRegisterInfo::isVirtualRegister(MO.getReg()) && 537 "Not a virtual or a physical register?"); 538 539 unsigned VirtReg = MO.getReg(); 540 if (!VRM.hasStackSlot(VirtReg)) { 541 // This virtual register was assigned a physreg! 542 unsigned Phys = VRM.getPhys(VirtReg); 543 PhysRegsUsed[Phys] = true; 544 MI.getOperand(i).setReg(Phys); 545 continue; 546 } 547 548 // This virtual register is now known to be a spilled value. 549 if (!MO.isUse()) 550 continue; // Handle defs in the loop below (handle use&def here though) 551 552 int StackSlot = VRM.getStackSlot(VirtReg); 553 unsigned PhysReg; 554 555 // Check to see if this stack slot is available. 556 if ((PhysReg = Spills.getSpillSlotPhysReg(StackSlot))) { 557 558 // This spilled operand might be part of a two-address operand. If this 559 // is the case, then changing it will necessarily require changing the 560 // def part of the instruction as well. However, in some cases, we 561 // aren't allowed to modify the reused register. If none of these cases 562 // apply, reuse it. 563 bool CanReuse = true; 564 int ti = TII->getOperandConstraint(MI.getOpcode(), i, 565 TargetInstrInfo::TIED_TO); 566 if (ti != -1 && 567 MI.getOperand(ti).isReg() && 568 MI.getOperand(ti).getReg() == VirtReg) { 569 // Okay, we have a two address operand. We can reuse this physreg as 570 // long as we are allowed to clobber the value. 571 CanReuse = Spills.canClobberPhysReg(StackSlot); 572 } 573 574 if (CanReuse) { 575 // If this stack slot value is already available, reuse it! 576 DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg " 577 << MRI->getName(PhysReg) << " for vreg" 578 << VirtReg <<" instead of reloading into physreg " 579 << MRI->getName(VRM.getPhys(VirtReg)) << "\n"); 580 MI.getOperand(i).setReg(PhysReg); 581 582 // The only technical detail we have is that we don't know that 583 // PhysReg won't be clobbered by a reloaded stack slot that occurs 584 // later in the instruction. In particular, consider 'op V1, V2'. 585 // If V1 is available in physreg R0, we would choose to reuse it 586 // here, instead of reloading it into the register the allocator 587 // indicated (say R1). However, V2 might have to be reloaded 588 // later, and it might indicate that it needs to live in R0. When 589 // this occurs, we need to have information available that 590 // indicates it is safe to use R1 for the reload instead of R0. 591 // 592 // To further complicate matters, we might conflict with an alias, 593 // or R0 and R1 might not be compatible with each other. In this 594 // case, we actually insert a reload for V1 in R1, ensuring that 595 // we can get at R0 or its alias. 596 ReusedOperands.addReuse(i, StackSlot, PhysReg, 597 VRM.getPhys(VirtReg), VirtReg); 598 ++NumReused; 599 continue; 600 } 601 602 // Otherwise we have a situation where we have a two-address instruction 603 // whose mod/ref operand needs to be reloaded. This reload is already 604 // available in some register "PhysReg", but if we used PhysReg as the 605 // operand to our 2-addr instruction, the instruction would modify 606 // PhysReg. This isn't cool if something later uses PhysReg and expects 607 // to get its initial value. 608 // 609 // To avoid this problem, and to avoid doing a load right after a store, 610 // we emit a copy from PhysReg into the designated register for this 611 // operand. 612 unsigned DesignatedReg = VRM.getPhys(VirtReg); 613 assert(DesignatedReg && "Must map virtreg to physreg!"); 614 615 // Note that, if we reused a register for a previous operand, the 616 // register we want to reload into might not actually be 617 // available. If this occurs, use the register indicated by the 618 // reuser. 619 if (ReusedOperands.hasReuses()) 620 DesignatedReg = ReusedOperands.GetRegForReload(DesignatedReg, &MI, 621 Spills, MaybeDeadStores); 622 623 // If the mapped designated register is actually the physreg we have 624 // incoming, we don't need to inserted a dead copy. 625 if (DesignatedReg == PhysReg) { 626 // If this stack slot value is already available, reuse it! 627 DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg " 628 << MRI->getName(PhysReg) << " for vreg" 629 << VirtReg 630 << " instead of reloading into same physreg.\n"); 631 MI.getOperand(i).setReg(PhysReg); 632 ++NumReused; 633 continue; 634 } 635 636 const TargetRegisterClass* RC = 637 MBB.getParent()->getSSARegMap()->getRegClass(VirtReg); 638 639 PhysRegsUsed[DesignatedReg] = true; 640 MRI->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC); 641 642 // This invalidates DesignatedReg. 643 Spills.ClobberPhysReg(DesignatedReg); 644 645 Spills.addAvailable(StackSlot, DesignatedReg); 646 MI.getOperand(i).setReg(DesignatedReg); 647 DEBUG(std::cerr << '\t' << *prior(MII)); 648 ++NumReused; 649 continue; 650 } 651 652 // Otherwise, reload it and remember that we have it. 653 PhysReg = VRM.getPhys(VirtReg); 654 assert(PhysReg && "Must map virtreg to physreg!"); 655 const TargetRegisterClass* RC = 656 MBB.getParent()->getSSARegMap()->getRegClass(VirtReg); 657 658 // Note that, if we reused a register for a previous operand, the 659 // register we want to reload into might not actually be 660 // available. If this occurs, use the register indicated by the 661 // reuser. 662 if (ReusedOperands.hasReuses()) 663 PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI, 664 Spills, MaybeDeadStores); 665 666 PhysRegsUsed[PhysReg] = true; 667 MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC); 668 // This invalidates PhysReg. 669 Spills.ClobberPhysReg(PhysReg); 670 671 // Any stores to this stack slot are not dead anymore. 672 MaybeDeadStores.erase(StackSlot); 673 Spills.addAvailable(StackSlot, PhysReg); 674 ++NumLoads; 675 MI.getOperand(i).setReg(PhysReg); 676 DEBUG(std::cerr << '\t' << *prior(MII)); 677 } 678 679 // Loop over all of the implicit defs, clearing them from our available 680 // sets. 681 const unsigned *ImpDef = TII->getImplicitDefs(MI.getOpcode()); 682 if (ImpDef) { 683 for ( ; *ImpDef; ++ImpDef) { 684 PhysRegsUsed[*ImpDef] = true; 685 Spills.ClobberPhysReg(*ImpDef); 686 } 687 } 688 689 DEBUG(std::cerr << '\t' << MI); 690 691 // If we have folded references to memory operands, make sure we clear all 692 // physical registers that may contain the value of the spilled virtual 693 // register 694 VirtRegMap::MI2VirtMapTy::const_iterator I, End; 695 for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) { 696 DEBUG(std::cerr << "Folded vreg: " << I->second.first << " MR: " 697 << I->second.second); 698 unsigned VirtReg = I->second.first; 699 VirtRegMap::ModRef MR = I->second.second; 700 if (!VRM.hasStackSlot(VirtReg)) { 701 DEBUG(std::cerr << ": No stack slot!\n"); 702 continue; 703 } 704 int SS = VRM.getStackSlot(VirtReg); 705 DEBUG(std::cerr << " - StackSlot: " << SS << "\n"); 706 707 // If this folded instruction is just a use, check to see if it's a 708 // straight load from the virt reg slot. 709 if ((MR & VirtRegMap::isRef) && !(MR & VirtRegMap::isMod)) { 710 int FrameIdx; 711 if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) { 712 if (FrameIdx == SS) { 713 // If this spill slot is available, turn it into a copy (or nothing) 714 // instead of leaving it as a load! 715 if (unsigned InReg = Spills.getSpillSlotPhysReg(SS)) { 716 DEBUG(std::cerr << "Promoted Load To Copy: " << MI); 717 MachineFunction &MF = *MBB.getParent(); 718 if (DestReg != InReg) { 719 MRI->copyRegToReg(MBB, &MI, DestReg, InReg, 720 MF.getSSARegMap()->getRegClass(VirtReg)); 721 // Revisit the copy so we make sure to notice the effects of the 722 // operation on the destreg (either needing to RA it if it's 723 // virtual or needing to clobber any values if it's physical). 724 NextMII = &MI; 725 --NextMII; // backtrack to the copy. 726 } 727 VRM.RemoveFromFoldedVirtMap(&MI); 728 MBB.erase(&MI); 729 goto ProcessNextInst; 730 } 731 } 732 } 733 } 734 735 // If this reference is not a use, any previous store is now dead. 736 // Otherwise, the store to this stack slot is not dead anymore. 737 std::map<int, MachineInstr*>::iterator MDSI = MaybeDeadStores.find(SS); 738 if (MDSI != MaybeDeadStores.end()) { 739 if (MR & VirtRegMap::isRef) // Previous store is not dead. 740 MaybeDeadStores.erase(MDSI); 741 else { 742 // If we get here, the store is dead, nuke it now. 743 assert(VirtRegMap::isMod && "Can't be modref!"); 744 DEBUG(std::cerr << "Removed dead store:\t" << *MDSI->second); 745 MBB.erase(MDSI->second); 746 VRM.RemoveFromFoldedVirtMap(MDSI->second); 747 MaybeDeadStores.erase(MDSI); 748 ++NumDSE; 749 } 750 } 751 752 // If the spill slot value is available, and this is a new definition of 753 // the value, the value is not available anymore. 754 if (MR & VirtRegMap::isMod) { 755 // Notice that the value in this stack slot has been modified. 756 Spills.ModifyStackSlot(SS); 757 758 // If this is *just* a mod of the value, check to see if this is just a 759 // store to the spill slot (i.e. the spill got merged into the copy). If 760 // so, realize that the vreg is available now, and add the store to the 761 // MaybeDeadStore info. 762 int StackSlot; 763 if (!(MR & VirtRegMap::isRef)) { 764 if (unsigned SrcReg = TII->isStoreToStackSlot(&MI, StackSlot)) { 765 assert(MRegisterInfo::isPhysicalRegister(SrcReg) && 766 "Src hasn't been allocated yet?"); 767 // Okay, this is certainly a store of SrcReg to [StackSlot]. Mark 768 // this as a potentially dead store in case there is a subsequent 769 // store into the stack slot without a read from it. 770 MaybeDeadStores[StackSlot] = &MI; 771 772 // If the stack slot value was previously available in some other 773 // register, change it now. Otherwise, make the register available, 774 // in PhysReg. 775 Spills.addAvailable(StackSlot, SrcReg, false /*don't clobber*/); 776 } 777 } 778 } 779 } 780 781 // Process all of the spilled defs. 782 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 783 MachineOperand &MO = MI.getOperand(i); 784 if (MO.isRegister() && MO.getReg() && MO.isDef()) { 785 unsigned VirtReg = MO.getReg(); 786 787 if (!MRegisterInfo::isVirtualRegister(VirtReg)) { 788 // Check to see if this is a noop copy. If so, eliminate the 789 // instruction before considering the dest reg to be changed. 790 unsigned Src, Dst; 791 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) { 792 ++NumDCE; 793 DEBUG(std::cerr << "Removing now-noop copy: " << MI); 794 MBB.erase(&MI); 795 VRM.RemoveFromFoldedVirtMap(&MI); 796 goto ProcessNextInst; 797 } 798 799 // If it's not a no-op copy, it clobbers the value in the destreg. 800 Spills.ClobberPhysReg(VirtReg); 801 802 // Check to see if this instruction is a load from a stack slot into 803 // a register. If so, this provides the stack slot value in the reg. 804 int FrameIdx; 805 if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) { 806 assert(DestReg == VirtReg && "Unknown load situation!"); 807 808 // Otherwise, if it wasn't available, remember that it is now! 809 Spills.addAvailable(FrameIdx, DestReg); 810 goto ProcessNextInst; 811 } 812 813 continue; 814 } 815 816 // The only vregs left are stack slot definitions. 817 int StackSlot = VRM.getStackSlot(VirtReg); 818 const TargetRegisterClass *RC = 819 MBB.getParent()->getSSARegMap()->getRegClass(VirtReg); 820 821 // If this def is part of a two-address operand, make sure to execute 822 // the store from the correct physical register. 823 unsigned PhysReg; 824 int TiedOp = TII->findTiedToSrcOperand(MI.getOpcode(), i); 825 if (TiedOp != -1) 826 PhysReg = MI.getOperand(TiedOp).getReg(); 827 else 828 PhysReg = VRM.getPhys(VirtReg); 829 830 PhysRegsUsed[PhysReg] = true; 831 MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC); 832 DEBUG(std::cerr << "Store:\t" << *next(MII)); 833 MI.getOperand(i).setReg(PhysReg); 834 835 // Check to see if this is a noop copy. If so, eliminate the 836 // instruction before considering the dest reg to be changed. 837 { 838 unsigned Src, Dst; 839 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) { 840 ++NumDCE; 841 DEBUG(std::cerr << "Removing now-noop copy: " << MI); 842 MBB.erase(&MI); 843 VRM.RemoveFromFoldedVirtMap(&MI); 844 goto ProcessNextInst; 845 } 846 } 847 848 // If there is a dead store to this stack slot, nuke it now. 849 MachineInstr *&LastStore = MaybeDeadStores[StackSlot]; 850 if (LastStore) { 851 DEBUG(std::cerr << "Removed dead store:\t" << *LastStore); 852 ++NumDSE; 853 MBB.erase(LastStore); 854 VRM.RemoveFromFoldedVirtMap(LastStore); 855 } 856 LastStore = next(MII); 857 858 // If the stack slot value was previously available in some other 859 // register, change it now. Otherwise, make the register available, 860 // in PhysReg. 861 Spills.ModifyStackSlot(StackSlot); 862 Spills.ClobberPhysReg(PhysReg); 863 Spills.addAvailable(StackSlot, PhysReg); 864 ++NumStores; 865 } 866 } 867 ProcessNextInst: 868 MII = NextMII; 869 } 870} 871 872 873 874llvm::Spiller* llvm::createSpiller() { 875 switch (SpillerOpt) { 876 default: assert(0 && "Unreachable!"); 877 case local: 878 return new LocalSpiller(); 879 case simple: 880 return new SimpleSpiller(); 881 } 882} 883