Thumb1InstrInfo.h revision 600f171486708734e2b9c9c617528cfc51c16850 
1//===- Thumb1InstrInfo.h - Thumb-1 Instruction Information ------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the Thumb-1 implementation of the TargetInstrInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef THUMB1INSTRUCTIONINFO_H
15#define THUMB1INSTRUCTIONINFO_H
16
17#include "llvm/Target/TargetInstrInfo.h"
18#include "ARM.h"
19#include "ARMInstrInfo.h"
20#include "Thumb1RegisterInfo.h"
21
22namespace llvm {
23  class ARMSubtarget;
24
25class Thumb1InstrInfo : public ARMBaseInstrInfo {
26  Thumb1RegisterInfo RI;
27public:
28  explicit Thumb1InstrInfo(const ARMSubtarget &STI);
29
30  // Return the non-pre/post incrementing version of 'Opc'. Return 0
31  // if there is not such an opcode.
32  unsigned getUnindexedOpcode(unsigned Opc) const;
33
34  /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info.  As
35  /// such, whenever a client has an instance of instruction info, it should
36  /// always be able to get register info as well (through this method).
37  ///
38  const Thumb1RegisterInfo &getRegisterInfo() const { return RI; }
39
40  bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
41                                 MachineBasicBlock::iterator MI,
42                                 const std::vector<CalleeSavedInfo> &CSI,
43                                 const TargetRegisterInfo *TRI) const;
44  bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
45                                   MachineBasicBlock::iterator MI,
46                                   const std::vector<CalleeSavedInfo> &CSI,
47                                   const TargetRegisterInfo *TRI) const;
48
49  void copyPhysReg(MachineBasicBlock &MBB,
50                   MachineBasicBlock::iterator I, DebugLoc DL,
51                   unsigned DestReg, unsigned SrcReg,
52                   bool KillSrc) const;
53  void storeRegToStackSlot(MachineBasicBlock &MBB,
54                                   MachineBasicBlock::iterator MBBI,
55                                   unsigned SrcReg, bool isKill, int FrameIndex,
56                           const TargetRegisterClass *RC,
57                           const TargetRegisterInfo *TRI) const;
58
59  void loadRegFromStackSlot(MachineBasicBlock &MBB,
60                                    MachineBasicBlock::iterator MBBI,
61                                    unsigned DestReg, int FrameIndex,
62                            const TargetRegisterClass *RC,
63                            const TargetRegisterInfo *TRI) const;
64
65};
66}
67
68#endif // THUMB1INSTRUCTIONINFO_H
69