PPCInstrInfo.h revision 16e71f2f70811c69c56052dd146324fe20e31db5 
1//===- PPC32InstrInfo.h - PowerPC32 Instruction Information -----*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the PowerPC implementation of the TargetInstrInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef POWERPC32_INSTRUCTIONINFO_H
15#define POWERPC32_INSTRUCTIONINFO_H
16
17#include "PPC.h"
18#include "llvm/Target/TargetInstrInfo.h"
19#include "PPCRegisterInfo.h"
20
21namespace llvm {
22
23class PPC32InstrInfo : public TargetInstrInfo {
24  const PPC32RegisterInfo RI;
25public:
26  PPC32InstrInfo();
27
28  /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info.  As
29  /// such, whenever a client has an instance of instruction info, it should
30  /// always be able to get register info as well (through this method).
31  ///
32  virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
33
34  //
35  // Return true if the instruction is a register to register move and
36  // leave the source and dest operands in the passed parameters.
37  //
38  virtual bool isMoveInstr(const MachineInstr& MI,
39                           unsigned& sourceReg,
40                           unsigned& destReg) const;
41
42  // commuteInstruction - We can commute rlwimi instructions, but only if the
43  // rotate amt is zero.  We also have to munge the immediates a bit.
44  virtual MachineInstr *commuteInstruction(MachineInstr *MI) const;
45
46  static unsigned invertPPCBranchOpcode(unsigned Opcode) {
47    switch (Opcode) {
48    default: assert(0 && "Unknown PPC branch opcode!");
49    case PPC::BEQ: return PPC::BNE;
50    case PPC::BNE: return PPC::BEQ;
51    case PPC::BLT: return PPC::BGE;
52    case PPC::BGE: return PPC::BLT;
53    case PPC::BGT: return PPC::BLE;
54    case PPC::BLE: return PPC::BGT;
55    }
56  }
57};
58
59}
60
61#endif
62