1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ****************************************************************************
11 ****************************************************************************/
12#ifndef __LINUX_ATA_H__
13#define __LINUX_ATA_H__
14
15#include <linux/types.h>
16
17#define ATA_DMA_BOUNDARY 0xffffUL
18#define ATA_DMA_MASK 0xffffffffULL
19
20enum {
21
22 ATA_MAX_DEVICES = 2,
23 ATA_MAX_PRD = 256,
24 ATA_SECT_SIZE = 512,
25
26 ATA_ID_WORDS = 256,
27 ATA_ID_SERNO_OFS = 10,
28 ATA_ID_FW_REV_OFS = 23,
29 ATA_ID_PROD_OFS = 27,
30 ATA_ID_OLD_PIO_MODES = 51,
31 ATA_ID_FIELD_VALID = 53,
32 ATA_ID_MWDMA_MODES = 63,
33 ATA_ID_PIO_MODES = 64,
34 ATA_ID_EIDE_DMA_MIN = 65,
35 ATA_ID_EIDE_PIO = 67,
36 ATA_ID_EIDE_PIO_IORDY = 68,
37 ATA_ID_UDMA_MODES = 88,
38 ATA_ID_MAJOR_VER = 80,
39 ATA_ID_PIO4 = (1 << 1),
40
41 ATA_PCI_CTL_OFS = 2,
42 ATA_SERNO_LEN = 20,
43 ATA_UDMA0 = (1 << 0),
44 ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
45 ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
46 ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
47 ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
48 ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
49 ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
50 ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
51
52 ATA_UDMA_MASK_40C = ATA_UDMA2,
53
54 ATA_PRD_SZ = 8,
55 ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
56 ATA_PRD_EOT = (1 << 31),
57
58 ATA_DMA_TABLE_OFS = 4,
59 ATA_DMA_STATUS = 2,
60 ATA_DMA_CMD = 0,
61 ATA_DMA_WR = (1 << 3),
62 ATA_DMA_START = (1 << 0),
63 ATA_DMA_INTR = (1 << 2),
64 ATA_DMA_ERR = (1 << 1),
65 ATA_DMA_ACTIVE = (1 << 0),
66
67 ATA_HOB = (1 << 7),
68 ATA_NIEN = (1 << 1),
69 ATA_LBA = (1 << 6),
70 ATA_DEV1 = (1 << 4),
71 ATA_DEVICE_OBS = (1 << 7) | (1 << 5),
72 ATA_DEVCTL_OBS = (1 << 3),
73 ATA_BUSY = (1 << 7),
74 ATA_DRDY = (1 << 6),
75 ATA_DF = (1 << 5),
76 ATA_DRQ = (1 << 3),
77 ATA_ERR = (1 << 0),
78 ATA_SRST = (1 << 2),
79 ATA_ICRC = (1 << 7),
80 ATA_UNC = (1 << 6),
81 ATA_IDNF = (1 << 4),
82 ATA_ABORTED = (1 << 2),
83
84 ATA_REG_DATA = 0x00,
85 ATA_REG_ERR = 0x01,
86 ATA_REG_NSECT = 0x02,
87 ATA_REG_LBAL = 0x03,
88 ATA_REG_LBAM = 0x04,
89 ATA_REG_LBAH = 0x05,
90 ATA_REG_DEVICE = 0x06,
91 ATA_REG_STATUS = 0x07,
92
93 ATA_REG_FEATURE = ATA_REG_ERR,
94 ATA_REG_CMD = ATA_REG_STATUS,
95 ATA_REG_BYTEL = ATA_REG_LBAM,
96 ATA_REG_BYTEH = ATA_REG_LBAH,
97 ATA_REG_DEVSEL = ATA_REG_DEVICE,
98 ATA_REG_IRQ = ATA_REG_NSECT,
99
100 ATA_CMD_CHK_POWER = 0xE5,
101 ATA_CMD_STANDBY = 0xE2,
102 ATA_CMD_IDLE = 0xE3,
103 ATA_CMD_EDD = 0x90,
104 ATA_CMD_FLUSH = 0xE7,
105 ATA_CMD_FLUSH_EXT = 0xEA,
106 ATA_CMD_ID_ATA = 0xEC,
107 ATA_CMD_ID_ATAPI = 0xA1,
108 ATA_CMD_READ = 0xC8,
109 ATA_CMD_READ_EXT = 0x25,
110 ATA_CMD_WRITE = 0xCA,
111 ATA_CMD_WRITE_EXT = 0x35,
112 ATA_CMD_WRITE_FUA_EXT = 0x3D,
113 ATA_CMD_FPDMA_READ = 0x60,
114 ATA_CMD_FPDMA_WRITE = 0x61,
115 ATA_CMD_PIO_READ = 0x20,
116 ATA_CMD_PIO_READ_EXT = 0x24,
117 ATA_CMD_PIO_WRITE = 0x30,
118 ATA_CMD_PIO_WRITE_EXT = 0x34,
119 ATA_CMD_READ_MULTI = 0xC4,
120 ATA_CMD_READ_MULTI_EXT = 0x29,
121 ATA_CMD_WRITE_MULTI = 0xC5,
122 ATA_CMD_WRITE_MULTI_EXT = 0x39,
123 ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
124 ATA_CMD_SET_FEATURES = 0xEF,
125 ATA_CMD_PACKET = 0xA0,
126 ATA_CMD_VERIFY = 0x40,
127 ATA_CMD_VERIFY_EXT = 0x42,
128 ATA_CMD_STANDBYNOW1 = 0xE0,
129 ATA_CMD_IDLEIMMEDIATE = 0xE1,
130 ATA_CMD_INIT_DEV_PARAMS = 0x91,
131 ATA_CMD_READ_NATIVE_MAX = 0xF8,
132 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
133 ATA_CMD_READ_LOG_EXT = 0x2f,
134
135 ATA_LOG_SATA_NCQ = 0x10,
136
137 SETFEATURES_XFER = 0x03,
138 XFER_UDMA_7 = 0x47,
139 XFER_UDMA_6 = 0x46,
140 XFER_UDMA_5 = 0x45,
141 XFER_UDMA_4 = 0x44,
142 XFER_UDMA_3 = 0x43,
143 XFER_UDMA_2 = 0x42,
144 XFER_UDMA_1 = 0x41,
145 XFER_UDMA_0 = 0x40,
146 XFER_MW_DMA_2 = 0x22,
147 XFER_MW_DMA_1 = 0x21,
148 XFER_MW_DMA_0 = 0x20,
149 XFER_SW_DMA_2 = 0x12,
150 XFER_SW_DMA_1 = 0x11,
151 XFER_SW_DMA_0 = 0x10,
152 XFER_PIO_4 = 0x0C,
153 XFER_PIO_3 = 0x0B,
154 XFER_PIO_2 = 0x0A,
155 XFER_PIO_1 = 0x09,
156 XFER_PIO_0 = 0x08,
157 XFER_PIO_SLOW = 0x00,
158
159 SETFEATURES_WC_ON = 0x02,
160 SETFEATURES_WC_OFF = 0x82,
161
162 ATAPI_PKT_DMA = (1 << 0),
163 ATAPI_DMADIR = (1 << 2),
164 ATAPI_CDB_LEN = 16,
165
166 ATA_CBL_NONE = 0,
167 ATA_CBL_PATA40 = 1,
168 ATA_CBL_PATA80 = 2,
169 ATA_CBL_PATA_UNK = 3,
170 ATA_CBL_SATA = 4,
171
172 SCR_STATUS = 0,
173 SCR_ERROR = 1,
174 SCR_CONTROL = 2,
175 SCR_ACTIVE = 3,
176 SCR_NOTIFICATION = 4,
177
178 SERR_DATA_RECOVERED = (1 << 0),
179 SERR_COMM_RECOVERED = (1 << 1),
180 SERR_DATA = (1 << 8),
181 SERR_PERSISTENT = (1 << 9),
182 SERR_PROTOCOL = (1 << 10),
183 SERR_INTERNAL = (1 << 11),
184 SERR_PHYRDY_CHG = (1 << 16),
185 SERR_DEV_XCHG = (1 << 26),
186
187 ATA_TFLAG_LBA48 = (1 << 0),
188 ATA_TFLAG_ISADDR = (1 << 1),
189 ATA_TFLAG_DEVICE = (1 << 2),
190 ATA_TFLAG_WRITE = (1 << 3),
191 ATA_TFLAG_LBA = (1 << 4),
192 ATA_TFLAG_FUA = (1 << 5),
193 ATA_TFLAG_POLLING = (1 << 6),
194};
195
196enum ata_tf_protocols {
197
198 ATA_PROT_UNKNOWN,
199 ATA_PROT_NODATA,
200 ATA_PROT_PIO,
201 ATA_PROT_DMA,
202 ATA_PROT_NCQ,
203 ATA_PROT_ATAPI,
204 ATA_PROT_ATAPI_NODATA,
205 ATA_PROT_ATAPI_DMA,
206};
207
208enum ata_ioctls {
209 ATA_IOC_GET_IO32 = 0x309,
210 ATA_IOC_SET_IO32 = 0x324,
211};
212
213struct ata_prd {
214 u32 addr;
215 u32 flags_len;
216};
217
218struct ata_taskfile {
219 unsigned long flags;
220 u8 protocol;
221
222 u8 ctl;
223
224 u8 hob_feature;
225 u8 hob_nsect;
226 u8 hob_lbal;
227 u8 hob_lbam;
228 u8 hob_lbah;
229
230 u8 feature;
231 u8 nsect;
232 u8 lbal;
233 u8 lbam;
234 u8 lbah;
235
236 u8 device;
237
238 u8 command;
239};
240
241#define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0)
242#define ata_id_is_cfa(id) ((id)[0] == 0x848A)
243#define ata_id_is_sata(id) ((id)[93] == 0)
244#define ata_id_rahead_enabled(id) ((id)[85] & (1 << 6))
245#define ata_id_wcache_enabled(id) ((id)[85] & (1 << 5))
246#define ata_id_hpa_enabled(id) ((id)[85] & (1 << 10))
247#define ata_id_has_fua(id) ((id)[84] & (1 << 6))
248#define ata_id_has_flush(id) ((id)[83] & (1 << 12))
249#define ata_id_has_flush_ext(id) ((id)[83] & (1 << 13))
250#define ata_id_has_lba48(id) ((id)[83] & (1 << 10))
251#define ata_id_has_hpa(id) ((id)[82] & (1 << 10))
252#define ata_id_has_wcache(id) ((id)[82] & (1 << 5))
253#define ata_id_has_pm(id) ((id)[82] & (1 << 3))
254#define ata_id_has_lba(id) ((id)[49] & (1 << 9))
255#define ata_id_has_dma(id) ((id)[49] & (1 << 8))
256#define ata_id_has_ncq(id) ((id)[76] & (1 << 8))
257#define ata_id_queue_depth(id) (((id)[75] & 0x1f) + 1)
258#define ata_id_removeable(id) ((id)[0] & (1 << 7))
259#define ata_id_has_dword_io(id) ((id)[50] & (1 << 0))
260#define ata_id_u32(id,n)   (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
261#define ata_id_u64(id,n)   ( ((u64) (id)[(n) + 3] << 48) |   ((u64) (id)[(n) + 2] << 32) |   ((u64) (id)[(n) + 1] << 16) |   ((u64) (id)[(n) + 0]) )
262
263#define ata_id_cdb_intr(id) (((id)[0] & 0x60) == 0x20)
264
265#endif
266