| e94ac8871a1ac79bece57335d2abece0feed9c02 |
|
03-Aug-2012 |
Eric Christopher <echristo@apple.com> |
Add support for the ARM GHC calling convention, this patch was in 3.0,
but somehow managed to be dropped later.
Patch by Karel Gardas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161226 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 420761a0f193e87d08ee1c51b26bba23ab4bac7f |
|
20-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155188 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| aa395e8c5dcc6d13f1f8ae65ce89f36383cb714a |
|
06-Apr-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Eliminate iOS-specific tail call instructions.
After register masks were introdruced to represent the call clobbers, it
is no longer necessary to have duplicate instruction for iOS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154209 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 055a8127c9ffee287807fe7cc1b115d0f40162b0 |
|
20-Mar-2012 |
Bob Wilson <bob.wilson@apple.com> |
Remove some redundant checks.
ARMFrameLowering::hasReservedCallFrame is already checking for variable
sized objects, so there's no point in checking it twice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153109 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 28f08c93e75d291695ea89b9004145103292e85b |
|
05-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM refactor away a bunch of VLD/VST pseudo instructions.
With the new composite physical registers to represent arbitrary pairs
of DPR registers, we don't need the pseudo-registers anymore. Get rid of
a bunch of them that use DPR register pairs and just use the real
instructions directly instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152045 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 015f228861ef9b337366f92f637d4e8d624bb006 |
|
04-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Use uint16_t to store registers in callee saved register tables to reduce size of static data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151996 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 0f9d07fb2526c0acdf7ad9fa6e9c1a97a746c0e9 |
|
28-Feb-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Enable ARM base pointer when calling functions with large arguments.
When an outgoing call takes more than 2k of arguments on the stack, we
don't allocate that call frame in the prolog, but adjust the stack
pointer immediately before the call instead.
This causes problems with the emergency spill slot because PEI can't
track stack pointer adjustments on the second pass, and if the outgoing
arguments are too big, SP can't be used to reach the emergency spill
slot at all.
Work around these problems by ensuring there is a base or frame pointer
that can be used to access the emergency spill slot.
<rdar://problem/10917166>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151604 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 120cfdf0e0a53f858970874476a21cffb8069847 |
|
24-Feb-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Remove unused cl::opt, make another opt static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151398 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 31d157ae1ac2cd9c787dc3c1d28e64c682803844 |
|
18-Feb-2012 |
Jia Liu <proljc@gmail.com> |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| bad1e6b8e0dd51a15f6f2cae4f9d7815120f2471 |
|
06-Jan-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Enable aligned NEON spilling by default.
Experiments show this to be a small speedup for modern ARM cores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147689 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| afad0fe59a791cb4fd87fbd7ea2b1aba8d67a7af |
|
04-Jan-2012 |
Evan Cheng <evan.cheng@apple.com> |
Fix more places which should be checking for iOS, not darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147513 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 43ea32ca042214c28b7abba9c10f470ac5ade405 |
|
24-Dec-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Fix Comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147238 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| f06f6f50e9844b88cfbb9fb896fff9c3a752966b |
|
23-Dec-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Experimental support for aligned NEON spills.
ARM targets with NEON units have access to aligned vector loads and
stores that are potentially faster than unaligned operations.
Add support for spilling the callee-saved NEON registers to an aligned
stack area using 16-byte aligned NEON loads and store.
This feature is off by default, controlled by an -align-neon-spills
command line option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147211 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| a2a98fd0ddd2ae277be7cdd62aae92f6c5155e07 |
|
21-Dec-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Move common code into an MRI function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147071 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 5a96b3dad2f634c9081c8b2b6c2575441dc5a2bd |
|
07-Dec-2011 |
Evan Cheng <evan.cheng@apple.com> |
Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.
For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 8a8d479214745c82ef00f08d4e4f1c173b5f9ce2 |
|
02-Dec-2011 |
Nick Lewycky <nicholas@mxc.ca> |
Move global variables in TargetMachine into new TargetOptions class. As an API
change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.
One small functionality change in PTX. PTX had commented out the machine
verifier parts in their copy of printAndVerify. That now calls the version in
LLVMTargetMachine. Users of PTX who need verification disabled should rely on
not passing the command-line flag to enable it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145714 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 6690bca623d1f6405b95db5b1760f7ba8436e3fb |
|
20-Oct-2011 |
Chad Rosier <mcrosier@apple.com> |
Revert 142337. Thumb1 still doesn't support dynamic stack realignment. :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142557 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| fe04757f5e06ab15208ac0a2ab8d7e83c62b9f0d |
|
18-Oct-2011 |
Chad Rosier <mcrosier@apple.com> |
Add support for dynamic stack realignment when in thumb1 mode.
rdar://10288916
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142337 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 2bfaf521aed6d486b2d80dbf12b84b456100cb47 |
|
01-Oct-2011 |
Chad Rosier <mcrosier@apple.com> |
Revert r140924 "Attempt to fix dynamic stack realignment for thumb1 functions."
to appease nightly testers. Not quite there yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140953 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 52490411259ccc34b8c59f3532e78442a46fffd7 |
|
01-Oct-2011 |
Chad Rosier <mcrosier@apple.com> |
Attempt to fix dynamic stack realignment for thumb1 functions. It is in fact
useful if an optimization assumes the stack has been realigned. Credit to
Eli for his assistance.
rdar://10043857
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140924 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 51f6a7abf27fc92c3d8904c2334feab8b498e8e9 |
|
09-Sep-2011 |
Owen Anderson <resistor@mac.com> |
Thumb unconditional branches are allowed in IT blocks, and therefore should have a predicate operand, unlike conditional branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139415 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 8e0c7697fd9b9354856074efc06eea9f6d80015c |
|
02-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Tidy up. Formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139024 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| b9ca5124f8a5d593f57cbd0566867578a51d7055 |
|
25-Aug-2011 |
Andrew Trick <atrick@apple.com> |
ARM fix for missing implicit operands on ldmia_ret.
rdar://10005094: miscompile of 176.gcc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138568 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 51972da57615d7d31372dd1fef120333ef2d799c |
|
25-Aug-2011 |
Andrew Trick <atrick@apple.com> |
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138566 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 19dec207fcc0f04902b7f097b7771ba7abba43fb |
|
05-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM refactor indexed store instructions.
Refactor STR[B] pre and post indexed instructions to use addressing modes for
memory operands, which is necessary for assembly parsing and is more consistent
with the rest of the memory instruction definitions. Make some incremental
progress on refactoring away the mega-operand addrmode2 along the way, which
is nice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136978 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 793e79601f0fd68ba082fa2016018f80b2379460 |
|
26-Jul-2011 |
Owen Anderson <resistor@mac.com> |
Split am2offset into register addend and immediate addend forms, necessary for allowing the fixed-length disassembler to distinguish between SBFX and STR_PRE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136141 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| ee04a6d3a40c3017124e3fd89a0db473a2824498 |
|
21-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ARM MC code from target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135636 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| bc20e4f2dc11e346505f11efea22d9a1d3919eca |
|
05-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM estimateStackSize() needs to account for simplified call frames.
If the function allocates reserved stack space for callee argument frames,
estimateStackSize() needs to account for that, as it doesn't show up as
ordinary frame objects. Otherwise, a callee with a large argument list will
throw off the calculations for whether to allocate an emergency spill slot
and we get assert() failures in the register scavenger.
rdar://9715469
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134415 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 2a7b41ba4d3eb3c6003f6768dc20b28d83eac265 |
|
01-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
Refact ARM Thumb1 tMOVr instruction family.
Merge the tMOVr, tMOVgpr2tgpr, tMOVtgpr2gpr, and tMOVgpr2gpr instructions
into tMOVr. There's no need to keep them separate. Giving the tMOVr
instruction the proper GPR register class for its operands is sufficient
to give the register allocator enough information to do the right thing
directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134204 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 63b46faeb8acae9b7e5f865b7417dc00b9b9dad3 |
|
01-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb1 register to register MOV instruction is predicable.
Fix a FIXME and allow predication (in Thumb2) for the T1 register to
register MOV instructions. This allows some better codegen with
if-conversion (as seen in the test updates), plus it lays the groundwork
for pseudo-izing the tMOVCC instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134197 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| cd4e0b593db6dfdb5cedbde47ea6603058b8ac6c |
|
17-Jun-2011 |
Cameron Zwarich <zwarich@apple.com> |
Update an insertion point iterator after replacing a return instruction with a
tail call pseudoinstruction. This fixes <rdar://problem/9624333>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133227 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 7980f61f5ff408b947474cd1c3715896d28ea578 |
|
13-Jun-2011 |
Jim Grosbach <grosbach@apple.com> |
Fix coordination for using R4 in Thumb1 as a scratch for SP restore.
The logic for reserving R4 for use as a scratch needs to match that for
actually using it. Also, it's not necessary for immediate <=508, so adjust
the value checked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132934 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| db6cbe1ff16d5f18bf2469fa53744e680944dc56 |
|
22-Apr-2011 |
Evan Cheng <evan.cheng@apple.com> |
In Thumb2 mode, lower frame indix references to:
add <rd>, sp, #<imm8>
ldr <rd>, [sp, #<imm8>]
When the offset from sp is multiple of 4 and in range of 0-1020.
This saves code size by utilizing 16-bit instructions.
rdar://9321541
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129971 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 5edf24efac40062766c643e08f11bc509d373370 |
|
15-Mar-2011 |
Jim Grosbach <grosbach@apple.com> |
Clean up ARM tail calls a bit. They're pseudo-instructions for normal branches.
Also more cleanly separate the ARM vs. Thumb functionality. Previously, the
encoding would be incorrect for some Thumb instructions (the indirect calls).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127637 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 57caad7a33ff145b71545f10dcfbbf2fd0f595d3 |
|
05-Mar-2011 |
Anton Korobeynikov <asl@math.spbu.ru> |
Preliminary support for ARM frame save directives emission via MI flags.
This is just very first approximation how the stuff should be done
(e.g. ARM-only for now). More to follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127101 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 9831f2d585816fc293504ea66e40e8a6c5a5d702 |
|
25-Feb-2011 |
Evan Cheng <evan.cheng@apple.com> |
Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126467 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| acca09bd64080393a047204eafad46e2fc34ee68 |
|
25-Feb-2011 |
Evan Cheng <evan.cheng@apple.com> |
Each prologue may have multiple vpush instructions to store callee-saved
D registers since the vpush list may not have gaps. Make sure the stack
adjustment instruction isn't moved between them. Ditto for vpop in
epilogues.
Sorry, can't reduce a small test case.
rdar://9043312
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126457 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 727961a1a3507a8f7e47ba80a1e37fc68bfc8199 |
|
15-Feb-2011 |
Bob Wilson <bob.wilson@apple.com> |
Remove unused bitvectors that record ARM callee-saved registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125534 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 7cfa656ad84306ded61f0a3c7a8862505f48c239 |
|
25-Jan-2011 |
Evan Cheng <evan.cheng@apple.com> |
Don't merge restore with tail call instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124167 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 955ed73d12f2b186ef3f80da872b702cd7f2895b |
|
18-Jan-2011 |
Jeffrey Yasskin <jyasskin@google.com> |
Remove unused variables found by gcc-4.6's -Wunused-but-set-variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123707 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| df55fea807835bc23a2879fbf7f7a8bd53de8256 |
|
16-Jan-2011 |
Evan Cheng <evan.cheng@apple.com> |
Spill R4 if it's going to be used to restore SP from FP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123567 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 4f28c1c71450c711e96aa283de53739d8b4504cd |
|
13-Jan-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Teach frame lowering to ignore debug values after the terminators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123399 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 422578547e0e3464af7ae23305c54dd71a8bd9e9 |
|
13-Jan-2011 |
Bob Wilson <bob.wilson@apple.com> |
Tidy comments, indentation, and 80-column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123397 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| b72d2a92b75daa9cbac7338aff0cd8ae04c2b4bd |
|
11-Jan-2011 |
Evan Cheng <evan.cheng@apple.com> |
Clean up ARM subtarget code by using Triple ADT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123276 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 4dd312f2334a215cfc7961518823ef36884b4c95 |
|
11-Jan-2011 |
Eric Christopher <echristo@apple.com> |
Expand on the safeness of restoring the sp from the fp a bit more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123193 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|
| 16c29b5f285f375be53dabaa73e3e91107485fe4 |
|
10-Jan-2011 |
Anton Korobeynikov <asl@math.spbu.ru> |
Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123170 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMFrameLowering.cpp
|