31d157ae1ac2cd9c787dc3c1d28e64c682803844 |
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18-Feb-2012 |
Jia Liu <proljc@gmail.com> |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp
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655b8de7b2ab773a977e0c524307e71354d8af29 |
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05-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert assert(0) to llvm_unreachable git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149814 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp
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b95fc31aa2e5a0a0b9ee1909d1cb949577c5aa16 |
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16-Nov-2011 |
Evan Cheng <evan.cheng@apple.com> |
Sink codegen optimization level into MCCodeGenInfo along side relocation model and code model. This eliminates the need to pass OptLevel flag all over the place and makes it possible for any codegen pass to use this information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144788 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp
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3e74d6fdd248e20a280f1dff3da9a6c689c2c4c3 |
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24-Aug-2011 |
Evan Cheng <evan.cheng@apple.com> |
Move TargetRegistry and TargetSelect from Target to Support where they belong. These are strictly utilities for registering targets and components. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138450 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp
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7801136b95d1fbe515b9655b73ada39b05a33559 |
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23-Aug-2011 |
Evan Cheng <evan.cheng@apple.com> |
Some refactoring so TargetRegistry.h no longer has to include any files from MC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138367 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp
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7f8dff65717b1e4090ba4a648f9ec4f037a66c1e |
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23-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
createXXXMCCodeGenInfo should be static. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135826 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp
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e78085a3c03de648a481e9751c3094c517bd7123 |
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22-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Combine all MC initialization routines into one. e.g. InitializeX86MCAsmInfo, InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135812 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp
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34ad6db8b958fdc0d38e122edf753b5326e69b03 |
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20-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Move CodeModel from a TargetMachine global option to MCCodeGenInfo. - Introduce JITDefault code model. This tells targets to set different default code model for JIT. This eliminates the ugly hack in TargetMachine where code model is changed after construction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135580 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp
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439661395fd2a2a832dba01c65bc88718528313c |
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19-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Introduce MCCodeGenInfo, which keeps information that can affect codegen (including compilation, assembly). Move relocation model Reloc::Model from TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135468 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp
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2d28617de2b0b731c08d1af9e830f31e14ac75b4 |
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19-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for better location welcome). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135438 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp
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0e6a052331f674dd70e28af41f654a7874405eab |
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18-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down to MCRegisterInfo. Also initialize the mapping at construction time. This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step towards fixing the layering violation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135424 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp
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1abf2cb59b8d63415780a03329307c0997b2670c |
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15-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Rename createAsmInfo to createMCAsmInfo and move registration code to MCTargetDesc to prepare for next round of changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135219 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp
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c60f9b752381baa6c4b80c0739034660f1748c84 |
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14-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Next round of MC refactoring. This patch factor MC table instantiations, MC registeration and creation code into XXXMCDesc libraries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135184 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp
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