1144af3c9b4da48cd581156e05b24261c8de366a |
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25-Aug-2012 |
Richard Smith <richard-llvm@metafoo.co.uk> |
Fix integer undefined behavior due to signed left shift overflow in LLVM. Reviewed offline by chandlerc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162623 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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0518fca843ff87d069ecb07fc00d306c1f587d58 |
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26-Jun-2012 |
Jack Carter <jcarter@mips.com> |
There are a number of generic inline asm operand modifiers that up to r158925 were handled as processor specific. Making them generic and putting tests for these modifiers in the CodeGen/Generic directory caused a number of targets to fail. This commit addresses that problem by having the targets call the generic routine for generic modifiers that they don't currently have explicit code for. For now only generic print operands 'c' and 'n' are supported.vi Affected files: test/CodeGen/Generic/asm-large-immediate.ll lib/Target/PowerPC/PPCAsmPrinter.cpp lib/Target/NVPTX/NVPTXAsmPrinter.cpp lib/Target/ARM/ARMAsmPrinter.cpp lib/Target/XCore/XCoreAsmPrinter.cpp lib/Target/X86/X86AsmPrinter.cpp lib/Target/Hexagon/HexagonAsmPrinter.cpp lib/Target/CellSPU/SPUAsmPrinter.cpp lib/Target/Sparc/SparcAsmPrinter.cpp lib/Target/MBlaze/MBlazeAsmPrinter.cpp lib/Target/Mips/MipsAsmPrinter.cpp MSP430 isn't represented because it did not even run with the long existing 'c' modifier and it was not apparent what needs to be done to get it inline asm ready. Contributer: Jack Carter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159203 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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31d157ae1ac2cd9c787dc3c1d28e64c682803844 |
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18-Feb-2012 |
Jia Liu <proljc@gmail.com> |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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4d6ccb5f68cd7c6418a209f1fa4dbade569e4493 |
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20-Jan-2012 |
David Blaikie <dblaikie@gmail.com> |
More dead code removal (using -Wunreachable-code) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148578 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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3e74d6fdd248e20a280f1dff3da9a6c689c2c4c3 |
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24-Aug-2011 |
Evan Cheng <evan.cheng@apple.com> |
Move TargetRegistry and TargetSelect from Target to Support where they belong. These are strictly utilities for registering targets and components. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138450 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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2d25d247bdca74165ace6936fc6f6bf670676a87 |
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28-Feb-2011 |
Kalle Raiskila <kalle.raiskila@nokia.com> |
Add branch hinting for SPU. The implemented algorithm is overly simplistic (just speculate all branches are taken)- this is work in progress. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126651 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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1139691e3aadff751c035f38f835d436ec6cf10a |
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14-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
move all the target's asmprinters into the main target. The piece that should be split out is the InstPrinter (if a target is mc'ized). This change makes all the targets be consistent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119056 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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dc91bea4793f090021e308a3494e279f12f66a75 |
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20-Nov-2008 |
Scott Michel <scottm@aero.org> |
CellSPU: (a) Remove moved file (SPUAsmPrinter.cpp) to make svn happy. (b) Remove truncated stores that will never be used. (c) Add initial support for __muldi3 as a libcall. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59734 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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73655bc67f702d1b160342289eced100fde6dd18 |
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08-Nov-2008 |
Scott Michel <scottm@aero.org> |
CellSPU: Bring SPU's assembly printer more in-line with current LLVM code structure. Assembly printer now outputs the correct section for strings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58921 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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d976c21241121c3601c1cddc77e99bd4f5786e2a |
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30-Oct-2008 |
Scott Michel <scottm@aero.org> |
Resolve bug 2947: vararg-marked functions must spill registers R3-R79 to stack so that va_start/va_arg/et.al. will walk arguments correctly for Cell SPU. N.B.: Because neither clang nor llvm-gcc-4.2 can be built for CellSPU, this is still unexorcised code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58415 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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d735b8019b0f297d7c14b55adcd887af24d8e602 |
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03-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Switch the MachineOperand accessors back to the short names like isReg, etc., from isRegister, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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d751c64a679148bfe111bbba47f4a344ba813df9 |
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26-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
If we have a function with an unreachable statement such that the ending debug information is in an unreachable block, then it's possible that the high/low pc values won't be set for the dwarf information. E.g., this function: void abort(void) __attribute__((__noreturn__)); void dead_beef(void) __attribute__ ((noreturn)); int *b; void dead_beef(void) { *b=0xdeadbeef; abort(); } has a call to "@llvm.dbg.region.end" only in the unreachable block: define void @dead_beef() noreturn nounwind { entry: call void @llvm.dbg.func.start(...) call void @llvm.dbg.stoppoint(...) ... call void @abort( ) noreturn nounwind unreachable return: ; No predecessors! call void @llvm.dbg.stoppoint(...) call void @llvm.dbg.region.end(...) ret void } The dwarf information emitted is something like: 0x00000084: TAG_subprogram [5] AT_name( "dead_beef" ) AT_external( 0x01 ) AT_prototyped( 0x01 ) AT_decl_file( 0x01 ) AT_decl_line( 0x08 ) Note that this is *not* the best fix for this problem, but a band-aid for an gaping wound. This code needs to be changed when we revamp our debugging information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56628 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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c25e1ea5e9aa54952b6736a9579e25a5c2d8139f |
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25-Sep-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56573 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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0c8e80607bc3296a4775f05c02f0d11df8e5cb04 |
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25-Sep-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Drop obsolete hook and change all usage to new interface git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56572 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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90a7b88c5ba958a9647ed7dfa3b2a1ebd35b0473 |
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25-Sep-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
SPU section handling is really huge mess. Replace remaining TAI calls for sections with explicit names in order not to block existing backends during section handling migration. SPU folks! Please consider using new section handling facility someday. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56570 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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cb3718832375a581c5ea23f15918f3ea447a446c |
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21-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Use raw_ostream throughout the AsmPrinter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55092 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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d03772466a2603861ebc2db1564eb6c8571435f9 |
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09-Jul-2008 |
Dale Johannesen <dalej@apple.com> |
Emit debug info for data-only files on Cell SPU. I cannot test this target, let me know if it breaks! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53363 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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aafce77b17d340aace52bcd49d1944109d82f14a |
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14-May-2008 |
Dale Johannesen <dalej@apple.com> |
Add CommonLinkage; currently tentative definitions are represented as "weak", but there are subtle differences in some cases on Darwin, so we need both. The intent is that "common" will behave identically to "weak" unless somebody changes their target to do something else. No functional change as yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51118 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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fb8075d03f5c87bd57dcc9c5f2304f6b13c55aad |
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28-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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74ab84c31ef64538a1b56e1f282e49303412ad17 |
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26-Feb-2008 |
Bill Wendling <isanbard@gmail.com> |
Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool would have been a Godsend here! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47625 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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6f0d024a534af18d9e60b3ea757376cd8a3a980e |
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10-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Rename MRegisterInfo to TargetRegisterInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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4eecdeb3faf5df864790175da5d58301b751ec11 |
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02-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Get rid of the annoying blank lines before labels. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46667 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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7f9ba9bb3c969eab32118dd21f15b4b74843c5c1 |
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30-Jan-2008 |
Scott Michel <scottm@aero.org> |
More cleanups for CellSPU: - Expand tabs... (poss 80-col violations, will get them later...) - Consolidate logic for SelectDFormAddr and SelectDForm2Addr into a single function, simplifying maintenance. Also reduced custom instruction generation for SPUvecinsert/INSERT_MASK. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46544 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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053c1da8d956a794d158ac906b3927c923f97c4d |
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29-Jan-2008 |
Scott Michel <scottm@aero.org> |
Overhaul Cell SPU's addressing mode internals so that there are now only two addressing mode nodes, SPUaform and SPUindirect (vice the three previous ones, SPUaform, SPUdform and SPUxform). This improves code somewhat because we now avoid using reg+reg addressing when it can be avoided. It also simplifies the address selection logic, which was the main point for doing this. Also, for various global variables that would be loaded using SPU's A-form addressing, prefer D-form offs[reg] addressing, keeping the base in a register if the variable is used more than once. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46483 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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8aa797aa51cd4ea1ec6f46f4891a6897944b75b2 |
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31-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Add new shorter predicates for testing machine operands for various types: e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on switching everything over, so new clients should just start using the shorter names. Remove old long accessors, switching everything over to use the short accessor: getMachineBasicBlock() -> getMBB(), getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45464 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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9a1ceaedc282f0cae31f2723f4d6c00c7b88fe90 |
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30-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45453 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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4ee451de366474b9c228b4e5fa573795a715216d |
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29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Remove attribution from file headers, per discussion on llvmdev. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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86c041f50e17f7fcd18193ff49e58379924d6472 |
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20-Dec-2007 |
Scott Michel <scottm@aero.org> |
More working CellSPU tests: - vec_const.ll: Vector constant loads - immed64.ll: i64, f64 constant loads git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45242 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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2466c3766dee7e65793bded413d02834dbc75629 |
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05-Dec-2007 |
Scott Michel <scottm@aero.org> |
Updated source file headers to llvm coding standard. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44597 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
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266bc8f7774b153401e54ed537db299159840981 |
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04-Dec-2007 |
Scott Michel <scottm@aero.org> |
More of the Cell SPU code drop from "Team Aerospace". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44582 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUAsmPrinter.cpp
|