31d157ae1ac2cd9c787dc3c1d28e64c682803844 |
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18-Feb-2012 |
Jia Liu <proljc@gmail.com> |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUNopFiller.cpp
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b9505f6bed33c56e2e57f1f8782827cf9bf8613f |
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11-Jan-2011 |
Kalle Raiskila <kalle.raiskila@nokia.com> |
Fix a thinko in 123226 that caused test failures on "other" platforms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123229 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUNopFiller.cpp
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76020ed6f33e3b3943b25c8b5e111afece086f5c |
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11-Jan-2011 |
Kalle Raiskila <kalle.raiskila@nokia.com> |
Add a "nop filler" pass to SPU. Filling no-ops is done just before emitting of assembly, when the instruction stream is final. No-ops are inserted to align the instructions so the dual-issue of the pipeline is utilized. This speeds up generated code with a minimum of 1% on a select set of algorithms. This pass may be redundant if the instruction scheduler and all subsequent passes that modify the instruction stream (prolog+epilog inserter, register scavenger, are there others?) are made aware of the instruction alignments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123226 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUNopFiller.cpp
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