| 31d157ae1ac2cd9c787dc3c1d28e64c682803844 |
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18-Feb-2012 |
Jia Liu <proljc@gmail.com> |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
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| ce618af3e880ae0ec0ddd81aca8ed5bbd4096ae4 |
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24-Dec-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
Section relative fixups are a coff concept, not a x86 one. Replace the
x86 specific reloc_coff_secrel32 with a generic FK_SecRel_4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147252 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
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| 8f7d12ccfd8feb258bdf4e582592bc00beacc7c6 |
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17-Dec-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
Add back the MC bits of 126425. Original patch by Nathan Jeffords. I added the
asm parsing and testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146801 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
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| 8c3fee59038d8fd98db2a01b6a309a8941a16a3f |
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25-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Refactor X86 target to separate MC code from Target code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135930 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
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