| d90219463154cafb5d626b7964bf20e572a186df |
|
28-Aug-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert V_SETALLONES/AVX_SETALLONES/AVX2_SETALLONES to Post-RA pseudos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162740 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 13897fb2638f008b41f6e2bc0dd25d78b72c5351 |
|
28-Aug-2012 |
Craig Topper <craig.topper@gmail.com> |
Merge AVX_SET0PSY/AVX_SET0PDY/AVX2_SET0 into a single post-RA pseudo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162738 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| a20e1e7ef596842127794372244fd5c646f71296 |
|
01-Aug-2012 |
Chad Rosier <mcrosier@apple.com> |
Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161122 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| c07f5bbd3b3d93e087160c87f0e5be7419772687 |
|
07-Jun-2012 |
Rafael Espindola <rafael.espindola@gmail.com> |
Use a base register instead of an index register with the local dynamic model.
Fixes pr13048.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158158 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| f0234fcbc9be9798c10dedc3e3c134b7afbc6511 |
|
01-Jun-2012 |
Hans Wennborg <hans@hanshq.net> |
Implement the local-dynamic TLS model for x86 (PR3985)
This implements codegen support for accesses to thread-local variables
using the local-dynamic model, and adds a clean-up pass so that the base
address for the TLS block can be re-used between local-dynamic access on
an execution path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157818 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 3e96531186ba574b0c25a4be62d24b8b7d752c9f |
|
18-May-2012 |
Jim Grosbach <grosbach@apple.com> |
Refactor data-in-code annotations.
Use a dedicated MachO load command to annotate data-in-code regions.
This is the same format the linker produces for final executable images,
allowing consistency of representation and use of introspection tools
for both object and executable files.
Data-in-code regions are annotated via ".data_region"/".end_data_region"
directive pairs, with an optional region type.
data_region_directive := ".data_region" { region_type }
region_type := "jt8" | "jt16" | "jt32" | "jta32"
end_data_region_directive := ".end_data_region"
The previous handling of ARM-style "$d.*" labels was broken and has
been removed. Specifically, it didn't handle ARM vs. Thumb mode when
marking the end of the section.
rdar://11459456
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157062 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 228756c744a1f877f7150c8fc91e074ff58c9d66 |
|
11-May-2012 |
Hans Wennborg <hans@hanshq.net> |
Implement initial-exec TLS model for 32-bit PIC x86
This fixes a TODO from 2007 :) Previously, LLVM would emit the wrong
code here (see the update to test/CodeGen/X86/tls-pie.ll).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156611 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 79aa3417eb6f58d668aadfedf075240a41d35a26 |
|
17-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152997 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 527a08b253795cf09de41c289c9dc071f00b1d4a |
|
16-Feb-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use the same CALL instructions for Windows as for everything else.
The different calling conventions and call-preserved registers are
represented with regmask operands that are added dynamically.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150708 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| d4a19b6a72d19a6f90b676aac37118664b7b7a84 |
|
11-Feb-2012 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add support for implicit TLS model used with MS VC runtime.
Patch by Kai Nacke!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150307 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 6d1263acb9704b38a8d90fd6ce94f49193cd4dde |
|
05-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert assert(0) to llvm_unreachable in X86 Target directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149809 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 71f0fc1ca88965b69b4b2c8794a7144bc93d4bba |
|
19-Jan-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Ignore register mask operands when lowering instructions to MC.
This is similar to implicit register operands. MC doesn't understand
register liveness and call clobbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148437 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 12216172c04fe76a90e9de34fc4161e92d097278 |
|
13-Jan-2012 |
Craig Topper <craig.topper@gmail.com> |
Make X86 instruction selection use 256-bit VPXOR for build_vector of all ones if AVX2 is enabled. This gives the ExeDepsFix pass a chance to choose FP vs int as appropriate. Also use v8i32 as the type for getZeroVector if AVX2 is enabled. This is consistent with SSE2 using prefering v4i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148108 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 0edd83bfff5b29a6d08718a0abc13aa7197c372d |
|
29-Nov-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Make X86::FsFLD0SS / FsFLD0SD real pseudo-instructions.
Like V_SET0, these instructions are expanded by ExpandPostRA to xorps /
vxorps so they can participate in execution domain swizzling.
This also makes the AVX variants redundant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145440 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 745a86bac9684f9617aeb0e1566194ca797a64d4 |
|
19-Nov-2011 |
Craig Topper <craig.topper@gmail.com> |
Use 256-bit vcmpeqd for creating an all ones vector when AVX2 is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145004 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| e840e88239cf92a065cbf5f5b9c7d18bc139c0e1 |
|
26-Oct-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
This commit introduces two fake instructions MORESTACK_RET and
MORESTACK_RET_RESTORE_R10; which are lowered to a RET and a RET
followed by a MOV respectively. Having a fake instruction prevents
the verifier from seeing a MachineBasicBlock end with a
non-terminator (MOV). It also prevents the rather eccentric case of a
MachineBasicBlock ending with RET but having successors nevertheless.
Patch by Sanjoy Das.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143062 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 2fec6c5ff153786744ba7d0d302b73179731c5e9 |
|
05-Oct-2011 |
Owen Anderson <resistor@mac.com> |
Teach the MC to output code/data region marker labels in MachO and ELF modes. These are used by disassemblers to provide better disassembly, particularly on targets like ARM Thumb that like to intermingle data in the TEXT segment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141135 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 92fb79b7a611ab4c1043f04e8acd08f963d073ad |
|
29-Sep-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Expand the x86 V_SET0* pseudos right after register allocation.
This also makes it possible to reduce the number of pseudo instructions
and get rid of the encoding information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140776 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| d5ccb0558fe986585fc56d208b35d0deec1912ff |
|
07-Sep-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Fix atomic load and store on x86 to pass -verify-machineinstrs (and possibly fix some subtle bugs involving passes which check mayStore()).
This isn't exactly ideal, but it is good enough for the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139245 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 863bd9d5cf86e57752975d1ab6779f3116a23b90 |
|
26-Jul-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Codegen allonesvector better while using AVX: vpcmpeqd + vinsertf128
This also fixes PR10452
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136004 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 1abf2cb59b8d63415780a03329307c0997b2670c |
|
15-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Rename createAsmInfo to createMCAsmInfo and move registration code to MCTargetDesc to prepare for next round of changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135219 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 0e29ed081b24359978916b997e91e3e1e2293915 |
|
20-May-2011 |
Stuart Hastings <stuart@apple.com> |
Re-commit 131641 with fixes; de-pseudoize MOVSX16rr8 and friends.
rdar://problem/8614450
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131746 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| d22f036c2ae48ab5d3a74ea08851caa4ec3dbba9 |
|
19-May-2011 |
Stuart Hastings <stuart@apple.com> |
Reverting 131641 to investigate 'bot complaint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131654 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| b6dcf3c51429cc7a444cc4b121886b2060a11278 |
|
19-May-2011 |
Stuart Hastings <stuart@apple.com> |
Revise MOVSX16rr8/MOVZX16rr8 (and rm variants) to no longer be
pseudos. rdar://problem/8614450
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131641 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 3c49706a61f5199fb1a6657834a3a71255466781 |
|
09-Dec-2010 |
Nate Begeman <natebegeman@mac.com> |
Add support for AVX to materialize +0.0 when doing scalar FP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121415 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| d652dbe72044b07a681b579a0a938c613ef15ae8 |
|
28-Nov-2010 |
Rafael Espindola <rafael.espindola@gmail.com> |
Move lowering of TLS_addr32 and TLS_addr64 to X86MCInstLower.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120263 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 21d272874b750201272ef3f00441b58932c3d769 |
|
15-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
tidy up, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119092 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 142b531e024c7b814df74951b378b9e3e11d0d42 |
|
14-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
move the pic base symbol stuff up to MachineFunction
since it is trivial and will be shared between ppc and x86.
This substantially simplifies the X86 backend also.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119089 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 4fd0ea01660d7e447f072a1032abf0d7537821bf |
|
14-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
simplify getPICBaseSymbol a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119088 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| de42e5c09b1e1aa597de7b3e09775e26a0f68aa6 |
|
26-Oct-2010 |
Rafael Espindola <rafael.espindola@gmail.com> |
handle X86::EH_RETURN64 and X86::EH_RETURN.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117378 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 15df55d8c238ddd4b595dc0d762fe4c391352f11 |
|
08-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
reapply: Use the new TB_NOT_REVERSABLE flag instead of special
reapply: reimplement the second half of the or/add optimization. We should now
with no changes. Turns out that one missing "Defs = [EFLAGS]" can upset things
a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116040 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 99ae6659daaebeb32df91653fad09748fda8bcb2 |
|
08-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
reapply the patch reverted in r116033:
"Reimplement (part of) the or -> add optimization. Matching 'or' into 'add'"
With a critical fix: the add pseudos clobber EFLAGS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116039 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| b88b00ba2b7d7be2939c55193900cf4e465098c3 |
|
08-Oct-2010 |
Daniel Dunbar <daniel@zuster.org> |
Revert "Reimplement (part of) the or -> add optimization. Matching 'or' into
'add'", which seems to have broken just about everything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116033 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 32f0cdba302d5f48401aadb9a2eb9e3efd9e6833 |
|
08-Oct-2010 |
Daniel Dunbar <daniel@zuster.org> |
Revert "reimplement the second half of the or/add optimization. We should now",
which depends on r116007, which I am about to revert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116031 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| cd3167b281f08e47a81438718122b6dd75a6316e |
|
08-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
reimplement the second half of the or/add optimization. We should now
only end up emitting LEA instead of OR. If we aren't able to promote
something into an LEA, we should never be emitting it as an ADD.
Add some testcases that we emit "or" in cases where we used to produce
an "add".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116026 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 122e2ea043918c77ebdd8936875f14282503d60f |
|
08-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
Reimplement (part of) the or -> add optimization. Matching 'or' into 'add'
is general goodness because it allows ORs to be converted to LEA to avoid
inserting copies. However, this is bad because it makes the generated .s
file less obvious and gives valgrind heartburn (tons of false positives in
bitfield code).
While the general fix should be in valgrind, we can at least try to avoid
emitting ADD instructions that *don't* get promoted to LEA. This is more
work because it requires introducing pseudo instructions to represents
"add that knows the bits are disjoint", but hey, people really love valgrind.
This fixes this testcase:
https://bugs.kde.org/show_bug.cgi?id=242137#c20
the add r/i cases are coming next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116007 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 0488fb649a56b7fc89a5814df5308813f9e5a85d |
|
01-Oct-2010 |
Dale Johannesen <dalej@apple.com> |
Massive rewrite of MMX:
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.
Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics.
MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces. Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.
The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115243 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| ab1deb998e7c57b9d320f4ca33b30894b4154722 |
|
08-Sep-2010 |
Dale Johannesen <dalej@apple.com> |
Check in forgotten file. Should fix build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113409 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 3a1e54a6b97f81d61d5de38d220b2b75746ae481 |
|
17-Aug-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
More fixes for win64:
- Do not clobber al during variadic calls, this is AMD64 ABI-only feature
- Emit wincall64, where necessary
Patch by Cameron Esfahani!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111289 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 321473d51dacec12d338a5574d4c942889b682c1 |
|
16-Aug-2010 |
Eli Friedman <eli.friedman@gmail.com> |
Don't attempt to SimplifyShortMoveForm in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111182 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 6da9cee0f1380694e67329d0e79788ede8c18c0c |
|
12-Aug-2010 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Define AVX 128-bit pattern versions of SET0PS/PD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110937 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 8c05a850f43cda2e62ac48562281f504ab763d59 |
|
12-Aug-2010 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Begin to support some vector operations for AVX 256-bit intructions. The long
term goal here is to be able to match enough of vector_shuffle and build_vector
so all avx intrinsics which aren't mapped to their own built-ins but to
shufflevector calls can be codegen'd. This is the first (baby) step, support
building zeroed vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110897 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| c34ea3770e2d3f24c037d4f469d27c08f7b0cb4b |
|
05-Aug-2010 |
Eric Christopher <echristo@apple.com> |
Handle the pseudo in MCInstLower.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110359 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 0123c1da3592e99b3fa75c81cdffa20bfc622c12 |
|
22-Jul-2010 |
Chris Lattner <sabre@nondot.org> |
X86MCInstLower now depends on AsmPrinter being around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109154 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|
| 908bafe6fa28c077195aa3a2eeace7f3de41ae4c |
|
22-Jul-2010 |
Chris Lattner <sabre@nondot.org> |
add some rough support for making mcinst lowering work without an
asmprinter or mangler around. This is option #B for killing off
X86InstrInfo::GetInstSizeInBytes. Option #A (killing
"needsexactsize") was sent for consideration to llvmdev.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109056 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
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| 6e8154354fd879d64c2406131370d61a6b123103 |
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21-Jul-2010 |
Chris Lattner <sabre@nondot.org> |
make asmprinter optional, even though passing in null will cause things to explode right now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108955 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
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| cb63ecba312194f7f9b53703ded8f0102141a02d |
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21-Jul-2010 |
Chris Lattner <sabre@nondot.org> |
continue pushing dependencies around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108952 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
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| c0115b5ca16af761199f17bf496403a5c7b710ec |
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21-Jul-2010 |
Chris Lattner <sabre@nondot.org> |
reduce X86MCInstLower dependencies on asmprinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108950 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
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| 0c13cf36adf5dc7560523c5cde7dfbbe32bdbe9e |
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21-Jul-2010 |
Chris Lattner <sabre@nondot.org> |
pass around MF, not MMI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108949 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
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| 7648bd428b42170b27b53a4faff33dc029579dcc |
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21-Jul-2010 |
Chris Lattner <sabre@nondot.org> |
cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108947 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
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| 1a34c83cafbeee42886c7a45dd31892c0747682e |
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21-Jul-2010 |
Chris Lattner <sabre@nondot.org> |
move two asmprinter methods into the asmprinter .cpp file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108945 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
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| aef40351f67ce6be3888450836d44ca4e0afd487 |
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20-Jul-2010 |
Chris Lattner <sabre@nondot.org> |
fix a layering problem by moving the x86 implementation
of AsmPrinter and InstLowering into libx86 and out of the
asmprinter subdirectory. Now X86/AsmPrinter just depends on
MC stuff, not all of codegen and LLVM IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108782 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86MCInstLower.cpp
|