Searched defs:Def (Results 1 - 25 of 48) sorted by relevance

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/external/llvm/examples/OCaml-Kaleidoscope/Chapter2/
H A Dtoken.ml9 | Def | Extern Constructor in type:token
/external/llvm/examples/OCaml-Kaleidoscope/Chapter3/
H A Dtoken.ml9 | Def | Extern Constructor in type:token
/external/llvm/examples/OCaml-Kaleidoscope/Chapter4/
H A Dtoken.ml9 | Def | Extern Constructor in type:token
/external/llvm/examples/OCaml-Kaleidoscope/Chapter5/
H A Dtoken.ml9 | Def | Extern Constructor in type:token
/external/llvm/examples/OCaml-Kaleidoscope/Chapter6/
H A Dtoken.ml9 | Def | Extern Constructor in type:token
/external/llvm/examples/OCaml-Kaleidoscope/Chapter7/
H A Dtoken.ml9 | Def | Extern Constructor in type:token
/external/llvm/lib/CodeGen/
H A DLiveInterval.cpp52 VNInfo *LiveInterval::createDeadDef(SlotIndex Def, argument
54 assert(!Def.isDead() && "Cannot define a value at the dead slot");
55 iterator I = find(Def);
57 VNInfo *VNI = getNextValue(Def, VNInfoAllocator);
58 ranges.push_back(LiveRange(Def, Def.getDeadSlot(), VNI));
61 if (SlotIndex::isSameInstr(Def, I->start)) {
62 assert(I->start == Def && "Cannot insert def, already live");
63 assert(I->valno->def == Def && "Inconsistent existing value def");
66 assert(SlotIndex::isEarlierInstr(Def,
169 SlotIndex Def = std::max(I->start, J->start); local
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H A DMachineCopyPropagation.cpp110 static bool isNopCopy(MachineInstr *CopyMI, unsigned Def, unsigned Src, argument
113 if (Def == SrcSrc)
115 if (TRI->isSubRegister(SrcSrc, Def)) {
117 unsigned SubIdx = TRI->getSubRegIndex(SrcSrc, Def);
128 DenseMap<unsigned, MachineInstr*> AvailCopyMap; // Def -> available copies map
129 DenseMap<unsigned, MachineInstr*> CopyMap; // Def -> copies map
130 SourceMap SrcMap; // Src -> Def map
138 unsigned Def = MI->getOperand(0).getReg(); local
141 if (TargetRegisterInfo::isVirtualRegister(Def) ||
149 if (!ReservedRegs.test(Def)
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H A DPeepholeOptimizer.cpp312 unsigned Def = 0; local
322 Def = Reg;
330 assert(Def && Src && "Malformed bitcast instruction!");
357 if (MRI->getRegClass(SrcSrc) != MRI->getRegClass(Def))
360 MRI->replaceRegWith(Def, SrcSrc);
H A DExecutionDepsFix.cpp119 int Def; member in struct:__anon8658::LiveReg
351 LiveRegs[rx].Def = -(1 << 20);
364 LiveRegs[rx].Def = -1;
382 LiveRegs[rx].Def = std::max(LiveRegs[rx].Def, fi->second[rx].Def);
422 LiveRegs[i].Def -= CurInstr;
475 unsigned Clearance = CurInstr - LiveRegs[rx].Def;
476 LiveRegs[rx].Def = CurInstr;
588 if (LR.Def <
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H A DLiveVariables.cpp199 MachineInstr *Def = PhysRegDef[SubReg]; local
200 if (!Def)
202 unsigned Dist = DistanceMap[Def];
205 LastDef = Def;
292 MachineInstr *Def = PhysRegDef[SubReg]; local
293 if (Def && Def != LastDef) {
296 unsigned Dist = DistanceMap[Def];
341 MachineInstr *Def = PhysRegDef[SubReg]; local
342 if (Def
750 const MachineInstr *Def = MRI.getVRegDef(Reg); local
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H A DScheduleDAGInstrs.cpp466 MachineInstr *Def = LIS->getInstructionFromIndex(VNI->def); local
467 // Phis and other noninstructions (after coalescing) have a NULL Def.
468 if (Def) {
469 SUnit *DefSU = getSUnit(Def);
471 // The reaching Def lives within this scheduling region.
479 int DefOp = Def->findRegisterDefOperandIdx(Reg);
481 TII->computeOperandLatency(InstrItins, Def, DefOp, MI, OperIdx);
484 TII->computeOperandLatency(InstrItins, Def, DefOp, MI, OperIdx,
H A DBranchFolding.cpp1719 unsigned Def = LocalDefs[i]; local
1720 if (LocalDefsSet.count(Def)) {
1721 TBB->addLiveIn(Def);
1722 FBB->addLiveIn(Def);
H A DLiveIntervalAnalysis.cpp955 LiveRange* Def; member in struct:LiveIntervals::HMEditor::RegRanges
956 RegRanges() : Use(0), EC(0), Dead(0), Def(0) {}
1168 BR[LI->reg].Def = LR;
1294 assert((LR->start < NewIdx || BR[LI->reg].Def == LR) &&
1295 "Def in bundle should be def range.");
1307 assert(BR[LI->reg].Dead == 0 && BR[LI->reg].Def == 0 &&
1317 assert(BR[LI->reg].Def == LR && "Reg should have def range.");
1321 BR[LI->reg].Dead = BR[LI->reg].Def;
1322 BR[LI->reg].Def = 0;
1386 assert(BR[LI->reg].Def
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/external/llvm/lib/VMCore/
H A DDominators.cpp96 // dominates - Return true if Def dominates a use in User. This performs
97 // the special checks necessary if Def and User are in the same basic block.
98 // Note that Def doesn't dominate a use in Def itself!
99 bool DominatorTree::dominates(const Instruction *Def, argument
102 const BasicBlock *DefBB = Def->getParent();
104 // Any unreachable use is dominated, even if Def == User.
113 if (Def == User)
120 if (isa<InvokeInst>(Def) || isa<PHINode>(User))
121 return dominates(Def, UseB
136 dominates(const Instruction *Def, const BasicBlock *UseBB) const argument
237 dominates(const Instruction *Def, const Use &U) const argument
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/external/llvm/lib/Analysis/
H A DMemDepPrinter.cpp30 Def, enumerator in enum:__anon8608::MemDepPrinter::DepType
68 return InstTypePair(dep.getInst(), Def);
92 = {"Clobber", "Def", "NonFuncLocal", "Unknown"};
/external/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGSDNodes.cpp110 static void CheckForPhysRegDependency(SDNode *Def, SDNode *User, unsigned Op, argument
122 if (Def->isMachineOpcode()) {
123 const MCInstrDesc &II = TII->get(Def->getMachineOpcode());
128 TRI->getMinimalPhysRegClass(Reg, Def->getValueType(ResNo));
618 void ScheduleDAGSDNodes::computeOperandLatency(SDNode *Def, SDNode *Use,
631 int Latency = TII->getOperandLatency(InstrItins, Def, DefIdx, Use, OpIdx);
/external/llvm/lib/Transforms/Utils/
H A DSimplifyIndVar.cpp266 /// pushIVUsers - Add all uses of Def to the current IV's worklist.
269 Instruction *Def,
273 for (Value::use_iterator UI = Def->use_begin(), E = Def->use_end();
279 // If Def is a LoopPhi, it may not be in the Simplified set, so check for
281 if (User != Def && Simplified.insert(User))
282 SimpleIVUsers.push_back(std::make_pair(User, Def));
268 pushIVUsers( Instruction *Def, SmallPtrSet<Instruction*,16> &Simplified, SmallVectorImpl< std::pair<Instruction*,Instruction*> > &SimpleIVUsers) argument
/external/llvm/utils/TableGen/
H A DSetTheory.cpp221 // Expand a Def into a set by evaluating one of its fields.
227 void expand(SetTheory &ST, Record *Def, RecSet &Elts) { argument
228 ST.evaluate(Def->getValueInit(FieldName), Elts);
264 if (DefInit *Def = dynamic_cast<DefInit*>(Expr)) {
265 if (const RecVec *Result = expand(Def->getDef()))
267 Elts.insert(Def->getDef());
H A DDAGISelMatcherGen.cpp583 Record *Def = DI->getDef(); local
584 if (Def->isSubClassOf("Register")) {
586 CGP.getTargetInfo().getRegBank().getReg(Def);
592 if (Def->getName() == "zero_reg") {
600 if (Def->isSubClassOf("RegisterOperand"))
601 Def = Def->getValueAsDef("RegClass");
602 if (Def->isSubClassOf("RegisterClass")) {
603 std::string Value = getQualifiedName(Def) + "RegClassID";
610 if (Def
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H A DSubtargetEmitter.cpp94 Record *Def = DefList[i]; local
97 OS << " const uint64_t " << Def->getName() << " = 1ULL << " << i << ";\n";
106 Record *Def = DefList[i]; local
109 OS << " " << Def->getName();
/external/llvm/include/llvm/Analysis/
H A DMemoryDependenceAnalysis.h57 /// Def - This is a dependence on the specified instruction which
70 /// 3. Dependence queries on calls return Def only when they are
74 Def, enumerator in enum:llvm::MemDepResult::DepType
106 assert(Inst && "Def requires inst");
107 return MemDepResult(PairTy(Inst, Def));
132 bool isDef() const { return Value.getInt() == Def; }
/external/llvm/lib/TableGen/
H A DTGLexer.h45 Bit, Bits, Class, Code, Dag, Def, Foreach, Defm, Field, In, Int, Let, List, enumerator in enum:llvm::tgtok::TokKind
/external/llvm/lib/Target/ARM/
H A DThumb2SizeReduction.cpp150 bool canAddPseudoFlagDep(MachineInstr *Def, MachineInstr *Use,
217 Thumb2SizeReduce::canAddPseudoFlagDep(MachineInstr *Def, MachineInstr *Use, argument
223 if (!Def)
229 for (unsigned i = 0, e = Def->getNumOperands(); i != e; ++i) {
230 const MachineOperand &MO = Def->getOperand(i);
/external/clang/lib/CodeGen/
H A DCGVTables.cpp161 const FunctionDecl *Def = 0; local
162 if (MD->hasBody(Def) && Def->isOutOfLine())

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