/external/llvm/lib/CodeGen/ |
H A D | IntrinsicLowering.cpp | 186 Value *Tmp3 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8), local 192 Tmp3 = Builder.CreateAnd(Tmp3, 198 Tmp4 = Builder.CreateOr(Tmp4, Tmp3, "bswap.or1"); 214 Value* Tmp3 = Builder.CreateLShr(V, local 239 Tmp3 = Builder.CreateAnd(Tmp3, 249 Tmp4 = Builder.CreateOr(Tmp4, Tmp3, "bswap.or3");
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeDAG.cpp | 573 SDValue Tmp3 = Idx; local 583 EVT IdxVT = Tmp3.getValueType(); 596 Tmp3 = DAG.getNode(CastOpc, dl, PtrVT, Tmp3); 599 Tmp3 = DAG.getNode(ISD::MUL, dl, IdxVT, Tmp3,DAG.getConstant(EltSize, IdxVT)); 600 SDValue StackPtr2 = DAG.getNode(ISD::ADD, dl, IdxVT, Tmp3, StackPtr); 1550 SDValue Tmp3 = Node->getOperand(2); 1560 unsigned Align = cast<ConstantSDNode>(Tmp3)->getZExtValue(); 2323 SDValue Tmp1, Tmp2, Tmp3, Tmp [all...] |
H A D | LegalizeFloatTypes.cpp | 1308 SDValue Tmp1, Tmp2, Tmp3; local 1313 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); 1319 NewLHS = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp3);
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/external/clang/lib/CodeGen/ |
H A D | CGExprComplex.cpp | 545 llvm::Value *Tmp3 = Builder.CreateFAdd(Tmp1, Tmp2); // ac+bd local 555 DSTr = Builder.CreateFDiv(Tmp3, Tmp6); 561 llvm::Value *Tmp3 = Builder.CreateAdd(Tmp1, Tmp2); // ac+bd local 572 DSTr = Builder.CreateUDiv(Tmp3, Tmp6); 575 DSTr = Builder.CreateSDiv(Tmp3, Tmp6);
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 1473 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; local 1474 if (!SelectAddr(Node, In1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) 1478 const SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, In2L, In2H, Chain}; 1501 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; local 1502 if (!SelectAddr(Node, Ptr, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) 1624 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Chain }; 1630 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Val, Chain }; 1713 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; local 1714 if (!SelectAddr(Node, Ptr, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) 1785 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp 2232 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; local 2349 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; local 2357 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Move, Chain; local [all...] |
H A D | X86ISelLowering.cpp | 7749 SDValue Tmp2, Tmp3; local 7752 Tmp3 = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt); 7755 Tmp3 = DAG.getNode(isSRA ? ISD::SRA : ISD::SRL, dl, VT, ShOpHi, ShAmt); 7765 SDValue Ops0[4] = { Tmp2, Tmp3, CC, Cond }; 7766 SDValue Ops1[4] = { Tmp3, Tmp1, CC, Cond };
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 767 SDValue Tmp3 = DAG.getNode(ISD::ADD, dl, getPointerTy(), VAList, local 771 Tmp3 = DAG.getStore(VAList.getValue(1), dl, Tmp3, Node->getOperand(1), 774 return DAG.getLoad(VT, dl, Tmp3, VAList, MachinePointerInfo(),
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/external/llvm/lib/Transforms/Utils/ |
H A D | SimplifyCFG.cpp | 2029 APInt Tmp3 = MultiplyAndLosePrecision(B, C, A, D, BitsLost); local 2037 APInt Tmp4 = Tmp2.uadd_ov(Tmp3, Overflow1); 2044 Tmp3 = Tmp3.lshr(1); 2045 Tmp4 = Tmp2 + Tmp3;
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 3948 SDValue Tmp3 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Tmp1); local 3949 SDValue Tmp4 = DAG.getNode(ISD::OR , dl, VT, Tmp2, Tmp3); 3977 SDValue Tmp3 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Tmp1); local 3978 SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); 4005 SDValue Tmp3 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Tmp1); local 4006 SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3);
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/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 3460 SDValue Tmp3 = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ExtraShAmt); local 3467 SDValue Hi = DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, Tmp3, ARMcc,
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