Searched defs:V0 (Results 1 - 11 of 11) sorted by relevance

/external/skia/tests/
H A DClampRangeTest.cpp46 #define V0 -42 macro
62 int v = classify_value(fx, V0, V1);
76 int v = classify_value(fx, V0, V1);
85 range.init(fx, dx, count, V0, V1);
/external/clang/test/CodeGen/
H A Dext-vector.c282 int4 test15(uint4 V0) { argument
284 int4 V = !V0;
/external/llvm/unittests/Analysis/
H A DScalarEvolutionTest.cpp48 Value *V0 = new GlobalVariable(M, Ty, false, GlobalValue::ExternalLinkage, Init, "V0"); local
56 const SCEV *S0 = SE.getSCEV(V0);
76 EXPECT_EQ(cast<SCEVUnknown>(M0->getOperand(1))->getValue(), V0);
82 V1->replaceAllUsesWith(V0);
84 // After the RAUWs, these should all be pointing to V0.
85 EXPECT_EQ(cast<SCEVUnknown>(M0->getOperand(1))->getValue(), V0);
86 EXPECT_EQ(cast<SCEVUnknown>(M1->getOperand(1))->getValue(), V0);
87 EXPECT_EQ(cast<SCEVUnknown>(M2->getOperand(1))->getValue(), V0);
/external/fdlibm/
H A De_j1.c147 static const double V0[5] = { variable
149 static double V0[5] = {
208 v = one+z*(V0[0]+z*(V0[1]+z*(V0[2]+z*(V0[3]+z*V0[4]))));
/external/llvm/utils/PerfectShuffle/
H A DPerfectShuffle.cpp29 static inline unsigned short MakeMask(unsigned V0, unsigned V1, argument
31 return (V0 << (3*4)) | (V1 << (2*4)) | (V2 << (1*4)) | (V3 << (0*4));
/external/llvm/lib/Target/Mips/
H A DMipsISelDAGToDAG.cpp128 unsigned V0, V1, V2, GlobalBaseReg = MipsFI->getGlobalBaseReg(); local
138 V0 = RegInfo.createVirtualRegister(RC);
150 BuildMI(MBB, I, DL, TII.get(Mips::LUi64), V0)
152 BuildMI(MBB, I, DL, TII.get(Mips::DADDu), V1).addReg(V0)
160 BuildMI(MBB, I, DL, TII.get(Mips::LiRxImmX16), V0)
164 BuildMI(MBB, I, DL, TII.get(Mips::SllX16), V2).addReg(V0).addImm(16);
175 BuildMI(MBB, I, DL, TII.get(Mips::LUi), V0)
177 BuildMI(MBB, I, DL, TII.get(Mips::ADDiu), GlobalBaseReg).addReg(V0)
190 BuildMI(MBB, I, DL, TII.get(Mips::LUi), V0)
192 BuildMI(MBB, I, DL, TII.get(Mips::ADDu), V1).addReg(V0)
[all...]
/external/clang/lib/Driver/
H A DToolChains.h263 bool isIPhoneOSVersionLT(unsigned V0, unsigned V1=0, unsigned V2=0) const { argument
265 return TargetVersion < VersionTuple(V0, V1, V2);
268 bool isMacosxVersionLT(unsigned V0, unsigned V1=0, unsigned V2=0) const { argument
270 return TargetVersion < VersionTuple(V0, V1, V2);
/external/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp269 SDNode *PairSRegs(EVT VT, SDValue V0, SDValue V1);
270 SDNode *PairDRegs(EVT VT, SDValue V0, SDValue V1);
271 SDNode *PairQRegs(EVT VT, SDValue V0, SDValue V1);
274 SDNode *QuadSRegs(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3);
275 SDNode *QuadDRegs(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3);
276 SDNode *QuadQRegs(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3);
1445 SDNode *ARMDAGToDAGISel::PairSRegs(EVT VT, SDValue V0, SDValue V1) { argument
1446 DebugLoc dl = V0.getNode()->getDebugLoc();
1451 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 };
1457 SDNode *ARMDAGToDAGISel::PairDRegs(EVT VT, SDValue V0, SDValu argument
1468 PairQRegs(EVT VT, SDValue V0, SDValue V1) argument
1479 QuadSRegs(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3) argument
1495 QuadDRegs(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3) argument
1510 QuadQRegs(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3) argument
1780 SDValue V0 = N->getOperand(Vec0Idx + 0); local
1833 SDValue V0 = N->getOperand(Vec0Idx + 0); local
1945 SDValue V0 = N->getOperand(Vec0Idx + 0); local
2083 SDValue V0 = N->getOperand(FirstTblReg + 0); local
3292 SDValue V0 = N->getOperand(0); local
[all...]
/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp2897 SDValue V0 = GetPromotedInteger(N->getOperand(0)); local
2899 EVT OutVT = V0.getValueType();
2901 return DAG.getVectorShuffle(OutVT, dl, V0, V1, &NewMask[0]);
2979 SDValue V0 = GetPromotedInteger(N->getOperand(0)); local
2984 V0, ConvElem, N->getOperand(2));
2989 SDValue V0 = GetPromotedInteger(N->getOperand(0)); local
2992 V0->getValueType(0).getScalarType(), V0, V1);
/external/qemu/target-mips/
H A Dcpu.h32 uint_fast16_t V0:1; member in struct:r4k_tlb_t
/external/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp8532 SDValue V0 = DAG.getNode(ISD::TRUNCATE, dl, VT, WideVal.getOperand(0)); local
8534 Op = DAG.getNode(ConvertedOp, dl, VT, V0, V1);

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