Searched defs:irq (Results 1 - 25 of 56) sorted by relevance

123

/external/kernel-headers/original/asm-x86/
H A Dirq_32.h5 * linux/include/asm/irq.h
18 static __inline__ int irq_canonicalize(int irq) argument
20 return ((irq == 2) ? 9 : irq);
/external/qemu/hw/
H A Dirq.h10 void qemu_set_irq(qemu_irq irq, int level);
12 static inline void qemu_irq_raise(qemu_irq irq) argument
14 qemu_set_irq(irq, 1);
17 static inline void qemu_irq_lower(qemu_irq irq) argument
19 qemu_set_irq(irq, 0);
22 static inline void qemu_irq_pulse(qemu_irq irq) argument
24 qemu_set_irq(irq, 1);
25 qemu_set_irq(irq, 0);
33 qemu_irq qemu_irq_invert(qemu_irq irq);
H A Darm_pic.c25 static void arm_pic_cpu_handler(void *opaque, int irq, int level) argument
28 switch (irq) {
42 hw_error("arm_pic_cpu_handler: Bad interrput line %d\n", irq);
H A Dmips_int.c21 static void cpu_mips_irq_request(void *opaque, int irq, int level) argument
25 if (irq < 0 || irq > 7)
29 env->CP0_Cause |= 1 << (irq + CP0Ca_IP);
31 env->CP0_Cause &= ~(1 << (irq + CP0Ca_IP));
43 env->irq[i] = qi[i];
H A Dmips_pic.c17 static void mips_cpu_irq_handler(void *opaque, int irq, int level) argument
22 if (irq < 0 || 7 < irq)
24 irq);
26 causebit = 0x00000100 << irq;
H A Dgoldfish_device.h24 uint32_t irq; // filled in by goldfish_device_add if 0 member in struct:goldfish_device
29 void goldfish_device_set_irq(struct goldfish_device *dev, int irq, int level);
37 void goldfish_device_init(qemu_irq *pic, uint32_t base, uint32_t size, uint32_t irq, uint32_t irq_count);
38 int goldfish_device_bus_init(uint32_t base, uint32_t irq);
43 int goldfish_tty_add(CharDriverState *cs, int id, uint32_t base, int irq);
55 void events_dev_init(uint32_t base, qemu_irq irq);
H A Dirq.c25 #include "irq.h"
33 void qemu_set_irq(qemu_irq irq, int level) argument
35 if (!irq)
38 irq->handler(irq->opaque, irq->n, level);
67 struct IRQState *irq = opaque; local
69 irq->handler(irq->opaque, irq
72 qemu_irq_invert(qemu_irq irq) argument
[all...]
H A Dsysbus.h49 void sysbus_connect_irq(SysBusDevice *dev, int n, qemu_irq irq);
57 qemu_irq irq)
59 return sysbus_create_varargs(name, addr, irq, NULL);
55 sysbus_create_simple(const char *name, target_phys_addr_t addr, qemu_irq irq) argument
H A Dgoldfish_interrupt.c15 #include "irq.h"
73 static void goldfish_int_set_irq(void *opaque, int irq, int level) argument
76 uint32_t mask = (1U << irq);
H A Dpcmcia.h9 qemu_irq irq; member in struct:__anon10981
H A Dsysbus.c25 void sysbus_connect_irq(SysBusDevice *dev, int n, qemu_irq irq) argument
30 *dev->irqp[n] = irq;
134 qemu_irq irq; local
146 irq = va_arg(va, qemu_irq);
147 if (!irq) {
150 sysbus_connect_irq(s, n, irq);
H A Darmv7m_nvic.c89 void armv7m_nvic_set_pending(void *opaque, int irq) argument
92 if (irq >= 16)
93 irq += 16;
94 gic_set_pending_private(&s->gic, 0, irq);
101 uint32_t irq; local
103 irq = gic_acknowledge_irq(&s->gic, 0);
104 if (irq == 1023)
106 if (irq >= 32)
107 irq -= 16;
108 return irq;
111 armv7m_nvic_complete_irq(void *opaque, int irq) argument
123 int irq; local
339 int irq; local
[all...]
H A Dgoldfish_device.c46 void goldfish_device_set_irq(struct goldfish_device *dev, int irq, int level) argument
48 if(irq >= dev->irq_count)
49 cpu_abort (cpu_single_env, "goldfish_device_set_irq: Bad irq %d >= %d\n", irq, dev->irq_count);
51 qemu_set_irq(goldfish_pic[dev->irq + irq], level);
60 if(dev->irq == 0 && dev->irq_count > 0) {
61 dev->irq = goldfish_free_irq;
76 //printf("goldfish_add_device: %s, base %x %x, irq %d %d\n",
77 // dev->name, dev->base, dev->size, dev->irq, de
204 goldfish_device_init(qemu_irq *pic, uint32_t base, uint32_t size, uint32_t irq, uint32_t irq_count) argument
211 goldfish_device_bus_init(uint32_t base, uint32_t irq) argument
[all...]
H A Dgoldfish_tty.c209 int goldfish_tty_add(CharDriverState *cs, int id, uint32_t base, int irq) argument
220 s->dev.irq = irq;
H A Di8254.c50 /* irq handling */
53 qemu_irq irq; member in struct:PITChannelState
285 /* XXX: update irq timer ? */
372 qemu_set_irq(s->irq, irq_level);
488 PITState *pit_init(int base, qemu_irq irq) argument
496 s->irq = irq;
H A Dgoldfish_events_device.c17 #include "irq.h"
52 qemu_irq irq; member in struct:__anon10955
132 qemu_irq_raise(s->irq);
161 qemu_irq_lower(s->irq);
176 qemu_irq_lower(s->irq);
177 qemu_irq_raise(s->irq);
226 qemu_irq_raise(s->irq);
349 void events_dev_init(uint32_t base, qemu_irq irq) argument
524 s->irq = irq;
[all...]
/external/kernel-headers/original/asm-mips/
H A Dirq.h16 #include <irq.h>
19 static inline int irq_canonicalize(int irq) argument
21 return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq);
24 #define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
32 extern int setup_irq_smtc(unsigned int irq, struct irqaction * new,
35 static inline void smtc_im_ack_irq(unsigned int irq) argument
37 if (irq_hwmask[irq] & ST0_IM)
38 set_c0_status(irq_hwmask[irq]
43 smtc_im_ack_irq(unsigned int irq) argument
[all...]
H A Di8259.h21 #include <irq.h>
40 extern int i8259A_irq_pending(unsigned int irq);
41 extern void make_8259A_irq(unsigned int irq);
52 int irq; local
58 irq = inb(PIC_MASTER_CMD) & 7;
59 if (irq == PIC_CASCADE_IR) {
65 irq = (inb(PIC_SLAVE_CMD) & 7) + 8;
68 if (unlikely(irq == 7)) {
78 irq = -1;
83 return likely(irq >
[all...]
/external/linux-tools-perf/scripts/perl/
H A Dcheck-perf-trace.pl28 sub irq::softirq_entry subroutine
40 symbol_str("irq::softirq_entry", "vec", $vec));
/external/kernel-headers/original/linux/
H A Dkernel_stat.h4 #include <asm/irq.h>
22 cputime64_t irq; member in struct:cpu_usage_stat
44 static inline int kstat_irqs(int irq) argument
49 sum += kstat_cpu(cpu).irqs[irq];
H A Dinterrupt.h36 * irq handling routines.
39 * IRQF_SAMPLE_RANDOM - irq is used to feed the random generator
40 * IRQF_SHARED - allow sharing the irq among several devices
74 int irq; member in struct:irqaction
103 extern void disable_irq_nosync(unsigned int irq);
104 extern void disable_irq(unsigned int irq);
105 extern void enable_irq(unsigned int irq);
108 * Special lockdep variants of irq disabling/enabling.
110 * know that a particular irq context which is disabled,
111 * and which is the only irq
118 disable_irq_nosync_lockdep(unsigned int irq) argument
126 disable_irq_lockdep(unsigned int irq) argument
134 enable_irq_lockdep(unsigned int irq) argument
145 enable_irq_wake(unsigned int irq) argument
150 disable_irq_wake(unsigned int irq) argument
[all...]
H A Dirq.h22 #include <asm/irq.h>
59 #define IRQ_NOAUTOEN 0x08000000 /* IRQ will not be enabled on request irq */
89 unsigned int (*startup)(unsigned int irq);
90 void (*shutdown)(unsigned int irq);
91 void (*enable)(unsigned int irq);
92 void (*disable)(unsigned int irq);
94 void (*ack)(unsigned int irq);
95 void (*mask)(unsigned int irq);
96 void (*mask_ack)(unsigned int irq);
97 void (*unmask)(unsigned int irq);
193 set_native_irq_info(int irq, cpumask_t mask) argument
198 set_native_irq_info(int irq, cpumask_t mask) argument
218 move_irq(int irq) argument
222 set_irq_info(int irq, cpumask_t mask) argument
228 move_irq(int irq) argument
233 set_irq_info(int irq, cpumask_t mask) argument
242 move_irq(int irq) argument
246 move_native_irq(int irq) argument
250 set_pending_irq(unsigned int irq, cpumask_t mask) argument
254 set_irq_info(int irq, cpumask_t mask) argument
271 set_balance_irq_affinity(unsigned int irq, cpumask_t mask) argument
279 select_smp_affinity(unsigned int irq) argument
331 generic_handle_irq(unsigned int irq, struct pt_regs *regs) argument
376 set_irq_handler(unsigned int irq, void fastcall (*handle)(unsigned int, struct irq_desc *, struct pt_regs *)) argument
389 set_irq_chained_handler(unsigned int irq, void fastcall (*handle)(unsigned int, struct irq_desc *, struct pt_regs *)) argument
[all...]
/external/oprofile/module/x86/
H A Dop_rtc.c30 static void do_rtc_interrupt(int irq, void * dev_id, struct pt_regs * regs) argument
/external/quake/quake/src/WinQuake/
H A Dsnd_dos.cpp51 static int irq; variable
110 sscanf(param+1, "%d", &irq);
/external/oprofile/module/ia64/
H A Dop_pmu.c70 op_raw_pmu_interrupt(int irq, void * arg, struct pt_regs * regs) argument
107 /* Try it legally - confusion about vec vs irq */

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