/external/smali/dexlib/src/main/java/org/jf/dexlib/Code/Format/ |
H A D | ArrayDataPseudoInstruction.java | 65 throw new RuntimeException("Invalid opcode byte for an ArrayData pseudo-instruction"); 70 throw new RuntimeException("Invalid sub-opcode byte for an ArrayData pseudo-instruction"); 145 public Instruction makeInstruction(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex) { argument 146 if (opcode != Opcode.NOP) { 147 throw new RuntimeException("The opcode for an ArrayDataPseudoInstruction must be NOP");
|
H A D | PackedSwitchDataPseudoInstruction.java | 67 throw new RuntimeException("Invalid opcode byte for a PackedSwitchData pseudo-instruction"); 71 throw new RuntimeException("Invalid sub-opcode byte for a PackedSwitchData pseudo-instruction"); 151 public Instruction makeInstruction(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex) { argument 152 if (opcode != Opcode.NOP) { 153 throw new RuntimeException("The opcode for a PackedSwitchDataPseudoInstruction must be NOP");
|
/external/openssl/crypto/bn/asm/ |
H A D | parisc-mont.pl | 910 { my $opcode=(0x03<<26)|($2<<21)|($1<<16)|(3<<6)|$3; 911 sprintf "\t.WORD\t0x%08x\t; %s",$opcode,$orig; 914 { my $opcode=(0x03<<26)|($2<<21)|(1<<12)|(3<<6)|$3; 915 $opcode|=(($1&0xF)<<17)|(($1&0x10)<<12); # encode offset 916 $opcode|=(1<<5) if ($mod =~ /^,m/); 917 $opcode|=(1<<13) if ($mod =~ /^,mb/); 918 sprintf "\t.WORD\t0x%08x\t; %s",$opcode,$orig; 928 { my $opcode=(0x03<<26)|($3<<21)|($1<<16)|(1<<12)|(0xB<<6); 929 $opcode|=(($2&0xF)<<1)|(($2&0x10)>>4); # encode offset 930 $opcode| [all...] |
/external/webkit/Source/JavaScriptCore/assembler/ |
H A D | X86Assembler.h | 1683 // In addition to the opcode, the following operand permutations are supported: 1685 // * One register - the low three bits of the RegisterID are added into the opcode. 1693 // The twoByteOp methods plant two-byte Intel instructions sequences (first opcode byte 0x0F). 1695 void oneByteOp(OneByteOpcodeID opcode) argument 1698 m_buffer.putByteUnchecked(opcode); 1701 void oneByteOp(OneByteOpcodeID opcode, RegisterID reg) argument 1705 m_buffer.putByteUnchecked(opcode + (reg & 7)); 1708 void oneByteOp(OneByteOpcodeID opcode, int reg, RegisterID rm) argument 1712 m_buffer.putByteUnchecked(opcode); 1716 void oneByteOp(OneByteOpcodeID opcode, in argument 1724 oneByteOp_disp32(OneByteOpcodeID opcode, int reg, RegisterID base, int offset) argument 1732 oneByteOp(OneByteOpcodeID opcode, int reg, RegisterID base, RegisterID index, int scale, int offset) argument 1741 oneByteOp(OneByteOpcodeID opcode, int reg, const void* address) argument 1749 twoByteOp(TwoByteOpcodeID opcode) argument 1756 twoByteOp(TwoByteOpcodeID opcode, int reg, RegisterID rm) argument 1765 twoByteOp(TwoByteOpcodeID opcode, int reg, RegisterID base, int offset) argument 1774 twoByteOp(TwoByteOpcodeID opcode, int reg, RegisterID base, RegisterID index, int scale, int offset) argument 1784 twoByteOp(TwoByteOpcodeID opcode, int reg, const void* address) argument 1800 oneByteOp64(OneByteOpcodeID opcode) argument 1807 oneByteOp64(OneByteOpcodeID opcode, RegisterID reg) argument 1814 oneByteOp64(OneByteOpcodeID opcode, int reg, RegisterID rm) argument 1822 oneByteOp64(OneByteOpcodeID opcode, int reg, RegisterID base, int offset) argument 1830 oneByteOp64_disp32(OneByteOpcodeID opcode, int reg, RegisterID base, int offset) argument 1838 oneByteOp64(OneByteOpcodeID opcode, int reg, RegisterID base, RegisterID index, int scale, int offset) argument 1846 twoByteOp64(TwoByteOpcodeID opcode, int reg, RegisterID rm) argument 1881 oneByteOp8(OneByteOpcodeID opcode, GroupOpcodeID groupOp, RegisterID rm) argument 1889 twoByteOp8(TwoByteOpcodeID opcode, RegisterID reg, RegisterID rm) argument 1898 twoByteOp8(TwoByteOpcodeID opcode, GroupOpcodeID groupOp, RegisterID rm) argument [all...] |
/external/llvm/lib/Target/X86/Disassembler/ |
H A D | X86DisassemblerDecoder.c | 53 * @param type - The opcode type (i.e., how many bytes it has). 56 * @param opcode - The last byte of the instruction's opcode, not counting 62 uint8_t opcode) { 86 return decision->opcodeDecisions[insnContext].modRMDecisions[opcode]. 96 * @param opcode - See modRMRequired(). 102 uint8_t opcode, 108 dec = &ONEBYTE_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode]; 111 dec = &TWOBYTE_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode]; 114 dec = &THREEBYTE38_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode]; 60 modRMRequired(OpcodeType type, InstructionContext insnContext, uint8_t opcode) argument 100 decode(OpcodeType type, InstructionContext insnContext, uint8_t opcode, uint8_t modRM) argument [all...] |
/external/webkit/Source/JavaScriptCore/bytecode/ |
H A D | CodeBlock.cpp | 214 OpcodeID currentOpcode = exec->interpreter()->getOpcodeID(instructions[i].u.opcode); 290 if (vPC[0].u.opcode == interpreter->getOpcode(op_get_by_id)) { 294 if (vPC[0].u.opcode == interpreter->getOpcode(op_get_by_id_self)) { 298 if (vPC[0].u.opcode == interpreter->getOpcode(op_get_by_id_proto)) { 302 if (vPC[0].u.opcode == interpreter->getOpcode(op_put_by_id_transition)) { 306 if (vPC[0].u.opcode == interpreter->getOpcode(op_get_by_id_chain)) { 310 if (vPC[0].u.opcode == interpreter->getOpcode(op_put_by_id)) { 314 if (vPC[0].u.opcode == interpreter->getOpcode(op_put_by_id_replace)) { 318 if (vPC[0].u.opcode == interpreter->getOpcode(op_resolve_global)) { 322 if (vPC[0].u.opcode [all...] |
/external/v8/src/ |
H A D | deoptimizer.cc | 551 Translation::Opcode opcode = local 553 ASSERT(Translation::BEGIN == opcode); 554 USE(opcode); 569 Translation::Opcode opcode = local 571 switch (opcode) { 686 Translation::Opcode opcode = local 688 while (opcode == Translation::DUPLICATE) { 689 opcode = static_cast<Translation::Opcode>(iterator->Next()); 690 iterator->Skip(Translation::NumberOfOperandsFor(opcode)); 691 opcode 874 Translation::Opcode opcode = local 1408 NumberOfOperandsFor(Opcode opcode) argument 1435 StringFor(Opcode opcode) argument 1493 Translation::Opcode opcode = local 1573 Translation::Opcode opcode = static_cast<Translation::Opcode>(it.Next()); local [all...] |
H A D | frames.cc | 840 Translation::Opcode opcode = static_cast<Translation::Opcode>(it.Next()); local 841 ASSERT(opcode == Translation::BEGIN); 850 opcode = static_cast<Translation::Opcode>(it.Next()); 851 if (opcode == Translation::JS_FRAME) { 862 opcode = static_cast<Translation::Opcode>(it.Next()); 863 ASSERT(opcode == Translation::STACK_SLOT || 864 opcode == Translation::LITERAL); 869 if (opcode == Translation::LITERAL) { 902 } else if (opcode == Translation::CONSTRUCT_STUB_FRAME) { 904 it.Skip(Translation::NumberOfOperandsFor(opcode)); 949 Translation::Opcode opcode = static_cast<Translation::Opcode>(it.Next()); local 967 Translation::Opcode opcode = static_cast<Translation::Opcode>(it.Next()); local [all...] |
/external/smali/dexlib/src/main/java/org/jf/dexlib/Code/Analysis/ |
H A D | MethodAnalyzer.java | 201 if (instructionToAnalyze.originalInstruction.opcode.odexOnly()) { 219 ex.addContext(String.format("opcode: %s", instructionToAnalyze.instruction.opcode.name)); 303 ex.addContext(String.format("opcode: %s", instructionToVerify.instruction.opcode.name)); 479 Opcode instructionOpcode = instruction.instruction.opcode; 522 Opcode instructionOpcode = instruction.instruction.opcode; 525 if (instruction.instruction.opcode.canContinue()) { 526 if (instruction.instruction.opcode != Opcode.NOP || 572 if (!allowMoveException && successor.instruction.opcode [all...] |
/external/v8/src/mips/ |
H A D | assembler-mips.cc | 502 uint32_t opcode = GetOpcodeField(instr); local 507 return opcode == BEQ || 508 opcode == BNE || 509 opcode == BLEZ || 510 opcode == BGTZ || 511 opcode == BEQL || 512 opcode == BNEL || 513 opcode == BLEZL || 514 opcode == BGTZL || 515 (opcode 533 uint32_t opcode = GetOpcodeField(instr); local 545 uint32_t opcode = GetOpcodeField(instr); local 565 uint32_t opcode = GetOpcodeField(instr); local 572 uint32_t opcode = GetOpcodeField(instr); local 853 GenInstrRegister(Opcode opcode, Register rs, Register rt, Register rd, uint16_t sa, SecondaryField func) argument 866 GenInstrRegister(Opcode opcode, Register rs, Register rt, uint16_t msb, uint16_t lsb, SecondaryField func) argument 879 GenInstrRegister(Opcode opcode, SecondaryField fmt, FPURegister ft, FPURegister fs, FPURegister fd, SecondaryField func) argument 893 GenInstrRegister(Opcode opcode, SecondaryField fmt, Register rt, FPURegister fs, FPURegister fd, SecondaryField func) argument 907 GenInstrRegister(Opcode opcode, SecondaryField fmt, Register rt, FPUControlRegister fs, SecondaryField func) argument 922 GenInstrImmediate(Opcode opcode, Register rs, Register rt, int32_t j) argument 933 GenInstrImmediate(Opcode opcode, Register rs, SecondaryField SF, int32_t j) argument 943 GenInstrImmediate(Opcode opcode, Register rs, FPURegister ft, int32_t j) argument 955 GenInstrJump(Opcode opcode, uint32_t address) argument [all...] |
/external/bluetooth/bluedroid/btif/include/ |
H A D | btif_api.h | 326 bt_status_t btif_dut_mode_send(uint16_t opcode, uint8_t *buf, uint8_t len);
|
/external/kernel-headers/original/asm-x86/ |
H A D | alternative_32.h | 152 extern void text_poke(void *addr, unsigned char *opcode, int len);
|
/external/llvm/lib/VMCore/ |
H A D | ConstantFold.h | 31 unsigned opcode, ///< The opcode of the cast
|
/external/proguard/src/proguard/optimize/info/ |
H A D | InstanceofClassMarker.java | 51 if (constantInstruction.opcode == InstructionConstants.OP_INSTANCEOF)
|
H A D | InstantiationClassMarker.java | 51 if (constantInstruction.opcode == InstructionConstants.OP_NEW)
|
H A D | SuperInvocationMarker.java | 52 if (constantInstruction.opcode == InstructionConstants.OP_INVOKESPECIAL)
|
/external/proguard/src/proguard/optimize/peephole/ |
H A D | NopRemover.java | 77 if (simpleInstruction.opcode == InstructionConstants.OP_NOP &&
|
/external/dexmaker/src/dx/java/com/android/dx/dex/code/ |
H A D | OutputFinisher.java | 340 * <li>picking a final opcode for each instruction</li> 369 * the opcode out of each instruction into a separate array, to be 393 * opcode selections 443 * opcode selections 465 * expanded opcode and reserve registers for it. 484 * Attempts to fit the given instruction into a specific opcode, 485 * returning the opcode whose format that the instruction fits 488 * opcode as a first "best guess" and then pessimizes from there 493 * opcode; {@code null} means that no simple opcode fit [all...] |
/external/llvm/lib/DebugInfo/ |
H A D | DWARFDebugLine.cpp | 240 uint8_t opcode = debug_line_data.getU8(offset_ptr); local 242 if (opcode == 0) { 243 // Extended Opcodes always start with a zero opcode followed by 306 // Length doesn't include the zero opcode byte or the length itself, but 311 } else if (opcode < prologue->OpcodeBase) { 312 switch (opcode) { 362 // opcode 255. The motivation for DW_LNS_const_add_pc is this: 364 // small amount, it can use a single special opcode, which occupies 366 // twice the range of the last special opcode, it can use 367 // DW_LNS_const_add_pc followed by a special opcode, fo [all...] |
/external/dexmaker/src/dx/java/com/android/dx/ssa/ |
H A D | SCCP.java | 242 Rop opcode = insn.getOpcode(); 249 if (opcode.getBranchingness() == Rop.BRANCH_IF) { 275 switch (opcode.getOpcode()) { 307 switch (opcode.getOpcode()) { 368 int opcode = insn.getOpcode().getOpcode(); 405 switch (opcode) { 477 int opcode = insn.getOpcode().getOpcode(); 482 if (opcode == RegOps.DIV || opcode == RegOps.REM) { 494 switch (opcode) { [all...] |
/external/chromium/sdch/open-vcdiff/src/ |
H A D | codetable.cc | 56 { { R, // opcode 0 78 { N, // opcode 0 100 { 0, // opcode 0 122 { 0, // opcode 0 144 { 0, // opcode 0 166 { 0, // opcode 0 188 bool VCDiffCodeTableData::ValidateOpcode(int opcode, argument 198 LOG(ERROR) << "VCDiff: Bad code table; opcode " << opcode << " has invalid " 204 LOG(ERROR) << "VCDiff: Bad code table; opcode " << opcod [all...] |
/external/openssl/crypto/sha/asm/ |
H A D | sha512-parisc.pl | 698 { my $opcode=(0x14<<26)|($2<<21)|($3<<16)|(($1&0x1FF8)<<1)|(($1>>13)&1); 699 $opcode|=(1<<3) if ($mod =~ /^,m/); 700 $opcode|=(1<<2) if ($mod =~ /^,mb/); 701 sprintf "\t.WORD\t0x%08x\t; %s",$opcode,$orig; 711 { my $opcode=(0x1c<<26)|($3<<21)|($1<<16)|(($2&0x1FF8)<<1)|(($2>>13)&1); 712 sprintf "\t.WORD\t0x%08x\t; %s",$opcode,$orig; 723 { my $opcode=(0x36<<26)|($1<<21)|($4<<16); 725 $opcode |= (($2&0x20)<<6)|(($2&0x1f)<<5); # encode pos 726 $opcode |= (($len&0x20)<<7)|($len&0x1f); # encode len 727 sprintf "\t.WORD\t0x%08x\t; %s",$opcode, [all...] |
/external/chromium-trace/trace-viewer/third_party/pywebsocket/src/test/ |
H A D | test_mux.py | 90 opcode, payload, fin, rsv1, rsv2, rsv3 = ( 96 if opcode == common.OPCODE_CONTINUATION: 97 raise Exception('Sending invalid continuation opcode') 98 self._current_opcode = opcode 100 if opcode != common.OPCODE_CONTINUATION: 101 raise Exception('Sending invalid opcode %d' % opcode) 125 raise Exception('Sending invalid continuation opcode') 129 raise Exception('Sending invalid opcode %d' % inner_opcode) 141 {'opcode' [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | Thumb2InstrInfo.cpp | 291 negativeOffsetOpcode(unsigned opcode) 293 switch (opcode) { 311 return opcode; 321 positiveOffsetOpcode(unsigned opcode) 323 switch (opcode) { 341 return opcode; 351 immediateOffsetOpcode(unsigned opcode) 353 switch (opcode) { 379 return opcode; 554 // Change the opcode bac [all...] |
/external/grub/netboot/ |
H A D | main.c | 264 arpreq.opcode = htons (ARP_REQUEST); 320 tp.opcode = htons (TFTP_RRQ); 323 + sizeof (tp.ip) + sizeof (tp.udp) + sizeof (tp.opcode) + 1); 368 if (tr->opcode == ntohs (TFTP_ERROR)) 376 if (tr->opcode == ntohs (TFTP_OACK)) 407 tp.opcode = htons (TFTP_ERROR); 412 + sizeof (tp.opcode) + sizeof (tp.u.err.errcode) 427 else if (tr->opcode == ntohs (TFTP_DATA)) 446 tp.opcode = htons (TFTP_ACK); 497 rarpreq.opcode [all...] |