/dalvik/vm/compiler/codegen/arm/ |
H A D | ArmRallocUtil.cpp | 52 extern void dvmCompilerClobberCallRegs(CompilationUnit *cUnit) argument 54 dvmCompilerClobber(cUnit, r0); 55 dvmCompilerClobber(cUnit, r1); 56 dvmCompilerClobber(cUnit, r2); 57 dvmCompilerClobber(cUnit, r3); 58 dvmCompilerClobber(cUnit, r9); // Need to do this?, be conservative 59 dvmCompilerClobber(cUnit, r11); 60 dvmCompilerClobber(cUnit, r12); 61 dvmCompilerClobber(cUnit, r14lr); 65 extern void dvmCompilerClobberHandlerRegs(CompilationUnit *cUnit) argument 76 dvmCompilerGetReturnWide(CompilationUnit *cUnit) argument 87 dvmCompilerGetReturnWideAlt(CompilationUnit *cUnit) argument 100 dvmCompilerGetReturn(CompilationUnit *cUnit) argument 108 dvmCompilerGetReturnAlt(CompilationUnit *cUnit) argument [all...] |
H A D | CodegenDriver.cpp | 30 static void markCard(CompilationUnit *cUnit, int valReg, int tgtAddrReg) argument 32 int regCardBase = dvmCompilerAllocTemp(cUnit); 33 int regCardNo = dvmCompilerAllocTemp(cUnit); 34 ArmLIR *branchOver = genCmpImmBranch(cUnit, kArmCondEq, valReg, 0); 35 loadWordDisp(cUnit, r6SELF, offsetof(Thread, cardTable), 37 opRegRegImm(cUnit, kOpLsr, regCardNo, tgtAddrReg, GC_CARD_SHIFT); 38 storeBaseIndexed(cUnit, regCardBase, regCardNo, regCardBase, 0, 40 ArmLIR *target = newLIR0(cUnit, kArmPseudoTargetLabel); 43 dvmCompilerFreeTemp(cUnit, regCardBase); 44 dvmCompilerFreeTemp(cUnit, regCardN 47 genConversionCall(CompilationUnit *cUnit, MIR *mir, void *funct, int srcSize, int tgtSize) argument 81 genArithOpFloatPortable(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 127 genArithOpDoublePortable(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 176 genConversionPortable(CompilationUnit *cUnit, MIR *mir) argument 244 selfVerificationBranchInsertPass(CompilationUnit *cUnit) argument 283 genConditionalBranch(CompilationUnit *cUnit, ArmConditionCode cond, ArmLIR *target) argument 293 genTrap(CompilationUnit *cUnit, int dOffset, ArmLIR *pcrLabel) argument 301 genIGetWide(CompilationUnit *cUnit, MIR *mir, int fieldOffset) argument 325 genIPutWide(CompilationUnit *cUnit, MIR *mir, int fieldOffset) argument 348 genIGet(CompilationUnit *cUnit, MIR *mir, OpSize size, int fieldOffset, bool isVolatile) argument 375 genIPut(CompilationUnit *cUnit, MIR *mir, OpSize size, int fieldOffset, bool isObject, bool isVolatile) argument 405 genArrayGet(CompilationUnit *cUnit, MIR *mir, OpSize size, RegLocation rlArray, RegLocation rlIndex, RegLocation rlDest, int scale) argument 474 genArrayPut(CompilationUnit *cUnit, MIR *mir, OpSize size, RegLocation rlArray, RegLocation rlIndex, RegLocation rlSrc, int scale) argument 549 genArrayObjectPut(CompilationUnit *cUnit, MIR *mir, RegLocation rlArray, RegLocation rlIndex, RegLocation rlSrc, int scale) argument 632 genShiftOpLong(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlShift) argument 665 genArithOpLong(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 774 genArithOpInt(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 897 genArithOp(CompilationUnit *cUnit, MIR *mir) argument 956 genUnconditionalBranch(CompilationUnit *cUnit, ArmLIR *target) argument 964 genReturnCommon(CompilationUnit *cUnit, MIR *mir) argument 985 genProcessArgsNoRange(CompilationUnit *cUnit, MIR *mir, DecodedInstruction *dInsn, ArmLIR **pcrLabel) argument 1018 genProcessArgsRange(CompilationUnit *cUnit, MIR *mir, DecodedInstruction *dInsn, ArmLIR **pcrLabel) argument 1111 genInvokeSingletonCommon(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb, ArmLIR *labelList, ArmLIR *pcrLabel, const Method *calleeMethod) argument 1184 genInvokeVirtualCommon(CompilationUnit *cUnit, MIR *mir, int methodIndex, ArmLIR *retChainingCell, ArmLIR *predChainingCell, ArmLIR *pcrLabel) argument 1294 genInvokeVirtualWholeMethod(CompilationUnit *cUnit, MIR *mir, void *calleeAddr, ArmLIR *retChainingCell) argument 1330 genInvokeSingletonWholeMethod(CompilationUnit *cUnit, MIR *mir, void *calleeAddr, ArmLIR *retChainingCell) argument 1347 genPuntToInterp(CompilationUnit *cUnit, unsigned int offset) argument 1361 genInterpSingleStep(CompilationUnit *cUnit, MIR *mir) argument 1405 genMonitorPortable(CompilationUnit *cUnit, MIR *mir) argument 1441 genSuspendPoll(CompilationUnit *cUnit, MIR *mir) argument 1458 handleFmt10t_Fmt20t_Fmt30t(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb, ArmLIR *labelList) argument 1484 handleFmt10x(CompilationUnit *cUnit, MIR *mir) argument 1512 handleFmt11n_Fmt31i(CompilationUnit *cUnit, MIR *mir) argument 1546 handleFmt21h(CompilationUnit *cUnit, MIR *mir) argument 1576 handleFmt20bc(CompilationUnit *cUnit, MIR *mir) argument 1583 handleFmt21c_Fmt31c(CompilationUnit *cUnit, MIR *mir) argument 1908 handleFmt11x(CompilationUnit *cUnit, MIR *mir) argument 1975 handleFmt12x(CompilationUnit *cUnit, MIR *mir) argument 2076 handleFmt21s(CompilationUnit *cUnit, MIR *mir) argument 2100 handleFmt21t(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb, ArmLIR *labelList) argument 2177 handleEasyDivide(CompilationUnit *cUnit, Opcode dalvikOpcode, RegLocation rlSrc, RegLocation rlDest, int lit) argument 2228 handleEasyMultiply(CompilationUnit *cUnit, RegLocation rlSrc, RegLocation rlDest, int lit) argument 2271 handleFmt22b_Fmt22s(CompilationUnit *cUnit, MIR *mir) argument 2386 handleFmt22c(CompilationUnit *cUnit, MIR *mir) argument 2572 handleFmt22cs(CompilationUnit *cUnit, MIR *mir) argument 2601 handleFmt22t(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb, ArmLIR *labelList) argument 2652 handleFmt22x_Fmt32x(CompilationUnit *cUnit, MIR *mir) argument 2677 handleFmt23x(CompilationUnit *cUnit, MIR *mir) argument 2900 handleFmt31t(CompilationUnit *cUnit, MIR *mir) argument 2963 genLandingPadForMispredictedCallee(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb, ArmLIR *labelList) argument 2989 handleFmt35c_3rc(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb, ArmLIR *labelList) argument 3351 handleFmt35ms_3rms(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb, ArmLIR *labelList) argument 3430 genInlinedCompareTo(CompilationUnit *cUnit, MIR *mir) argument 3456 genInlinedFastIndexOf(CompilationUnit *cUnit, MIR *mir) argument 3478 genInlinedStringIsEmptyOrLength(CompilationUnit *cUnit, MIR *mir, bool isEmpty) argument 3499 genInlinedStringLength(CompilationUnit *cUnit, MIR *mir) argument 3504 genInlinedStringIsEmpty(CompilationUnit *cUnit, MIR *mir) argument 3509 genInlinedStringCharAt(CompilationUnit *cUnit, MIR *mir) argument 3536 genInlinedAbsInt(CompilationUnit *cUnit, MIR *mir) argument 3555 genInlinedAbsLong(CompilationUnit *cUnit, MIR *mir) argument 3577 genInlinedIntFloatConversion(CompilationUnit *cUnit, MIR *mir) argument 3586 genInlinedLongDoubleConversion(CompilationUnit *cUnit, MIR *mir) argument 3600 handleExecuteInlineC(CompilationUnit *cUnit, MIR *mir) argument 3638 handleExecuteInline(CompilationUnit *cUnit, MIR *mir) argument 3704 handleFmt51l(CompilationUnit *cUnit, MIR *mir) argument 3735 insertChainingSwitch(CompilationUnit *cUnit) argument 3745 handleNormalChainingCell(CompilationUnit *cUnit, unsigned int offset) argument 3764 handleHotChainingCell(CompilationUnit *cUnit, unsigned int offset) argument 3780 handleBackwardBranchChainingCell(CompilationUnit *cUnit, unsigned int offset) argument 3801 handleInvokeSingletonChainingCell(CompilationUnit *cUnit, const Method *callee) argument 3817 handleInvokePredictedChainingCell(CompilationUnit *cUnit) argument 3834 handlePCReconstruction(CompilationUnit *cUnit, ArmLIR *targetLabel) argument 3875 genHoistedChecksForCountUpLoop(CompilationUnit *cUnit, MIR *mir) argument 3928 genHoistedChecksForCountDownLoop(CompilationUnit *cUnit, MIR *mir) argument 3962 genHoistedLowerBoundCheck(CompilationUnit *cUnit, MIR *mir) argument 4060 genValidationForPredictedInline(CompilationUnit *cUnit, MIR *mir) argument 4081 handleExtendedMIR(CompilationUnit *cUnit, MIR *mir) argument 4128 setupLoopEntryBlock(CompilationUnit *cUnit, BasicBlock *entry, ArmLIR *bodyLabel) argument 4184 dvmCompilerMIR2LIR(CompilationUnit *cUnit) argument 4729 dvmCompilerRegCopyNoInsert(CompilationUnit *cUnit, int rDest, int rSrc) argument 4735 dvmCompilerRegCopy(CompilationUnit *cUnit, int rDest, int rSrc) argument 4741 dvmCompilerRegCopyWide(CompilationUnit *cUnit, int destLo, int destHi, int srcLo, int srcHi) argument 4747 dvmCompilerFlushRegImpl(CompilationUnit *cUnit, int rBase, int displacement, int rSrc, OpSize size) argument 4753 dvmCompilerFlushRegWideImpl(CompilationUnit *cUnit, int rBase, int displacement, int rSrcLo, int rSrcHi) argument [all...] |
H A D | ArchFactory.cpp | 29 static TGT_LIR *genRegImmCheck(CompilationUnit *cUnit, argument 34 TGT_LIR *branch = genCmpImmBranch(cUnit, cond, reg, checkValue); 35 if (cUnit->jitMode == kJitMethod) { 36 BasicBlock *bb = cUnit->curBlock; 38 ArmLIR *exceptionLabel = (ArmLIR *) cUnit->blockLabelList; 48 return genCheckCommon(cUnit, dOffset, branch, pcrLabel); 57 static TGT_LIR *genNullCheck(CompilationUnit *cUnit, int sReg, int mReg, argument 61 if (dvmIsBitSet(cUnit->regPool->nullCheckedRegs, sReg)) { 64 dvmSetBit(cUnit->regPool->nullCheckedRegs, sReg); 65 return genRegImmCheck(cUnit, kArmCondE 72 genRegRegCheck(CompilationUnit *cUnit, ArmConditionCode cond, int reg1, int reg2, int dOffset, TGT_LIR *pcrLabel) argument 88 genZeroCheck(CompilationUnit *cUnit, int mReg, int dOffset, TGT_LIR *pcrLabel) argument 95 genBoundsCheck(CompilationUnit *cUnit, int rIndex, int rBound, int dOffset, TGT_LIR *pcrLabel) argument 106 genDispatchToHandler(CompilationUnit *cUnit, TemplateOpcode opcode) argument [all...] |
H A D | GlobalOptimizations.cpp | 25 static void applyRedundantBranchElimination(CompilationUnit *cUnit) argument 29 for (thisLIR = (ArmLIR *) cUnit->firstLIRInsn; 30 thisLIR != (ArmLIR *) cUnit->lastLIRInsn; 55 (nextLIR = (ArmLIR *) cUnit->lastLIRInsn)) 62 void dvmCompilerApplyGlobalOptimizations(CompilationUnit *cUnit) argument 64 applyRedundantBranchElimination(cUnit);
|
/dalvik/vm/compiler/codegen/arm/armv5te/ |
H A D | MethodCodegenDriver.cpp | 17 void dvmCompilerMethodMIR2LIR(CompilationUnit *cUnit) argument
|
/dalvik/vm/compiler/codegen/mips/mips/ |
H A D | MethodCodegenDriver.cpp | 17 void dvmCompilerMethodMIR2LIR(CompilationUnit *cUnit) argument
|
/dalvik/vm/compiler/codegen/arm/FP/ |
H A D | ThumbPortableFP.cpp | 18 static bool genArithOpFloatPortable(CompilationUnit *cUnit, MIR *mir, 22 static bool genArithOpDoublePortable(CompilationUnit *cUnit, MIR *mir, 26 static bool genConversionPortable(CompilationUnit *cUnit, MIR *mir); 28 static bool handleExecuteInlineC(CompilationUnit *cUnit, MIR *mir); 30 static bool genConversion(CompilationUnit *cUnit, MIR *mir) argument 32 return genConversionPortable(cUnit, mir); 35 static bool genArithOpFloat(CompilationUnit *cUnit, MIR *mir, argument 39 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2); 42 static bool genArithOpDouble(CompilationUnit *cUnit, MIR *mir, argument 46 return genArithOpDoublePortable(cUnit, mi 49 genInlineSqrt(CompilationUnit *cUnit, MIR *mir) argument 54 genCmpFP(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument [all...] |
H A D | ThumbVFP.cpp | 27 static void loadValueAddressDirect(CompilationUnit *cUnit, RegLocation rlSrc, argument 30 rlSrc = rlSrc.wide ? dvmCompilerUpdateLocWide(cUnit, rlSrc) : 31 dvmCompilerUpdateLoc(cUnit, rlSrc); 34 dvmCompilerFlushRegWide(cUnit, rlSrc.lowReg, rlSrc.highReg); 36 dvmCompilerFlushReg(cUnit, rlSrc.lowReg); 39 dvmCompilerClobber(cUnit, rDest); 40 dvmCompilerLockTemp(cUnit, rDest); 41 opRegRegImm(cUnit, kOpAdd, rDest, r5FP, 42 dvmCompilerS2VReg(cUnit, rlSrc.sRegLow) << 2); 45 static bool genInlineSqrt(CompilationUnit *cUnit, MI argument 64 genArithOpFloat(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 110 genArithOpDouble(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 154 genConversion(CompilationUnit *cUnit, MIR *mir) argument 226 genCmpFP(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument [all...] |
/dalvik/vm/compiler/codegen/ |
H A D | Ralloc.h | 40 static inline int dvmCompilerS2VReg(CompilationUnit *cUnit, int sReg) argument 43 return DECODE_REG(dvmConvertSSARegToDalvik(cUnit, sReg)); 47 static inline void dvmCompilerResetNullCheck(CompilationUnit *cUnit) argument 49 dvmClearAllBits(cUnit->regPool->nullCheckedRegs); 55 * dataflow analysis and refer to slot numbers in the cUnit->regLocation 57 * entries in the cUnit->reglocation[] array. Therefore, when location 67 static inline bool dvmCompilerLiveOut(CompilationUnit *cUnit, int sReg) argument 79 extern RegLocation dvmCompilerEvalLoc(CompilationUnit *cUnit, RegLocation loc, 82 extern void dvmCompilerClobber(CompilationUnit *cUnit, int reg); 84 extern RegLocation dvmCompilerUpdateLoc(CompilationUnit *cUnit, [all...] |
H A D | CompilerCodegen.h | 30 void dvmCompilerMIR2LIR(CompilationUnit *cUnit); 32 void dvmCompilerMIR2LIR(CompilationUnit *cUnit, JitTranslationInfo* info); 36 void dvmCompilerMethodMIR2LIR(CompilationUnit *cUnit); 39 void dvmCompilerAssembleLIR(CompilationUnit *cUnit, JitTranslationInfo *info); 45 void dvmJitInstallClassObjectPointers(CompilationUnit *cUnit, 52 void dvmCompilerCodegenDump(CompilationUnit *cUnit); 58 void dvmCompilerLocalRegAlloc(CompilationUnit *cUnit); 61 void dvmCompilerInitializeRegAlloc(CompilationUnit *cUnit); 76 void dvmCompilerGenMemBarrier(CompilationUnit *cUnit, int barrierKind);
|
H A D | CodegenFactory.cpp | 35 static TGT_LIR *loadWordDisp(CompilationUnit *cUnit, int rBase, argument 38 return loadBaseDisp(cUnit, NULL, rBase, displacement, rDest, kWord, 42 static TGT_LIR *storeWordDisp(CompilationUnit *cUnit, int rBase, argument 45 return storeBaseDisp(cUnit, rBase, displacement, rSrc, kWord); 53 static void loadValueDirect(CompilationUnit *cUnit, RegLocation rlSrc, argument 56 rlSrc = dvmCompilerUpdateLoc(cUnit, rlSrc); 58 genRegCopy(cUnit, reg1, rlSrc.lowReg); 60 loadWordDisp(cUnit, rSELF, offsetof(Thread, interpSave.retval), reg1); 63 loadWordDisp(cUnit, rFP, dvmCompilerS2VReg(cUnit, rlSr 73 loadValueDirectFixed(CompilationUnit *cUnit, RegLocation rlSrc, int reg1) argument 86 loadValueDirectWide(CompilationUnit *cUnit, RegLocation rlSrc, int regLo, int regHi) argument 109 loadValueDirectWideFixed(CompilationUnit *cUnit, RegLocation rlSrc, int regLo, int regHi) argument 119 loadValue(CompilationUnit *cUnit, RegLocation rlSrc, RegisterClass opKind) argument 136 storeValue(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc) argument 185 loadValueWide(CompilationUnit *cUnit, RegLocation rlSrc, RegisterClass opKind) argument 207 storeValueWide(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc) argument [all...] |
H A D | RallocUtil.cpp | 34 * dataflow analysis and refer to slot numbers in the cUnit->regLocation 36 * entries in the cUnit->reglocation[] array. Therefore, when location 46 extern void dvmCompilerResetRegPool(CompilationUnit *cUnit) argument 49 for (i=0; i < cUnit->regPool->numCoreTemps; i++) { 50 cUnit->regPool->coreTemps[i].inUse = false; 52 for (i=0; i < cUnit->regPool->numFPTemps; i++) { 53 cUnit->regPool->FPTemps[i].inUse = false; 83 static RegisterInfo *getRegInfo(CompilationUnit *cUnit, int reg) argument 85 int numTemps = cUnit->regPool->numCoreTemps; 86 RegisterInfo *p = cUnit 105 dvmCompilerFlushRegWide(CompilationUnit *cUnit, int reg1, int reg2) argument 124 dvmCompilerFlushReg(CompilationUnit *cUnit, int reg) argument 136 clobberRegBody(CompilationUnit *cUnit, RegisterInfo *p, int numTemps, int reg) argument 165 dvmCompilerClobber(CompilationUnit *cUnit, int reg) argument 187 dvmCompilerClobberSReg(CompilationUnit *cUnit, int sReg) argument 195 allocTempBody(CompilationUnit *cUnit, RegisterInfo *p, int numTemps, int *nextTemp, bool required) argument 233 dvmCompilerAllocTempDouble(CompilationUnit *cUnit) argument 281 dvmCompilerAllocFreeTemp(CompilationUnit *cUnit) argument 288 dvmCompilerAllocTemp(CompilationUnit *cUnit) argument 295 dvmCompilerAllocTempFloat(CompilationUnit *cUnit) argument 316 allocLive(CompilationUnit *cUnit, int sReg, int regClass) argument 342 dvmCompilerFreeTemp(CompilationUnit *cUnit, int reg) argument 367 dvmCompilerIsLive(CompilationUnit *cUnit, int reg) argument 387 dvmCompilerIsTemp(CompilationUnit *cUnit, int reg) argument 412 dvmCompilerLockTemp(CompilationUnit *cUnit, int reg) argument 437 dvmCompilerResetDef(CompilationUnit *cUnit, int reg) argument 444 nullifyRange(CompilationUnit *cUnit, LIR *start, LIR *finish, int sReg1, int sReg2) argument 463 dvmCompilerMarkDef(CompilationUnit *cUnit, RegLocation rl, LIR *start, LIR *finish) argument 479 dvmCompilerMarkDefWide(CompilationUnit *cUnit, RegLocation rl, LIR *start, LIR *finish) argument 491 dvmCompilerWideToNarrow(CompilationUnit *cUnit, RegLocation rl) argument 523 dvmCompilerResetDefLoc(CompilationUnit *cUnit, RegLocation rl) argument 535 dvmCompilerResetDefLocWide(CompilationUnit *cUnit, RegLocation rl) argument 548 dvmCompilerResetDefTracking(CompilationUnit *cUnit) argument 559 dvmCompilerClobberAllRegs(CompilationUnit *cUnit) argument 571 dvmCompilerLockAllTemps(CompilationUnit *cUnit) argument 580 flushAllRegsBody(CompilationUnit *cUnit, RegisterInfo *info, int numRegs) argument 595 dvmCompilerFlushAllRegs(CompilationUnit *cUnit) argument 617 dvmCompilerMarkLive(CompilationUnit *cUnit, int reg, int sReg) argument 632 dvmCompilerMarkPair(CompilationUnit *cUnit, int lowReg, int highReg) argument 641 dvmCompilerMarkClean(CompilationUnit *cUnit, int reg) argument 647 dvmCompilerMarkDirty(CompilationUnit *cUnit, int reg) argument 653 dvmCompilerMarkInUse(CompilationUnit *cUnit, int reg) argument 659 copyRegInfo(CompilationUnit *cUnit, int newReg, int oldReg) argument 676 dvmCompilerUpdateLoc(CompilationUnit *cUnit, RegLocation loc) argument 696 dvmCompilerUpdateLocWide(CompilationUnit *cUnit, RegLocation loc) argument 746 evalLocWide(CompilationUnit *cUnit, RegLocation loc, int regClass, bool update) argument 797 dvmCompilerEvalLoc(CompilationUnit *cUnit, RegLocation loc, int regClass, bool update) argument 836 dvmCompilerGetSrc(CompilationUnit *cUnit, MIR *mir, int num) argument 846 dvmCompilerGetDest(CompilationUnit *cUnit, MIR *mir, int num) argument 855 getLocWide(CompilationUnit *cUnit, MIR *mir, int low, int high, bool isSrc) argument 879 dvmCompilerGetDestWide(CompilationUnit *cUnit, MIR *mir, int low, int high) argument 885 dvmCompilerGetSrcWide(CompilationUnit *cUnit, MIR *mir, int low, int high) argument 892 dvmCompilerKillNullCheckedLoc(CompilationUnit *cUnit, RegLocation loc) argument [all...] |
/dalvik/vm/compiler/codegen/arm/Thumb/ |
H A D | Ralloc.cpp | 29 int dvmCompilerAllocTypedTempPair(CompilationUnit *cUnit, bool fpHint, argument 35 lowReg = dvmCompilerAllocTemp(cUnit); 36 highReg = dvmCompilerAllocTemp(cUnit); 41 int dvmCompilerAllocTypedTemp(CompilationUnit *cUnit, bool fpHint, int regClass) argument 43 return dvmCompilerAllocTemp(cUnit);
|
H A D | Gen.cpp | 50 static int genTraceProfileEntry(CompilationUnit *cUnit) argument 54 newLIR1(cUnit, kArm16BitData, addr & 0xffff); 55 newLIR1(cUnit, kArm16BitData, (addr >> 16) & 0xffff); 56 cUnit->chainCellOffsetLIR = 57 (LIR *) newLIR1(cUnit, kArm16BitData, CHAIN_CELL_OFFSET_TAG); 58 cUnit->headerSize = 6; 62 newLIR2(cUnit, kThumbMovRR_H2L, r0, r15pc); 63 newLIR2(cUnit, kThumbSubRI8, r0, 10); 64 newLIR3(cUnit, kThumbLdrRRI5, r0, r0, 0); 65 newLIR3(cUnit, kThumbLdrRRI 85 genNegFloat(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc) argument 96 genNegDouble(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc) argument 108 genMulLong(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 124 genLong3Addr(CompilationUnit *cUnit, MIR *mir, OpKind firstOp, OpKind secondOp, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 169 dvmCompilerInitializeRegAlloc(CompilationUnit *cUnit) argument 186 genExportPC(CompilationUnit *cUnit, MIR *mir) argument 199 genMonitor(CompilationUnit *cUnit, MIR *mir) argument 204 genCmpLong(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 215 genInlinedAbsFloat(CompilationUnit *cUnit, MIR *mir) argument 230 genInlinedAbsDouble(CompilationUnit *cUnit, MIR *mir) argument 249 genInlinedMinMaxInt(CompilationUnit *cUnit, MIR *mir, bool isMin) argument 269 genMultiplyByTwoBitMultiplier(CompilationUnit *cUnit, RegLocation rlSrc, RegLocation rlResult, int lit, int firstBit, int secondBit) argument [all...] |
/dalvik/vm/compiler/codegen/mips/ |
H A D | Ralloc.h | 44 static inline int dvmCompilerS2VReg(CompilationUnit *cUnit, int sReg) argument 47 return DECODE_REG(dvmConvertSSARegToDalvik(cUnit, sReg)); 51 static inline void dvmCompilerResetNullCheck(CompilationUnit *cUnit) argument 53 dvmClearAllBits(cUnit->regPool->nullCheckedRegs); 59 * dataflow analysis and refer to slot numbers in the cUnit->regLocation 61 * entries in the cUnit->reglocation[] array. Therefore, when location 71 static inline bool dvmCompilerLiveOut(CompilationUnit *cUnit, int sReg) argument 83 extern RegLocation dvmCompilerEvalLoc(CompilationUnit *cUnit, RegLocation loc, 86 extern void dvmCompilerClobber(CompilationUnit *cUnit, int reg); 88 extern RegLocation dvmCompilerUpdateLoc(CompilationUnit *cUnit, [all...] |
H A D | CodegenFactory.cpp | 29 static MipsLIR *loadWordDisp(CompilationUnit *cUnit, int rBase, int displacement, argument 32 return loadBaseDisp(cUnit, NULL, rBase, displacement, rDest, kWord, 36 static MipsLIR *storeWordDisp(CompilationUnit *cUnit, int rBase, argument 39 return storeBaseDisp(cUnit, rBase, displacement, rSrc, kWord); 47 static void loadValueDirect(CompilationUnit *cUnit, RegLocation rlSrc, argument 50 rlSrc = dvmCompilerUpdateLoc(cUnit, rlSrc); 52 genRegCopy(cUnit, reg1, rlSrc.lowReg); 54 loadWordDisp(cUnit, rSELF, offsetof(Thread, interpSave.retval), reg1); 57 loadWordDisp(cUnit, rFP, dvmCompilerS2VReg(cUnit, rlSr 67 loadValueDirectFixed(CompilationUnit *cUnit, RegLocation rlSrc, int reg1) argument 80 loadValueDirectWide(CompilationUnit *cUnit, RegLocation rlSrc, int regLo, int regHi) argument 102 loadValueDirectWideFixed(CompilationUnit *cUnit, RegLocation rlSrc, int regLo, int regHi) argument 112 loadValue(CompilationUnit *cUnit, RegLocation rlSrc, RegisterClass opKind) argument 128 storeValue(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc) argument 177 loadValueWide(CompilationUnit *cUnit, RegLocation rlSrc, RegisterClass opKind) argument 198 storeValueWide(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc) argument 265 genNullCheck(CompilationUnit *cUnit, int sReg, int mReg, int dOffset, MipsLIR *pcrLabel) argument 282 genRegRegCheck(CompilationUnit *cUnit, MipsConditionCode cond, int reg1, int reg2, int dOffset, MipsLIR *pcrLabel) argument 309 genZeroCheck(CompilationUnit *cUnit, int mReg, int dOffset, MipsLIR *pcrLabel) argument 316 genBoundsCheck(CompilationUnit *cUnit, int rIndex, int rBound, int dOffset, MipsLIR *pcrLabel) argument 327 genDispatchToHandler(CompilationUnit *cUnit, TemplateOpcode opCode) argument [all...] |
H A D | Codegen.h | 32 static MipsLIR *opRegImm(CompilationUnit *cUnit, OpKind op, int rDestSrc1, 34 static MipsLIR *opRegReg(CompilationUnit *cUnit, OpKind op, int rDestSrc1, 38 static bool genArithOpFloatPortable(CompilationUnit *cUnit, MIR *mir, 42 static bool genArithOpDoublePortable(CompilationUnit *cUnit, MIR *mir, 46 static bool genConversionPortable(CompilationUnit *cUnit, MIR *mir); 48 static void genMonitorPortable(CompilationUnit *cUnit, MIR *mir); 50 static void genInterpSingleStep(CompilationUnit *cUnit, MIR *mir); 64 extern int dvmCompilerAllocTypedTempPair(CompilationUnit *cUnit, 67 extern int dvmCompilerAllocTypedTemp(CompilationUnit *cUnit, bool fpHint, 70 extern MipsLIR* dvmCompilerRegCopyNoInsert(CompilationUnit *cUnit, in [all...] |
H A D | RallocUtil.cpp | 36 * dataflow analysis and refer to slot numbers in the cUnit->regLocation 38 * entries in the cUnit->reglocation[] array. Therefore, when location 48 extern void dvmCompilerResetRegPool(CompilationUnit *cUnit) argument 51 for (i=0; i < cUnit->regPool->numCoreTemps; i++) { 52 cUnit->regPool->coreTemps[i].inUse = false; 54 for (i=0; i < cUnit->regPool->numFPTemps; i++) { 55 cUnit->regPool->FPTemps[i].inUse = false; 85 static RegisterInfo *getRegInfo(CompilationUnit *cUnit, int reg) argument 87 int numTemps = cUnit->regPool->numCoreTemps; 88 RegisterInfo *p = cUnit 107 flushRegWide(CompilationUnit *cUnit, int reg1, int reg2) argument 126 flushReg(CompilationUnit *cUnit, int reg) argument 138 clobberRegBody(CompilationUnit *cUnit, RegisterInfo *p, int numTemps, int reg) argument 167 dvmCompilerClobber(CompilationUnit *cUnit, int reg) argument 189 dvmCompilerClobberSReg(CompilationUnit *cUnit, int sReg) argument 197 allocTempBody(CompilationUnit *cUnit, RegisterInfo *p, int numTemps, int *nextTemp, bool required) argument 235 dvmCompilerAllocTempDouble(CompilationUnit *cUnit) argument 282 dvmCompilerAllocFreeTemp(CompilationUnit *cUnit) argument 289 dvmCompilerAllocTemp(CompilationUnit *cUnit) argument 296 dvmCompilerAllocTempFloat(CompilationUnit *cUnit) argument 317 allocLive(CompilationUnit *cUnit, int sReg, int regClass) argument 343 dvmCompilerFreeTemp(CompilationUnit *cUnit, int reg) argument 372 dvmCompilerIsLive(CompilationUnit *cUnit, int reg) argument 392 dvmCompilerIsTemp(CompilationUnit *cUnit, int reg) argument 417 dvmCompilerLockTemp(CompilationUnit *cUnit, int reg) argument 443 dvmCompilerClobberCallRegs(CompilationUnit *cUnit) argument 489 dvmCompilerClobberHandlerRegs(CompilationUnit *cUnit) argument 503 dvmCompilerResetDef(CompilationUnit *cUnit, int reg) argument 510 nullifyRange(CompilationUnit *cUnit, LIR *start, LIR *finish, int sReg1, int sReg2) argument 529 dvmCompilerMarkDef(CompilationUnit *cUnit, RegLocation rl, LIR *start, LIR *finish) argument 545 dvmCompilerMarkDefWide(CompilationUnit *cUnit, RegLocation rl, LIR *start, LIR *finish) argument 557 dvmCompilerWideToNarrow(CompilationUnit *cUnit, RegLocation rl) argument 595 dvmCompilerResetDefLoc(CompilationUnit *cUnit, RegLocation rl) argument 607 dvmCompilerResetDefLocWide(CompilationUnit *cUnit, RegLocation rl) argument 620 dvmCompilerResetDefTracking(CompilationUnit *cUnit) argument 631 dvmCompilerClobberAllRegs(CompilationUnit *cUnit) argument 643 dvmCompilerLockAllTemps(CompilationUnit *cUnit) argument 652 flushAllRegsBody(CompilationUnit *cUnit, RegisterInfo *info, int numRegs) argument 667 dvmCompilerFlushAllRegs(CompilationUnit *cUnit) argument 689 dvmCompilerMarkLive(CompilationUnit *cUnit, int reg, int sReg) argument 704 dvmCompilerMarkPair(CompilationUnit *cUnit, int lowReg, int highReg) argument 713 dvmCompilerMarkClean(CompilationUnit *cUnit, int reg) argument 719 dvmCompilerMarkDirty(CompilationUnit *cUnit, int reg) argument 725 dvmCompilerMarkInUse(CompilationUnit *cUnit, int reg) argument 731 copyRegInfo(CompilationUnit *cUnit, int newReg, int oldReg) argument 748 dvmCompilerUpdateLoc(CompilationUnit *cUnit, RegLocation loc) argument 768 dvmCompilerUpdateLocWide(CompilationUnit *cUnit, RegLocation loc) argument 818 evalLocWide(CompilationUnit *cUnit, RegLocation loc, int regClass, bool update) argument 869 dvmCompilerEvalLoc(CompilationUnit *cUnit, RegLocation loc, int regClass, bool update) argument 908 dvmCompilerGetSrc(CompilationUnit *cUnit, MIR *mir, int num) argument 918 dvmCompilerGetDest(CompilationUnit *cUnit, MIR *mir, int num) argument 927 getLocWide(CompilationUnit *cUnit, MIR *mir, int low, int high, bool isSrc) argument 951 dvmCompilerGetDestWide(CompilationUnit *cUnit, MIR *mir, int low, int high) argument 957 dvmCompilerGetSrcWide(CompilationUnit *cUnit, MIR *mir, int low, int high) argument 963 dvmCompilerGetReturnWide(CompilationUnit *cUnit) argument 974 dvmCompilerGetReturn(CompilationUnit *cUnit) argument 982 dvmCompilerGetReturnWideAlt(CompilationUnit *cUnit) argument 993 dvmCompilerGetReturnAlt(CompilationUnit *cUnit) argument 1002 dvmCompilerKillNullCheckedLoc(CompilationUnit *cUnit, RegLocation loc) argument 1016 dvmCompilerFlushRegWideForV5TEVFP(CompilationUnit *cUnit, int reg1, int reg2) argument 1022 dvmCompilerFlushRegForV5TEVFP(CompilationUnit *cUnit, int reg) argument [all...] |
H A D | CodegenDriver.cpp | 30 static void markCard(CompilationUnit *cUnit, int valReg, int tgtAddrReg) argument 32 int regCardBase = dvmCompilerAllocTemp(cUnit); 33 int regCardNo = dvmCompilerAllocTemp(cUnit); 34 MipsLIR *branchOver = opCompareBranch(cUnit, kMipsBeq, valReg, r_ZERO); 35 loadWordDisp(cUnit, rSELF, offsetof(Thread, cardTable), 37 opRegRegImm(cUnit, kOpLsr, regCardNo, tgtAddrReg, GC_CARD_SHIFT); 38 storeBaseIndexed(cUnit, regCardBase, regCardNo, regCardBase, 0, 40 MipsLIR *target = newLIR0(cUnit, kMipsPseudoTargetLabel); 43 dvmCompilerFreeTemp(cUnit, regCardBase); 44 dvmCompilerFreeTemp(cUnit, regCardN 47 genConversionCall(CompilationUnit *cUnit, MIR *mir, void *funct, int srcSize, int tgtSize) argument 124 genArithOpFloatPortable(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 181 genArithOpDoublePortable(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 240 genConversionPortable(CompilationUnit *cUnit, MIR *mir) argument 309 selfVerificationBranchInsertPass(CompilationUnit *cUnit) argument 349 genConditionalBranchMips(CompilationUnit *cUnit, MipsOpCode opc, int rs, int rt, MipsLIR *target) argument 359 genTrap(CompilationUnit *cUnit, int dOffset, MipsLIR *pcrLabel) argument 367 genIGetWide(CompilationUnit *cUnit, MIR *mir, int fieldOffset) argument 391 genIPutWide(CompilationUnit *cUnit, MIR *mir, int fieldOffset) argument 414 genIGet(CompilationUnit *cUnit, MIR *mir, OpSize size, int fieldOffset, bool isVolatile) argument 441 genIPut(CompilationUnit *cUnit, MIR *mir, OpSize size, int fieldOffset, bool isObject, bool isVolatile) argument 471 genArrayGet(CompilationUnit *cUnit, MIR *mir, OpSize size, RegLocation rlArray, RegLocation rlIndex, RegLocation rlDest, int scale) argument 535 genArrayPut(CompilationUnit *cUnit, MIR *mir, OpSize size, RegLocation rlArray, RegLocation rlIndex, RegLocation rlSrc, int scale) argument 607 genArrayObjectPut(CompilationUnit *cUnit, MIR *mir, RegLocation rlArray, RegLocation rlIndex, RegLocation rlSrc, int scale) argument 693 genShiftOpLong(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlShift) argument 726 genArithOpLong(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 820 genArithOpInt(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 934 genArithOp(CompilationUnit *cUnit, MIR *mir) argument 993 genUnconditionalBranch(CompilationUnit *cUnit, MipsLIR *target) argument 1001 genReturnCommon(CompilationUnit *cUnit, MIR *mir) argument 1022 genProcessArgsNoRange(CompilationUnit *cUnit, MIR *mir, DecodedInstruction *dInsn, MipsLIR **pcrLabel) argument 1055 genProcessArgsRange(CompilationUnit *cUnit, MIR *mir, DecodedInstruction *dInsn, MipsLIR **pcrLabel) argument 1153 genInvokeSingletonCommon(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb, MipsLIR *labelList, MipsLIR *pcrLabel, const Method *calleeMethod) argument 1233 genInvokeVirtualCommon(CompilationUnit *cUnit, MIR *mir, int methodIndex, MipsLIR *retChainingCell, MipsLIR *predChainingCell, MipsLIR *pcrLabel) argument 1351 genInvokeVirtualWholeMethod(CompilationUnit *cUnit, MIR *mir, void *calleeAddr, MipsLIR *retChainingCell) argument 1385 genInvokeSingletonWholeMethod(CompilationUnit *cUnit, MIR *mir, void *calleeAddr, MipsLIR *retChainingCell) argument 1401 genPuntToInterp(CompilationUnit *cUnit, unsigned int offset) argument 1421 genInterpSingleStep(CompilationUnit *cUnit, MIR *mir) argument 1464 genMonitorPortable(CompilationUnit *cUnit, MIR *mir) argument 1501 genSuspendPoll(CompilationUnit *cUnit, MIR *mir) argument 1518 handleFmt10t_Fmt20t_Fmt30t(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb, MipsLIR *labelList) argument 1544 handleFmt10x(CompilationUnit *cUnit, MIR *mir) argument 1572 handleFmt11n_Fmt31i(CompilationUnit *cUnit, MIR *mir) argument 1606 handleFmt21h(CompilationUnit *cUnit, MIR *mir) argument 1636 handleFmt20bc(CompilationUnit *cUnit, MIR *mir) argument 1643 handleFmt21c_Fmt31c(CompilationUnit *cUnit, MIR *mir) argument 1954 handleFmt11x(CompilationUnit *cUnit, MIR *mir) argument 2021 handleFmt12x(CompilationUnit *cUnit, MIR *mir) argument 2122 handleFmt21s(CompilationUnit *cUnit, MIR *mir) argument 2146 handleFmt21t(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb, MipsLIR *labelList) argument 2221 handleEasyDivide(CompilationUnit *cUnit, Opcode dalvikOpcode, RegLocation rlSrc, RegLocation rlDest, int lit) argument 2272 handleEasyMultiply(CompilationUnit *cUnit, RegLocation rlSrc, RegLocation rlDest, int lit) argument 2315 handleFmt22b_Fmt22s(CompilationUnit *cUnit, MIR *mir) argument 2432 handleFmt22c(CompilationUnit *cUnit, MIR *mir) argument 2624 handleFmt22cs(CompilationUnit *cUnit, MIR *mir) argument 2653 handleFmt22t(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb, MipsLIR *labelList) argument 2723 handleFmt22x_Fmt32x(CompilationUnit *cUnit, MIR *mir) argument 2748 handleFmt23x(CompilationUnit *cUnit, MIR *mir) argument 2982 handleFmt31t(CompilationUnit *cUnit, MIR *mir) argument 3049 genLandingPadForMispredictedCallee(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb, MipsLIR *labelList) argument 3075 handleFmt35c_3rc(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb, MipsLIR *labelList) argument 3477 handleFmt35ms_3rms(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb, MipsLIR *labelList) argument 3555 genInlinedCompareTo(CompilationUnit *cUnit, MIR *mir) argument 3581 genInlinedFastIndexOf(CompilationUnit *cUnit, MIR *mir) argument 3605 genInlinedStringIsEmptyOrLength(CompilationUnit *cUnit, MIR *mir, bool isEmpty) argument 3626 genInlinedStringLength(CompilationUnit *cUnit, MIR *mir) argument 3631 genInlinedStringIsEmpty(CompilationUnit *cUnit, MIR *mir) argument 3636 genInlinedStringCharAt(CompilationUnit *cUnit, MIR *mir) argument 3663 genInlinedAbsInt(CompilationUnit *cUnit, MIR *mir) argument 3682 genInlinedAbsLong(CompilationUnit *cUnit, MIR *mir) argument 3709 genInlinedIntFloatConversion(CompilationUnit *cUnit, MIR *mir) argument 3718 genInlinedLongDoubleConversion(CompilationUnit *cUnit, MIR *mir) argument 3731 handleExecuteInlineC(CompilationUnit *cUnit, MIR *mir) argument 3770 handleExecuteInline(CompilationUnit *cUnit, MIR *mir) argument 3836 handleFmt51l(CompilationUnit *cUnit, MIR *mir) argument 3856 handleNormalChainingCell(CompilationUnit *cUnit, unsigned int offset) argument 3870 handleHotChainingCell(CompilationUnit *cUnit, unsigned int offset) argument 3881 handleBackwardBranchChainingCell(CompilationUnit *cUnit, unsigned int offset) argument 3902 handleInvokeSingletonChainingCell(CompilationUnit *cUnit, const Method *callee) argument 3913 handleInvokePredictedChainingCell(CompilationUnit *cUnit) argument 3931 handlePCReconstruction(CompilationUnit *cUnit, MipsLIR *targetLabel) argument 3972 genHoistedChecksForCountUpLoop(CompilationUnit *cUnit, MIR *mir) argument 4025 genHoistedChecksForCountDownLoop(CompilationUnit *cUnit, MIR *mir) argument 4059 genHoistedLowerBoundCheck(CompilationUnit *cUnit, MIR *mir) argument 4174 genValidationForPredictedInline(CompilationUnit *cUnit, MIR *mir) argument 4195 handleExtendedMIR(CompilationUnit *cUnit, MIR *mir) argument 4242 setupLoopEntryBlock(CompilationUnit *cUnit, BasicBlock *entry, MipsLIR *bodyLabel) argument 4299 dvmCompilerMIR2LIR(CompilationUnit *cUnit) argument 4832 dvmCompilerRegCopyNoInsert(CompilationUnit *cUnit, int rDest, int rSrc) argument 4838 dvmCompilerRegCopy(CompilationUnit *cUnit, int rDest, int rSrc) argument 4844 dvmCompilerRegCopyWide(CompilationUnit *cUnit, int destLo, int destHi, int srcLo, int srcHi) argument 4850 dvmCompilerFlushRegImpl(CompilationUnit *cUnit, int rBase, int displacement, int rSrc, OpSize size) argument 4856 dvmCompilerFlushRegWideImpl(CompilationUnit *cUnit, int rBase, int displacement, int rSrcLo, int rSrcHi) argument [all...] |
/dalvik/vm/compiler/codegen/arm/armv7-a-neon/ |
H A D | MethodCodegenDriver.cpp | 40 static void genMethodInflateAndPunt(CompilationUnit *cUnit, MIR *mir, 58 dvmCompilerFlushAllRegs(cUnit); 61 opRegRegImm(cUnit, kOpAdd, oldStackSave, r5FP, 62 cUnit->method->registersSize * 4); 64 opRegRegImm(cUnit, kOpAdd, oldFP, oldStackSave, sizeof(StackSaveArea)); 66 opRegRegImm(cUnit, kOpSub, newStackSave, r5FP, sizeof(StackSaveArea)); 68 loadWordDisp(cUnit, r13sp, 0, savedPC); 69 loadConstant(cUnit, currentPC, (int) (cUnit->method->insns + mir->offset)); 70 loadConstant(cUnit, metho 453 dvmCompilerMethodMIR2LIR(CompilationUnit *cUnit) argument [all...] |
/dalvik/vm/compiler/codegen/mips/Mips32/ |
H A D | Gen.cpp | 49 static int genTraceProfileEntry(CompilationUnit *cUnit) argument 53 MipsLIR *executionCount = newLIR1(cUnit, kMips32BitData, addr); 54 cUnit->chainCellOffsetLIR = 55 (LIR *) newLIR1(cUnit, kMips32BitData, CHAIN_CELL_OFFSET_TAG); 56 cUnit->headerSize = 8; 59 MipsLIR *loadAddr = newLIR2(cUnit, kMipsLahi, r_A0, 0); 61 loadAddr = newLIR3(cUnit, kMipsLalo, r_A0, r_A0, 0); 63 newLIR3(cUnit, kMipsLw, r_A0, 0, r_A0); 64 newLIR3(cUnit, kMipsLw, r_A1, 0, r_A0); 65 newLIR3(cUnit, kMipsAddi 81 genNegFloat(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc) argument 92 genNegDouble(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc) argument 104 genMulLong(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 120 withCarryHelper(CompilationUnit *cUnit, MipsOpCode opc, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2, int sltuSrc1, int sltuSrc2) argument 132 genLong3Addr(CompilationUnit *cUnit, MIR *mir, OpKind firstOp, OpKind secondOp, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 193 dvmCompilerInitializeRegAlloc(CompilationUnit *cUnit) argument 218 genExportPC(CompilationUnit *cUnit, MIR *mir) argument 230 genMonitor(CompilationUnit *cUnit, MIR *mir) argument 235 genCmpLong(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 246 genInlinedAbsFloat(CompilationUnit *cUnit, MIR *mir) argument 263 genInlinedAbsDouble(CompilationUnit *cUnit, MIR *mir) argument 284 genInlinedMinMaxInt(CompilationUnit *cUnit, MIR *mir, bool isMin) argument 306 genMultiplyByTwoBitMultiplier(CompilationUnit *cUnit, RegLocation rlSrc, RegLocation rlResult, int lit, int firstBit, int secondBit) argument [all...] |
H A D | Ralloc.cpp | 29 int dvmCompilerAllocTypedTempPair(CompilationUnit *cUnit, bool fpHint, argument 38 lowReg = dvmCompilerAllocTempDouble(cUnit); 45 lowReg = dvmCompilerAllocTemp(cUnit); 46 highReg = dvmCompilerAllocTemp(cUnit); 51 int dvmCompilerAllocTypedTemp(CompilationUnit *cUnit, bool fpHint, int regClass) argument 56 return dvmCompilerAllocTempFloat(cUnit); 59 return dvmCompilerAllocTemp(cUnit);
|
/dalvik/vm/compiler/codegen/arm/Thumb2/ |
H A D | Ralloc.cpp | 32 int dvmCompilerAllocTypedTempPair(CompilationUnit *cUnit, argument 44 lowReg = dvmCompilerAllocTempDouble(cUnit); 47 lowReg = dvmCompilerAllocTemp(cUnit); 48 highReg = dvmCompilerAllocTemp(cUnit); 54 int dvmCompilerAllocTypedTemp(CompilationUnit *cUnit, bool fpHint, argument 61 return dvmCompilerAllocTempFloat(cUnit); 62 return dvmCompilerAllocTemp(cUnit);
|
H A D | Gen.cpp | 47 static int genTraceProfileEntry(CompilationUnit *cUnit) argument 51 newLIR1(cUnit, kArm16BitData, addr & 0xffff); 52 newLIR1(cUnit, kArm16BitData, (addr >> 16) & 0xffff); 53 cUnit->chainCellOffsetLIR = 54 (LIR *) newLIR1(cUnit, kArm16BitData, CHAIN_CELL_OFFSET_TAG); 55 cUnit->headerSize = 6; 59 newLIR2(cUnit, kThumb2LdrPcReln12, r0, 8); 60 newLIR3(cUnit, kThumbLdrRRI5, r1, r0, 0); 61 newLIR2(cUnit, kThumbAddRI8, r1, 1); 62 newLIR3(cUnit, kThumbStrRRI 76 genNegFloat(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc) argument 86 genNegDouble(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc) argument 102 genMulLong(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 125 genLong3Addr(CompilationUnit *cUnit, MIR *mir, OpKind firstOp, OpKind secondOp, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 139 dvmCompilerInitializeRegAlloc(CompilationUnit *cUnit) argument 167 genIT(CompilationUnit *cUnit, ArmConditionCode code, const char *guide) argument 198 genExportPC(CompilationUnit *cUnit, MIR *mir) argument 237 genMonitorEnter(CompilationUnit *cUnit, MIR *mir) argument 292 genMonitorExit(CompilationUnit *cUnit, MIR *mir) argument 347 genMonitor(CompilationUnit *cUnit, MIR *mir) argument 370 genCmpLong(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 406 genInlinedAbsFloat(CompilationUnit *cUnit, MIR *mir) argument 417 genInlinedAbsDouble(CompilationUnit *cUnit, MIR *mir) argument 429 genInlinedMinMaxInt(CompilationUnit *cUnit, MIR *mir, bool isMin) argument 446 genMultiplyByTwoBitMultiplier(CompilationUnit *cUnit, RegLocation rlSrc, RegLocation rlResult, int lit, int firstBit, int secondBit) argument [all...] |
/dalvik/vm/compiler/codegen/mips/FP/ |
H A D | MipsFP.cpp | 22 extern void dvmCompilerFlushRegWideForV5TEVFP(CompilationUnit *cUnit, 24 extern void dvmCompilerFlushRegForV5TEVFP(CompilationUnit *cUnit, int reg); 27 static void loadValueAddress(CompilationUnit *cUnit, RegLocation rlSrc, argument 30 rlSrc = rlSrc.wide ? dvmCompilerUpdateLocWide(cUnit, rlSrc) : 31 dvmCompilerUpdateLoc(cUnit, rlSrc); 34 dvmCompilerFlushRegWideForV5TEVFP(cUnit, rlSrc.lowReg, 37 dvmCompilerFlushRegForV5TEVFP(cUnit, rlSrc.lowReg); 40 opRegRegImm(cUnit, kOpAdd, rDest, rFP, 41 dvmCompilerS2VReg(cUnit, rlSrc.sRegLow) << 2); 44 static bool genInlineSqrt(CompilationUnit *cUnit, MI argument 67 genArithOpFloat(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 157 genArithOpDouble(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 246 genConversion(CompilationUnit *cUnit, MIR *mir) argument 378 genCmpFP(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument [all...] |