/external/skia/src/svg/ |
H A D | SkSVGDefs.cpp | 12 DEFINE_SVG_NO_INFO(Defs)
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H A D | SkSVGDefs.h | 16 DECLARE_SVG_INFO(Defs);
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H A D | SkSVGParser.cpp | 363 CASE_NEW(Defs);
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/external/llvm/lib/Target/ARM/ |
H A D | Thumb2ITBlockPass.cpp | 44 SmallSet<unsigned, 4> &Defs, 55 SmallSet<unsigned, 4> &Defs, 83 Defs.insert(Reg); 85 Defs.insert(*Subreg); 106 SmallSet<unsigned, 4> &Defs, 121 if (Uses.count(DstReg) || Defs.count(SrcReg)) 163 SmallSet<unsigned, 4> Defs; local 176 Defs.clear(); 178 TrackDefUses(MI, Defs, Uses, TRI); 215 MoveCopyOutOfITBlock(NMI, CC, OCC, Defs, Use 54 TrackDefUses(MachineInstr *MI, SmallSet<unsigned, 4> &Defs, SmallSet<unsigned, 4> &Uses, const TargetRegisterInfo *TRI) argument 104 MoveCopyOutOfITBlock(MachineInstr *MI, ARMCC::CondCodes CC, ARMCC::CondCodes OCC, SmallSet<unsigned, 4> &Defs, SmallSet<unsigned, 4> &Uses) argument [all...] |
H A D | Thumb2SizeReduction.cpp | 228 SmallSet<unsigned, 2> Defs; 236 Defs.insert(Reg); 244 if (Defs.count(Reg))
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/external/llvm/lib/CodeGen/ |
H A D | MachineCopyPropagation.cpp | 68 const DestList& Defs = SI->second; local 69 for (DestList::const_iterator I = Defs.begin(), E = Defs.end(); 221 SmallVector<unsigned, 2> Defs; local 238 Defs.push_back(Reg); 277 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 278 unsigned Reg = Defs[i];
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H A D | MachineInstrBundle.cpp | 120 SmallVector<MachineOperand*, 4> Defs; local 127 Defs.push_back(&MO); 152 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 153 MachineOperand &MO = *Defs[i]; 181 Defs.clear();
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H A D | RegisterPressure.cpp | 311 SmallVector<unsigned, 8> Defs; member in struct:RegisterOperands 326 if (findReg(MO.getReg(), isVReg, Defs, TRI) == Defs.end()) 327 Defs.push_back(MO.getReg()); 354 if (findRegAlias(Reg, PhysRegOpers.Defs, TRI) != PhysRegOpers.Defs.end()) 464 for (unsigned i = 0, e = PhysRegOpers.Defs.size(); i < e; ++i) { 465 unsigned Reg = PhysRegOpers.Defs[i]; 471 for (unsigned i = 0, e = VirtRegOpers.Defs.size(); i < e; ++i) { 472 unsigned Reg = VirtRegOpers.Defs[ [all...] |
H A D | LiveVariables.cpp | 444 SmallVector<unsigned, 4> &Defs) { 483 Defs.push_back(Reg); // Remember this def. 487 SmallVector<unsigned, 4> &Defs) { 488 while (!Defs.empty()) { 489 unsigned Reg = Defs.back(); 490 Defs.pop_back(); 537 SmallVector<unsigned, 4> Defs; local 542 HandlePhysRegDef(*II, 0, Defs); 605 HandlePhysRegDef(MOReg, MI, Defs); 607 UpdatePhysRegDefs(MI, Defs); 443 HandlePhysRegDef(unsigned Reg, MachineInstr *MI, SmallVector<unsigned, 4> &Defs) argument 486 UpdatePhysRegDefs(MachineInstr *MI, SmallVector<unsigned, 4> &Defs) argument 811 SmallSet<unsigned, 16> Defs, Kills; local [all...] |
H A D | TwoAddressInstructionPass.cpp | 760 SmallSet<unsigned, 2> Defs; local 769 Defs.insert(MOReg); 780 while (To->isCopy() && Defs.count(To->getOperand(1).getReg())) { 781 Defs.insert(To->getOperand(0).getReg()); 812 if (!MO.isDead() && Defs.count(MOReg)) 818 if (Defs.count(MOReg)) 911 SmallSet<unsigned, 2> Defs; local 929 Defs.insert(MOReg); 959 if (Defs.count(MOReg)) 982 Defs 1489 SmallPtrSet<MachineInstr*, 8> Defs; local [all...] |
H A D | MachineLICM.cpp | 844 SmallVector<unsigned, 4> Defs; 855 Defs.push_back(Reg); 867 while (!Defs.empty()) { 868 unsigned Reg = Defs.pop_back_val(); 1338 SmallVector<unsigned, 2> Defs; local 1350 Defs.push_back(i); 1354 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 1355 unsigned Idx = Defs[i]; 1363 MRI->setRegClass(Dup->getOperand(Defs[j]).getReg(), OrigRCs[j]); 1368 for (unsigned i = 0, e = Defs [all...] |
H A D | LiveDebugVariables.cpp | 625 SmallVector<std::pair<SlotIndex, unsigned>, 16> Defs; local 630 Defs.push_back(std::make_pair(I.start(), I.value())); 633 for (unsigned i = 0; i != Defs.size(); ++i) { 634 SlotIndex Idx = Defs[i].first; 635 unsigned LocNo = Defs[i].second; 654 addDefsFromCopies(LI, LocNo, Kills, Defs, MRI, LIS);
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H A D | ScheduleDAGInstrs.cpp | 310 if (!Defs.contains(*Alias)) 312 std::vector<PhysRegSUOper> &DefList = Defs[*Alias]; 342 std::vector<PhysRegSUOper> &DefList = Defs[MO.getReg()]; 407 // Defs are pushed in the order they are visited and never reordered. 769 assert(Defs.empty() && Uses.empty() && 770 "Only BuildGraph should update Defs/Uses"); 771 Defs.setRegLimit(TRI->getNumRegs()); 993 Defs.clear();
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H A D | IfConversion.cpp | 963 /// InitPredRedefs / UpdatePredRedefs - Defs by predicated instructions are 981 SmallVector<unsigned, 4> Defs; local 990 Defs.push_back(Reg); 997 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 998 unsigned Reg = Defs[i]; 1331 SmallVector<unsigned, 4> Defs; local 1340 Defs.push_back(Reg); 1350 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 1351 unsigned Reg = Defs[i];
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H A D | BranchFolding.cpp | 1480 SmallSet<unsigned,4> &Defs) { 1562 Defs.insert(*AI); 1591 SmallSet<unsigned, 4> Uses, Defs; 1593 findHoistingInsertPosAndDeps(MBB, TII, TRI, Uses, Defs); 1646 if (Defs.count(Reg) && !MO.isDead()) { 1662 if (Defs.count(Reg)) { 1476 findHoistingInsertPosAndDeps(MachineBasicBlock *MBB, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, SmallSet<unsigned,4> &Uses, SmallSet<unsigned,4> &Defs) argument
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H A D | RegAllocFast.cpp | 1140 if (const uint16_t *Defs = (*I)->getImplicitDefs()) 1141 while (*Defs) 1142 MRI->setPhysRegUsed(*Defs++);
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/external/llvm/include/llvm/CodeGen/ |
H A D | LiveVariables.h | 168 SmallVector<unsigned, 4> &Defs); 169 void UpdatePhysRegDefs(MachineInstr *MI, SmallVector<unsigned, 4> &Defs);
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H A D | ScheduleDAGInstrs.h | 220 /// Defs, Uses - Remember where defs and uses of each register are as we 224 Reg2SUnitsMap Defs; member in class:llvm::ScheduleDAGInstrs 231 /// unknown store, as we iterate. As with Defs and Uses, this is here
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H A D | MachineRegisterInfo.h | 161 template<bool Uses, bool Defs, bool SkipDebug>
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/external/llvm/utils/TableGen/ |
H A D | InstrInfoEmitter.cpp | 210 std::vector<Record*> Defs = Inst->getValueAsListOfDefs("Defs"); local 211 if (!Defs.empty()) { 212 unsigned &IL = EmittedLists[Defs]; 213 if (!IL) PrintDefList(Defs, IL = ++ListNumber, OS); 365 std::vector<Record*> DefList = Inst.TheDef->getValueAsListOfDefs("Defs");
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/external/llvm/lib/Target/X86/ |
H A D | X86FloatingPoint.cpp | 881 unsigned Defs = Mask; 885 if (!(Defs & (1 << RegNo))) 890 Defs &= ~(1 << RegNo); 892 assert((Kills & Defs) == 0 && "Register needs killing and def'ing?"); 895 while (Kills && Defs) { 897 unsigned DReg = CountTrailingZeros_32(Defs); 902 Defs &= ~(1 << DReg); 927 while(Defs) { 928 unsigned DReg = CountTrailingZeros_32(Defs); 932 Defs [all...] |
/external/llvm/include/llvm/TableGen/ |
H A D | Record.h | 1546 std::map<std::string, Record*> Classes, Defs; member in class:llvm::RecordKeeper 1553 for (std::map<std::string, Record*>::iterator I = Defs.begin(), 1554 E = Defs.end(); I != E; ++I) 1559 const std::map<std::string, Record*> &getDefs() const { return Defs; } 1566 std::map<std::string, Record*>::const_iterator I = Defs.find(Name); 1567 return I == Defs.end() ? 0 : I->second; 1575 bool Ins = Defs.insert(std::make_pair(R->getName(), R)).second; 1589 assert(Defs.count(Name) && "Def does not exist!"); 1590 Defs.erase(Name);
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/external/llvm/lib/TableGen/ |
H A D | Record.cpp | 1837 std::vector<Record*> Defs; local 1840 Defs.push_back(DI->getDef()); 1846 return Defs; 1973 errs() << "Defs:\n"; 1992 OS << "------------- Defs -----------------\n"; 1993 const std::map<std::string, Record*> &Defs = RK.getDefs(); local 1994 for (std::map<std::string, Record*>::const_iterator I = Defs.begin(), 1995 E = Defs.end(); I != E; ++I) 2010 std::vector<Record*> Defs; local 2014 Defs [all...] |