Searched refs:Instr (Results 1 - 25 of 35) sorted by relevance

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/external/v8/src/arm/
H A Dconstants-arm.h116 // General constants are in an anonymous enum in class Instr.
181 // Instr is merely used by the Assembler to distinguish 32bit integers
185 typedef int32_t Instr; typedef in namespace:v8::internal
446 extern const Instr kPopInstruction;
450 extern const Instr kPushRegPattern;
454 extern const Instr kPopRegPattern;
457 extern const Instr kMovLrPc;
459 extern const Instr kLdrPCMask;
460 extern const Instr kLdrPCPattern;
462 extern const Instr kBlxRegMas
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H A Dassembler-arm.h427 bool is_single_instruction(Instr instr = 0) const;
602 extern const Instr kMovLrPc;
603 extern const Instr kLdrPCMask;
604 extern const Instr kLdrPCPattern;
605 extern const Instr kBlxRegMask;
606 extern const Instr kBlxRegPattern;
607 extern const Instr kBlxIp;
609 extern const Instr kMovMvnMask;
610 extern const Instr kMovMvnPattern;
611 extern const Instr kMovMvnFli
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H A Dassembler-arm.cc144 Instr* pc = reinterpret_cast<Instr*>(pc_);
145 Instr* instr = reinterpret_cast<Instr*>(instructions);
239 const Instr kPopInstruction =
244 const Instr kPushRegPattern =
248 const Instr kPopRegPattern =
251 const Instr kMovLrPc = al | MOV | kRegister_pc_Code | kRegister_lr_Code * B12;
253 const Instr kLdrPCMask = kCondMask | 15 * B24 | 7 * B20 | 15 * B16;
254 const Instr kLdrPCPatter
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H A Dassembler-arm-inl.h204 Instr current_instr = Assembler::instr_at(pc_);
205 Instr next_instr = Assembler::instr_at(pc_ + Assembler::kInstrSize);
223 Instr current_instr = Assembler::instr_at(pc_);
325 void Assembler::emit(Instr x) {
327 *reinterpret_cast<Instr*>(pc_) = x;
334 Instr instr = Memory::int32_at(target_pc);
H A Dsimulator-arm.h375 Instr break_instr_;
H A Dmacro-assembler-arm.h627 static inline bool IsMarkedCode(Instr instr, int type) {
633 static inline int GetCodeMarker(Instr instr) {
1339 void Emit(Instr instr);
H A Dcode-stubs-arm.h498 Instr first_instruction = Assembler::instr_at(stub->instruction_start());
499 Instr second_instruction = Assembler::instr_at(stub->instruction_start() +
/external/v8/src/mips/
H A Dassembler-mips.h593 static const int kInstrSize = sizeof(Instr);
952 static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); }
953 static void instr_at_put(byte* pc, Instr instr) {
954 *reinterpret_cast<Instr*>(pc) = instr;
956 Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); }
957 void instr_at_put(int pos, Instr instr) {
958 *reinterpret_cast<Instr*>(buffer_ + pos) = instr;
962 static bool IsBranch(Instr inst
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H A Dconstants-mips.h172 typedef int32_t Instr; typedef in namespace:v8::internal
570 extern const Instr kPopInstruction;
572 extern const Instr kPushInstruction;
574 extern const Instr kPushRegPattern;
576 extern const Instr kPopRegPattern;
577 extern const Instr kLwRegFpOffsetPattern;
578 extern const Instr kSwRegFpOffsetPattern;
579 extern const Instr kLwRegFpNegOffsetPattern;
580 extern const Instr kSwRegFpNegOffsetPattern;
582 extern const Instr kRtMas
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H A Dassembler-mips.cc190 Instr* pc = reinterpret_cast<Instr*>(pc_);
191 Instr* instr = reinterpret_cast<Instr*>(instructions);
240 const Instr kPopInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
243 const Instr kPushInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
246 const Instr kPushRegPattern = SW | (kRegister_sp_Code << kRsShift)
249 const Instr kPopRegPattern = LW | (kRegister_sp_Code << kRsShift)
252 const Instr kLwRegFpOffsetPattern = LW | (kRegister_fp_Code << kRsShift)
255 const Instr kSwRegFpOffsetPatter
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H A Dassembler-mips-inl.h275 Instr instr0 = Assembler::instr_at(pc_);
276 Instr instr1 = Assembler::instr_at(pc_ + 1 * Assembler::kInstrSize);
277 Instr instr2 = Assembler::instr_at(pc_ + 2 * Assembler::kInstrSize);
288 Instr current_instr = Assembler::instr_at(pc_);
361 void Assembler::emit(Instr x) {
365 *reinterpret_cast<Instr*>(pc_) = x;
H A Dsimulator-mips.h383 Instr break_instr_;
H A Dmacro-assembler-mips.h443 static inline bool IsMarkedCode(Instr instr, int type) {
449 static inline int GetCodeMarker(Instr instr) {
1503 void Emit(Instr instr);
/external/llvm/lib/Transforms/Utils/
H A DBypassSlowDivision.cpp84 Instruction *Instr = J; local
85 Value *Dividend = Instr->getOperand(0);
86 Value *Divisor = Instr->getOperand(1);
141 PHINode *QuoPhi = SuccessorBuilder.CreatePHI(Instr->getType(), 2);
144 PHINode *RemPhi = SuccessorBuilder.CreatePHI(Instr->getType(), 2);
148 // Replace Instr with appropriate phi node
150 Instr->replaceAllUsesWith(QuoPhi);
152 Instr->replaceAllUsesWith(RemPhi);
153 Instr->eraseFromParent();
192 Instruction *Instr local
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/external/llvm/lib/Target/NVPTX/
H A DVectorElementize.cpp102 void createVecShuffle(MachineFunction& F, MachineInstr *Instr,
105 void createVecExtract(MachineFunction& F, MachineInstr *Instr,
108 void createVecInsert(MachineFunction& F, MachineInstr *Instr,
111 void createVecBuild(MachineFunction& F, MachineInstr *Instr,
166 ///Instr is assumed to be a vector instruction. For most vector instructions,
172 unsigned VectorElementize::numCopiesNeeded(MachineInstr *Instr) { argument
175 for (unsigned i=0, e=Instr->getNumOperands(); i!=e; ++i) {
176 MachineOperand oper = Instr->getOperand(i);
186 unsigned regnum = Instr->getOperand(def).getReg();
187 if (ISVECEXTRACT(Instr))
242 createLoadCopy(MachineFunction& F, MachineInstr *Instr, std::vector<MachineInstr *>& copies) argument
279 createStoreCopy(MachineFunction& F, MachineInstr *Instr, std::vector<MachineInstr *>& copies) argument
315 createVecShuffle(MachineFunction& F, MachineInstr *Instr, std::vector<MachineInstr *>& copies) argument
351 createVecExtract(MachineFunction& F, MachineInstr *Instr, std::vector<MachineInstr *>& copies) argument
375 createVecInsert(MachineFunction& F, MachineInstr *Instr, std::vector<MachineInstr *>& copies) argument
411 createVecBuild(MachineFunction& F, MachineInstr *Instr, std::vector<MachineInstr *>& copies) argument
438 createVecDest(MachineFunction& F, MachineInstr *Instr, std::vector<MachineInstr *>& copies) argument
470 createCopies(MachineFunction& F, MachineInstr *Instr, std::vector<MachineInstr *>& copies) argument
559 MachineInstr *Instr = &*II; local
599 MachineInstr *Instr = &*II; local
681 MachineInstr *Instr = &*II; local
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/external/openssl/crypto/des/times/
H A Daix.cc6 Data/Instr Cache : 16 K
/external/llvm/include/llvm/CodeGen/
H A DScheduleDAG.h251 MachineInstr *Instr; // Alternatively, a MachineInstr. member in class:llvm::SUnit
304 : Node(node), Instr(0), OrigNode(0), NodeNum(nodenum),
318 : Node(0), Instr(instr), OrigNode(0), NodeNum(nodenum),
331 : Node(0), Instr(0), OrigNode(0), NodeNum(~0u),
345 assert(!Instr && "Setting SDNode of SUnit with MachineInstr!");
352 assert(!Instr && "Reading SDNode of SUnit with MachineInstr!");
358 bool isInstr() const { return Instr; }
364 Instr = MI;
371 return Instr;
H A DLiveIntervalAnalysis.h178 bool isNotInMIMap(const MachineInstr* Instr) const {
179 return !Indexes->hasIndex(Instr);
/external/llvm/lib/MC/
H A DMCDwarf.cpp875 const MCCFIInstruction &Instr);
926 const MCCFIInstruction &Instr) {
930 switch (Instr.getOperation()) {
933 const MachineLocation &Dst = Instr.getDestination();
934 const MachineLocation &Src = Instr.getSource();
935 const bool IsRelative = Instr.getOperation() == MCCFIInstruction::RelMove;
1007 unsigned Reg = Instr.getDestination().getReg();
1015 unsigned Reg = Instr.getDestination().getReg();
1025 Streamer.EmitBytes(Instr.getValues(), 0);
1037 const MCCFIInstruction &Instr local
925 EmitCFIInstruction(MCStreamer &Streamer, const MCCFIInstruction &Instr) argument
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/external/llvm/utils/TableGen/
H A DInstrInfoEmitter.cpp236 const CodeGenInstruction *Instr = NumberedInstructions[i]; local
237 InstrNames.add(Instr->TheDef->getName());
249 const CodeGenInstruction *Instr = NumberedInstructions[i]; local
250 OS << InstrNames.get(Instr->TheDef->getName()) << "U, ";
H A DCodeGenTarget.cpp309 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records); local
310 assert(Instr && "Missing target independent instruction");
311 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace");
312 InstrsByEnum.push_back(Instr);
/external/llvm/include/llvm-c/
H A DCore.h2171 void LLVMSetInstructionCallConv(LLVMValueRef Instr, unsigned CC);
2181 unsigned LLVMGetInstructionCallConv(LLVMValueRef Instr);
2184 void LLVMAddInstrAttribute(LLVMValueRef Instr, unsigned index, LLVMAttribute);
2185 void LLVMRemoveInstrAttribute(LLVMValueRef Instr, unsigned index,
2187 void LLVMSetInstrParamAlignment(LLVMValueRef Instr, unsigned index,
2275 LLVMValueRef Instr);
2276 void LLVMPositionBuilderBefore(LLVMBuilderRef Builder, LLVMValueRef Instr);
2280 void LLVMInsertIntoBuilder(LLVMBuilderRef Builder, LLVMValueRef Instr);
2281 void LLVMInsertIntoBuilderWithName(LLVMBuilderRef Builder, LLVMValueRef Instr,
/external/llvm/lib/VMCore/
H A DCore.cpp1597 Instruction *Instr = unwrap<Instruction>(Inst); local
1598 BasicBlock::iterator I = Instr;
1599 if (++I == Instr->getParent()->end())
1605 Instruction *Instr = unwrap<Instruction>(Inst); local
1606 BasicBlock::iterator I = Instr;
1607 if (I == Instr->getParent()->begin())
1633 unsigned LLVMGetInstructionCallConv(LLVMValueRef Instr) { argument
1634 Value *V = unwrap(Instr);
1642 void LLVMSetInstructionCallConv(LLVMValueRef Instr, unsigned CC) { argument
1643 Value *V = unwrap(Instr);
1651 LLVMAddInstrAttribute(LLVMValueRef Instr, unsigned index, LLVMAttribute PA) argument
1658 LLVMRemoveInstrAttribute(LLVMValueRef Instr, unsigned index, LLVMAttribute PA) argument
1665 LLVMSetInstrParamAlignment(LLVMValueRef Instr, unsigned index, unsigned align) argument
1721 LLVMPositionBuilder(LLVMBuilderRef Builder, LLVMBasicBlockRef Block, LLVMValueRef Instr) argument
1728 LLVMPositionBuilderBefore(LLVMBuilderRef Builder, LLVMValueRef Instr) argument
1746 LLVMInsertIntoBuilder(LLVMBuilderRef Builder, LLVMValueRef Instr) argument
1750 LLVMInsertIntoBuilderWithName(LLVMBuilderRef Builder, LLVMValueRef Instr, const char *Name) argument
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/external/llvm/tools/llvm-stress/
H A Dllvm-stress.cpp667 Instruction *Instr = *it; local
668 BasicBlock *Curr = Instr->getParent();
669 BasicBlock::iterator Loc= Instr;
671 Instr->moveBefore(Curr->getTerminator());
673 BranchInst::Create(Curr, Next, Instr, Curr->getTerminator());
/external/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp3241 MachineInstr *Instr = &*RI; local
3244 isRedundantFlagInstr(CmpInstr, SrcReg, SrcReg2, CmpValue, Instr)) {
3245 Sub = Instr;
3249 if (Instr->modifiesRegister(X86::EFLAGS, TRI) ||
3250 Instr->readsRegister(X86::EFLAGS, TRI)) {
3256 if (!Movr0Inst && (Instr->getOpcode() == X86::MOV8r0 ||
3257 Instr->getOpcode() == X86::MOV16r0 ||
3258 Instr->getOpcode() == X86::MOV32r0 ||
3259 Instr->getOpcode() == X86::MOV64r0) &&
3260 Instr
3285 const MachineInstr &Instr = *I; local
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