/external/llvm/utils/TableGen/ |
H A D | AsmWriterInst.h | 87 std::vector<AsmWriterOperand> Operands; member in class:llvm::AsmWriterInst 104 if (!Operands.empty() && 105 Operands.back().OperandType == AsmWriterOperand::isLiteralTextOperand) 106 Operands.back().Str.append(Str); 108 Operands.push_back(AsmWriterOperand(Str));
|
H A D | FastISelEmitter.cpp | 116 SmallVector<OpKind, 3> Operands; 119 return Operands < O.Operands; 122 return Operands == O.Operands; 125 bool empty() const { return Operands.empty(); } 128 for (unsigned i = 0, e = Operands.size(); i != e; ++i) 129 if (Operands[i].isImm() && Operands[i].getImmCode() != 0) 138 for (unsigned i = 0, e = Operands [all...] |
H A D | AsmWriterInst.cpp | 86 Operands.push_back( 118 Operands.push_back( 195 Operands.push_back(AsmWriterOperand("PrintSpecial", 201 unsigned OpNo = CGI.Operands.getOperandNamed(VarName); 202 CGIOperandList::OperandInfo OpInfo = CGI.Operands[OpNo]; 205 Operands.push_back(AsmWriterOperand(OpInfo.PrinterMethodName, 212 Operands.push_back(AsmWriterOperand("return;", 221 if (Operands.size() != Other.Operands.size()) return ~1; 224 for (unsigned i = 0, e = Operands [all...] |
H A D | PseudoLoweringEmitter.cpp | 92 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec) 96 Insn.Operands[BaseIdx + i].Rec->getName() + "'"); 100 for (unsigned I = 0, E = Insn.Operands[i].MINumOperands; I != E; ++I) 102 OpsAdded += Insn.Operands[i].MINumOperands; 145 if (Insn.Operands.size() != Dag->getNumArgs()) 150 for (unsigned i = 0, e = Insn.Operands.size(); i != e; ++i) 151 NumMIOperands += Insn.Operands[i].MINumOperands; 159 // Operands that are a sublass of OperandWithDefaultOp have default values. 170 for (unsigned i = 0, e = SourceInsn.Operands.size(); i != e; ++i) 171 SourceOperands[SourceInsn.Operands[ [all...] |
H A D | InstrInfoEmitter.cpp | 74 for (unsigned i = 0, e = Inst.Operands.size(); i != e; ++i) { 83 DagInit *MIOI = Inst.Operands[i].MIOperandInfo; 87 OperandList.push_back(Inst.Operands[i]); 89 for (unsigned j = 0, e = Inst.Operands[i].MINumOperands; j != e; ++j) { 90 OperandList.push_back(Inst.Operands[i]); 120 if (Inst.Operands[i].Rec->isSubClassOf("PredicateOperand")) 125 if (Inst.Operands[i].Rec->isSubClassOf("OptionalDefOperand")) 130 assert(!Inst.Operands[i].OperandType.empty() && "Invalid operand type."); 131 Res += Inst.Operands[i].OperandType; 137 Inst.Operands[ [all...] |
H A D | AsmWriterEmitter.cpp | 108 for (unsigned i = 0, e = FirstInst.Operands.size(); i != e; ++i) { 111 O << " " << FirstInst.Operands[i].getCode(); 119 FirstInst.Operands[i])); 125 AWI.Operands[i])); 155 if (Inst->Operands.empty()) 158 Command = " " + Inst->Operands[0].getCode() + "\n"; 197 if (!FirstInst || FirstInst->Operands.size() == Op) 205 size_t MaxSize = FirstInst->Operands.size(); 216 OtherInst->Operands.size() > FirstInst->Operands [all...] |
H A D | CodeEmitterGen.cpp | 131 if (CGI.Operands.hasOperandNamed(VarName, OpIdx)) { 133 OpIdx = CGI.Operands[OpIdx].MIOperandNo; 134 assert(!CGI.Operands.isFlatOperandNotEmitted(OpIdx) && 139 while (CGI.Operands.isFlatOperandNotEmitted(NumberedOp)) 144 std::pair<unsigned, unsigned> SO = CGI.Operands.getSubOperandNumber(OpIdx); 145 std::string &EncoderMethodName = CGI.Operands[SO.first].EncoderMethodName;
|
H A D | CodeGenInstruction.cpp | 291 : TheDef(R), Operands(R), InferredFrom(0) { 305 isPredicable = Operands.isPredicable || R->getValueAsBit("isPredicable"); 334 ParseConstraints(R->getValueAsString("Constraints"), Operands); 337 Operands.ProcessDisableEncoding(R->getValueAsString("DisableEncoding")); 500 // If both are Operands with the same MVT, allow the conversion. It's 547 for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) { 552 if (ResultInst->Operands[i].MINumOperands == 1 && 553 ResultInst->Operands[i].getTiedRegister() != -1) 559 Record *InstOpRec = ResultInst->Operands[i].Rec; 560 unsigned NumSubOps = ResultInst->Operands[ [all...] |
H A D | X86RecognizableInstr.h | 97 const std::vector<CGIOperandList::OperandInfo>* Operands; member in class:llvm::X86Disassembler::RecognizableInstr
|
/external/llvm/include/llvm/MC/ |
H A D | MCTargetAsmParser.h | 63 /// \param Operands [out] - The list of parsed operands, this returns 67 SmallVectorImpl<MCParsedAsmOperand*> &Operands) = 0; 89 SmallVectorImpl<MCParsedAsmOperand*> &Operands, 105 SmallVectorImpl<MCParsedAsmOperand*> &Operands, 115 const SmallVectorImpl<MCParsedAsmOperand*> &Operands, 88 MatchInstruction(SMLoc IDLoc, unsigned &Kind, SmallVectorImpl<MCParsedAsmOperand*> &Operands, SmallVectorImpl<MCInst> &MCInsts, unsigned &OrigErrorInfo, bool matchingInlineAsm = false) argument
|
H A D | MCInst.h | 153 SmallVector<MCOperand, 8> Operands; member in class:llvm::MCInst 163 const MCOperand &getOperand(unsigned i) const { return Operands[i]; } 164 MCOperand &getOperand(unsigned i) { return Operands[i]; } 165 unsigned getNumOperands() const { return Operands.size(); } 168 Operands.push_back(Op); 171 void clear() { Operands.clear(); } 172 size_t size() { return Operands.size(); } 175 iterator begin() { return Operands.begin(); } 176 iterator end() { return Operands.end(); } 178 return Operands [all...] |
/external/llvm/lib/Target/MBlaze/AsmParser/ |
H A D | MBlazeAsmParser.cpp | 37 MBlazeOperand *ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands); 41 MBlazeOperand* ParseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands); 48 SmallVectorImpl<MCParsedAsmOperand*> &Operands, 60 const SmallVectorImpl<MCParsedAsmOperand*> &Operands, 62 return getMCInstOperandNumImpl(Kind, Inst, Operands, OperandNum, 71 SmallVectorImpl<MCParsedAsmOperand*> &Operands); 323 SmallVectorImpl<MCParsedAsmOperand*> &Operands, 329 switch (MatchInstructionImpl(Operands, Kind, Inst, ErrorInfo)) { 341 if (ErrorInfo >= Operands.size()) 344 ErrorLoc = ((MBlazeOperand*)Operands[ErrorInf 59 getMCInstOperandNum(unsigned Kind, MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands, unsigned OperandNum, unsigned &NumMCOperands) argument 322 MatchAndEmitInstruction(SMLoc IDLoc, SmallVectorImpl<MCParsedAsmOperand*> &Operands, MCStreamer &Out) argument 356 ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 459 ParseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 487 ParseInstruction(StringRef Name, SMLoc NameLoc, SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument [all...] |
/external/llvm/lib/Target/Mips/AsmParser/ |
H A D | MipsAsmParser.cpp | 45 SmallVectorImpl<MCParsedAsmOperand*> &Operands, 51 SmallVectorImpl<MCParsedAsmOperand*> &Operands); 54 SmallVectorImpl<MCParsedAsmOperand*> &Operands); 63 const SmallVectorImpl<MCParsedAsmOperand*> &Operands, 71 bool tryParseRegisterOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands, 266 const SmallVectorImpl<MCParsedAsmOperand*> &Operands, 278 SmallVectorImpl<MCParsedAsmOperand*> &Operands, 283 unsigned MatchResult = MatchInstructionImpl(Operands, Kind, Inst, ErrorInfo); 298 if (ErrorInfo >= Operands.size()) 301 ErrorLoc = ((MipsOperand*)Operands[ErrorInf 265 getMCInstOperandNum(unsigned Kind, MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands, unsigned OperandNum, unsigned &NumMCOperands) argument 277 MatchAndEmitInstruction(SMLoc IDLoc, SmallVectorImpl<MCParsedAsmOperand*> &Operands, MCStreamer &Out) argument 452 tryParseRegisterOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands, StringRef Mnemonic) argument 762 parseMathOperation(StringRef Name, SMLoc NameLoc, SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 815 ParseInstruction(StringRef Name, SMLoc NameLoc, SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument [all...] |
/external/llvm/lib/Target/X86/AsmParser/ |
H A D | X86AsmParser.cpp | 67 SmallVectorImpl<MCParsedAsmOperand*> &Operands, 71 SmallVectorImpl<MCParsedAsmOperand*> &Operands, 77 const SmallVectorImpl<MCParsedAsmOperand*> &Operands, 79 return getMCInstOperandNumImpl(Kind, Inst, Operands, OperandNum, 118 SmallVectorImpl<MCParsedAsmOperand*> &Operands); 988 SmallVectorImpl<MCParsedAsmOperand*> &Operands) { 1055 Operands.push_back(X86Operand::CreateToken(PatchedName, NameLoc)); 1058 Operands.push_back(X86Operand::CreateImm(ExtraImmOp, NameLoc, NameLoc)); 1077 Operands.push_back(X86Operand::CreateToken("*", Loc)); 1083 Operands 76 getMCInstOperandNum(unsigned Kind, MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands, unsigned OperandNum, unsigned &NumMCOperands) argument 987 ParseInstruction(StringRef Name, SMLoc NameLoc, SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 1524 MatchAndEmitInstruction(SMLoc IDLoc, SmallVectorImpl<MCParsedAsmOperand*> &Operands, MCStreamer &Out) argument 1540 MatchInstruction(SMLoc IDLoc, unsigned &Kind, SmallVectorImpl<MCParsedAsmOperand*> &Operands, SmallVectorImpl<MCInst> &MCInsts, unsigned &OrigErrorInfo, bool matchingInlineAsm) argument [all...] |
/external/llvm/lib/MC/MCDisassembler/ |
H A D | EDInst.cpp | 42 unsigned int numOperands = Operands.size(); 45 delete Operands[index]; 124 Operands.push_back(operand); 151 return Operands.size(); 158 if (index >= Operands.size()) 161 operand = Operands[index];
|
H A D | EDInst.h | 82 opvec_t Operands; member in struct:llvm::EDInst 132 /// parseOperands - populates the Operands member of the instruction,
|
/external/llvm/lib/Analysis/ |
H A D | ScalarEvolutionNormalization.cpp | 109 SmallVector<const SCEV *, 8> Operands; local 116 Operands.push_back(TransformSubExpr(*I, LUser, 0)); 119 const SCEV *Result = SE.getAddRecExpr(Operands, L, SCEV::FlagAnyWrap); 160 SmallVector<const SCEV *, 8> Operands; local 168 Operands.push_back(N); 173 case scAddExpr: return SE.getAddExpr(Operands); 174 case scMulExpr: return SE.getMulExpr(Operands); 175 case scSMaxExpr: return SE.getSMaxExpr(Operands); 176 case scUMaxExpr: return SE.getUMaxExpr(Operands);
|
/external/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 227 SmallVectorImpl<MCParsedAsmOperand*> &Operands); 257 SmallVectorImpl<MCParsedAsmOperand*> &Operands); 263 SmallVectorImpl<MCParsedAsmOperand*> &Operands, 267 const SmallVectorImpl<MCParsedAsmOperand*> &Operands, 269 return getMCInstOperandNumImpl(Kind, Inst, Operands, OperandNum, NumMCOperands); 2519 SmallVectorImpl<MCParsedAsmOperand*> &Operands) { 2542 OwningPtr<ARMOperand> PrevOp((ARMOperand*)Operands.pop_back_val()); 2599 Operands.push_back(ARMOperand::CreateShiftedRegister(ShiftTy, SrcReg, 2603 Operands.push_back(ARMOperand::CreateShiftedImmediate(ShiftTy, SrcReg, Imm, 2617 tryParseRegisterWithWriteBack(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { argument 266 getMCInstOperandNum(unsigned Kind, MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands, unsigned OperandNum, unsigned &NumMCOperands) argument 2518 tryParseShiftRegister( SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 2702 parseITCondCode(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 2739 parseCoprocNumOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 2758 parseCoprocRegOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 2776 parseCoprocOptionOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 2854 parseRegisterList(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 3029 parseVectorList(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 3281 parseMemBarrierOptOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 3343 parseProcIFlagsOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 3377 parseMSRMaskOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 3504 parsePKHImm(SmallVectorImpl<MCParsedAsmOperand*> &Operands, StringRef Op, int Low, int High) argument 3551 parseSetEndImm(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 3580 parseShifterImm(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 3650 parseRotImm(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 3696 parseBitfield(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 3764 parsePostIdxReg(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 3811 parseAM3Offset(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 3885 cvtT2LdrdPre(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 3902 cvtT2StrdPre(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 3919 cvtLdWriteBackRegT2AddrModeImm8(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 3934 cvtStWriteBackRegT2AddrModeImm8(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 3947 cvtLdWriteBackRegAddrMode2(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 3962 cvtLdWriteBackRegAddrModeImm12(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 3978 cvtStWriteBackRegAddrModeImm12(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 3991 cvtStWriteBackRegAddrMode2(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 4004 cvtStWriteBackRegAddrMode3(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 4017 cvtLdExtTWriteBackImm(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 4035 cvtLdExtTWriteBackReg(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 4053 cvtStExtTWriteBackImm(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 4071 cvtStExtTWriteBackReg(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 4089 cvtLdrdPre(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 4106 cvtStrdPre(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 4123 cvtLdWriteBackRegAddrMode3(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 4136 cvtThumbMultiply(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 4153 cvtVLDwbFixed(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 4166 cvtVLDwbRegister(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 4181 cvtVSTwbFixed(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 4194 cvtVSTwbRegister(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 4211 parseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 4450 parseFPImm(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 4525 parseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands, StringRef Mnemonic) argument 4806 shouldOmitCCOutOperand(StringRef Mnemonic, SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 4954 ParseInstruction(StringRef Name, SMLoc NameLoc, SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 5230 validateInstruction(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 5665 processInstruction(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument 7461 MatchAndEmitInstruction(SMLoc IDLoc, SmallVectorImpl<MCParsedAsmOperand*> &Operands, MCStreamer &Out) argument [all...] |
/external/llvm/lib/CodeGen/ |
H A D | MachineInstr.cpp | 547 Operands.reserve(NumImplicitOps + MCID->getNumOperands()); 562 Operands.reserve(NumImplicitOps + MCID->getNumOperands()); 578 Operands.reserve(NumImplicitOps + MCID->getNumOperands()); 594 Operands.reserve(NumImplicitOps + MCID->getNumOperands()); 607 Operands.reserve(MI.getNumOperands()); 625 for (unsigned i = 0, e = Operands.size(); i != e; ++i) { 626 assert(Operands[i].ParentMI == this && "ParentMI mismatch!"); 627 assert((!Operands[i].isReg() || !Operands[i].isOnRegUseList()) && 646 for (unsigned i = 0, e = Operands [all...] |
/external/llvm/include/llvm/Analysis/ |
H A D | ConstantFolding.h | 98 Constant *ConstantFoldCall(Function *F, ArrayRef<Constant *> Operands,
|
H A D | ScalarEvolutionExpressions.h | 144 const SCEV *const *Operands; member in class:llvm::SCEVNAryExpr 149 : SCEV(ID, T), Operands(O), NumOperands(N) {} 155 return Operands[i]; 159 op_iterator op_begin() const { return Operands; } 160 op_iterator op_end() const { return Operands + NumOperands; } 303 const SCEV *getStart() const { return Operands[0]; }
|
/external/llvm/lib/Transforms/IPO/ |
H A D | ArgumentPromotion.cpp | 376 IndicesVector Operands; local 380 Operands.clear(); 386 Operands.push_back(0); 403 Operands.push_back(C->getSExtValue()); 423 // is safe if Operands, or a prefix of Operands, is marked as safe. 424 if (!PrefixIn(Operands, SafeToUnconditionallyLoad)) 430 if (ToPromote.find(Operands) == ToPromote.end()) { 439 ToPromote.insert(Operands); 833 IndicesVector Operands; local [all...] |
/external/llvm/test/MC/X86/ |
H A D | x86_operands.s | 30 # Indirect Memory Operands
|
/external/llvm/include/llvm/CodeGen/ |
H A D | MachineInstr.h | 81 std::vector<MachineOperand> Operands; // the operands member in class:llvm::MachineInstr 262 unsigned getNumOperands() const { return (unsigned)Operands.size(); } 266 return Operands[i]; 270 return Operands[i]; 281 mop_iterator operands_begin() { return Operands.begin(); } 282 mop_iterator operands_end() { return Operands.end(); } 284 const_mop_iterator operands_begin() const { return Operands.begin(); } 285 const_mop_iterator operands_end() const { return Operands.end(); }
|
/external/llvm/lib/VMCore/ |
H A D | Metadata.cpp | 253 // Coallocate space for the node and Operands together, then placement new. 558 static SmallVector<TrackingVH<MDNode>, 4> &getNMDOps(void *Operands) { argument 559 return *(SmallVector<TrackingVH<MDNode>, 4>*)Operands; 564 Operands(new SmallVector<TrackingVH<MDNode>, 4>()) { 569 delete &getNMDOps(Operands); 574 return (unsigned)getNMDOps(Operands).size(); 580 return dyn_cast<MDNode>(&*getNMDOps(Operands)[i]); 587 getNMDOps(Operands).push_back(TrackingVH<MDNode>(M)); 598 getNMDOps(Operands).clear();
|