1%default {"preinstr":"", "result0":"r0", "result1":"r1", "chkzero":"0"}
2    /*
3     * Generic 64-bit "/2addr" binary operation.  Provide an "instr" line
4     * that specifies an instruction that performs "result = r0-r1 op r2-r3".
5     * This could be an ARM instruction or a function call.  (If the result
6     * comes back in a register other than r0, you can override "result".)
7     *
8     * If "chkzero" is set to 1, we perform a divide-by-zero check on
9     * vCC (r1).  Useful for integer division and modulus.
10     *
11     * For: add-long/2addr, sub-long/2addr, div-long/2addr, rem-long/2addr,
12     *      and-long/2addr, or-long/2addr, xor-long/2addr, add-double/2addr,
13     *      sub-double/2addr, mul-double/2addr, div-double/2addr,
14     *      rem-double/2addr
15     */
16    /* binop/2addr vA, vB */
17    mov     r9, rINST, lsr #8           @ r9<- A+
18    mov     r1, rINST, lsr #12          @ r1<- B
19    and     r9, r9, #15
20    add     r1, rFP, r1, lsl #2         @ r1<- &fp[B]
21    add     r9, rFP, r9, lsl #2         @ r9<- &fp[A]
22    ldmia   r1, {r2-r3}                 @ r2/r3<- vBB/vBB+1
23    ldmia   r9, {r0-r1}                 @ r0/r1<- vAA/vAA+1
24    .if $chkzero
25    orrs    ip, r2, r3                  @ second arg (r2-r3) is zero?
26    beq     common_errDivideByZero
27    .endif
28    FETCH_ADVANCE_INST(1)               @ advance rPC, load rINST
29
30    $preinstr                           @ optional op; may set condition codes
31    $instr                              @ result<- op, r0-r3 changed
32    GET_INST_OPCODE(ip)                 @ extract opcode from rINST
33    stmia   r9, {$result0,$result1}     @ vAA/vAA+1<- $result0/$result1
34    GOTO_OPCODE(ip)                     @ jump to next instruction
35    /* 12-15 instructions */
36