1/* 2 * Copyright (c) 2010 The WebM project authors. All Rights Reserved. 3 * 4 * Use of this source code is governed by a BSD-style license 5 * that can be found in the LICENSE file in the root of the source 6 * tree. An additional intellectual property rights grant can be found 7 * in the file PATENTS. All contributing project authors may 8 * be found in the AUTHORS file in the root of the source tree. 9 */ 10 11#include "vpx_ports/config.h" 12#include "onyxc_int.h" 13 14 15inline void prefetch_load_int(unsigned char* src) { 16 __asm__ __volatile__ ( 17 "pref 0, 0(%[src]) \n\t" 18 : 19 : [src] "r" (src) 20 ); 21} 22 23 24__inline void vp8_copy_mem16x16_mips( 25 unsigned char * RESTRICT src, 26 int src_stride, 27 unsigned char * RESTRICT dst, 28 int dst_stride) 29{ 30 int r; 31 unsigned int a0, a1, a2, a3; 32 33 for (r = 16; r--;) 34 { 35 /* load src data in cache memory */ 36 prefetch_load_int(src + src_stride); 37 38 /* use unaligned memory load and store */ 39 __asm__ __volatile__ ( 40 "ulw %[a0], 0(%[src]) \n\t" 41 "ulw %[a1], 4(%[src]) \n\t" 42 "ulw %[a2], 8(%[src]) \n\t" 43 "ulw %[a3], 12(%[src]) \n\t" 44 "sw %[a0], 0(%[dst]) \n\t" 45 "sw %[a1], 4(%[dst]) \n\t" 46 "sw %[a2], 8(%[dst]) \n\t" 47 "sw %[a3], 12(%[dst]) \n\t" 48 : [a0] "=&r" (a0), [a1] "=&r" (a1), 49 [a2] "=&r" (a2), [a3] "=&r" (a3) 50 : [src] "r" (src), [dst] "r" (dst) 51 ); 52 53 src += src_stride; 54 dst += dst_stride; 55 } 56} 57 58 59__inline void vp8_copy_mem8x8_mips( 60 unsigned char * RESTRICT src, 61 int src_stride, 62 unsigned char * RESTRICT dst, 63 int dst_stride) 64{ 65 int r; 66 unsigned int a0, a1; 67 68 /* load src data in cache memory */ 69 prefetch_load_int(src + src_stride); 70 71 for (r = 8; r--;) 72 { 73 /* use unaligned memory load and store */ 74 __asm__ __volatile__ ( 75 "ulw %[a0], 0(%[src]) \n\t" 76 "ulw %[a1], 4(%[src]) \n\t" 77 "sw %[a0], 0(%[dst]) \n\t" 78 "sw %[a1], 4(%[dst]) \n\t" 79 : [a0] "=&r" (a0), [a1] "=&r" (a1) 80 : [src] "r" (src), [dst] "r" (dst) 81 ); 82 83 src += src_stride; 84 dst += dst_stride; 85 } 86} 87 88 89__inline void vp8_copy_mem8x4_mips( 90 unsigned char * RESTRICT src, 91 int src_stride, 92 unsigned char * RESTRICT dst, 93 int dst_stride) 94{ 95 int r; 96 unsigned int a0, a1; 97 98 /* load src data in cache memory */ 99 prefetch_load_int(src + src_stride); 100 101 for (r = 4; r--;) 102 { 103 /* use unaligned memory load and store */ 104 __asm__ __volatile__ ( 105 "ulw %[a0], 0(%[src]) \n\t" 106 "ulw %[a1], 4(%[src]) \n\t" 107 "sw %[a0], 0(%[dst]) \n\t" 108 "sw %[a1], 4(%[dst]) \n\t" 109 : [a0] "=&r" (a0), [a1] "=&r" (a1) 110 : [src] "r" (src), [dst] "r" (dst) 111 ); 112 113 src += src_stride; 114 dst += dst_stride; 115 } 116} 117