InstrEmitter.cpp revision bcea859fc1dd1af9ac66ec93ea04ce9a19c8451c
1bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman//==--- InstrEmitter.cpp - Emit MachineInstrs for the SelectionDAG class ---==// 294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman// 394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman// The LLVM Compiler Infrastructure 494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman// 594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman// This file is distributed under the University of Illinois Open Source 694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman// License. See LICENSE.TXT for details. 794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman// 894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman//===----------------------------------------------------------------------===// 994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman// 10bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman// This implements the Emit routines for the SelectionDAG class, which creates 11bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman// MachineInstrs based on the decisions of the SelectionDAG instruction 12bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman// selection. 1394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman// 1494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman//===----------------------------------------------------------------------===// 1594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 16bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman#define DEBUG_TYPE "instr-emitter" 17bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman#include "InstrEmitter.h" 1894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman#include "llvm/CodeGen/MachineConstantPool.h" 1994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman#include "llvm/CodeGen/MachineFunction.h" 2094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman#include "llvm/CodeGen/MachineInstrBuilder.h" 2194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman#include "llvm/CodeGen/MachineRegisterInfo.h" 2294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman#include "llvm/Target/TargetData.h" 2394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman#include "llvm/Target/TargetMachine.h" 2494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman#include "llvm/Target/TargetInstrInfo.h" 2594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman#include "llvm/Target/TargetLowering.h" 2694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman#include "llvm/ADT/Statistic.h" 2794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman#include "llvm/Support/CommandLine.h" 2894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman#include "llvm/Support/Debug.h" 29c25e7581b9b8088910da31702d4ca21c4734c6d7Torok Edwin#include "llvm/Support/ErrorHandling.h" 3094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman#include "llvm/Support/MathExtras.h" 3194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohmanusing namespace llvm; 3294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 33bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman/// CountResults - The results of target nodes have register or immediate 34bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman/// operands first, then an optional chain, and optional flag operands (which do 35bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman/// not go into the resulting MachineInstr). 36bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohmanunsigned InstrEmitter::CountResults(SDNode *Node) { 37bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman unsigned N = Node->getNumValues(); 38bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman while (N && Node->getValueType(N - 1) == MVT::Flag) 39bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman --N; 40bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman if (N && Node->getValueType(N - 1) == MVT::Other) 41bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman --N; // Skip over chain result. 42bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman return N; 43bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman} 44bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman 45bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman/// CountOperands - The inputs to target nodes have any actual inputs first, 46bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman/// followed by an optional chain operand, then an optional flag operand. 47bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman/// Compute the number of actual operands that will go into the resulting 48bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman/// MachineInstr. 49bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohmanunsigned InstrEmitter::CountOperands(SDNode *Node) { 50bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman unsigned N = Node->getNumOperands(); 51bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman while (N && Node->getOperand(N - 1).getValueType() == MVT::Flag) 52bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman --N; 53bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman if (N && Node->getOperand(N - 1).getValueType() == MVT::Other) 54bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman --N; // Ignore chain if it exists. 55bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman return N; 56bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman} 57bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman 5894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman/// EmitCopyFromReg - Generate machine code for an CopyFromReg node or an 5994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman/// implicit physical register output. 60bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohmanvoid InstrEmitter:: 615202312d2ed5078b0451838ee2661f4eb5ff2ef9Chris LattnerEmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone, bool IsCloned, 625202312d2ed5078b0451838ee2661f4eb5ff2ef9Chris Lattner unsigned SrcReg, DenseMap<SDValue, unsigned> &VRBaseMap) { 6394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman unsigned VRBase = 0; 6494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (TargetRegisterInfo::isVirtualRegister(SrcReg)) { 6594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Just use the input register directly! 6694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman SDValue Op(Node, ResNo); 6794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (IsClone) 6894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman VRBaseMap.erase(Op); 6994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman bool isNew = VRBaseMap.insert(std::make_pair(Op, SrcReg)).second; 7094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman isNew = isNew; // Silence compiler warning. 7194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman assert(isNew && "Node emitted out of order - early"); 7294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman return; 7394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 7494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 7594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // If the node is only used by a CopyToReg and the dest reg is a vreg, use 7694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // the CopyToReg'd destination register instead of creating a new vreg. 7794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman bool MatchReg = true; 781cd332725f7e5fc93f08a8d3ed9806827e9b5509Evan Cheng const TargetRegisterClass *UseRC = NULL; 79e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng if (!IsClone && !IsCloned) 80e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng for (SDNode::use_iterator UI = Node->use_begin(), E = Node->use_end(); 81e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng UI != E; ++UI) { 82e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng SDNode *User = *UI; 83e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng bool Match = true; 84e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng if (User->getOpcode() == ISD::CopyToReg && 85e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng User->getOperand(2).getNode() == Node && 86e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng User->getOperand(2).getResNo() == ResNo) { 87e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng unsigned DestReg = cast<RegisterSDNode>(User->getOperand(1))->getReg(); 88e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng if (TargetRegisterInfo::isVirtualRegister(DestReg)) { 89e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng VRBase = DestReg; 90e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng Match = false; 91e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng } else if (DestReg != SrcReg) 92e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng Match = false; 93e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng } else { 94e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) { 95e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng SDValue Op = User->getOperand(i); 96e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng if (Op.getNode() != Node || Op.getResNo() != ResNo) 97e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng continue; 98e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT VT = Node->getValueType(Op.getResNo()); 99825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson if (VT == MVT::Other || VT == MVT::Flag) 100e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng continue; 101e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng Match = false; 102e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng if (User->isMachineOpcode()) { 103e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng const TargetInstrDesc &II = TII->get(User->getMachineOpcode()); 1042a3868849438a0a0ad4f9a50f2b94eb1639b554eChris Lattner const TargetRegisterClass *RC = 0; 1052a3868849438a0a0ad4f9a50f2b94eb1639b554eChris Lattner if (i+II.getNumDefs() < II.getNumOperands()) 1062a3868849438a0a0ad4f9a50f2b94eb1639b554eChris Lattner RC = II.OpInfo[i+II.getNumDefs()].getRegClass(TRI); 107e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng if (!UseRC) 108e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng UseRC = RC; 109f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman else if (RC) { 110f7e8af925cee687b94ed4b84235cf0efed75a68bJakob Stoklund Olesen const TargetRegisterClass *ComRC = getCommonSubClass(UseRC, RC); 111f7e8af925cee687b94ed4b84235cf0efed75a68bJakob Stoklund Olesen // If multiple uses expect disjoint register classes, we emit 112f7e8af925cee687b94ed4b84235cf0efed75a68bJakob Stoklund Olesen // copies in AddRegisterOperand. 113f7e8af925cee687b94ed4b84235cf0efed75a68bJakob Stoklund Olesen if (ComRC) 114f7e8af925cee687b94ed4b84235cf0efed75a68bJakob Stoklund Olesen UseRC = ComRC; 115f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman } 116e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng } 1171cd332725f7e5fc93f08a8d3ed9806827e9b5509Evan Cheng } 11894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 119e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng MatchReg &= Match; 120e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng if (VRBase) 121e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng break; 12294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 12394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 124e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT VT = Node->getValueType(ResNo); 12594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman const TargetRegisterClass *SrcRC = 0, *DstRC = 0; 1261cd332725f7e5fc93f08a8d3ed9806827e9b5509Evan Cheng SrcRC = TRI->getPhysicalRegisterRegClass(SrcReg, VT); 12794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 12894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Figure out the register class to create for the destreg. 12994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (VRBase) { 130bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman DstRC = MRI->getRegClass(VRBase); 1311cd332725f7e5fc93f08a8d3ed9806827e9b5509Evan Cheng } else if (UseRC) { 1321cd332725f7e5fc93f08a8d3ed9806827e9b5509Evan Cheng assert(UseRC->hasType(VT) && "Incompatible phys register def and uses!"); 1331cd332725f7e5fc93f08a8d3ed9806827e9b5509Evan Cheng DstRC = UseRC; 13494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } else { 1351cd332725f7e5fc93f08a8d3ed9806827e9b5509Evan Cheng DstRC = TLI->getRegClassFor(VT); 13694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 13794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 13894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // If all uses are reading from the src physical register and copying the 13994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // register is either impossible or very expensive, then don't create a copy. 14094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (MatchReg && SrcRC->getCopyCost() < 0) { 14194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman VRBase = SrcReg; 14294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } else { 14394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Create the reg, emit the copy. 144bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman VRBase = MRI->createVirtualRegister(DstRC); 145bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman bool Emitted = TII->copyRegToReg(*MBB, InsertPos, VRBase, SrcReg, 14647ac0f0c7c39289f5970688154e385be22b7f293Dan Gohman DstRC, SrcRC); 147f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 148f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman assert(Emitted && "Unable to issue a copy instruction!\n"); 1498c562e2d25d319f8bde7a1a60142203f316a2883Daniel Dunbar (void) Emitted; 15094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 15194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 15294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman SDValue Op(Node, ResNo); 15394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (IsClone) 15494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman VRBaseMap.erase(Op); 15594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second; 15694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman isNew = isNew; // Silence compiler warning. 15794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman assert(isNew && "Node emitted out of order - early"); 15894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman} 15994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 16094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman/// getDstOfCopyToRegUse - If the only use of the specified result number of 16194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman/// node is a CopyToReg, return its destination register. Return 0 otherwise. 162bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohmanunsigned InstrEmitter::getDstOfOnlyCopyToRegUse(SDNode *Node, 163bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman unsigned ResNo) const { 16494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (!Node->hasOneUse()) 16594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman return 0; 16694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 16794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman SDNode *User = *Node->use_begin(); 16894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (User->getOpcode() == ISD::CopyToReg && 16994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman User->getOperand(2).getNode() == Node && 17094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman User->getOperand(2).getResNo() == ResNo) { 17194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman unsigned Reg = cast<RegisterSDNode>(User->getOperand(1))->getReg(); 17294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (TargetRegisterInfo::isVirtualRegister(Reg)) 17394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman return Reg; 17494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 17594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman return 0; 17694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman} 17794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 178bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohmanvoid InstrEmitter::CreateVirtualRegisters(SDNode *Node, MachineInstr *MI, 179e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng const TargetInstrDesc &II, 180e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng bool IsClone, bool IsCloned, 1815c3c5a4d9c21e73f7a0e11d77a85997c9f34f2baEvan Cheng DenseMap<SDValue, unsigned> &VRBaseMap) { 18294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman assert(Node->getMachineOpcode() != TargetInstrInfo::IMPLICIT_DEF && 18394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman "IMPLICIT_DEF should have been handled as a special case elsewhere!"); 18494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 18594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman for (unsigned i = 0; i < II.getNumDefs(); ++i) { 18694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // If the specific node value is only used by a CopyToReg and the dest reg 187f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman // is a vreg in the same register class, use the CopyToReg'd destination 188f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman // register instead of creating a new vreg. 18994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman unsigned VRBase = 0; 1902a3868849438a0a0ad4f9a50f2b94eb1639b554eChris Lattner const TargetRegisterClass *RC = II.OpInfo[i].getRegClass(TRI); 1918955e93b1ffa7645beea0b51e4b091b96063f613Evan Cheng if (II.OpInfo[i].isOptionalDef()) { 1928955e93b1ffa7645beea0b51e4b091b96063f613Evan Cheng // Optional def must be a physical register. 1938955e93b1ffa7645beea0b51e4b091b96063f613Evan Cheng unsigned NumResults = CountResults(Node); 1948955e93b1ffa7645beea0b51e4b091b96063f613Evan Cheng VRBase = cast<RegisterSDNode>(Node->getOperand(i-NumResults))->getReg(); 1958955e93b1ffa7645beea0b51e4b091b96063f613Evan Cheng assert(TargetRegisterInfo::isPhysicalRegister(VRBase)); 1968955e93b1ffa7645beea0b51e4b091b96063f613Evan Cheng MI->addOperand(MachineOperand::CreateReg(VRBase, true)); 1978955e93b1ffa7645beea0b51e4b091b96063f613Evan Cheng } 198e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng 1998955e93b1ffa7645beea0b51e4b091b96063f613Evan Cheng if (!VRBase && !IsClone && !IsCloned) 200e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng for (SDNode::use_iterator UI = Node->use_begin(), E = Node->use_end(); 201e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng UI != E; ++UI) { 202e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng SDNode *User = *UI; 203e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng if (User->getOpcode() == ISD::CopyToReg && 204e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng User->getOperand(2).getNode() == Node && 205e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng User->getOperand(2).getResNo() == i) { 206e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng unsigned Reg = cast<RegisterSDNode>(User->getOperand(1))->getReg(); 207e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng if (TargetRegisterInfo::isVirtualRegister(Reg)) { 208bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman const TargetRegisterClass *RegRC = MRI->getRegClass(Reg); 209f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman if (RegRC == RC) { 210f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman VRBase = Reg; 211f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman MI->addOperand(MachineOperand::CreateReg(Reg, true)); 212f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman break; 213f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman } 214e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng } 21594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 21694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 21794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 21894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Create the result registers for this node and add the result regs to 21994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // the machine instruction. 22094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (VRBase == 0) { 22194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman assert(RC && "Isn't a register operand!"); 222bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman VRBase = MRI->createVirtualRegister(RC); 22394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman MI->addOperand(MachineOperand::CreateReg(VRBase, true)); 22494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 22594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 22694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman SDValue Op(Node, i); 2275c3c5a4d9c21e73f7a0e11d77a85997c9f34f2baEvan Cheng if (IsClone) 2285c3c5a4d9c21e73f7a0e11d77a85997c9f34f2baEvan Cheng VRBaseMap.erase(Op); 22994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second; 23094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman isNew = isNew; // Silence compiler warning. 23194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman assert(isNew && "Node emitted out of order - early"); 23294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 23394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman} 23494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 23594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman/// getVR - Return the virtual register corresponding to the specified result 23694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman/// of the specified node. 237bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohmanunsigned InstrEmitter::getVR(SDValue Op, 238bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman DenseMap<SDValue, unsigned> &VRBaseMap) { 23994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (Op.isMachineOpcode() && 24094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman Op.getMachineOpcode() == TargetInstrInfo::IMPLICIT_DEF) { 24194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Add an IMPLICIT_DEF instruction before every use. 24294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman unsigned VReg = getDstOfOnlyCopyToRegUse(Op.getNode(), Op.getResNo()); 24394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // IMPLICIT_DEF can produce any type of result so its TargetInstrDesc 24494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // does not include operand register class info. 24594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (!VReg) { 24694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman const TargetRegisterClass *RC = TLI->getRegClassFor(Op.getValueType()); 247bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman VReg = MRI->createVirtualRegister(RC); 24894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 249bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman BuildMI(MBB, Op.getDebugLoc(), 250bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman TII->get(TargetInstrInfo::IMPLICIT_DEF), VReg); 25194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman return VReg; 25294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 25394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 25494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman DenseMap<SDValue, unsigned>::iterator I = VRBaseMap.find(Op); 25594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman assert(I != VRBaseMap.end() && "Node emitted out of order - late"); 25694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman return I->second; 25794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman} 25894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 25994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 260f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman/// AddRegisterOperand - Add the specified register as an operand to the 261f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman/// specified machine instr. Insert register copies if the register is 262f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman/// not in the required register class. 263f8c7394781f7cf27ac52ca087e289436d36844daDan Gohmanvoid 264bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan GohmanInstrEmitter::AddRegisterOperand(MachineInstr *MI, SDValue Op, 265bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman unsigned IIOpNum, 266bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman const TargetInstrDesc *II, 267bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman DenseMap<SDValue, unsigned> &VRBaseMap) { 268825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson assert(Op.getValueType() != MVT::Other && 269825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson Op.getValueType() != MVT::Flag && 270f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman "Chain and flag operands should occur at end of operand list!"); 271f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman // Get/emit the operand. 272f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman unsigned VReg = getVR(Op, VRBaseMap); 273f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman assert(TargetRegisterInfo::isVirtualRegister(VReg) && "Not a vreg?"); 274f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 275f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman const TargetInstrDesc &TID = MI->getDesc(); 276f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman bool isOptDef = IIOpNum < TID.getNumOperands() && 277f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman TID.OpInfo[IIOpNum].isOptionalDef(); 278f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 279f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman // If the instruction requires a register in a different class, create 280f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman // a new virtual register and copy the value into it. 281f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman if (II) { 282bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman const TargetRegisterClass *SrcRC = MRI->getRegClass(VReg); 2832a3868849438a0a0ad4f9a50f2b94eb1639b554eChris Lattner const TargetRegisterClass *DstRC = 0; 2842a3868849438a0a0ad4f9a50f2b94eb1639b554eChris Lattner if (IIOpNum < II->getNumOperands()) 2852a3868849438a0a0ad4f9a50f2b94eb1639b554eChris Lattner DstRC = II->OpInfo[IIOpNum].getRegClass(TRI); 286f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman assert((DstRC || (TID.isVariadic() && IIOpNum >= TID.getNumOperands())) && 287f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman "Don't have operand info for this instruction!"); 288f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman if (DstRC && SrcRC != DstRC && !SrcRC->hasSuperClass(DstRC)) { 289bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman unsigned NewVReg = MRI->createVirtualRegister(DstRC); 290bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman bool Emitted = TII->copyRegToReg(*MBB, InsertPos, NewVReg, VReg, 291f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman DstRC, SrcRC); 292f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman assert(Emitted && "Unable to issue a copy instruction!\n"); 2938c562e2d25d319f8bde7a1a60142203f316a2883Daniel Dunbar (void) Emitted; 294f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman VReg = NewVReg; 295f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman } 296f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman } 297f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 298f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman MI->addOperand(MachineOperand::CreateReg(VReg, isOptDef)); 299f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman} 300f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 30194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman/// AddOperand - Add the specified operand to the specified machine instr. II 30294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman/// specifies the instruction information for the node, and IIOpNum is the 30394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman/// operand number (in the II) that we are adding. IIOpNum and II are used for 30494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman/// assertions only. 305bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohmanvoid InstrEmitter::AddOperand(MachineInstr *MI, SDValue Op, 306bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman unsigned IIOpNum, 307bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman const TargetInstrDesc *II, 308bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman DenseMap<SDValue, unsigned> &VRBaseMap) { 30994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (Op.isMachineOpcode()) { 310f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman AddRegisterOperand(MI, Op, IIOpNum, II, VRBaseMap); 31194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } else if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { 312d842962e27b10b6831c2421fa257e3fd58a85b18Chris Lattner MI->addOperand(MachineOperand::CreateImm(C->getSExtValue())); 31394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } else if (ConstantFPSDNode *F = dyn_cast<ConstantFPSDNode>(Op)) { 3144fbd796a1251a27e6590765a0a34876f436a0af9Dan Gohman const ConstantFP *CFP = F->getConstantFPValue(); 31594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman MI->addOperand(MachineOperand::CreateFPImm(CFP)); 31694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } else if (RegisterSDNode *R = dyn_cast<RegisterSDNode>(Op)) { 31786b49f8e2de796cb46c7c8b6a4c4900533fd53f4Dale Johannesen MI->addOperand(MachineOperand::CreateReg(R->getReg(), false)); 31894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } else if (GlobalAddressSDNode *TGA = dyn_cast<GlobalAddressSDNode>(Op)) { 3196ec66dba123a46a4006e0169d9edb8f5d9e1fbdcChris Lattner MI->addOperand(MachineOperand::CreateGA(TGA->getGlobal(), TGA->getOffset(), 3206ec66dba123a46a4006e0169d9edb8f5d9e1fbdcChris Lattner TGA->getTargetFlags())); 321f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman } else if (BasicBlockSDNode *BBNode = dyn_cast<BasicBlockSDNode>(Op)) { 322f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman MI->addOperand(MachineOperand::CreateMBB(BBNode->getBasicBlock())); 32394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } else if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Op)) { 32494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman MI->addOperand(MachineOperand::CreateFI(FI->getIndex())); 32594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } else if (JumpTableSDNode *JT = dyn_cast<JumpTableSDNode>(Op)) { 3266ec66dba123a46a4006e0169d9edb8f5d9e1fbdcChris Lattner MI->addOperand(MachineOperand::CreateJTI(JT->getIndex(), 3276ec66dba123a46a4006e0169d9edb8f5d9e1fbdcChris Lattner JT->getTargetFlags())); 32894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Op)) { 32994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman int Offset = CP->getOffset(); 33094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman unsigned Align = CP->getAlignment(); 33194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman const Type *Type = CP->getType(); 33294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // MachineConstantPool wants an explicit alignment. 33394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (Align == 0) { 334bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman Align = TM->getTargetData()->getPrefTypeAlignment(Type); 33594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (Align == 0) { 33694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Alignment of vector types. FIXME! 337bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman Align = TM->getTargetData()->getTypeAllocSize(Type); 33894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 33994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 34094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 34194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman unsigned Idx; 342bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman MachineConstantPool *MCP = MF->getConstantPool(); 34394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (CP->isMachineConstantPoolEntry()) 344bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman Idx = MCP->getConstantPoolIndex(CP->getMachineCPVal(), Align); 34594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman else 346bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman Idx = MCP->getConstantPoolIndex(CP->getConstVal(), Align); 3476ec66dba123a46a4006e0169d9edb8f5d9e1fbdcChris Lattner MI->addOperand(MachineOperand::CreateCPI(Idx, Offset, 3486ec66dba123a46a4006e0169d9edb8f5d9e1fbdcChris Lattner CP->getTargetFlags())); 349056292fd738924f3f7703725d8f630983794b5a5Bill Wendling } else if (ExternalSymbolSDNode *ES = dyn_cast<ExternalSymbolSDNode>(Op)) { 35031e2c7b4c13c2f31774614b1124533628958d0cdDaniel Dunbar MI->addOperand(MachineOperand::CreateES(ES->getSymbol(), 3516ec66dba123a46a4006e0169d9edb8f5d9e1fbdcChris Lattner ES->getTargetFlags())); 35294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } else { 353825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson assert(Op.getValueType() != MVT::Other && 354825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson Op.getValueType() != MVT::Flag && 35594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman "Chain and flag operands should occur at end of operand list!"); 356f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman AddRegisterOperand(MI, Op, IIOpNum, II, VRBaseMap); 357f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman } 358f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman} 359f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 360f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman/// getSuperRegisterRegClass - Returns the register class of a superreg A whose 361f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman/// "SubIdx"'th sub-register class is the specified register class and whose 362f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman/// type matches the specified type. 363f8c7394781f7cf27ac52ca087e289436d36844daDan Gohmanstatic const TargetRegisterClass* 364f8c7394781f7cf27ac52ca087e289436d36844daDan GohmangetSuperRegisterRegClass(const TargetRegisterClass *TRC, 365e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson unsigned SubIdx, EVT VT) { 366f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman // Pick the register class of the superegister for this type 367f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman for (TargetRegisterInfo::regclass_iterator I = TRC->superregclasses_begin(), 368f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman E = TRC->superregclasses_end(); I != E; ++I) 369fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen if ((*I)->hasType(VT) && (*I)->getSubRegisterRegClass(SubIdx) == TRC) 370f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman return *I; 371f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman assert(false && "Couldn't find the register class"); 372f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman return 0; 37394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman} 37494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 37594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman/// EmitSubregNode - Generate machine code for subreg nodes. 37694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman/// 377bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohmanvoid InstrEmitter::EmitSubregNode(SDNode *Node, 378bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman DenseMap<SDValue, unsigned> &VRBaseMap){ 37994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman unsigned VRBase = 0; 38094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman unsigned Opc = Node->getMachineOpcode(); 38194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 38294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // If the node is only used by a CopyToReg and the dest reg is a vreg, use 38394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // the CopyToReg'd destination register instead of creating a new vreg. 38494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman for (SDNode::use_iterator UI = Node->use_begin(), E = Node->use_end(); 38594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman UI != E; ++UI) { 38694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman SDNode *User = *UI; 38794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (User->getOpcode() == ISD::CopyToReg && 38894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman User->getOperand(2).getNode() == Node) { 38994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman unsigned DestReg = cast<RegisterSDNode>(User->getOperand(1))->getReg(); 39094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (TargetRegisterInfo::isVirtualRegister(DestReg)) { 39194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman VRBase = DestReg; 39294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman break; 39394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 39494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 39594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 39694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 39794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (Opc == TargetInstrInfo::EXTRACT_SUBREG) { 398f5aeb1a8e4cf272c7348376d185ef8d8267653e0Dan Gohman unsigned SubIdx = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue(); 39994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 40094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Create the extract_subreg machine instruction. 401bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman MachineInstr *MI = BuildMI(*MF, Node->getDebugLoc(), 402f2ad58d930aa18c8710cbd094eaf987eca0f2c1bBill Wendling TII->get(TargetInstrInfo::EXTRACT_SUBREG)); 40394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 40494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Figure out the register class to create for the destreg. 405f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman unsigned VReg = getVR(Node->getOperand(0), VRBaseMap); 406bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman const TargetRegisterClass *TRC = MRI->getRegClass(VReg); 407fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen const TargetRegisterClass *SRC = TRC->getSubRegisterRegClass(SubIdx); 408fa4677b483b85217ac216f7e8d401c40cbe348aaJakob Stoklund Olesen assert(SRC && "Invalid subregister index in EXTRACT_SUBREG"); 40994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 4105ec3b427c850d8c61aaa29e3421019bdff9b77f1Dan Gohman // Figure out the register class to create for the destreg. 4115ec3b427c850d8c61aaa29e3421019bdff9b77f1Dan Gohman // Note that if we're going to directly use an existing register, 4125ec3b427c850d8c61aaa29e3421019bdff9b77f1Dan Gohman // it must be precisely the required class, and not a subclass 4135ec3b427c850d8c61aaa29e3421019bdff9b77f1Dan Gohman // thereof. 414bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman if (VRBase == 0 || SRC != MRI->getRegClass(VRBase)) { 41594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Create the reg 41694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman assert(SRC && "Couldn't find source register class"); 417bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman VRBase = MRI->createVirtualRegister(SRC); 41894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 4195ec3b427c850d8c61aaa29e3421019bdff9b77f1Dan Gohman 42094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Add def, source, and subreg index 42194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman MI->addOperand(MachineOperand::CreateReg(VRBase, true)); 42294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman AddOperand(MI, Node->getOperand(0), 0, 0, VRBaseMap); 42394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman MI->addOperand(MachineOperand::CreateImm(SubIdx)); 424bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman MBB->insert(InsertPos, MI); 42594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } else if (Opc == TargetInstrInfo::INSERT_SUBREG || 42694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman Opc == TargetInstrInfo::SUBREG_TO_REG) { 42794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman SDValue N0 = Node->getOperand(0); 42894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman SDValue N1 = Node->getOperand(1); 42994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman SDValue N2 = Node->getOperand(2); 430f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman unsigned SubReg = getVR(N1, VRBaseMap); 431f5aeb1a8e4cf272c7348376d185ef8d8267653e0Dan Gohman unsigned SubIdx = cast<ConstantSDNode>(N2)->getZExtValue(); 432bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman const TargetRegisterClass *TRC = MRI->getRegClass(SubReg); 4335ec3b427c850d8c61aaa29e3421019bdff9b77f1Dan Gohman const TargetRegisterClass *SRC = 4345ec3b427c850d8c61aaa29e3421019bdff9b77f1Dan Gohman getSuperRegisterRegClass(TRC, SubIdx, 4355ec3b427c850d8c61aaa29e3421019bdff9b77f1Dan Gohman Node->getValueType(0)); 4365ec3b427c850d8c61aaa29e3421019bdff9b77f1Dan Gohman 43794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Figure out the register class to create for the destreg. 4385ec3b427c850d8c61aaa29e3421019bdff9b77f1Dan Gohman // Note that if we're going to directly use an existing register, 4395ec3b427c850d8c61aaa29e3421019bdff9b77f1Dan Gohman // it must be precisely the required class, and not a subclass 4405ec3b427c850d8c61aaa29e3421019bdff9b77f1Dan Gohman // thereof. 441bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman if (VRBase == 0 || SRC != MRI->getRegClass(VRBase)) { 4425ec3b427c850d8c61aaa29e3421019bdff9b77f1Dan Gohman // Create the reg 4435ec3b427c850d8c61aaa29e3421019bdff9b77f1Dan Gohman assert(SRC && "Couldn't find source register class"); 444bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman VRBase = MRI->createVirtualRegister(SRC); 44594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 4465ec3b427c850d8c61aaa29e3421019bdff9b77f1Dan Gohman 44794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Create the insert_subreg or subreg_to_reg machine instruction. 448bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman MachineInstr *MI = BuildMI(*MF, Node->getDebugLoc(), TII->get(Opc)); 44994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman MI->addOperand(MachineOperand::CreateReg(VRBase, true)); 45094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 45194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // If creating a subreg_to_reg, then the first input operand 45294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // is an implicit value immediate, otherwise it's a register 45394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (Opc == TargetInstrInfo::SUBREG_TO_REG) { 45494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman const ConstantSDNode *SD = cast<ConstantSDNode>(N0); 455f5aeb1a8e4cf272c7348376d185ef8d8267653e0Dan Gohman MI->addOperand(MachineOperand::CreateImm(SD->getZExtValue())); 45694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } else 45794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman AddOperand(MI, N0, 0, 0, VRBaseMap); 45894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Add the subregster being inserted 45994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman AddOperand(MI, N1, 0, 0, VRBaseMap); 46094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman MI->addOperand(MachineOperand::CreateImm(SubIdx)); 461bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman MBB->insert(InsertPos, MI); 46294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } else 463c23197a26f34f559ea9797de51e187087c039c42Torok Edwin llvm_unreachable("Node is not insert_subreg, extract_subreg, or subreg_to_reg"); 46494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 46594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman SDValue Op(Node, 0); 46694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second; 46794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman isNew = isNew; // Silence compiler warning. 46894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman assert(isNew && "Node emitted out of order - early"); 46994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman} 47094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 47188c7af096b09ad26cbcebfdf40151e04094b7460Dan Gohman/// EmitCopyToRegClassNode - Generate machine code for COPY_TO_REGCLASS nodes. 47288c7af096b09ad26cbcebfdf40151e04094b7460Dan Gohman/// COPY_TO_REGCLASS is just a normal copy, except that the destination 473f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman/// register is constrained to be in a particular register class. 474f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman/// 475f8c7394781f7cf27ac52ca087e289436d36844daDan Gohmanvoid 476bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan GohmanInstrEmitter::EmitCopyToRegClassNode(SDNode *Node, 477bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman DenseMap<SDValue, unsigned> &VRBaseMap) { 478f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman unsigned VReg = getVR(Node->getOperand(0), VRBaseMap); 479bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman const TargetRegisterClass *SrcRC = MRI->getRegClass(VReg); 480f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 481f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman unsigned DstRCIdx = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue(); 482f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman const TargetRegisterClass *DstRC = TRI->getRegClass(DstRCIdx); 483f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 484f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman // Create the new VReg in the destination class and emit a copy. 485bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman unsigned NewVReg = MRI->createVirtualRegister(DstRC); 486bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman bool Emitted = TII->copyRegToReg(*MBB, InsertPos, NewVReg, VReg, 487f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman DstRC, SrcRC); 488f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman assert(Emitted && 48988c7af096b09ad26cbcebfdf40151e04094b7460Dan Gohman "Unable to issue a copy instruction for a COPY_TO_REGCLASS node!\n"); 4908c562e2d25d319f8bde7a1a60142203f316a2883Daniel Dunbar (void) Emitted; 491f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 492f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman SDValue Op(Node, 0); 493f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman bool isNew = VRBaseMap.insert(std::make_pair(Op, NewVReg)).second; 494f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman isNew = isNew; // Silence compiler warning. 495f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman assert(isNew && "Node emitted out of order - early"); 496f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman} 497f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 49894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman/// EmitNode - Generate machine code for an node and needed dependencies. 49994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman/// 500bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohmanvoid InstrEmitter::EmitNode(SDNode *Node, bool IsClone, bool IsCloned, 501bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman DenseMap<SDValue, unsigned> &VRBaseMap, 502fb2e752e4175920d0531f2afc93a23d0cdf4db14Evan Cheng DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM) { 50394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // If machine instruction 50494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (Node->isMachineOpcode()) { 50594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman unsigned Opc = Node->getMachineOpcode(); 50694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 50794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Handle subreg insert/extract specially 50894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (Opc == TargetInstrInfo::EXTRACT_SUBREG || 50994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman Opc == TargetInstrInfo::INSERT_SUBREG || 51094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman Opc == TargetInstrInfo::SUBREG_TO_REG) { 51194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman EmitSubregNode(Node, VRBaseMap); 51294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman return; 51394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 51494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 51588c7af096b09ad26cbcebfdf40151e04094b7460Dan Gohman // Handle COPY_TO_REGCLASS specially. 51688c7af096b09ad26cbcebfdf40151e04094b7460Dan Gohman if (Opc == TargetInstrInfo::COPY_TO_REGCLASS) { 51788c7af096b09ad26cbcebfdf40151e04094b7460Dan Gohman EmitCopyToRegClassNode(Node, VRBaseMap); 518f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman return; 519f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman } 520f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 52194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (Opc == TargetInstrInfo::IMPLICIT_DEF) 52294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // We want a unique VR for each IMPLICIT_DEF use. 52394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman return; 52494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 52594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman const TargetInstrDesc &II = TII->get(Opc); 52694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman unsigned NumResults = CountResults(Node); 52794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman unsigned NodeOperands = CountOperands(Node); 52894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman bool HasPhysRegOuts = (NumResults > II.getNumDefs()) && 52994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman II.getImplicitDefs() != 0; 53094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman#ifndef NDEBUG 53194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman unsigned NumMIOperands = NodeOperands + NumResults; 53294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman assert((II.getNumOperands() == NumMIOperands || 53394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman HasPhysRegOuts || II.isVariadic()) && 53494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman "#operands for dag node doesn't match .td file!"); 53594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman#endif 53694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 53794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Create the new machine instruction. 538bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman MachineInstr *MI = BuildMI(*MF, Node->getDebugLoc(), II); 53994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 54094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Add result register values for things that are defined by this 54194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // instruction. 54294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (NumResults) 543e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng CreateVirtualRegisters(Node, MI, II, IsClone, IsCloned, VRBaseMap); 54494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 54594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Emit all of the actual operands of this instruction, adding them to the 54694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // instruction as appropriate. 5478955e93b1ffa7645beea0b51e4b091b96063f613Evan Cheng bool HasOptPRefs = II.getNumDefs() > NumResults; 5488955e93b1ffa7645beea0b51e4b091b96063f613Evan Cheng assert((!HasOptPRefs || !HasPhysRegOuts) && 5498955e93b1ffa7645beea0b51e4b091b96063f613Evan Cheng "Unable to cope with optional defs and phys regs defs!"); 5508955e93b1ffa7645beea0b51e4b091b96063f613Evan Cheng unsigned NumSkip = HasOptPRefs ? II.getNumDefs() - NumResults : 0; 5518955e93b1ffa7645beea0b51e4b091b96063f613Evan Cheng for (unsigned i = NumSkip; i != NodeOperands; ++i) 5528955e93b1ffa7645beea0b51e4b091b96063f613Evan Cheng AddOperand(MI, Node->getOperand(i), i-NumSkip+II.getNumDefs(), &II, 5538955e93b1ffa7645beea0b51e4b091b96063f613Evan Cheng VRBaseMap); 55494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 555c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman // Transfer all of the memory reference descriptions of this instruction. 556c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman MI->setMemRefs(cast<MachineSDNode>(Node)->memoperands_begin(), 557c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman cast<MachineSDNode>(Node)->memoperands_end()); 55894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 559f7119393a97c2a10757084b6bc186380f8c19a73Dan Gohman if (II.usesCustomDAGSchedInsertionHook()) { 56094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Insert this instruction into the basic block using a target 56194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // specific inserter which may returns a new basic block. 562bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman MBB = TLI->EmitInstrWithCustomInserter(MI, MBB, EM); 563bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman InsertPos = MBB->end(); 564f2ad58d930aa18c8710cbd094eaf987eca0f2c1bBill Wendling } else { 565bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman MBB->insert(InsertPos, MI); 566f2ad58d930aa18c8710cbd094eaf987eca0f2c1bBill Wendling } 56794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 56894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Additional results must be an physical register def. 56994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (HasPhysRegOuts) { 57094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman for (unsigned i = II.getNumDefs(); i < NumResults; ++i) { 57194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman unsigned Reg = II.getImplicitDefs()[i - II.getNumDefs()]; 57294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (Node->hasAnyUseOfValue(i)) 573e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng EmitCopyFromReg(Node, i, IsClone, IsCloned, Reg, VRBaseMap); 57494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 57594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 57694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman return; 57794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 57894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 57994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman switch (Node->getOpcode()) { 58094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman default: 58194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman#ifndef NDEBUG 582bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman Node->dump(); 58394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman#endif 584c23197a26f34f559ea9797de51e187087c039c42Torok Edwin llvm_unreachable("This target-independent node should have been selected!"); 58594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman break; 58694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman case ISD::EntryToken: 587c23197a26f34f559ea9797de51e187087c039c42Torok Edwin llvm_unreachable("EntryToken should have been excluded from the schedule!"); 58894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman break; 58937b7387da90ffd42d28ad0f08fca00b684294b2cEvan Cheng case ISD::MERGE_VALUES: 59094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman case ISD::TokenFactor: // fall thru 59194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman break; 59294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman case ISD::CopyToReg: { 59394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman unsigned SrcReg; 59494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman SDValue SrcVal = Node->getOperand(2); 59594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (RegisterSDNode *R = dyn_cast<RegisterSDNode>(SrcVal)) 59694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman SrcReg = R->getReg(); 59794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman else 59894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman SrcReg = getVR(SrcVal, VRBaseMap); 59994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 60094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman unsigned DestReg = cast<RegisterSDNode>(Node->getOperand(1))->getReg(); 60194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (SrcReg == DestReg) // Coalesced away the copy? Ignore. 60294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman break; 60394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 60494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman const TargetRegisterClass *SrcTRC = 0, *DstTRC = 0; 60594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Get the register classes of the src/dst. 60694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (TargetRegisterInfo::isVirtualRegister(SrcReg)) 607bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman SrcTRC = MRI->getRegClass(SrcReg); 60894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman else 60994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman SrcTRC = TRI->getPhysicalRegisterRegClass(SrcReg,SrcVal.getValueType()); 61094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 61194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman if (TargetRegisterInfo::isVirtualRegister(DestReg)) 612bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman DstTRC = MRI->getRegClass(DestReg); 61394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman else 61494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman DstTRC = TRI->getPhysicalRegisterRegClass(DestReg, 61594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman Node->getOperand(1).getValueType()); 616f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman 617bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman bool Emitted = TII->copyRegToReg(*MBB, InsertPos, DestReg, SrcReg, 61847ac0f0c7c39289f5970688154e385be22b7f293Dan Gohman DstTRC, SrcTRC); 619f8c7394781f7cf27ac52ca087e289436d36844daDan Gohman assert(Emitted && "Unable to issue a copy instruction!\n"); 6208c562e2d25d319f8bde7a1a60142203f316a2883Daniel Dunbar (void) Emitted; 62194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman break; 62294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 62394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman case ISD::CopyFromReg: { 62494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman unsigned SrcReg = cast<RegisterSDNode>(Node->getOperand(1))->getReg(); 625e57187cbe321a286f6a7f409a7badd1ae4e4642cEvan Cheng EmitCopyFromReg(Node, 0, IsClone, IsCloned, SrcReg, VRBaseMap); 62694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman break; 62794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 62894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman case ISD::INLINEASM: { 62994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman unsigned NumOps = Node->getNumOperands(); 630825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson if (Node->getOperand(NumOps-1).getValueType() == MVT::Flag) 63194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman --NumOps; // Ignore the flag operand. 63294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 63394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Create the inline asm machine instruction. 634bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman MachineInstr *MI = BuildMI(*MF, Node->getDebugLoc(), 635f2ad58d930aa18c8710cbd094eaf987eca0f2c1bBill Wendling TII->get(TargetInstrInfo::INLINEASM)); 63694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 63794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Add the asm string as an external symbol operand. 638056292fd738924f3f7703725d8f630983794b5a5Bill Wendling const char *AsmStr = 639056292fd738924f3f7703725d8f630983794b5a5Bill Wendling cast<ExternalSymbolSDNode>(Node->getOperand(1))->getSymbol(); 64094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman MI->addOperand(MachineOperand::CreateES(AsmStr)); 64194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 64294b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // Add all of the operand registers to the instruction. 64394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman for (unsigned i = 2; i != NumOps;) { 644f5aeb1a8e4cf272c7348376d185ef8d8267653e0Dan Gohman unsigned Flags = 645f5aeb1a8e4cf272c7348376d185ef8d8267653e0Dan Gohman cast<ConstantSDNode>(Node->getOperand(i))->getZExtValue(); 646697cbbfb00c318f98d6eb51945f077e2bfe8781eEvan Cheng unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags); 64794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 64894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman MI->addOperand(MachineOperand::CreateImm(Flags)); 64994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman ++i; // Skip the ID value. 65094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 65194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman switch (Flags & 7) { 652c23197a26f34f559ea9797de51e187087c039c42Torok Edwin default: llvm_unreachable("Bad flags!"); 65394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman case 2: // Def of register. 65494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman for (; NumVals; --NumVals, ++i) { 65594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg(); 65694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman MI->addOperand(MachineOperand::CreateReg(Reg, true)); 65794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 65894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman break; 659913d3dfac43f29921467f33aa743f28ee1bfc5d1Dale Johannesen case 6: // Def of earlyclobber register. 660913d3dfac43f29921467f33aa743f28ee1bfc5d1Dale Johannesen for (; NumVals; --NumVals, ++i) { 661913d3dfac43f29921467f33aa743f28ee1bfc5d1Dale Johannesen unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg(); 662913d3dfac43f29921467f33aa743f28ee1bfc5d1Dale Johannesen MI->addOperand(MachineOperand::CreateReg(Reg, true, false, false, 6634784f1fc73abf6005b7b7262d395af71b57b1255Evan Cheng false, false, true)); 664913d3dfac43f29921467f33aa743f28ee1bfc5d1Dale Johannesen } 665913d3dfac43f29921467f33aa743f28ee1bfc5d1Dale Johannesen break; 66694b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman case 1: // Use of register. 66794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman case 3: // Immediate. 66894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman case 4: // Addressing mode. 66994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // The addressing mode has been selected, just add all of the 67094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman // operands to the machine instruction. 67194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman for (; NumVals; --NumVals, ++i) 67286b49f8e2de796cb46c7c8b6a4c4900533fd53f4Dale Johannesen AddOperand(MI, Node->getOperand(i), 0, 0, VRBaseMap); 67394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman break; 67494b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 67594b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 676bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman MBB->insert(InsertPos, MI); 67794b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman break; 67894b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 67994b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman } 68094b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman} 68194b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman 682bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman/// InstrEmitter - Construct an InstrEmitter and set it to start inserting 683bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman/// at the given position in the given block. 684bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan GohmanInstrEmitter::InstrEmitter(MachineBasicBlock *mbb, 685bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman MachineBasicBlock::iterator insertpos) 686bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman : MF(mbb->getParent()), 687bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman MRI(&MF->getRegInfo()), 688bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman TM(&MF->getTarget()), 689bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman TII(TM->getInstrInfo()), 690bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman TRI(TM->getRegisterInfo()), 691bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman TLI(TM->getTargetLowering()), 692bcea859fc1dd1af9ac66ec93ea04ce9a19c8451cDan Gohman MBB(mbb), InsertPos(insertpos) { 69394b8d7ea63c5b533c299226677a0973a39f98e91Dan Gohman} 694