1//===-- MSP430RegisterInfo.td - MSP430 Register defs -------*- tablegen -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10//===----------------------------------------------------------------------===// 11// Declarations that describe the MSP430 register file 12//===----------------------------------------------------------------------===// 13 14class MSP430Reg<bits<4> num, string n> : Register<n> { 15 field bits<4> Num = num; 16 let Namespace = "MSP430"; 17} 18 19class MSP430RegWithSubregs<bits<4> num, string n, list<Register> subregs> 20 : RegisterWithSubRegs<n, subregs> { 21 field bits<4> Num = num; 22 let Namespace = "MSP430"; 23} 24 25//===----------------------------------------------------------------------===// 26// Registers 27//===----------------------------------------------------------------------===// 28 29def PCB : MSP430Reg<0, "r0">; 30def SPB : MSP430Reg<1, "r1">; 31def SRB : MSP430Reg<2, "r2">; 32def CGB : MSP430Reg<3, "r3">; 33def FPB : MSP430Reg<4, "r4">; 34def R5B : MSP430Reg<5, "r5">; 35def R6B : MSP430Reg<6, "r6">; 36def R7B : MSP430Reg<7, "r7">; 37def R8B : MSP430Reg<8, "r8">; 38def R9B : MSP430Reg<9, "r9">; 39def R10B : MSP430Reg<10, "r10">; 40def R11B : MSP430Reg<11, "r11">; 41def R12B : MSP430Reg<12, "r12">; 42def R13B : MSP430Reg<13, "r13">; 43def R14B : MSP430Reg<14, "r14">; 44def R15B : MSP430Reg<15, "r15">; 45 46def subreg_8bit : SubRegIndex { let Namespace = "MSP430"; } 47 48let SubRegIndices = [subreg_8bit] in { 49def PCW : MSP430RegWithSubregs<0, "r0", [PCB]>; 50def SPW : MSP430RegWithSubregs<1, "r1", [SPB]>; 51def SRW : MSP430RegWithSubregs<2, "r2", [SRB]>; 52def CGW : MSP430RegWithSubregs<3, "r3", [CGB]>; 53def FPW : MSP430RegWithSubregs<4, "r4", [FPB]>; 54def R5W : MSP430RegWithSubregs<5, "r5", [R5B]>; 55def R6W : MSP430RegWithSubregs<6, "r6", [R6B]>; 56def R7W : MSP430RegWithSubregs<7, "r7", [R7B]>; 57def R8W : MSP430RegWithSubregs<8, "r8", [R8B]>; 58def R9W : MSP430RegWithSubregs<9, "r9", [R9B]>; 59def R10W : MSP430RegWithSubregs<10, "r10", [R10B]>; 60def R11W : MSP430RegWithSubregs<11, "r11", [R11B]>; 61def R12W : MSP430RegWithSubregs<12, "r12", [R12B]>; 62def R13W : MSP430RegWithSubregs<13, "r13", [R13B]>; 63def R14W : MSP430RegWithSubregs<14, "r14", [R14B]>; 64def R15W : MSP430RegWithSubregs<15, "r15", [R15B]>; 65} 66 67def GR8 : RegisterClass<"MSP430", [i8], 8, 68 // Volatile registers 69 (add R12B, R13B, R14B, R15B, R11B, R10B, R9B, R8B, R7B, R6B, R5B, 70 // Frame pointer, sometimes allocable 71 FPB, 72 // Volatile, but not allocable 73 PCB, SPB, SRB, CGB)>; 74 75def GR16 : RegisterClass<"MSP430", [i16], 16, 76 // Volatile registers 77 (add R12W, R13W, R14W, R15W, R11W, R10W, R9W, R8W, R7W, R6W, R5W, 78 // Frame pointer, sometimes allocable 79 FPW, 80 // Volatile, but not allocable 81 PCW, SPW, SRW, CGW)>; 82