131d157ae1ac2cd9c787dc3c1d28e64c682803844Jia Liu//===-- PPCInstrInfo.cpp - PowerPC Instruction Information ----------------===// 2b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 3f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// The LLVM Compiler Infrastructure 4f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 64ee451de366474b9c228b4e5fa573795a715216dChris Lattner// License. See LICENSE.TXT for details. 7b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 8f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 9f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 10f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// This file contains the PowerPC implementation of the TargetInstrInfo class. 11f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 12f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 13f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 1416e71f2f70811c69c56052dd146324fe20e31db5Chris Lattner#include "PPCInstrInfo.h" 1559ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng#include "PPC.h" 16f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson#include "PPCInstrBuilder.h" 177194aaf738a1b89441635340403f1c5b06ae18efBill Wendling#include "PPCMachineFunctionInfo.h" 18b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner#include "PPCTargetMachine.h" 192da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick#include "PPCHazardRecognizers.h" 2094b9550a32d189704a8eae55505edf62662c0534Evan Cheng#include "MCTargetDesc/PPCPredicates.h" 217a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen#include "llvm/CodeGen/MachineFrameInfo.h" 22f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "llvm/CodeGen/MachineInstrBuilder.h" 237a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen#include "llvm/CodeGen/MachineMemOperand.h" 24243296690ec78fc918762bd73896b09e26537f47Jakob Stoklund Olesen#include "llvm/CodeGen/MachineRegisterInfo.h" 254d989ac93ce608057fb6b13a4068264ab037ecd5Hal Finkel#include "llvm/CodeGen/PseudoSourceValue.h" 2659ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng#include "llvm/MC/MCAsmInfo.h" 27880d0f6018b6928bdcad291be60c801238619955Bill Wendling#include "llvm/Support/CommandLine.h" 28dac237e18209b697a8ba122d0ddd9cad4dfba1f8Torok Edwin#include "llvm/Support/ErrorHandling.h" 293e74d6fdd248e20a280f1dff3da9a6c689c2c4c3Evan Cheng#include "llvm/Support/TargetRegistry.h" 30dac237e18209b697a8ba122d0ddd9cad4dfba1f8Torok Edwin#include "llvm/Support/raw_ostream.h" 3159ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng#include "llvm/ADT/STLExtras.h" 32f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 334db3cffe94a5285239cc0056f939c6b74a5ca0b6Evan Cheng#define GET_INSTRINFO_CTOR 3422fee2dff4c43b551aefa44a96ca74fcade6bfacEvan Cheng#include "PPCGenInstrInfo.inc" 3522fee2dff4c43b551aefa44a96ca74fcade6bfacEvan Cheng 3682bcd236937b378e56e46bdde9c17a3ea3377068Dan Gohmannamespace llvm { 373fd0018af1b692cabfa5a002bf41f1e756aa9ddeHal Finkelextern cl::opt<bool> DisablePPC32RS; 383fd0018af1b692cabfa5a002bf41f1e756aa9ddeHal Finkelextern cl::opt<bool> DisablePPC64RS; 3982bcd236937b378e56e46bdde9c17a3ea3377068Dan Gohman} 4082bcd236937b378e56e46bdde9c17a3ea3377068Dan Gohman 4182bcd236937b378e56e46bdde9c17a3ea3377068Dan Gohmanusing namespace llvm; 42880d0f6018b6928bdcad291be60c801238619955Bill Wendling 4309fdc7baae1b6905fe18df48e2278e74d4e39ccdHal Finkelstatic cl:: 447255d2a8084cb6aa96ea0e5f30acfff76df04ee8Hal Finkelopt<bool> DisableCTRLoopAnal("disable-ppc-ctrloop-analysis", cl::Hidden, 457255d2a8084cb6aa96ea0e5f30acfff76df04ee8Hal Finkel cl::desc("Disable analysis for CTR loops")); 4609fdc7baae1b6905fe18df48e2278e74d4e39ccdHal Finkel 47b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris LattnerPPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm) 484db3cffe94a5285239cc0056f939c6b74a5ca0b6Evan Cheng : PPCGenInstrInfo(PPC::ADJCALLSTACKDOWN, PPC::ADJCALLSTACKUP), 49d5b03f252c0db6b49a242abab63d7c5a260fceaeEvan Cheng TM(tm), RI(*TM.getSubtargetImpl(), *this) {} 50b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner 512da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick/// CreateTargetHazardRecognizer - Return the hazard recognizer to use for 522da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick/// this target when scheduling the DAG. 532da8bc8a5f7705ac131184cd247f48500da0d74eAndrew TrickScheduleHazardRecognizer *PPCInstrInfo::CreateTargetHazardRecognizer( 542da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick const TargetMachine *TM, 552da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick const ScheduleDAG *DAG) const { 56c6d08f10bf797cc78068ef30bd0e8812a5bdc9a2Hal Finkel unsigned Directive = TM->getSubtarget<PPCSubtarget>().getDarwinDirective(); 57621b77ade2ff46d1d8594bddee6931b2f4a14706Hal Finkel if (Directive == PPC::DIR_440 || Directive == PPC::DIR_A2 || 58621b77ade2ff46d1d8594bddee6931b2f4a14706Hal Finkel Directive == PPC::DIR_E500mc || Directive == PPC::DIR_E5500) { 59768c65f677af3f05c2e94982043f90a1bfaceda5Hal Finkel const InstrItineraryData *II = TM->getInstrItineraryData(); 605b00ceaeeabff8c25abb09926343c3fcb06053d8Hal Finkel return new PPCScoreboardHazardRecognizer(II, DAG); 61c6d08f10bf797cc78068ef30bd0e8812a5bdc9a2Hal Finkel } 6264c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel 6364c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel return TargetInstrInfoImpl::CreateTargetHazardRecognizer(TM, DAG); 642da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick} 652da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick 6664c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel/// CreateTargetPostRAHazardRecognizer - Return the postRA hazard recognizer 6764c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel/// to use for this target when scheduling the DAG. 6864c34e253563a8ba6b41fbce2bb020632cf65961Hal FinkelScheduleHazardRecognizer *PPCInstrInfo::CreateTargetPostRAHazardRecognizer( 6964c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel const InstrItineraryData *II, 7064c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel const ScheduleDAG *DAG) const { 7164c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel unsigned Directive = TM.getSubtarget<PPCSubtarget>().getDarwinDirective(); 7264c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel 7364c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel // Most subtargets use a PPC970 recognizer. 74621b77ade2ff46d1d8594bddee6931b2f4a14706Hal Finkel if (Directive != PPC::DIR_440 && Directive != PPC::DIR_A2 && 75621b77ade2ff46d1d8594bddee6931b2f4a14706Hal Finkel Directive != PPC::DIR_E500mc && Directive != PPC::DIR_E5500) { 7664c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel const TargetInstrInfo *TII = TM.getInstrInfo(); 7764c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel assert(TII && "No InstrInfo?"); 7864c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel 7964c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel return new PPCHazardRecognizer970(*TII); 8064c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel } 8164c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel 824d989ac93ce608057fb6b13a4068264ab037ecd5Hal Finkel return new PPCScoreboardHazardRecognizer(II, DAG); 8364c34e253563a8ba6b41fbce2bb020632cf65961Hal Finkel} 847164288c3eb52e20454fc757440f867f04eb13a4Jakob Stoklund Olesen 857164288c3eb52e20454fc757440f867f04eb13a4Jakob Stoklund Olesen// Detect 32 -> 64-bit extensions where we may reuse the low sub-register. 867164288c3eb52e20454fc757440f867f04eb13a4Jakob Stoklund Olesenbool PPCInstrInfo::isCoalescableExtInstr(const MachineInstr &MI, 877164288c3eb52e20454fc757440f867f04eb13a4Jakob Stoklund Olesen unsigned &SrcReg, unsigned &DstReg, 887164288c3eb52e20454fc757440f867f04eb13a4Jakob Stoklund Olesen unsigned &SubIdx) const { 897164288c3eb52e20454fc757440f867f04eb13a4Jakob Stoklund Olesen switch (MI.getOpcode()) { 907164288c3eb52e20454fc757440f867f04eb13a4Jakob Stoklund Olesen default: return false; 917164288c3eb52e20454fc757440f867f04eb13a4Jakob Stoklund Olesen case PPC::EXTSW: 927164288c3eb52e20454fc757440f867f04eb13a4Jakob Stoklund Olesen case PPC::EXTSW_32_64: 937164288c3eb52e20454fc757440f867f04eb13a4Jakob Stoklund Olesen SrcReg = MI.getOperand(1).getReg(); 947164288c3eb52e20454fc757440f867f04eb13a4Jakob Stoklund Olesen DstReg = MI.getOperand(0).getReg(); 957164288c3eb52e20454fc757440f867f04eb13a4Jakob Stoklund Olesen SubIdx = PPC::sub_32; 967164288c3eb52e20454fc757440f867f04eb13a4Jakob Stoklund Olesen return true; 977164288c3eb52e20454fc757440f867f04eb13a4Jakob Stoklund Olesen } 987164288c3eb52e20454fc757440f867f04eb13a4Jakob Stoklund Olesen} 997164288c3eb52e20454fc757440f867f04eb13a4Jakob Stoklund Olesen 1006e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trickunsigned PPCInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, 1019c09c9ec9dab61450800b42cbf746164aa076b88Chris Lattner int &FrameIndex) const { 102408396014742a05cad1c91949d2226169e3f9d80Chris Lattner switch (MI->getOpcode()) { 103408396014742a05cad1c91949d2226169e3f9d80Chris Lattner default: break; 104408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LD: 105408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LWZ: 106408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LFS: 107408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LFD: 108d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && 109d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI->getOperand(2).isFI()) { 1108aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FrameIndex = MI->getOperand(2).getIndex(); 111408396014742a05cad1c91949d2226169e3f9d80Chris Lattner return MI->getOperand(0).getReg(); 112408396014742a05cad1c91949d2226169e3f9d80Chris Lattner } 113408396014742a05cad1c91949d2226169e3f9d80Chris Lattner break; 114408396014742a05cad1c91949d2226169e3f9d80Chris Lattner } 115408396014742a05cad1c91949d2226169e3f9d80Chris Lattner return 0; 1166524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner} 117408396014742a05cad1c91949d2226169e3f9d80Chris Lattner 1186e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trickunsigned PPCInstrInfo::isStoreToStackSlot(const MachineInstr *MI, 1196524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner int &FrameIndex) const { 1206524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner switch (MI->getOpcode()) { 1216524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner default: break; 1223b478b31e297208ef2c9f74750a8a603eb3726fbNate Begeman case PPC::STD: 1236524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STW: 1246524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STFS: 1256524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STFD: 126d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && 127d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI->getOperand(2).isFI()) { 1288aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FrameIndex = MI->getOperand(2).getIndex(); 1296524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner return MI->getOperand(0).getReg(); 1306524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner } 1316524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner break; 1326524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner } 1336524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner return 0; 1346524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner} 135408396014742a05cad1c91949d2226169e3f9d80Chris Lattner 136043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner// commuteInstruction - We can commute rlwimi instructions, but only if the 137043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner// rotate amt is zero. We also have to munge the immediates a bit. 13858dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan ChengMachineInstr * 13958dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan ChengPPCInstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const { 1408e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineFunction &MF = *MI->getParent()->getParent(); 1418e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 142043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Normal instructions can be commuted the obvious way. 143043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner if (MI->getOpcode() != PPC::RLWIMI) 14458dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng return TargetInstrInfoImpl::commuteInstruction(MI, NewMI); 1456e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 146043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Cannot commute if it has a non-zero rotate count. 1479a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner if (MI->getOperand(3).getImm() != 0) 148043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return 0; 1496e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 150043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // If we have a zero rotate count, we have: 151043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // M = mask(MB,ME) 152043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Op0 = (Op1 & ~M) | (Op2 & M) 153043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Change this to: 154043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // M = mask((ME+1)&31, (MB-1)&31) 155043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Op0 = (Op2 & ~M) | (Op1 & M) 156043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 157043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Swap op1/op2 158a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng unsigned Reg0 = MI->getOperand(0).getReg(); 159043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned Reg1 = MI->getOperand(1).getReg(); 160043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned Reg2 = MI->getOperand(2).getReg(); 1616ce7dc2a97260eea5fba414332796464912b9359Evan Cheng bool Reg1IsKill = MI->getOperand(1).isKill(); 1626ce7dc2a97260eea5fba414332796464912b9359Evan Cheng bool Reg2IsKill = MI->getOperand(2).isKill(); 16358dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng bool ChangeReg0 = false; 164a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // If machine instrs are no longer in two-address forms, update 165a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // destination register as well. 166a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng if (Reg0 == Reg1) { 167a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // Must be two address instruction! 168e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng assert(MI->getDesc().getOperandConstraint(0, MCOI::TIED_TO) && 169a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng "Expecting a two-address instruction!"); 170a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng Reg2IsKill = false; 17158dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng ChangeReg0 = true; 17258dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng } 17358dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 17458dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng // Masks. 17558dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned MB = MI->getOperand(4).getImm(); 17658dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned ME = MI->getOperand(5).getImm(); 17758dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 17858dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng if (NewMI) { 17958dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng // Create a new instruction. 18058dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned Reg0 = ChangeReg0 ? Reg2 : MI->getOperand(0).getReg(); 18158dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng bool Reg0IsDead = MI->getOperand(0).isDead(); 182d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling return BuildMI(MF, MI->getDebugLoc(), MI->getDesc()) 183587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead)) 184587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(Reg2, getKillRegState(Reg2IsKill)) 185587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(Reg1, getKillRegState(Reg1IsKill)) 18658dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng .addImm((ME+1) & 31) 18758dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng .addImm((MB-1) & 31); 188a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng } 18958dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 19058dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng if (ChangeReg0) 19158dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng MI->getOperand(0).setReg(Reg2); 192e53f4a055f74bded20d6129b4724ddd17fd199f6Chris Lattner MI->getOperand(2).setReg(Reg1); 193e53f4a055f74bded20d6129b4724ddd17fd199f6Chris Lattner MI->getOperand(1).setReg(Reg2); 194f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner MI->getOperand(2).setIsKill(Reg1IsKill); 195f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner MI->getOperand(1).setIsKill(Reg2IsKill); 1966e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 197043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Swap the mask around. 1989a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner MI->getOperand(4).setImm((ME+1) & 31); 1999a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner MI->getOperand(5).setImm((MB-1) & 31); 200043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return MI; 201043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner} 202bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner 2036e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trickvoid PPCInstrInfo::insertNoop(MachineBasicBlock &MBB, 204bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner MachineBasicBlock::iterator MI) const { 205c7f3ace20c325521c68335a1689645b43b06ddf0Chris Lattner DebugLoc DL; 206d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling BuildMI(MBB, MI, DL, get(PPC::NOP)); 207bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner} 208c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 209c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 210c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner// Branch analysis. 21199f823f94374917174f96a7689955b8463db6816Hal Finkel// Note: If the condition register is set to CTR or CTR8 then this is a 21299f823f94374917174f96a7689955b8463db6816Hal Finkel// BDNZ (imm == 1) or BDZ (imm == 0) branch. 213c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattnerbool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, 214c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock *&FBB, 215dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng SmallVectorImpl<MachineOperand> &Cond, 216dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng bool AllowModify) const { 21799f823f94374917174f96a7689955b8463db6816Hal Finkel bool isPPC64 = TM.getSubtargetImpl()->isPPC64(); 21899f823f94374917174f96a7689955b8463db6816Hal Finkel 219c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If the block has no terminators, it just falls into the block after it. 220c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock::iterator I = MBB.end(); 22193d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen if (I == MBB.begin()) 22293d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen return false; 22393d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen --I; 22493d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen while (I->isDebugValue()) { 22593d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen if (I == MBB.begin()) 22693d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen return false; 22793d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen --I; 22893d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen } 22993d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen if (!isUnpredicatedTerminator(I)) 230c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 231c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 232c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Get the last instruction in the block. 233c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineInstr *LastInst = I; 2346e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 235c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If there is only one terminator instruction, process it. 236bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) { 237c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (LastInst->getOpcode() == PPC::B) { 23882ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!LastInst->getOperand(0).isMBB()) 23982ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 2408aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = LastInst->getOperand(0).getMBB(); 241c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 242289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner } else if (LastInst->getOpcode() == PPC::BCC) { 24382ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!LastInst->getOperand(2).isMBB()) 24482ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 245c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Block ends with fall-through condbranch. 2468aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = LastInst->getOperand(2).getMBB(); 247c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(LastInst->getOperand(0)); 248c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(LastInst->getOperand(1)); 2497c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner return false; 25099f823f94374917174f96a7689955b8463db6816Hal Finkel } else if (LastInst->getOpcode() == PPC::BDNZ8 || 25199f823f94374917174f96a7689955b8463db6816Hal Finkel LastInst->getOpcode() == PPC::BDNZ) { 25299f823f94374917174f96a7689955b8463db6816Hal Finkel if (!LastInst->getOperand(0).isMBB()) 25399f823f94374917174f96a7689955b8463db6816Hal Finkel return true; 2547255d2a8084cb6aa96ea0e5f30acfff76df04ee8Hal Finkel if (DisableCTRLoopAnal) 25509fdc7baae1b6905fe18df48e2278e74d4e39ccdHal Finkel return true; 25699f823f94374917174f96a7689955b8463db6816Hal Finkel TBB = LastInst->getOperand(0).getMBB(); 25799f823f94374917174f96a7689955b8463db6816Hal Finkel Cond.push_back(MachineOperand::CreateImm(1)); 25899f823f94374917174f96a7689955b8463db6816Hal Finkel Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, 25999f823f94374917174f96a7689955b8463db6816Hal Finkel true)); 26099f823f94374917174f96a7689955b8463db6816Hal Finkel return false; 26199f823f94374917174f96a7689955b8463db6816Hal Finkel } else if (LastInst->getOpcode() == PPC::BDZ8 || 26299f823f94374917174f96a7689955b8463db6816Hal Finkel LastInst->getOpcode() == PPC::BDZ) { 26399f823f94374917174f96a7689955b8463db6816Hal Finkel if (!LastInst->getOperand(0).isMBB()) 26499f823f94374917174f96a7689955b8463db6816Hal Finkel return true; 2657255d2a8084cb6aa96ea0e5f30acfff76df04ee8Hal Finkel if (DisableCTRLoopAnal) 26609fdc7baae1b6905fe18df48e2278e74d4e39ccdHal Finkel return true; 26799f823f94374917174f96a7689955b8463db6816Hal Finkel TBB = LastInst->getOperand(0).getMBB(); 26899f823f94374917174f96a7689955b8463db6816Hal Finkel Cond.push_back(MachineOperand::CreateImm(0)); 26999f823f94374917174f96a7689955b8463db6816Hal Finkel Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, 27099f823f94374917174f96a7689955b8463db6816Hal Finkel true)); 27199f823f94374917174f96a7689955b8463db6816Hal Finkel return false; 272c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 27399f823f94374917174f96a7689955b8463db6816Hal Finkel 274c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Otherwise, don't know what this is. 275c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 276c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 2776e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 278c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Get the instruction before it if it's a terminator. 279c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineInstr *SecondLastInst = I; 280c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 281c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If there are three terminators, we don't know what sort of block this is. 282c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (SecondLastInst && I != MBB.begin() && 283bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng isUnpredicatedTerminator(--I)) 284c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 2856e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 286289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner // If the block ends with PPC::B and PPC:BCC, handle it. 2876e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick if (SecondLastInst->getOpcode() == PPC::BCC && 288c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner LastInst->getOpcode() == PPC::B) { 28982ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!SecondLastInst->getOperand(2).isMBB() || 29082ae933e55839713ea039e7c6353483b14dc5724Evan Cheng !LastInst->getOperand(0).isMBB()) 29182ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 2928aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = SecondLastInst->getOperand(2).getMBB(); 293c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(SecondLastInst->getOperand(0)); 294c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(SecondLastInst->getOperand(1)); 2958aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FBB = LastInst->getOperand(0).getMBB(); 296c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 29799f823f94374917174f96a7689955b8463db6816Hal Finkel } else if ((SecondLastInst->getOpcode() == PPC::BDNZ8 || 29899f823f94374917174f96a7689955b8463db6816Hal Finkel SecondLastInst->getOpcode() == PPC::BDNZ) && 29999f823f94374917174f96a7689955b8463db6816Hal Finkel LastInst->getOpcode() == PPC::B) { 30099f823f94374917174f96a7689955b8463db6816Hal Finkel if (!SecondLastInst->getOperand(0).isMBB() || 30199f823f94374917174f96a7689955b8463db6816Hal Finkel !LastInst->getOperand(0).isMBB()) 30299f823f94374917174f96a7689955b8463db6816Hal Finkel return true; 3037255d2a8084cb6aa96ea0e5f30acfff76df04ee8Hal Finkel if (DisableCTRLoopAnal) 30409fdc7baae1b6905fe18df48e2278e74d4e39ccdHal Finkel return true; 30599f823f94374917174f96a7689955b8463db6816Hal Finkel TBB = SecondLastInst->getOperand(0).getMBB(); 30699f823f94374917174f96a7689955b8463db6816Hal Finkel Cond.push_back(MachineOperand::CreateImm(1)); 30799f823f94374917174f96a7689955b8463db6816Hal Finkel Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, 30899f823f94374917174f96a7689955b8463db6816Hal Finkel true)); 30999f823f94374917174f96a7689955b8463db6816Hal Finkel FBB = LastInst->getOperand(0).getMBB(); 31099f823f94374917174f96a7689955b8463db6816Hal Finkel return false; 31199f823f94374917174f96a7689955b8463db6816Hal Finkel } else if ((SecondLastInst->getOpcode() == PPC::BDZ8 || 31299f823f94374917174f96a7689955b8463db6816Hal Finkel SecondLastInst->getOpcode() == PPC::BDZ) && 31399f823f94374917174f96a7689955b8463db6816Hal Finkel LastInst->getOpcode() == PPC::B) { 31499f823f94374917174f96a7689955b8463db6816Hal Finkel if (!SecondLastInst->getOperand(0).isMBB() || 31599f823f94374917174f96a7689955b8463db6816Hal Finkel !LastInst->getOperand(0).isMBB()) 31699f823f94374917174f96a7689955b8463db6816Hal Finkel return true; 3177255d2a8084cb6aa96ea0e5f30acfff76df04ee8Hal Finkel if (DisableCTRLoopAnal) 31809fdc7baae1b6905fe18df48e2278e74d4e39ccdHal Finkel return true; 31999f823f94374917174f96a7689955b8463db6816Hal Finkel TBB = SecondLastInst->getOperand(0).getMBB(); 32099f823f94374917174f96a7689955b8463db6816Hal Finkel Cond.push_back(MachineOperand::CreateImm(0)); 32199f823f94374917174f96a7689955b8463db6816Hal Finkel Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, 32299f823f94374917174f96a7689955b8463db6816Hal Finkel true)); 32399f823f94374917174f96a7689955b8463db6816Hal Finkel FBB = LastInst->getOperand(0).getMBB(); 32499f823f94374917174f96a7689955b8463db6816Hal Finkel return false; 325c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 3266e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 32713e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen // If the block ends with two PPC:Bs, handle it. The second one is not 32813e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen // executed, so remove it. 3296e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick if (SecondLastInst->getOpcode() == PPC::B && 33013e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen LastInst->getOpcode() == PPC::B) { 33182ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!SecondLastInst->getOperand(0).isMBB()) 33282ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 3338aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = SecondLastInst->getOperand(0).getMBB(); 33413e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen I = LastInst; 335dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng if (AllowModify) 336dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng I->eraseFromParent(); 33713e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen return false; 33813e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen } 33913e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen 340c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Otherwise, can't handle this. 341c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 342c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 343c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 344b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Chengunsigned PPCInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { 345c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock::iterator I = MBB.end(); 346b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng if (I == MBB.begin()) return 0; 347c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner --I; 34893d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen while (I->isDebugValue()) { 34993d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen if (I == MBB.begin()) 35093d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen return 0; 35193d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen --I; 35293d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen } 35399f823f94374917174f96a7689955b8463db6816Hal Finkel if (I->getOpcode() != PPC::B && I->getOpcode() != PPC::BCC && 35499f823f94374917174f96a7689955b8463db6816Hal Finkel I->getOpcode() != PPC::BDNZ8 && I->getOpcode() != PPC::BDNZ && 35599f823f94374917174f96a7689955b8463db6816Hal Finkel I->getOpcode() != PPC::BDZ8 && I->getOpcode() != PPC::BDZ) 356b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 0; 3576e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 358c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Remove the branch. 359c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I->eraseFromParent(); 3606e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 361c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I = MBB.end(); 362c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 363b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng if (I == MBB.begin()) return 1; 364c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner --I; 36599f823f94374917174f96a7689955b8463db6816Hal Finkel if (I->getOpcode() != PPC::BCC && 36699f823f94374917174f96a7689955b8463db6816Hal Finkel I->getOpcode() != PPC::BDNZ8 && I->getOpcode() != PPC::BDNZ && 36799f823f94374917174f96a7689955b8463db6816Hal Finkel I->getOpcode() != PPC::BDZ8 && I->getOpcode() != PPC::BDZ) 368b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 1; 3696e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 370c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Remove the branch. 371c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I->eraseFromParent(); 372b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 2; 373c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 374c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 375b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Chengunsigned 376b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan ChengPPCInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 377b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng MachineBasicBlock *FBB, 3783bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings const SmallVectorImpl<MachineOperand> &Cond, 3793bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings DebugLoc DL) const { 3802dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner // Shouldn't be a fall through. 3812dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner assert(TBB && "InsertBranch must not be told to insert a fallthrough"); 3826e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick assert((Cond.size() == 2 || Cond.size() == 0) && 38354108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner "PPC branch conditions have two components!"); 3846e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 38599f823f94374917174f96a7689955b8463db6816Hal Finkel bool isPPC64 = TM.getSubtargetImpl()->isPPC64(); 38699f823f94374917174f96a7689955b8463db6816Hal Finkel 38754108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner // One-way branch. 3882dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner if (FBB == 0) { 38954108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner if (Cond.empty()) // Unconditional branch 3903bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings BuildMI(&MBB, DL, get(PPC::B)).addMBB(TBB); 39199f823f94374917174f96a7689955b8463db6816Hal Finkel else if (Cond[1].getReg() == PPC::CTR || Cond[1].getReg() == PPC::CTR8) 39299f823f94374917174f96a7689955b8463db6816Hal Finkel BuildMI(&MBB, DL, get(Cond[0].getImm() ? 39399f823f94374917174f96a7689955b8463db6816Hal Finkel (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) : 39499f823f94374917174f96a7689955b8463db6816Hal Finkel (isPPC64 ? PPC::BDZ8 : PPC::BDZ))).addMBB(TBB); 39554108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner else // Conditional branch 3963bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings BuildMI(&MBB, DL, get(PPC::BCC)) 39718258c640466274c26e89016e361ec411ff78520Chris Lattner .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 398b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 1; 3992dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner } 4006e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 401879d09cf130f3760a08865913c04d9ff328fad5fChris Lattner // Two-way Conditional Branch. 40299f823f94374917174f96a7689955b8463db6816Hal Finkel if (Cond[1].getReg() == PPC::CTR || Cond[1].getReg() == PPC::CTR8) 40399f823f94374917174f96a7689955b8463db6816Hal Finkel BuildMI(&MBB, DL, get(Cond[0].getImm() ? 40499f823f94374917174f96a7689955b8463db6816Hal Finkel (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) : 40599f823f94374917174f96a7689955b8463db6816Hal Finkel (isPPC64 ? PPC::BDZ8 : PPC::BDZ))).addMBB(TBB); 40699f823f94374917174f96a7689955b8463db6816Hal Finkel else 40799f823f94374917174f96a7689955b8463db6816Hal Finkel BuildMI(&MBB, DL, get(PPC::BCC)) 40899f823f94374917174f96a7689955b8463db6816Hal Finkel .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 4093bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings BuildMI(&MBB, DL, get(PPC::B)).addMBB(FBB); 410b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 2; 411c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 412c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 41327689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesenvoid PPCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, 41427689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen MachineBasicBlock::iterator I, DebugLoc DL, 41527689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen unsigned DestReg, unsigned SrcReg, 41627689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen bool KillSrc) const { 41727689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen unsigned Opc; 41827689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen if (PPC::GPRCRegClass.contains(DestReg, SrcReg)) 41927689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::OR; 42027689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::G8RCRegClass.contains(DestReg, SrcReg)) 42127689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::OR8; 42227689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::F4RCRegClass.contains(DestReg, SrcReg)) 42327689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::FMR; 42427689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::CRRCRegClass.contains(DestReg, SrcReg)) 42527689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::MCRF; 42627689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::VRRCRegClass.contains(DestReg, SrcReg)) 42727689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::VOR; 42827689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::CRBITRCRegClass.contains(DestReg, SrcReg)) 42927689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::CROR; 43027689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else 43127689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen llvm_unreachable("Impossible reg-to-reg copy"); 432d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson 433e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng const MCInstrDesc &MCID = get(Opc); 434e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng if (MCID.getNumOperands() == 3) 435e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng BuildMI(MBB, I, DL, MCID, DestReg) 43627689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen .addReg(SrcReg).addReg(SrcReg, getKillRegState(KillSrc)); 43727689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else 438e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng BuildMI(MBB, I, DL, MCID, DestReg).addReg(SrcReg, getKillRegState(KillSrc)); 439d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson} 440d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson 4413fd0018af1b692cabfa5a002bf41f1e756aa9ddeHal Finkel// This function returns true if a CR spill is necessary and false otherwise. 4424a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendlingbool 4438e5f2c6f65841542e2a7092553fe42a00048e4c7Dan GohmanPPCInstrInfo::StoreRegToStackSlot(MachineFunction &MF, 4448e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman unsigned SrcReg, bool isKill, 4454a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling int FrameIdx, 4464a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling const TargetRegisterClass *RC, 4474a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling SmallVectorImpl<MachineInstr*> &NewMIs) const{ 448c7f3ace20c325521c68335a1689645b43b06ddf0Chris Lattner DebugLoc DL; 449c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper if (PPC::GPRCRegClass.hasSubClassEq(RC)) { 450f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (SrcReg != PPC::LR) { 45121b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STW)) 452587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 453587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 4544a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling FrameIdx)); 455f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 456f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: this spills LR immediately to memory in one step. To do this, 457f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // we use R11, which we know cannot be used in the prolog/epilog. This is 458f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // a hack. 45921b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::MFLR), PPC::R11)); 46021b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STW)) 461587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::R11, 462587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 4634a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling FrameIdx)); 464f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 465c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::G8RCRegClass.hasSubClassEq(RC)) { 466f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (SrcReg != PPC::LR8) { 46721b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STD)) 468587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 469587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 470587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 471f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 472f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: this spills LR immediately to memory in one step. To do this, 4737ad6b7d35978e1bb89de90aa732cf2f57377d69dHal Finkel // we use X11, which we know cannot be used in the prolog/epilog. This is 474f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // a hack. 47521b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::MFLR8), PPC::X11)); 47621b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STD)) 477587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::X11, 478587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 479587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 480f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 481c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::F8RCRegClass.hasSubClassEq(RC)) { 48221b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STFD)) 483587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 484587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 485587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 486c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::F4RCRegClass.hasSubClassEq(RC)) { 48721b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STFS)) 488587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 489587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 490587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 491c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::CRRCRegClass.hasSubClassEq(RC)) { 4923fd0018af1b692cabfa5a002bf41f1e756aa9ddeHal Finkel if ((!DisablePPC32RS && !TM.getSubtargetImpl()->isPPC64()) || 4933fd0018af1b692cabfa5a002bf41f1e756aa9ddeHal Finkel (!DisablePPC64RS && TM.getSubtargetImpl()->isPPC64())) { 49421b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::SPILL_CR)) 495587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 496587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 49771a2cb25ebc818383dd0f80475bc166f834e8d99Chris Lattner FrameIdx)); 4987194aaf738a1b89441635340403f1c5b06ae18efBill Wendling return true; 4997194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } else { 500c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // FIXME: We need a scatch reg here. The trouble with using R0 is that 501c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // it's possible for the stack frame to be so big the save location is 502c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // out of range of immediate offsets, necessitating another register. 503c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // We hack this on Darwin by reserving R2. It's probably broken on Linux 504c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // at the moment. 505c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen 506234bb38d6c421ea22229087a9835afe99e531276Hal Finkel bool is64Bit = TM.getSubtargetImpl()->isPPC64(); 507c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // We need to store the CR in the low 4-bits of the saved value. First, 508c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // issue a MFCR to save all of the CRBits. 5096e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick unsigned ScratchReg = TM.getSubtargetImpl()->isDarwinABI() ? 510234bb38d6c421ea22229087a9835afe99e531276Hal Finkel (is64Bit ? PPC::X2 : PPC::R2) : 511234bb38d6c421ea22229087a9835afe99e531276Hal Finkel (is64Bit ? PPC::X0 : PPC::R0); 512234bb38d6c421ea22229087a9835afe99e531276Hal Finkel NewMIs.push_back(BuildMI(MF, DL, get(is64Bit ? PPC::MFCR8pseud : 513234bb38d6c421ea22229087a9835afe99e531276Hal Finkel PPC::MFCRpseud), ScratchReg) 5145f07d5224ddc32f405d7e19de8e58e91ab2816bcDale Johannesen .addReg(SrcReg, getKillRegState(isKill))); 5156e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 5167194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // If the saved register wasn't CR0, shift the bits left so that they are 5177194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // in CR0's slot. 5187194aaf738a1b89441635340403f1c5b06ae18efBill Wendling if (SrcReg != PPC::CR0) { 519966aeb5788c242cfaca35c56c0ddc0ff778d4376Evan Cheng unsigned ShiftBits = getPPCRegisterNumbering(SrcReg)*4; 520c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // rlwinm scratch, scratch, ShiftBits, 0, 31. 521234bb38d6c421ea22229087a9835afe99e531276Hal Finkel NewMIs.push_back(BuildMI(MF, DL, get(is64Bit ? PPC::RLWINM8 : 522234bb38d6c421ea22229087a9835afe99e531276Hal Finkel PPC::RLWINM), ScratchReg) 523c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen .addReg(ScratchReg).addImm(ShiftBits) 524c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen .addImm(0).addImm(31)); 5257194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 5266e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 527234bb38d6c421ea22229087a9835afe99e531276Hal Finkel NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(is64Bit ? 528234bb38d6c421ea22229087a9835afe99e531276Hal Finkel PPC::STW8 : PPC::STW)) 529c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen .addReg(ScratchReg, 530587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 5317194aaf738a1b89441635340403f1c5b06ae18efBill Wendling FrameIdx)); 5327194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 533c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::CRBITRCRegClass.hasSubClassEq(RC)) { 5340404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // FIXME: We use CRi here because there is no mtcrf on a bit. Since the 5350404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // backend currently only uses CR1EQ as an individual bit, this should 5360404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // not cause any bug. If we need other uses of CR bits, the following 5370404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // code may be invalid. 5389348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray unsigned Reg = 0; 5396a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller if (SrcReg == PPC::CR0LT || SrcReg == PPC::CR0GT || 5406a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR0EQ || SrcReg == PPC::CR0UN) 5419348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR0; 5426a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR1LT || SrcReg == PPC::CR1GT || 5436a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR1EQ || SrcReg == PPC::CR1UN) 5449348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR1; 5456a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR2LT || SrcReg == PPC::CR2GT || 5466a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR2EQ || SrcReg == PPC::CR2UN) 5479348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR2; 5486a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR3LT || SrcReg == PPC::CR3GT || 5496a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR3EQ || SrcReg == PPC::CR3UN) 5509348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR3; 5516a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR4LT || SrcReg == PPC::CR4GT || 5526a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR4EQ || SrcReg == PPC::CR4UN) 5539348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR4; 5546a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR5LT || SrcReg == PPC::CR5GT || 5556a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR5EQ || SrcReg == PPC::CR5UN) 5569348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR5; 5576a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR6LT || SrcReg == PPC::CR6GT || 5586a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR6EQ || SrcReg == PPC::CR6UN) 5599348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR6; 5606a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR7LT || SrcReg == PPC::CR7GT || 5616a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR7EQ || SrcReg == PPC::CR7UN) 5629348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR7; 5639348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 5646e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick return StoreRegToStackSlot(MF, Reg, isKill, FrameIdx, 565c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper &PPC::CRRCRegClass, NewMIs); 5669348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 567c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::VRRCRegClass.hasSubClassEq(RC)) { 568f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // We don't have indexed addressing for vector loads. Emit: 569f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // R0 = ADDI FI# 570f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // STVX VAL, 0, R0 5716e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick // 572f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: We use R0 here, because it isn't available for RA. 57321b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::ADDI), PPC::R0), 574f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx, 0, 0)); 57521b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::STVX)) 576587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, getKillRegState(isKill)) 577587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::R0) 578587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::R0)); 579f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 580c23197a26f34f559ea9797de51e187087c039c42Torok Edwin llvm_unreachable("Unknown regclass!"); 581f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 5827194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 5837194aaf738a1b89441635340403f1c5b06ae18efBill Wendling return false; 584f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 585f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 586f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid 587f6372aa1cc568df19da7c5023e83c75aa9404a07Owen AndersonPPCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, 5887194aaf738a1b89441635340403f1c5b06ae18efBill Wendling MachineBasicBlock::iterator MI, 5897194aaf738a1b89441635340403f1c5b06ae18efBill Wendling unsigned SrcReg, bool isKill, int FrameIdx, 590746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterClass *RC, 591746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterInfo *TRI) const { 5928e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineFunction &MF = *MBB.getParent(); 593f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVector<MachineInstr*, 4> NewMIs; 5947194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 5958e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman if (StoreRegToStackSlot(MF, SrcReg, isKill, FrameIdx, RC, NewMIs)) { 5968e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>(); 5977194aaf738a1b89441635340403f1c5b06ae18efBill Wendling FuncInfo->setSpillsCR(); 5987194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 5997194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 600f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) 601f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MBB.insert(MI, NewMIs[i]); 6027a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen 6037a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen const MachineFrameInfo &MFI = *MF.getFrameInfo(); 6047a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MachineMemOperand *MMO = 605978e0dfe46e481bfb1281e683aa308329e879e95Jay Foad MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FrameIdx), 60659db5496f4fc2ef6111569e542f8b65480ef14c1Chris Lattner MachineMemOperand::MOStore, 6077a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MFI.getObjectSize(FrameIdx), 6087a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MFI.getObjectAlignment(FrameIdx)); 6097a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen NewMIs.back()->addMemOperand(MF, MMO); 610f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 611f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 612d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkelbool 613d1c321a89ab999b9bb602b0f398ecd4c2022262cBill WendlingPPCInstrInfo::LoadRegFromStackSlot(MachineFunction &MF, DebugLoc DL, 6148e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman unsigned DestReg, int FrameIdx, 6154a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling const TargetRegisterClass *RC, 6164a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling SmallVectorImpl<MachineInstr*> &NewMIs)const{ 617c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper if (PPC::GPRCRegClass.hasSubClassEq(RC)) { 618f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (DestReg != PPC::LR) { 619d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LWZ), 620d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling DestReg), FrameIdx)); 621f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 622d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LWZ), 623d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling PPC::R11), FrameIdx)); 624d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(BuildMI(MF, DL, get(PPC::MTLR)).addReg(PPC::R11)); 625f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 626c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::G8RCRegClass.hasSubClassEq(RC)) { 627f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (DestReg != PPC::LR8) { 628d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LD), DestReg), 629f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 630f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 631d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LD), 6327ad6b7d35978e1bb89de90aa732cf2f57377d69dHal Finkel PPC::X11), FrameIdx)); 6337ad6b7d35978e1bb89de90aa732cf2f57377d69dHal Finkel NewMIs.push_back(BuildMI(MF, DL, get(PPC::MTLR8)).addReg(PPC::X11)); 634f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 635c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::F8RCRegClass.hasSubClassEq(RC)) { 636d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LFD), DestReg), 637f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 638c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::F4RCRegClass.hasSubClassEq(RC)) { 639d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LFS), DestReg), 640f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 641c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::CRRCRegClass.hasSubClassEq(RC)) { 642d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel if ((!DisablePPC32RS && !TM.getSubtargetImpl()->isPPC64()) || 643d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel (!DisablePPC64RS && TM.getSubtargetImpl()->isPPC64())) { 644d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel NewMIs.push_back(addFrameReference(BuildMI(MF, DL, 645d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel get(PPC::RESTORE_CR), DestReg) 646d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel , FrameIdx)); 647d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel return true; 648d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel } else { 649d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // FIXME: We need a scatch reg here. The trouble with using R0 is that 650d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // it's possible for the stack frame to be so big the save location is 651d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // out of range of immediate offsets, necessitating another register. 652d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // We hack this on Darwin by reserving R2. It's probably broken on Linux 653d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // at the moment. 654d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel unsigned ScratchReg = TM.getSubtargetImpl()->isDarwinABI() ? 655d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel PPC::R2 : PPC::R0; 656d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LWZ), 657d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel ScratchReg), FrameIdx)); 658d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel 659d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // If the reloaded register isn't CR0, shift the bits right so that they are 660d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // in the right CR's slot. 661d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel if (DestReg != PPC::CR0) { 662d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel unsigned ShiftBits = getPPCRegisterNumbering(DestReg)*4; 663d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel // rlwinm r11, r11, 32-ShiftBits, 0, 31. 664d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel NewMIs.push_back(BuildMI(MF, DL, get(PPC::RLWINM), ScratchReg) 665d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel .addReg(ScratchReg).addImm(32-ShiftBits).addImm(0) 666d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel .addImm(31)); 667d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel } 668d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel 669234bb38d6c421ea22229087a9835afe99e531276Hal Finkel NewMIs.push_back(BuildMI(MF, DL, get(TM.getSubtargetImpl()->isPPC64() ? 670234bb38d6c421ea22229087a9835afe99e531276Hal Finkel PPC::MTCRF8 : PPC::MTCRF), DestReg) 671d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel .addReg(ScratchReg)); 672f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 673c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::CRBITRCRegClass.hasSubClassEq(RC)) { 6746e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 6759348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray unsigned Reg = 0; 6766a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller if (DestReg == PPC::CR0LT || DestReg == PPC::CR0GT || 6776a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR0EQ || DestReg == PPC::CR0UN) 6789348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR0; 6796a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR1LT || DestReg == PPC::CR1GT || 6806a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR1EQ || DestReg == PPC::CR1UN) 6819348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR1; 6826a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR2LT || DestReg == PPC::CR2GT || 6836a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR2EQ || DestReg == PPC::CR2UN) 6849348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR2; 6856a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR3LT || DestReg == PPC::CR3GT || 6866a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR3EQ || DestReg == PPC::CR3UN) 6879348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR3; 6886a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR4LT || DestReg == PPC::CR4GT || 6896a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR4EQ || DestReg == PPC::CR4UN) 6909348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR4; 6916a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR5LT || DestReg == PPC::CR5GT || 6926a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR5EQ || DestReg == PPC::CR5UN) 6939348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR5; 6946a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR6LT || DestReg == PPC::CR6GT || 6956a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR6EQ || DestReg == PPC::CR6UN) 6969348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR6; 6976a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR7LT || DestReg == PPC::CR7GT || 6986a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR7EQ || DestReg == PPC::CR7UN) 6999348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR7; 7009348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 7016e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick return LoadRegFromStackSlot(MF, DL, Reg, FrameIdx, 702c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper &PPC::CRRCRegClass, NewMIs); 7039348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 704c909950c384e8234a7b3c5a76b7f79e3f7012cebCraig Topper } else if (PPC::VRRCRegClass.hasSubClassEq(RC)) { 705f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // We don't have indexed addressing for vector loads. Emit: 706f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // R0 = ADDI FI# 707f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // Dest = LVX 0, R0 7086e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick // 709f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: We use R0 here, because it isn't available for RA. 710d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::ADDI), PPC::R0), 711f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx, 0, 0)); 712d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(BuildMI(MF, DL, get(PPC::LVX),DestReg).addReg(PPC::R0) 713f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson .addReg(PPC::R0)); 714f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 715c23197a26f34f559ea9797de51e187087c039c42Torok Edwin llvm_unreachable("Unknown regclass!"); 716f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 717d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel 718d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel return false; 719f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 720f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 721f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid 722f6372aa1cc568df19da7c5023e83c75aa9404a07Owen AndersonPPCInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, 7237194aaf738a1b89441635340403f1c5b06ae18efBill Wendling MachineBasicBlock::iterator MI, 7247194aaf738a1b89441635340403f1c5b06ae18efBill Wendling unsigned DestReg, int FrameIdx, 725746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterClass *RC, 726746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterInfo *TRI) const { 7278e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineFunction &MF = *MBB.getParent(); 728f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVector<MachineInstr*, 4> NewMIs; 729c7f3ace20c325521c68335a1689645b43b06ddf0Chris Lattner DebugLoc DL; 730d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling if (MI != MBB.end()) DL = MI->getDebugLoc(); 731d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel if (LoadRegFromStackSlot(MF, DL, DestReg, FrameIdx, RC, NewMIs)) { 732d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>(); 733d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel FuncInfo->setSpillsCR(); 734d21e930eac3d99dd77ee33ea5826700b4bc97ae8Hal Finkel } 735f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) 736f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MBB.insert(MI, NewMIs[i]); 7377a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen 7387a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen const MachineFrameInfo &MFI = *MF.getFrameInfo(); 7397a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MachineMemOperand *MMO = 740978e0dfe46e481bfb1281e683aa308329e879e95Jay Foad MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FrameIdx), 74159db5496f4fc2ef6111569e542f8b65480ef14c1Chris Lattner MachineMemOperand::MOLoad, 7427a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MFI.getObjectSize(FrameIdx), 7437a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MFI.getObjectAlignment(FrameIdx)); 7447a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen NewMIs.back()->addMemOperand(MF, MMO); 745f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 746f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 7470965217e74fe07f1451350a80114ab566ced5de0Evan ChengMachineInstr* 7480965217e74fe07f1451350a80114ab566ced5de0Evan ChengPPCInstrInfo::emitFrameIndexDebugValue(MachineFunction &MF, 7498601a3d4decff0a380e059b037dabf71075497d3Evan Cheng int FrameIx, uint64_t Offset, 7500965217e74fe07f1451350a80114ab566ced5de0Evan Cheng const MDNode *MDPtr, 7510965217e74fe07f1451350a80114ab566ced5de0Evan Cheng DebugLoc DL) const { 7520965217e74fe07f1451350a80114ab566ced5de0Evan Cheng MachineInstrBuilder MIB = BuildMI(MF, DL, get(PPC::DBG_VALUE)); 7530965217e74fe07f1451350a80114ab566ced5de0Evan Cheng addFrameReference(MIB, FrameIx, 0, false).addImm(Offset).addMetadata(MDPtr); 7540965217e74fe07f1451350a80114ab566ced5de0Evan Cheng return &*MIB; 7550965217e74fe07f1451350a80114ab566ced5de0Evan Cheng} 7560965217e74fe07f1451350a80114ab566ced5de0Evan Cheng 757c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattnerbool PPCInstrInfo:: 75844eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen AndersonReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { 7597c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner assert(Cond.size() == 2 && "Invalid PPC branch opcode!"); 76099f823f94374917174f96a7689955b8463db6816Hal Finkel if (Cond[1].getReg() == PPC::CTR8 || Cond[1].getReg() == PPC::CTR) 76199f823f94374917174f96a7689955b8463db6816Hal Finkel Cond[0].setImm(Cond[0].getImm() == 0 ? 1 : 0); 76299f823f94374917174f96a7689955b8463db6816Hal Finkel else 76399f823f94374917174f96a7689955b8463db6816Hal Finkel // Leave the CR# the same, but invert the condition. 76499f823f94374917174f96a7689955b8463db6816Hal Finkel Cond[0].setImm(PPC::InvertPredicate((PPC::Predicate)Cond[0].getImm())); 7657c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner return false; 766c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 76752e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray 76852e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// GetInstSize - Return the number of bytes of code the specified 76952e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// instruction may be. This returns the maximum number of bytes. 77052e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// 77152e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffrayunsigned PPCInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { 77252e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray switch (MI->getOpcode()) { 77352e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray case PPC::INLINEASM: { // Inline Asm: Variable size. 77452e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray const MachineFunction *MF = MI->getParent()->getParent(); 77552e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray const char *AsmStr = MI->getOperand(0).getSymbolName(); 776af76e592c7f9deff0e55c13dbb4a34f07f1c7f64Chris Lattner return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo()); 77752e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray } 7787431beaba2a01c3fe299c861b2ec85cbf1dc81c4Bill Wendling case PPC::PROLOG_LABEL: 7794406604047423576e36657c7ede266ca42e79642Dan Gohman case PPC::EH_LABEL: 7804406604047423576e36657c7ede266ca42e79642Dan Gohman case PPC::GC_LABEL: 781375be7730a6f3dee7a6dc319ee6c355a11ac99adDale Johannesen case PPC::DBG_VALUE: 78252e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray return 0; 7835b00ceaeeabff8c25abb09926343c3fcb06053d8Hal Finkel case PPC::BL8_NOP_ELF: 7845b00ceaeeabff8c25abb09926343c3fcb06053d8Hal Finkel case PPC::BLA8_NOP_ELF: 7855b00ceaeeabff8c25abb09926343c3fcb06053d8Hal Finkel return 8; 78652e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray default: 78752e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray return 4; // PowerPC instructions are all 4 bytes 78852e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray } 78952e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray} 790