PPCInstrInfo.cpp revision 16e71f2f70811c69c56052dd146324fe20e31db5
1f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===- PPC32InstrInfo.cpp - PowerPC32 Instruction Information ---*- C++ -*-===// 2b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 3f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// The LLVM Compiler Infrastructure 4f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 5f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// This file was developed by the LLVM research group and is distributed under 6f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// the University of Illinois Open Source License. See LICENSE.TXT for details. 7b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 8f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 9f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 10f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// This file contains the PowerPC implementation of the TargetInstrInfo class. 11f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 12f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 13f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 1416e71f2f70811c69c56052dd146324fe20e31db5Chris Lattner#include "PPCInstrInfo.h" 154c7b43b43fdf943c7298718e15ab5d6dfe345be7Chris Lattner#include "PPCGenInstrInfo.inc" 162668959b8879097db368aec7d76c455260abc75bChris Lattner#include "PPC.h" 17f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "llvm/CodeGen/MachineInstrBuilder.h" 18f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include <iostream> 19f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmanusing namespace llvm; 20f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 21f2ccb77ee9d8ab35866dae111fa36929689c7511Misha BrukmanPPC32InstrInfo::PPC32InstrInfo() 224c7b43b43fdf943c7298718e15ab5d6dfe345be7Chris Lattner : TargetInstrInfo(PPCInsts, sizeof(PPCInsts)/sizeof(PPCInsts[0])) {} 23f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 24f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmanbool PPC32InstrInfo::isMoveInstr(const MachineInstr& MI, 25f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman unsigned& sourceReg, 26f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman unsigned& destReg) const { 27f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineOpCode oc = MI.getOpcode(); 28f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (oc == PPC::OR) { // or r1, r2, r2 29f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman assert(MI.getNumOperands() == 3 && 30f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(0).isRegister() && 31f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(1).isRegister() && 32f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(2).isRegister() && 33f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman "invalid PPC OR instruction!"); 34f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (MI.getOperand(1).getReg() == MI.getOperand(2).getReg()) { 35f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman sourceReg = MI.getOperand(1).getReg(); 36f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman destReg = MI.getOperand(0).getReg(); 37f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return true; 38f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 39f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } else if (oc == PPC::ADDI) { // addi r1, r2, 0 40f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman assert(MI.getNumOperands() == 3 && 41f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(0).isRegister() && 42f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(2).isImmediate() && 43f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman "invalid PPC ADDI instruction!"); 44f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (MI.getOperand(1).isRegister() && MI.getOperand(2).getImmedValue()==0) { 45f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman sourceReg = MI.getOperand(1).getReg(); 46f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman destReg = MI.getOperand(0).getReg(); 47f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return true; 48f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 49cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman } else if (oc == PPC::ORI) { // ori r1, r2, 0 50cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman assert(MI.getNumOperands() == 3 && 51cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman MI.getOperand(0).isRegister() && 52cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman MI.getOperand(1).isRegister() && 53cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman MI.getOperand(2).isImmediate() && 54cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman "invalid PPC ORI instruction!"); 55cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman if (MI.getOperand(2).getImmedValue()==0) { 56cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman sourceReg = MI.getOperand(1).getReg(); 57cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman destReg = MI.getOperand(0).getReg(); 58cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman return true; 59cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman } 60eb5d47d99db0d9e4fc11f136fbacbd507c71a4c2Chris Lattner } else if (oc == PPC::FMRS || oc == PPC::FMRD || 61eb5d47d99db0d9e4fc11f136fbacbd507c71a4c2Chris Lattner oc == PPC::FMRSD) { // fmr r1, r2 62f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman assert(MI.getNumOperands() == 2 && 63f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(0).isRegister() && 64f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(1).isRegister() && 65f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman "invalid PPC FMR instruction"); 66f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman sourceReg = MI.getOperand(1).getReg(); 67f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman destReg = MI.getOperand(0).getReg(); 68f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return true; 697af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman } else if (oc == PPC::MCRF) { // mcrf cr1, cr2 707af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman assert(MI.getNumOperands() == 2 && 717af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman MI.getOperand(0).isRegister() && 727af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman MI.getOperand(1).isRegister() && 737af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman "invalid PPC MCRF instruction"); 747af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman sourceReg = MI.getOperand(1).getReg(); 757af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman destReg = MI.getOperand(0).getReg(); 767af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman return true; 77f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 78f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return false; 79f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman} 80043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 81043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner// commuteInstruction - We can commute rlwimi instructions, but only if the 82043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner// rotate amt is zero. We also have to munge the immediates a bit. 83043870dd85ea41e8972c304b122070a417c8a4bcChris LattnerMachineInstr *PPC32InstrInfo::commuteInstruction(MachineInstr *MI) const { 84043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Normal instructions can be commuted the obvious way. 85043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner if (MI->getOpcode() != PPC::RLWIMI) 86043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return TargetInstrInfo::commuteInstruction(MI); 87043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 88043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Cannot commute if it has a non-zero rotate count. 89043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner if (MI->getOperand(3).getImmedValue() != 0) 90043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return 0; 91043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 92043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // If we have a zero rotate count, we have: 93043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // M = mask(MB,ME) 94043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Op0 = (Op1 & ~M) | (Op2 & M) 95043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Change this to: 96043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // M = mask((ME+1)&31, (MB-1)&31) 97043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Op0 = (Op2 & ~M) | (Op1 & M) 98043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 99043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Swap op1/op2 100043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned Reg1 = MI->getOperand(1).getReg(); 101043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned Reg2 = MI->getOperand(2).getReg(); 102043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner MI->SetMachineOperandReg(2, Reg1); 103043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner MI->SetMachineOperandReg(1, Reg2); 104043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 105043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Swap the mask around. 106043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned MB = MI->getOperand(4).getImmedValue(); 107043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned ME = MI->getOperand(5).getImmedValue(); 108043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner MI->getOperand(4).setImmedValue((ME+1) & 31); 109043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner MI->getOperand(5).setImmedValue((MB-1) & 31); 110043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return MI; 111043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner} 112