PPCInstrInfo.cpp revision 58dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6
121e463b2bf864671a87ebe386cb100ef9349a540Nate Begeman//===- PPCInstrInfo.cpp - PowerPC32 Instruction Information -----*- C++ -*-===// 2b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 3f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// The LLVM Compiler Infrastructure 4f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 64ee451de366474b9c228b4e5fa573795a715216dChris Lattner// License. See LICENSE.TXT for details. 7b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 8f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 9f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 10f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// This file contains the PowerPC implementation of the TargetInstrInfo class. 11f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 12f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 13f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 1416e71f2f70811c69c56052dd146324fe20e31db5Chris Lattner#include "PPCInstrInfo.h" 15f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson#include "PPCInstrBuilder.h" 167194aaf738a1b89441635340403f1c5b06ae18efBill Wendling#include "PPCMachineFunctionInfo.h" 17df4ed6350b2a51f71c0980e86c9078f4046ea706Chris Lattner#include "PPCPredicates.h" 184c7b43b43fdf943c7298718e15ab5d6dfe345be7Chris Lattner#include "PPCGenInstrInfo.inc" 19b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner#include "PPCTargetMachine.h" 20718cb665ca6ce2bc4d8e8479f46a45db91b49f86Owen Anderson#include "llvm/ADT/STLExtras.h" 21f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "llvm/CodeGen/MachineInstrBuilder.h" 22880d0f6018b6928bdcad291be60c801238619955Bill Wendling#include "llvm/Support/CommandLine.h" 2352e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray#include "llvm/Target/TargetAsmInfo.h" 24f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmanusing namespace llvm; 25f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 264a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendlingextern cl::opt<bool> EnablePPC32RS; // FIXME (64-bit): See PPCRegisterInfo.cpp. 274a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendlingextern cl::opt<bool> EnablePPC64RS; // FIXME (64-bit): See PPCRegisterInfo.cpp. 28880d0f6018b6928bdcad291be60c801238619955Bill Wendling 29b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris LattnerPPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm) 30641055225092833197efe8e5bce01d50bcf1daaeChris Lattner : TargetInstrInfoImpl(PPCInsts, array_lengthof(PPCInsts)), TM(tm), 317ce45783531cfa81bfd7be561ea7e4738e8c6ca8Evan Cheng RI(*TM.getSubtargetImpl(), *this) {} 32b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner 33b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner/// getPointerRegClass - Return the register class to use to hold pointers. 34b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner/// This is used for addressing modes. 35b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattnerconst TargetRegisterClass *PPCInstrInfo::getPointerRegClass() const { 36b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner if (TM.getSubtargetImpl()->isPPC64()) 37b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner return &PPC::G8RCRegClass; 38b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner else 39b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner return &PPC::GPRCRegClass; 40b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner} 41b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner 42f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 4321e463b2bf864671a87ebe386cb100ef9349a540Nate Begemanbool PPCInstrInfo::isMoveInstr(const MachineInstr& MI, 4421e463b2bf864671a87ebe386cb100ef9349a540Nate Begeman unsigned& sourceReg, 4521e463b2bf864671a87ebe386cb100ef9349a540Nate Begeman unsigned& destReg) const { 46cc8cd0cbf12c12916d4b38ef0de5be5501c8270eChris Lattner unsigned oc = MI.getOpcode(); 47b410dc99774d52b4491750dab10b91cca1d661d8Chris Lattner if (oc == PPC::OR || oc == PPC::OR8 || oc == PPC::VOR || 4814c09b81ead8fe8b754fca2d0a8237cb810b37d6Chris Lattner oc == PPC::OR4To8 || oc == PPC::OR8To4) { // or r1, r2, r2 491e341729dd003ca33ecea4abf13134f20062c5f8Evan Cheng assert(MI.getNumOperands() >= 3 && 50f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(0).isRegister() && 51f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(1).isRegister() && 52f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(2).isRegister() && 53f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman "invalid PPC OR instruction!"); 54f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (MI.getOperand(1).getReg() == MI.getOperand(2).getReg()) { 55f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman sourceReg = MI.getOperand(1).getReg(); 56f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman destReg = MI.getOperand(0).getReg(); 57f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return true; 58f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 59f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } else if (oc == PPC::ADDI) { // addi r1, r2, 0 601e341729dd003ca33ecea4abf13134f20062c5f8Evan Cheng assert(MI.getNumOperands() >= 3 && 61f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(0).isRegister() && 62f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(2).isImmediate() && 63f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman "invalid PPC ADDI instruction!"); 649a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner if (MI.getOperand(1).isRegister() && MI.getOperand(2).getImm() == 0) { 65f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman sourceReg = MI.getOperand(1).getReg(); 66f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman destReg = MI.getOperand(0).getReg(); 67f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return true; 68f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 69cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman } else if (oc == PPC::ORI) { // ori r1, r2, 0 701e341729dd003ca33ecea4abf13134f20062c5f8Evan Cheng assert(MI.getNumOperands() >= 3 && 71cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman MI.getOperand(0).isRegister() && 72cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman MI.getOperand(1).isRegister() && 73cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman MI.getOperand(2).isImmediate() && 74cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman "invalid PPC ORI instruction!"); 759a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner if (MI.getOperand(2).getImm() == 0) { 76cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman sourceReg = MI.getOperand(1).getReg(); 77cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman destReg = MI.getOperand(0).getReg(); 78cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman return true; 79cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman } 80eb5d47d99db0d9e4fc11f136fbacbd507c71a4c2Chris Lattner } else if (oc == PPC::FMRS || oc == PPC::FMRD || 81eb5d47d99db0d9e4fc11f136fbacbd507c71a4c2Chris Lattner oc == PPC::FMRSD) { // fmr r1, r2 821e341729dd003ca33ecea4abf13134f20062c5f8Evan Cheng assert(MI.getNumOperands() >= 2 && 83f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(0).isRegister() && 84f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(1).isRegister() && 85f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman "invalid PPC FMR instruction"); 86f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman sourceReg = MI.getOperand(1).getReg(); 87f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman destReg = MI.getOperand(0).getReg(); 88f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return true; 897af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman } else if (oc == PPC::MCRF) { // mcrf cr1, cr2 901e341729dd003ca33ecea4abf13134f20062c5f8Evan Cheng assert(MI.getNumOperands() >= 2 && 917af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman MI.getOperand(0).isRegister() && 927af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman MI.getOperand(1).isRegister() && 937af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman "invalid PPC MCRF instruction"); 947af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman sourceReg = MI.getOperand(1).getReg(); 957af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman destReg = MI.getOperand(0).getReg(); 967af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman return true; 97f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 98f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return false; 99f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman} 100043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 101408396014742a05cad1c91949d2226169e3f9d80Chris Lattnerunsigned PPCInstrInfo::isLoadFromStackSlot(MachineInstr *MI, 1029c09c9ec9dab61450800b42cbf746164aa076b88Chris Lattner int &FrameIndex) const { 103408396014742a05cad1c91949d2226169e3f9d80Chris Lattner switch (MI->getOpcode()) { 104408396014742a05cad1c91949d2226169e3f9d80Chris Lattner default: break; 105408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LD: 106408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LWZ: 107408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LFS: 108408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LFD: 1098aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && 1108aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner MI->getOperand(2).isFI()) { 1118aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FrameIndex = MI->getOperand(2).getIndex(); 112408396014742a05cad1c91949d2226169e3f9d80Chris Lattner return MI->getOperand(0).getReg(); 113408396014742a05cad1c91949d2226169e3f9d80Chris Lattner } 114408396014742a05cad1c91949d2226169e3f9d80Chris Lattner break; 115408396014742a05cad1c91949d2226169e3f9d80Chris Lattner } 116408396014742a05cad1c91949d2226169e3f9d80Chris Lattner return 0; 1176524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner} 118408396014742a05cad1c91949d2226169e3f9d80Chris Lattner 1196524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattnerunsigned PPCInstrInfo::isStoreToStackSlot(MachineInstr *MI, 1206524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner int &FrameIndex) const { 1216524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner switch (MI->getOpcode()) { 1226524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner default: break; 1233b478b31e297208ef2c9f74750a8a603eb3726fbNate Begeman case PPC::STD: 1246524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STW: 1256524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STFS: 1266524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STFD: 1278aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && 1288aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner MI->getOperand(2).isFI()) { 1298aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FrameIndex = MI->getOperand(2).getIndex(); 1306524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner return MI->getOperand(0).getReg(); 1316524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner } 1326524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner break; 1336524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner } 1346524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner return 0; 1356524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner} 136408396014742a05cad1c91949d2226169e3f9d80Chris Lattner 137043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner// commuteInstruction - We can commute rlwimi instructions, but only if the 138043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner// rotate amt is zero. We also have to munge the immediates a bit. 13958dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan ChengMachineInstr * 14058dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan ChengPPCInstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const { 141043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Normal instructions can be commuted the obvious way. 142043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner if (MI->getOpcode() != PPC::RLWIMI) 14358dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng return TargetInstrInfoImpl::commuteInstruction(MI, NewMI); 144043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 145043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Cannot commute if it has a non-zero rotate count. 1469a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner if (MI->getOperand(3).getImm() != 0) 147043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return 0; 148043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 149043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // If we have a zero rotate count, we have: 150043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // M = mask(MB,ME) 151043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Op0 = (Op1 & ~M) | (Op2 & M) 152043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Change this to: 153043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // M = mask((ME+1)&31, (MB-1)&31) 154043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Op0 = (Op2 & ~M) | (Op1 & M) 155043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 156043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Swap op1/op2 157a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng unsigned Reg0 = MI->getOperand(0).getReg(); 158043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned Reg1 = MI->getOperand(1).getReg(); 159043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned Reg2 = MI->getOperand(2).getReg(); 1606ce7dc2a97260eea5fba414332796464912b9359Evan Cheng bool Reg1IsKill = MI->getOperand(1).isKill(); 1616ce7dc2a97260eea5fba414332796464912b9359Evan Cheng bool Reg2IsKill = MI->getOperand(2).isKill(); 16258dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng bool ChangeReg0 = false; 163a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // If machine instrs are no longer in two-address forms, update 164a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // destination register as well. 165a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng if (Reg0 == Reg1) { 166a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // Must be two address instruction! 167a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng assert(MI->getDesc().getOperandConstraint(0, TOI::TIED_TO) && 168a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng "Expecting a two-address instruction!"); 169a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng Reg2IsKill = false; 17058dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng ChangeReg0 = true; 17158dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng } 17258dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 17358dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng // Masks. 17458dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned MB = MI->getOperand(4).getImm(); 17558dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned ME = MI->getOperand(5).getImm(); 17658dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 17758dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng if (NewMI) { 17858dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng // Create a new instruction. 17958dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned Reg0 = ChangeReg0 ? Reg2 : MI->getOperand(0).getReg(); 18058dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng bool Reg0IsDead = MI->getOperand(0).isDead(); 18158dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng return BuildMI(MI->getDesc()).addReg(Reg0, true, false, false, Reg0IsDead) 18258dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng .addReg(Reg2, false, false, Reg2IsKill) 18358dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng .addReg(Reg1, false, false, Reg1IsKill) 18458dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng .addImm((ME+1) & 31) 18558dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng .addImm((MB-1) & 31); 186a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng } 18758dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 18858dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng if (ChangeReg0) 18958dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng MI->getOperand(0).setReg(Reg2); 190e53f4a055f74bded20d6129b4724ddd17fd199f6Chris Lattner MI->getOperand(2).setReg(Reg1); 191e53f4a055f74bded20d6129b4724ddd17fd199f6Chris Lattner MI->getOperand(1).setReg(Reg2); 192f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner MI->getOperand(2).setIsKill(Reg1IsKill); 193f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner MI->getOperand(1).setIsKill(Reg2IsKill); 194043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 195043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Swap the mask around. 1969a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner MI->getOperand(4).setImm((ME+1) & 31); 1979a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner MI->getOperand(5).setImm((MB-1) & 31); 198043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return MI; 199043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner} 200bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner 201bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattnervoid PPCInstrInfo::insertNoop(MachineBasicBlock &MBB, 202bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner MachineBasicBlock::iterator MI) const { 203c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng BuildMI(MBB, MI, get(PPC::NOP)); 204bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner} 205c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 206c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 207c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner// Branch analysis. 208c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattnerbool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, 209c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock *&FBB, 210c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner std::vector<MachineOperand> &Cond) const { 211c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If the block has no terminators, it just falls into the block after it. 212c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock::iterator I = MBB.end(); 213bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) 214c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 215c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 216c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Get the last instruction in the block. 217c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineInstr *LastInst = I; 218c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 219c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If there is only one terminator instruction, process it. 220bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) { 221c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (LastInst->getOpcode() == PPC::B) { 2228aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = LastInst->getOperand(0).getMBB(); 223c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 224289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner } else if (LastInst->getOpcode() == PPC::BCC) { 225c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Block ends with fall-through condbranch. 2268aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = LastInst->getOperand(2).getMBB(); 227c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(LastInst->getOperand(0)); 228c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(LastInst->getOperand(1)); 2297c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner return false; 230c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 231c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Otherwise, don't know what this is. 232c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 233c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 234c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 235c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Get the instruction before it if it's a terminator. 236c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineInstr *SecondLastInst = I; 237c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 238c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If there are three terminators, we don't know what sort of block this is. 239c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (SecondLastInst && I != MBB.begin() && 240bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng isUnpredicatedTerminator(--I)) 241c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 242c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 243289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner // If the block ends with PPC::B and PPC:BCC, handle it. 244289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner if (SecondLastInst->getOpcode() == PPC::BCC && 245c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner LastInst->getOpcode() == PPC::B) { 2468aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = SecondLastInst->getOperand(2).getMBB(); 247c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(SecondLastInst->getOperand(0)); 248c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(SecondLastInst->getOperand(1)); 2498aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FBB = LastInst->getOperand(0).getMBB(); 250c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 251c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 252c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 25313e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen // If the block ends with two PPC:Bs, handle it. The second one is not 25413e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen // executed, so remove it. 25513e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen if (SecondLastInst->getOpcode() == PPC::B && 25613e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen LastInst->getOpcode() == PPC::B) { 2578aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = SecondLastInst->getOperand(0).getMBB(); 25813e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen I = LastInst; 25913e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen I->eraseFromParent(); 26013e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen return false; 26113e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen } 26213e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen 263c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Otherwise, can't handle this. 264c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 265c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 266c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 267b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Chengunsigned PPCInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { 268c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock::iterator I = MBB.end(); 269b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng if (I == MBB.begin()) return 0; 270c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner --I; 271289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner if (I->getOpcode() != PPC::B && I->getOpcode() != PPC::BCC) 272b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 0; 273c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 274c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Remove the branch. 275c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I->eraseFromParent(); 276c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 277c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I = MBB.end(); 278c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 279b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng if (I == MBB.begin()) return 1; 280c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner --I; 281289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner if (I->getOpcode() != PPC::BCC) 282b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 1; 283c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 284c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Remove the branch. 285c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I->eraseFromParent(); 286b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 2; 287c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 288c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 289b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Chengunsigned 290b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan ChengPPCInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 291b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng MachineBasicBlock *FBB, 292b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng const std::vector<MachineOperand> &Cond) const { 2932dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner // Shouldn't be a fall through. 2942dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner assert(TBB && "InsertBranch must not be told to insert a fallthrough"); 29554108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner assert((Cond.size() == 2 || Cond.size() == 0) && 29654108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner "PPC branch conditions have two components!"); 2972dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner 29854108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner // One-way branch. 2992dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner if (FBB == 0) { 30054108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner if (Cond.empty()) // Unconditional branch 301c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng BuildMI(&MBB, get(PPC::B)).addMBB(TBB); 30254108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner else // Conditional branch 303c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng BuildMI(&MBB, get(PPC::BCC)) 30418258c640466274c26e89016e361ec411ff78520Chris Lattner .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 305b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 1; 3062dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner } 307c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 308879d09cf130f3760a08865913c04d9ff328fad5fChris Lattner // Two-way Conditional Branch. 309c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng BuildMI(&MBB, get(PPC::BCC)) 31018258c640466274c26e89016e361ec411ff78520Chris Lattner .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 311c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng BuildMI(&MBB, get(PPC::B)).addMBB(FBB); 312b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 2; 313c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 314c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 315d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Andersonvoid PPCInstrInfo::copyRegToReg(MachineBasicBlock &MBB, 316d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson MachineBasicBlock::iterator MI, 317d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson unsigned DestReg, unsigned SrcReg, 318d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson const TargetRegisterClass *DestRC, 319d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson const TargetRegisterClass *SrcRC) const { 320d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson if (DestRC != SrcRC) { 321d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson cerr << "Not yet supported!"; 322d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson abort(); 323d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } 324d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson 325d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson if (DestRC == PPC::GPRCRegisterClass) { 326d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson BuildMI(MBB, MI, get(PPC::OR), DestReg).addReg(SrcReg).addReg(SrcReg); 327d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } else if (DestRC == PPC::G8RCRegisterClass) { 328d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson BuildMI(MBB, MI, get(PPC::OR8), DestReg).addReg(SrcReg).addReg(SrcReg); 329d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } else if (DestRC == PPC::F4RCRegisterClass) { 330d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson BuildMI(MBB, MI, get(PPC::FMRS), DestReg).addReg(SrcReg); 331d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } else if (DestRC == PPC::F8RCRegisterClass) { 332d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson BuildMI(MBB, MI, get(PPC::FMRD), DestReg).addReg(SrcReg); 333d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } else if (DestRC == PPC::CRRCRegisterClass) { 334d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson BuildMI(MBB, MI, get(PPC::MCRF), DestReg).addReg(SrcReg); 335d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } else if (DestRC == PPC::VRRCRegisterClass) { 336d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson BuildMI(MBB, MI, get(PPC::VOR), DestReg).addReg(SrcReg).addReg(SrcReg); 3370404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray } else if (DestRC == PPC::CRBITRCRegisterClass) { 3380404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray BuildMI(MBB, MI, get(PPC::CROR), DestReg).addReg(SrcReg).addReg(SrcReg); 339d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } else { 340d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson cerr << "Attempt to copy register that is not GPR or FPR"; 341d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson abort(); 342d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } 343d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson} 344d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson 3454a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendlingbool 3464a66e9a57e679b4f3243bf2061daf53c70102030Bill WendlingPPCInstrInfo::StoreRegToStackSlot(unsigned SrcReg, bool isKill, 3474a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling int FrameIdx, 3484a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling const TargetRegisterClass *RC, 3494a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling SmallVectorImpl<MachineInstr*> &NewMIs) const{ 350f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (RC == PPC::GPRCRegisterClass) { 351f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (SrcReg != PPC::LR) { 3524a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(addFrameReference(BuildMI(get(PPC::STW)) 3534a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling .addReg(SrcReg, false, false, isKill), 3544a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling FrameIdx)); 355f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 356f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: this spills LR immediately to memory in one step. To do this, 357f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // we use R11, which we know cannot be used in the prolog/epilog. This is 358f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // a hack. 3594a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(BuildMI(get(PPC::MFLR), PPC::R11)); 3604a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(addFrameReference(BuildMI(get(PPC::STW)) 3614a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling .addReg(PPC::R11, false, false, isKill), 3624a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling FrameIdx)); 363f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 364f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::G8RCRegisterClass) { 365f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (SrcReg != PPC::LR8) { 3664a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(addFrameReference(BuildMI(get(PPC::STD)) 367cb341de0e238f80dabf3da7b4f2aad58de6914bdChris Lattner .addReg(SrcReg, false, false, isKill), FrameIdx)); 368f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 369f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: this spills LR immediately to memory in one step. To do this, 370f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // we use R11, which we know cannot be used in the prolog/epilog. This is 371f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // a hack. 3724a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(BuildMI(get(PPC::MFLR8), PPC::X11)); 3734a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(addFrameReference(BuildMI(get(PPC::STD)) 374cb341de0e238f80dabf3da7b4f2aad58de6914bdChris Lattner .addReg(PPC::X11, false, false, isKill), FrameIdx)); 375f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 376f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F8RCRegisterClass) { 3774a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(addFrameReference(BuildMI(get(PPC::STFD)) 378cb341de0e238f80dabf3da7b4f2aad58de6914bdChris Lattner .addReg(SrcReg, false, false, isKill), FrameIdx)); 379f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F4RCRegisterClass) { 3804a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(addFrameReference(BuildMI(get(PPC::STFS)) 381cb341de0e238f80dabf3da7b4f2aad58de6914bdChris Lattner .addReg(SrcReg, false, false, isKill), FrameIdx)); 382f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::CRRCRegisterClass) { 3834a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling if ((EnablePPC32RS && !TM.getSubtargetImpl()->isPPC64()) || 3844a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling (EnablePPC64RS && TM.getSubtargetImpl()->isPPC64())) { 3854a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling // FIXME (64-bit): Enable 3864a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(addFrameReference(BuildMI(get(PPC::SPILL_CR)) 3877194aaf738a1b89441635340403f1c5b06ae18efBill Wendling .addReg(SrcReg, false, false, isKill), 38871a2cb25ebc818383dd0f80475bc166f834e8d99Chris Lattner FrameIdx)); 3897194aaf738a1b89441635340403f1c5b06ae18efBill Wendling return true; 3907194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } else { 3917194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // FIXME: We use R0 here, because it isn't available for RA. We need to 3927194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // store the CR in the low 4-bits of the saved value. First, issue a MFCR 3937194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // to save all of the CRBits. 3944a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(BuildMI(get(PPC::MFCR), PPC::R0)); 395f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 3967194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // If the saved register wasn't CR0, shift the bits left so that they are 3977194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // in CR0's slot. 3987194aaf738a1b89441635340403f1c5b06ae18efBill Wendling if (SrcReg != PPC::CR0) { 3997194aaf738a1b89441635340403f1c5b06ae18efBill Wendling unsigned ShiftBits = PPCRegisterInfo::getRegisterNumbering(SrcReg)*4; 4007194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // rlwinm r0, r0, ShiftBits, 0, 31. 4014a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(BuildMI(get(PPC::RLWINM), PPC::R0) 402cb341de0e238f80dabf3da7b4f2aad58de6914bdChris Lattner .addReg(PPC::R0).addImm(ShiftBits).addImm(0).addImm(31)); 4037194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 404f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 4054a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(addFrameReference(BuildMI(get(PPC::STW)) 4067194aaf738a1b89441635340403f1c5b06ae18efBill Wendling .addReg(PPC::R0, false, false, isKill), 4077194aaf738a1b89441635340403f1c5b06ae18efBill Wendling FrameIdx)); 4087194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 4090404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray } else if (RC == PPC::CRBITRCRegisterClass) { 4100404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // FIXME: We use CRi here because there is no mtcrf on a bit. Since the 4110404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // backend currently only uses CR1EQ as an individual bit, this should 4120404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // not cause any bug. If we need other uses of CR bits, the following 4130404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // code may be invalid. 4149348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray unsigned Reg = 0; 4150404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray if (SrcReg >= PPC::CR0LT || SrcReg <= PPC::CR0UN) 4169348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR0; 4170404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray else if (SrcReg >= PPC::CR1LT || SrcReg <= PPC::CR1UN) 4189348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR1; 4199348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (SrcReg >= PPC::CR2LT || SrcReg <= PPC::CR2UN) 4209348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR2; 4219348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (SrcReg >= PPC::CR3LT || SrcReg <= PPC::CR3UN) 4229348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR3; 4239348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (SrcReg >= PPC::CR4LT || SrcReg <= PPC::CR4UN) 4249348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR4; 4259348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (SrcReg >= PPC::CR5LT || SrcReg <= PPC::CR5UN) 4269348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR5; 4279348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (SrcReg >= PPC::CR6LT || SrcReg <= PPC::CR6UN) 4289348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR6; 4299348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (SrcReg >= PPC::CR7LT || SrcReg <= PPC::CR7UN) 4309348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR7; 4319348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 4324a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling return StoreRegToStackSlot(Reg, isKill, FrameIdx, 4339348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray PPC::CRRCRegisterClass, NewMIs); 4349348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 435f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::VRRCRegisterClass) { 436f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // We don't have indexed addressing for vector loads. Emit: 437f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // R0 = ADDI FI# 438f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // STVX VAL, 0, R0 439f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // 440f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: We use R0 here, because it isn't available for RA. 4414a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(addFrameReference(BuildMI(get(PPC::ADDI), PPC::R0), 442f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx, 0, 0)); 4434a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(BuildMI(get(PPC::STVX)) 444cb341de0e238f80dabf3da7b4f2aad58de6914bdChris Lattner .addReg(SrcReg, false, false, isKill).addReg(PPC::R0).addReg(PPC::R0)); 445f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 446f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson assert(0 && "Unknown regclass!"); 447f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson abort(); 448f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 4497194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 4507194aaf738a1b89441635340403f1c5b06ae18efBill Wendling return false; 451f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 452f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 453f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid 454f6372aa1cc568df19da7c5023e83c75aa9404a07Owen AndersonPPCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, 4557194aaf738a1b89441635340403f1c5b06ae18efBill Wendling MachineBasicBlock::iterator MI, 4567194aaf738a1b89441635340403f1c5b06ae18efBill Wendling unsigned SrcReg, bool isKill, int FrameIdx, 4577194aaf738a1b89441635340403f1c5b06ae18efBill Wendling const TargetRegisterClass *RC) const { 458f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVector<MachineInstr*, 4> NewMIs; 4597194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 4604a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling if (StoreRegToStackSlot(SrcReg, isKill, FrameIdx, RC, NewMIs)) { 4617194aaf738a1b89441635340403f1c5b06ae18efBill Wendling PPCFunctionInfo *FuncInfo = MBB.getParent()->getInfo<PPCFunctionInfo>(); 4627194aaf738a1b89441635340403f1c5b06ae18efBill Wendling FuncInfo->setSpillsCR(); 4637194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 4647194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 465f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) 466f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MBB.insert(MI, NewMIs[i]); 467f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 468f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 469f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid PPCInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, 4707194aaf738a1b89441635340403f1c5b06ae18efBill Wendling bool isKill, 4717194aaf738a1b89441635340403f1c5b06ae18efBill Wendling SmallVectorImpl<MachineOperand> &Addr, 4727194aaf738a1b89441635340403f1c5b06ae18efBill Wendling const TargetRegisterClass *RC, 4737194aaf738a1b89441635340403f1c5b06ae18efBill Wendling SmallVectorImpl<MachineInstr*> &NewMIs) const{ 474f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (Addr[0].isFrameIndex()) { 4754a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling if (StoreRegToStackSlot(SrcReg, isKill, Addr[0].getIndex(), RC, NewMIs)) { 4767194aaf738a1b89441635340403f1c5b06ae18efBill Wendling PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>(); 4777194aaf738a1b89441635340403f1c5b06ae18efBill Wendling FuncInfo->setSpillsCR(); 4787194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 4797194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 480f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson return; 481f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 482f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 483f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson unsigned Opc = 0; 484f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (RC == PPC::GPRCRegisterClass) { 485f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::STW; 486f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::G8RCRegisterClass) { 487f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::STD; 488f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F8RCRegisterClass) { 489f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::STFD; 490f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F4RCRegisterClass) { 491f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::STFS; 492f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::VRRCRegisterClass) { 493f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::STVX; 494f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 495f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson assert(0 && "Unknown regclass!"); 496f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson abort(); 497f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 498f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MachineInstrBuilder MIB = BuildMI(get(Opc)) 499f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson .addReg(SrcReg, false, false, isKill); 500f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson for (unsigned i = 0, e = Addr.size(); i != e; ++i) { 501f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MachineOperand &MO = Addr[i]; 502f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (MO.isRegister()) 503f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MIB.addReg(MO.getReg()); 504f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson else if (MO.isImmediate()) 505f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MIB.addImm(MO.getImm()); 506f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson else 507f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MIB.addFrameIndex(MO.getIndex()); 508f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 509f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson NewMIs.push_back(MIB); 510f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson return; 511f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 512f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 5134a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendlingvoid 5144a66e9a57e679b4f3243bf2061daf53c70102030Bill WendlingPPCInstrInfo::LoadRegFromStackSlot(unsigned DestReg, int FrameIdx, 5154a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling const TargetRegisterClass *RC, 5164a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling SmallVectorImpl<MachineInstr*> &NewMIs)const{ 517f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (RC == PPC::GPRCRegisterClass) { 518f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (DestReg != PPC::LR) { 5194a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(addFrameReference(BuildMI(get(PPC::LWZ), DestReg), 520f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 521f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 5224a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(addFrameReference(BuildMI(get(PPC::LWZ), PPC::R11), 523f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 5244a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(BuildMI(get(PPC::MTLR)).addReg(PPC::R11)); 525f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 526f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::G8RCRegisterClass) { 527f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (DestReg != PPC::LR8) { 5284a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(addFrameReference(BuildMI(get(PPC::LD), DestReg), 529f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 530f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 5314a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(addFrameReference(BuildMI(get(PPC::LD), PPC::R11), 532f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 5334a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(BuildMI(get(PPC::MTLR8)).addReg(PPC::R11)); 534f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 535f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F8RCRegisterClass) { 5364a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(addFrameReference(BuildMI(get(PPC::LFD), DestReg), 537f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 538f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F4RCRegisterClass) { 5394a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(addFrameReference(BuildMI(get(PPC::LFS), DestReg), 540f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 541f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::CRRCRegisterClass) { 542f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: We use R0 here, because it isn't available for RA. 5434a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(addFrameReference(BuildMI(get(PPC::LWZ), PPC::R0), 544f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 545f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 546f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // If the reloaded register isn't CR0, shift the bits right so that they are 547f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // in the right CR's slot. 548f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (DestReg != PPC::CR0) { 549f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson unsigned ShiftBits = PPCRegisterInfo::getRegisterNumbering(DestReg)*4; 550f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // rlwinm r11, r11, 32-ShiftBits, 0, 31. 5514a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(BuildMI(get(PPC::RLWINM), PPC::R0) 552f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson .addReg(PPC::R0).addImm(32-ShiftBits).addImm(0).addImm(31)); 553f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 554f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 5554a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(BuildMI(get(PPC::MTCRF), DestReg).addReg(PPC::R0)); 5560404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray } else if (RC == PPC::CRBITRCRegisterClass) { 5579348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 5589348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray unsigned Reg = 0; 5590404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray if (DestReg >= PPC::CR0LT || DestReg <= PPC::CR0UN) 5609348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR0; 5610404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray else if (DestReg >= PPC::CR1LT || DestReg <= PPC::CR1UN) 5629348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR1; 5639348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (DestReg >= PPC::CR2LT || DestReg <= PPC::CR2UN) 5649348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR2; 5659348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (DestReg >= PPC::CR3LT || DestReg <= PPC::CR3UN) 5669348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR3; 5679348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (DestReg >= PPC::CR4LT || DestReg <= PPC::CR4UN) 5689348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR4; 5699348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (DestReg >= PPC::CR5LT || DestReg <= PPC::CR5UN) 5709348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR5; 5719348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (DestReg >= PPC::CR6LT || DestReg <= PPC::CR6UN) 5729348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR6; 5739348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray else if (DestReg >= PPC::CR7LT || DestReg <= PPC::CR7UN) 5749348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR7; 5759348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 5764a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling return LoadRegFromStackSlot(Reg, FrameIdx, 5779348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray PPC::CRRCRegisterClass, NewMIs); 5789348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 579f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::VRRCRegisterClass) { 580f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // We don't have indexed addressing for vector loads. Emit: 581f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // R0 = ADDI FI# 582f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // Dest = LVX 0, R0 583f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // 584f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: We use R0 here, because it isn't available for RA. 5854a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(addFrameReference(BuildMI(get(PPC::ADDI), PPC::R0), 586f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx, 0, 0)); 5874a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling NewMIs.push_back(BuildMI(get(PPC::LVX),DestReg).addReg(PPC::R0) 588f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson .addReg(PPC::R0)); 589f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 590f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson assert(0 && "Unknown regclass!"); 591f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson abort(); 592f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 593f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 594f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 595f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid 596f6372aa1cc568df19da7c5023e83c75aa9404a07Owen AndersonPPCInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, 5977194aaf738a1b89441635340403f1c5b06ae18efBill Wendling MachineBasicBlock::iterator MI, 5987194aaf738a1b89441635340403f1c5b06ae18efBill Wendling unsigned DestReg, int FrameIdx, 5997194aaf738a1b89441635340403f1c5b06ae18efBill Wendling const TargetRegisterClass *RC) const { 600f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVector<MachineInstr*, 4> NewMIs; 6014a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling LoadRegFromStackSlot(DestReg, FrameIdx, RC, NewMIs); 602f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) 603f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MBB.insert(MI, NewMIs[i]); 604f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 605f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 606f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid PPCInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, 6077194aaf738a1b89441635340403f1c5b06ae18efBill Wendling SmallVectorImpl<MachineOperand> &Addr, 6087194aaf738a1b89441635340403f1c5b06ae18efBill Wendling const TargetRegisterClass *RC, 6097194aaf738a1b89441635340403f1c5b06ae18efBill Wendling SmallVectorImpl<MachineInstr*> &NewMIs)const{ 610f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (Addr[0].isFrameIndex()) { 6114a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling LoadRegFromStackSlot(DestReg, Addr[0].getIndex(), RC, NewMIs); 612f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson return; 613f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 614f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 615f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson unsigned Opc = 0; 616f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (RC == PPC::GPRCRegisterClass) { 617f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson assert(DestReg != PPC::LR && "Can't handle this yet!"); 618f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::LWZ; 619f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::G8RCRegisterClass) { 620f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson assert(DestReg != PPC::LR8 && "Can't handle this yet!"); 621f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::LD; 622f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F8RCRegisterClass) { 623f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::LFD; 624f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F4RCRegisterClass) { 625f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::LFS; 626f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::VRRCRegisterClass) { 627f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::LVX; 628f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 629f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson assert(0 && "Unknown regclass!"); 630f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson abort(); 631f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 632f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MachineInstrBuilder MIB = BuildMI(get(Opc), DestReg); 633f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson for (unsigned i = 0, e = Addr.size(); i != e; ++i) { 634f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MachineOperand &MO = Addr[i]; 635f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (MO.isRegister()) 636f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MIB.addReg(MO.getReg()); 637f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson else if (MO.isImmediate()) 638f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MIB.addImm(MO.getImm()); 639f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson else 640f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MIB.addFrameIndex(MO.getIndex()); 641f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 642f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson NewMIs.push_back(MIB); 643f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson return; 644f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 645f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 64643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson/// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into 64743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson/// copy instructions, turning them into load/store instructions. 6485fd79d0560570fed977788a86fa038b898564dfaEvan ChengMachineInstr *PPCInstrInfo::foldMemoryOperand(MachineFunction &MF, 6495fd79d0560570fed977788a86fa038b898564dfaEvan Cheng MachineInstr *MI, 65043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson SmallVectorImpl<unsigned> &Ops, 65143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson int FrameIndex) const { 65243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if (Ops.size() != 1) return NULL; 65343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 65443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson // Make sure this is a reg-reg copy. Note that we can't handle MCRF, because 65543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson // it takes more than one instruction to store it. 65643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned Opc = MI->getOpcode(); 65743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned OpNum = Ops[0]; 65843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 65943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson MachineInstr *NewMI = NULL; 66043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if ((Opc == PPC::OR && 66143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson MI->getOperand(1).getReg() == MI->getOperand(2).getReg())) { 66243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if (OpNum == 0) { // move -> store 66343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned InReg = MI->getOperand(1).getReg(); 66443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson NewMI = addFrameReference(BuildMI(get(PPC::STW)).addReg(InReg), 66543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson FrameIndex); 66643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else { // move -> load 66743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned OutReg = MI->getOperand(0).getReg(); 66843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson NewMI = addFrameReference(BuildMI(get(PPC::LWZ), OutReg), 66943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson FrameIndex); 67043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 67143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else if ((Opc == PPC::OR8 && 67243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson MI->getOperand(1).getReg() == MI->getOperand(2).getReg())) { 67343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if (OpNum == 0) { // move -> store 67443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned InReg = MI->getOperand(1).getReg(); 67543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson NewMI = addFrameReference(BuildMI(get(PPC::STD)).addReg(InReg), 67643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson FrameIndex); 67743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else { // move -> load 67843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned OutReg = MI->getOperand(0).getReg(); 67943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson NewMI = addFrameReference(BuildMI(get(PPC::LD), OutReg), FrameIndex); 68043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 68143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else if (Opc == PPC::FMRD) { 68243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if (OpNum == 0) { // move -> store 68343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned InReg = MI->getOperand(1).getReg(); 68443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson NewMI = addFrameReference(BuildMI(get(PPC::STFD)).addReg(InReg), 68543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson FrameIndex); 68643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else { // move -> load 68743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned OutReg = MI->getOperand(0).getReg(); 68843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson NewMI = addFrameReference(BuildMI(get(PPC::LFD), OutReg), FrameIndex); 68943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 69043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else if (Opc == PPC::FMRS) { 69143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if (OpNum == 0) { // move -> store 69243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned InReg = MI->getOperand(1).getReg(); 69343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson NewMI = addFrameReference(BuildMI(get(PPC::STFS)).addReg(InReg), 69443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson FrameIndex); 69543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else { // move -> load 69643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned OutReg = MI->getOperand(0).getReg(); 69743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson NewMI = addFrameReference(BuildMI(get(PPC::LFS), OutReg), FrameIndex); 69843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 69943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 70043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 70143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if (NewMI) 70243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson NewMI->copyKillDeadInfo(MI); 70343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return NewMI; 70443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson} 70543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 70643dbe05279b753aabda571d9c83eaeb36987001aOwen Andersonbool PPCInstrInfo::canFoldMemoryOperand(MachineInstr *MI, 7075fd79d0560570fed977788a86fa038b898564dfaEvan Cheng SmallVectorImpl<unsigned> &Ops) const { 70843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if (Ops.size() != 1) return false; 70943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 71043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson // Make sure this is a reg-reg copy. Note that we can't handle MCRF, because 71143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson // it takes more than one instruction to store it. 71243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned Opc = MI->getOpcode(); 71343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 71443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if ((Opc == PPC::OR && 71543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson MI->getOperand(1).getReg() == MI->getOperand(2).getReg())) 71643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return true; 71743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson else if ((Opc == PPC::OR8 && 71843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson MI->getOperand(1).getReg() == MI->getOperand(2).getReg())) 71943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return true; 72043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson else if (Opc == PPC::FMRD || Opc == PPC::FMRS) 72143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return true; 72243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 72343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return false; 72443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson} 72543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 726f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 727ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattnerbool PPCInstrInfo::BlockHasNoFallThrough(MachineBasicBlock &MBB) const { 728ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner if (MBB.empty()) return false; 729ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner 730ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner switch (MBB.back().getOpcode()) { 731126f17a17625876adb63f06d043fc1b1e4f0361cEvan Cheng case PPC::BLR: // Return. 732ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner case PPC::B: // Uncond branch. 733ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner case PPC::BCTR: // Indirect branch. 734ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner return true; 735ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner default: return false; 736ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner } 737ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner} 738ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner 739c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattnerbool PPCInstrInfo:: 740c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris LattnerReverseBranchCondition(std::vector<MachineOperand> &Cond) const { 7417c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner assert(Cond.size() == 2 && "Invalid PPC branch opcode!"); 7427c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner // Leave the CR# the same, but invert the condition. 74318258c640466274c26e89016e361ec411ff78520Chris Lattner Cond[0].setImm(PPC::InvertPredicate((PPC::Predicate)Cond[0].getImm())); 7447c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner return false; 745c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 74652e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray 74752e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// GetInstSize - Return the number of bytes of code the specified 74852e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// instruction may be. This returns the maximum number of bytes. 74952e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// 75052e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffrayunsigned PPCInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { 75152e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray switch (MI->getOpcode()) { 75252e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray case PPC::INLINEASM: { // Inline Asm: Variable size. 75352e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray const MachineFunction *MF = MI->getParent()->getParent(); 75452e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray const char *AsmStr = MI->getOperand(0).getSymbolName(); 75552e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray return MF->getTarget().getTargetAsmInfo()->getInlineAsmLength(AsmStr); 75652e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray } 75752e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray case PPC::LABEL: { 75852e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray return 0; 75952e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray } 76052e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray default: 76152e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray return 4; // PowerPC instructions are all 4 bytes 76252e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray } 76352e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray} 764