PPCInstrInfo.cpp revision 94b9550a32d189704a8eae55505edf62662c0534
121e463b2bf864671a87ebe386cb100ef9349a540Nate Begeman//===- PPCInstrInfo.cpp - PowerPC32 Instruction Information -----*- C++ -*-===// 2b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 3f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// The LLVM Compiler Infrastructure 4f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 64ee451de366474b9c228b4e5fa573795a715216dChris Lattner// License. See LICENSE.TXT for details. 7b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 8f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 9f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 10f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// This file contains the PowerPC implementation of the TargetInstrInfo class. 11f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 12f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 13f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 1416e71f2f70811c69c56052dd146324fe20e31db5Chris Lattner#include "PPCInstrInfo.h" 1559ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng#include "PPC.h" 16f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson#include "PPCInstrBuilder.h" 177194aaf738a1b89441635340403f1c5b06ae18efBill Wendling#include "PPCMachineFunctionInfo.h" 18b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner#include "PPCTargetMachine.h" 192da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick#include "PPCHazardRecognizers.h" 2094b9550a32d189704a8eae55505edf62662c0534Evan Cheng#include "MCTargetDesc/PPCPredicates.h" 217a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen#include "llvm/CodeGen/MachineFrameInfo.h" 22f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "llvm/CodeGen/MachineInstrBuilder.h" 237a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen#include "llvm/CodeGen/MachineMemOperand.h" 24243296690ec78fc918762bd73896b09e26537f47Jakob Stoklund Olesen#include "llvm/CodeGen/MachineRegisterInfo.h" 257a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen#include "llvm/CodeGen/PseudoSourceValue.h" 2659ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng#include "llvm/MC/MCAsmInfo.h" 2759ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng#include "llvm/Target/TargetRegistry.h" 28880d0f6018b6928bdcad291be60c801238619955Bill Wendling#include "llvm/Support/CommandLine.h" 29dac237e18209b697a8ba122d0ddd9cad4dfba1f8Torok Edwin#include "llvm/Support/ErrorHandling.h" 30dac237e18209b697a8ba122d0ddd9cad4dfba1f8Torok Edwin#include "llvm/Support/raw_ostream.h" 3159ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng#include "llvm/ADT/STLExtras.h" 32f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 334db3cffe94a5285239cc0056f939c6b74a5ca0b6Evan Cheng#define GET_INSTRINFO_CTOR 3422fee2dff4c43b551aefa44a96ca74fcade6bfacEvan Cheng#include "PPCGenInstrInfo.inc" 3522fee2dff4c43b551aefa44a96ca74fcade6bfacEvan Cheng 3682bcd236937b378e56e46bdde9c17a3ea3377068Dan Gohmannamespace llvm { 374a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendlingextern cl::opt<bool> EnablePPC32RS; // FIXME (64-bit): See PPCRegisterInfo.cpp. 384a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendlingextern cl::opt<bool> EnablePPC64RS; // FIXME (64-bit): See PPCRegisterInfo.cpp. 3982bcd236937b378e56e46bdde9c17a3ea3377068Dan Gohman} 4082bcd236937b378e56e46bdde9c17a3ea3377068Dan Gohman 4182bcd236937b378e56e46bdde9c17a3ea3377068Dan Gohmanusing namespace llvm; 42880d0f6018b6928bdcad291be60c801238619955Bill Wendling 43b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris LattnerPPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm) 444db3cffe94a5285239cc0056f939c6b74a5ca0b6Evan Cheng : PPCGenInstrInfo(PPC::ADJCALLSTACKDOWN, PPC::ADJCALLSTACKUP), 45d5b03f252c0db6b49a242abab63d7c5a260fceaeEvan Cheng TM(tm), RI(*TM.getSubtargetImpl(), *this) {} 46b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner 472da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick/// CreateTargetHazardRecognizer - Return the hazard recognizer to use for 482da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick/// this target when scheduling the DAG. 492da8bc8a5f7705ac131184cd247f48500da0d74eAndrew TrickScheduleHazardRecognizer *PPCInstrInfo::CreateTargetHazardRecognizer( 502da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick const TargetMachine *TM, 512da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick const ScheduleDAG *DAG) const { 522da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick // Should use subtarget info to pick the right hazard recognizer. For 532da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick // now, always return a PPC970 recognizer. 542da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick const TargetInstrInfo *TII = TM->getInstrInfo(); 552da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick assert(TII && "No InstrInfo?"); 562da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick return new PPCHazardRecognizer970(*TII); 572da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick} 582da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick 596e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trickunsigned PPCInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, 609c09c9ec9dab61450800b42cbf746164aa076b88Chris Lattner int &FrameIndex) const { 61408396014742a05cad1c91949d2226169e3f9d80Chris Lattner switch (MI->getOpcode()) { 62408396014742a05cad1c91949d2226169e3f9d80Chris Lattner default: break; 63408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LD: 64408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LWZ: 65408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LFS: 66408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LFD: 67d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && 68d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI->getOperand(2).isFI()) { 698aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FrameIndex = MI->getOperand(2).getIndex(); 70408396014742a05cad1c91949d2226169e3f9d80Chris Lattner return MI->getOperand(0).getReg(); 71408396014742a05cad1c91949d2226169e3f9d80Chris Lattner } 72408396014742a05cad1c91949d2226169e3f9d80Chris Lattner break; 73408396014742a05cad1c91949d2226169e3f9d80Chris Lattner } 74408396014742a05cad1c91949d2226169e3f9d80Chris Lattner return 0; 756524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner} 76408396014742a05cad1c91949d2226169e3f9d80Chris Lattner 776e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trickunsigned PPCInstrInfo::isStoreToStackSlot(const MachineInstr *MI, 786524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner int &FrameIndex) const { 796524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner switch (MI->getOpcode()) { 806524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner default: break; 813b478b31e297208ef2c9f74750a8a603eb3726fbNate Begeman case PPC::STD: 826524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STW: 836524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STFS: 846524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STFD: 85d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && 86d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI->getOperand(2).isFI()) { 878aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FrameIndex = MI->getOperand(2).getIndex(); 886524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner return MI->getOperand(0).getReg(); 896524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner } 906524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner break; 916524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner } 926524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner return 0; 936524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner} 94408396014742a05cad1c91949d2226169e3f9d80Chris Lattner 95043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner// commuteInstruction - We can commute rlwimi instructions, but only if the 96043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner// rotate amt is zero. We also have to munge the immediates a bit. 9758dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan ChengMachineInstr * 9858dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan ChengPPCInstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const { 998e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineFunction &MF = *MI->getParent()->getParent(); 1008e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 101043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Normal instructions can be commuted the obvious way. 102043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner if (MI->getOpcode() != PPC::RLWIMI) 10358dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng return TargetInstrInfoImpl::commuteInstruction(MI, NewMI); 1046e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 105043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Cannot commute if it has a non-zero rotate count. 1069a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner if (MI->getOperand(3).getImm() != 0) 107043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return 0; 1086e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 109043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // If we have a zero rotate count, we have: 110043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // M = mask(MB,ME) 111043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Op0 = (Op1 & ~M) | (Op2 & M) 112043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Change this to: 113043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // M = mask((ME+1)&31, (MB-1)&31) 114043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Op0 = (Op2 & ~M) | (Op1 & M) 115043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 116043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Swap op1/op2 117a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng unsigned Reg0 = MI->getOperand(0).getReg(); 118043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned Reg1 = MI->getOperand(1).getReg(); 119043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned Reg2 = MI->getOperand(2).getReg(); 1206ce7dc2a97260eea5fba414332796464912b9359Evan Cheng bool Reg1IsKill = MI->getOperand(1).isKill(); 1216ce7dc2a97260eea5fba414332796464912b9359Evan Cheng bool Reg2IsKill = MI->getOperand(2).isKill(); 12258dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng bool ChangeReg0 = false; 123a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // If machine instrs are no longer in two-address forms, update 124a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // destination register as well. 125a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng if (Reg0 == Reg1) { 126a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // Must be two address instruction! 127e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng assert(MI->getDesc().getOperandConstraint(0, MCOI::TIED_TO) && 128a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng "Expecting a two-address instruction!"); 129a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng Reg2IsKill = false; 13058dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng ChangeReg0 = true; 13158dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng } 13258dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 13358dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng // Masks. 13458dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned MB = MI->getOperand(4).getImm(); 13558dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned ME = MI->getOperand(5).getImm(); 13658dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 13758dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng if (NewMI) { 13858dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng // Create a new instruction. 13958dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned Reg0 = ChangeReg0 ? Reg2 : MI->getOperand(0).getReg(); 14058dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng bool Reg0IsDead = MI->getOperand(0).isDead(); 141d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling return BuildMI(MF, MI->getDebugLoc(), MI->getDesc()) 142587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead)) 143587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(Reg2, getKillRegState(Reg2IsKill)) 144587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(Reg1, getKillRegState(Reg1IsKill)) 14558dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng .addImm((ME+1) & 31) 14658dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng .addImm((MB-1) & 31); 147a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng } 14858dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 14958dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng if (ChangeReg0) 15058dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng MI->getOperand(0).setReg(Reg2); 151e53f4a055f74bded20d6129b4724ddd17fd199f6Chris Lattner MI->getOperand(2).setReg(Reg1); 152e53f4a055f74bded20d6129b4724ddd17fd199f6Chris Lattner MI->getOperand(1).setReg(Reg2); 153f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner MI->getOperand(2).setIsKill(Reg1IsKill); 154f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner MI->getOperand(1).setIsKill(Reg2IsKill); 1556e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 156043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Swap the mask around. 1579a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner MI->getOperand(4).setImm((ME+1) & 31); 1589a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner MI->getOperand(5).setImm((MB-1) & 31); 159043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return MI; 160043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner} 161bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner 1626e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trickvoid PPCInstrInfo::insertNoop(MachineBasicBlock &MBB, 163bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner MachineBasicBlock::iterator MI) const { 164c7f3ace20c325521c68335a1689645b43b06ddf0Chris Lattner DebugLoc DL; 165d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling BuildMI(MBB, MI, DL, get(PPC::NOP)); 166bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner} 167c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 168c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 169c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner// Branch analysis. 170c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattnerbool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, 171c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock *&FBB, 172dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng SmallVectorImpl<MachineOperand> &Cond, 173dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng bool AllowModify) const { 174c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If the block has no terminators, it just falls into the block after it. 175c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock::iterator I = MBB.end(); 17693d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen if (I == MBB.begin()) 17793d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen return false; 17893d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen --I; 17993d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen while (I->isDebugValue()) { 18093d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen if (I == MBB.begin()) 18193d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen return false; 18293d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen --I; 18393d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen } 18493d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen if (!isUnpredicatedTerminator(I)) 185c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 186c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 187c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Get the last instruction in the block. 188c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineInstr *LastInst = I; 1896e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 190c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If there is only one terminator instruction, process it. 191bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) { 192c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (LastInst->getOpcode() == PPC::B) { 19382ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!LastInst->getOperand(0).isMBB()) 19482ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 1958aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = LastInst->getOperand(0).getMBB(); 196c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 197289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner } else if (LastInst->getOpcode() == PPC::BCC) { 19882ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!LastInst->getOperand(2).isMBB()) 19982ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 200c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Block ends with fall-through condbranch. 2018aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = LastInst->getOperand(2).getMBB(); 202c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(LastInst->getOperand(0)); 203c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(LastInst->getOperand(1)); 2047c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner return false; 205c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 206c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Otherwise, don't know what this is. 207c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 208c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 2096e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 210c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Get the instruction before it if it's a terminator. 211c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineInstr *SecondLastInst = I; 212c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 213c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If there are three terminators, we don't know what sort of block this is. 214c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (SecondLastInst && I != MBB.begin() && 215bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng isUnpredicatedTerminator(--I)) 216c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 2176e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 218289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner // If the block ends with PPC::B and PPC:BCC, handle it. 2196e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick if (SecondLastInst->getOpcode() == PPC::BCC && 220c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner LastInst->getOpcode() == PPC::B) { 22182ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!SecondLastInst->getOperand(2).isMBB() || 22282ae933e55839713ea039e7c6353483b14dc5724Evan Cheng !LastInst->getOperand(0).isMBB()) 22382ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 2248aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = SecondLastInst->getOperand(2).getMBB(); 225c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(SecondLastInst->getOperand(0)); 226c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(SecondLastInst->getOperand(1)); 2278aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FBB = LastInst->getOperand(0).getMBB(); 228c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 229c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 2306e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 23113e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen // If the block ends with two PPC:Bs, handle it. The second one is not 23213e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen // executed, so remove it. 2336e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick if (SecondLastInst->getOpcode() == PPC::B && 23413e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen LastInst->getOpcode() == PPC::B) { 23582ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!SecondLastInst->getOperand(0).isMBB()) 23682ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 2378aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = SecondLastInst->getOperand(0).getMBB(); 23813e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen I = LastInst; 239dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng if (AllowModify) 240dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng I->eraseFromParent(); 24113e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen return false; 24213e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen } 24313e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen 244c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Otherwise, can't handle this. 245c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 246c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 247c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 248b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Chengunsigned PPCInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { 249c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock::iterator I = MBB.end(); 250b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng if (I == MBB.begin()) return 0; 251c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner --I; 25293d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen while (I->isDebugValue()) { 25393d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen if (I == MBB.begin()) 25493d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen return 0; 25593d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen --I; 25693d6a7e9c21204c52d6efec6c672163e7de79660Dale Johannesen } 257289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner if (I->getOpcode() != PPC::B && I->getOpcode() != PPC::BCC) 258b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 0; 2596e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 260c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Remove the branch. 261c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I->eraseFromParent(); 2626e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 263c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I = MBB.end(); 264c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 265b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng if (I == MBB.begin()) return 1; 266c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner --I; 267289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner if (I->getOpcode() != PPC::BCC) 268b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 1; 2696e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 270c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Remove the branch. 271c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I->eraseFromParent(); 272b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 2; 273c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 274c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 275b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Chengunsigned 276b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan ChengPPCInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 277b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng MachineBasicBlock *FBB, 2783bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings const SmallVectorImpl<MachineOperand> &Cond, 2793bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings DebugLoc DL) const { 2802dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner // Shouldn't be a fall through. 2812dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner assert(TBB && "InsertBranch must not be told to insert a fallthrough"); 2826e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick assert((Cond.size() == 2 || Cond.size() == 0) && 28354108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner "PPC branch conditions have two components!"); 2846e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 28554108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner // One-way branch. 2862dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner if (FBB == 0) { 28754108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner if (Cond.empty()) // Unconditional branch 2883bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings BuildMI(&MBB, DL, get(PPC::B)).addMBB(TBB); 28954108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner else // Conditional branch 2903bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings BuildMI(&MBB, DL, get(PPC::BCC)) 29118258c640466274c26e89016e361ec411ff78520Chris Lattner .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 292b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 1; 2932dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner } 2946e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 295879d09cf130f3760a08865913c04d9ff328fad5fChris Lattner // Two-way Conditional Branch. 2963bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings BuildMI(&MBB, DL, get(PPC::BCC)) 29718258c640466274c26e89016e361ec411ff78520Chris Lattner .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 2983bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings BuildMI(&MBB, DL, get(PPC::B)).addMBB(FBB); 299b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 2; 300c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 301c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 30227689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesenvoid PPCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, 30327689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen MachineBasicBlock::iterator I, DebugLoc DL, 30427689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen unsigned DestReg, unsigned SrcReg, 30527689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen bool KillSrc) const { 30627689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen unsigned Opc; 30727689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen if (PPC::GPRCRegClass.contains(DestReg, SrcReg)) 30827689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::OR; 30927689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::G8RCRegClass.contains(DestReg, SrcReg)) 31027689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::OR8; 31127689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::F4RCRegClass.contains(DestReg, SrcReg)) 31227689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::FMR; 31327689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::CRRCRegClass.contains(DestReg, SrcReg)) 31427689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::MCRF; 31527689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::VRRCRegClass.contains(DestReg, SrcReg)) 31627689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::VOR; 31727689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else if (PPC::CRBITRCRegClass.contains(DestReg, SrcReg)) 31827689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen Opc = PPC::CROR; 31927689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else 32027689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen llvm_unreachable("Impossible reg-to-reg copy"); 321d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson 322e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng const MCInstrDesc &MCID = get(Opc); 323e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng if (MCID.getNumOperands() == 3) 324e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng BuildMI(MBB, I, DL, MCID, DestReg) 32527689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen .addReg(SrcReg).addReg(SrcReg, getKillRegState(KillSrc)); 32627689b0affee8fb1bfbef11dcc84287b7757cfe8Jakob Stoklund Olesen else 327e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng BuildMI(MBB, I, DL, MCID, DestReg).addReg(SrcReg, getKillRegState(KillSrc)); 328d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson} 329d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson 3304a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendlingbool 3318e5f2c6f65841542e2a7092553fe42a00048e4c7Dan GohmanPPCInstrInfo::StoreRegToStackSlot(MachineFunction &MF, 3328e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman unsigned SrcReg, bool isKill, 3334a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling int FrameIdx, 3344a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling const TargetRegisterClass *RC, 3354a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling SmallVectorImpl<MachineInstr*> &NewMIs) const{ 336c7f3ace20c325521c68335a1689645b43b06ddf0Chris Lattner DebugLoc DL; 337f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (RC == PPC::GPRCRegisterClass) { 338f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (SrcReg != PPC::LR) { 33921b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STW)) 340587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 341587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 3424a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling FrameIdx)); 343f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 344f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: this spills LR immediately to memory in one step. To do this, 345f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // we use R11, which we know cannot be used in the prolog/epilog. This is 346f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // a hack. 34721b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::MFLR), PPC::R11)); 34821b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STW)) 349587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::R11, 350587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 3514a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling FrameIdx)); 352f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 353f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::G8RCRegisterClass) { 354f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (SrcReg != PPC::LR8) { 35521b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STD)) 356587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 357587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 358587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 359f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 360f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: this spills LR immediately to memory in one step. To do this, 361f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // we use R11, which we know cannot be used in the prolog/epilog. This is 362f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // a hack. 36321b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::MFLR8), PPC::X11)); 36421b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STD)) 365587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::X11, 366587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 367587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 368f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 369f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F8RCRegisterClass) { 37021b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STFD)) 371587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 372587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 373587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 374f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F4RCRegisterClass) { 37521b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STFS)) 376587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 377587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 378587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 379f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::CRRCRegisterClass) { 3804a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling if ((EnablePPC32RS && !TM.getSubtargetImpl()->isPPC64()) || 3814a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling (EnablePPC64RS && TM.getSubtargetImpl()->isPPC64())) { 3824a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling // FIXME (64-bit): Enable 38321b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::SPILL_CR)) 384587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 385587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 38671a2cb25ebc818383dd0f80475bc166f834e8d99Chris Lattner FrameIdx)); 3877194aaf738a1b89441635340403f1c5b06ae18efBill Wendling return true; 3887194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } else { 389c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // FIXME: We need a scatch reg here. The trouble with using R0 is that 390c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // it's possible for the stack frame to be so big the save location is 391c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // out of range of immediate offsets, necessitating another register. 392c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // We hack this on Darwin by reserving R2. It's probably broken on Linux 393c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // at the moment. 394c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen 395c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // We need to store the CR in the low 4-bits of the saved value. First, 396c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // issue a MFCR to save all of the CRBits. 3976e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick unsigned ScratchReg = TM.getSubtargetImpl()->isDarwinABI() ? 398c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen PPC::R2 : PPC::R0; 3995f07d5224ddc32f405d7e19de8e58e91ab2816bcDale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::MFCRpseud), ScratchReg) 4005f07d5224ddc32f405d7e19de8e58e91ab2816bcDale Johannesen .addReg(SrcReg, getKillRegState(isKill))); 4016e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 4027194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // If the saved register wasn't CR0, shift the bits left so that they are 4037194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // in CR0's slot. 4047194aaf738a1b89441635340403f1c5b06ae18efBill Wendling if (SrcReg != PPC::CR0) { 405966aeb5788c242cfaca35c56c0ddc0ff778d4376Evan Cheng unsigned ShiftBits = getPPCRegisterNumbering(SrcReg)*4; 406c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // rlwinm scratch, scratch, ShiftBits, 0, 31. 407c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::RLWINM), ScratchReg) 408c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen .addReg(ScratchReg).addImm(ShiftBits) 409c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen .addImm(0).addImm(31)); 4107194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 4116e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 41221b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STW)) 413c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen .addReg(ScratchReg, 414587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 4157194aaf738a1b89441635340403f1c5b06ae18efBill Wendling FrameIdx)); 4167194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 4170404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray } else if (RC == PPC::CRBITRCRegisterClass) { 4180404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // FIXME: We use CRi here because there is no mtcrf on a bit. Since the 4190404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // backend currently only uses CR1EQ as an individual bit, this should 4200404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // not cause any bug. If we need other uses of CR bits, the following 4210404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // code may be invalid. 4229348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray unsigned Reg = 0; 4236a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller if (SrcReg == PPC::CR0LT || SrcReg == PPC::CR0GT || 4246a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR0EQ || SrcReg == PPC::CR0UN) 4259348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR0; 4266a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR1LT || SrcReg == PPC::CR1GT || 4276a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR1EQ || SrcReg == PPC::CR1UN) 4289348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR1; 4296a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR2LT || SrcReg == PPC::CR2GT || 4306a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR2EQ || SrcReg == PPC::CR2UN) 4319348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR2; 4326a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR3LT || SrcReg == PPC::CR3GT || 4336a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR3EQ || SrcReg == PPC::CR3UN) 4349348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR3; 4356a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR4LT || SrcReg == PPC::CR4GT || 4366a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR4EQ || SrcReg == PPC::CR4UN) 4379348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR4; 4386a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR5LT || SrcReg == PPC::CR5GT || 4396a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR5EQ || SrcReg == PPC::CR5UN) 4409348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR5; 4416a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR6LT || SrcReg == PPC::CR6GT || 4426a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR6EQ || SrcReg == PPC::CR6UN) 4439348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR6; 4446a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR7LT || SrcReg == PPC::CR7GT || 4456a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR7EQ || SrcReg == PPC::CR7UN) 4469348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR7; 4479348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 4486e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick return StoreRegToStackSlot(MF, Reg, isKill, FrameIdx, 4499348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray PPC::CRRCRegisterClass, NewMIs); 4509348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 451f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::VRRCRegisterClass) { 452f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // We don't have indexed addressing for vector loads. Emit: 453f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // R0 = ADDI FI# 454f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // STVX VAL, 0, R0 4556e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick // 456f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: We use R0 here, because it isn't available for RA. 45721b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::ADDI), PPC::R0), 458f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx, 0, 0)); 45921b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::STVX)) 460587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, getKillRegState(isKill)) 461587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::R0) 462587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::R0)); 463f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 464c23197a26f34f559ea9797de51e187087c039c42Torok Edwin llvm_unreachable("Unknown regclass!"); 465f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 4667194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 4677194aaf738a1b89441635340403f1c5b06ae18efBill Wendling return false; 468f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 469f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 470f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid 471f6372aa1cc568df19da7c5023e83c75aa9404a07Owen AndersonPPCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, 4727194aaf738a1b89441635340403f1c5b06ae18efBill Wendling MachineBasicBlock::iterator MI, 4737194aaf738a1b89441635340403f1c5b06ae18efBill Wendling unsigned SrcReg, bool isKill, int FrameIdx, 474746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterClass *RC, 475746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterInfo *TRI) const { 4768e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineFunction &MF = *MBB.getParent(); 477f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVector<MachineInstr*, 4> NewMIs; 4787194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 4798e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman if (StoreRegToStackSlot(MF, SrcReg, isKill, FrameIdx, RC, NewMIs)) { 4808e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>(); 4817194aaf738a1b89441635340403f1c5b06ae18efBill Wendling FuncInfo->setSpillsCR(); 4827194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 4837194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 484f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) 485f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MBB.insert(MI, NewMIs[i]); 4867a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen 4877a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen const MachineFrameInfo &MFI = *MF.getFrameInfo(); 4887a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MachineMemOperand *MMO = 48959db5496f4fc2ef6111569e542f8b65480ef14c1Chris Lattner MF.getMachineMemOperand( 49059db5496f4fc2ef6111569e542f8b65480ef14c1Chris Lattner MachinePointerInfo(PseudoSourceValue::getFixedStack(FrameIdx)), 49159db5496f4fc2ef6111569e542f8b65480ef14c1Chris Lattner MachineMemOperand::MOStore, 4927a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MFI.getObjectSize(FrameIdx), 4937a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MFI.getObjectAlignment(FrameIdx)); 4947a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen NewMIs.back()->addMemOperand(MF, MMO); 495f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 496f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 4974a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendlingvoid 498d1c321a89ab999b9bb602b0f398ecd4c2022262cBill WendlingPPCInstrInfo::LoadRegFromStackSlot(MachineFunction &MF, DebugLoc DL, 4998e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman unsigned DestReg, int FrameIdx, 5004a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling const TargetRegisterClass *RC, 5014a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling SmallVectorImpl<MachineInstr*> &NewMIs)const{ 502f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (RC == PPC::GPRCRegisterClass) { 503f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (DestReg != PPC::LR) { 504d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LWZ), 505d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling DestReg), FrameIdx)); 506f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 507d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LWZ), 508d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling PPC::R11), FrameIdx)); 509d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(BuildMI(MF, DL, get(PPC::MTLR)).addReg(PPC::R11)); 510f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 511f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::G8RCRegisterClass) { 512f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (DestReg != PPC::LR8) { 513d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LD), DestReg), 514f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 515f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 516d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LD), 517d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling PPC::R11), FrameIdx)); 518d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(BuildMI(MF, DL, get(PPC::MTLR8)).addReg(PPC::R11)); 519f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 520f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F8RCRegisterClass) { 521d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LFD), DestReg), 522f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 523f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F4RCRegisterClass) { 524d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LFS), DestReg), 525f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 526f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::CRRCRegisterClass) { 527c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // FIXME: We need a scatch reg here. The trouble with using R0 is that 528c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // it's possible for the stack frame to be so big the save location is 529c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // out of range of immediate offsets, necessitating another register. 530c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // We hack this on Darwin by reserving R2. It's probably broken on Linux 531c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen // at the moment. 532c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen unsigned ScratchReg = TM.getSubtargetImpl()->isDarwinABI() ? 533c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen PPC::R2 : PPC::R0; 5346e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LWZ), 535c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen ScratchReg), FrameIdx)); 5366e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 537f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // If the reloaded register isn't CR0, shift the bits right so that they are 538f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // in the right CR's slot. 539f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (DestReg != PPC::CR0) { 540966aeb5788c242cfaca35c56c0ddc0ff778d4376Evan Cheng unsigned ShiftBits = getPPCRegisterNumbering(DestReg)*4; 541f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // rlwinm r11, r11, 32-ShiftBits, 0, 31. 542c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::RLWINM), ScratchReg) 543c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen .addReg(ScratchReg).addImm(32-ShiftBits).addImm(0) 544c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen .addImm(31)); 545f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 5466e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 547c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::MTCRF), DestReg) 548c12da8d30a1394847ee4608fcd54daa24b889b37Dale Johannesen .addReg(ScratchReg)); 5490404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray } else if (RC == PPC::CRBITRCRegisterClass) { 5506e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick 5519348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray unsigned Reg = 0; 5526a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller if (DestReg == PPC::CR0LT || DestReg == PPC::CR0GT || 5536a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR0EQ || DestReg == PPC::CR0UN) 5549348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR0; 5556a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR1LT || DestReg == PPC::CR1GT || 5566a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR1EQ || DestReg == PPC::CR1UN) 5579348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR1; 5586a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR2LT || DestReg == PPC::CR2GT || 5596a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR2EQ || DestReg == PPC::CR2UN) 5609348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR2; 5616a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR3LT || DestReg == PPC::CR3GT || 5626a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR3EQ || DestReg == PPC::CR3UN) 5639348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR3; 5646a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR4LT || DestReg == PPC::CR4GT || 5656a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR4EQ || DestReg == PPC::CR4UN) 5669348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR4; 5676a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR5LT || DestReg == PPC::CR5GT || 5686a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR5EQ || DestReg == PPC::CR5UN) 5699348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR5; 5706a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR6LT || DestReg == PPC::CR6GT || 5716a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR6EQ || DestReg == PPC::CR6UN) 5729348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR6; 5736a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR7LT || DestReg == PPC::CR7GT || 5746a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR7EQ || DestReg == PPC::CR7UN) 5759348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR7; 5769348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 5776e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick return LoadRegFromStackSlot(MF, DL, Reg, FrameIdx, 5789348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray PPC::CRRCRegisterClass, NewMIs); 5799348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 580f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::VRRCRegisterClass) { 581f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // We don't have indexed addressing for vector loads. Emit: 582f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // R0 = ADDI FI# 583f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // Dest = LVX 0, R0 5846e8f4c404825b79f9b9176483653f1aa927dfbdeAndrew Trick // 585f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: We use R0 here, because it isn't available for RA. 586d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::ADDI), PPC::R0), 587f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx, 0, 0)); 588d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(BuildMI(MF, DL, get(PPC::LVX),DestReg).addReg(PPC::R0) 589f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson .addReg(PPC::R0)); 590f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 591c23197a26f34f559ea9797de51e187087c039c42Torok Edwin llvm_unreachable("Unknown regclass!"); 592f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 593f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 594f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 595f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid 596f6372aa1cc568df19da7c5023e83c75aa9404a07Owen AndersonPPCInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, 5977194aaf738a1b89441635340403f1c5b06ae18efBill Wendling MachineBasicBlock::iterator MI, 5987194aaf738a1b89441635340403f1c5b06ae18efBill Wendling unsigned DestReg, int FrameIdx, 599746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterClass *RC, 600746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterInfo *TRI) const { 6018e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineFunction &MF = *MBB.getParent(); 602f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVector<MachineInstr*, 4> NewMIs; 603c7f3ace20c325521c68335a1689645b43b06ddf0Chris Lattner DebugLoc DL; 604d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling if (MI != MBB.end()) DL = MI->getDebugLoc(); 605d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling LoadRegFromStackSlot(MF, DL, DestReg, FrameIdx, RC, NewMIs); 606f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) 607f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MBB.insert(MI, NewMIs[i]); 6087a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen 6097a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen const MachineFrameInfo &MFI = *MF.getFrameInfo(); 6107a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MachineMemOperand *MMO = 61159db5496f4fc2ef6111569e542f8b65480ef14c1Chris Lattner MF.getMachineMemOperand( 61259db5496f4fc2ef6111569e542f8b65480ef14c1Chris Lattner MachinePointerInfo(PseudoSourceValue::getFixedStack(FrameIdx)), 61359db5496f4fc2ef6111569e542f8b65480ef14c1Chris Lattner MachineMemOperand::MOLoad, 6147a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MFI.getObjectSize(FrameIdx), 6157a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen MFI.getObjectAlignment(FrameIdx)); 6167a79fcb55b83b8b98b9853c390cc5bf8ce382dd3Jakob Stoklund Olesen NewMIs.back()->addMemOperand(MF, MMO); 617f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 618f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 6190965217e74fe07f1451350a80114ab566ced5de0Evan ChengMachineInstr* 6200965217e74fe07f1451350a80114ab566ced5de0Evan ChengPPCInstrInfo::emitFrameIndexDebugValue(MachineFunction &MF, 6218601a3d4decff0a380e059b037dabf71075497d3Evan Cheng int FrameIx, uint64_t Offset, 6220965217e74fe07f1451350a80114ab566ced5de0Evan Cheng const MDNode *MDPtr, 6230965217e74fe07f1451350a80114ab566ced5de0Evan Cheng DebugLoc DL) const { 6240965217e74fe07f1451350a80114ab566ced5de0Evan Cheng MachineInstrBuilder MIB = BuildMI(MF, DL, get(PPC::DBG_VALUE)); 6250965217e74fe07f1451350a80114ab566ced5de0Evan Cheng addFrameReference(MIB, FrameIx, 0, false).addImm(Offset).addMetadata(MDPtr); 6260965217e74fe07f1451350a80114ab566ced5de0Evan Cheng return &*MIB; 6270965217e74fe07f1451350a80114ab566ced5de0Evan Cheng} 6280965217e74fe07f1451350a80114ab566ced5de0Evan Cheng 629c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattnerbool PPCInstrInfo:: 63044eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen AndersonReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { 6317c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner assert(Cond.size() == 2 && "Invalid PPC branch opcode!"); 6327c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner // Leave the CR# the same, but invert the condition. 63318258c640466274c26e89016e361ec411ff78520Chris Lattner Cond[0].setImm(PPC::InvertPredicate((PPC::Predicate)Cond[0].getImm())); 6347c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner return false; 635c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 63652e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray 63752e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// GetInstSize - Return the number of bytes of code the specified 63852e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// instruction may be. This returns the maximum number of bytes. 63952e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// 64052e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffrayunsigned PPCInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { 64152e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray switch (MI->getOpcode()) { 64252e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray case PPC::INLINEASM: { // Inline Asm: Variable size. 64352e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray const MachineFunction *MF = MI->getParent()->getParent(); 64452e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray const char *AsmStr = MI->getOperand(0).getSymbolName(); 645af76e592c7f9deff0e55c13dbb4a34f07f1c7f64Chris Lattner return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo()); 64652e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray } 6477431beaba2a01c3fe299c861b2ec85cbf1dc81c4Bill Wendling case PPC::PROLOG_LABEL: 6484406604047423576e36657c7ede266ca42e79642Dan Gohman case PPC::EH_LABEL: 6494406604047423576e36657c7ede266ca42e79642Dan Gohman case PPC::GC_LABEL: 650375be7730a6f3dee7a6dc319ee6c355a11ac99adDale Johannesen case PPC::DBG_VALUE: 65152e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray return 0; 65252e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray default: 65352e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray return 4; // PowerPC instructions are all 4 bytes 65452e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray } 65552e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray} 656