PPCInstrInfo.cpp revision dac237e18209b697a8ba122d0ddd9cad4dfba1f8
121e463b2bf864671a87ebe386cb100ef9349a540Nate Begeman//===- PPCInstrInfo.cpp - PowerPC32 Instruction Information -----*- C++ -*-===// 2b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 3f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// The LLVM Compiler Infrastructure 4f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 64ee451de366474b9c228b4e5fa573795a715216dChris Lattner// License. See LICENSE.TXT for details. 7b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 8f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 9f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 10f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// This file contains the PowerPC implementation of the TargetInstrInfo class. 11f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 12f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 13f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 1416e71f2f70811c69c56052dd146324fe20e31db5Chris Lattner#include "PPCInstrInfo.h" 15f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson#include "PPCInstrBuilder.h" 167194aaf738a1b89441635340403f1c5b06ae18efBill Wendling#include "PPCMachineFunctionInfo.h" 17df4ed6350b2a51f71c0980e86c9078f4046ea706Chris Lattner#include "PPCPredicates.h" 184c7b43b43fdf943c7298718e15ab5d6dfe345be7Chris Lattner#include "PPCGenInstrInfo.inc" 19b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner#include "PPCTargetMachine.h" 20718cb665ca6ce2bc4d8e8479f46a45db91b49f86Owen Anderson#include "llvm/ADT/STLExtras.h" 21f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "llvm/CodeGen/MachineInstrBuilder.h" 22880d0f6018b6928bdcad291be60c801238619955Bill Wendling#include "llvm/Support/CommandLine.h" 23dac237e18209b697a8ba122d0ddd9cad4dfba1f8Torok Edwin#include "llvm/Support/ErrorHandling.h" 24dac237e18209b697a8ba122d0ddd9cad4dfba1f8Torok Edwin#include "llvm/Support/raw_ostream.h" 2552e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray#include "llvm/Target/TargetAsmInfo.h" 26f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmanusing namespace llvm; 27f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 284a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendlingextern cl::opt<bool> EnablePPC32RS; // FIXME (64-bit): See PPCRegisterInfo.cpp. 294a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendlingextern cl::opt<bool> EnablePPC64RS; // FIXME (64-bit): See PPCRegisterInfo.cpp. 30880d0f6018b6928bdcad291be60c801238619955Bill Wendling 31b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris LattnerPPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm) 32641055225092833197efe8e5bce01d50bcf1daaeChris Lattner : TargetInstrInfoImpl(PPCInsts, array_lengthof(PPCInsts)), TM(tm), 337ce45783531cfa81bfd7be561ea7e4738e8c6ca8Evan Cheng RI(*TM.getSubtargetImpl(), *this) {} 34b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner 3521e463b2bf864671a87ebe386cb100ef9349a540Nate Begemanbool PPCInstrInfo::isMoveInstr(const MachineInstr& MI, 3621e463b2bf864671a87ebe386cb100ef9349a540Nate Begeman unsigned& sourceReg, 3704ee5a1d9267e5e6fab8f088095fcb83c3c5cbd1Evan Cheng unsigned& destReg, 3804ee5a1d9267e5e6fab8f088095fcb83c3c5cbd1Evan Cheng unsigned& sourceSubIdx, 3904ee5a1d9267e5e6fab8f088095fcb83c3c5cbd1Evan Cheng unsigned& destSubIdx) const { 4004ee5a1d9267e5e6fab8f088095fcb83c3c5cbd1Evan Cheng sourceSubIdx = destSubIdx = 0; // No sub-registers. 4104ee5a1d9267e5e6fab8f088095fcb83c3c5cbd1Evan Cheng 42cc8cd0cbf12c12916d4b38ef0de5be5501c8270eChris Lattner unsigned oc = MI.getOpcode(); 43b410dc99774d52b4491750dab10b91cca1d661d8Chris Lattner if (oc == PPC::OR || oc == PPC::OR8 || oc == PPC::VOR || 4414c09b81ead8fe8b754fca2d0a8237cb810b37d6Chris Lattner oc == PPC::OR4To8 || oc == PPC::OR8To4) { // or r1, r2, r2 451e341729dd003ca33ecea4abf13134f20062c5f8Evan Cheng assert(MI.getNumOperands() >= 3 && 46d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(0).isReg() && 47d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(1).isReg() && 48d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(2).isReg() && 49f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman "invalid PPC OR instruction!"); 50f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (MI.getOperand(1).getReg() == MI.getOperand(2).getReg()) { 51f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman sourceReg = MI.getOperand(1).getReg(); 52f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman destReg = MI.getOperand(0).getReg(); 53f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return true; 54f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 55f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } else if (oc == PPC::ADDI) { // addi r1, r2, 0 561e341729dd003ca33ecea4abf13134f20062c5f8Evan Cheng assert(MI.getNumOperands() >= 3 && 57d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(0).isReg() && 58d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(2).isImm() && 59f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman "invalid PPC ADDI instruction!"); 60d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MI.getOperand(1).isReg() && MI.getOperand(2).getImm() == 0) { 61f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman sourceReg = MI.getOperand(1).getReg(); 62f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman destReg = MI.getOperand(0).getReg(); 63f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return true; 64f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 65cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman } else if (oc == PPC::ORI) { // ori r1, r2, 0 661e341729dd003ca33ecea4abf13134f20062c5f8Evan Cheng assert(MI.getNumOperands() >= 3 && 67d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(0).isReg() && 68d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(1).isReg() && 69d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(2).isImm() && 70cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman "invalid PPC ORI instruction!"); 719a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner if (MI.getOperand(2).getImm() == 0) { 72cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman sourceReg = MI.getOperand(1).getReg(); 73cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman destReg = MI.getOperand(0).getReg(); 74cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman return true; 75cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman } 76eb5d47d99db0d9e4fc11f136fbacbd507c71a4c2Chris Lattner } else if (oc == PPC::FMRS || oc == PPC::FMRD || 77eb5d47d99db0d9e4fc11f136fbacbd507c71a4c2Chris Lattner oc == PPC::FMRSD) { // fmr r1, r2 781e341729dd003ca33ecea4abf13134f20062c5f8Evan Cheng assert(MI.getNumOperands() >= 2 && 79d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(0).isReg() && 80d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(1).isReg() && 81f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman "invalid PPC FMR instruction"); 82f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman sourceReg = MI.getOperand(1).getReg(); 83f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman destReg = MI.getOperand(0).getReg(); 84f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return true; 857af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman } else if (oc == PPC::MCRF) { // mcrf cr1, cr2 861e341729dd003ca33ecea4abf13134f20062c5f8Evan Cheng assert(MI.getNumOperands() >= 2 && 87d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(0).isReg() && 88d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI.getOperand(1).isReg() && 897af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman "invalid PPC MCRF instruction"); 907af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman sourceReg = MI.getOperand(1).getReg(); 917af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman destReg = MI.getOperand(0).getReg(); 927af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman return true; 93f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 94f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return false; 95f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman} 96043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 97cbad42cfd1cc93a41ff26ea2e8895bfbc09f54f2Dan Gohmanunsigned PPCInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, 989c09c9ec9dab61450800b42cbf746164aa076b88Chris Lattner int &FrameIndex) const { 99408396014742a05cad1c91949d2226169e3f9d80Chris Lattner switch (MI->getOpcode()) { 100408396014742a05cad1c91949d2226169e3f9d80Chris Lattner default: break; 101408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LD: 102408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LWZ: 103408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LFS: 104408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LFD: 105d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && 106d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI->getOperand(2).isFI()) { 1078aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FrameIndex = MI->getOperand(2).getIndex(); 108408396014742a05cad1c91949d2226169e3f9d80Chris Lattner return MI->getOperand(0).getReg(); 109408396014742a05cad1c91949d2226169e3f9d80Chris Lattner } 110408396014742a05cad1c91949d2226169e3f9d80Chris Lattner break; 111408396014742a05cad1c91949d2226169e3f9d80Chris Lattner } 112408396014742a05cad1c91949d2226169e3f9d80Chris Lattner return 0; 1136524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner} 114408396014742a05cad1c91949d2226169e3f9d80Chris Lattner 115cbad42cfd1cc93a41ff26ea2e8895bfbc09f54f2Dan Gohmanunsigned PPCInstrInfo::isStoreToStackSlot(const MachineInstr *MI, 1166524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner int &FrameIndex) const { 1176524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner switch (MI->getOpcode()) { 1186524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner default: break; 1193b478b31e297208ef2c9f74750a8a603eb3726fbNate Begeman case PPC::STD: 1206524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STW: 1216524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STFS: 1226524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STFD: 123d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && 124d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI->getOperand(2).isFI()) { 1258aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FrameIndex = MI->getOperand(2).getIndex(); 1266524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner return MI->getOperand(0).getReg(); 1276524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner } 1286524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner break; 1296524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner } 1306524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner return 0; 1316524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner} 132408396014742a05cad1c91949d2226169e3f9d80Chris Lattner 133043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner// commuteInstruction - We can commute rlwimi instructions, but only if the 134043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner// rotate amt is zero. We also have to munge the immediates a bit. 13558dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan ChengMachineInstr * 13658dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan ChengPPCInstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const { 1378e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineFunction &MF = *MI->getParent()->getParent(); 1388e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 139043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Normal instructions can be commuted the obvious way. 140043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner if (MI->getOpcode() != PPC::RLWIMI) 14158dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng return TargetInstrInfoImpl::commuteInstruction(MI, NewMI); 142043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 143043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Cannot commute if it has a non-zero rotate count. 1449a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner if (MI->getOperand(3).getImm() != 0) 145043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return 0; 146043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 147043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // If we have a zero rotate count, we have: 148043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // M = mask(MB,ME) 149043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Op0 = (Op1 & ~M) | (Op2 & M) 150043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Change this to: 151043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // M = mask((ME+1)&31, (MB-1)&31) 152043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Op0 = (Op2 & ~M) | (Op1 & M) 153043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 154043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Swap op1/op2 155a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng unsigned Reg0 = MI->getOperand(0).getReg(); 156043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned Reg1 = MI->getOperand(1).getReg(); 157043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned Reg2 = MI->getOperand(2).getReg(); 1586ce7dc2a97260eea5fba414332796464912b9359Evan Cheng bool Reg1IsKill = MI->getOperand(1).isKill(); 1596ce7dc2a97260eea5fba414332796464912b9359Evan Cheng bool Reg2IsKill = MI->getOperand(2).isKill(); 16058dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng bool ChangeReg0 = false; 161a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // If machine instrs are no longer in two-address forms, update 162a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // destination register as well. 163a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng if (Reg0 == Reg1) { 164a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng // Must be two address instruction! 165a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng assert(MI->getDesc().getOperandConstraint(0, TOI::TIED_TO) && 166a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng "Expecting a two-address instruction!"); 167a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng Reg2IsKill = false; 16858dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng ChangeReg0 = true; 16958dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng } 17058dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 17158dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng // Masks. 17258dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned MB = MI->getOperand(4).getImm(); 17358dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned ME = MI->getOperand(5).getImm(); 17458dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 17558dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng if (NewMI) { 17658dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng // Create a new instruction. 17758dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng unsigned Reg0 = ChangeReg0 ? Reg2 : MI->getOperand(0).getReg(); 17858dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng bool Reg0IsDead = MI->getOperand(0).isDead(); 179d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling return BuildMI(MF, MI->getDebugLoc(), MI->getDesc()) 180587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead)) 181587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(Reg2, getKillRegState(Reg2IsKill)) 182587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(Reg1, getKillRegState(Reg1IsKill)) 18358dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng .addImm((ME+1) & 31) 18458dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng .addImm((MB-1) & 31); 185a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng } 18658dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 18758dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng if (ChangeReg0) 18858dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng MI->getOperand(0).setReg(Reg2); 189e53f4a055f74bded20d6129b4724ddd17fd199f6Chris Lattner MI->getOperand(2).setReg(Reg1); 190e53f4a055f74bded20d6129b4724ddd17fd199f6Chris Lattner MI->getOperand(1).setReg(Reg2); 191f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner MI->getOperand(2).setIsKill(Reg1IsKill); 192f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner MI->getOperand(1).setIsKill(Reg2IsKill); 193043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 194043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Swap the mask around. 1959a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner MI->getOperand(4).setImm((ME+1) & 31); 1969a1ceaedc282f0cae31f2723f4d6c00c7b88fe90Chris Lattner MI->getOperand(5).setImm((MB-1) & 31); 197043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return MI; 198043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner} 199bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner 200bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattnervoid PPCInstrInfo::insertNoop(MachineBasicBlock &MBB, 201bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner MachineBasicBlock::iterator MI) const { 202d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling DebugLoc DL = DebugLoc::getUnknownLoc(); 203d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling if (MI != MBB.end()) DL = MI->getDebugLoc(); 204d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling 205d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling BuildMI(MBB, MI, DL, get(PPC::NOP)); 206bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner} 207c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 208c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 209c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner// Branch analysis. 210c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattnerbool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, 211c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock *&FBB, 212dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng SmallVectorImpl<MachineOperand> &Cond, 213dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng bool AllowModify) const { 214c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If the block has no terminators, it just falls into the block after it. 215c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock::iterator I = MBB.end(); 216bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) 217c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 218c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 219c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Get the last instruction in the block. 220c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineInstr *LastInst = I; 221c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 222c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If there is only one terminator instruction, process it. 223bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) { 224c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (LastInst->getOpcode() == PPC::B) { 22582ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!LastInst->getOperand(0).isMBB()) 22682ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 2278aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = LastInst->getOperand(0).getMBB(); 228c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 229289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner } else if (LastInst->getOpcode() == PPC::BCC) { 23082ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!LastInst->getOperand(2).isMBB()) 23182ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 232c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Block ends with fall-through condbranch. 2338aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = LastInst->getOperand(2).getMBB(); 234c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(LastInst->getOperand(0)); 235c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(LastInst->getOperand(1)); 2367c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner return false; 237c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 238c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Otherwise, don't know what this is. 239c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 240c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 241c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 242c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Get the instruction before it if it's a terminator. 243c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineInstr *SecondLastInst = I; 244c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 245c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If there are three terminators, we don't know what sort of block this is. 246c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (SecondLastInst && I != MBB.begin() && 247bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng isUnpredicatedTerminator(--I)) 248c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 249c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 250289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner // If the block ends with PPC::B and PPC:BCC, handle it. 251289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner if (SecondLastInst->getOpcode() == PPC::BCC && 252c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner LastInst->getOpcode() == PPC::B) { 25382ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!SecondLastInst->getOperand(2).isMBB() || 25482ae933e55839713ea039e7c6353483b14dc5724Evan Cheng !LastInst->getOperand(0).isMBB()) 25582ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 2568aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = SecondLastInst->getOperand(2).getMBB(); 257c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(SecondLastInst->getOperand(0)); 258c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(SecondLastInst->getOperand(1)); 2598aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner FBB = LastInst->getOperand(0).getMBB(); 260c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 261c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 262c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 26313e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen // If the block ends with two PPC:Bs, handle it. The second one is not 26413e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen // executed, so remove it. 26513e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen if (SecondLastInst->getOpcode() == PPC::B && 26613e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen LastInst->getOpcode() == PPC::B) { 26782ae933e55839713ea039e7c6353483b14dc5724Evan Cheng if (!SecondLastInst->getOperand(0).isMBB()) 26882ae933e55839713ea039e7c6353483b14dc5724Evan Cheng return true; 2698aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner TBB = SecondLastInst->getOperand(0).getMBB(); 27013e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen I = LastInst; 271dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng if (AllowModify) 272dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng I->eraseFromParent(); 27313e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen return false; 27413e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen } 27513e8b51e3ec014c5d7ae83afdf3b8fd29c3a461dDale Johannesen 276c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Otherwise, can't handle this. 277c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 278c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 279c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 280b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Chengunsigned PPCInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { 281c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock::iterator I = MBB.end(); 282b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng if (I == MBB.begin()) return 0; 283c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner --I; 284289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner if (I->getOpcode() != PPC::B && I->getOpcode() != PPC::BCC) 285b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 0; 286c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 287c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Remove the branch. 288c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I->eraseFromParent(); 289c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 290c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I = MBB.end(); 291c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 292b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng if (I == MBB.begin()) return 1; 293c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner --I; 294289c2d5f4566d8d7722e3934f4763d3df92886f3Chris Lattner if (I->getOpcode() != PPC::BCC) 295b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 1; 296c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 297c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Remove the branch. 298c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I->eraseFromParent(); 299b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 2; 300c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 301c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 302b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Chengunsigned 303b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan ChengPPCInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 304b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng MachineBasicBlock *FBB, 30544eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen Anderson const SmallVectorImpl<MachineOperand> &Cond) const { 306536a2f1f8467a17f6d145bd83f25faae1f689839Dale Johannesen // FIXME this should probably have a DebugLoc argument 307536a2f1f8467a17f6d145bd83f25faae1f689839Dale Johannesen DebugLoc dl = DebugLoc::getUnknownLoc(); 3082dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner // Shouldn't be a fall through. 3092dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner assert(TBB && "InsertBranch must not be told to insert a fallthrough"); 31054108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner assert((Cond.size() == 2 || Cond.size() == 0) && 31154108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner "PPC branch conditions have two components!"); 3122dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner 31354108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner // One-way branch. 3142dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner if (FBB == 0) { 31554108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner if (Cond.empty()) // Unconditional branch 316536a2f1f8467a17f6d145bd83f25faae1f689839Dale Johannesen BuildMI(&MBB, dl, get(PPC::B)).addMBB(TBB); 31754108068b71a7dbc48f4ebf1b2d7d87ca541070aChris Lattner else // Conditional branch 318536a2f1f8467a17f6d145bd83f25faae1f689839Dale Johannesen BuildMI(&MBB, dl, get(PPC::BCC)) 31918258c640466274c26e89016e361ec411ff78520Chris Lattner .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 320b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 1; 3212dc7723474c54efcbcac6265dad0a7271902f1a5Chris Lattner } 322c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 323879d09cf130f3760a08865913c04d9ff328fad5fChris Lattner // Two-way Conditional Branch. 324536a2f1f8467a17f6d145bd83f25faae1f689839Dale Johannesen BuildMI(&MBB, dl, get(PPC::BCC)) 32518258c640466274c26e89016e361ec411ff78520Chris Lattner .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 326536a2f1f8467a17f6d145bd83f25faae1f689839Dale Johannesen BuildMI(&MBB, dl, get(PPC::B)).addMBB(FBB); 327b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 2; 328c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 329c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 330940f83e772ca2007d62faffc83094bd7e8da6401Owen Andersonbool PPCInstrInfo::copyRegToReg(MachineBasicBlock &MBB, 331d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson MachineBasicBlock::iterator MI, 332d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson unsigned DestReg, unsigned SrcReg, 333d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson const TargetRegisterClass *DestRC, 334d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson const TargetRegisterClass *SrcRC) const { 335d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson if (DestRC != SrcRC) { 336940f83e772ca2007d62faffc83094bd7e8da6401Owen Anderson // Not yet supported! 337940f83e772ca2007d62faffc83094bd7e8da6401Owen Anderson return false; 338d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } 339d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson 340d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling DebugLoc DL = DebugLoc::getUnknownLoc(); 341d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling if (MI != MBB.end()) DL = MI->getDebugLoc(); 342d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling 343d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson if (DestRC == PPC::GPRCRegisterClass) { 344d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling BuildMI(MBB, MI, DL, get(PPC::OR), DestReg).addReg(SrcReg).addReg(SrcReg); 345d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } else if (DestRC == PPC::G8RCRegisterClass) { 346d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling BuildMI(MBB, MI, DL, get(PPC::OR8), DestReg).addReg(SrcReg).addReg(SrcReg); 347d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } else if (DestRC == PPC::F4RCRegisterClass) { 348d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling BuildMI(MBB, MI, DL, get(PPC::FMRS), DestReg).addReg(SrcReg); 349d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } else if (DestRC == PPC::F8RCRegisterClass) { 350d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling BuildMI(MBB, MI, DL, get(PPC::FMRD), DestReg).addReg(SrcReg); 351d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } else if (DestRC == PPC::CRRCRegisterClass) { 352d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling BuildMI(MBB, MI, DL, get(PPC::MCRF), DestReg).addReg(SrcReg); 353d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } else if (DestRC == PPC::VRRCRegisterClass) { 354d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling BuildMI(MBB, MI, DL, get(PPC::VOR), DestReg).addReg(SrcReg).addReg(SrcReg); 3550404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray } else if (DestRC == PPC::CRBITRCRegisterClass) { 356d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling BuildMI(MBB, MI, DL, get(PPC::CROR), DestReg).addReg(SrcReg).addReg(SrcReg); 357d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } else { 358940f83e772ca2007d62faffc83094bd7e8da6401Owen Anderson // Attempt to copy register that is not GPR or FPR 359940f83e772ca2007d62faffc83094bd7e8da6401Owen Anderson return false; 360d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } 361940f83e772ca2007d62faffc83094bd7e8da6401Owen Anderson 362940f83e772ca2007d62faffc83094bd7e8da6401Owen Anderson return true; 363d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson} 364d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson 3654a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendlingbool 3668e5f2c6f65841542e2a7092553fe42a00048e4c7Dan GohmanPPCInstrInfo::StoreRegToStackSlot(MachineFunction &MF, 3678e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman unsigned SrcReg, bool isKill, 3684a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling int FrameIdx, 3694a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling const TargetRegisterClass *RC, 3704a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling SmallVectorImpl<MachineInstr*> &NewMIs) const{ 37121b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen DebugLoc DL = DebugLoc::getUnknownLoc(); 372f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (RC == PPC::GPRCRegisterClass) { 373f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (SrcReg != PPC::LR) { 37421b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STW)) 375587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 376587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 3774a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling FrameIdx)); 378f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 379f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: this spills LR immediately to memory in one step. To do this, 380f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // we use R11, which we know cannot be used in the prolog/epilog. This is 381f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // a hack. 38221b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::MFLR), PPC::R11)); 38321b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STW)) 384587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::R11, 385587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 3864a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling FrameIdx)); 387f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 388f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::G8RCRegisterClass) { 389f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (SrcReg != PPC::LR8) { 39021b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STD)) 391587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 392587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 393587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 394f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 395f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: this spills LR immediately to memory in one step. To do this, 396f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // we use R11, which we know cannot be used in the prolog/epilog. This is 397f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // a hack. 39821b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::MFLR8), PPC::X11)); 39921b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STD)) 400587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::X11, 401587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 402587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 403f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 404f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F8RCRegisterClass) { 40521b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STFD)) 406587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 407587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 408587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 409f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F4RCRegisterClass) { 41021b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STFS)) 411587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 412587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 413587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling FrameIdx)); 414f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::CRRCRegisterClass) { 4154a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling if ((EnablePPC32RS && !TM.getSubtargetImpl()->isPPC64()) || 4164a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling (EnablePPC64RS && TM.getSubtargetImpl()->isPPC64())) { 4174a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling // FIXME (64-bit): Enable 41821b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::SPILL_CR)) 419587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, 420587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 42171a2cb25ebc818383dd0f80475bc166f834e8d99Chris Lattner FrameIdx)); 4227194aaf738a1b89441635340403f1c5b06ae18efBill Wendling return true; 4237194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } else { 4247194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // FIXME: We use R0 here, because it isn't available for RA. We need to 4257194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // store the CR in the low 4-bits of the saved value. First, issue a MFCR 4267194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // to save all of the CRBits. 42721b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::MFCR), PPC::R0)); 428f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 4297194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // If the saved register wasn't CR0, shift the bits left so that they are 4307194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // in CR0's slot. 4317194aaf738a1b89441635340403f1c5b06ae18efBill Wendling if (SrcReg != PPC::CR0) { 4327194aaf738a1b89441635340403f1c5b06ae18efBill Wendling unsigned ShiftBits = PPCRegisterInfo::getRegisterNumbering(SrcReg)*4; 4337194aaf738a1b89441635340403f1c5b06ae18efBill Wendling // rlwinm r0, r0, ShiftBits, 0, 31. 43421b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::RLWINM), PPC::R0) 435cb341de0e238f80dabf3da7b4f2aad58de6914bdChris Lattner .addReg(PPC::R0).addImm(ShiftBits).addImm(0).addImm(31)); 4367194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 437f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 43821b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STW)) 439587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::R0, 440587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling getKillRegState(isKill)), 4417194aaf738a1b89441635340403f1c5b06ae18efBill Wendling FrameIdx)); 4427194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 4430404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray } else if (RC == PPC::CRBITRCRegisterClass) { 4440404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // FIXME: We use CRi here because there is no mtcrf on a bit. Since the 4450404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // backend currently only uses CR1EQ as an individual bit, this should 4460404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // not cause any bug. If we need other uses of CR bits, the following 4470404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray // code may be invalid. 4489348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray unsigned Reg = 0; 4496a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller if (SrcReg == PPC::CR0LT || SrcReg == PPC::CR0GT || 4506a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR0EQ || SrcReg == PPC::CR0UN) 4519348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR0; 4526a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR1LT || SrcReg == PPC::CR1GT || 4536a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR1EQ || SrcReg == PPC::CR1UN) 4549348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR1; 4556a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR2LT || SrcReg == PPC::CR2GT || 4566a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR2EQ || SrcReg == PPC::CR2UN) 4579348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR2; 4586a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR3LT || SrcReg == PPC::CR3GT || 4596a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR3EQ || SrcReg == PPC::CR3UN) 4609348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR3; 4616a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR4LT || SrcReg == PPC::CR4GT || 4626a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR4EQ || SrcReg == PPC::CR4UN) 4639348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR4; 4646a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR5LT || SrcReg == PPC::CR5GT || 4656a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR5EQ || SrcReg == PPC::CR5UN) 4669348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR5; 4676a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR6LT || SrcReg == PPC::CR6GT || 4686a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR6EQ || SrcReg == PPC::CR6UN) 4699348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR6; 4706a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (SrcReg == PPC::CR7LT || SrcReg == PPC::CR7GT || 4716a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller SrcReg == PPC::CR7EQ || SrcReg == PPC::CR7UN) 4729348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR7; 4739348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 4748e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman return StoreRegToStackSlot(MF, Reg, isKill, FrameIdx, 4759348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray PPC::CRRCRegisterClass, NewMIs); 4769348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 477f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::VRRCRegisterClass) { 478f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // We don't have indexed addressing for vector loads. Emit: 479f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // R0 = ADDI FI# 480f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // STVX VAL, 0, R0 481f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // 482f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: We use R0 here, because it isn't available for RA. 48321b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::ADDI), PPC::R0), 484f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx, 0, 0)); 48521b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen NewMIs.push_back(BuildMI(MF, DL, get(PPC::STVX)) 486587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, getKillRegState(isKill)) 487587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::R0) 488587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(PPC::R0)); 489f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 490dac237e18209b697a8ba122d0ddd9cad4dfba1f8Torok Edwin LLVM_UNREACHABLE("Unknown regclass!"); 491f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 4927194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 4937194aaf738a1b89441635340403f1c5b06ae18efBill Wendling return false; 494f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 495f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 496f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid 497f6372aa1cc568df19da7c5023e83c75aa9404a07Owen AndersonPPCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, 4987194aaf738a1b89441635340403f1c5b06ae18efBill Wendling MachineBasicBlock::iterator MI, 4997194aaf738a1b89441635340403f1c5b06ae18efBill Wendling unsigned SrcReg, bool isKill, int FrameIdx, 5007194aaf738a1b89441635340403f1c5b06ae18efBill Wendling const TargetRegisterClass *RC) const { 5018e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineFunction &MF = *MBB.getParent(); 502f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVector<MachineInstr*, 4> NewMIs; 5037194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 5048e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman if (StoreRegToStackSlot(MF, SrcReg, isKill, FrameIdx, RC, NewMIs)) { 5058e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>(); 5067194aaf738a1b89441635340403f1c5b06ae18efBill Wendling FuncInfo->setSpillsCR(); 5077194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 5087194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 509f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) 510f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MBB.insert(MI, NewMIs[i]); 511f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 512f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 513f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid PPCInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, 5147194aaf738a1b89441635340403f1c5b06ae18efBill Wendling bool isKill, 5157194aaf738a1b89441635340403f1c5b06ae18efBill Wendling SmallVectorImpl<MachineOperand> &Addr, 5167194aaf738a1b89441635340403f1c5b06ae18efBill Wendling const TargetRegisterClass *RC, 5177194aaf738a1b89441635340403f1c5b06ae18efBill Wendling SmallVectorImpl<MachineInstr*> &NewMIs) const{ 518d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (Addr[0].isFI()) { 5198e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman if (StoreRegToStackSlot(MF, SrcReg, isKill, 5208e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman Addr[0].getIndex(), RC, NewMIs)) { 5217194aaf738a1b89441635340403f1c5b06ae18efBill Wendling PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>(); 5227194aaf738a1b89441635340403f1c5b06ae18efBill Wendling FuncInfo->setSpillsCR(); 5237194aaf738a1b89441635340403f1c5b06ae18efBill Wendling } 5247194aaf738a1b89441635340403f1c5b06ae18efBill Wendling 525f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson return; 526f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 527f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 52821b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen DebugLoc DL = DebugLoc::getUnknownLoc(); 529f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson unsigned Opc = 0; 530f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (RC == PPC::GPRCRegisterClass) { 531f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::STW; 532f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::G8RCRegisterClass) { 533f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::STD; 534f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F8RCRegisterClass) { 535f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::STFD; 536f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F4RCRegisterClass) { 537f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::STFS; 538f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::VRRCRegisterClass) { 539f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::STVX; 540f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 541dac237e18209b697a8ba122d0ddd9cad4dfba1f8Torok Edwin LLVM_UNREACHABLE("Unknown regclass!"); 542f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 54321b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc)) 544587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(SrcReg, getKillRegState(isKill)); 54597357614b5957cc167c261d3be54713802715d9aDan Gohman for (unsigned i = 0, e = Addr.size(); i != e; ++i) 54697357614b5957cc167c261d3be54713802715d9aDan Gohman MIB.addOperand(Addr[i]); 547f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson NewMIs.push_back(MIB); 548f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson return; 549f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 550f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 5514a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendlingvoid 552d1c321a89ab999b9bb602b0f398ecd4c2022262cBill WendlingPPCInstrInfo::LoadRegFromStackSlot(MachineFunction &MF, DebugLoc DL, 5538e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman unsigned DestReg, int FrameIdx, 5544a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling const TargetRegisterClass *RC, 5554a66e9a57e679b4f3243bf2061daf53c70102030Bill Wendling SmallVectorImpl<MachineInstr*> &NewMIs)const{ 556f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (RC == PPC::GPRCRegisterClass) { 557f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (DestReg != PPC::LR) { 558d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LWZ), 559d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling DestReg), FrameIdx)); 560f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 561d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LWZ), 562d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling PPC::R11), FrameIdx)); 563d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(BuildMI(MF, DL, get(PPC::MTLR)).addReg(PPC::R11)); 564f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 565f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::G8RCRegisterClass) { 566f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (DestReg != PPC::LR8) { 567d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LD), DestReg), 568f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 569f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 570d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LD), 571d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling PPC::R11), FrameIdx)); 572d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(BuildMI(MF, DL, get(PPC::MTLR8)).addReg(PPC::R11)); 573f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 574f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F8RCRegisterClass) { 575d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LFD), DestReg), 576f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 577f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F4RCRegisterClass) { 578d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LFS), DestReg), 579f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 580f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::CRRCRegisterClass) { 581f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: We use R0 here, because it isn't available for RA. 582d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LWZ), PPC::R0), 583f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx)); 584f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 585f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // If the reloaded register isn't CR0, shift the bits right so that they are 586f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // in the right CR's slot. 587f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (DestReg != PPC::CR0) { 588f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson unsigned ShiftBits = PPCRegisterInfo::getRegisterNumbering(DestReg)*4; 589f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // rlwinm r11, r11, 32-ShiftBits, 0, 31. 590d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(BuildMI(MF, DL, get(PPC::RLWINM), PPC::R0) 591f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson .addReg(PPC::R0).addImm(32-ShiftBits).addImm(0).addImm(31)); 592f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 593f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 594d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(BuildMI(MF, DL, get(PPC::MTCRF), DestReg).addReg(PPC::R0)); 5950404cd97e4f6ebfe4f8057d4e21119d77654dff2Nicolas Geoffray } else if (RC == PPC::CRBITRCRegisterClass) { 5969348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 5979348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray unsigned Reg = 0; 5986a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller if (DestReg == PPC::CR0LT || DestReg == PPC::CR0GT || 5996a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR0EQ || DestReg == PPC::CR0UN) 6009348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR0; 6016a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR1LT || DestReg == PPC::CR1GT || 6026a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR1EQ || DestReg == PPC::CR1UN) 6039348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR1; 6046a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR2LT || DestReg == PPC::CR2GT || 6056a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR2EQ || DestReg == PPC::CR2UN) 6069348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR2; 6076a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR3LT || DestReg == PPC::CR3GT || 6086a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR3EQ || DestReg == PPC::CR3UN) 6099348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR3; 6106a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR4LT || DestReg == PPC::CR4GT || 6116a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR4EQ || DestReg == PPC::CR4UN) 6129348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR4; 6136a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR5LT || DestReg == PPC::CR5GT || 6146a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR5EQ || DestReg == PPC::CR5UN) 6159348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR5; 6166a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR6LT || DestReg == PPC::CR6GT || 6176a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR6EQ || DestReg == PPC::CR6UN) 6189348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR6; 6196a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller else if (DestReg == PPC::CR7LT || DestReg == PPC::CR7GT || 6206a3a1ba97e996bfdc061f9a51bd4cf4915962913Tilmann Scheller DestReg == PPC::CR7EQ || DestReg == PPC::CR7UN) 6219348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray Reg = PPC::CR7; 6229348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 623d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling return LoadRegFromStackSlot(MF, DL, Reg, FrameIdx, 6249348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray PPC::CRRCRegisterClass, NewMIs); 6259348c69dcfe1aa1e7f92752a18222dcfbcd96214Nicolas Geoffray 626f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::VRRCRegisterClass) { 627f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // We don't have indexed addressing for vector loads. Emit: 628f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // R0 = ADDI FI# 629f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // Dest = LVX 0, R0 630f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // 631f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson // FIXME: We use R0 here, because it isn't available for RA. 632d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::ADDI), PPC::R0), 633f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson FrameIdx, 0, 0)); 634d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMIs.push_back(BuildMI(MF, DL, get(PPC::LVX),DestReg).addReg(PPC::R0) 635f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson .addReg(PPC::R0)); 636f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 637dac237e18209b697a8ba122d0ddd9cad4dfba1f8Torok Edwin LLVM_UNREACHABLE("Unknown regclass!"); 638f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 639f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 640f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 641f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid 642f6372aa1cc568df19da7c5023e83c75aa9404a07Owen AndersonPPCInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, 6437194aaf738a1b89441635340403f1c5b06ae18efBill Wendling MachineBasicBlock::iterator MI, 6447194aaf738a1b89441635340403f1c5b06ae18efBill Wendling unsigned DestReg, int FrameIdx, 6457194aaf738a1b89441635340403f1c5b06ae18efBill Wendling const TargetRegisterClass *RC) const { 6468e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineFunction &MF = *MBB.getParent(); 647f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVector<MachineInstr*, 4> NewMIs; 648d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling DebugLoc DL = DebugLoc::getUnknownLoc(); 649d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling if (MI != MBB.end()) DL = MI->getDebugLoc(); 650d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling LoadRegFromStackSlot(MF, DL, DestReg, FrameIdx, RC, NewMIs); 651f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) 652f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MBB.insert(MI, NewMIs[i]); 653f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 654f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 655f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersonvoid PPCInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, 6567194aaf738a1b89441635340403f1c5b06ae18efBill Wendling SmallVectorImpl<MachineOperand> &Addr, 6577194aaf738a1b89441635340403f1c5b06ae18efBill Wendling const TargetRegisterClass *RC, 6587194aaf738a1b89441635340403f1c5b06ae18efBill Wendling SmallVectorImpl<MachineInstr*> &NewMIs)const{ 659d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (Addr[0].isFI()) { 660d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling LoadRegFromStackSlot(MF, DebugLoc::getUnknownLoc(), 661d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling DestReg, Addr[0].getIndex(), RC, NewMIs); 662f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson return; 663f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 664f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 665f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson unsigned Opc = 0; 666f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson if (RC == PPC::GPRCRegisterClass) { 667f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson assert(DestReg != PPC::LR && "Can't handle this yet!"); 668f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::LWZ; 669f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::G8RCRegisterClass) { 670f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson assert(DestReg != PPC::LR8 && "Can't handle this yet!"); 671f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::LD; 672f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F8RCRegisterClass) { 673f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::LFD; 674f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::F4RCRegisterClass) { 675f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::LFS; 676f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else if (RC == PPC::VRRCRegisterClass) { 677f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson Opc = PPC::LVX; 678f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } else { 679dac237e18209b697a8ba122d0ddd9cad4dfba1f8Torok Edwin LLVM_UNREACHABLE("Unknown regclass!"); 680f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 68121b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen DebugLoc DL = DebugLoc::getUnknownLoc(); 68221b5541814d57d0a31f353948e4e933dbb1af6a4Dale Johannesen MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg); 68397357614b5957cc167c261d3be54713802715d9aDan Gohman for (unsigned i = 0, e = Addr.size(); i != e; ++i) 68497357614b5957cc167c261d3be54713802715d9aDan Gohman MIB.addOperand(Addr[i]); 685f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson NewMIs.push_back(MIB); 686f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson return; 687f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson} 688f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 68943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson/// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into 69043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson/// copy instructions, turning them into load/store instructions. 691c54baa2d43730f1804acfb4f4e738fba72f966bdDan GohmanMachineInstr *PPCInstrInfo::foldMemoryOperandImpl(MachineFunction &MF, 692c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman MachineInstr *MI, 693c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman const SmallVectorImpl<unsigned> &Ops, 694c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman int FrameIndex) const { 69543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if (Ops.size() != 1) return NULL; 69643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 69743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson // Make sure this is a reg-reg copy. Note that we can't handle MCRF, because 69843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson // it takes more than one instruction to store it. 69943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned Opc = MI->getOpcode(); 70043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned OpNum = Ops[0]; 70143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 70243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson MachineInstr *NewMI = NULL; 70343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if ((Opc == PPC::OR && 70443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson MI->getOperand(1).getReg() == MI->getOperand(2).getReg())) { 70543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if (OpNum == 0) { // move -> store 70643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned InReg = MI->getOperand(1).getReg(); 7079f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng bool isKill = MI->getOperand(1).isKill(); 7082578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng bool isUndef = MI->getOperand(1).isUndef(); 709d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMI = addFrameReference(BuildMI(MF, MI->getDebugLoc(), get(PPC::STW)) 7102578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng .addReg(InReg, 7112578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng getKillRegState(isKill) | 7122578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng getUndefRegState(isUndef)), 71343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson FrameIndex); 71443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else { // move -> load 71543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned OutReg = MI->getOperand(0).getReg(); 7169f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng bool isDead = MI->getOperand(0).isDead(); 7172578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng bool isUndef = MI->getOperand(0).isUndef(); 718d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMI = addFrameReference(BuildMI(MF, MI->getDebugLoc(), get(PPC::LWZ)) 719587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(OutReg, 720587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling RegState::Define | 7212578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng getDeadRegState(isDead) | 7222578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng getUndefRegState(isUndef)), 72343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson FrameIndex); 72443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 72543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else if ((Opc == PPC::OR8 && 72643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson MI->getOperand(1).getReg() == MI->getOperand(2).getReg())) { 72743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if (OpNum == 0) { // move -> store 72843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned InReg = MI->getOperand(1).getReg(); 7299f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng bool isKill = MI->getOperand(1).isKill(); 7302578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng bool isUndef = MI->getOperand(1).isUndef(); 731d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMI = addFrameReference(BuildMI(MF, MI->getDebugLoc(), get(PPC::STD)) 7322578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng .addReg(InReg, 7332578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng getKillRegState(isKill) | 7342578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng getUndefRegState(isUndef)), 73543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson FrameIndex); 73643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else { // move -> load 73743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned OutReg = MI->getOperand(0).getReg(); 7389f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng bool isDead = MI->getOperand(0).isDead(); 7392578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng bool isUndef = MI->getOperand(0).isUndef(); 740d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMI = addFrameReference(BuildMI(MF, MI->getDebugLoc(), get(PPC::LD)) 741587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(OutReg, 742587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling RegState::Define | 7432578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng getDeadRegState(isDead) | 7442578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng getUndefRegState(isUndef)), 7459f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng FrameIndex); 74643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 74743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else if (Opc == PPC::FMRD) { 74843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if (OpNum == 0) { // move -> store 74943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned InReg = MI->getOperand(1).getReg(); 7509f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng bool isKill = MI->getOperand(1).isKill(); 7512578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng bool isUndef = MI->getOperand(1).isUndef(); 752d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMI = addFrameReference(BuildMI(MF, MI->getDebugLoc(), get(PPC::STFD)) 7532578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng .addReg(InReg, 7542578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng getKillRegState(isKill) | 7552578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng getUndefRegState(isUndef)), 75643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson FrameIndex); 75743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else { // move -> load 75843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned OutReg = MI->getOperand(0).getReg(); 7599f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng bool isDead = MI->getOperand(0).isDead(); 7602578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng bool isUndef = MI->getOperand(0).isUndef(); 761d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMI = addFrameReference(BuildMI(MF, MI->getDebugLoc(), get(PPC::LFD)) 762587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(OutReg, 763587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling RegState::Define | 7642578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng getDeadRegState(isDead) | 7652578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng getUndefRegState(isUndef)), 7669f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng FrameIndex); 76743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 76843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else if (Opc == PPC::FMRS) { 76943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if (OpNum == 0) { // move -> store 77043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned InReg = MI->getOperand(1).getReg(); 7719f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng bool isKill = MI->getOperand(1).isKill(); 7722578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng bool isUndef = MI->getOperand(1).isUndef(); 773d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMI = addFrameReference(BuildMI(MF, MI->getDebugLoc(), get(PPC::STFS)) 7742578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng .addReg(InReg, 7752578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng getKillRegState(isKill) | 7762578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng getUndefRegState(isUndef)), 77743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson FrameIndex); 77843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } else { // move -> load 77943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned OutReg = MI->getOperand(0).getReg(); 7809f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng bool isDead = MI->getOperand(0).isDead(); 7812578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng bool isUndef = MI->getOperand(0).isUndef(); 782d1c321a89ab999b9bb602b0f398ecd4c2022262cBill Wendling NewMI = addFrameReference(BuildMI(MF, MI->getDebugLoc(), get(PPC::LFS)) 783587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling .addReg(OutReg, 784587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4Bill Wendling RegState::Define | 7852578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng getDeadRegState(isDead) | 7862578ba26e72e36dde64be0f52a2788480aad3378Evan Cheng getUndefRegState(isUndef)), 7879f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng FrameIndex); 78843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 78943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 79043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 79143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return NewMI; 79243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson} 79343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 7948e8b8a223c2b0e69f44c0639f846260c8011668fDan Gohmanbool PPCInstrInfo::canFoldMemoryOperand(const MachineInstr *MI, 7958e8b8a223c2b0e69f44c0639f846260c8011668fDan Gohman const SmallVectorImpl<unsigned> &Ops) const { 79643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if (Ops.size() != 1) return false; 79743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 79843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson // Make sure this is a reg-reg copy. Note that we can't handle MCRF, because 79943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson // it takes more than one instruction to store it. 80043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned Opc = MI->getOpcode(); 80143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 80243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson if ((Opc == PPC::OR && 80343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson MI->getOperand(1).getReg() == MI->getOperand(2).getReg())) 80443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return true; 80543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson else if ((Opc == PPC::OR8 && 80643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson MI->getOperand(1).getReg() == MI->getOperand(2).getReg())) 80743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return true; 80843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson else if (Opc == PPC::FMRD || Opc == PPC::FMRS) 80943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return true; 81043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 81143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return false; 81243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson} 81343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 814f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 8158e8b8a223c2b0e69f44c0639f846260c8011668fDan Gohmanbool PPCInstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const { 816ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner if (MBB.empty()) return false; 817ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner 818ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner switch (MBB.back().getOpcode()) { 819126f17a17625876adb63f06d043fc1b1e4f0361cEvan Cheng case PPC::BLR: // Return. 820ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner case PPC::B: // Uncond branch. 821ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner case PPC::BCTR: // Indirect branch. 822ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner return true; 823ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner default: return false; 824ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner } 825ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner} 826ef13982aa7f3e57e82cd48370e79033dff0da295Chris Lattner 827c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattnerbool PPCInstrInfo:: 82844eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen AndersonReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { 8297c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner assert(Cond.size() == 2 && "Invalid PPC branch opcode!"); 8307c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner // Leave the CR# the same, but invert the condition. 83118258c640466274c26e89016e361ec411ff78520Chris Lattner Cond[0].setImm(PPC::InvertPredicate((PPC::Predicate)Cond[0].getImm())); 8327c4fe259f8bfeae542cfef25c1f1e9b1ff25a39bChris Lattner return false; 833c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 83452e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray 83552e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// GetInstSize - Return the number of bytes of code the specified 83652e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// instruction may be. This returns the maximum number of bytes. 83752e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray/// 83852e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffrayunsigned PPCInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { 83952e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray switch (MI->getOpcode()) { 84052e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray case PPC::INLINEASM: { // Inline Asm: Variable size. 84152e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray const MachineFunction *MF = MI->getParent()->getParent(); 84252e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray const char *AsmStr = MI->getOperand(0).getSymbolName(); 84352e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray return MF->getTarget().getTargetAsmInfo()->getInlineAsmLength(AsmStr); 84452e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray } 8454406604047423576e36657c7ede266ca42e79642Dan Gohman case PPC::DBG_LABEL: 8464406604047423576e36657c7ede266ca42e79642Dan Gohman case PPC::EH_LABEL: 8474406604047423576e36657c7ede266ca42e79642Dan Gohman case PPC::GC_LABEL: 84852e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray return 0; 84952e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray default: 85052e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray return 4; // PowerPC instructions are all 4 bytes 85152e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray } 85252e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray} 853