PPCInstrInfo.cpp revision cb90de37a720b0b00d6303b49b8df6d5ac5f34f9
1//===- PPC32InstrInfo.cpp - PowerPC32 Instruction Information ---*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains the PowerPC implementation of the TargetInstrInfo class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "PPC32InstrInfo.h" 15#include "PPC32GenInstrInfo.inc" 16#include "PowerPC.h" 17#include "llvm/CodeGen/MachineInstrBuilder.h" 18#include <iostream> 19using namespace llvm; 20 21PPC32InstrInfo::PPC32InstrInfo() 22 : TargetInstrInfo(PPC32Insts, sizeof(PPC32Insts)/sizeof(PPC32Insts[0])) {} 23 24bool PPC32InstrInfo::isMoveInstr(const MachineInstr& MI, 25 unsigned& sourceReg, 26 unsigned& destReg) const { 27 MachineOpCode oc = MI.getOpcode(); 28 if (oc == PPC::OR) { // or r1, r2, r2 29 assert(MI.getNumOperands() == 3 && 30 MI.getOperand(0).isRegister() && 31 MI.getOperand(1).isRegister() && 32 MI.getOperand(2).isRegister() && 33 "invalid PPC OR instruction!"); 34 if (MI.getOperand(1).getReg() == MI.getOperand(2).getReg()) { 35 sourceReg = MI.getOperand(1).getReg(); 36 destReg = MI.getOperand(0).getReg(); 37 return true; 38 } 39 } else if (oc == PPC::ADDI) { // addi r1, r2, 0 40 assert(MI.getNumOperands() == 3 && 41 MI.getOperand(0).isRegister() && 42 MI.getOperand(2).isImmediate() && 43 "invalid PPC ADDI instruction!"); 44 if (MI.getOperand(1).isRegister() && MI.getOperand(2).getImmedValue()==0) { 45 sourceReg = MI.getOperand(1).getReg(); 46 destReg = MI.getOperand(0).getReg(); 47 return true; 48 } 49 } else if (oc == PPC::ORI) { // ori r1, r2, 0 50 assert(MI.getNumOperands() == 3 && 51 MI.getOperand(0).isRegister() && 52 MI.getOperand(1).isRegister() && 53 MI.getOperand(2).isImmediate() && 54 "invalid PPC ORI instruction!"); 55 if (MI.getOperand(2).getImmedValue()==0) { 56 sourceReg = MI.getOperand(1).getReg(); 57 destReg = MI.getOperand(0).getReg(); 58 return true; 59 } 60 } else if (oc == PPC::FMR) { // fmr r1, r2 61 assert(MI.getNumOperands() == 2 && 62 MI.getOperand(0).isRegister() && 63 MI.getOperand(1).isRegister() && 64 "invalid PPC FMR instruction"); 65 sourceReg = MI.getOperand(1).getReg(); 66 destReg = MI.getOperand(0).getReg(); 67 return true; 68 } 69 return false; 70} 71