1//===-- PPCTargetMachine.h - Define TargetMachine for PowerPC ---*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file declares the PowerPC specific subclass of TargetMachine. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef PPC_TARGETMACHINE_H 15#define PPC_TARGETMACHINE_H 16 17#include "PPCFrameLowering.h" 18#include "PPCSubtarget.h" 19#include "PPCJITInfo.h" 20#include "PPCInstrInfo.h" 21#include "PPCISelLowering.h" 22#include "PPCSelectionDAGInfo.h" 23#include "llvm/Target/TargetMachine.h" 24#include "llvm/Target/TargetData.h" 25 26namespace llvm { 27 28/// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets. 29/// 30class PPCTargetMachine : public LLVMTargetMachine { 31 PPCSubtarget Subtarget; 32 const TargetData DataLayout; // Calculates type size & alignment 33 PPCInstrInfo InstrInfo; 34 PPCFrameLowering FrameLowering; 35 PPCJITInfo JITInfo; 36 PPCTargetLowering TLInfo; 37 PPCSelectionDAGInfo TSInfo; 38 InstrItineraryData InstrItins; 39 40public: 41 PPCTargetMachine(const Target &T, StringRef TT, 42 StringRef CPU, StringRef FS, const TargetOptions &Options, 43 Reloc::Model RM, CodeModel::Model CM, 44 CodeGenOpt::Level OL, bool is64Bit); 45 46 virtual const PPCInstrInfo *getInstrInfo() const { return &InstrInfo; } 47 virtual const PPCFrameLowering *getFrameLowering() const { 48 return &FrameLowering; 49 } 50 virtual PPCJITInfo *getJITInfo() { return &JITInfo; } 51 virtual const PPCTargetLowering *getTargetLowering() const { 52 return &TLInfo; 53 } 54 virtual const PPCSelectionDAGInfo* getSelectionDAGInfo() const { 55 return &TSInfo; 56 } 57 virtual const PPCRegisterInfo *getRegisterInfo() const { 58 return &InstrInfo.getRegisterInfo(); 59 } 60 61 virtual const TargetData *getTargetData() const { return &DataLayout; } 62 virtual const PPCSubtarget *getSubtargetImpl() const { return &Subtarget; } 63 virtual const InstrItineraryData *getInstrItineraryData() const { 64 return &InstrItins; 65 } 66 67 // Pass Pipeline Configuration 68 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM); 69 virtual bool addCodeEmitter(PassManagerBase &PM, 70 JITCodeEmitter &JCE); 71}; 72 73/// PPC32TargetMachine - PowerPC 32-bit target machine. 74/// 75class PPC32TargetMachine : public PPCTargetMachine { 76 virtual void anchor(); 77public: 78 PPC32TargetMachine(const Target &T, StringRef TT, 79 StringRef CPU, StringRef FS, const TargetOptions &Options, 80 Reloc::Model RM, CodeModel::Model CM, 81 CodeGenOpt::Level OL); 82}; 83 84/// PPC64TargetMachine - PowerPC 64-bit target machine. 85/// 86class PPC64TargetMachine : public PPCTargetMachine { 87 virtual void anchor(); 88public: 89 PPC64TargetMachine(const Target &T, StringRef TT, 90 StringRef CPU, StringRef FS, const TargetOptions &Options, 91 Reloc::Model RM, CodeModel::Model CM, 92 CodeGenOpt::Level OL); 93}; 94 95} // end namespace llvm 96 97#endif 98