CodeGenTarget.cpp revision 01dcecc214918b29cf3712420457fef309eeaad6
1//===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This class wraps target description classes used by the various code 11// generation TableGen backends. This makes it easier to access the data and 12// provides a single place that needs to check it for validity. All of these 13// classes throw exceptions on error conditions. 14// 15//===----------------------------------------------------------------------===// 16 17#include "CodeGenTarget.h" 18#include "CodeGenIntrinsics.h" 19#include "Record.h" 20#include "llvm/ADT/StringExtras.h" 21#include "llvm/Support/CommandLine.h" 22#include <algorithm> 23using namespace llvm; 24 25static cl::opt<unsigned> 26AsmParserNum("asmparsernum", cl::init(0), 27 cl::desc("Make -gen-asm-parser emit assembly parser #N")); 28 29static cl::opt<unsigned> 30AsmWriterNum("asmwriternum", cl::init(0), 31 cl::desc("Make -gen-asm-writer emit assembly writer #N")); 32 33/// getValueType - Return the MVT::SimpleValueType that the specified TableGen 34/// record corresponds to. 35MVT::SimpleValueType llvm::getValueType(Record *Rec) { 36 return (MVT::SimpleValueType)Rec->getValueAsInt("Value"); 37} 38 39std::string llvm::getName(MVT::SimpleValueType T) { 40 switch (T) { 41 case MVT::Other: return "UNKNOWN"; 42 case MVT::iPTR: return "TLI.getPointerTy()"; 43 case MVT::iPTRAny: return "TLI.getPointerTy()"; 44 default: return getEnumName(T); 45 } 46} 47 48std::string llvm::getEnumName(MVT::SimpleValueType T) { 49 switch (T) { 50 case MVT::Other: return "MVT::Other"; 51 case MVT::i1: return "MVT::i1"; 52 case MVT::i8: return "MVT::i8"; 53 case MVT::i16: return "MVT::i16"; 54 case MVT::i32: return "MVT::i32"; 55 case MVT::i64: return "MVT::i64"; 56 case MVT::i128: return "MVT::i128"; 57 case MVT::iAny: return "MVT::iAny"; 58 case MVT::fAny: return "MVT::fAny"; 59 case MVT::vAny: return "MVT::vAny"; 60 case MVT::f32: return "MVT::f32"; 61 case MVT::f64: return "MVT::f64"; 62 case MVT::f80: return "MVT::f80"; 63 case MVT::f128: return "MVT::f128"; 64 case MVT::ppcf128: return "MVT::ppcf128"; 65 case MVT::Flag: return "MVT::Flag"; 66 case MVT::isVoid:return "MVT::isVoid"; 67 case MVT::v2i8: return "MVT::v2i8"; 68 case MVT::v4i8: return "MVT::v4i8"; 69 case MVT::v8i8: return "MVT::v8i8"; 70 case MVT::v16i8: return "MVT::v16i8"; 71 case MVT::v32i8: return "MVT::v32i8"; 72 case MVT::v2i16: return "MVT::v2i16"; 73 case MVT::v4i16: return "MVT::v4i16"; 74 case MVT::v8i16: return "MVT::v8i16"; 75 case MVT::v16i16: return "MVT::v16i16"; 76 case MVT::v2i32: return "MVT::v2i32"; 77 case MVT::v4i32: return "MVT::v4i32"; 78 case MVT::v8i32: return "MVT::v8i32"; 79 case MVT::v1i64: return "MVT::v1i64"; 80 case MVT::v2i64: return "MVT::v2i64"; 81 case MVT::v4i64: return "MVT::v4i64"; 82 case MVT::v2f32: return "MVT::v2f32"; 83 case MVT::v4f32: return "MVT::v4f32"; 84 case MVT::v8f32: return "MVT::v8f32"; 85 case MVT::v2f64: return "MVT::v2f64"; 86 case MVT::v4f64: return "MVT::v4f64"; 87 case MVT::Metadata: return "MVT::Metadata"; 88 case MVT::iPTR: return "MVT::iPTR"; 89 case MVT::iPTRAny: return "MVT::iPTRAny"; 90 default: assert(0 && "ILLEGAL VALUE TYPE!"); return ""; 91 } 92} 93 94/// getQualifiedName - Return the name of the specified record, with a 95/// namespace qualifier if the record contains one. 96/// 97std::string llvm::getQualifiedName(const Record *R) { 98 std::string Namespace = R->getValueAsString("Namespace"); 99 if (Namespace.empty()) return R->getName(); 100 return Namespace + "::" + R->getName(); 101} 102 103 104 105 106/// getTarget - Return the current instance of the Target class. 107/// 108CodeGenTarget::CodeGenTarget() { 109 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target"); 110 if (Targets.size() == 0) 111 throw std::string("ERROR: No 'Target' subclasses defined!"); 112 if (Targets.size() != 1) 113 throw std::string("ERROR: Multiple subclasses of Target defined!"); 114 TargetRec = Targets[0]; 115} 116 117 118const std::string &CodeGenTarget::getName() const { 119 return TargetRec->getName(); 120} 121 122std::string CodeGenTarget::getInstNamespace() const { 123 std::string InstNS; 124 125 for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) { 126 InstNS = i->second.Namespace; 127 128 // Make sure not to pick up "TargetInstrInfo" by accidentally getting 129 // the namespace off the PHI instruction or something. 130 if (InstNS != "TargetInstrInfo") 131 break; 132 } 133 134 return InstNS; 135} 136 137Record *CodeGenTarget::getInstructionSet() const { 138 return TargetRec->getValueAsDef("InstructionSet"); 139} 140 141 142CodeGenInstruction &CodeGenTarget::getInstruction(const Record *InstRec) const { 143 return getInstruction(InstRec->getName()); 144} 145 146 147/// getAsmParser - Return the AssemblyParser definition for this target. 148/// 149Record *CodeGenTarget::getAsmParser() const { 150 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers"); 151 if (AsmParserNum >= LI.size()) 152 throw "Target does not have an AsmParser #" + utostr(AsmParserNum) + "!"; 153 return LI[AsmParserNum]; 154} 155 156/// getAsmWriter - Return the AssemblyWriter definition for this target. 157/// 158Record *CodeGenTarget::getAsmWriter() const { 159 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters"); 160 if (AsmWriterNum >= LI.size()) 161 throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!"; 162 return LI[AsmWriterNum]; 163} 164 165void CodeGenTarget::ReadRegisters() const { 166 std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register"); 167 if (Regs.empty()) 168 throw std::string("No 'Register' subclasses defined!"); 169 170 Registers.reserve(Regs.size()); 171 Registers.assign(Regs.begin(), Regs.end()); 172} 173 174CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) { 175 DeclaredSpillSize = R->getValueAsInt("SpillSize"); 176 DeclaredSpillAlignment = R->getValueAsInt("SpillAlignment"); 177} 178 179const std::string &CodeGenRegister::getName() const { 180 return TheDef->getName(); 181} 182 183void CodeGenTarget::ReadRegisterClasses() const { 184 std::vector<Record*> RegClasses = 185 Records.getAllDerivedDefinitions("RegisterClass"); 186 if (RegClasses.empty()) 187 throw std::string("No 'RegisterClass' subclasses defined!"); 188 189 RegisterClasses.reserve(RegClasses.size()); 190 RegisterClasses.assign(RegClasses.begin(), RegClasses.end()); 191} 192 193std::vector<MVT::SimpleValueType> CodeGenTarget:: 194getRegisterVTs(Record *R) const { 195 std::vector<MVT::SimpleValueType> Result; 196 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses(); 197 for (unsigned i = 0, e = RCs.size(); i != e; ++i) { 198 const CodeGenRegisterClass &RC = RegisterClasses[i]; 199 for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) { 200 if (R == RC.Elements[ei]) { 201 const std::vector<MVT::SimpleValueType> &InVTs = RC.getValueTypes(); 202 Result.insert(Result.end(), InVTs.begin(), InVTs.end()); 203 } 204 } 205 } 206 return Result; 207} 208 209 210CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) { 211 // Rename anonymous register classes. 212 if (R->getName().size() > 9 && R->getName()[9] == '.') { 213 static unsigned AnonCounter = 0; 214 R->setName("AnonRegClass_"+utostr(AnonCounter++)); 215 } 216 217 std::vector<Record*> TypeList = R->getValueAsListOfDefs("RegTypes"); 218 for (unsigned i = 0, e = TypeList.size(); i != e; ++i) { 219 Record *Type = TypeList[i]; 220 if (!Type->isSubClassOf("ValueType")) 221 throw "RegTypes list member '" + Type->getName() + 222 "' does not derive from the ValueType class!"; 223 VTs.push_back(getValueType(Type)); 224 } 225 assert(!VTs.empty() && "RegisterClass must contain at least one ValueType!"); 226 227 std::vector<Record*> RegList = R->getValueAsListOfDefs("MemberList"); 228 for (unsigned i = 0, e = RegList.size(); i != e; ++i) { 229 Record *Reg = RegList[i]; 230 if (!Reg->isSubClassOf("Register")) 231 throw "Register Class member '" + Reg->getName() + 232 "' does not derive from the Register class!"; 233 Elements.push_back(Reg); 234 } 235 236 std::vector<Record*> SubRegClassList = 237 R->getValueAsListOfDefs("SubRegClassList"); 238 for (unsigned i = 0, e = SubRegClassList.size(); i != e; ++i) { 239 Record *SubRegClass = SubRegClassList[i]; 240 if (!SubRegClass->isSubClassOf("RegisterClass")) 241 throw "Register Class member '" + SubRegClass->getName() + 242 "' does not derive from the RegisterClass class!"; 243 SubRegClasses.push_back(SubRegClass); 244 } 245 246 // Allow targets to override the size in bits of the RegisterClass. 247 unsigned Size = R->getValueAsInt("Size"); 248 249 Namespace = R->getValueAsString("Namespace"); 250 SpillSize = Size ? Size : EVT(VTs[0]).getSizeInBits(); 251 SpillAlignment = R->getValueAsInt("Alignment"); 252 CopyCost = R->getValueAsInt("CopyCost"); 253 MethodBodies = R->getValueAsCode("MethodBodies"); 254 MethodProtos = R->getValueAsCode("MethodProtos"); 255} 256 257const std::string &CodeGenRegisterClass::getName() const { 258 return TheDef->getName(); 259} 260 261void CodeGenTarget::ReadLegalValueTypes() const { 262 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses(); 263 for (unsigned i = 0, e = RCs.size(); i != e; ++i) 264 for (unsigned ri = 0, re = RCs[i].VTs.size(); ri != re; ++ri) 265 LegalValueTypes.push_back(RCs[i].VTs[ri]); 266 267 // Remove duplicates. 268 std::sort(LegalValueTypes.begin(), LegalValueTypes.end()); 269 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(), 270 LegalValueTypes.end()), 271 LegalValueTypes.end()); 272} 273 274 275void CodeGenTarget::ReadInstructions() const { 276 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction"); 277 if (Insts.size() <= 2) 278 throw std::string("No 'Instruction' subclasses defined!"); 279 280 // Parse the instructions defined in the .td file. 281 std::string InstFormatName = 282 getAsmWriter()->getValueAsString("InstFormatName"); 283 284 for (unsigned i = 0, e = Insts.size(); i != e; ++i) { 285 std::string AsmStr = Insts[i]->getValueAsString(InstFormatName); 286 Instructions.insert(std::make_pair(Insts[i]->getName(), 287 CodeGenInstruction(Insts[i], AsmStr))); 288 } 289} 290 291static const CodeGenInstruction * 292GetInstByName(const char *Name, 293 const std::map<std::string, CodeGenInstruction> &Insts) { 294 std::map<std::string, CodeGenInstruction>::const_iterator 295 I = Insts.find(Name); 296 if (I == Insts.end()) 297 throw std::string("Could not find '") + Name + "' instruction!"; 298 return &I->second; 299} 300 301/// getInstructionsByEnumValue - Return all of the instructions defined by the 302/// target, ordered by their enum value. 303void CodeGenTarget::ComputeInstrsByEnum() { 304 const std::map<std::string, CodeGenInstruction> &Insts = getInstructions(); 305 const CodeGenInstruction *PHI = GetInstByName("PHI", Insts); 306 const CodeGenInstruction *INLINEASM = GetInstByName("INLINEASM", Insts); 307 const CodeGenInstruction *DBG_LABEL = GetInstByName("DBG_LABEL", Insts); 308 const CodeGenInstruction *EH_LABEL = GetInstByName("EH_LABEL", Insts); 309 const CodeGenInstruction *GC_LABEL = GetInstByName("GC_LABEL", Insts); 310 const CodeGenInstruction *KILL = GetInstByName("KILL", Insts); 311 const CodeGenInstruction *EXTRACT_SUBREG = 312 GetInstByName("EXTRACT_SUBREG", Insts); 313 const CodeGenInstruction *INSERT_SUBREG = 314 GetInstByName("INSERT_SUBREG", Insts); 315 const CodeGenInstruction *IMPLICIT_DEF = GetInstByName("IMPLICIT_DEF", Insts); 316 const CodeGenInstruction *SUBREG_TO_REG = 317 GetInstByName("SUBREG_TO_REG", Insts); 318 const CodeGenInstruction *COPY_TO_REGCLASS = 319 GetInstByName("COPY_TO_REGCLASS", Insts); 320 const CodeGenInstruction *DBG_VALUE = GetInstByName("DBG_VALUE", Insts); 321 322 // Print out the rest of the instructions now. 323 InstrsByEnum.push_back(PHI); 324 InstrsByEnum.push_back(INLINEASM); 325 InstrsByEnum.push_back(DBG_LABEL); 326 InstrsByEnum.push_back(EH_LABEL); 327 InstrsByEnum.push_back(GC_LABEL); 328 InstrsByEnum.push_back(KILL); 329 InstrsByEnum.push_back(EXTRACT_SUBREG); 330 InstrsByEnum.push_back(INSERT_SUBREG); 331 InstrsByEnum.push_back(IMPLICIT_DEF); 332 InstrsByEnum.push_back(SUBREG_TO_REG); 333 InstrsByEnum.push_back(COPY_TO_REGCLASS); 334 InstrsByEnum.push_back(DBG_VALUE); 335 for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II) 336 if (&II->second != PHI && 337 &II->second != INLINEASM && 338 &II->second != DBG_LABEL && 339 &II->second != EH_LABEL && 340 &II->second != GC_LABEL && 341 &II->second != KILL && 342 &II->second != EXTRACT_SUBREG && 343 &II->second != INSERT_SUBREG && 344 &II->second != IMPLICIT_DEF && 345 &II->second != SUBREG_TO_REG && 346 &II->second != COPY_TO_REGCLASS && 347 &II->second != DBG_VALUE) 348 InstrsByEnum.push_back(&II->second); 349} 350 351 352/// isLittleEndianEncoding - Return whether this target encodes its instruction 353/// in little-endian format, i.e. bits laid out in the order [0..n] 354/// 355bool CodeGenTarget::isLittleEndianEncoding() const { 356 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding"); 357} 358 359//===----------------------------------------------------------------------===// 360// ComplexPattern implementation 361// 362ComplexPattern::ComplexPattern(Record *R) { 363 Ty = ::getValueType(R->getValueAsDef("Ty")); 364 NumOperands = R->getValueAsInt("NumOperands"); 365 SelectFunc = R->getValueAsString("SelectFunc"); 366 RootNodes = R->getValueAsListOfDefs("RootNodes"); 367 368 // Parse the properties. 369 Properties = 0; 370 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties"); 371 for (unsigned i = 0, e = PropList.size(); i != e; ++i) 372 if (PropList[i]->getName() == "SDNPHasChain") { 373 Properties |= 1 << SDNPHasChain; 374 } else if (PropList[i]->getName() == "SDNPOptInFlag") { 375 Properties |= 1 << SDNPOptInFlag; 376 } else if (PropList[i]->getName() == "SDNPMayStore") { 377 Properties |= 1 << SDNPMayStore; 378 } else if (PropList[i]->getName() == "SDNPMayLoad") { 379 Properties |= 1 << SDNPMayLoad; 380 } else if (PropList[i]->getName() == "SDNPSideEffect") { 381 Properties |= 1 << SDNPSideEffect; 382 } else if (PropList[i]->getName() == "SDNPMemOperand") { 383 Properties |= 1 << SDNPMemOperand; 384 } else { 385 errs() << "Unsupported SD Node property '" << PropList[i]->getName() 386 << "' on ComplexPattern '" << R->getName() << "'!\n"; 387 exit(1); 388 } 389} 390 391//===----------------------------------------------------------------------===// 392// CodeGenIntrinsic Implementation 393//===----------------------------------------------------------------------===// 394 395std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC, 396 bool TargetOnly) { 397 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic"); 398 399 std::vector<CodeGenIntrinsic> Result; 400 401 for (unsigned i = 0, e = I.size(); i != e; ++i) { 402 bool isTarget = I[i]->getValueAsBit("isTarget"); 403 if (isTarget == TargetOnly) 404 Result.push_back(CodeGenIntrinsic(I[i])); 405 } 406 return Result; 407} 408 409CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { 410 TheDef = R; 411 std::string DefName = R->getName(); 412 ModRef = WriteMem; 413 isOverloaded = false; 414 isCommutative = false; 415 416 if (DefName.size() <= 4 || 417 std::string(DefName.begin(), DefName.begin() + 4) != "int_") 418 throw "Intrinsic '" + DefName + "' does not start with 'int_'!"; 419 420 EnumName = std::string(DefName.begin()+4, DefName.end()); 421 422 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field. 423 GCCBuiltinName = R->getValueAsString("GCCBuiltinName"); 424 425 TargetPrefix = R->getValueAsString("TargetPrefix"); 426 Name = R->getValueAsString("LLVMName"); 427 428 if (Name == "") { 429 // If an explicit name isn't specified, derive one from the DefName. 430 Name = "llvm."; 431 432 for (unsigned i = 0, e = EnumName.size(); i != e; ++i) 433 Name += (EnumName[i] == '_') ? '.' : EnumName[i]; 434 } else { 435 // Verify it starts with "llvm.". 436 if (Name.size() <= 5 || 437 std::string(Name.begin(), Name.begin() + 5) != "llvm.") 438 throw "Intrinsic '" + DefName + "'s name does not start with 'llvm.'!"; 439 } 440 441 // If TargetPrefix is specified, make sure that Name starts with 442 // "llvm.<targetprefix>.". 443 if (!TargetPrefix.empty()) { 444 if (Name.size() < 6+TargetPrefix.size() || 445 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size()) 446 != (TargetPrefix + ".")) 447 throw "Intrinsic '" + DefName + "' does not start with 'llvm." + 448 TargetPrefix + ".'!"; 449 } 450 451 // Parse the list of return types. 452 std::vector<MVT::SimpleValueType> OverloadedVTs; 453 ListInit *TypeList = R->getValueAsListInit("RetTypes"); 454 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) { 455 Record *TyEl = TypeList->getElementAsRecord(i); 456 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); 457 MVT::SimpleValueType VT; 458 if (TyEl->isSubClassOf("LLVMMatchType")) { 459 unsigned MatchTy = TyEl->getValueAsInt("Number"); 460 assert(MatchTy < OverloadedVTs.size() && 461 "Invalid matching number!"); 462 VT = OverloadedVTs[MatchTy]; 463 // It only makes sense to use the extended and truncated vector element 464 // variants with iAny types; otherwise, if the intrinsic is not 465 // overloaded, all the types can be specified directly. 466 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") && 467 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) || 468 VT == MVT::iAny || VT == MVT::vAny) && 469 "Expected iAny or vAny type"); 470 } else { 471 VT = getValueType(TyEl->getValueAsDef("VT")); 472 } 473 if (EVT(VT).isOverloaded()) { 474 OverloadedVTs.push_back(VT); 475 isOverloaded |= true; 476 } 477 IS.RetVTs.push_back(VT); 478 IS.RetTypeDefs.push_back(TyEl); 479 } 480 481 if (IS.RetVTs.size() == 0) 482 throw "Intrinsic '"+DefName+"' needs at least a type for the ret value!"; 483 484 // Parse the list of parameter types. 485 TypeList = R->getValueAsListInit("ParamTypes"); 486 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) { 487 Record *TyEl = TypeList->getElementAsRecord(i); 488 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); 489 MVT::SimpleValueType VT; 490 if (TyEl->isSubClassOf("LLVMMatchType")) { 491 unsigned MatchTy = TyEl->getValueAsInt("Number"); 492 assert(MatchTy < OverloadedVTs.size() && 493 "Invalid matching number!"); 494 VT = OverloadedVTs[MatchTy]; 495 // It only makes sense to use the extended and truncated vector element 496 // variants with iAny types; otherwise, if the intrinsic is not 497 // overloaded, all the types can be specified directly. 498 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") && 499 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) || 500 VT == MVT::iAny || VT == MVT::vAny) && 501 "Expected iAny or vAny type"); 502 } else 503 VT = getValueType(TyEl->getValueAsDef("VT")); 504 if (EVT(VT).isOverloaded()) { 505 OverloadedVTs.push_back(VT); 506 isOverloaded |= true; 507 } 508 IS.ParamVTs.push_back(VT); 509 IS.ParamTypeDefs.push_back(TyEl); 510 } 511 512 // Parse the intrinsic properties. 513 ListInit *PropList = R->getValueAsListInit("Properties"); 514 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) { 515 Record *Property = PropList->getElementAsRecord(i); 516 assert(Property->isSubClassOf("IntrinsicProperty") && 517 "Expected a property!"); 518 519 if (Property->getName() == "IntrNoMem") 520 ModRef = NoMem; 521 else if (Property->getName() == "IntrReadArgMem") 522 ModRef = ReadArgMem; 523 else if (Property->getName() == "IntrReadMem") 524 ModRef = ReadMem; 525 else if (Property->getName() == "IntrWriteArgMem") 526 ModRef = WriteArgMem; 527 else if (Property->getName() == "IntrWriteMem") 528 ModRef = WriteMem; 529 else if (Property->getName() == "Commutative") 530 isCommutative = true; 531 else if (Property->isSubClassOf("NoCapture")) { 532 unsigned ArgNo = Property->getValueAsInt("ArgNo"); 533 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture)); 534 } else 535 assert(0 && "Unknown property!"); 536 } 537} 538