CodeGenTarget.cpp revision bbf1caa46bc9726989f287f6c345ef8542a43237
1//===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This class wraps target description classes used by the various code 11// generation TableGen backends. This makes it easier to access the data and 12// provides a single place that needs to check it for validity. All of these 13// classes throw exceptions on error conditions. 14// 15//===----------------------------------------------------------------------===// 16 17#include "CodeGenTarget.h" 18#include "CodeGenIntrinsics.h" 19#include "Record.h" 20#include "llvm/ADT/StringExtras.h" 21#include "llvm/Support/CommandLine.h" 22#include <algorithm> 23using namespace llvm; 24 25static cl::opt<unsigned> 26AsmWriterNum("asmwriternum", cl::init(0), 27 cl::desc("Make -gen-asm-writer emit assembly writer #N")); 28 29/// getValueType - Return the MVT::SimpleValueType that the specified TableGen 30/// record corresponds to. 31MVT::SimpleValueType llvm::getValueType(Record *Rec) { 32 return (MVT::SimpleValueType)Rec->getValueAsInt("Value"); 33} 34 35std::string llvm::getName(MVT::SimpleValueType T) { 36 switch (T) { 37 case MVT::Other: return "UNKNOWN"; 38 case MVT::iPTR: return "TLI.getPointerTy()"; 39 case MVT::iPTRAny: return "TLI.getPointerTy()"; 40 default: return getEnumName(T); 41 } 42} 43 44std::string llvm::getEnumName(MVT::SimpleValueType T) { 45 switch (T) { 46 case MVT::Other: return "MVT::Other"; 47 case MVT::i1: return "MVT::i1"; 48 case MVT::i8: return "MVT::i8"; 49 case MVT::i16: return "MVT::i16"; 50 case MVT::i32: return "MVT::i32"; 51 case MVT::i64: return "MVT::i64"; 52 case MVT::i128: return "MVT::i128"; 53 case MVT::iAny: return "MVT::iAny"; 54 case MVT::fAny: return "MVT::fAny"; 55 case MVT::f32: return "MVT::f32"; 56 case MVT::f64: return "MVT::f64"; 57 case MVT::f80: return "MVT::f80"; 58 case MVT::f128: return "MVT::f128"; 59 case MVT::ppcf128: return "MVT::ppcf128"; 60 case MVT::Flag: return "MVT::Flag"; 61 case MVT::isVoid:return "MVT::isVoid"; 62 case MVT::v2i8: return "MVT::v2i8"; 63 case MVT::v4i8: return "MVT::v4i8"; 64 case MVT::v8i8: return "MVT::v8i8"; 65 case MVT::v16i8: return "MVT::v16i8"; 66 case MVT::v32i8: return "MVT::v32i8"; 67 case MVT::v2i16: return "MVT::v2i16"; 68 case MVT::v4i16: return "MVT::v4i16"; 69 case MVT::v8i16: return "MVT::v8i16"; 70 case MVT::v16i16: return "MVT::v16i16"; 71 case MVT::v2i32: return "MVT::v2i32"; 72 case MVT::v4i32: return "MVT::v4i32"; 73 case MVT::v8i32: return "MVT::v8i32"; 74 case MVT::v1i64: return "MVT::v1i64"; 75 case MVT::v2i64: return "MVT::v2i64"; 76 case MVT::v4i64: return "MVT::v4i64"; 77 case MVT::v2f32: return "MVT::v2f32"; 78 case MVT::v4f32: return "MVT::v4f32"; 79 case MVT::v8f32: return "MVT::v8f32"; 80 case MVT::v2f64: return "MVT::v2f64"; 81 case MVT::v4f64: return "MVT::v4f64"; 82 case MVT::v3i32: return "MVT::v3i32"; 83 case MVT::v3f32: return "MVT::v3f32"; 84 case MVT::Metadata: return "MVT::Metadata"; 85 case MVT::iPTR: return "MVT::iPTR"; 86 case MVT::iPTRAny: return "MVT::iPTRAny"; 87 default: assert(0 && "ILLEGAL VALUE TYPE!"); return ""; 88 } 89} 90 91/// getQualifiedName - Return the name of the specified record, with a 92/// namespace qualifier if the record contains one. 93/// 94std::string llvm::getQualifiedName(const Record *R) { 95 std::string Namespace = R->getValueAsString("Namespace"); 96 if (Namespace.empty()) return R->getName(); 97 return Namespace + "::" + R->getName(); 98} 99 100 101 102 103/// getTarget - Return the current instance of the Target class. 104/// 105CodeGenTarget::CodeGenTarget() { 106 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target"); 107 if (Targets.size() == 0) 108 throw std::string("ERROR: No 'Target' subclasses defined!"); 109 if (Targets.size() != 1) 110 throw std::string("ERROR: Multiple subclasses of Target defined!"); 111 TargetRec = Targets[0]; 112} 113 114 115const std::string &CodeGenTarget::getName() const { 116 return TargetRec->getName(); 117} 118 119std::string CodeGenTarget::getInstNamespace() const { 120 std::string InstNS; 121 122 for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) { 123 InstNS = i->second.Namespace; 124 125 // Make sure not to pick up "TargetInstrInfo" by accidentally getting 126 // the namespace off the PHI instruction or something. 127 if (InstNS != "TargetInstrInfo") 128 break; 129 } 130 131 return InstNS; 132} 133 134Record *CodeGenTarget::getInstructionSet() const { 135 return TargetRec->getValueAsDef("InstructionSet"); 136} 137 138/// getAsmWriter - Return the AssemblyWriter definition for this target. 139/// 140Record *CodeGenTarget::getAsmWriter() const { 141 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters"); 142 if (AsmWriterNum >= LI.size()) 143 throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!"; 144 return LI[AsmWriterNum]; 145} 146 147void CodeGenTarget::ReadRegisters() const { 148 std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register"); 149 if (Regs.empty()) 150 throw std::string("No 'Register' subclasses defined!"); 151 152 Registers.reserve(Regs.size()); 153 Registers.assign(Regs.begin(), Regs.end()); 154} 155 156CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) { 157 DeclaredSpillSize = R->getValueAsInt("SpillSize"); 158 DeclaredSpillAlignment = R->getValueAsInt("SpillAlignment"); 159} 160 161const std::string &CodeGenRegister::getName() const { 162 return TheDef->getName(); 163} 164 165void CodeGenTarget::ReadRegisterClasses() const { 166 std::vector<Record*> RegClasses = 167 Records.getAllDerivedDefinitions("RegisterClass"); 168 if (RegClasses.empty()) 169 throw std::string("No 'RegisterClass' subclasses defined!"); 170 171 RegisterClasses.reserve(RegClasses.size()); 172 RegisterClasses.assign(RegClasses.begin(), RegClasses.end()); 173} 174 175std::vector<unsigned char> CodeGenTarget::getRegisterVTs(Record *R) const { 176 std::vector<unsigned char> Result; 177 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses(); 178 for (unsigned i = 0, e = RCs.size(); i != e; ++i) { 179 const CodeGenRegisterClass &RC = RegisterClasses[i]; 180 for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) { 181 if (R == RC.Elements[ei]) { 182 const std::vector<MVT::SimpleValueType> &InVTs = RC.getValueTypes(); 183 for (unsigned i = 0, e = InVTs.size(); i != e; ++i) 184 Result.push_back(InVTs[i]); 185 } 186 } 187 } 188 return Result; 189} 190 191 192CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) { 193 // Rename anonymous register classes. 194 if (R->getName().size() > 9 && R->getName()[9] == '.') { 195 static unsigned AnonCounter = 0; 196 R->setName("AnonRegClass_"+utostr(AnonCounter++)); 197 } 198 199 std::vector<Record*> TypeList = R->getValueAsListOfDefs("RegTypes"); 200 for (unsigned i = 0, e = TypeList.size(); i != e; ++i) { 201 Record *Type = TypeList[i]; 202 if (!Type->isSubClassOf("ValueType")) 203 throw "RegTypes list member '" + Type->getName() + 204 "' does not derive from the ValueType class!"; 205 VTs.push_back(getValueType(Type)); 206 } 207 assert(!VTs.empty() && "RegisterClass must contain at least one ValueType!"); 208 209 std::vector<Record*> RegList = R->getValueAsListOfDefs("MemberList"); 210 for (unsigned i = 0, e = RegList.size(); i != e; ++i) { 211 Record *Reg = RegList[i]; 212 if (!Reg->isSubClassOf("Register")) 213 throw "Register Class member '" + Reg->getName() + 214 "' does not derive from the Register class!"; 215 Elements.push_back(Reg); 216 } 217 218 std::vector<Record*> SubRegClassList = 219 R->getValueAsListOfDefs("SubRegClassList"); 220 for (unsigned i = 0, e = SubRegClassList.size(); i != e; ++i) { 221 Record *SubRegClass = SubRegClassList[i]; 222 if (!SubRegClass->isSubClassOf("RegisterClass")) 223 throw "Register Class member '" + SubRegClass->getName() + 224 "' does not derive from the RegisterClass class!"; 225 SubRegClasses.push_back(SubRegClass); 226 } 227 228 // Allow targets to override the size in bits of the RegisterClass. 229 unsigned Size = R->getValueAsInt("Size"); 230 231 Namespace = R->getValueAsString("Namespace"); 232 SpillSize = Size ? Size : MVT(VTs[0]).getSizeInBits(); 233 SpillAlignment = R->getValueAsInt("Alignment"); 234 CopyCost = R->getValueAsInt("CopyCost"); 235 MethodBodies = R->getValueAsCode("MethodBodies"); 236 MethodProtos = R->getValueAsCode("MethodProtos"); 237} 238 239const std::string &CodeGenRegisterClass::getName() const { 240 return TheDef->getName(); 241} 242 243void CodeGenTarget::ReadLegalValueTypes() const { 244 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses(); 245 for (unsigned i = 0, e = RCs.size(); i != e; ++i) 246 for (unsigned ri = 0, re = RCs[i].VTs.size(); ri != re; ++ri) 247 LegalValueTypes.push_back(RCs[i].VTs[ri]); 248 249 // Remove duplicates. 250 std::sort(LegalValueTypes.begin(), LegalValueTypes.end()); 251 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(), 252 LegalValueTypes.end()), 253 LegalValueTypes.end()); 254} 255 256 257void CodeGenTarget::ReadInstructions() const { 258 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction"); 259 if (Insts.size() <= 2) 260 throw std::string("No 'Instruction' subclasses defined!"); 261 262 // Parse the instructions defined in the .td file. 263 std::string InstFormatName = 264 getAsmWriter()->getValueAsString("InstFormatName"); 265 266 for (unsigned i = 0, e = Insts.size(); i != e; ++i) { 267 std::string AsmStr = Insts[i]->getValueAsString(InstFormatName); 268 Instructions.insert(std::make_pair(Insts[i]->getName(), 269 CodeGenInstruction(Insts[i], AsmStr))); 270 } 271} 272 273/// getInstructionsByEnumValue - Return all of the instructions defined by the 274/// target, ordered by their enum value. 275void CodeGenTarget:: 276getInstructionsByEnumValue(std::vector<const CodeGenInstruction*> 277 &NumberedInstructions) { 278 std::map<std::string, CodeGenInstruction>::const_iterator I; 279 I = getInstructions().find("PHI"); 280 if (I == Instructions.end()) throw "Could not find 'PHI' instruction!"; 281 const CodeGenInstruction *PHI = &I->second; 282 283 I = getInstructions().find("INLINEASM"); 284 if (I == Instructions.end()) throw "Could not find 'INLINEASM' instruction!"; 285 const CodeGenInstruction *INLINEASM = &I->second; 286 287 I = getInstructions().find("DBG_LABEL"); 288 if (I == Instructions.end()) throw "Could not find 'DBG_LABEL' instruction!"; 289 const CodeGenInstruction *DBG_LABEL = &I->second; 290 291 I = getInstructions().find("EH_LABEL"); 292 if (I == Instructions.end()) throw "Could not find 'EH_LABEL' instruction!"; 293 const CodeGenInstruction *EH_LABEL = &I->second; 294 295 I = getInstructions().find("GC_LABEL"); 296 if (I == Instructions.end()) throw "Could not find 'GC_LABEL' instruction!"; 297 const CodeGenInstruction *GC_LABEL = &I->second; 298 299 I = getInstructions().find("DECLARE"); 300 if (I == Instructions.end()) throw "Could not find 'DECLARE' instruction!"; 301 const CodeGenInstruction *DECLARE = &I->second; 302 303 I = getInstructions().find("EXTRACT_SUBREG"); 304 if (I == Instructions.end()) 305 throw "Could not find 'EXTRACT_SUBREG' instruction!"; 306 const CodeGenInstruction *EXTRACT_SUBREG = &I->second; 307 308 I = getInstructions().find("INSERT_SUBREG"); 309 if (I == Instructions.end()) 310 throw "Could not find 'INSERT_SUBREG' instruction!"; 311 const CodeGenInstruction *INSERT_SUBREG = &I->second; 312 313 I = getInstructions().find("IMPLICIT_DEF"); 314 if (I == Instructions.end()) 315 throw "Could not find 'IMPLICIT_DEF' instruction!"; 316 const CodeGenInstruction *IMPLICIT_DEF = &I->second; 317 318 I = getInstructions().find("SUBREG_TO_REG"); 319 if (I == Instructions.end()) 320 throw "Could not find 'SUBREG_TO_REG' instruction!"; 321 const CodeGenInstruction *SUBREG_TO_REG = &I->second; 322 323 I = getInstructions().find("COPY_TO_REGCLASS"); 324 if (I == Instructions.end()) 325 throw "Could not find 'COPY_TO_REGCLASS' instruction!"; 326 const CodeGenInstruction *COPY_TO_REGCLASS = &I->second; 327 328 // Print out the rest of the instructions now. 329 NumberedInstructions.push_back(PHI); 330 NumberedInstructions.push_back(INLINEASM); 331 NumberedInstructions.push_back(DBG_LABEL); 332 NumberedInstructions.push_back(EH_LABEL); 333 NumberedInstructions.push_back(GC_LABEL); 334 NumberedInstructions.push_back(DECLARE); 335 NumberedInstructions.push_back(EXTRACT_SUBREG); 336 NumberedInstructions.push_back(INSERT_SUBREG); 337 NumberedInstructions.push_back(IMPLICIT_DEF); 338 NumberedInstructions.push_back(SUBREG_TO_REG); 339 NumberedInstructions.push_back(COPY_TO_REGCLASS); 340 for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II) 341 if (&II->second != PHI && 342 &II->second != INLINEASM && 343 &II->second != DBG_LABEL && 344 &II->second != EH_LABEL && 345 &II->second != GC_LABEL && 346 &II->second != DECLARE && 347 &II->second != EXTRACT_SUBREG && 348 &II->second != INSERT_SUBREG && 349 &II->second != IMPLICIT_DEF && 350 &II->second != SUBREG_TO_REG && 351 &II->second != COPY_TO_REGCLASS) 352 NumberedInstructions.push_back(&II->second); 353} 354 355 356/// isLittleEndianEncoding - Return whether this target encodes its instruction 357/// in little-endian format, i.e. bits laid out in the order [0..n] 358/// 359bool CodeGenTarget::isLittleEndianEncoding() const { 360 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding"); 361} 362 363//===----------------------------------------------------------------------===// 364// ComplexPattern implementation 365// 366ComplexPattern::ComplexPattern(Record *R) { 367 Ty = ::getValueType(R->getValueAsDef("Ty")); 368 NumOperands = R->getValueAsInt("NumOperands"); 369 SelectFunc = R->getValueAsString("SelectFunc"); 370 RootNodes = R->getValueAsListOfDefs("RootNodes"); 371 372 // Parse the properties. 373 Properties = 0; 374 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties"); 375 for (unsigned i = 0, e = PropList.size(); i != e; ++i) 376 if (PropList[i]->getName() == "SDNPHasChain") { 377 Properties |= 1 << SDNPHasChain; 378 } else if (PropList[i]->getName() == "SDNPOptInFlag") { 379 Properties |= 1 << SDNPOptInFlag; 380 } else if (PropList[i]->getName() == "SDNPMayStore") { 381 Properties |= 1 << SDNPMayStore; 382 } else if (PropList[i]->getName() == "SDNPMayLoad") { 383 Properties |= 1 << SDNPMayLoad; 384 } else if (PropList[i]->getName() == "SDNPSideEffect") { 385 Properties |= 1 << SDNPSideEffect; 386 } else if (PropList[i]->getName() == "SDNPMemOperand") { 387 Properties |= 1 << SDNPMemOperand; 388 } else { 389 errs() << "Unsupported SD Node property '" << PropList[i]->getName() 390 << "' on ComplexPattern '" << R->getName() << "'!\n"; 391 exit(1); 392 } 393 394 // Parse the attributes. 395 Attributes = 0; 396 PropList = R->getValueAsListOfDefs("Attributes"); 397 for (unsigned i = 0, e = PropList.size(); i != e; ++i) 398 if (PropList[i]->getName() == "CPAttrParentAsRoot") { 399 Attributes |= 1 << CPAttrParentAsRoot; 400 } else { 401 errs() << "Unsupported pattern attribute '" << PropList[i]->getName() 402 << "' on ComplexPattern '" << R->getName() << "'!\n"; 403 exit(1); 404 } 405} 406 407//===----------------------------------------------------------------------===// 408// CodeGenIntrinsic Implementation 409//===----------------------------------------------------------------------===// 410 411std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC, 412 bool TargetOnly) { 413 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic"); 414 415 std::vector<CodeGenIntrinsic> Result; 416 417 for (unsigned i = 0, e = I.size(); i != e; ++i) { 418 bool isTarget = I[i]->getValueAsBit("isTarget"); 419 if (isTarget == TargetOnly) 420 Result.push_back(CodeGenIntrinsic(I[i])); 421 } 422 return Result; 423} 424 425CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { 426 TheDef = R; 427 std::string DefName = R->getName(); 428 ModRef = WriteMem; 429 isOverloaded = false; 430 isCommutative = false; 431 432 if (DefName.size() <= 4 || 433 std::string(DefName.begin(), DefName.begin() + 4) != "int_") 434 throw "Intrinsic '" + DefName + "' does not start with 'int_'!"; 435 436 EnumName = std::string(DefName.begin()+4, DefName.end()); 437 438 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field. 439 GCCBuiltinName = R->getValueAsString("GCCBuiltinName"); 440 441 TargetPrefix = R->getValueAsString("TargetPrefix"); 442 Name = R->getValueAsString("LLVMName"); 443 444 if (Name == "") { 445 // If an explicit name isn't specified, derive one from the DefName. 446 Name = "llvm."; 447 448 for (unsigned i = 0, e = EnumName.size(); i != e; ++i) 449 Name += (EnumName[i] == '_') ? '.' : EnumName[i]; 450 } else { 451 // Verify it starts with "llvm.". 452 if (Name.size() <= 5 || 453 std::string(Name.begin(), Name.begin() + 5) != "llvm.") 454 throw "Intrinsic '" + DefName + "'s name does not start with 'llvm.'!"; 455 } 456 457 // If TargetPrefix is specified, make sure that Name starts with 458 // "llvm.<targetprefix>.". 459 if (!TargetPrefix.empty()) { 460 if (Name.size() < 6+TargetPrefix.size() || 461 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size()) 462 != (TargetPrefix + ".")) 463 throw "Intrinsic '" + DefName + "' does not start with 'llvm." + 464 TargetPrefix + ".'!"; 465 } 466 467 // Parse the list of return types. 468 std::vector<MVT::SimpleValueType> OverloadedVTs; 469 ListInit *TypeList = R->getValueAsListInit("RetTypes"); 470 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) { 471 Record *TyEl = TypeList->getElementAsRecord(i); 472 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); 473 MVT::SimpleValueType VT; 474 if (TyEl->isSubClassOf("LLVMMatchType")) { 475 unsigned MatchTy = TyEl->getValueAsInt("Number"); 476 assert(MatchTy < OverloadedVTs.size() && 477 "Invalid matching number!"); 478 VT = OverloadedVTs[MatchTy]; 479 // It only makes sense to use the extended and truncated vector element 480 // variants with iAny types; otherwise, if the intrinsic is not 481 // overloaded, all the types can be specified directly. 482 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") && 483 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) || 484 VT == MVT::iAny) && "Expected iAny type"); 485 } else { 486 VT = getValueType(TyEl->getValueAsDef("VT")); 487 } 488 if (VT == MVT::iAny || VT == MVT::fAny || VT == MVT::iPTRAny) { 489 OverloadedVTs.push_back(VT); 490 isOverloaded |= true; 491 } 492 IS.RetVTs.push_back(VT); 493 IS.RetTypeDefs.push_back(TyEl); 494 } 495 496 if (IS.RetVTs.size() == 0) 497 throw "Intrinsic '"+DefName+"' needs at least a type for the ret value!"; 498 499 // Parse the list of parameter types. 500 TypeList = R->getValueAsListInit("ParamTypes"); 501 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) { 502 Record *TyEl = TypeList->getElementAsRecord(i); 503 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); 504 MVT::SimpleValueType VT; 505 if (TyEl->isSubClassOf("LLVMMatchType")) { 506 unsigned MatchTy = TyEl->getValueAsInt("Number"); 507 assert(MatchTy < OverloadedVTs.size() && 508 "Invalid matching number!"); 509 VT = OverloadedVTs[MatchTy]; 510 // It only makes sense to use the extended and truncated vector element 511 // variants with iAny types; otherwise, if the intrinsic is not 512 // overloaded, all the types can be specified directly. 513 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") && 514 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) || 515 VT == MVT::iAny) && "Expected iAny type"); 516 } else 517 VT = getValueType(TyEl->getValueAsDef("VT")); 518 if (VT == MVT::iAny || VT == MVT::fAny || VT == MVT::iPTRAny) { 519 OverloadedVTs.push_back(VT); 520 isOverloaded |= true; 521 } 522 IS.ParamVTs.push_back(VT); 523 IS.ParamTypeDefs.push_back(TyEl); 524 } 525 526 // Parse the intrinsic properties. 527 ListInit *PropList = R->getValueAsListInit("Properties"); 528 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) { 529 Record *Property = PropList->getElementAsRecord(i); 530 assert(Property->isSubClassOf("IntrinsicProperty") && 531 "Expected a property!"); 532 533 if (Property->getName() == "IntrNoMem") 534 ModRef = NoMem; 535 else if (Property->getName() == "IntrReadArgMem") 536 ModRef = ReadArgMem; 537 else if (Property->getName() == "IntrReadMem") 538 ModRef = ReadMem; 539 else if (Property->getName() == "IntrWriteArgMem") 540 ModRef = WriteArgMem; 541 else if (Property->getName() == "IntrWriteMem") 542 ModRef = WriteMem; 543 else if (Property->getName() == "Commutative") 544 isCommutative = true; 545 else if (Property->isSubClassOf("NoCapture")) { 546 unsigned ArgNo = Property->getValueAsInt("ArgNo"); 547 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture)); 548 } else 549 assert(0 && "Unknown property!"); 550 } 551} 552