1target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64" 2target triple = "armv7-none-linux-gnueabi" 3 4 5;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 6;;;;;;;;; FLOAT ;;;;;;;;;; 7;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 8 9define <2 x float> @_Z14convert_float2Dv2_h(<2 x i8> %in) nounwind readnone alwaysinline { 10 %1 = uitofp <2 x i8> %in to <2 x float> 11 ret <2 x float> %1 12} 13 14define <3 x float> @_Z14convert_float3Dv3_h(<3 x i8> %in) nounwind readnone alwaysinline { 15 %1 = uitofp <3 x i8> %in to <3 x float> 16 ret <3 x float> %1 17} 18 19define <4 x float> @_Z14convert_float4Dv4_h(<4 x i8> %in) nounwind readnone alwaysinline { 20 %1 = uitofp <4 x i8> %in to <4 x float> 21 ret <4 x float> %1 22} 23 24define <2 x float> @_Z14convert_float2Dv2_c(<2 x i8> %in) nounwind readnone alwaysinline { 25 %1 = sitofp <2 x i8> %in to <2 x float> 26 ret <2 x float> %1 27} 28 29define <3 x float> @_Z14convert_float3Dv3_c(<3 x i8> %in) nounwind readnone alwaysinline { 30 %1 = sitofp <3 x i8> %in to <3 x float> 31 ret <3 x float> %1 32} 33 34define <4 x float> @_Z14convert_float4Dv4_c(<4 x i8> %in) nounwind readnone alwaysinline { 35 %1 = sitofp <4 x i8> %in to <4 x float> 36 ret <4 x float> %1 37} 38 39define <2 x float> @_Z14convert_float2Dv2_t(<2 x i16> %in) nounwind readnone alwaysinline { 40 %1 = uitofp <2 x i16> %in to <2 x float> 41 ret <2 x float> %1 42} 43 44define <3 x float> @_Z14convert_float3Dv3_t(<3 x i16> %in) nounwind readnone alwaysinline { 45 %1 = uitofp <3 x i16> %in to <3 x float> 46 ret <3 x float> %1 47} 48 49define <4 x float> @_Z14convert_float4Dv4_t(<4 x i16> %in) nounwind readnone alwaysinline { 50 %1 = uitofp <4 x i16> %in to <4 x float> 51 ret <4 x float> %1 52} 53 54define <2 x float> @_Z14convert_float2Dv2_s(<2 x i16> %in) nounwind readnone alwaysinline { 55 %1 = sitofp <2 x i16> %in to <2 x float> 56 ret <2 x float> %1 57} 58 59define <3 x float> @_Z14convert_float3Dv3_s(<3 x i16> %in) nounwind readnone alwaysinline { 60 %1 = sitofp <3 x i16> %in to <3 x float> 61 ret <3 x float> %1 62} 63 64define <4 x float> @_Z14convert_float4Dv4_s(<4 x i16> %in) nounwind readnone alwaysinline { 65 %1 = sitofp <4 x i16> %in to <4 x float> 66 ret <4 x float> %1 67} 68 69define <2 x float> @_Z14convert_float2Dv2_j(<2 x i32> %in) nounwind readnone alwaysinline { 70 %1 = uitofp <2 x i32> %in to <2 x float> 71 ret <2 x float> %1 72} 73 74define <3 x float> @_Z14convert_float3Dv3_j(<3 x i32> %in) nounwind readnone alwaysinline { 75 %1 = uitofp <3 x i32> %in to <3 x float> 76 ret <3 x float> %1 77} 78 79define <4 x float> @_Z14convert_float4Dv4_j(<4 x i32> %in) nounwind readnone alwaysinline { 80 %1 = uitofp <4 x i32> %in to <4 x float> 81 ret <4 x float> %1 82} 83 84define <2 x float> @_Z14convert_float2Dv2_i(<2 x i32> %in) nounwind readnone alwaysinline { 85 %1 = sitofp <2 x i32> %in to <2 x float> 86 ret <2 x float> %1 87} 88 89define <3 x float> @_Z14convert_float3Dv3_i(<3 x i32> %in) nounwind readnone alwaysinline { 90 %1 = sitofp <3 x i32> %in to <3 x float> 91 ret <3 x float> %1 92} 93 94define <4 x float> @_Z14convert_float4Dv4_i(<4 x i32> %in) nounwind readnone alwaysinline { 95 %1 = sitofp <4 x i32> %in to <4 x float> 96 ret <4 x float> %1 97} 98 99define <2 x float> @_Z14convert_float2Dv2_f(<2 x float> %in) nounwind readnone alwaysinline { 100 ret <2 x float> %in 101} 102 103define <3 x float> @_Z14convert_float3Dv3_f(<3 x float> %in) nounwind readnone alwaysinline { 104 ret <3 x float> %in 105} 106 107define <4 x float> @_Z14convert_float4Dv4_f(<4 x float> %in) nounwind readnone alwaysinline { 108 ret <4 x float> %in 109} 110 111 112;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 113;;;;;;;;; CHAR ;;;;;;;;;; 114;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 115define <4 x i8> @_Z13convert_char4Dv4_f(<4 x float> %in) nounwind readnone alwaysinline { 116 %1 = fptosi <4 x float> %in to <4 x i8> 117 ret <4 x i8> %1 118} 119 120define <3 x i8> @_Z13convert_char3Dv3_f(<3 x float> %in) nounwind readnone alwaysinline { 121 %1 = fptosi <3 x float> %in to <3 x i8> 122 ret <3 x i8> %1 123} 124 125define <2 x i8> @_Z13convert_char2Dv2_f(<2 x float> %in) nounwind readnone alwaysinline { 126 %1 = fptosi <2 x float> %in to <2 x i8> 127 ret <2 x i8> %1 128} 129 130define <4 x i8> @_Z13convert_char4Dv4_h(<4 x i8> %in) nounwind readnone alwaysinline { 131 ret <4 x i8> %in 132} 133 134define <3 x i8> @_Z13convert_char3Dv3_h(<3 x i8> %in) nounwind readnone alwaysinline { 135 ret <3 x i8> %in 136} 137 138define <2 x i8> @_Z13convert_char2Dv2_h(<2 x i8> %in) nounwind readnone alwaysinline { 139 ret <2 x i8> %in 140} 141 142define <4 x i8> @_Z13convert_char4Dv4_c(<4 x i8> %in) nounwind readnone alwaysinline { 143 ret <4 x i8> %in 144} 145 146define <3 x i8> @_Z13convert_char3Dv3_c(<3 x i8> %in) nounwind readnone alwaysinline { 147 ret <3 x i8> %in 148} 149 150define <2 x i8> @_Z13convert_char2Dv2_c(<2 x i8> %in) nounwind readnone alwaysinline { 151 ret <2 x i8> %in 152} 153 154define <4 x i8> @_Z13convert_char4Dv4_t(<4 x i16> %in) nounwind readnone alwaysinline { 155 %1 = trunc <4 x i16> %in to <4 x i8> 156 ret <4 x i8> %1 157} 158 159define <3 x i8> @_Z13convert_char3Dv3_t(<3 x i16> %in) nounwind readnone alwaysinline { 160 %1 = trunc <3 x i16> %in to <3 x i8> 161 ret <3 x i8> %1 162} 163 164define <2 x i8> @_Z13convert_char2Dv2_t(<2 x i16> %in) nounwind readnone alwaysinline { 165 %1 = trunc <2 x i16> %in to <2 x i8> 166 ret <2 x i8> %1 167} 168 169define <4 x i8> @_Z13convert_char4Dv4_s(<4 x i16> %in) nounwind readnone alwaysinline { 170 %1 = trunc <4 x i16> %in to <4 x i8> 171 ret <4 x i8> %1 172} 173 174define <3 x i8> @_Z13convert_char3Dv3_s(<3 x i16> %in) nounwind readnone alwaysinline { 175 %1 = trunc <3 x i16> %in to <3 x i8> 176 ret <3 x i8> %1 177} 178 179define <2 x i8> @_Z13convert_char2Dv2_s(<2 x i16> %in) nounwind readnone alwaysinline { 180 %1 = trunc <2 x i16> %in to <2 x i8> 181 ret <2 x i8> %1 182} 183 184define <4 x i8> @_Z13convert_char4Dv4_j(<4 x i32> %in) nounwind readnone alwaysinline { 185 %1 = trunc <4 x i32> %in to <4 x i8> 186 ret <4 x i8> %1 187} 188 189define <3 x i8> @_Z13convert_char3Dv3_j(<3 x i32> %in) nounwind readnone alwaysinline { 190 %1 = trunc <3 x i32> %in to <3 x i8> 191 ret <3 x i8> %1 192} 193 194define <2 x i8> @_Z13convert_char2Dv2_j(<2 x i32> %in) nounwind readnone alwaysinline { 195 %1 = trunc <2 x i32> %in to <2 x i8> 196 ret <2 x i8> %1 197} 198 199define <4 x i8> @_Z13convert_char4Dv4_i(<4 x i32> %in) nounwind readnone alwaysinline { 200 %1 = trunc <4 x i32> %in to <4 x i8> 201 ret <4 x i8> %1 202} 203 204define <3 x i8> @_Z13convert_char3Dv3_i(<3 x i32> %in) nounwind readnone alwaysinline { 205 %1 = trunc <3 x i32> %in to <3 x i8> 206 ret <3 x i8> %1 207} 208 209define <2 x i8> @_Z13convert_char2Dv2_i(<2 x i32> %in) nounwind readnone alwaysinline { 210 %1 = trunc <2 x i32> %in to <2 x i8> 211 ret <2 x i8> %1 212} 213 214 215;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 216;;;;;;;;; UCHAR ;;;;;;;;;; 217;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 218 219define <4 x i8> @_Z14convert_uchar4Dv4_f(<4 x float> %in) nounwind readnone alwaysinline { 220 %1 = fptoui <4 x float> %in to <4 x i8> 221 ret <4 x i8> %1 222} 223 224define <3 x i8> @_Z14convert_uchar3Dv3_f(<3 x float> %in) nounwind readnone alwaysinline { 225 %1 = fptoui <3 x float> %in to <3 x i8> 226 ret <3 x i8> %1 227} 228 229define <2 x i8> @_Z14convert_uchar2Dv2_f(<2 x float> %in) nounwind readnone alwaysinline { 230 %1 = fptoui <2 x float> %in to <2 x i8> 231 ret <2 x i8> %1 232} 233 234define <4 x i8> @_Z14convert_uchar4Dv4_h(<4 x i8> %in) nounwind readnone alwaysinline { 235 ret <4 x i8> %in 236} 237 238define <3 x i8> @_Z14convert_uchar3Dv3_h(<3 x i8> %in) nounwind readnone alwaysinline { 239 ret <3 x i8> %in 240} 241 242define <2 x i8> @_Z14convert_uchar2Dv2_h(<2 x i8> %in) nounwind readnone alwaysinline { 243 ret <2 x i8> %in 244} 245 246define <4 x i8> @_Z14convert_uchar4Dv4_c(<4 x i8> %in) nounwind readnone alwaysinline { 247 ret <4 x i8> %in 248} 249 250define <3 x i8> @_Z14convert_uchar3Dv3_c(<3 x i8> %in) nounwind readnone alwaysinline { 251 ret <3 x i8> %in 252} 253 254define <2 x i8> @_Z14convert_uchar2Dv2_c(<2 x i8> %in) nounwind readnone alwaysinline { 255 ret <2 x i8> %in 256} 257 258define <4 x i8> @_Z14convert_uchar4Dv4_t(<4 x i16> %in) nounwind readnone alwaysinline { 259 %1 = trunc <4 x i16> %in to <4 x i8> 260 ret <4 x i8> %1 261} 262 263define <3 x i8> @_Z14convert_uchar3Dv3_t(<3 x i16> %in) nounwind readnone alwaysinline { 264 %1 = trunc <3 x i16> %in to <3 x i8> 265 ret <3 x i8> %1 266} 267 268define <2 x i8> @_Z14convert_uchar2Dv2_t(<2 x i16> %in) nounwind readnone alwaysinline { 269 %1 = trunc <2 x i16> %in to <2 x i8> 270 ret <2 x i8> %1 271} 272 273define <4 x i8> @_Z14convert_uchar4Dv4_s(<4 x i16> %in) nounwind readnone alwaysinline { 274 %1 = trunc <4 x i16> %in to <4 x i8> 275 ret <4 x i8> %1 276} 277 278define <3 x i8> @_Z14convert_uchar3Dv3_s(<3 x i16> %in) nounwind readnone alwaysinline { 279 %1 = trunc <3 x i16> %in to <3 x i8> 280 ret <3 x i8> %1 281} 282 283define <2 x i8> @_Z14convert_uchar2Dv2_s(<2 x i16> %in) nounwind readnone alwaysinline { 284 %1 = trunc <2 x i16> %in to <2 x i8> 285 ret <2 x i8> %1 286} 287 288define <4 x i8> @_Z14convert_uchar4Dv4_j(<4 x i32> %in) nounwind readnone alwaysinline { 289 %1 = trunc <4 x i32> %in to <4 x i8> 290 ret <4 x i8> %1 291} 292 293define <3 x i8> @_Z14convert_uchar3Dv3_j(<3 x i32> %in) nounwind readnone alwaysinline { 294 %1 = trunc <3 x i32> %in to <3 x i8> 295 ret <3 x i8> %1 296} 297 298define <2 x i8> @_Z14convert_uchar2Dv2_j(<2 x i32> %in) nounwind readnone alwaysinline { 299 %1 = trunc <2 x i32> %in to <2 x i8> 300 ret <2 x i8> %1 301} 302 303define <4 x i8> @_Z14convert_uchar4Dv4_i(<4 x i32> %in) nounwind readnone alwaysinline { 304 %1 = trunc <4 x i32> %in to <4 x i8> 305 ret <4 x i8> %1 306} 307 308define <3 x i8> @_Z14convert_uchar3Dv3_i(<3 x i32> %in) nounwind readnone alwaysinline { 309 %1 = trunc <3 x i32> %in to <3 x i8> 310 ret <3 x i8> %1 311} 312 313define <2 x i8> @_Z14convert_uchar2Dv2_i(<2 x i32> %in) nounwind readnone alwaysinline { 314 %1 = trunc <2 x i32> %in to <2 x i8> 315 ret <2 x i8> %1 316} 317 318;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 319;;;;;;;;; SHORT ;;;;;;;;;; 320;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 321 322define <4 x i16> @_Z14convert_short4Dv4_f(<4 x float> %in) nounwind readnone alwaysinline { 323 %1 = fptosi <4 x float> %in to <4 x i16> 324 ret <4 x i16> %1 325} 326 327define <3 x i16> @_Z14convert_short3Dv3_f(<3 x float> %in) nounwind readnone alwaysinline { 328 %1 = fptosi <3 x float> %in to <3 x i16> 329 ret <3 x i16> %1 330} 331 332define <2 x i16> @_Z14convert_short2Dv2_f(<2 x float> %in) nounwind readnone alwaysinline { 333 %1 = fptosi <2 x float> %in to <2 x i16> 334 ret <2 x i16> %1 335} 336 337define <4 x i16> @_Z14convert_short4Dv4_h(<4 x i8> %in) nounwind readnone alwaysinline { 338 %1 = zext <4 x i8> %in to <4 x i16> 339 ret <4 x i16> %1 340} 341 342define <3 x i16> @_Z14convert_short3Dv3_h(<3 x i8> %in) nounwind readnone alwaysinline { 343 %1 = zext <3 x i8> %in to <3 x i16> 344 ret <3 x i16> %1 345} 346 347define <2 x i16> @_Z14convert_short2Dv2_h(<2 x i8> %in) nounwind readnone alwaysinline { 348 %1 = zext <2 x i8> %in to <2 x i16> 349 ret <2 x i16> %1 350} 351 352define <4 x i16> @_Z14convert_short4Dv4_c(<4 x i8> %in) nounwind readnone alwaysinline { 353 %1 = sext <4 x i8> %in to <4 x i16> 354 ret <4 x i16> %1 355} 356 357define <3 x i16> @_Z14convert_short3Dv3_c(<3 x i8> %in) nounwind readnone alwaysinline { 358 %1 = sext <3 x i8> %in to <3 x i16> 359 ret <3 x i16> %1 360} 361 362define <2 x i16> @_Z14convert_short2Dv2_c(<2 x i8> %in) nounwind readnone alwaysinline { 363 %1 = sext <2 x i8> %in to <2 x i16> 364 ret <2 x i16> %1 365} 366 367define <4 x i16> @_Z14convert_short4Dv4_t(<4 x i16> %in) nounwind readnone alwaysinline { 368 ret <4 x i16> %in 369} 370 371define <3 x i16> @_Z14convert_short3Dv3_t(<3 x i16> %in) nounwind readnone alwaysinline { 372 ret <3 x i16> %in 373} 374 375define <2 x i16> @_Z14convert_short2Dv2_t(<2 x i16> %in) nounwind readnone alwaysinline { 376 ret <2 x i16> %in 377} 378 379define <4 x i16> @_Z14convert_short4Dv4_s(<4 x i16> %in) nounwind readnone alwaysinline { 380 ret <4 x i16> %in 381} 382 383define <3 x i16> @_Z14convert_short3Dv3_s(<3 x i16> %in) nounwind readnone alwaysinline { 384 ret <3 x i16> %in 385} 386 387define <2 x i16> @_Z14convert_short2Dv2_s(<2 x i16> %in) nounwind readnone alwaysinline { 388 ret <2 x i16> %in 389} 390 391define <4 x i16> @_Z14convert_short4Dv4_j(<4 x i32> %in) nounwind readnone alwaysinline { 392 %1 = trunc <4 x i32> %in to <4 x i16> 393 ret <4 x i16> %1 394} 395 396define <3 x i16> @_Z14convert_short3Dv3_j(<3 x i32> %in) nounwind readnone alwaysinline { 397 %1 = trunc <3 x i32> %in to <3 x i16> 398 ret <3 x i16> %1 399} 400 401define <2 x i16> @_Z14convert_short2Dv2_j(<2 x i32> %in) nounwind readnone alwaysinline { 402 %1 = trunc <2 x i32> %in to <2 x i16> 403 ret <2 x i16> %1 404} 405 406define <4 x i16> @_Z14convert_short4Dv4_i(<4 x i32> %in) nounwind readnone alwaysinline { 407 %1 = trunc <4 x i32> %in to <4 x i16> 408 ret <4 x i16> %1 409} 410 411define <3 x i16> @_Z14convert_short3Dv3_i(<3 x i32> %in) nounwind readnone alwaysinline { 412 %1 = trunc <3 x i32> %in to <3 x i16> 413 ret <3 x i16> %1 414} 415 416define <2 x i16> @_Z14convert_short2Dv2_i(<2 x i32> %in) nounwind readnone alwaysinline { 417 %1 = trunc <2 x i32> %in to <2 x i16> 418 ret <2 x i16> %1 419} 420 421 422;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 423;;;;;;;;; USHORT ;;;;;;;;;; 424;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 425 426define <4 x i16> @_Z15convert_ushort4Dv4_f(<4 x float> %in) nounwind readnone alwaysinline { 427 %1 = fptoui <4 x float> %in to <4 x i16> 428 ret <4 x i16> %1 429} 430 431define <3 x i16> @_Z15convert_ushort3Dv3_f(<3 x float> %in) nounwind readnone alwaysinline { 432 %1 = fptoui <3 x float> %in to <3 x i16> 433 ret <3 x i16> %1 434} 435 436define <2 x i16> @_Z15convert_ushort2Dv2_f(<2 x float> %in) nounwind readnone alwaysinline { 437 %1 = fptoui <2 x float> %in to <2 x i16> 438 ret <2 x i16> %1 439} 440 441define <4 x i16> @_Z15convert_ushort4Dv4_h(<4 x i8> %in) nounwind readnone alwaysinline { 442 %1 = zext <4 x i8> %in to <4 x i16> 443 ret <4 x i16> %1 444} 445 446define <3 x i16> @_Z15convert_ushort3Dv3_h(<3 x i8> %in) nounwind readnone alwaysinline { 447 %1 = zext <3 x i8> %in to <3 x i16> 448 ret <3 x i16> %1 449} 450 451define <2 x i16> @_Z15convert_ushort2Dv2_h(<2 x i8> %in) nounwind readnone alwaysinline { 452 %1 = zext <2 x i8> %in to <2 x i16> 453 ret <2 x i16> %1 454} 455 456define <4 x i16> @_Z15convert_ushort4Dv4_c(<4 x i8> %in) nounwind readnone alwaysinline { 457 %1 = zext <4 x i8> %in to <4 x i16> 458 ret <4 x i16> %1 459} 460 461define <3 x i16> @_Z15convert_ushort3Dv3_c(<3 x i8> %in) nounwind readnone alwaysinline { 462 %1 = zext <3 x i8> %in to <3 x i16> 463 ret <3 x i16> %1 464} 465 466define <2 x i16> @_Z15convert_ushort2Dv2_c(<2 x i8> %in) nounwind readnone alwaysinline { 467 %1 = zext <2 x i8> %in to <2 x i16> 468 ret <2 x i16> %1 469} 470 471define <4 x i16> @_Z15convert_ushort4Dv4_t(<4 x i16> %in) nounwind readnone alwaysinline { 472 ret <4 x i16> %in 473} 474 475define <3 x i16> @_Z15convert_ushort3Dv3_t(<3 x i16> %in) nounwind readnone alwaysinline { 476 ret <3 x i16> %in 477} 478 479define <2 x i16> @_Z15convert_ushort2Dv2_t(<2 x i16> %in) nounwind readnone alwaysinline { 480 ret <2 x i16> %in 481} 482 483define <4 x i16> @_Z15convert_ushort4Dv4_s(<4 x i16> %in) nounwind readnone alwaysinline { 484 ret <4 x i16> %in 485} 486 487define <3 x i16> @_Z15convert_ushort3Dv3_s(<3 x i16> %in) nounwind readnone alwaysinline { 488 ret <3 x i16> %in 489} 490 491define <2 x i16> @_Z15convert_ushort2Dv2_s(<2 x i16> %in) nounwind readnone alwaysinline { 492 ret <2 x i16> %in 493} 494 495define <4 x i16> @_Z15convert_ushort4Dv4_j(<4 x i32> %in) nounwind readnone alwaysinline { 496 %1 = trunc <4 x i32> %in to <4 x i16> 497 ret <4 x i16> %1 498} 499 500define <3 x i16> @_Z15convert_ushort3Dv3_j(<3 x i32> %in) nounwind readnone alwaysinline { 501 %1 = trunc <3 x i32> %in to <3 x i16> 502 ret <3 x i16> %1 503} 504 505define <2 x i16> @_Z15convert_ushort2Dv2_j(<2 x i32> %in) nounwind readnone alwaysinline { 506 %1 = trunc <2 x i32> %in to <2 x i16> 507 ret <2 x i16> %1 508} 509 510define <4 x i16> @_Z15convert_ushort4Dv4_i(<4 x i32> %in) nounwind readnone alwaysinline { 511 %1 = trunc <4 x i32> %in to <4 x i16> 512 ret <4 x i16> %1 513} 514 515define <3 x i16> @_Z15convert_ushort3Dv3_i(<3 x i32> %in) nounwind readnone alwaysinline { 516 %1 = trunc <3 x i32> %in to <3 x i16> 517 ret <3 x i16> %1 518} 519 520define <2 x i16> @_Z15convert_ushort2Dv2_i(<2 x i32> %in) nounwind readnone alwaysinline { 521 %1 = trunc <2 x i32> %in to <2 x i16> 522 ret <2 x i16> %1 523} 524 525 526;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 527;;;;;;;;; INT ;;;;;;;;;; 528;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 529 530define <4 x i32> @_Z12convert_int4Dv4_f(<4 x float> %in) nounwind readnone alwaysinline { 531 %1 = fptosi <4 x float> %in to <4 x i32> 532 ret <4 x i32> %1 533} 534 535define <3 x i32> @_Z12convert_int3Dv3_f(<3 x float> %in) nounwind readnone alwaysinline { 536 %1 = fptosi <3 x float> %in to <3 x i32> 537 ret <3 x i32> %1 538} 539 540define <2 x i32> @_Z12convert_int2Dv2_f(<2 x float> %in) nounwind readnone alwaysinline { 541 %1 = fptosi <2 x float> %in to <2 x i32> 542 ret <2 x i32> %1 543} 544 545define <4 x i32> @_Z12convert_int4Dv4_h(<4 x i8> %in) nounwind readnone alwaysinline { 546 %1 = zext <4 x i8> %in to <4 x i32> 547 ret <4 x i32> %1 548} 549 550define <3 x i32> @_Z12convert_int3Dv3_h(<3 x i8> %in) nounwind readnone alwaysinline { 551 %1 = zext <3 x i8> %in to <3 x i32> 552 ret <3 x i32> %1 553} 554 555define <2 x i32> @_Z12convert_int2Dv2_h(<2 x i8> %in) nounwind readnone alwaysinline { 556 %1 = zext <2 x i8> %in to <2 x i32> 557 ret <2 x i32> %1 558} 559 560define <4 x i32> @_Z12convert_int4Dv4_c(<4 x i8> %in) nounwind readnone alwaysinline { 561 %1 = sext <4 x i8> %in to <4 x i32> 562 ret <4 x i32> %1 563} 564 565define <3 x i32> @_Z12convert_int3Dv3_c(<3 x i8> %in) nounwind readnone alwaysinline { 566 %1 = sext <3 x i8> %in to <3 x i32> 567 ret <3 x i32> %1 568} 569 570define <2 x i32> @_Z12convert_int2Dv2_c(<2 x i8> %in) nounwind readnone alwaysinline { 571 %1 = sext <2 x i8> %in to <2 x i32> 572 ret <2 x i32> %1 573} 574 575define <4 x i32> @_Z12convert_int4Dv4_t(<4 x i16> %in) nounwind readnone alwaysinline { 576 %1 = zext <4 x i16> %in to <4 x i32> 577 ret <4 x i32> %1 578} 579 580define <3 x i32> @_Z12convert_int3Dv3_t(<3 x i16> %in) nounwind readnone alwaysinline { 581 %1 = zext <3 x i16> %in to <3 x i32> 582 ret <3 x i32> %1 583} 584 585define <2 x i32> @_Z12convert_int2Dv2_t(<2 x i16> %in) nounwind readnone alwaysinline { 586 %1 = zext <2 x i16> %in to <2 x i32> 587 ret <2 x i32> %1 588} 589 590define <4 x i32> @_Z12convert_int4Dv4_s(<4 x i16> %in) nounwind readnone alwaysinline { 591 %1 = sext <4 x i16> %in to <4 x i32> 592 ret <4 x i32> %1 593} 594 595define <3 x i32> @_Z12convert_int3Dv3_s(<3 x i16> %in) nounwind readnone alwaysinline { 596 %1 = sext <3 x i16> %in to <3 x i32> 597 ret <3 x i32> %1 598} 599 600define <2 x i32> @_Z12convert_int2Dv2_s(<2 x i16> %in) nounwind readnone alwaysinline { 601 %1 = sext <2 x i16> %in to <2 x i32> 602 ret <2 x i32> %1 603} 604 605define <4 x i32> @_Z12convert_int4Dv4_j(<4 x i32> %in) nounwind readnone alwaysinline { 606 ret <4 x i32> %in 607} 608 609define <3 x i32> @_Z12convert_int3Dv3_j(<3 x i32> %in) nounwind readnone alwaysinline { 610 ret <3 x i32> %in 611} 612 613define <2 x i32> @_Z12convert_int2Dv2_j(<2 x i32> %in) nounwind readnone alwaysinline { 614 ret <2 x i32> %in 615} 616 617define <4 x i32> @_Z12convert_int4Dv4_i(<4 x i32> %in) nounwind readnone alwaysinline { 618 ret <4 x i32> %in 619} 620 621define <3 x i32> @_Z12convert_int3Dv3_i(<3 x i32> %in) nounwind readnone alwaysinline { 622 ret <3 x i32> %in 623} 624 625define <2 x i32> @_Z12convert_int2Dv2_i(<2 x i32> %in) nounwind readnone alwaysinline { 626 ret <2 x i32> %in 627} 628 629 630;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 631;;;;;;;;; UINT ;;;;;;;;;; 632;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 633 634define <4 x i32> @_Z13convert_uint4Dv4_f(<4 x float> %in) nounwind readnone alwaysinline { 635 %1 = fptoui <4 x float> %in to <4 x i32> 636 ret <4 x i32> %1 637} 638 639define <3 x i32> @_Z13convert_uint3Dv3_f(<3 x float> %in) nounwind readnone alwaysinline { 640 %1 = fptoui <3 x float> %in to <3 x i32> 641 ret <3 x i32> %1 642} 643 644define <2 x i32> @_Z13convert_uint2Dv2_f(<2 x float> %in) nounwind readnone alwaysinline { 645 %1 = fptoui <2 x float> %in to <2 x i32> 646 ret <2 x i32> %1 647} 648 649define <4 x i32> @_Z13convert_uint4Dv4_h(<4 x i8> %in) nounwind readnone alwaysinline { 650 %1 = zext <4 x i8> %in to <4 x i32> 651 ret <4 x i32> %1 652} 653 654define <3 x i32> @_Z13convert_uint3Dv3_h(<3 x i8> %in) nounwind readnone alwaysinline { 655 %1 = zext <3 x i8> %in to <3 x i32> 656 ret <3 x i32> %1 657} 658 659define <2 x i32> @_Z13convert_uint2Dv2_h(<2 x i8> %in) nounwind readnone alwaysinline { 660 %1 = zext <2 x i8> %in to <2 x i32> 661 ret <2 x i32> %1 662} 663 664define <4 x i32> @_Z13convert_uint4Dv4_c(<4 x i8> %in) nounwind readnone alwaysinline { 665 %1 = zext <4 x i8> %in to <4 x i32> 666 ret <4 x i32> %1 667} 668 669define <3 x i32> @_Z13convert_uint3Dv3_c(<3 x i8> %in) nounwind readnone alwaysinline { 670 %1 = zext <3 x i8> %in to <3 x i32> 671 ret <3 x i32> %1 672} 673 674define <2 x i32> @_Z13convert_uint2Dv2_c(<2 x i8> %in) nounwind readnone alwaysinline { 675 %1 = zext <2 x i8> %in to <2 x i32> 676 ret <2 x i32> %1 677} 678 679define <4 x i32> @_Z13convert_uint4Dv4_t(<4 x i16> %in) nounwind readnone alwaysinline { 680 %1 = zext <4 x i16> %in to <4 x i32> 681 ret <4 x i32> %1 682} 683 684define <3 x i32> @_Z13convert_uint3Dv3_t(<3 x i16> %in) nounwind readnone alwaysinline { 685 %1 = zext <3 x i16> %in to <3 x i32> 686 ret <3 x i32> %1 687} 688 689define <2 x i32> @_Z13convert_uint2Dv2_t(<2 x i16> %in) nounwind readnone alwaysinline { 690 %1 = zext <2 x i16> %in to <2 x i32> 691 ret <2 x i32> %1 692} 693 694define <4 x i32> @_Z13convert_uint4Dv4_s(<4 x i16> %in) nounwind readnone alwaysinline { 695 %1 = zext <4 x i16> %in to <4 x i32> 696 ret <4 x i32> %1 697} 698 699define <3 x i32> @_Z13convert_uint3Dv3_s(<3 x i16> %in) nounwind readnone alwaysinline { 700 %1 = zext <3 x i16> %in to <3 x i32> 701 ret <3 x i32> %1 702} 703 704define <2 x i32> @_Z13convert_uint2Dv2_s(<2 x i16> %in) nounwind readnone alwaysinline { 705 %1 = zext <2 x i16> %in to <2 x i32> 706 ret <2 x i32> %1 707} 708 709define <4 x i32> @_Z13convert_uint4Dv4_j(<4 x i32> %in) nounwind readnone alwaysinline { 710 ret <4 x i32> %in 711} 712 713define <3 x i32> @_Z13convert_uint3Dv3_j(<3 x i32> %in) nounwind readnone alwaysinline { 714 ret <3 x i32> %in 715} 716 717define <2 x i32> @_Z13convert_uint2Dv2_j(<2 x i32> %in) nounwind readnone alwaysinline { 718 ret <2 x i32> %in 719} 720 721define <4 x i32> @_Z13convert_uint4Dv4_i(<4 x i32> %in) nounwind readnone alwaysinline { 722 ret <4 x i32> %in 723} 724 725define <3 x i32> @_Z13convert_uint3Dv3_i(<3 x i32> %in) nounwind readnone alwaysinline { 726 ret <3 x i32> %in 727} 728 729define <2 x i32> @_Z13convert_uint2Dv2_i(<2 x i32> %in) nounwind readnone alwaysinline { 730 ret <2 x i32> %in 731} 732